diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-28 15:06:51 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-28 15:06:51 -0400 |
commit | 3c3762957818dc902222733a8184f23102e24472 (patch) | |
tree | 97a17d0923d87108715af32f83a526d24e65fb80 /drivers | |
parent | e9f29c9a56ca06d0effa557823a737cbe7ec09f7 (diff) | |
parent | 63111a3a70fb4d80e3b54ed75f13795e98f7a467 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (32 commits)
sh: intc: switch irq_desc iteration to new active IRQ iterator.
sh: fix up cpu hotplug IRQ migration for irq_data changes.
sh: oprofile: Make sure the backtrace op is available for timer-fallback.
sh64: oprofile: Fix up kernel stack pointer size mismatch.
sh: oprofile: Fix up and extend op_name_from_perf_id().
sh: lockless get_user_pages_fast()
sh64: _PAGE_SPECIAL support.
sound: sh: ctrl_in/outX to __raw_read/writeX conversion.
sh: disable deprecated genirq support.
sh: update show_interrupts() for irq_data chip lookup.
sh: intc: irq_data conversion.
sh64: irq_data conversion.
sh64: update for IRQ flag handling naming changes.
rtc: rtc-rs5c313: ctrl_in/outX to __raw_read/writeX conversion.
sh: mach-se: irq_data conversion.
input: hp680_ts_input: ctrl_in/outX to __raw_read/writeX conversion.
input: jornada680_kbd: ctrl_in/outX to __raw_read/writeX conversion.
sh: hd64461: irq_data conversion.
sh: mach-x3proto: irq_data conversion.
sh: mach-systemh: irq_data conversion.
...
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/cdrom/gdrom.c | 76 | ||||
-rw-r--r-- | drivers/input/keyboard/jornada680_kbd.c | 28 | ||||
-rw-r--r-- | drivers/input/touchscreen/hp680_ts_input.c | 16 | ||||
-rw-r--r-- | drivers/rtc/rtc-rs5c313.c | 34 | ||||
-rw-r--r-- | drivers/sh/intc/chip.c | 53 | ||||
-rw-r--r-- | drivers/sh/intc/core.c | 45 | ||||
-rw-r--r-- | drivers/sh/intc/dynamic.c | 91 | ||||
-rw-r--r-- | drivers/sh/intc/internals.h | 2 | ||||
-rw-r--r-- | drivers/sh/intc/virq.c | 14 | ||||
-rw-r--r-- | drivers/sh/maple/maple.c | 20 |
10 files changed, 165 insertions, 214 deletions
diff --git a/drivers/cdrom/gdrom.c b/drivers/cdrom/gdrom.c index 3af6516919b7..de65915308fb 100644 --- a/drivers/cdrom/gdrom.c +++ b/drivers/cdrom/gdrom.c | |||
@@ -142,18 +142,18 @@ static int gdrom_hardreset(struct cdrom_device_info *cd_info); | |||
142 | 142 | ||
143 | static bool gdrom_is_busy(void) | 143 | static bool gdrom_is_busy(void) |
144 | { | 144 | { |
145 | return (ctrl_inb(GDROM_ALTSTATUS_REG) & 0x80) != 0; | 145 | return (__raw_readb(GDROM_ALTSTATUS_REG) & 0x80) != 0; |
146 | } | 146 | } |
147 | 147 | ||
148 | static bool gdrom_data_request(void) | 148 | static bool gdrom_data_request(void) |
149 | { | 149 | { |
150 | return (ctrl_inb(GDROM_ALTSTATUS_REG) & 0x88) == 8; | 150 | return (__raw_readb(GDROM_ALTSTATUS_REG) & 0x88) == 8; |
151 | } | 151 | } |
152 | 152 | ||
153 | static bool gdrom_wait_clrbusy(void) | 153 | static bool gdrom_wait_clrbusy(void) |
154 | { | 154 | { |
155 | unsigned long timeout = jiffies + GDROM_DEFAULT_TIMEOUT; | 155 | unsigned long timeout = jiffies + GDROM_DEFAULT_TIMEOUT; |
156 | while ((ctrl_inb(GDROM_ALTSTATUS_REG) & 0x80) && | 156 | while ((__raw_readb(GDROM_ALTSTATUS_REG) & 0x80) && |
157 | (time_before(jiffies, timeout))) | 157 | (time_before(jiffies, timeout))) |
158 | cpu_relax(); | 158 | cpu_relax(); |
159 | return time_before(jiffies, timeout + 1); | 159 | return time_before(jiffies, timeout + 1); |
@@ -181,14 +181,14 @@ static void gdrom_identifydevice(void *buf) | |||
181 | gdrom_getsense(NULL); | 181 | gdrom_getsense(NULL); |
182 | return; | 182 | return; |
183 | } | 183 | } |
184 | ctrl_outb(GDROM_COM_IDDEV, GDROM_STATUSCOMMAND_REG); | 184 | __raw_writeb(GDROM_COM_IDDEV, GDROM_STATUSCOMMAND_REG); |
185 | if (!gdrom_wait_busy_sleeps()) { | 185 | if (!gdrom_wait_busy_sleeps()) { |
186 | gdrom_getsense(NULL); | 186 | gdrom_getsense(NULL); |
187 | return; | 187 | return; |
188 | } | 188 | } |
189 | /* now read in the data */ | 189 | /* now read in the data */ |
190 | for (c = 0; c < 40; c++) | 190 | for (c = 0; c < 40; c++) |
191 | data[c] = ctrl_inw(GDROM_DATA_REG); | 191 | data[c] = __raw_readw(GDROM_DATA_REG); |
192 | } | 192 | } |
193 | 193 | ||
194 | static void gdrom_spicommand(void *spi_string, int buflen) | 194 | static void gdrom_spicommand(void *spi_string, int buflen) |
@@ -197,21 +197,21 @@ static void gdrom_spicommand(void *spi_string, int buflen) | |||
197 | unsigned long timeout; | 197 | unsigned long timeout; |
198 | 198 | ||
199 | /* ensure IRQ_WAIT is set */ | 199 | /* ensure IRQ_WAIT is set */ |
200 | ctrl_outb(0x08, GDROM_ALTSTATUS_REG); | 200 | __raw_writeb(0x08, GDROM_ALTSTATUS_REG); |
201 | /* specify how many bytes we expect back */ | 201 | /* specify how many bytes we expect back */ |
202 | ctrl_outb(buflen & 0xFF, GDROM_BCL_REG); | 202 | __raw_writeb(buflen & 0xFF, GDROM_BCL_REG); |
203 | ctrl_outb((buflen >> 8) & 0xFF, GDROM_BCH_REG); | 203 | __raw_writeb((buflen >> 8) & 0xFF, GDROM_BCH_REG); |
204 | /* other parameters */ | 204 | /* other parameters */ |
205 | ctrl_outb(0, GDROM_INTSEC_REG); | 205 | __raw_writeb(0, GDROM_INTSEC_REG); |
206 | ctrl_outb(0, GDROM_SECNUM_REG); | 206 | __raw_writeb(0, GDROM_SECNUM_REG); |
207 | ctrl_outb(0, GDROM_ERROR_REG); | 207 | __raw_writeb(0, GDROM_ERROR_REG); |
208 | /* Wait until we can go */ | 208 | /* Wait until we can go */ |
209 | if (!gdrom_wait_clrbusy()) { | 209 | if (!gdrom_wait_clrbusy()) { |
210 | gdrom_getsense(NULL); | 210 | gdrom_getsense(NULL); |
211 | return; | 211 | return; |
212 | } | 212 | } |
213 | timeout = jiffies + GDROM_DEFAULT_TIMEOUT; | 213 | timeout = jiffies + GDROM_DEFAULT_TIMEOUT; |
214 | ctrl_outb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG); | 214 | __raw_writeb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG); |
215 | while (!gdrom_data_request() && time_before(jiffies, timeout)) | 215 | while (!gdrom_data_request() && time_before(jiffies, timeout)) |
216 | cpu_relax(); | 216 | cpu_relax(); |
217 | if (!time_before(jiffies, timeout + 1)) { | 217 | if (!time_before(jiffies, timeout + 1)) { |
@@ -233,10 +233,10 @@ static char gdrom_execute_diagnostic(void) | |||
233 | gdrom_hardreset(gd.cd_info); | 233 | gdrom_hardreset(gd.cd_info); |
234 | if (!gdrom_wait_clrbusy()) | 234 | if (!gdrom_wait_clrbusy()) |
235 | return 0; | 235 | return 0; |
236 | ctrl_outb(GDROM_COM_EXECDIAG, GDROM_STATUSCOMMAND_REG); | 236 | __raw_writeb(GDROM_COM_EXECDIAG, GDROM_STATUSCOMMAND_REG); |
237 | if (!gdrom_wait_busy_sleeps()) | 237 | if (!gdrom_wait_busy_sleeps()) |
238 | return 0; | 238 | return 0; |
239 | return ctrl_inb(GDROM_ERROR_REG); | 239 | return __raw_readb(GDROM_ERROR_REG); |
240 | } | 240 | } |
241 | 241 | ||
242 | /* | 242 | /* |
@@ -385,7 +385,7 @@ static void gdrom_release(struct cdrom_device_info *cd_info) | |||
385 | static int gdrom_drivestatus(struct cdrom_device_info *cd_info, int ignore) | 385 | static int gdrom_drivestatus(struct cdrom_device_info *cd_info, int ignore) |
386 | { | 386 | { |
387 | /* read the sense key */ | 387 | /* read the sense key */ |
388 | char sense = ctrl_inb(GDROM_ERROR_REG); | 388 | char sense = __raw_readb(GDROM_ERROR_REG); |
389 | sense &= 0xF0; | 389 | sense &= 0xF0; |
390 | if (sense == 0) | 390 | if (sense == 0) |
391 | return CDS_DISC_OK; | 391 | return CDS_DISC_OK; |
@@ -398,16 +398,16 @@ static int gdrom_drivestatus(struct cdrom_device_info *cd_info, int ignore) | |||
398 | static int gdrom_mediachanged(struct cdrom_device_info *cd_info, int ignore) | 398 | static int gdrom_mediachanged(struct cdrom_device_info *cd_info, int ignore) |
399 | { | 399 | { |
400 | /* check the sense key */ | 400 | /* check the sense key */ |
401 | return (ctrl_inb(GDROM_ERROR_REG) & 0xF0) == 0x60; | 401 | return (__raw_readb(GDROM_ERROR_REG) & 0xF0) == 0x60; |
402 | } | 402 | } |
403 | 403 | ||
404 | /* reset the G1 bus */ | 404 | /* reset the G1 bus */ |
405 | static int gdrom_hardreset(struct cdrom_device_info *cd_info) | 405 | static int gdrom_hardreset(struct cdrom_device_info *cd_info) |
406 | { | 406 | { |
407 | int count; | 407 | int count; |
408 | ctrl_outl(0x1fffff, GDROM_RESET_REG); | 408 | __raw_writel(0x1fffff, GDROM_RESET_REG); |
409 | for (count = 0xa0000000; count < 0xa0200000; count += 4) | 409 | for (count = 0xa0000000; count < 0xa0200000; count += 4) |
410 | ctrl_inl(count); | 410 | __raw_readl(count); |
411 | return 0; | 411 | return 0; |
412 | } | 412 | } |
413 | 413 | ||
@@ -536,7 +536,7 @@ static const struct block_device_operations gdrom_bdops = { | |||
536 | 536 | ||
537 | static irqreturn_t gdrom_command_interrupt(int irq, void *dev_id) | 537 | static irqreturn_t gdrom_command_interrupt(int irq, void *dev_id) |
538 | { | 538 | { |
539 | gd.status = ctrl_inb(GDROM_STATUSCOMMAND_REG); | 539 | gd.status = __raw_readb(GDROM_STATUSCOMMAND_REG); |
540 | if (gd.pending != 1) | 540 | if (gd.pending != 1) |
541 | return IRQ_HANDLED; | 541 | return IRQ_HANDLED; |
542 | gd.pending = 0; | 542 | gd.pending = 0; |
@@ -546,7 +546,7 @@ static irqreturn_t gdrom_command_interrupt(int irq, void *dev_id) | |||
546 | 546 | ||
547 | static irqreturn_t gdrom_dma_interrupt(int irq, void *dev_id) | 547 | static irqreturn_t gdrom_dma_interrupt(int irq, void *dev_id) |
548 | { | 548 | { |
549 | gd.status = ctrl_inb(GDROM_STATUSCOMMAND_REG); | 549 | gd.status = __raw_readb(GDROM_STATUSCOMMAND_REG); |
550 | if (gd.transfer != 1) | 550 | if (gd.transfer != 1) |
551 | return IRQ_HANDLED; | 551 | return IRQ_HANDLED; |
552 | gd.transfer = 0; | 552 | gd.transfer = 0; |
@@ -600,10 +600,10 @@ static void gdrom_readdisk_dma(struct work_struct *work) | |||
600 | spin_unlock(&gdrom_lock); | 600 | spin_unlock(&gdrom_lock); |
601 | block = blk_rq_pos(req)/GD_TO_BLK + GD_SESSION_OFFSET; | 601 | block = blk_rq_pos(req)/GD_TO_BLK + GD_SESSION_OFFSET; |
602 | block_cnt = blk_rq_sectors(req)/GD_TO_BLK; | 602 | block_cnt = blk_rq_sectors(req)/GD_TO_BLK; |
603 | ctrl_outl(virt_to_phys(req->buffer), GDROM_DMA_STARTADDR_REG); | 603 | __raw_writel(virt_to_phys(req->buffer), GDROM_DMA_STARTADDR_REG); |
604 | ctrl_outl(block_cnt * GDROM_HARD_SECTOR, GDROM_DMA_LENGTH_REG); | 604 | __raw_writel(block_cnt * GDROM_HARD_SECTOR, GDROM_DMA_LENGTH_REG); |
605 | ctrl_outl(1, GDROM_DMA_DIRECTION_REG); | 605 | __raw_writel(1, GDROM_DMA_DIRECTION_REG); |
606 | ctrl_outl(1, GDROM_DMA_ENABLE_REG); | 606 | __raw_writel(1, GDROM_DMA_ENABLE_REG); |
607 | read_command->cmd[2] = (block >> 16) & 0xFF; | 607 | read_command->cmd[2] = (block >> 16) & 0xFF; |
608 | read_command->cmd[3] = (block >> 8) & 0xFF; | 608 | read_command->cmd[3] = (block >> 8) & 0xFF; |
609 | read_command->cmd[4] = block & 0xFF; | 609 | read_command->cmd[4] = block & 0xFF; |
@@ -611,18 +611,18 @@ static void gdrom_readdisk_dma(struct work_struct *work) | |||
611 | read_command->cmd[9] = (block_cnt >> 8) & 0xFF; | 611 | read_command->cmd[9] = (block_cnt >> 8) & 0xFF; |
612 | read_command->cmd[10] = block_cnt & 0xFF; | 612 | read_command->cmd[10] = block_cnt & 0xFF; |
613 | /* set for DMA */ | 613 | /* set for DMA */ |
614 | ctrl_outb(1, GDROM_ERROR_REG); | 614 | __raw_writeb(1, GDROM_ERROR_REG); |
615 | /* other registers */ | 615 | /* other registers */ |
616 | ctrl_outb(0, GDROM_SECNUM_REG); | 616 | __raw_writeb(0, GDROM_SECNUM_REG); |
617 | ctrl_outb(0, GDROM_BCL_REG); | 617 | __raw_writeb(0, GDROM_BCL_REG); |
618 | ctrl_outb(0, GDROM_BCH_REG); | 618 | __raw_writeb(0, GDROM_BCH_REG); |
619 | ctrl_outb(0, GDROM_DSEL_REG); | 619 | __raw_writeb(0, GDROM_DSEL_REG); |
620 | ctrl_outb(0, GDROM_INTSEC_REG); | 620 | __raw_writeb(0, GDROM_INTSEC_REG); |
621 | /* Wait for registers to reset after any previous activity */ | 621 | /* Wait for registers to reset after any previous activity */ |
622 | timeout = jiffies + HZ / 2; | 622 | timeout = jiffies + HZ / 2; |
623 | while (gdrom_is_busy() && time_before(jiffies, timeout)) | 623 | while (gdrom_is_busy() && time_before(jiffies, timeout)) |
624 | cpu_relax(); | 624 | cpu_relax(); |
625 | ctrl_outb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG); | 625 | __raw_writeb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG); |
626 | timeout = jiffies + HZ / 2; | 626 | timeout = jiffies + HZ / 2; |
627 | /* Wait for packet command to finish */ | 627 | /* Wait for packet command to finish */ |
628 | while (gdrom_is_busy() && time_before(jiffies, timeout)) | 628 | while (gdrom_is_busy() && time_before(jiffies, timeout)) |
@@ -632,11 +632,11 @@ static void gdrom_readdisk_dma(struct work_struct *work) | |||
632 | outsw(GDROM_DATA_REG, &read_command->cmd, 6); | 632 | outsw(GDROM_DATA_REG, &read_command->cmd, 6); |
633 | timeout = jiffies + HZ / 2; | 633 | timeout = jiffies + HZ / 2; |
634 | /* Wait for any pending DMA to finish */ | 634 | /* Wait for any pending DMA to finish */ |
635 | while (ctrl_inb(GDROM_DMA_STATUS_REG) && | 635 | while (__raw_readb(GDROM_DMA_STATUS_REG) && |
636 | time_before(jiffies, timeout)) | 636 | time_before(jiffies, timeout)) |
637 | cpu_relax(); | 637 | cpu_relax(); |
638 | /* start transfer */ | 638 | /* start transfer */ |
639 | ctrl_outb(1, GDROM_DMA_STATUS_REG); | 639 | __raw_writeb(1, GDROM_DMA_STATUS_REG); |
640 | wait_event_interruptible_timeout(request_queue, | 640 | wait_event_interruptible_timeout(request_queue, |
641 | gd.transfer == 0, GDROM_DEFAULT_TIMEOUT); | 641 | gd.transfer == 0, GDROM_DEFAULT_TIMEOUT); |
642 | err = gd.transfer ? -EIO : 0; | 642 | err = gd.transfer ? -EIO : 0; |
@@ -714,11 +714,11 @@ free_id: | |||
714 | /* set the default mode for DMA transfer */ | 714 | /* set the default mode for DMA transfer */ |
715 | static int __devinit gdrom_init_dma_mode(void) | 715 | static int __devinit gdrom_init_dma_mode(void) |
716 | { | 716 | { |
717 | ctrl_outb(0x13, GDROM_ERROR_REG); | 717 | __raw_writeb(0x13, GDROM_ERROR_REG); |
718 | ctrl_outb(0x22, GDROM_INTSEC_REG); | 718 | __raw_writeb(0x22, GDROM_INTSEC_REG); |
719 | if (!gdrom_wait_clrbusy()) | 719 | if (!gdrom_wait_clrbusy()) |
720 | return -EBUSY; | 720 | return -EBUSY; |
721 | ctrl_outb(0xEF, GDROM_STATUSCOMMAND_REG); | 721 | __raw_writeb(0xEF, GDROM_STATUSCOMMAND_REG); |
722 | if (!gdrom_wait_busy_sleeps()) | 722 | if (!gdrom_wait_busy_sleeps()) |
723 | return -EBUSY; | 723 | return -EBUSY; |
724 | /* Memory protection setting for GDROM DMA | 724 | /* Memory protection setting for GDROM DMA |
@@ -728,8 +728,8 @@ static int __devinit gdrom_init_dma_mode(void) | |||
728 | * Bits 6 - 0 end of transfer range in 1 MB blocks OR'ed with 0x80 | 728 | * Bits 6 - 0 end of transfer range in 1 MB blocks OR'ed with 0x80 |
729 | * (0x40 | 0x80) = start range at 0x0C000000 | 729 | * (0x40 | 0x80) = start range at 0x0C000000 |
730 | * (0x7F | 0x80) = end range at 0x0FFFFFFF */ | 730 | * (0x7F | 0x80) = end range at 0x0FFFFFFF */ |
731 | ctrl_outl(0x8843407F, GDROM_DMA_ACCESS_CTRL_REG); | 731 | __raw_writel(0x8843407F, GDROM_DMA_ACCESS_CTRL_REG); |
732 | ctrl_outl(9, GDROM_DMA_WAIT_REG); /* DMA word setting */ | 732 | __raw_writel(9, GDROM_DMA_WAIT_REG); /* DMA word setting */ |
733 | return 0; | 733 | return 0; |
734 | } | 734 | } |
735 | 735 | ||
diff --git a/drivers/input/keyboard/jornada680_kbd.c b/drivers/input/keyboard/jornada680_kbd.c index 5fc976dbce0b..7197c5698747 100644 --- a/drivers/input/keyboard/jornada680_kbd.c +++ b/drivers/input/keyboard/jornada680_kbd.c | |||
@@ -139,35 +139,35 @@ static void jornada_scan_keyb(unsigned char *s) | |||
139 | }, *y = matrix_PDE; | 139 | }, *y = matrix_PDE; |
140 | 140 | ||
141 | /* Save these control reg bits */ | 141 | /* Save these control reg bits */ |
142 | dc_static = (ctrl_inw(PDCR) & (~0xcc0c)); | 142 | dc_static = (__raw_readw(PDCR) & (~0xcc0c)); |
143 | ec_static = (ctrl_inw(PECR) & (~0xf0cf)); | 143 | ec_static = (__raw_readw(PECR) & (~0xf0cf)); |
144 | 144 | ||
145 | for (i = 0; i < 8; i++) { | 145 | for (i = 0; i < 8; i++) { |
146 | /* disable output for all but the one we want to scan */ | 146 | /* disable output for all but the one we want to scan */ |
147 | ctrl_outw((dc_static | *y++), PDCR); | 147 | __raw_writew((dc_static | *y++), PDCR); |
148 | ctrl_outw((ec_static | *y++), PECR); | 148 | __raw_writew((ec_static | *y++), PECR); |
149 | udelay(5); | 149 | udelay(5); |
150 | 150 | ||
151 | /* Get scanline row */ | 151 | /* Get scanline row */ |
152 | ctrl_outb(*t++, PDDR); | 152 | __raw_writeb(*t++, PDDR); |
153 | ctrl_outb(*t++, PEDR); | 153 | __raw_writeb(*t++, PEDR); |
154 | udelay(50); | 154 | udelay(50); |
155 | 155 | ||
156 | /* Read data */ | 156 | /* Read data */ |
157 | *s++ = ctrl_inb(PCDR); | 157 | *s++ = __raw_readb(PCDR); |
158 | *s++ = ctrl_inb(PFDR); | 158 | *s++ = __raw_readb(PFDR); |
159 | } | 159 | } |
160 | /* Scan no lines */ | 160 | /* Scan no lines */ |
161 | ctrl_outb(0xff, PDDR); | 161 | __raw_writeb(0xff, PDDR); |
162 | ctrl_outb(0xff, PEDR); | 162 | __raw_writeb(0xff, PEDR); |
163 | 163 | ||
164 | /* Enable all scanlines */ | 164 | /* Enable all scanlines */ |
165 | ctrl_outw((dc_static | (0x5555 & 0xcc0c)),PDCR); | 165 | __raw_writew((dc_static | (0x5555 & 0xcc0c)),PDCR); |
166 | ctrl_outw((ec_static | (0x5555 & 0xf0cf)),PECR); | 166 | __raw_writew((ec_static | (0x5555 & 0xf0cf)),PECR); |
167 | 167 | ||
168 | /* Ignore extra keys and events */ | 168 | /* Ignore extra keys and events */ |
169 | *s++ = ctrl_inb(PGDR); | 169 | *s++ = __raw_readb(PGDR); |
170 | *s++ = ctrl_inb(PHDR); | 170 | *s++ = __raw_readb(PHDR); |
171 | } | 171 | } |
172 | 172 | ||
173 | static void jornadakbd680_poll(struct input_polled_dev *dev) | 173 | static void jornadakbd680_poll(struct input_polled_dev *dev) |
diff --git a/drivers/input/touchscreen/hp680_ts_input.c b/drivers/input/touchscreen/hp680_ts_input.c index 498bd62af09a..dd4e8f020b99 100644 --- a/drivers/input/touchscreen/hp680_ts_input.c +++ b/drivers/input/touchscreen/hp680_ts_input.c | |||
@@ -28,29 +28,29 @@ static void do_softint(struct work_struct *work) | |||
28 | u8 scpdr; | 28 | u8 scpdr; |
29 | int touched = 0; | 29 | int touched = 0; |
30 | 30 | ||
31 | if (ctrl_inb(PHDR) & PHDR_TS_PEN_DOWN) { | 31 | if (__raw_readb(PHDR) & PHDR_TS_PEN_DOWN) { |
32 | scpdr = ctrl_inb(SCPDR); | 32 | scpdr = __raw_readb(SCPDR); |
33 | scpdr |= SCPDR_TS_SCAN_ENABLE; | 33 | scpdr |= SCPDR_TS_SCAN_ENABLE; |
34 | scpdr &= ~SCPDR_TS_SCAN_Y; | 34 | scpdr &= ~SCPDR_TS_SCAN_Y; |
35 | ctrl_outb(scpdr, SCPDR); | 35 | __raw_writeb(scpdr, SCPDR); |
36 | udelay(30); | 36 | udelay(30); |
37 | 37 | ||
38 | absy = adc_single(ADC_CHANNEL_TS_Y); | 38 | absy = adc_single(ADC_CHANNEL_TS_Y); |
39 | 39 | ||
40 | scpdr = ctrl_inb(SCPDR); | 40 | scpdr = __raw_readb(SCPDR); |
41 | scpdr |= SCPDR_TS_SCAN_Y; | 41 | scpdr |= SCPDR_TS_SCAN_Y; |
42 | scpdr &= ~SCPDR_TS_SCAN_X; | 42 | scpdr &= ~SCPDR_TS_SCAN_X; |
43 | ctrl_outb(scpdr, SCPDR); | 43 | __raw_writeb(scpdr, SCPDR); |
44 | udelay(30); | 44 | udelay(30); |
45 | 45 | ||
46 | absx = adc_single(ADC_CHANNEL_TS_X); | 46 | absx = adc_single(ADC_CHANNEL_TS_X); |
47 | 47 | ||
48 | scpdr = ctrl_inb(SCPDR); | 48 | scpdr = __raw_readb(SCPDR); |
49 | scpdr |= SCPDR_TS_SCAN_X; | 49 | scpdr |= SCPDR_TS_SCAN_X; |
50 | scpdr &= ~SCPDR_TS_SCAN_ENABLE; | 50 | scpdr &= ~SCPDR_TS_SCAN_ENABLE; |
51 | ctrl_outb(scpdr, SCPDR); | 51 | __raw_writeb(scpdr, SCPDR); |
52 | udelay(100); | 52 | udelay(100); |
53 | touched = ctrl_inb(PHDR) & PHDR_TS_PEN_DOWN; | 53 | touched = __raw_readb(PHDR) & PHDR_TS_PEN_DOWN; |
54 | } | 54 | } |
55 | 55 | ||
56 | if (touched) { | 56 | if (touched) { |
diff --git a/drivers/rtc/rtc-rs5c313.c b/drivers/rtc/rtc-rs5c313.c index e6ea3f5ee1eb..e3ff179b99ca 100644 --- a/drivers/rtc/rtc-rs5c313.c +++ b/drivers/rtc/rtc-rs5c313.c | |||
@@ -80,21 +80,21 @@ | |||
80 | /* SCSPTR1 data */ | 80 | /* SCSPTR1 data */ |
81 | unsigned char scsptr1_data; | 81 | unsigned char scsptr1_data; |
82 | 82 | ||
83 | #define RS5C313_CEENABLE ctrl_outb(RS5C313_CE_RTCCE, RS5C313_CE); | 83 | #define RS5C313_CEENABLE __raw_writeb(RS5C313_CE_RTCCE, RS5C313_CE); |
84 | #define RS5C313_CEDISABLE ctrl_outb(0x00, RS5C313_CE) | 84 | #define RS5C313_CEDISABLE __raw_writeb(0x00, RS5C313_CE) |
85 | #define RS5C313_MISCOP ctrl_outb(0x02, 0xB0000008) | 85 | #define RS5C313_MISCOP __raw_writeb(0x02, 0xB0000008) |
86 | 86 | ||
87 | static void rs5c313_init_port(void) | 87 | static void rs5c313_init_port(void) |
88 | { | 88 | { |
89 | /* Set SCK as I/O port and Initialize SCSPTR1 data & I/O port. */ | 89 | /* Set SCK as I/O port and Initialize SCSPTR1 data & I/O port. */ |
90 | ctrl_outb(ctrl_inb(SCSMR1) & ~SCSMR1_CA, SCSMR1); | 90 | __raw_writeb(__raw_readb(SCSMR1) & ~SCSMR1_CA, SCSMR1); |
91 | ctrl_outb(ctrl_inb(SCSCR1) & ~SCSCR1_CKE, SCSCR1); | 91 | __raw_writeb(__raw_readb(SCSCR1) & ~SCSCR1_CKE, SCSCR1); |
92 | 92 | ||
93 | /* And Initialize SCL for RS5C313 clock */ | 93 | /* And Initialize SCL for RS5C313 clock */ |
94 | scsptr1_data = ctrl_inb(SCSPTR1) | SCL; /* SCL:H */ | 94 | scsptr1_data = __raw_readb(SCSPTR1) | SCL; /* SCL:H */ |
95 | ctrl_outb(scsptr1_data, SCSPTR1); | 95 | __raw_writeb(scsptr1_data, SCSPTR1); |
96 | scsptr1_data = ctrl_inb(SCSPTR1) | SCL_OEN; /* SCL output enable */ | 96 | scsptr1_data = __raw_readb(SCSPTR1) | SCL_OEN; /* SCL output enable */ |
97 | ctrl_outb(scsptr1_data, SCSPTR1); | 97 | __raw_writeb(scsptr1_data, SCSPTR1); |
98 | RS5C313_CEDISABLE; /* CE:L */ | 98 | RS5C313_CEDISABLE; /* CE:L */ |
99 | } | 99 | } |
100 | 100 | ||
@@ -106,21 +106,21 @@ static void rs5c313_write_data(unsigned char data) | |||
106 | /* SDA:Write Data */ | 106 | /* SDA:Write Data */ |
107 | scsptr1_data = (scsptr1_data & ~SDA) | | 107 | scsptr1_data = (scsptr1_data & ~SDA) | |
108 | ((((0x80 >> i) & data) >> (7 - i)) << 2); | 108 | ((((0x80 >> i) & data) >> (7 - i)) << 2); |
109 | ctrl_outb(scsptr1_data, SCSPTR1); | 109 | __raw_writeb(scsptr1_data, SCSPTR1); |
110 | if (i == 0) { | 110 | if (i == 0) { |
111 | scsptr1_data |= SDA_OEN; /* SDA:output enable */ | 111 | scsptr1_data |= SDA_OEN; /* SDA:output enable */ |
112 | ctrl_outb(scsptr1_data, SCSPTR1); | 112 | __raw_writeb(scsptr1_data, SCSPTR1); |
113 | } | 113 | } |
114 | ndelay(700); | 114 | ndelay(700); |
115 | scsptr1_data &= ~SCL; /* SCL:L */ | 115 | scsptr1_data &= ~SCL; /* SCL:L */ |
116 | ctrl_outb(scsptr1_data, SCSPTR1); | 116 | __raw_writeb(scsptr1_data, SCSPTR1); |
117 | ndelay(700); | 117 | ndelay(700); |
118 | scsptr1_data |= SCL; /* SCL:H */ | 118 | scsptr1_data |= SCL; /* SCL:H */ |
119 | ctrl_outb(scsptr1_data, SCSPTR1); | 119 | __raw_writeb(scsptr1_data, SCSPTR1); |
120 | } | 120 | } |
121 | 121 | ||
122 | scsptr1_data &= ~SDA_OEN; /* SDA:output disable */ | 122 | scsptr1_data &= ~SDA_OEN; /* SDA:output disable */ |
123 | ctrl_outb(scsptr1_data, SCSPTR1); | 123 | __raw_writeb(scsptr1_data, SCSPTR1); |
124 | } | 124 | } |
125 | 125 | ||
126 | static unsigned char rs5c313_read_data(void) | 126 | static unsigned char rs5c313_read_data(void) |
@@ -131,12 +131,12 @@ static unsigned char rs5c313_read_data(void) | |||
131 | for (i = 0; i < 8; i++) { | 131 | for (i = 0; i < 8; i++) { |
132 | ndelay(700); | 132 | ndelay(700); |
133 | /* SDA:Read Data */ | 133 | /* SDA:Read Data */ |
134 | data |= ((ctrl_inb(SCSPTR1) & SDA) >> 2) << (7 - i); | 134 | data |= ((__raw_readb(SCSPTR1) & SDA) >> 2) << (7 - i); |
135 | scsptr1_data &= ~SCL; /* SCL:L */ | 135 | scsptr1_data &= ~SCL; /* SCL:L */ |
136 | ctrl_outb(scsptr1_data, SCSPTR1); | 136 | __raw_writeb(scsptr1_data, SCSPTR1); |
137 | ndelay(700); | 137 | ndelay(700); |
138 | scsptr1_data |= SCL; /* SCL:H */ | 138 | scsptr1_data |= SCL; /* SCL:H */ |
139 | ctrl_outb(scsptr1_data, SCSPTR1); | 139 | __raw_writeb(scsptr1_data, SCSPTR1); |
140 | } | 140 | } |
141 | return data & 0x0F; | 141 | return data & 0x0F; |
142 | } | 142 | } |
diff --git a/drivers/sh/intc/chip.c b/drivers/sh/intc/chip.c index 35c03706cc21..de885a0f917a 100644 --- a/drivers/sh/intc/chip.c +++ b/drivers/sh/intc/chip.c | |||
@@ -12,15 +12,16 @@ | |||
12 | #include <linux/io.h> | 12 | #include <linux/io.h> |
13 | #include "internals.h" | 13 | #include "internals.h" |
14 | 14 | ||
15 | void _intc_enable(unsigned int irq, unsigned long handle) | 15 | void _intc_enable(struct irq_data *data, unsigned long handle) |
16 | { | 16 | { |
17 | unsigned int irq = data->irq; | ||
17 | struct intc_desc_int *d = get_intc_desc(irq); | 18 | struct intc_desc_int *d = get_intc_desc(irq); |
18 | unsigned long addr; | 19 | unsigned long addr; |
19 | unsigned int cpu; | 20 | unsigned int cpu; |
20 | 21 | ||
21 | for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_E(handle)); cpu++) { | 22 | for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_E(handle)); cpu++) { |
22 | #ifdef CONFIG_SMP | 23 | #ifdef CONFIG_SMP |
23 | if (!cpumask_test_cpu(cpu, irq_to_desc(irq)->affinity)) | 24 | if (!cpumask_test_cpu(cpu, data->affinity)) |
24 | continue; | 25 | continue; |
25 | #endif | 26 | #endif |
26 | addr = INTC_REG(d, _INTC_ADDR_E(handle), cpu); | 27 | addr = INTC_REG(d, _INTC_ADDR_E(handle), cpu); |
@@ -31,15 +32,16 @@ void _intc_enable(unsigned int irq, unsigned long handle) | |||
31 | intc_balancing_enable(irq); | 32 | intc_balancing_enable(irq); |
32 | } | 33 | } |
33 | 34 | ||
34 | static void intc_enable(unsigned int irq) | 35 | static void intc_enable(struct irq_data *data) |
35 | { | 36 | { |
36 | _intc_enable(irq, (unsigned long)get_irq_chip_data(irq)); | 37 | _intc_enable(data, (unsigned long)irq_data_get_irq_chip_data(data)); |
37 | } | 38 | } |
38 | 39 | ||
39 | static void intc_disable(unsigned int irq) | 40 | static void intc_disable(struct irq_data *data) |
40 | { | 41 | { |
42 | unsigned int irq = data->irq; | ||
41 | struct intc_desc_int *d = get_intc_desc(irq); | 43 | struct intc_desc_int *d = get_intc_desc(irq); |
42 | unsigned long handle = (unsigned long)get_irq_chip_data(irq); | 44 | unsigned long handle = (unsigned long)irq_data_get_irq_chip_data(data); |
43 | unsigned long addr; | 45 | unsigned long addr; |
44 | unsigned int cpu; | 46 | unsigned int cpu; |
45 | 47 | ||
@@ -47,7 +49,7 @@ static void intc_disable(unsigned int irq) | |||
47 | 49 | ||
48 | for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) { | 50 | for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) { |
49 | #ifdef CONFIG_SMP | 51 | #ifdef CONFIG_SMP |
50 | if (!cpumask_test_cpu(cpu, irq_to_desc(irq)->affinity)) | 52 | if (!cpumask_test_cpu(cpu, data->affinity)) |
51 | continue; | 53 | continue; |
52 | #endif | 54 | #endif |
53 | addr = INTC_REG(d, _INTC_ADDR_D(handle), cpu); | 55 | addr = INTC_REG(d, _INTC_ADDR_D(handle), cpu); |
@@ -56,7 +58,7 @@ static void intc_disable(unsigned int irq) | |||
56 | } | 58 | } |
57 | } | 59 | } |
58 | 60 | ||
59 | static int intc_set_wake(unsigned int irq, unsigned int on) | 61 | static int intc_set_wake(struct irq_data *data, unsigned int on) |
60 | { | 62 | { |
61 | return 0; /* allow wakeup, but setup hardware in intc_suspend() */ | 63 | return 0; /* allow wakeup, but setup hardware in intc_suspend() */ |
62 | } | 64 | } |
@@ -67,24 +69,27 @@ static int intc_set_wake(unsigned int irq, unsigned int on) | |||
67 | * additional locking here at the intc desc level. The affinity mask is | 69 | * additional locking here at the intc desc level. The affinity mask is |
68 | * later tested in the enable/disable paths. | 70 | * later tested in the enable/disable paths. |
69 | */ | 71 | */ |
70 | static int intc_set_affinity(unsigned int irq, const struct cpumask *cpumask) | 72 | static int intc_set_affinity(struct irq_data *data, |
73 | const struct cpumask *cpumask, | ||
74 | bool force) | ||
71 | { | 75 | { |
72 | if (!cpumask_intersects(cpumask, cpu_online_mask)) | 76 | if (!cpumask_intersects(cpumask, cpu_online_mask)) |
73 | return -1; | 77 | return -1; |
74 | 78 | ||
75 | cpumask_copy(irq_to_desc(irq)->affinity, cpumask); | 79 | cpumask_copy(data->affinity, cpumask); |
76 | 80 | ||
77 | return 0; | 81 | return 0; |
78 | } | 82 | } |
79 | #endif | 83 | #endif |
80 | 84 | ||
81 | static void intc_mask_ack(unsigned int irq) | 85 | static void intc_mask_ack(struct irq_data *data) |
82 | { | 86 | { |
87 | unsigned int irq = data->irq; | ||
83 | struct intc_desc_int *d = get_intc_desc(irq); | 88 | struct intc_desc_int *d = get_intc_desc(irq); |
84 | unsigned long handle = intc_get_ack_handle(irq); | 89 | unsigned long handle = intc_get_ack_handle(irq); |
85 | unsigned long addr; | 90 | unsigned long addr; |
86 | 91 | ||
87 | intc_disable(irq); | 92 | intc_disable(data); |
88 | 93 | ||
89 | /* read register and write zero only to the associated bit */ | 94 | /* read register and write zero only to the associated bit */ |
90 | if (handle) { | 95 | if (handle) { |
@@ -144,6 +149,7 @@ static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp, | |||
144 | int intc_set_priority(unsigned int irq, unsigned int prio) | 149 | int intc_set_priority(unsigned int irq, unsigned int prio) |
145 | { | 150 | { |
146 | struct intc_desc_int *d = get_intc_desc(irq); | 151 | struct intc_desc_int *d = get_intc_desc(irq); |
152 | struct irq_data *data = irq_get_irq_data(irq); | ||
147 | struct intc_handle_int *ihp; | 153 | struct intc_handle_int *ihp; |
148 | 154 | ||
149 | if (!intc_get_prio_level(irq) || prio <= 1) | 155 | if (!intc_get_prio_level(irq) || prio <= 1) |
@@ -162,7 +168,7 @@ int intc_set_priority(unsigned int irq, unsigned int prio) | |||
162 | * priority level will be set during next enable() | 168 | * priority level will be set during next enable() |
163 | */ | 169 | */ |
164 | if (_INTC_FN(ihp->handle) != REG_FN_ERR) | 170 | if (_INTC_FN(ihp->handle) != REG_FN_ERR) |
165 | _intc_enable(irq, ihp->handle); | 171 | _intc_enable(data, ihp->handle); |
166 | } | 172 | } |
167 | return 0; | 173 | return 0; |
168 | } | 174 | } |
@@ -181,8 +187,9 @@ static unsigned char intc_irq_sense_table[IRQ_TYPE_SENSE_MASK + 1] = { | |||
181 | #endif | 187 | #endif |
182 | }; | 188 | }; |
183 | 189 | ||
184 | static int intc_set_type(unsigned int irq, unsigned int type) | 190 | static int intc_set_type(struct irq_data *data, unsigned int type) |
185 | { | 191 | { |
192 | unsigned int irq = data->irq; | ||
186 | struct intc_desc_int *d = get_intc_desc(irq); | 193 | struct intc_desc_int *d = get_intc_desc(irq); |
187 | unsigned char value = intc_irq_sense_table[type & IRQ_TYPE_SENSE_MASK]; | 194 | unsigned char value = intc_irq_sense_table[type & IRQ_TYPE_SENSE_MASK]; |
188 | struct intc_handle_int *ihp; | 195 | struct intc_handle_int *ihp; |
@@ -201,15 +208,15 @@ static int intc_set_type(unsigned int irq, unsigned int type) | |||
201 | } | 208 | } |
202 | 209 | ||
203 | struct irq_chip intc_irq_chip = { | 210 | struct irq_chip intc_irq_chip = { |
204 | .mask = intc_disable, | 211 | .irq_mask = intc_disable, |
205 | .unmask = intc_enable, | 212 | .irq_unmask = intc_enable, |
206 | .mask_ack = intc_mask_ack, | 213 | .irq_mask_ack = intc_mask_ack, |
207 | .enable = intc_enable, | 214 | .irq_enable = intc_enable, |
208 | .disable = intc_disable, | 215 | .irq_disable = intc_disable, |
209 | .shutdown = intc_disable, | 216 | .irq_shutdown = intc_disable, |
210 | .set_type = intc_set_type, | 217 | .irq_set_type = intc_set_type, |
211 | .set_wake = intc_set_wake, | 218 | .irq_set_wake = intc_set_wake, |
212 | #ifdef CONFIG_SMP | 219 | #ifdef CONFIG_SMP |
213 | .set_affinity = intc_set_affinity, | 220 | .irq_set_affinity = intc_set_affinity, |
214 | #endif | 221 | #endif |
215 | }; | 222 | }; |
diff --git a/drivers/sh/intc/core.c b/drivers/sh/intc/core.c index 306ed287077a..873a99ff8f64 100644 --- a/drivers/sh/intc/core.c +++ b/drivers/sh/intc/core.c | |||
@@ -71,6 +71,7 @@ static void __init intc_register_irq(struct intc_desc *desc, | |||
71 | unsigned int irq) | 71 | unsigned int irq) |
72 | { | 72 | { |
73 | struct intc_handle_int *hp; | 73 | struct intc_handle_int *hp; |
74 | struct irq_data *irq_data; | ||
74 | unsigned int data[2], primary; | 75 | unsigned int data[2], primary; |
75 | unsigned long flags; | 76 | unsigned long flags; |
76 | 77 | ||
@@ -78,7 +79,7 @@ static void __init intc_register_irq(struct intc_desc *desc, | |||
78 | * Register the IRQ position with the global IRQ map, then insert | 79 | * Register the IRQ position with the global IRQ map, then insert |
79 | * it in to the radix tree. | 80 | * it in to the radix tree. |
80 | */ | 81 | */ |
81 | reserve_irq_vector(irq); | 82 | irq_reserve_irqs(irq, 1); |
82 | 83 | ||
83 | raw_spin_lock_irqsave(&intc_big_lock, flags); | 84 | raw_spin_lock_irqsave(&intc_big_lock, flags); |
84 | radix_tree_insert(&d->tree, enum_id, intc_irq_xlate_get(irq)); | 85 | radix_tree_insert(&d->tree, enum_id, intc_irq_xlate_get(irq)); |
@@ -111,6 +112,8 @@ static void __init intc_register_irq(struct intc_desc *desc, | |||
111 | 112 | ||
112 | BUG_ON(!data[primary]); /* must have primary masking method */ | 113 | BUG_ON(!data[primary]); /* must have primary masking method */ |
113 | 114 | ||
115 | irq_data = irq_get_irq_data(irq); | ||
116 | |||
114 | disable_irq_nosync(irq); | 117 | disable_irq_nosync(irq); |
115 | set_irq_chip_and_handler_name(irq, &d->chip, | 118 | set_irq_chip_and_handler_name(irq, &d->chip, |
116 | handle_level_irq, "level"); | 119 | handle_level_irq, "level"); |
@@ -123,7 +126,7 @@ static void __init intc_register_irq(struct intc_desc *desc, | |||
123 | 126 | ||
124 | /* enable secondary masking method if present */ | 127 | /* enable secondary masking method if present */ |
125 | if (data[!primary]) | 128 | if (data[!primary]) |
126 | _intc_enable(irq, data[!primary]); | 129 | _intc_enable(irq_data, data[!primary]); |
127 | 130 | ||
128 | /* add irq to d->prio list if priority is available */ | 131 | /* add irq to d->prio list if priority is available */ |
129 | if (data[1]) { | 132 | if (data[1]) { |
@@ -151,7 +154,7 @@ static void __init intc_register_irq(struct intc_desc *desc, | |||
151 | } | 154 | } |
152 | 155 | ||
153 | /* irq should be disabled by default */ | 156 | /* irq should be disabled by default */ |
154 | d->chip.mask(irq); | 157 | d->chip.irq_mask(irq_data); |
155 | 158 | ||
156 | intc_set_ack_handle(irq, desc, d, enum_id); | 159 | intc_set_ack_handle(irq, desc, d, enum_id); |
157 | intc_set_dist_handle(irq, desc, d, enum_id); | 160 | intc_set_dist_handle(irq, desc, d, enum_id); |
@@ -284,7 +287,7 @@ int __init register_intc_controller(struct intc_desc *desc) | |||
284 | for (i = 0; i < hw->nr_ack_regs; i++) | 287 | for (i = 0; i < hw->nr_ack_regs; i++) |
285 | k += save_reg(d, k, hw->ack_regs[i].set_reg, 0); | 288 | k += save_reg(d, k, hw->ack_regs[i].set_reg, 0); |
286 | else | 289 | else |
287 | d->chip.mask_ack = d->chip.disable; | 290 | d->chip.irq_mask_ack = d->chip.irq_disable; |
288 | 291 | ||
289 | /* disable bits matching force_disable before registering irqs */ | 292 | /* disable bits matching force_disable before registering irqs */ |
290 | if (desc->force_disable) | 293 | if (desc->force_disable) |
@@ -300,13 +303,13 @@ int __init register_intc_controller(struct intc_desc *desc) | |||
300 | for (i = 0; i < hw->nr_vectors; i++) { | 303 | for (i = 0; i < hw->nr_vectors; i++) { |
301 | struct intc_vect *vect = hw->vectors + i; | 304 | struct intc_vect *vect = hw->vectors + i; |
302 | unsigned int irq = evt2irq(vect->vect); | 305 | unsigned int irq = evt2irq(vect->vect); |
303 | struct irq_desc *irq_desc; | 306 | int res; |
304 | 307 | ||
305 | if (!vect->enum_id) | 308 | if (!vect->enum_id) |
306 | continue; | 309 | continue; |
307 | 310 | ||
308 | irq_desc = irq_to_desc_alloc_node(irq, numa_node_id()); | 311 | res = irq_alloc_desc_at(irq, numa_node_id()); |
309 | if (unlikely(!irq_desc)) { | 312 | if (res != irq && res != -EEXIST) { |
310 | pr_err("can't get irq_desc for %d\n", irq); | 313 | pr_err("can't get irq_desc for %d\n", irq); |
311 | continue; | 314 | continue; |
312 | } | 315 | } |
@@ -326,8 +329,8 @@ int __init register_intc_controller(struct intc_desc *desc) | |||
326 | * IRQ support, each vector still needs to have | 329 | * IRQ support, each vector still needs to have |
327 | * its own backing irq_desc. | 330 | * its own backing irq_desc. |
328 | */ | 331 | */ |
329 | irq_desc = irq_to_desc_alloc_node(irq2, numa_node_id()); | 332 | res = irq_alloc_desc_at(irq2, numa_node_id()); |
330 | if (unlikely(!irq_desc)) { | 333 | if (res != irq2 && res != -EEXIST) { |
331 | pr_err("can't get irq_desc for %d\n", irq2); | 334 | pr_err("can't get irq_desc for %d\n", irq2); |
332 | continue; | 335 | continue; |
333 | } | 336 | } |
@@ -387,7 +390,9 @@ static SYSDEV_ATTR(name, S_IRUGO, show_intc_name, NULL); | |||
387 | static int intc_suspend(struct sys_device *dev, pm_message_t state) | 390 | static int intc_suspend(struct sys_device *dev, pm_message_t state) |
388 | { | 391 | { |
389 | struct intc_desc_int *d; | 392 | struct intc_desc_int *d; |
393 | struct irq_data *data; | ||
390 | struct irq_desc *desc; | 394 | struct irq_desc *desc; |
395 | struct irq_chip *chip; | ||
391 | int irq; | 396 | int irq; |
392 | 397 | ||
393 | /* get intc controller associated with this sysdev */ | 398 | /* get intc controller associated with this sysdev */ |
@@ -398,17 +403,21 @@ static int intc_suspend(struct sys_device *dev, pm_message_t state) | |||
398 | if (d->state.event != PM_EVENT_FREEZE) | 403 | if (d->state.event != PM_EVENT_FREEZE) |
399 | break; | 404 | break; |
400 | 405 | ||
401 | for_each_irq_desc(irq, desc) { | 406 | for_each_active_irq(irq) { |
407 | desc = irq_to_desc(irq); | ||
408 | data = irq_get_irq_data(irq); | ||
409 | chip = irq_data_get_irq_chip(data); | ||
410 | |||
402 | /* | 411 | /* |
403 | * This will catch the redirect and VIRQ cases | 412 | * This will catch the redirect and VIRQ cases |
404 | * due to the dummy_irq_chip being inserted. | 413 | * due to the dummy_irq_chip being inserted. |
405 | */ | 414 | */ |
406 | if (desc->chip != &d->chip) | 415 | if (chip != &d->chip) |
407 | continue; | 416 | continue; |
408 | if (desc->status & IRQ_DISABLED) | 417 | if (desc->status & IRQ_DISABLED) |
409 | desc->chip->disable(irq); | 418 | chip->irq_disable(data); |
410 | else | 419 | else |
411 | desc->chip->enable(irq); | 420 | chip->irq_enable(data); |
412 | } | 421 | } |
413 | break; | 422 | break; |
414 | case PM_EVENT_FREEZE: | 423 | case PM_EVENT_FREEZE: |
@@ -416,11 +425,15 @@ static int intc_suspend(struct sys_device *dev, pm_message_t state) | |||
416 | break; | 425 | break; |
417 | case PM_EVENT_SUSPEND: | 426 | case PM_EVENT_SUSPEND: |
418 | /* enable wakeup irqs belonging to this intc controller */ | 427 | /* enable wakeup irqs belonging to this intc controller */ |
419 | for_each_irq_desc(irq, desc) { | 428 | for_each_active_irq(irq) { |
420 | if (desc->chip != &d->chip) | 429 | desc = irq_to_desc(irq); |
430 | data = irq_get_irq_data(irq); | ||
431 | chip = irq_data_get_irq_chip(data); | ||
432 | |||
433 | if (chip != &d->chip) | ||
421 | continue; | 434 | continue; |
422 | if ((desc->status & IRQ_WAKEUP)) | 435 | if ((desc->status & IRQ_WAKEUP)) |
423 | desc->chip->enable(irq); | 436 | chip->irq_enable(data); |
424 | } | 437 | } |
425 | break; | 438 | break; |
426 | } | 439 | } |
diff --git a/drivers/sh/intc/dynamic.c b/drivers/sh/intc/dynamic.c index 6caecdffe201..4187cce20ffd 100644 --- a/drivers/sh/intc/dynamic.c +++ b/drivers/sh/intc/dynamic.c | |||
@@ -17,7 +17,7 @@ | |||
17 | #include "internals.h" /* only for activate_irq() damage.. */ | 17 | #include "internals.h" /* only for activate_irq() damage.. */ |
18 | 18 | ||
19 | /* | 19 | /* |
20 | * The intc_irq_map provides a global map of bound IRQ vectors for a | 20 | * The IRQ bitmap provides a global map of bound IRQ vectors for a |
21 | * given platform. Allocation of IRQs are either static through the CPU | 21 | * given platform. Allocation of IRQs are either static through the CPU |
22 | * vector map, or dynamic in the case of board mux vectors or MSI. | 22 | * vector map, or dynamic in the case of board mux vectors or MSI. |
23 | * | 23 | * |
@@ -27,109 +27,38 @@ | |||
27 | * when dynamically creating IRQs, as well as tying in to otherwise | 27 | * when dynamically creating IRQs, as well as tying in to otherwise |
28 | * unused irq_desc positions in the sparse array. | 28 | * unused irq_desc positions in the sparse array. |
29 | */ | 29 | */ |
30 | static DECLARE_BITMAP(intc_irq_map, NR_IRQS); | ||
31 | static DEFINE_RAW_SPINLOCK(vector_lock); | ||
32 | 30 | ||
33 | /* | 31 | /* |
34 | * Dynamic IRQ allocation and deallocation | 32 | * Dynamic IRQ allocation and deallocation |
35 | */ | 33 | */ |
36 | unsigned int create_irq_nr(unsigned int irq_want, int node) | 34 | unsigned int create_irq_nr(unsigned int irq_want, int node) |
37 | { | 35 | { |
38 | unsigned int irq = 0, new; | 36 | int irq = irq_alloc_desc_at(irq_want, node); |
39 | unsigned long flags; | 37 | if (irq < 0) |
40 | struct irq_desc *desc; | 38 | return 0; |
41 | |||
42 | raw_spin_lock_irqsave(&vector_lock, flags); | ||
43 | |||
44 | /* | ||
45 | * First try the wanted IRQ | ||
46 | */ | ||
47 | if (test_and_set_bit(irq_want, intc_irq_map) == 0) { | ||
48 | new = irq_want; | ||
49 | } else { | ||
50 | /* .. then fall back to scanning. */ | ||
51 | new = find_first_zero_bit(intc_irq_map, nr_irqs); | ||
52 | if (unlikely(new == nr_irqs)) | ||
53 | goto out_unlock; | ||
54 | |||
55 | __set_bit(new, intc_irq_map); | ||
56 | } | ||
57 | |||
58 | desc = irq_to_desc_alloc_node(new, node); | ||
59 | if (unlikely(!desc)) { | ||
60 | pr_err("can't get irq_desc for %d\n", new); | ||
61 | goto out_unlock; | ||
62 | } | ||
63 | |||
64 | desc = move_irq_desc(desc, node); | ||
65 | irq = new; | ||
66 | |||
67 | out_unlock: | ||
68 | raw_spin_unlock_irqrestore(&vector_lock, flags); | ||
69 | |||
70 | if (irq > 0) { | ||
71 | dynamic_irq_init(irq); | ||
72 | activate_irq(irq); | ||
73 | } | ||
74 | 39 | ||
40 | activate_irq(irq); | ||
75 | return irq; | 41 | return irq; |
76 | } | 42 | } |
77 | 43 | ||
78 | int create_irq(void) | 44 | int create_irq(void) |
79 | { | 45 | { |
80 | int nid = cpu_to_node(smp_processor_id()); | 46 | int irq = irq_alloc_desc(numa_node_id()); |
81 | int irq; | 47 | if (irq >= 0) |
82 | 48 | activate_irq(irq); | |
83 | irq = create_irq_nr(NR_IRQS_LEGACY, nid); | ||
84 | if (irq == 0) | ||
85 | irq = -1; | ||
86 | 49 | ||
87 | return irq; | 50 | return irq; |
88 | } | 51 | } |
89 | 52 | ||
90 | void destroy_irq(unsigned int irq) | 53 | void destroy_irq(unsigned int irq) |
91 | { | 54 | { |
92 | unsigned long flags; | 55 | irq_free_desc(irq); |
93 | |||
94 | dynamic_irq_cleanup(irq); | ||
95 | |||
96 | raw_spin_lock_irqsave(&vector_lock, flags); | ||
97 | __clear_bit(irq, intc_irq_map); | ||
98 | raw_spin_unlock_irqrestore(&vector_lock, flags); | ||
99 | } | ||
100 | |||
101 | int reserve_irq_vector(unsigned int irq) | ||
102 | { | ||
103 | unsigned long flags; | ||
104 | int ret = 0; | ||
105 | |||
106 | raw_spin_lock_irqsave(&vector_lock, flags); | ||
107 | if (test_and_set_bit(irq, intc_irq_map)) | ||
108 | ret = -EBUSY; | ||
109 | raw_spin_unlock_irqrestore(&vector_lock, flags); | ||
110 | |||
111 | return ret; | ||
112 | } | 56 | } |
113 | 57 | ||
114 | void reserve_intc_vectors(struct intc_vect *vectors, unsigned int nr_vecs) | 58 | void reserve_intc_vectors(struct intc_vect *vectors, unsigned int nr_vecs) |
115 | { | 59 | { |
116 | unsigned long flags; | ||
117 | int i; | 60 | int i; |
118 | 61 | ||
119 | raw_spin_lock_irqsave(&vector_lock, flags); | ||
120 | for (i = 0; i < nr_vecs; i++) | 62 | for (i = 0; i < nr_vecs; i++) |
121 | __set_bit(evt2irq(vectors[i].vect), intc_irq_map); | 63 | irq_reserve_irqs(evt2irq(vectors[i].vect), 1); |
122 | raw_spin_unlock_irqrestore(&vector_lock, flags); | ||
123 | } | ||
124 | |||
125 | void reserve_irq_legacy(void) | ||
126 | { | ||
127 | unsigned long flags; | ||
128 | int i, j; | ||
129 | |||
130 | raw_spin_lock_irqsave(&vector_lock, flags); | ||
131 | j = find_first_bit(intc_irq_map, nr_irqs); | ||
132 | for (i = 0; i < j; i++) | ||
133 | __set_bit(i, intc_irq_map); | ||
134 | raw_spin_unlock_irqrestore(&vector_lock, flags); | ||
135 | } | 64 | } |
diff --git a/drivers/sh/intc/internals.h b/drivers/sh/intc/internals.h index d49482c623fa..0cf8260971d4 100644 --- a/drivers/sh/intc/internals.h +++ b/drivers/sh/intc/internals.h | |||
@@ -152,7 +152,7 @@ intc_set_dist_handle(unsigned int irq, struct intc_desc *desc, | |||
152 | 152 | ||
153 | /* chip.c */ | 153 | /* chip.c */ |
154 | extern struct irq_chip intc_irq_chip; | 154 | extern struct irq_chip intc_irq_chip; |
155 | void _intc_enable(unsigned int irq, unsigned long handle); | 155 | void _intc_enable(struct irq_data *data, unsigned long handle); |
156 | 156 | ||
157 | /* core.c */ | 157 | /* core.c */ |
158 | extern struct list_head intc_list; | 158 | extern struct list_head intc_list; |
diff --git a/drivers/sh/intc/virq.c b/drivers/sh/intc/virq.c index 643dfd4d2057..e5bf5d3c698e 100644 --- a/drivers/sh/intc/virq.c +++ b/drivers/sh/intc/virq.c | |||
@@ -83,11 +83,11 @@ EXPORT_SYMBOL_GPL(intc_irq_lookup); | |||
83 | static int add_virq_to_pirq(unsigned int irq, unsigned int virq) | 83 | static int add_virq_to_pirq(unsigned int irq, unsigned int virq) |
84 | { | 84 | { |
85 | struct intc_virq_list **last, *entry; | 85 | struct intc_virq_list **last, *entry; |
86 | struct irq_desc *desc = irq_to_desc(irq); | 86 | struct irq_data *data = irq_get_irq_data(irq); |
87 | 87 | ||
88 | /* scan for duplicates */ | 88 | /* scan for duplicates */ |
89 | last = (struct intc_virq_list **)&desc->handler_data; | 89 | last = (struct intc_virq_list **)&data->handler_data; |
90 | for_each_virq(entry, desc->handler_data) { | 90 | for_each_virq(entry, data->handler_data) { |
91 | if (entry->irq == virq) | 91 | if (entry->irq == virq) |
92 | return 0; | 92 | return 0; |
93 | last = &entry->next; | 93 | last = &entry->next; |
@@ -108,10 +108,12 @@ static int add_virq_to_pirq(unsigned int irq, unsigned int virq) | |||
108 | 108 | ||
109 | static void intc_virq_handler(unsigned int irq, struct irq_desc *desc) | 109 | static void intc_virq_handler(unsigned int irq, struct irq_desc *desc) |
110 | { | 110 | { |
111 | struct intc_virq_list *entry, *vlist = get_irq_data(irq); | 111 | struct irq_data *data = irq_get_irq_data(irq); |
112 | struct irq_chip *chip = irq_data_get_irq_chip(data); | ||
113 | struct intc_virq_list *entry, *vlist = irq_data_get_irq_data(data); | ||
112 | struct intc_desc_int *d = get_intc_desc(irq); | 114 | struct intc_desc_int *d = get_intc_desc(irq); |
113 | 115 | ||
114 | desc->chip->mask_ack(irq); | 116 | chip->irq_mask_ack(data); |
115 | 117 | ||
116 | for_each_virq(entry, vlist) { | 118 | for_each_virq(entry, vlist) { |
117 | unsigned long addr, handle; | 119 | unsigned long addr, handle; |
@@ -123,7 +125,7 @@ static void intc_virq_handler(unsigned int irq, struct irq_desc *desc) | |||
123 | generic_handle_irq(entry->irq); | 125 | generic_handle_irq(entry->irq); |
124 | } | 126 | } |
125 | 127 | ||
126 | desc->chip->unmask(irq); | 128 | chip->irq_unmask(data); |
127 | } | 129 | } |
128 | 130 | ||
129 | static unsigned long __init intc_subgroup_data(struct intc_subgroup *subgroup, | 131 | static unsigned long __init intc_subgroup_data(struct intc_subgroup *subgroup, |
diff --git a/drivers/sh/maple/maple.c b/drivers/sh/maple/maple.c index 4e8f57d4131f..1e20604257af 100644 --- a/drivers/sh/maple/maple.c +++ b/drivers/sh/maple/maple.c | |||
@@ -94,9 +94,9 @@ EXPORT_SYMBOL_GPL(maple_driver_unregister); | |||
94 | /* set hardware registers to enable next round of dma */ | 94 | /* set hardware registers to enable next round of dma */ |
95 | static void maple_dma_reset(void) | 95 | static void maple_dma_reset(void) |
96 | { | 96 | { |
97 | ctrl_outl(MAPLE_MAGIC, MAPLE_RESET); | 97 | __raw_writel(MAPLE_MAGIC, MAPLE_RESET); |
98 | /* set trig type to 0 for software trigger, 1 for hardware (VBLANK) */ | 98 | /* set trig type to 0 for software trigger, 1 for hardware (VBLANK) */ |
99 | ctrl_outl(1, MAPLE_TRIGTYPE); | 99 | __raw_writel(1, MAPLE_TRIGTYPE); |
100 | /* | 100 | /* |
101 | * Maple system register | 101 | * Maple system register |
102 | * bits 31 - 16 timeout in units of 20nsec | 102 | * bits 31 - 16 timeout in units of 20nsec |
@@ -105,9 +105,9 @@ static void maple_dma_reset(void) | |||
105 | * bits 3 - 0 delay (in 1.3ms) between VBLANK and start of DMA | 105 | * bits 3 - 0 delay (in 1.3ms) between VBLANK and start of DMA |
106 | * max delay is 11 | 106 | * max delay is 11 |
107 | */ | 107 | */ |
108 | ctrl_outl(MAPLE_2MBPS | MAPLE_TIMEOUT(0xFFFF), MAPLE_SPEED); | 108 | __raw_writel(MAPLE_2MBPS | MAPLE_TIMEOUT(0xFFFF), MAPLE_SPEED); |
109 | ctrl_outl(virt_to_phys(maple_sendbuf), MAPLE_DMAADDR); | 109 | __raw_writel(virt_to_phys(maple_sendbuf), MAPLE_DMAADDR); |
110 | ctrl_outl(1, MAPLE_ENABLE); | 110 | __raw_writel(1, MAPLE_ENABLE); |
111 | } | 111 | } |
112 | 112 | ||
113 | /** | 113 | /** |
@@ -130,7 +130,7 @@ EXPORT_SYMBOL_GPL(maple_getcond_callback); | |||
130 | 130 | ||
131 | static int maple_dma_done(void) | 131 | static int maple_dma_done(void) |
132 | { | 132 | { |
133 | return (ctrl_inl(MAPLE_STATE) & 1) == 0; | 133 | return (__raw_readl(MAPLE_STATE) & 1) == 0; |
134 | } | 134 | } |
135 | 135 | ||
136 | static void maple_release_device(struct device *dev) | 136 | static void maple_release_device(struct device *dev) |
@@ -275,7 +275,7 @@ static void maple_send(void) | |||
275 | return; | 275 | return; |
276 | 276 | ||
277 | /* disable DMA */ | 277 | /* disable DMA */ |
278 | ctrl_outl(0, MAPLE_ENABLE); | 278 | __raw_writel(0, MAPLE_ENABLE); |
279 | 279 | ||
280 | if (!list_empty(&maple_sentq)) | 280 | if (!list_empty(&maple_sentq)) |
281 | goto finish; | 281 | goto finish; |
@@ -450,7 +450,7 @@ static void maple_vblank_handler(struct work_struct *work) | |||
450 | if (!maple_dma_done()) | 450 | if (!maple_dma_done()) |
451 | return; | 451 | return; |
452 | 452 | ||
453 | ctrl_outl(0, MAPLE_ENABLE); | 453 | __raw_writel(0, MAPLE_ENABLE); |
454 | 454 | ||
455 | if (!list_empty(&maple_sentq)) | 455 | if (!list_empty(&maple_sentq)) |
456 | goto finish; | 456 | goto finish; |
@@ -636,7 +636,7 @@ static void maple_dma_handler(struct work_struct *work) | |||
636 | 636 | ||
637 | if (!maple_dma_done()) | 637 | if (!maple_dma_done()) |
638 | return; | 638 | return; |
639 | ctrl_outl(0, MAPLE_ENABLE); | 639 | __raw_writel(0, MAPLE_ENABLE); |
640 | if (!list_empty(&maple_sentq)) { | 640 | if (!list_empty(&maple_sentq)) { |
641 | list_for_each_entry_safe(mq, nmq, &maple_sentq, list) { | 641 | list_for_each_entry_safe(mq, nmq, &maple_sentq, list) { |
642 | mdev = mq->dev; | 642 | mdev = mq->dev; |
@@ -796,7 +796,7 @@ static int __init maple_bus_init(void) | |||
796 | int retval, i; | 796 | int retval, i; |
797 | struct maple_device *mdev[MAPLE_PORTS]; | 797 | struct maple_device *mdev[MAPLE_PORTS]; |
798 | 798 | ||
799 | ctrl_outl(0, MAPLE_ENABLE); | 799 | __raw_writel(0, MAPLE_ENABLE); |
800 | 800 | ||
801 | retval = device_register(&maple_bus); | 801 | retval = device_register(&maple_bus); |
802 | if (retval) | 802 | if (retval) |