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authorPaul Fulghum <paulkf@microgate.com>2006-01-11 15:17:39 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-11 21:42:11 -0500
commit0c8365ecc57f87e4d982c3fe59a4c1b985484e7f (patch)
tree4249e263421e2b428a4c099e933ac26f87329687 /drivers
parentd251575ab60ca2b5337574bfaf8f8b583f18059e (diff)
[PATCH] synclink_gt remove unnecessary page alignment
Remove unnecessary and incorrectly implemented page alignment of register base address before calling ioremap() Signed-off-by: Paul Fulghum <paulkf@microgate.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/char/synclink_gt.c16
1 files changed, 4 insertions, 12 deletions
diff --git a/drivers/char/synclink_gt.c b/drivers/char/synclink_gt.c
index 79c81def4104..07c9be6a6bbf 100644
--- a/drivers/char/synclink_gt.c
+++ b/drivers/char/synclink_gt.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * $Id: synclink_gt.c,v 4.20 2005/11/08 19:51:55 paulkf Exp $ 2 * $Id: synclink_gt.c,v 4.22 2006/01/09 20:16:06 paulkf Exp $
3 * 3 *
4 * Device driver for Microgate SyncLink GT serial adapters. 4 * Device driver for Microgate SyncLink GT serial adapters.
5 * 5 *
@@ -92,7 +92,7 @@
92 * module identification 92 * module identification
93 */ 93 */
94static char *driver_name = "SyncLink GT"; 94static char *driver_name = "SyncLink GT";
95static char *driver_version = "$Revision: 4.20 $"; 95static char *driver_version = "$Revision: 4.22 $";
96static char *tty_driver_name = "synclink_gt"; 96static char *tty_driver_name = "synclink_gt";
97static char *tty_dev_prefix = "ttySLG"; 97static char *tty_dev_prefix = "ttySLG";
98MODULE_LICENSE("GPL"); 98MODULE_LICENSE("GPL");
@@ -288,7 +288,6 @@ struct slgt_info {
288 288
289 unsigned char __iomem * reg_addr; /* memory mapped registers address */ 289 unsigned char __iomem * reg_addr; /* memory mapped registers address */
290 u32 phys_reg_addr; 290 u32 phys_reg_addr;
291 u32 reg_offset;
292 int reg_addr_requested; 291 int reg_addr_requested;
293 292
294 MGSL_PARAMS params; /* communications parameters */ 293 MGSL_PARAMS params; /* communications parameters */
@@ -2976,14 +2975,13 @@ static int claim_resources(struct slgt_info *info)
2976 else 2975 else
2977 info->reg_addr_requested = 1; 2976 info->reg_addr_requested = 1;
2978 2977
2979 info->reg_addr = ioremap(info->phys_reg_addr, PAGE_SIZE); 2978 info->reg_addr = ioremap(info->phys_reg_addr, SLGT_REG_SIZE);
2980 if (!info->reg_addr) { 2979 if (!info->reg_addr) {
2981 DBGERR(("%s cant map device registers, addr=%08X\n", 2980 DBGERR(("%s cant map device registers, addr=%08X\n",
2982 info->device_name, info->phys_reg_addr)); 2981 info->device_name, info->phys_reg_addr));
2983 info->init_error = DiagStatus_CantAssignPciResources; 2982 info->init_error = DiagStatus_CantAssignPciResources;
2984 goto errout; 2983 goto errout;
2985 } 2984 }
2986 info->reg_addr += info->reg_offset;
2987 return 0; 2985 return 0;
2988 2986
2989errout: 2987errout:
@@ -3004,7 +3002,7 @@ static void release_resources(struct slgt_info *info)
3004 } 3002 }
3005 3003
3006 if (info->reg_addr) { 3004 if (info->reg_addr) {
3007 iounmap(info->reg_addr - info->reg_offset); 3005 iounmap(info->reg_addr);
3008 info->reg_addr = NULL; 3006 info->reg_addr = NULL;
3009 } 3007 }
3010} 3008}
@@ -3108,12 +3106,6 @@ static struct slgt_info *alloc_dev(int adapter_num, int port_num, struct pci_dev
3108 info->irq_level = pdev->irq; 3106 info->irq_level = pdev->irq;
3109 info->phys_reg_addr = pci_resource_start(pdev,0); 3107 info->phys_reg_addr = pci_resource_start(pdev,0);
3110 3108
3111 /* veremap works on page boundaries
3112 * map full page starting at the page boundary
3113 */
3114 info->reg_offset = info->phys_reg_addr & (PAGE_SIZE-1);
3115 info->phys_reg_addr &= ~(PAGE_SIZE-1);
3116
3117 info->bus_type = MGSL_BUS_TYPE_PCI; 3109 info->bus_type = MGSL_BUS_TYPE_PCI;
3118 info->irq_flags = SA_SHIRQ; 3110 info->irq_flags = SA_SHIRQ;
3119 3111