diff options
author | David S. Miller <davem@davemloft.net> | 2008-11-07 01:43:03 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-11-07 01:43:03 -0500 |
commit | 9eeda9abd1faf489f3df9a1f557975f4c8650363 (patch) | |
tree | 3e0a58e25b776cfbee193195460324dccb1886c7 /drivers | |
parent | 61c9eaf90081cbe6dc4f389e0056bff76eca19ec (diff) | |
parent | 4bab0ea1d42dd1927af9df6fbf0003fc00617c50 (diff) |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
drivers/net/wireless/ath5k/base.c
net/8021q/vlan_core.c
Diffstat (limited to 'drivers')
119 files changed, 2047 insertions, 1470 deletions
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index 52dc2d8b8f22..8e37be19bbf5 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c | |||
@@ -738,7 +738,6 @@ static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev) | |||
738 | * do_pata_set_dmamode - Initialize host controller PATA PIO timings | 738 | * do_pata_set_dmamode - Initialize host controller PATA PIO timings |
739 | * @ap: Port whose timings we are configuring | 739 | * @ap: Port whose timings we are configuring |
740 | * @adev: Drive in question | 740 | * @adev: Drive in question |
741 | * @udma: udma mode, 0 - 6 | ||
742 | * @isich: set if the chip is an ICH device | 741 | * @isich: set if the chip is an ICH device |
743 | * | 742 | * |
744 | * Set UDMA mode for device, in host controller PCI config space. | 743 | * Set UDMA mode for device, in host controller PCI config space. |
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index 2ff633c119e2..622350d9b2e3 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c | |||
@@ -1268,7 +1268,7 @@ u64 ata_tf_to_lba48(const struct ata_taskfile *tf) | |||
1268 | 1268 | ||
1269 | sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40; | 1269 | sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40; |
1270 | sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32; | 1270 | sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32; |
1271 | sectors |= (tf->hob_lbal & 0xff) << 24; | 1271 | sectors |= ((u64)(tf->hob_lbal & 0xff)) << 24; |
1272 | sectors |= (tf->lbah & 0xff) << 16; | 1272 | sectors |= (tf->lbah & 0xff) << 16; |
1273 | sectors |= (tf->lbam & 0xff) << 8; | 1273 | sectors |= (tf->lbam & 0xff) << 8; |
1274 | sectors |= (tf->lbal & 0xff); | 1274 | sectors |= (tf->lbal & 0xff); |
@@ -1602,7 +1602,6 @@ unsigned long ata_id_xfermask(const u16 *id) | |||
1602 | /** | 1602 | /** |
1603 | * ata_pio_queue_task - Queue port_task | 1603 | * ata_pio_queue_task - Queue port_task |
1604 | * @ap: The ata_port to queue port_task for | 1604 | * @ap: The ata_port to queue port_task for |
1605 | * @fn: workqueue function to be scheduled | ||
1606 | * @data: data for @fn to use | 1605 | * @data: data for @fn to use |
1607 | * @delay: delay time in msecs for workqueue function | 1606 | * @delay: delay time in msecs for workqueue function |
1608 | * | 1607 | * |
@@ -2159,6 +2158,10 @@ retry: | |||
2159 | static inline u8 ata_dev_knobble(struct ata_device *dev) | 2158 | static inline u8 ata_dev_knobble(struct ata_device *dev) |
2160 | { | 2159 | { |
2161 | struct ata_port *ap = dev->link->ap; | 2160 | struct ata_port *ap = dev->link->ap; |
2161 | |||
2162 | if (ata_dev_blacklisted(dev) & ATA_HORKAGE_BRIDGE_OK) | ||
2163 | return 0; | ||
2164 | |||
2162 | return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); | 2165 | return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); |
2163 | } | 2166 | } |
2164 | 2167 | ||
@@ -4021,6 +4024,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { | |||
4021 | 4024 | ||
4022 | /* Weird ATAPI devices */ | 4025 | /* Weird ATAPI devices */ |
4023 | { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 }, | 4026 | { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 }, |
4027 | { "QUANTUM DAT DAT72-000", NULL, ATA_HORKAGE_ATAPI_MOD16_DMA }, | ||
4024 | 4028 | ||
4025 | /* Devices we expect to fail diagnostics */ | 4029 | /* Devices we expect to fail diagnostics */ |
4026 | 4030 | ||
@@ -4063,6 +4067,9 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { | |||
4063 | { "TSSTcorp CDDVDW SH-S202N", "SB00", ATA_HORKAGE_IVB, }, | 4067 | { "TSSTcorp CDDVDW SH-S202N", "SB00", ATA_HORKAGE_IVB, }, |
4064 | { "TSSTcorp CDDVDW SH-S202N", "SB01", ATA_HORKAGE_IVB, }, | 4068 | { "TSSTcorp CDDVDW SH-S202N", "SB01", ATA_HORKAGE_IVB, }, |
4065 | 4069 | ||
4070 | /* Devices that do not need bridging limits applied */ | ||
4071 | { "MTRON MSP-SATA*", NULL, ATA_HORKAGE_BRIDGE_OK, }, | ||
4072 | |||
4066 | /* End Marker */ | 4073 | /* End Marker */ |
4067 | { } | 4074 | { } |
4068 | }; | 4075 | }; |
@@ -4438,7 +4445,8 @@ int atapi_check_dma(struct ata_queued_cmd *qc) | |||
4438 | /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a | 4445 | /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a |
4439 | * few ATAPI devices choke on such DMA requests. | 4446 | * few ATAPI devices choke on such DMA requests. |
4440 | */ | 4447 | */ |
4441 | if (unlikely(qc->nbytes & 15)) | 4448 | if (!(qc->dev->horkage & ATA_HORKAGE_ATAPI_MOD16_DMA) && |
4449 | unlikely(qc->nbytes & 15)) | ||
4442 | return 1; | 4450 | return 1; |
4443 | 4451 | ||
4444 | if (ap->ops->check_atapi_dma) | 4452 | if (ap->ops->check_atapi_dma) |
@@ -4648,7 +4656,6 @@ static void ata_verify_xfer(struct ata_queued_cmd *qc) | |||
4648 | /** | 4656 | /** |
4649 | * ata_qc_complete - Complete an active ATA command | 4657 | * ata_qc_complete - Complete an active ATA command |
4650 | * @qc: Command to complete | 4658 | * @qc: Command to complete |
4651 | * @err_mask: ATA Status register contents | ||
4652 | * | 4659 | * |
4653 | * Indicate to the mid and upper layers that an ATA | 4660 | * Indicate to the mid and upper layers that an ATA |
4654 | * command has completed, with either an ok or not-ok status. | 4661 | * command has completed, with either an ok or not-ok status. |
@@ -5929,7 +5936,7 @@ static void ata_port_detach(struct ata_port *ap) | |||
5929 | * to us. Restore SControl and disable all existing devices. | 5936 | * to us. Restore SControl and disable all existing devices. |
5930 | */ | 5937 | */ |
5931 | __ata_port_for_each_link(link, ap) { | 5938 | __ata_port_for_each_link(link, ap) { |
5932 | sata_scr_write(link, SCR_CONTROL, link->saved_scontrol); | 5939 | sata_scr_write(link, SCR_CONTROL, link->saved_scontrol & 0xff0); |
5933 | ata_link_for_each_dev(dev, link) | 5940 | ata_link_for_each_dev(dev, link) |
5934 | ata_dev_disable(dev); | 5941 | ata_dev_disable(dev); |
5935 | } | 5942 | } |
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c index bbb30d882f05..3fa75eac135d 100644 --- a/drivers/ata/libata-scsi.c +++ b/drivers/ata/libata-scsi.c | |||
@@ -190,7 +190,7 @@ static ssize_t ata_scsi_park_show(struct device *device, | |||
190 | struct ata_port *ap; | 190 | struct ata_port *ap; |
191 | struct ata_link *link; | 191 | struct ata_link *link; |
192 | struct ata_device *dev; | 192 | struct ata_device *dev; |
193 | unsigned long flags; | 193 | unsigned long flags, now; |
194 | unsigned int uninitialized_var(msecs); | 194 | unsigned int uninitialized_var(msecs); |
195 | int rc = 0; | 195 | int rc = 0; |
196 | 196 | ||
@@ -208,10 +208,11 @@ static ssize_t ata_scsi_park_show(struct device *device, | |||
208 | } | 208 | } |
209 | 209 | ||
210 | link = dev->link; | 210 | link = dev->link; |
211 | now = jiffies; | ||
211 | if (ap->pflags & ATA_PFLAG_EH_IN_PROGRESS && | 212 | if (ap->pflags & ATA_PFLAG_EH_IN_PROGRESS && |
212 | link->eh_context.unloaded_mask & (1 << dev->devno) && | 213 | link->eh_context.unloaded_mask & (1 << dev->devno) && |
213 | time_after(dev->unpark_deadline, jiffies)) | 214 | time_after(dev->unpark_deadline, now)) |
214 | msecs = jiffies_to_msecs(dev->unpark_deadline - jiffies); | 215 | msecs = jiffies_to_msecs(dev->unpark_deadline - now); |
215 | else | 216 | else |
216 | msecs = 0; | 217 | msecs = 0; |
217 | 218 | ||
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c index fae3841de0d8..6f1460614325 100644 --- a/drivers/ata/sata_nv.c +++ b/drivers/ata/sata_nv.c | |||
@@ -307,10 +307,10 @@ static int nv_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); | |||
307 | 307 | ||
308 | static void nv_nf2_freeze(struct ata_port *ap); | 308 | static void nv_nf2_freeze(struct ata_port *ap); |
309 | static void nv_nf2_thaw(struct ata_port *ap); | 309 | static void nv_nf2_thaw(struct ata_port *ap); |
310 | static int nv_nf2_hardreset(struct ata_link *link, unsigned int *class, | ||
311 | unsigned long deadline); | ||
310 | static void nv_ck804_freeze(struct ata_port *ap); | 312 | static void nv_ck804_freeze(struct ata_port *ap); |
311 | static void nv_ck804_thaw(struct ata_port *ap); | 313 | static void nv_ck804_thaw(struct ata_port *ap); |
312 | static int nv_hardreset(struct ata_link *link, unsigned int *class, | ||
313 | unsigned long deadline); | ||
314 | static int nv_adma_slave_config(struct scsi_device *sdev); | 314 | static int nv_adma_slave_config(struct scsi_device *sdev); |
315 | static int nv_adma_check_atapi_dma(struct ata_queued_cmd *qc); | 315 | static int nv_adma_check_atapi_dma(struct ata_queued_cmd *qc); |
316 | static void nv_adma_qc_prep(struct ata_queued_cmd *qc); | 316 | static void nv_adma_qc_prep(struct ata_queued_cmd *qc); |
@@ -405,17 +405,8 @@ static struct scsi_host_template nv_swncq_sht = { | |||
405 | .slave_configure = nv_swncq_slave_config, | 405 | .slave_configure = nv_swncq_slave_config, |
406 | }; | 406 | }; |
407 | 407 | ||
408 | /* OSDL bz3352 reports that some nv controllers can't determine device | ||
409 | * signature reliably and nv_hardreset is implemented to work around | ||
410 | * the problem. This was reported on nf3 and it's unclear whether any | ||
411 | * other controllers are affected. However, the workaround has been | ||
412 | * applied to all variants and there isn't much to gain by trying to | ||
413 | * find out exactly which ones are affected at this point especially | ||
414 | * because NV has moved over to ahci for newer controllers. | ||
415 | */ | ||
416 | static struct ata_port_operations nv_common_ops = { | 408 | static struct ata_port_operations nv_common_ops = { |
417 | .inherits = &ata_bmdma_port_ops, | 409 | .inherits = &ata_bmdma_port_ops, |
418 | .hardreset = nv_hardreset, | ||
419 | .scr_read = nv_scr_read, | 410 | .scr_read = nv_scr_read, |
420 | .scr_write = nv_scr_write, | 411 | .scr_write = nv_scr_write, |
421 | }; | 412 | }; |
@@ -429,12 +420,22 @@ static struct ata_port_operations nv_generic_ops = { | |||
429 | .hardreset = ATA_OP_NULL, | 420 | .hardreset = ATA_OP_NULL, |
430 | }; | 421 | }; |
431 | 422 | ||
423 | /* OSDL bz3352 reports that nf2/3 controllers can't determine device | ||
424 | * signature reliably. Also, the following thread reports detection | ||
425 | * failure on cold boot with the standard debouncing timing. | ||
426 | * | ||
427 | * http://thread.gmane.org/gmane.linux.ide/34098 | ||
428 | * | ||
429 | * Debounce with hotplug timing and request follow-up SRST. | ||
430 | */ | ||
432 | static struct ata_port_operations nv_nf2_ops = { | 431 | static struct ata_port_operations nv_nf2_ops = { |
433 | .inherits = &nv_common_ops, | 432 | .inherits = &nv_common_ops, |
434 | .freeze = nv_nf2_freeze, | 433 | .freeze = nv_nf2_freeze, |
435 | .thaw = nv_nf2_thaw, | 434 | .thaw = nv_nf2_thaw, |
435 | .hardreset = nv_nf2_hardreset, | ||
436 | }; | 436 | }; |
437 | 437 | ||
438 | /* CK804 finally gets hardreset right */ | ||
438 | static struct ata_port_operations nv_ck804_ops = { | 439 | static struct ata_port_operations nv_ck804_ops = { |
439 | .inherits = &nv_common_ops, | 440 | .inherits = &nv_common_ops, |
440 | .freeze = nv_ck804_freeze, | 441 | .freeze = nv_ck804_freeze, |
@@ -443,7 +444,7 @@ static struct ata_port_operations nv_ck804_ops = { | |||
443 | }; | 444 | }; |
444 | 445 | ||
445 | static struct ata_port_operations nv_adma_ops = { | 446 | static struct ata_port_operations nv_adma_ops = { |
446 | .inherits = &nv_common_ops, | 447 | .inherits = &nv_ck804_ops, |
447 | 448 | ||
448 | .check_atapi_dma = nv_adma_check_atapi_dma, | 449 | .check_atapi_dma = nv_adma_check_atapi_dma, |
449 | .sff_tf_read = nv_adma_tf_read, | 450 | .sff_tf_read = nv_adma_tf_read, |
@@ -467,7 +468,7 @@ static struct ata_port_operations nv_adma_ops = { | |||
467 | }; | 468 | }; |
468 | 469 | ||
469 | static struct ata_port_operations nv_swncq_ops = { | 470 | static struct ata_port_operations nv_swncq_ops = { |
470 | .inherits = &nv_common_ops, | 471 | .inherits = &nv_generic_ops, |
471 | 472 | ||
472 | .qc_defer = ata_std_qc_defer, | 473 | .qc_defer = ata_std_qc_defer, |
473 | .qc_prep = nv_swncq_qc_prep, | 474 | .qc_prep = nv_swncq_qc_prep, |
@@ -1553,6 +1554,17 @@ static void nv_nf2_thaw(struct ata_port *ap) | |||
1553 | iowrite8(mask, scr_addr + NV_INT_ENABLE); | 1554 | iowrite8(mask, scr_addr + NV_INT_ENABLE); |
1554 | } | 1555 | } |
1555 | 1556 | ||
1557 | static int nv_nf2_hardreset(struct ata_link *link, unsigned int *class, | ||
1558 | unsigned long deadline) | ||
1559 | { | ||
1560 | bool online; | ||
1561 | int rc; | ||
1562 | |||
1563 | rc = sata_link_hardreset(link, sata_deb_timing_hotplug, deadline, | ||
1564 | &online, NULL); | ||
1565 | return online ? -EAGAIN : rc; | ||
1566 | } | ||
1567 | |||
1556 | static void nv_ck804_freeze(struct ata_port *ap) | 1568 | static void nv_ck804_freeze(struct ata_port *ap) |
1557 | { | 1569 | { |
1558 | void __iomem *mmio_base = ap->host->iomap[NV_MMIO_BAR]; | 1570 | void __iomem *mmio_base = ap->host->iomap[NV_MMIO_BAR]; |
@@ -1605,21 +1617,6 @@ static void nv_mcp55_thaw(struct ata_port *ap) | |||
1605 | ata_sff_thaw(ap); | 1617 | ata_sff_thaw(ap); |
1606 | } | 1618 | } |
1607 | 1619 | ||
1608 | static int nv_hardreset(struct ata_link *link, unsigned int *class, | ||
1609 | unsigned long deadline) | ||
1610 | { | ||
1611 | int rc; | ||
1612 | |||
1613 | /* SATA hardreset fails to retrieve proper device signature on | ||
1614 | * some controllers. Request follow up SRST. For more info, | ||
1615 | * see http://bugzilla.kernel.org/show_bug.cgi?id=3352 | ||
1616 | */ | ||
1617 | rc = sata_sff_hardreset(link, class, deadline); | ||
1618 | if (rc) | ||
1619 | return rc; | ||
1620 | return -EAGAIN; | ||
1621 | } | ||
1622 | |||
1623 | static void nv_adma_error_handler(struct ata_port *ap) | 1620 | static void nv_adma_error_handler(struct ata_port *ap) |
1624 | { | 1621 | { |
1625 | struct nv_adma_port_priv *pp = ap->private_data; | 1622 | struct nv_adma_port_priv *pp = ap->private_data; |
diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c index 750d8cdc00cd..ba9a2570a742 100644 --- a/drivers/ata/sata_promise.c +++ b/drivers/ata/sata_promise.c | |||
@@ -153,6 +153,10 @@ static void pdc_freeze(struct ata_port *ap); | |||
153 | static void pdc_sata_freeze(struct ata_port *ap); | 153 | static void pdc_sata_freeze(struct ata_port *ap); |
154 | static void pdc_thaw(struct ata_port *ap); | 154 | static void pdc_thaw(struct ata_port *ap); |
155 | static void pdc_sata_thaw(struct ata_port *ap); | 155 | static void pdc_sata_thaw(struct ata_port *ap); |
156 | static int pdc_pata_softreset(struct ata_link *link, unsigned int *class, | ||
157 | unsigned long deadline); | ||
158 | static int pdc_sata_hardreset(struct ata_link *link, unsigned int *class, | ||
159 | unsigned long deadline); | ||
156 | static void pdc_error_handler(struct ata_port *ap); | 160 | static void pdc_error_handler(struct ata_port *ap); |
157 | static void pdc_post_internal_cmd(struct ata_queued_cmd *qc); | 161 | static void pdc_post_internal_cmd(struct ata_queued_cmd *qc); |
158 | static int pdc_pata_cable_detect(struct ata_port *ap); | 162 | static int pdc_pata_cable_detect(struct ata_port *ap); |
@@ -186,6 +190,7 @@ static struct ata_port_operations pdc_sata_ops = { | |||
186 | .scr_read = pdc_sata_scr_read, | 190 | .scr_read = pdc_sata_scr_read, |
187 | .scr_write = pdc_sata_scr_write, | 191 | .scr_write = pdc_sata_scr_write, |
188 | .port_start = pdc_sata_port_start, | 192 | .port_start = pdc_sata_port_start, |
193 | .hardreset = pdc_sata_hardreset, | ||
189 | }; | 194 | }; |
190 | 195 | ||
191 | /* First-generation chips need a more restrictive ->check_atapi_dma op */ | 196 | /* First-generation chips need a more restrictive ->check_atapi_dma op */ |
@@ -200,6 +205,7 @@ static struct ata_port_operations pdc_pata_ops = { | |||
200 | .freeze = pdc_freeze, | 205 | .freeze = pdc_freeze, |
201 | .thaw = pdc_thaw, | 206 | .thaw = pdc_thaw, |
202 | .port_start = pdc_common_port_start, | 207 | .port_start = pdc_common_port_start, |
208 | .softreset = pdc_pata_softreset, | ||
203 | }; | 209 | }; |
204 | 210 | ||
205 | static const struct ata_port_info pdc_port_info[] = { | 211 | static const struct ata_port_info pdc_port_info[] = { |
@@ -693,6 +699,20 @@ static void pdc_sata_thaw(struct ata_port *ap) | |||
693 | readl(host_mmio + hotplug_offset); /* flush */ | 699 | readl(host_mmio + hotplug_offset); /* flush */ |
694 | } | 700 | } |
695 | 701 | ||
702 | static int pdc_pata_softreset(struct ata_link *link, unsigned int *class, | ||
703 | unsigned long deadline) | ||
704 | { | ||
705 | pdc_reset_port(link->ap); | ||
706 | return ata_sff_softreset(link, class, deadline); | ||
707 | } | ||
708 | |||
709 | static int pdc_sata_hardreset(struct ata_link *link, unsigned int *class, | ||
710 | unsigned long deadline) | ||
711 | { | ||
712 | pdc_reset_port(link->ap); | ||
713 | return sata_sff_hardreset(link, class, deadline); | ||
714 | } | ||
715 | |||
696 | static void pdc_error_handler(struct ata_port *ap) | 716 | static void pdc_error_handler(struct ata_port *ap) |
697 | { | 717 | { |
698 | if (!(ap->pflags & ATA_PFLAG_FROZEN)) | 718 | if (!(ap->pflags & ATA_PFLAG_FROZEN)) |
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c index 5b72e734300a..c18935f0bda2 100644 --- a/drivers/ata/sata_via.c +++ b/drivers/ata/sata_via.c | |||
@@ -44,11 +44,16 @@ | |||
44 | #include <linux/libata.h> | 44 | #include <linux/libata.h> |
45 | 45 | ||
46 | #define DRV_NAME "sata_via" | 46 | #define DRV_NAME "sata_via" |
47 | #define DRV_VERSION "2.3" | 47 | #define DRV_VERSION "2.4" |
48 | 48 | ||
49 | /* | ||
50 | * vt8251 is different from other sata controllers of VIA. It has two | ||
51 | * channels, each channel has both Master and Slave slot. | ||
52 | */ | ||
49 | enum board_ids_enum { | 53 | enum board_ids_enum { |
50 | vt6420, | 54 | vt6420, |
51 | vt6421, | 55 | vt6421, |
56 | vt8251, | ||
52 | }; | 57 | }; |
53 | 58 | ||
54 | enum { | 59 | enum { |
@@ -70,6 +75,8 @@ enum { | |||
70 | static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | 75 | static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
71 | static int svia_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); | 76 | static int svia_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); |
72 | static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); | 77 | static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); |
78 | static int vt8251_scr_read(struct ata_link *link, unsigned int scr, u32 *val); | ||
79 | static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val); | ||
73 | static void svia_tf_load(struct ata_port *ap, const struct ata_taskfile *tf); | 80 | static void svia_tf_load(struct ata_port *ap, const struct ata_taskfile *tf); |
74 | static void svia_noop_freeze(struct ata_port *ap); | 81 | static void svia_noop_freeze(struct ata_port *ap); |
75 | static int vt6420_prereset(struct ata_link *link, unsigned long deadline); | 82 | static int vt6420_prereset(struct ata_link *link, unsigned long deadline); |
@@ -79,12 +86,12 @@ static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev); | |||
79 | 86 | ||
80 | static const struct pci_device_id svia_pci_tbl[] = { | 87 | static const struct pci_device_id svia_pci_tbl[] = { |
81 | { PCI_VDEVICE(VIA, 0x5337), vt6420 }, | 88 | { PCI_VDEVICE(VIA, 0x5337), vt6420 }, |
82 | { PCI_VDEVICE(VIA, 0x0591), vt6420 }, | 89 | { PCI_VDEVICE(VIA, 0x0591), vt6420 }, /* 2 sata chnls (Master) */ |
83 | { PCI_VDEVICE(VIA, 0x3149), vt6420 }, | 90 | { PCI_VDEVICE(VIA, 0x3149), vt6420 }, /* 2 sata chnls (Master) */ |
84 | { PCI_VDEVICE(VIA, 0x3249), vt6421 }, | 91 | { PCI_VDEVICE(VIA, 0x3249), vt6421 }, /* 2 sata chnls, 1 pata chnl */ |
85 | { PCI_VDEVICE(VIA, 0x5287), vt6420 }, | ||
86 | { PCI_VDEVICE(VIA, 0x5372), vt6420 }, | 92 | { PCI_VDEVICE(VIA, 0x5372), vt6420 }, |
87 | { PCI_VDEVICE(VIA, 0x7372), vt6420 }, | 93 | { PCI_VDEVICE(VIA, 0x7372), vt6420 }, |
94 | { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */ | ||
88 | 95 | ||
89 | { } /* terminate list */ | 96 | { } /* terminate list */ |
90 | }; | 97 | }; |
@@ -128,6 +135,13 @@ static struct ata_port_operations vt6421_sata_ops = { | |||
128 | .scr_write = svia_scr_write, | 135 | .scr_write = svia_scr_write, |
129 | }; | 136 | }; |
130 | 137 | ||
138 | static struct ata_port_operations vt8251_ops = { | ||
139 | .inherits = &svia_base_ops, | ||
140 | .hardreset = sata_std_hardreset, | ||
141 | .scr_read = vt8251_scr_read, | ||
142 | .scr_write = vt8251_scr_write, | ||
143 | }; | ||
144 | |||
131 | static const struct ata_port_info vt6420_port_info = { | 145 | static const struct ata_port_info vt6420_port_info = { |
132 | .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, | 146 | .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY, |
133 | .pio_mask = 0x1f, | 147 | .pio_mask = 0x1f, |
@@ -152,6 +166,15 @@ static struct ata_port_info vt6421_pport_info = { | |||
152 | .port_ops = &vt6421_pata_ops, | 166 | .port_ops = &vt6421_pata_ops, |
153 | }; | 167 | }; |
154 | 168 | ||
169 | static struct ata_port_info vt8251_port_info = { | ||
170 | .flags = ATA_FLAG_SATA | ATA_FLAG_SLAVE_POSS | | ||
171 | ATA_FLAG_NO_LEGACY, | ||
172 | .pio_mask = 0x1f, | ||
173 | .mwdma_mask = 0x07, | ||
174 | .udma_mask = ATA_UDMA6, | ||
175 | .port_ops = &vt8251_ops, | ||
176 | }; | ||
177 | |||
155 | MODULE_AUTHOR("Jeff Garzik"); | 178 | MODULE_AUTHOR("Jeff Garzik"); |
156 | MODULE_DESCRIPTION("SCSI low-level driver for VIA SATA controllers"); | 179 | MODULE_DESCRIPTION("SCSI low-level driver for VIA SATA controllers"); |
157 | MODULE_LICENSE("GPL"); | 180 | MODULE_LICENSE("GPL"); |
@@ -174,6 +197,83 @@ static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) | |||
174 | return 0; | 197 | return 0; |
175 | } | 198 | } |
176 | 199 | ||
200 | static int vt8251_scr_read(struct ata_link *link, unsigned int scr, u32 *val) | ||
201 | { | ||
202 | static const u8 ipm_tbl[] = { 1, 2, 6, 0 }; | ||
203 | struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); | ||
204 | int slot = 2 * link->ap->port_no + link->pmp; | ||
205 | u32 v = 0; | ||
206 | u8 raw; | ||
207 | |||
208 | switch (scr) { | ||
209 | case SCR_STATUS: | ||
210 | pci_read_config_byte(pdev, 0xA0 + slot, &raw); | ||
211 | |||
212 | /* read the DET field, bit0 and 1 of the config byte */ | ||
213 | v |= raw & 0x03; | ||
214 | |||
215 | /* read the SPD field, bit4 of the configure byte */ | ||
216 | if (raw & (1 << 4)) | ||
217 | v |= 0x02 << 4; | ||
218 | else | ||
219 | v |= 0x01 << 4; | ||
220 | |||
221 | /* read the IPM field, bit2 and 3 of the config byte */ | ||
222 | v |= ipm_tbl[(raw >> 2) & 0x3]; | ||
223 | break; | ||
224 | |||
225 | case SCR_ERROR: | ||
226 | /* devices other than 5287 uses 0xA8 as base */ | ||
227 | WARN_ON(pdev->device != 0x5287); | ||
228 | pci_read_config_dword(pdev, 0xB0 + slot * 4, &v); | ||
229 | break; | ||
230 | |||
231 | case SCR_CONTROL: | ||
232 | pci_read_config_byte(pdev, 0xA4 + slot, &raw); | ||
233 | |||
234 | /* read the DET field, bit0 and bit1 */ | ||
235 | v |= ((raw & 0x02) << 1) | (raw & 0x01); | ||
236 | |||
237 | /* read the IPM field, bit2 and bit3 */ | ||
238 | v |= ((raw >> 2) & 0x03) << 8; | ||
239 | break; | ||
240 | |||
241 | default: | ||
242 | return -EINVAL; | ||
243 | } | ||
244 | |||
245 | *val = v; | ||
246 | return 0; | ||
247 | } | ||
248 | |||
249 | static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val) | ||
250 | { | ||
251 | struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); | ||
252 | int slot = 2 * link->ap->port_no + link->pmp; | ||
253 | u32 v = 0; | ||
254 | |||
255 | switch (scr) { | ||
256 | case SCR_ERROR: | ||
257 | /* devices other than 5287 uses 0xA8 as base */ | ||
258 | WARN_ON(pdev->device != 0x5287); | ||
259 | pci_write_config_dword(pdev, 0xB0 + slot * 4, val); | ||
260 | return 0; | ||
261 | |||
262 | case SCR_CONTROL: | ||
263 | /* set the DET field */ | ||
264 | v |= ((val & 0x4) >> 1) | (val & 0x1); | ||
265 | |||
266 | /* set the IPM field */ | ||
267 | v |= ((val >> 8) & 0x3) << 2; | ||
268 | |||
269 | pci_write_config_byte(pdev, 0xA4 + slot, v); | ||
270 | return 0; | ||
271 | |||
272 | default: | ||
273 | return -EINVAL; | ||
274 | } | ||
275 | } | ||
276 | |||
177 | /** | 277 | /** |
178 | * svia_tf_load - send taskfile registers to host controller | 278 | * svia_tf_load - send taskfile registers to host controller |
179 | * @ap: Port to which output is sent | 279 | * @ap: Port to which output is sent |
@@ -396,6 +496,30 @@ static int vt6421_prepare_host(struct pci_dev *pdev, struct ata_host **r_host) | |||
396 | return 0; | 496 | return 0; |
397 | } | 497 | } |
398 | 498 | ||
499 | static int vt8251_prepare_host(struct pci_dev *pdev, struct ata_host **r_host) | ||
500 | { | ||
501 | const struct ata_port_info *ppi[] = { &vt8251_port_info, NULL }; | ||
502 | struct ata_host *host; | ||
503 | int i, rc; | ||
504 | |||
505 | rc = ata_pci_sff_prepare_host(pdev, ppi, &host); | ||
506 | if (rc) | ||
507 | return rc; | ||
508 | *r_host = host; | ||
509 | |||
510 | rc = pcim_iomap_regions(pdev, 1 << 5, DRV_NAME); | ||
511 | if (rc) { | ||
512 | dev_printk(KERN_ERR, &pdev->dev, "failed to iomap PCI BAR 5\n"); | ||
513 | return rc; | ||
514 | } | ||
515 | |||
516 | /* 8251 hosts four sata ports as M/S of the two channels */ | ||
517 | for (i = 0; i < host->n_ports; i++) | ||
518 | ata_slave_link_init(host->ports[i]); | ||
519 | |||
520 | return 0; | ||
521 | } | ||
522 | |||
399 | static void svia_configure(struct pci_dev *pdev) | 523 | static void svia_configure(struct pci_dev *pdev) |
400 | { | 524 | { |
401 | u8 tmp8; | 525 | u8 tmp8; |
@@ -451,10 +575,10 @@ static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
451 | if (rc) | 575 | if (rc) |
452 | return rc; | 576 | return rc; |
453 | 577 | ||
454 | if (board_id == vt6420) | 578 | if (board_id == vt6421) |
455 | bar_sizes = &svia_bar_sizes[0]; | ||
456 | else | ||
457 | bar_sizes = &vt6421_bar_sizes[0]; | 579 | bar_sizes = &vt6421_bar_sizes[0]; |
580 | else | ||
581 | bar_sizes = &svia_bar_sizes[0]; | ||
458 | 582 | ||
459 | for (i = 0; i < ARRAY_SIZE(svia_bar_sizes); i++) | 583 | for (i = 0; i < ARRAY_SIZE(svia_bar_sizes); i++) |
460 | if ((pci_resource_start(pdev, i) == 0) || | 584 | if ((pci_resource_start(pdev, i) == 0) || |
@@ -467,10 +591,19 @@ static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
467 | return -ENODEV; | 591 | return -ENODEV; |
468 | } | 592 | } |
469 | 593 | ||
470 | if (board_id == vt6420) | 594 | switch (board_id) { |
595 | case vt6420: | ||
471 | rc = vt6420_prepare_host(pdev, &host); | 596 | rc = vt6420_prepare_host(pdev, &host); |
472 | else | 597 | break; |
598 | case vt6421: | ||
473 | rc = vt6421_prepare_host(pdev, &host); | 599 | rc = vt6421_prepare_host(pdev, &host); |
600 | break; | ||
601 | case vt8251: | ||
602 | rc = vt8251_prepare_host(pdev, &host); | ||
603 | break; | ||
604 | default: | ||
605 | rc = -EINVAL; | ||
606 | } | ||
474 | if (rc) | 607 | if (rc) |
475 | return rc; | 608 | return rc; |
476 | 609 | ||
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c index 4023885353e0..12de1fdaa6c6 100644 --- a/drivers/block/cciss.c +++ b/drivers/block/cciss.c | |||
@@ -96,6 +96,8 @@ static const struct pci_device_id cciss_pci_device_id[] = { | |||
96 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, | 96 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, |
97 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, | 97 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, |
98 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, | 98 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, |
99 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, | ||
100 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, | ||
99 | {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, | 101 | {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, |
100 | PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, | 102 | PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, |
101 | {0,} | 103 | {0,} |
@@ -133,6 +135,8 @@ static struct board_type products[] = { | |||
133 | {0x3245103C, "Smart Array P410i", &SA5_access}, | 135 | {0x3245103C, "Smart Array P410i", &SA5_access}, |
134 | {0x3247103C, "Smart Array P411", &SA5_access}, | 136 | {0x3247103C, "Smart Array P411", &SA5_access}, |
135 | {0x3249103C, "Smart Array P812", &SA5_access}, | 137 | {0x3249103C, "Smart Array P812", &SA5_access}, |
138 | {0x324A103C, "Smart Array P712m", &SA5_access}, | ||
139 | {0x324B103C, "Smart Array P711m", &SA5_access}, | ||
136 | {0xFFFF103C, "Unknown Smart Array", &SA5_access}, | 140 | {0xFFFF103C, "Unknown Smart Array", &SA5_access}, |
137 | }; | 141 | }; |
138 | 142 | ||
@@ -1366,6 +1370,7 @@ static void cciss_add_disk(ctlr_info_t *h, struct gendisk *disk, | |||
1366 | disk->first_minor = drv_index << NWD_SHIFT; | 1370 | disk->first_minor = drv_index << NWD_SHIFT; |
1367 | disk->fops = &cciss_fops; | 1371 | disk->fops = &cciss_fops; |
1368 | disk->private_data = &h->drv[drv_index]; | 1372 | disk->private_data = &h->drv[drv_index]; |
1373 | disk->driverfs_dev = &h->pdev->dev; | ||
1369 | 1374 | ||
1370 | /* Set up queue information */ | 1375 | /* Set up queue information */ |
1371 | blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask); | 1376 | blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask); |
@@ -3404,7 +3409,8 @@ static int __devinit cciss_init_one(struct pci_dev *pdev, | |||
3404 | int i; | 3409 | int i; |
3405 | int j = 0; | 3410 | int j = 0; |
3406 | int rc; | 3411 | int rc; |
3407 | int dac; | 3412 | int dac, return_code; |
3413 | InquiryData_struct *inq_buff = NULL; | ||
3408 | 3414 | ||
3409 | i = alloc_cciss_hba(); | 3415 | i = alloc_cciss_hba(); |
3410 | if (i < 0) | 3416 | if (i < 0) |
@@ -3510,6 +3516,25 @@ static int __devinit cciss_init_one(struct pci_dev *pdev, | |||
3510 | /* Turn the interrupts on so we can service requests */ | 3516 | /* Turn the interrupts on so we can service requests */ |
3511 | hba[i]->access.set_intr_mask(hba[i], CCISS_INTR_ON); | 3517 | hba[i]->access.set_intr_mask(hba[i], CCISS_INTR_ON); |
3512 | 3518 | ||
3519 | /* Get the firmware version */ | ||
3520 | inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL); | ||
3521 | if (inq_buff == NULL) { | ||
3522 | printk(KERN_ERR "cciss: out of memory\n"); | ||
3523 | goto clean4; | ||
3524 | } | ||
3525 | |||
3526 | return_code = sendcmd_withirq(CISS_INQUIRY, i, inq_buff, | ||
3527 | sizeof(InquiryData_struct), 0, 0 , 0, TYPE_CMD); | ||
3528 | if (return_code == IO_OK) { | ||
3529 | hba[i]->firm_ver[0] = inq_buff->data_byte[32]; | ||
3530 | hba[i]->firm_ver[1] = inq_buff->data_byte[33]; | ||
3531 | hba[i]->firm_ver[2] = inq_buff->data_byte[34]; | ||
3532 | hba[i]->firm_ver[3] = inq_buff->data_byte[35]; | ||
3533 | } else { /* send command failed */ | ||
3534 | printk(KERN_WARNING "cciss: unable to determine firmware" | ||
3535 | " version of controller\n"); | ||
3536 | } | ||
3537 | |||
3513 | cciss_procinit(i); | 3538 | cciss_procinit(i); |
3514 | 3539 | ||
3515 | hba[i]->cciss_max_sectors = 2048; | 3540 | hba[i]->cciss_max_sectors = 2048; |
@@ -3520,6 +3545,7 @@ static int __devinit cciss_init_one(struct pci_dev *pdev, | |||
3520 | return 1; | 3545 | return 1; |
3521 | 3546 | ||
3522 | clean4: | 3547 | clean4: |
3548 | kfree(inq_buff); | ||
3523 | #ifdef CONFIG_CISS_SCSI_TAPE | 3549 | #ifdef CONFIG_CISS_SCSI_TAPE |
3524 | kfree(hba[i]->scsi_rejects.complete); | 3550 | kfree(hba[i]->scsi_rejects.complete); |
3525 | #endif | 3551 | #endif |
diff --git a/drivers/block/cpqarray.c b/drivers/block/cpqarray.c index 47d233c6d0b3..5d39df14ed90 100644 --- a/drivers/block/cpqarray.c +++ b/drivers/block/cpqarray.c | |||
@@ -567,7 +567,12 @@ static int __init cpqarray_init(void) | |||
567 | num_cntlrs_reg++; | 567 | num_cntlrs_reg++; |
568 | } | 568 | } |
569 | 569 | ||
570 | return(num_cntlrs_reg); | 570 | if (num_cntlrs_reg) |
571 | return 0; | ||
572 | else { | ||
573 | pci_unregister_driver(&cpqarray_pci_driver); | ||
574 | return -ENODEV; | ||
575 | } | ||
571 | } | 576 | } |
572 | 577 | ||
573 | /* Function to find the first free pointer into our hba[] array */ | 578 | /* Function to find the first free pointer into our hba[] array */ |
diff --git a/drivers/bluetooth/bpa10x.c b/drivers/bluetooth/bpa10x.c index 32f3a8ed8d3d..b936d8ce2728 100644 --- a/drivers/bluetooth/bpa10x.c +++ b/drivers/bluetooth/bpa10x.c | |||
@@ -443,8 +443,8 @@ static void bpa10x_destruct(struct hci_dev *hdev) | |||
443 | 443 | ||
444 | BT_DBG("%s", hdev->name); | 444 | BT_DBG("%s", hdev->name); |
445 | 445 | ||
446 | kfree(data->rx_skb[0]); | 446 | kfree_skb(data->rx_skb[0]); |
447 | kfree(data->rx_skb[1]); | 447 | kfree_skb(data->rx_skb[1]); |
448 | kfree(data); | 448 | kfree(data); |
449 | } | 449 | } |
450 | 450 | ||
diff --git a/drivers/cdrom/gdrom.c b/drivers/cdrom/gdrom.c index 9aaa86b232b1..2eecb779437b 100644 --- a/drivers/cdrom/gdrom.c +++ b/drivers/cdrom/gdrom.c | |||
@@ -495,9 +495,10 @@ static int gdrom_bdops_open(struct block_device *bdev, fmode_t mode) | |||
495 | return cdrom_open(gd.cd_info, bdev, mode); | 495 | return cdrom_open(gd.cd_info, bdev, mode); |
496 | } | 496 | } |
497 | 497 | ||
498 | static int gdrom_bdops_release(struct block_device *bdev, fmode_t mode) | 498 | static int gdrom_bdops_release(struct gendisk *disk, fmode_t mode) |
499 | { | 499 | { |
500 | return cdrom_release(gd.cd_info, mode); | 500 | cdrom_release(gd.cd_info, mode); |
501 | return 0; | ||
501 | } | 502 | } |
502 | 503 | ||
503 | static int gdrom_bdops_mediachanged(struct gendisk *disk) | 504 | static int gdrom_bdops_mediachanged(struct gendisk *disk) |
diff --git a/drivers/char/hpet.c b/drivers/char/hpet.c index 408f5f92cb4e..53fdc7ff3870 100644 --- a/drivers/char/hpet.c +++ b/drivers/char/hpet.c | |||
@@ -427,9 +427,6 @@ static int hpet_release(struct inode *inode, struct file *file) | |||
427 | if (irq) | 427 | if (irq) |
428 | free_irq(irq, devp); | 428 | free_irq(irq, devp); |
429 | 429 | ||
430 | if (file->f_flags & FASYNC) | ||
431 | hpet_fasync(-1, file, 0); | ||
432 | |||
433 | file->private_data = NULL; | 430 | file->private_data = NULL; |
434 | return 0; | 431 | return 0; |
435 | } | 432 | } |
diff --git a/drivers/char/ipmi/ipmi_devintf.c b/drivers/char/ipmi/ipmi_devintf.c index 1d7b429f7ffa..41fc11dc921c 100644 --- a/drivers/char/ipmi/ipmi_devintf.c +++ b/drivers/char/ipmi/ipmi_devintf.c | |||
@@ -162,8 +162,6 @@ static int ipmi_release(struct inode *inode, struct file *file) | |||
162 | if (rv) | 162 | if (rv) |
163 | return rv; | 163 | return rv; |
164 | 164 | ||
165 | ipmi_fasync (-1, file, 0); | ||
166 | |||
167 | /* FIXME - free the messages in the list. */ | 165 | /* FIXME - free the messages in the list. */ |
168 | kfree(priv); | 166 | kfree(priv); |
169 | 167 | ||
diff --git a/drivers/char/ipmi/ipmi_watchdog.c b/drivers/char/ipmi/ipmi_watchdog.c index 235fab0bdf79..a4d57e31f713 100644 --- a/drivers/char/ipmi/ipmi_watchdog.c +++ b/drivers/char/ipmi/ipmi_watchdog.c | |||
@@ -870,7 +870,6 @@ static int ipmi_close(struct inode *ino, struct file *filep) | |||
870 | clear_bit(0, &ipmi_wdog_open); | 870 | clear_bit(0, &ipmi_wdog_open); |
871 | } | 871 | } |
872 | 872 | ||
873 | ipmi_fasync(-1, filep, 0); | ||
874 | expect_close = 0; | 873 | expect_close = 0; |
875 | 874 | ||
876 | return 0; | 875 | return 0; |
diff --git a/drivers/char/random.c b/drivers/char/random.c index 705a839f1796..675076f5fca8 100644 --- a/drivers/char/random.c +++ b/drivers/char/random.c | |||
@@ -1139,18 +1139,12 @@ static int random_fasync(int fd, struct file *filp, int on) | |||
1139 | return fasync_helper(fd, filp, on, &fasync); | 1139 | return fasync_helper(fd, filp, on, &fasync); |
1140 | } | 1140 | } |
1141 | 1141 | ||
1142 | static int random_release(struct inode *inode, struct file *filp) | ||
1143 | { | ||
1144 | return fasync_helper(-1, filp, 0, &fasync); | ||
1145 | } | ||
1146 | |||
1147 | const struct file_operations random_fops = { | 1142 | const struct file_operations random_fops = { |
1148 | .read = random_read, | 1143 | .read = random_read, |
1149 | .write = random_write, | 1144 | .write = random_write, |
1150 | .poll = random_poll, | 1145 | .poll = random_poll, |
1151 | .unlocked_ioctl = random_ioctl, | 1146 | .unlocked_ioctl = random_ioctl, |
1152 | .fasync = random_fasync, | 1147 | .fasync = random_fasync, |
1153 | .release = random_release, | ||
1154 | }; | 1148 | }; |
1155 | 1149 | ||
1156 | const struct file_operations urandom_fops = { | 1150 | const struct file_operations urandom_fops = { |
@@ -1158,7 +1152,6 @@ const struct file_operations urandom_fops = { | |||
1158 | .write = random_write, | 1152 | .write = random_write, |
1159 | .unlocked_ioctl = random_ioctl, | 1153 | .unlocked_ioctl = random_ioctl, |
1160 | .fasync = random_fasync, | 1154 | .fasync = random_fasync, |
1161 | .release = random_release, | ||
1162 | }; | 1155 | }; |
1163 | 1156 | ||
1164 | /*************************************************************** | 1157 | /*************************************************************** |
diff --git a/drivers/char/rtc.c b/drivers/char/rtc.c index 32dc89720d58..20d6efb6324e 100644 --- a/drivers/char/rtc.c +++ b/drivers/char/rtc.c | |||
@@ -788,8 +788,6 @@ static int rtc_release(struct inode *inode, struct file *file) | |||
788 | } | 788 | } |
789 | spin_unlock_irq(&rtc_lock); | 789 | spin_unlock_irq(&rtc_lock); |
790 | 790 | ||
791 | if (file->f_flags & FASYNC) | ||
792 | rtc_fasync(-1, file, 0); | ||
793 | no_irq: | 791 | no_irq: |
794 | #endif | 792 | #endif |
795 | 793 | ||
diff --git a/drivers/char/sonypi.c b/drivers/char/sonypi.c index 85e0eb76eeab..2457b07dabd6 100644 --- a/drivers/char/sonypi.c +++ b/drivers/char/sonypi.c | |||
@@ -898,7 +898,6 @@ static int sonypi_misc_fasync(int fd, struct file *filp, int on) | |||
898 | 898 | ||
899 | static int sonypi_misc_release(struct inode *inode, struct file *file) | 899 | static int sonypi_misc_release(struct inode *inode, struct file *file) |
900 | { | 900 | { |
901 | sonypi_misc_fasync(-1, file, 0); | ||
902 | mutex_lock(&sonypi_device.lock); | 901 | mutex_lock(&sonypi_device.lock); |
903 | sonypi_device.open_count--; | 902 | sonypi_device.open_count--; |
904 | mutex_unlock(&sonypi_device.lock); | 903 | mutex_unlock(&sonypi_device.lock); |
diff --git a/drivers/char/vt.c b/drivers/char/vt.c index d8f83e26e4a4..a5af6072e2b3 100644 --- a/drivers/char/vt.c +++ b/drivers/char/vt.c | |||
@@ -1644,7 +1644,10 @@ static void reset_terminal(struct vc_data *vc, int do_clear) | |||
1644 | vc->vc_tab_stop[1] = | 1644 | vc->vc_tab_stop[1] = |
1645 | vc->vc_tab_stop[2] = | 1645 | vc->vc_tab_stop[2] = |
1646 | vc->vc_tab_stop[3] = | 1646 | vc->vc_tab_stop[3] = |
1647 | vc->vc_tab_stop[4] = 0x01010101; | 1647 | vc->vc_tab_stop[4] = |
1648 | vc->vc_tab_stop[5] = | ||
1649 | vc->vc_tab_stop[6] = | ||
1650 | vc->vc_tab_stop[7] = 0x01010101; | ||
1648 | 1651 | ||
1649 | vc->vc_bell_pitch = DEFAULT_BELL_PITCH; | 1652 | vc->vc_bell_pitch = DEFAULT_BELL_PITCH; |
1650 | vc->vc_bell_duration = DEFAULT_BELL_DURATION; | 1653 | vc->vc_bell_duration = DEFAULT_BELL_DURATION; |
@@ -1935,7 +1938,10 @@ static void do_con_trol(struct tty_struct *tty, struct vc_data *vc, int c) | |||
1935 | vc->vc_tab_stop[1] = | 1938 | vc->vc_tab_stop[1] = |
1936 | vc->vc_tab_stop[2] = | 1939 | vc->vc_tab_stop[2] = |
1937 | vc->vc_tab_stop[3] = | 1940 | vc->vc_tab_stop[3] = |
1938 | vc->vc_tab_stop[4] = 0; | 1941 | vc->vc_tab_stop[4] = |
1942 | vc->vc_tab_stop[5] = | ||
1943 | vc->vc_tab_stop[6] = | ||
1944 | vc->vc_tab_stop[7] = 0; | ||
1939 | } | 1945 | } |
1940 | return; | 1946 | return; |
1941 | case 'm': | 1947 | case 'm': |
diff --git a/drivers/firewire/fw-device.c b/drivers/firewire/fw-device.c index 3fccdd484100..6b9be42c7b98 100644 --- a/drivers/firewire/fw-device.c +++ b/drivers/firewire/fw-device.c | |||
@@ -587,8 +587,7 @@ static void create_units(struct fw_device *device) | |||
587 | unit->device.bus = &fw_bus_type; | 587 | unit->device.bus = &fw_bus_type; |
588 | unit->device.type = &fw_unit_type; | 588 | unit->device.type = &fw_unit_type; |
589 | unit->device.parent = &device->device; | 589 | unit->device.parent = &device->device; |
590 | snprintf(unit->device.bus_id, sizeof(unit->device.bus_id), | 590 | dev_set_name(&unit->device, "%s.%d", dev_name(&device->device), i++); |
591 | "%s.%d", device->device.bus_id, i++); | ||
592 | 591 | ||
593 | init_fw_attribute_group(&unit->device, | 592 | init_fw_attribute_group(&unit->device, |
594 | fw_unit_attributes, | 593 | fw_unit_attributes, |
@@ -711,8 +710,7 @@ static void fw_device_init(struct work_struct *work) | |||
711 | device->device.type = &fw_device_type; | 710 | device->device.type = &fw_device_type; |
712 | device->device.parent = device->card->device; | 711 | device->device.parent = device->card->device; |
713 | device->device.devt = MKDEV(fw_cdev_major, minor); | 712 | device->device.devt = MKDEV(fw_cdev_major, minor); |
714 | snprintf(device->device.bus_id, sizeof(device->device.bus_id), | 713 | dev_set_name(&device->device, "fw%d", minor); |
715 | "fw%d", minor); | ||
716 | 714 | ||
717 | init_fw_attribute_group(&device->device, | 715 | init_fw_attribute_group(&device->device, |
718 | fw_device_attributes, | 716 | fw_device_attributes, |
@@ -741,13 +739,13 @@ static void fw_device_init(struct work_struct *work) | |||
741 | if (device->config_rom_retries) | 739 | if (device->config_rom_retries) |
742 | fw_notify("created device %s: GUID %08x%08x, S%d00, " | 740 | fw_notify("created device %s: GUID %08x%08x, S%d00, " |
743 | "%d config ROM retries\n", | 741 | "%d config ROM retries\n", |
744 | device->device.bus_id, | 742 | dev_name(&device->device), |
745 | device->config_rom[3], device->config_rom[4], | 743 | device->config_rom[3], device->config_rom[4], |
746 | 1 << device->max_speed, | 744 | 1 << device->max_speed, |
747 | device->config_rom_retries); | 745 | device->config_rom_retries); |
748 | else | 746 | else |
749 | fw_notify("created device %s: GUID %08x%08x, S%d00\n", | 747 | fw_notify("created device %s: GUID %08x%08x, S%d00\n", |
750 | device->device.bus_id, | 748 | dev_name(&device->device), |
751 | device->config_rom[3], device->config_rom[4], | 749 | device->config_rom[3], device->config_rom[4], |
752 | 1 << device->max_speed); | 750 | 1 << device->max_speed); |
753 | device->config_rom_retries = 0; | 751 | device->config_rom_retries = 0; |
@@ -883,12 +881,12 @@ static void fw_device_refresh(struct work_struct *work) | |||
883 | FW_DEVICE_RUNNING) == FW_DEVICE_SHUTDOWN) | 881 | FW_DEVICE_RUNNING) == FW_DEVICE_SHUTDOWN) |
884 | goto gone; | 882 | goto gone; |
885 | 883 | ||
886 | fw_notify("refreshed device %s\n", device->device.bus_id); | 884 | fw_notify("refreshed device %s\n", dev_name(&device->device)); |
887 | device->config_rom_retries = 0; | 885 | device->config_rom_retries = 0; |
888 | goto out; | 886 | goto out; |
889 | 887 | ||
890 | give_up: | 888 | give_up: |
891 | fw_notify("giving up on refresh of device %s\n", device->device.bus_id); | 889 | fw_notify("giving up on refresh of device %s\n", dev_name(&device->device)); |
892 | gone: | 890 | gone: |
893 | atomic_set(&device->state, FW_DEVICE_SHUTDOWN); | 891 | atomic_set(&device->state, FW_DEVICE_SHUTDOWN); |
894 | fw_device_shutdown(work); | 892 | fw_device_shutdown(work); |
diff --git a/drivers/firewire/fw-ohci.c b/drivers/firewire/fw-ohci.c index 8e16bfbdcb3d..46610b090415 100644 --- a/drivers/firewire/fw-ohci.c +++ b/drivers/firewire/fw-ohci.c | |||
@@ -2468,7 +2468,7 @@ pci_probe(struct pci_dev *dev, const struct pci_device_id *ent) | |||
2468 | goto fail_self_id; | 2468 | goto fail_self_id; |
2469 | 2469 | ||
2470 | fw_notify("Added fw-ohci device %s, OHCI version %x.%x\n", | 2470 | fw_notify("Added fw-ohci device %s, OHCI version %x.%x\n", |
2471 | dev->dev.bus_id, version >> 16, version & 0xff); | 2471 | dev_name(&dev->dev), version >> 16, version & 0xff); |
2472 | return 0; | 2472 | return 0; |
2473 | 2473 | ||
2474 | fail_self_id: | 2474 | fail_self_id: |
diff --git a/drivers/firewire/fw-sbp2.c b/drivers/firewire/fw-sbp2.c index d334cac5e1fc..97df6dac3a82 100644 --- a/drivers/firewire/fw-sbp2.c +++ b/drivers/firewire/fw-sbp2.c | |||
@@ -1135,7 +1135,7 @@ static int sbp2_probe(struct device *dev) | |||
1135 | tgt->unit = unit; | 1135 | tgt->unit = unit; |
1136 | kref_init(&tgt->kref); | 1136 | kref_init(&tgt->kref); |
1137 | INIT_LIST_HEAD(&tgt->lu_list); | 1137 | INIT_LIST_HEAD(&tgt->lu_list); |
1138 | tgt->bus_id = unit->device.bus_id; | 1138 | tgt->bus_id = dev_name(&unit->device); |
1139 | tgt->guid = (u64)device->config_rom[3] << 32 | device->config_rom[4]; | 1139 | tgt->guid = (u64)device->config_rom[3] << 32 | device->config_rom[4]; |
1140 | 1140 | ||
1141 | if (fw_device_enable_phys_dma(device) < 0) | 1141 | if (fw_device_enable_phys_dma(device) < 0) |
diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c index 0d46627663b1..78eeed5caaff 100644 --- a/drivers/gpu/drm/drm_fops.c +++ b/drivers/gpu/drm/drm_fops.c | |||
@@ -406,8 +406,6 @@ int drm_release(struct inode *inode, struct file *filp) | |||
406 | if (dev->driver->driver_features & DRIVER_GEM) | 406 | if (dev->driver->driver_features & DRIVER_GEM) |
407 | drm_gem_release(dev, file_priv); | 407 | drm_gem_release(dev, file_priv); |
408 | 408 | ||
409 | drm_fasync(-1, filp, 0); | ||
410 | |||
411 | mutex_lock(&dev->ctxlist_mutex); | 409 | mutex_lock(&dev->ctxlist_mutex); |
412 | if (!list_empty(&dev->ctxlist)) { | 410 | if (!list_empty(&dev->ctxlist)) { |
413 | struct drm_ctx_list *pos, *n; | 411 | struct drm_ctx_list *pos, *n; |
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 5ba78e4fd2b5..d8fb5d8ee7ea 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile | |||
@@ -3,13 +3,14 @@ | |||
3 | # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. | 3 | # Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. |
4 | 4 | ||
5 | ccflags-y := -Iinclude/drm | 5 | ccflags-y := -Iinclude/drm |
6 | i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o i915_opregion.o \ | 6 | i915-y := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \ |
7 | i915_suspend.o \ | 7 | i915_suspend.o \ |
8 | i915_gem.o \ | 8 | i915_gem.o \ |
9 | i915_gem_debug.o \ | 9 | i915_gem_debug.o \ |
10 | i915_gem_proc.o \ | 10 | i915_gem_proc.o \ |
11 | i915_gem_tiling.o | 11 | i915_gem_tiling.o |
12 | 12 | ||
13 | i915-$(CONFIG_ACPI) += i915_opregion.o | ||
13 | i915-$(CONFIG_COMPAT) += i915_ioc32.o | 14 | i915-$(CONFIG_COMPAT) += i915_ioc32.o |
14 | 15 | ||
15 | obj-$(CONFIG_DRM_I915) += i915.o | 16 | obj-$(CONFIG_DRM_I915) += i915.o |
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 01de536e0211..256e22963ae4 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -960,6 +960,7 @@ struct drm_ioctl_desc i915_ioctls[] = { | |||
960 | DRM_IOCTL_DEF(DRM_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, 0), | 960 | DRM_IOCTL_DEF(DRM_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, 0), |
961 | DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0), | 961 | DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0), |
962 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0), | 962 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0), |
963 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0), | ||
963 | }; | 964 | }; |
964 | 965 | ||
965 | int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); | 966 | int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f20ffe17df71..572dcd0e3e0d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -31,6 +31,7 @@ | |||
31 | #define _I915_DRV_H_ | 31 | #define _I915_DRV_H_ |
32 | 32 | ||
33 | #include "i915_reg.h" | 33 | #include "i915_reg.h" |
34 | #include <linux/io-mapping.h> | ||
34 | 35 | ||
35 | /* General customization: | 36 | /* General customization: |
36 | */ | 37 | */ |
@@ -246,6 +247,8 @@ typedef struct drm_i915_private { | |||
246 | struct { | 247 | struct { |
247 | struct drm_mm gtt_space; | 248 | struct drm_mm gtt_space; |
248 | 249 | ||
250 | struct io_mapping *gtt_mapping; | ||
251 | |||
249 | /** | 252 | /** |
250 | * List of objects currently involved in rendering from the | 253 | * List of objects currently involved in rendering from the |
251 | * ringbuffer. | 254 | * ringbuffer. |
@@ -502,6 +505,8 @@ int i915_gem_set_tiling(struct drm_device *dev, void *data, | |||
502 | struct drm_file *file_priv); | 505 | struct drm_file *file_priv); |
503 | int i915_gem_get_tiling(struct drm_device *dev, void *data, | 506 | int i915_gem_get_tiling(struct drm_device *dev, void *data, |
504 | struct drm_file *file_priv); | 507 | struct drm_file *file_priv); |
508 | int i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data, | ||
509 | struct drm_file *file_priv); | ||
505 | void i915_gem_load(struct drm_device *dev); | 510 | void i915_gem_load(struct drm_device *dev); |
506 | int i915_gem_proc_init(struct drm_minor *minor); | 511 | int i915_gem_proc_init(struct drm_minor *minor); |
507 | void i915_gem_proc_cleanup(struct drm_minor *minor); | 512 | void i915_gem_proc_cleanup(struct drm_minor *minor); |
@@ -539,11 +544,18 @@ extern int i915_restore_state(struct drm_device *dev); | |||
539 | extern int i915_save_state(struct drm_device *dev); | 544 | extern int i915_save_state(struct drm_device *dev); |
540 | extern int i915_restore_state(struct drm_device *dev); | 545 | extern int i915_restore_state(struct drm_device *dev); |
541 | 546 | ||
547 | #ifdef CONFIG_ACPI | ||
542 | /* i915_opregion.c */ | 548 | /* i915_opregion.c */ |
543 | extern int intel_opregion_init(struct drm_device *dev); | 549 | extern int intel_opregion_init(struct drm_device *dev); |
544 | extern void intel_opregion_free(struct drm_device *dev); | 550 | extern void intel_opregion_free(struct drm_device *dev); |
545 | extern void opregion_asle_intr(struct drm_device *dev); | 551 | extern void opregion_asle_intr(struct drm_device *dev); |
546 | extern void opregion_enable_asle(struct drm_device *dev); | 552 | extern void opregion_enable_asle(struct drm_device *dev); |
553 | #else | ||
554 | static inline int intel_opregion_init(struct drm_device *dev) { return 0; } | ||
555 | static inline void intel_opregion_free(struct drm_device *dev) { return; } | ||
556 | static inline void opregion_asle_intr(struct drm_device *dev) { return; } | ||
557 | static inline void opregion_enable_asle(struct drm_device *dev) { return; } | ||
558 | #endif | ||
547 | 559 | ||
548 | /** | 560 | /** |
549 | * Lock test for when it's just for synchronization of ring access. | 561 | * Lock test for when it's just for synchronization of ring access. |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 17ae330ff269..b0ec73fa6a93 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -79,6 +79,28 @@ i915_gem_init_ioctl(struct drm_device *dev, void *data, | |||
79 | return 0; | 79 | return 0; |
80 | } | 80 | } |
81 | 81 | ||
82 | int | ||
83 | i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data, | ||
84 | struct drm_file *file_priv) | ||
85 | { | ||
86 | drm_i915_private_t *dev_priv = dev->dev_private; | ||
87 | struct drm_i915_gem_get_aperture *args = data; | ||
88 | struct drm_i915_gem_object *obj_priv; | ||
89 | |||
90 | if (!(dev->driver->driver_features & DRIVER_GEM)) | ||
91 | return -ENODEV; | ||
92 | |||
93 | args->aper_size = dev->gtt_total; | ||
94 | args->aper_available_size = args->aper_size; | ||
95 | |||
96 | list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) { | ||
97 | if (obj_priv->pin_count > 0) | ||
98 | args->aper_available_size -= obj_priv->obj->size; | ||
99 | } | ||
100 | |||
101 | return 0; | ||
102 | } | ||
103 | |||
82 | 104 | ||
83 | /** | 105 | /** |
84 | * Creates a new mm object and returns a handle to it. | 106 | * Creates a new mm object and returns a handle to it. |
@@ -171,35 +193,50 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data, | |||
171 | return 0; | 193 | return 0; |
172 | } | 194 | } |
173 | 195 | ||
174 | /* | 196 | /* This is the fast write path which cannot handle |
175 | * Try to write quickly with an atomic kmap. Return true on success. | 197 | * page faults in the source data |
176 | * | ||
177 | * If this fails (which includes a partial write), we'll redo the whole | ||
178 | * thing with the slow version. | ||
179 | * | ||
180 | * This is a workaround for the low performance of iounmap (approximate | ||
181 | * 10% cpu cost on normal 3D workloads). kmap_atomic on HIGHMEM kernels | ||
182 | * happens to let us map card memory without taking IPIs. When the vmap | ||
183 | * rework lands we should be able to dump this hack. | ||
184 | */ | 198 | */ |
185 | static inline int fast_user_write(unsigned long pfn, char __user *user_data, | 199 | |
186 | int l, int o) | 200 | static inline int |
201 | fast_user_write(struct io_mapping *mapping, | ||
202 | loff_t page_base, int page_offset, | ||
203 | char __user *user_data, | ||
204 | int length) | ||
187 | { | 205 | { |
188 | #ifdef CONFIG_HIGHMEM | ||
189 | unsigned long unwritten; | ||
190 | char *vaddr_atomic; | 206 | char *vaddr_atomic; |
207 | unsigned long unwritten; | ||
191 | 208 | ||
192 | vaddr_atomic = kmap_atomic_pfn(pfn, KM_USER0); | 209 | vaddr_atomic = io_mapping_map_atomic_wc(mapping, page_base); |
193 | #if WATCH_PWRITE | 210 | unwritten = __copy_from_user_inatomic_nocache(vaddr_atomic + page_offset, |
194 | DRM_INFO("pwrite i %d o %d l %d pfn %ld vaddr %p\n", | 211 | user_data, length); |
195 | i, o, l, pfn, vaddr_atomic); | 212 | io_mapping_unmap_atomic(vaddr_atomic); |
196 | #endif | 213 | if (unwritten) |
197 | unwritten = __copy_from_user_inatomic_nocache(vaddr_atomic + o, user_data, l); | 214 | return -EFAULT; |
198 | kunmap_atomic(vaddr_atomic, KM_USER0); | 215 | return 0; |
199 | return !unwritten; | 216 | } |
200 | #else | 217 | |
218 | /* Here's the write path which can sleep for | ||
219 | * page faults | ||
220 | */ | ||
221 | |||
222 | static inline int | ||
223 | slow_user_write(struct io_mapping *mapping, | ||
224 | loff_t page_base, int page_offset, | ||
225 | char __user *user_data, | ||
226 | int length) | ||
227 | { | ||
228 | char __iomem *vaddr; | ||
229 | unsigned long unwritten; | ||
230 | |||
231 | vaddr = io_mapping_map_wc(mapping, page_base); | ||
232 | if (vaddr == NULL) | ||
233 | return -EFAULT; | ||
234 | unwritten = __copy_from_user(vaddr + page_offset, | ||
235 | user_data, length); | ||
236 | io_mapping_unmap(vaddr); | ||
237 | if (unwritten) | ||
238 | return -EFAULT; | ||
201 | return 0; | 239 | return 0; |
202 | #endif | ||
203 | } | 240 | } |
204 | 241 | ||
205 | static int | 242 | static int |
@@ -208,10 +245,12 @@ i915_gem_gtt_pwrite(struct drm_device *dev, struct drm_gem_object *obj, | |||
208 | struct drm_file *file_priv) | 245 | struct drm_file *file_priv) |
209 | { | 246 | { |
210 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 247 | struct drm_i915_gem_object *obj_priv = obj->driver_private; |
248 | drm_i915_private_t *dev_priv = dev->dev_private; | ||
211 | ssize_t remain; | 249 | ssize_t remain; |
212 | loff_t offset; | 250 | loff_t offset, page_base; |
213 | char __user *user_data; | 251 | char __user *user_data; |
214 | int ret = 0; | 252 | int page_offset, page_length; |
253 | int ret; | ||
215 | 254 | ||
216 | user_data = (char __user *) (uintptr_t) args->data_ptr; | 255 | user_data = (char __user *) (uintptr_t) args->data_ptr; |
217 | remain = args->size; | 256 | remain = args->size; |
@@ -235,57 +274,37 @@ i915_gem_gtt_pwrite(struct drm_device *dev, struct drm_gem_object *obj, | |||
235 | obj_priv->dirty = 1; | 274 | obj_priv->dirty = 1; |
236 | 275 | ||
237 | while (remain > 0) { | 276 | while (remain > 0) { |
238 | unsigned long pfn; | ||
239 | int i, o, l; | ||
240 | |||
241 | /* Operation in this page | 277 | /* Operation in this page |
242 | * | 278 | * |
243 | * i = page number | 279 | * page_base = page offset within aperture |
244 | * o = offset within page | 280 | * page_offset = offset within page |
245 | * l = bytes to copy | 281 | * page_length = bytes to copy for this page |
246 | */ | 282 | */ |
247 | i = offset >> PAGE_SHIFT; | 283 | page_base = (offset & ~(PAGE_SIZE-1)); |
248 | o = offset & (PAGE_SIZE-1); | 284 | page_offset = offset & (PAGE_SIZE-1); |
249 | l = remain; | 285 | page_length = remain; |
250 | if ((o + l) > PAGE_SIZE) | 286 | if ((page_offset + remain) > PAGE_SIZE) |
251 | l = PAGE_SIZE - o; | 287 | page_length = PAGE_SIZE - page_offset; |
252 | 288 | ||
253 | pfn = (dev->agp->base >> PAGE_SHIFT) + i; | 289 | ret = fast_user_write (dev_priv->mm.gtt_mapping, page_base, |
254 | 290 | page_offset, user_data, page_length); | |
255 | if (!fast_user_write(pfn, user_data, l, o)) { | 291 | |
256 | unsigned long unwritten; | 292 | /* If we get a fault while copying data, then (presumably) our |
257 | char __iomem *vaddr; | 293 | * source page isn't available. In this case, use the |
258 | 294 | * non-atomic function | |
259 | vaddr = ioremap_wc(pfn << PAGE_SHIFT, PAGE_SIZE); | 295 | */ |
260 | #if WATCH_PWRITE | 296 | if (ret) { |
261 | DRM_INFO("pwrite slow i %d o %d l %d " | 297 | ret = slow_user_write (dev_priv->mm.gtt_mapping, |
262 | "pfn %ld vaddr %p\n", | 298 | page_base, page_offset, |
263 | i, o, l, pfn, vaddr); | 299 | user_data, page_length); |
264 | #endif | 300 | if (ret) |
265 | if (vaddr == NULL) { | ||
266 | ret = -EFAULT; | ||
267 | goto fail; | ||
268 | } | ||
269 | unwritten = __copy_from_user(vaddr + o, user_data, l); | ||
270 | #if WATCH_PWRITE | ||
271 | DRM_INFO("unwritten %ld\n", unwritten); | ||
272 | #endif | ||
273 | iounmap(vaddr); | ||
274 | if (unwritten) { | ||
275 | ret = -EFAULT; | ||
276 | goto fail; | 301 | goto fail; |
277 | } | ||
278 | } | 302 | } |
279 | 303 | ||
280 | remain -= l; | 304 | remain -= page_length; |
281 | user_data += l; | 305 | user_data += page_length; |
282 | offset += l; | 306 | offset += page_length; |
283 | } | 307 | } |
284 | #if WATCH_PWRITE && 1 | ||
285 | i915_gem_clflush_object(obj); | ||
286 | i915_gem_dump_object(obj, args->offset + args->size, __func__, ~0); | ||
287 | i915_gem_clflush_object(obj); | ||
288 | #endif | ||
289 | 308 | ||
290 | fail: | 309 | fail: |
291 | i915_gem_object_unpin(obj); | 310 | i915_gem_object_unpin(obj); |
@@ -1503,12 +1522,12 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj, | |||
1503 | struct drm_i915_gem_exec_object *entry) | 1522 | struct drm_i915_gem_exec_object *entry) |
1504 | { | 1523 | { |
1505 | struct drm_device *dev = obj->dev; | 1524 | struct drm_device *dev = obj->dev; |
1525 | drm_i915_private_t *dev_priv = dev->dev_private; | ||
1506 | struct drm_i915_gem_relocation_entry reloc; | 1526 | struct drm_i915_gem_relocation_entry reloc; |
1507 | struct drm_i915_gem_relocation_entry __user *relocs; | 1527 | struct drm_i915_gem_relocation_entry __user *relocs; |
1508 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1528 | struct drm_i915_gem_object *obj_priv = obj->driver_private; |
1509 | int i, ret; | 1529 | int i, ret; |
1510 | uint32_t last_reloc_offset = -1; | 1530 | void __iomem *reloc_page; |
1511 | void __iomem *reloc_page = NULL; | ||
1512 | 1531 | ||
1513 | /* Choose the GTT offset for our buffer and put it there. */ | 1532 | /* Choose the GTT offset for our buffer and put it there. */ |
1514 | ret = i915_gem_object_pin(obj, (uint32_t) entry->alignment); | 1533 | ret = i915_gem_object_pin(obj, (uint32_t) entry->alignment); |
@@ -1631,26 +1650,11 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj, | |||
1631 | * perform. | 1650 | * perform. |
1632 | */ | 1651 | */ |
1633 | reloc_offset = obj_priv->gtt_offset + reloc.offset; | 1652 | reloc_offset = obj_priv->gtt_offset + reloc.offset; |
1634 | if (reloc_page == NULL || | 1653 | reloc_page = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping, |
1635 | (last_reloc_offset & ~(PAGE_SIZE - 1)) != | 1654 | (reloc_offset & |
1636 | (reloc_offset & ~(PAGE_SIZE - 1))) { | 1655 | ~(PAGE_SIZE - 1))); |
1637 | if (reloc_page != NULL) | ||
1638 | iounmap(reloc_page); | ||
1639 | |||
1640 | reloc_page = ioremap_wc(dev->agp->base + | ||
1641 | (reloc_offset & | ||
1642 | ~(PAGE_SIZE - 1)), | ||
1643 | PAGE_SIZE); | ||
1644 | last_reloc_offset = reloc_offset; | ||
1645 | if (reloc_page == NULL) { | ||
1646 | drm_gem_object_unreference(target_obj); | ||
1647 | i915_gem_object_unpin(obj); | ||
1648 | return -ENOMEM; | ||
1649 | } | ||
1650 | } | ||
1651 | |||
1652 | reloc_entry = (uint32_t __iomem *)(reloc_page + | 1656 | reloc_entry = (uint32_t __iomem *)(reloc_page + |
1653 | (reloc_offset & (PAGE_SIZE - 1))); | 1657 | (reloc_offset & (PAGE_SIZE - 1))); |
1654 | reloc_val = target_obj_priv->gtt_offset + reloc.delta; | 1658 | reloc_val = target_obj_priv->gtt_offset + reloc.delta; |
1655 | 1659 | ||
1656 | #if WATCH_BUF | 1660 | #if WATCH_BUF |
@@ -1659,6 +1663,7 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj, | |||
1659 | readl(reloc_entry), reloc_val); | 1663 | readl(reloc_entry), reloc_val); |
1660 | #endif | 1664 | #endif |
1661 | writel(reloc_val, reloc_entry); | 1665 | writel(reloc_val, reloc_entry); |
1666 | io_mapping_unmap_atomic(reloc_page); | ||
1662 | 1667 | ||
1663 | /* Write the updated presumed offset for this entry back out | 1668 | /* Write the updated presumed offset for this entry back out |
1664 | * to the user. | 1669 | * to the user. |
@@ -1674,9 +1679,6 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj, | |||
1674 | drm_gem_object_unreference(target_obj); | 1679 | drm_gem_object_unreference(target_obj); |
1675 | } | 1680 | } |
1676 | 1681 | ||
1677 | if (reloc_page != NULL) | ||
1678 | iounmap(reloc_page); | ||
1679 | |||
1680 | #if WATCH_BUF | 1682 | #if WATCH_BUF |
1681 | if (0) | 1683 | if (0) |
1682 | i915_gem_dump_object(obj, 128, __func__, ~0); | 1684 | i915_gem_dump_object(obj, 128, __func__, ~0); |
@@ -2518,6 +2520,10 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data, | |||
2518 | if (ret != 0) | 2520 | if (ret != 0) |
2519 | return ret; | 2521 | return ret; |
2520 | 2522 | ||
2523 | dev_priv->mm.gtt_mapping = io_mapping_create_wc(dev->agp->base, | ||
2524 | dev->agp->agp_info.aper_size | ||
2525 | * 1024 * 1024); | ||
2526 | |||
2521 | mutex_lock(&dev->struct_mutex); | 2527 | mutex_lock(&dev->struct_mutex); |
2522 | BUG_ON(!list_empty(&dev_priv->mm.active_list)); | 2528 | BUG_ON(!list_empty(&dev_priv->mm.active_list)); |
2523 | BUG_ON(!list_empty(&dev_priv->mm.flushing_list)); | 2529 | BUG_ON(!list_empty(&dev_priv->mm.flushing_list)); |
@@ -2535,11 +2541,13 @@ int | |||
2535 | i915_gem_leavevt_ioctl(struct drm_device *dev, void *data, | 2541 | i915_gem_leavevt_ioctl(struct drm_device *dev, void *data, |
2536 | struct drm_file *file_priv) | 2542 | struct drm_file *file_priv) |
2537 | { | 2543 | { |
2544 | drm_i915_private_t *dev_priv = dev->dev_private; | ||
2538 | int ret; | 2545 | int ret; |
2539 | 2546 | ||
2540 | ret = i915_gem_idle(dev); | 2547 | ret = i915_gem_idle(dev); |
2541 | drm_irq_uninstall(dev); | 2548 | drm_irq_uninstall(dev); |
2542 | 2549 | ||
2550 | io_mapping_free(dev_priv->mm.gtt_mapping); | ||
2543 | return ret; | 2551 | return ret; |
2544 | } | 2552 | } |
2545 | 2553 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c index 59a2132a8f57..073894824e6b 100644 --- a/drivers/gpu/drm/radeon/radeon_cp.c +++ b/drivers/gpu/drm/radeon/radeon_cp.c | |||
@@ -653,15 +653,16 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev, | |||
653 | RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7); | 653 | RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7); |
654 | 654 | ||
655 | /* Turn on bus mastering */ | 655 | /* Turn on bus mastering */ |
656 | if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) || | 656 | if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || |
657 | ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || | ||
658 | ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) { | 657 | ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) { |
659 | /* rs400, rs690/rs740 */ | 658 | /* rs600/rs690/rs740 */ |
660 | tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS400_BUS_MASTER_DIS; | 659 | tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS; |
661 | RADEON_WRITE(RADEON_BUS_CNTL, tmp); | 660 | RADEON_WRITE(RADEON_BUS_CNTL, tmp); |
662 | } else if (!(((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) || | 661 | } else if (((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV350) || |
663 | ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R423))) { | 662 | ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) || |
664 | /* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */ | 663 | ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) || |
664 | ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) { | ||
665 | /* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */ | ||
665 | tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS; | 666 | tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS; |
666 | RADEON_WRITE(RADEON_BUS_CNTL, tmp); | 667 | RADEON_WRITE(RADEON_BUS_CNTL, tmp); |
667 | } /* PCIE cards appears to not need this */ | 668 | } /* PCIE cards appears to not need this */ |
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h index 4dbb813910c3..02f5575ba395 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.h +++ b/drivers/gpu/drm/radeon/radeon_drv.h | |||
@@ -447,12 +447,12 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, | |||
447 | * handling, not bus mastering itself. | 447 | * handling, not bus mastering itself. |
448 | */ | 448 | */ |
449 | #define RADEON_BUS_CNTL 0x0030 | 449 | #define RADEON_BUS_CNTL 0x0030 |
450 | /* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */ | 450 | /* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */ |
451 | # define RADEON_BUS_MASTER_DIS (1 << 6) | 451 | # define RADEON_BUS_MASTER_DIS (1 << 6) |
452 | /* rs400, rs690/rs740 */ | 452 | /* rs600/rs690/rs740 */ |
453 | # define RS400_BUS_MASTER_DIS (1 << 14) | 453 | # define RS600_BUS_MASTER_DIS (1 << 14) |
454 | # define RS400_MSI_REARM (1 << 20) | 454 | # define RS600_MSI_REARM (1 << 20) |
455 | /* see RS480_MSI_REARM in AIC_CNTL for rs480 */ | 455 | /* see RS400_MSI_REARM in AIC_CNTL for rs480 */ |
456 | 456 | ||
457 | #define RADEON_BUS_CNTL1 0x0034 | 457 | #define RADEON_BUS_CNTL1 0x0034 |
458 | # define RADEON_PMI_BM_DIS (1 << 2) | 458 | # define RADEON_PMI_BM_DIS (1 << 2) |
@@ -937,7 +937,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev, | |||
937 | 937 | ||
938 | #define RADEON_AIC_CNTL 0x01d0 | 938 | #define RADEON_AIC_CNTL 0x01d0 |
939 | # define RADEON_PCIGART_TRANSLATE_EN (1 << 0) | 939 | # define RADEON_PCIGART_TRANSLATE_EN (1 << 0) |
940 | # define RS480_MSI_REARM (1 << 3) | 940 | # define RS400_MSI_REARM (1 << 3) |
941 | #define RADEON_AIC_STAT 0x01d4 | 941 | #define RADEON_AIC_STAT 0x01d4 |
942 | #define RADEON_AIC_PT_BASE 0x01d8 | 942 | #define RADEON_AIC_PT_BASE 0x01d8 |
943 | #define RADEON_AIC_LO_ADDR 0x01dc | 943 | #define RADEON_AIC_LO_ADDR 0x01dc |
diff --git a/drivers/hid/usbhid/hiddev.c b/drivers/hid/usbhid/hiddev.c index 3ac320785fc5..83e851a5ed30 100644 --- a/drivers/hid/usbhid/hiddev.c +++ b/drivers/hid/usbhid/hiddev.c | |||
@@ -242,8 +242,6 @@ static int hiddev_release(struct inode * inode, struct file * file) | |||
242 | struct hiddev_list *list = file->private_data; | 242 | struct hiddev_list *list = file->private_data; |
243 | unsigned long flags; | 243 | unsigned long flags; |
244 | 244 | ||
245 | hiddev_fasync(-1, file, 0); | ||
246 | |||
247 | spin_lock_irqsave(&list->hiddev->list_lock, flags); | 245 | spin_lock_irqsave(&list->hiddev->list_lock, flags); |
248 | list_del(&list->node); | 246 | list_del(&list->node); |
249 | spin_unlock_irqrestore(&list->hiddev->list_lock, flags); | 247 | spin_unlock_irqrestore(&list->hiddev->list_lock, flags); |
diff --git a/drivers/hwmon/applesmc.c b/drivers/hwmon/applesmc.c index bc011da79e14..be3285912cb7 100644 --- a/drivers/hwmon/applesmc.c +++ b/drivers/hwmon/applesmc.c | |||
@@ -116,6 +116,18 @@ static const char* temperature_sensors_sets[][36] = { | |||
116 | /* Set 9: Macbook Pro 3,1 (Santa Rosa) */ | 116 | /* Set 9: Macbook Pro 3,1 (Santa Rosa) */ |
117 | { "TALP", "TB0T", "TC0D", "TC0P", "TG0D", "TG0H", "TTF0", "TW0P", | 117 | { "TALP", "TB0T", "TC0D", "TC0P", "TG0D", "TG0H", "TTF0", "TW0P", |
118 | "Th0H", "Th1H", "Th2H", "Tm0P", "Ts0P", NULL }, | 118 | "Th0H", "Th1H", "Th2H", "Tm0P", "Ts0P", NULL }, |
119 | /* Set 10: iMac 5,1 */ | ||
120 | { "TA0P", "TC0D", "TC0P", "TG0D", "TH0P", "TO0P", "Tm0P", NULL }, | ||
121 | /* Set 11: Macbook 5,1 */ | ||
122 | { "TB0T", "TB1T", "TB2T", "TB3T", "TC0D", "TC0P", "TN0D", "TN0P", | ||
123 | "TTF0", "Th0H", "Th1H", "ThFH", "Ts0P", "Ts0S", NULL }, | ||
124 | /* Set 12: Macbook Pro 5,1 */ | ||
125 | { "TB0T", "TB1T", "TB2T", "TB3T", "TC0D", "TC0F", "TC0P", "TG0D", | ||
126 | "TG0F", "TG0H", "TG0P", "TG0T", "TG1H", "TN0D", "TN0P", "TTF0", | ||
127 | "Th2H", "Tm0P", "Ts0P", "Ts0S", NULL }, | ||
128 | /* Set 13: iMac 8,1 */ | ||
129 | { "TA0P", "TC0D", "TC0H", "TC0P", "TG0D", "TG0H", "TG0P", "TH0P", | ||
130 | "TL0P", "TO0P", "TW0P", "Tm0P", "Tp0P", NULL }, | ||
119 | }; | 131 | }; |
120 | 132 | ||
121 | /* List of keys used to read/write fan speeds */ | 133 | /* List of keys used to read/write fan speeds */ |
@@ -1276,6 +1288,14 @@ static __initdata struct dmi_match_data applesmc_dmi_data[] = { | |||
1276 | { .accelerometer = 1, .light = 1, .temperature_set = 8 }, | 1288 | { .accelerometer = 1, .light = 1, .temperature_set = 8 }, |
1277 | /* MacBook Pro 3: accelerometer, backlight and temperature set 9 */ | 1289 | /* MacBook Pro 3: accelerometer, backlight and temperature set 9 */ |
1278 | { .accelerometer = 1, .light = 1, .temperature_set = 9 }, | 1290 | { .accelerometer = 1, .light = 1, .temperature_set = 9 }, |
1291 | /* iMac 5: light sensor only, temperature set 10 */ | ||
1292 | { .accelerometer = 0, .light = 0, .temperature_set = 10 }, | ||
1293 | /* MacBook 5: accelerometer, backlight and temperature set 11 */ | ||
1294 | { .accelerometer = 1, .light = 1, .temperature_set = 11 }, | ||
1295 | /* MacBook Pro 5: accelerometer, backlight and temperature set 12 */ | ||
1296 | { .accelerometer = 1, .light = 1, .temperature_set = 12 }, | ||
1297 | /* iMac 8: light sensor only, temperature set 13 */ | ||
1298 | { .accelerometer = 0, .light = 0, .temperature_set = 13 }, | ||
1279 | }; | 1299 | }; |
1280 | 1300 | ||
1281 | /* Note that DMI_MATCH(...,"MacBook") will match "MacBookPro1,1". | 1301 | /* Note that DMI_MATCH(...,"MacBook") will match "MacBookPro1,1". |
@@ -1285,6 +1305,10 @@ static __initdata struct dmi_system_id applesmc_whitelist[] = { | |||
1285 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple"), | 1305 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple"), |
1286 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookAir") }, | 1306 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookAir") }, |
1287 | &applesmc_dmi_data[7]}, | 1307 | &applesmc_dmi_data[7]}, |
1308 | { applesmc_dmi_match, "Apple MacBook Pro 5", { | ||
1309 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple"), | ||
1310 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5") }, | ||
1311 | &applesmc_dmi_data[12]}, | ||
1288 | { applesmc_dmi_match, "Apple MacBook Pro 4", { | 1312 | { applesmc_dmi_match, "Apple MacBook Pro 4", { |
1289 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple"), | 1313 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple"), |
1290 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro4") }, | 1314 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro4") }, |
@@ -1305,6 +1329,10 @@ static __initdata struct dmi_system_id applesmc_whitelist[] = { | |||
1305 | DMI_MATCH(DMI_BOARD_VENDOR,"Apple"), | 1329 | DMI_MATCH(DMI_BOARD_VENDOR,"Apple"), |
1306 | DMI_MATCH(DMI_PRODUCT_NAME,"MacBook3") }, | 1330 | DMI_MATCH(DMI_PRODUCT_NAME,"MacBook3") }, |
1307 | &applesmc_dmi_data[6]}, | 1331 | &applesmc_dmi_data[6]}, |
1332 | { applesmc_dmi_match, "Apple MacBook 5", { | ||
1333 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple"), | ||
1334 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBook5") }, | ||
1335 | &applesmc_dmi_data[11]}, | ||
1308 | { applesmc_dmi_match, "Apple MacBook", { | 1336 | { applesmc_dmi_match, "Apple MacBook", { |
1309 | DMI_MATCH(DMI_BOARD_VENDOR,"Apple"), | 1337 | DMI_MATCH(DMI_BOARD_VENDOR,"Apple"), |
1310 | DMI_MATCH(DMI_PRODUCT_NAME,"MacBook") }, | 1338 | DMI_MATCH(DMI_PRODUCT_NAME,"MacBook") }, |
@@ -1317,6 +1345,14 @@ static __initdata struct dmi_system_id applesmc_whitelist[] = { | |||
1317 | DMI_MATCH(DMI_BOARD_VENDOR,"Apple"), | 1345 | DMI_MATCH(DMI_BOARD_VENDOR,"Apple"), |
1318 | DMI_MATCH(DMI_PRODUCT_NAME,"MacPro2") }, | 1346 | DMI_MATCH(DMI_PRODUCT_NAME,"MacPro2") }, |
1319 | &applesmc_dmi_data[4]}, | 1347 | &applesmc_dmi_data[4]}, |
1348 | { applesmc_dmi_match, "Apple iMac 8", { | ||
1349 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple"), | ||
1350 | DMI_MATCH(DMI_PRODUCT_NAME, "iMac8") }, | ||
1351 | &applesmc_dmi_data[13]}, | ||
1352 | { applesmc_dmi_match, "Apple iMac 5", { | ||
1353 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple"), | ||
1354 | DMI_MATCH(DMI_PRODUCT_NAME, "iMac5") }, | ||
1355 | &applesmc_dmi_data[10]}, | ||
1320 | { applesmc_dmi_match, "Apple iMac", { | 1356 | { applesmc_dmi_match, "Apple iMac", { |
1321 | DMI_MATCH(DMI_BOARD_VENDOR,"Apple"), | 1357 | DMI_MATCH(DMI_BOARD_VENDOR,"Apple"), |
1322 | DMI_MATCH(DMI_PRODUCT_NAME,"iMac") }, | 1358 | DMI_MATCH(DMI_PRODUCT_NAME,"iMac") }, |
diff --git a/drivers/ide/alim15x3.c b/drivers/ide/alim15x3.c index daf9dce39e52..e56c7b72f9e2 100644 --- a/drivers/ide/alim15x3.c +++ b/drivers/ide/alim15x3.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) | 6 | * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) |
7 | * May be copied or modified under the terms of the GNU General Public License | 7 | * May be copied or modified under the terms of the GNU General Public License |
8 | * Copyright (C) 2002 Alan Cox <alan@redhat.com> | 8 | * Copyright (C) 2002 Alan Cox |
9 | * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> | 9 | * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> |
10 | * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> | 10 | * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> |
11 | * Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 11 | * Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> |
diff --git a/drivers/ide/hpt366.c b/drivers/ide/hpt366.c index a7909e9c720e..f5afd46ed51c 100644 --- a/drivers/ide/hpt366.c +++ b/drivers/ide/hpt366.c | |||
@@ -52,7 +52,7 @@ | |||
52 | * different clocks on read/write. This requires overloading rw_disk and | 52 | * different clocks on read/write. This requires overloading rw_disk and |
53 | * other deeply crazy things. Thanks to <http://www.hoerstreich.de> for | 53 | * other deeply crazy things. Thanks to <http://www.hoerstreich.de> for |
54 | * keeping me sane. | 54 | * keeping me sane. |
55 | * Alan Cox <alan@redhat.com> | 55 | * Alan Cox <alan@lxorguk.ukuu.org.uk> |
56 | * | 56 | * |
57 | * - fix the clock turnaround code: it was writing to the wrong ports when | 57 | * - fix the clock turnaround code: it was writing to the wrong ports when |
58 | * called for the secondary channel, caching the current clock mode per- | 58 | * called for the secondary channel, caching the current clock mode per- |
diff --git a/drivers/ide/ide-cd.c b/drivers/ide/ide-cd.c index 48b5eda3ab41..42ab6d8715f2 100644 --- a/drivers/ide/ide-cd.c +++ b/drivers/ide/ide-cd.c | |||
@@ -1250,7 +1250,8 @@ static void cdrom_do_block_pc(ide_drive_t *drive, struct request *rq) | |||
1250 | * separate masks. | 1250 | * separate masks. |
1251 | */ | 1251 | */ |
1252 | alignment = queue_dma_alignment(q) | q->dma_pad_mask; | 1252 | alignment = queue_dma_alignment(q) | q->dma_pad_mask; |
1253 | if ((unsigned long)buf & alignment || rq->data_len & alignment | 1253 | if ((unsigned long)buf & alignment |
1254 | || rq->data_len & q->dma_pad_mask | ||
1254 | || object_is_on_stack(buf)) | 1255 | || object_is_on_stack(buf)) |
1255 | drive->dma = 0; | 1256 | drive->dma = 0; |
1256 | } | 1257 | } |
diff --git a/drivers/ide/ide-disk.c b/drivers/ide/ide-disk.c index e5adebe8ac2c..eb9fac4d0f0c 100644 --- a/drivers/ide/ide-disk.c +++ b/drivers/ide/ide-disk.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * Copyright (C) 1994-1998 Linus Torvalds & authors (see below) | 2 | * Copyright (C) 1994-1998 Linus Torvalds & authors (see below) |
3 | * Copyright (C) 1998-2002 Linux ATA Development | 3 | * Copyright (C) 1998-2002 Linux ATA Development |
4 | * Andre Hedrick <andre@linux-ide.org> | 4 | * Andre Hedrick <andre@linux-ide.org> |
5 | * Copyright (C) 2003 Red Hat <alan@redhat.com> | 5 | * Copyright (C) 2003 Red Hat |
6 | * Copyright (C) 2003-2005, 2007 Bartlomiej Zolnierkiewicz | 6 | * Copyright (C) 2003-2005, 2007 Bartlomiej Zolnierkiewicz |
7 | */ | 7 | */ |
8 | 8 | ||
diff --git a/drivers/ide/ide-gd.c b/drivers/ide/ide-gd.c index 7b6662854374..b8078b3231f7 100644 --- a/drivers/ide/ide-gd.c +++ b/drivers/ide/ide-gd.c | |||
@@ -281,7 +281,12 @@ static int ide_gd_media_changed(struct gendisk *disk) | |||
281 | static int ide_gd_revalidate_disk(struct gendisk *disk) | 281 | static int ide_gd_revalidate_disk(struct gendisk *disk) |
282 | { | 282 | { |
283 | struct ide_disk_obj *idkp = ide_drv_g(disk, ide_disk_obj); | 283 | struct ide_disk_obj *idkp = ide_drv_g(disk, ide_disk_obj); |
284 | set_capacity(disk, ide_gd_capacity(idkp->drive)); | 284 | ide_drive_t *drive = idkp->drive; |
285 | |||
286 | if (ide_gd_media_changed(disk)) | ||
287 | drive->disk_ops->get_capacity(drive); | ||
288 | |||
289 | set_capacity(disk, ide_gd_capacity(drive)); | ||
285 | return 0; | 290 | return 0; |
286 | } | 291 | } |
287 | 292 | ||
diff --git a/drivers/ide/ide-iops.c b/drivers/ide/ide-iops.c index bb7a1ed8094e..5d6ba14e211d 100644 --- a/drivers/ide/ide-iops.c +++ b/drivers/ide/ide-iops.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> | 2 | * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> |
3 | * Copyright (C) 2003 Red Hat <alan@redhat.com> | 3 | * Copyright (C) 2003 Red Hat |
4 | * | 4 | * |
5 | */ | 5 | */ |
6 | 6 | ||
diff --git a/drivers/ide/ide-pci-generic.c b/drivers/ide/ide-pci-generic.c index 474f96a7c076..bddae2b329a0 100644 --- a/drivers/ide/ide-pci-generic.c +++ b/drivers/ide/ide-pci-generic.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> | 2 | * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> |
3 | * Portions (C) Copyright 2002 Red Hat Inc <alan@redhat.com> | 3 | * Portions (C) Copyright 2002 Red Hat Inc |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of the GNU General Public License as published by the | 6 | * under the terms of the GNU General Public License as published by the |
diff --git a/drivers/ide/ide-proc.c b/drivers/ide/ide-proc.c index c31d0dd7a532..f3cddd1b2f8f 100644 --- a/drivers/ide/ide-proc.c +++ b/drivers/ide/ide-proc.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 1997-1998 Mark Lord | 2 | * Copyright (C) 1997-1998 Mark Lord |
3 | * Copyright (C) 2003 Red Hat <alan@redhat.com> | 3 | * Copyright (C) 2003 Red Hat |
4 | * | 4 | * |
5 | * Some code was moved here from ide.c, see it for original copyrights. | 5 | * Some code was moved here from ide.c, see it for original copyrights. |
6 | */ | 6 | */ |
diff --git a/drivers/ide/it821x.c b/drivers/ide/it821x.c index 995e18bb3139..ef004089761b 100644 --- a/drivers/ide/it821x.c +++ b/drivers/ide/it821x.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2004 Red Hat <alan@redhat.com> | 2 | * Copyright (C) 2004 Red Hat |
3 | * Copyright (C) 2007 Bartlomiej Zolnierkiewicz | 3 | * Copyright (C) 2007 Bartlomiej Zolnierkiewicz |
4 | * | 4 | * |
5 | * May be copied or modified under the terms of the GNU General Public License | 5 | * May be copied or modified under the terms of the GNU General Public License |
diff --git a/drivers/ide/jmicron.c b/drivers/ide/jmicron.c index 9a68433cf46d..bf2be6431b20 100644 --- a/drivers/ide/jmicron.c +++ b/drivers/ide/jmicron.c | |||
@@ -1,6 +1,6 @@ | |||
1 | 1 | ||
2 | /* | 2 | /* |
3 | * Copyright (C) 2006 Red Hat <alan@redhat.com> | 3 | * Copyright (C) 2006 Red Hat |
4 | * | 4 | * |
5 | * May be copied or modified under the terms of the GNU General Public License | 5 | * May be copied or modified under the terms of the GNU General Public License |
6 | */ | 6 | */ |
diff --git a/drivers/ide/piix.c b/drivers/ide/piix.c index d63f9fdca76b..61d2d920a5cd 100644 --- a/drivers/ide/piix.c +++ b/drivers/ide/piix.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer | 2 | * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer |
3 | * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> | 3 | * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> |
4 | * Copyright (C) 2003 Red Hat Inc <alan@redhat.com> | 4 | * Copyright (C) 2003 Red Hat |
5 | * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com> | 5 | * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com> |
6 | * | 6 | * |
7 | * May be copied or modified under the terms of the GNU General Public License | 7 | * May be copied or modified under the terms of the GNU General Public License |
diff --git a/drivers/ide/scc_pata.c b/drivers/ide/scc_pata.c index f26aa5d54efb..0f48f9dacfa5 100644 --- a/drivers/ide/scc_pata.c +++ b/drivers/ide/scc_pata.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * This code is based on drivers/ide/pci/siimage.c: | 6 | * This code is based on drivers/ide/pci/siimage.c: |
7 | * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> | 7 | * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> |
8 | * Copyright (C) 2003 Red Hat <alan@redhat.com> | 8 | * Copyright (C) 2003 Red Hat |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License as published by | 11 | * it under the terms of the GNU General Public License as published by |
diff --git a/drivers/ide/siimage.c b/drivers/ide/siimage.c index c3107df7773d..7d622d20bc4c 100644 --- a/drivers/ide/siimage.c +++ b/drivers/ide/siimage.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> | 2 | * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> |
3 | * Copyright (C) 2003 Red Hat <alan@redhat.com> | 3 | * Copyright (C) 2003 Red Hat |
4 | * Copyright (C) 2007-2008 MontaVista Software, Inc. | 4 | * Copyright (C) 2007-2008 MontaVista Software, Inc. |
5 | * Copyright (C) 2007-2008 Bartlomiej Zolnierkiewicz | 5 | * Copyright (C) 2007-2008 Bartlomiej Zolnierkiewicz |
6 | * | 6 | * |
diff --git a/drivers/ide/tx4938ide.c b/drivers/ide/tx4938ide.c index fa660f931a11..9120063e8f87 100644 --- a/drivers/ide/tx4938ide.c +++ b/drivers/ide/tx4938ide.c | |||
@@ -26,12 +26,13 @@ static void tx4938ide_tune_ebusc(unsigned int ebus_ch, | |||
26 | unsigned int sp = (cr >> 4) & 3; | 26 | unsigned int sp = (cr >> 4) & 3; |
27 | unsigned int clock = gbus_clock / (4 - sp); | 27 | unsigned int clock = gbus_clock / (4 - sp); |
28 | unsigned int cycle = 1000000000 / clock; | 28 | unsigned int cycle = 1000000000 / clock; |
29 | unsigned int wt, shwt; | 29 | unsigned int shwt; |
30 | int wt; | ||
30 | 31 | ||
31 | /* Minimum DIOx- active time */ | 32 | /* Minimum DIOx- active time */ |
32 | wt = DIV_ROUND_UP(t->act8b, cycle) - 2; | 33 | wt = DIV_ROUND_UP(t->act8b, cycle) - 2; |
33 | /* IORDY setup time: 35ns */ | 34 | /* IORDY setup time: 35ns */ |
34 | wt = max(wt, DIV_ROUND_UP(35, cycle)); | 35 | wt = max_t(int, wt, DIV_ROUND_UP(35, cycle)); |
35 | /* actual wait-cycle is max(wt & ~1, 1) */ | 36 | /* actual wait-cycle is max(wt & ~1, 1) */ |
36 | if (wt > 2 && (wt & 1)) | 37 | if (wt > 2 && (wt & 1)) |
37 | wt++; | 38 | wt++; |
@@ -39,10 +40,17 @@ static void tx4938ide_tune_ebusc(unsigned int ebus_ch, | |||
39 | /* Address-valid to DIOR/DIOW setup */ | 40 | /* Address-valid to DIOR/DIOW setup */ |
40 | shwt = DIV_ROUND_UP(t->setup, cycle); | 41 | shwt = DIV_ROUND_UP(t->setup, cycle); |
41 | 42 | ||
43 | /* -DIOx recovery time (SHWT * 4) and cycle time requirement */ | ||
44 | while ((shwt * 4 + wt + (wt ? 2 : 3)) * cycle < t->cycle) | ||
45 | shwt++; | ||
46 | if (shwt > 7) { | ||
47 | pr_warning("tx4938ide: SHWT violation (%d)\n", shwt); | ||
48 | shwt = 7; | ||
49 | } | ||
42 | pr_debug("tx4938ide: ebus %d, bus cycle %dns, WT %d, SHWT %d\n", | 50 | pr_debug("tx4938ide: ebus %d, bus cycle %dns, WT %d, SHWT %d\n", |
43 | ebus_ch, cycle, wt, shwt); | 51 | ebus_ch, cycle, wt, shwt); |
44 | 52 | ||
45 | __raw_writeq((cr & ~(0x3f007ull)) | (wt << 12) | shwt, | 53 | __raw_writeq((cr & ~0x3f007ull) | (wt << 12) | shwt, |
46 | &tx4938_ebuscptr->cr[ebus_ch]); | 54 | &tx4938_ebuscptr->cr[ebus_ch]); |
47 | } | 55 | } |
48 | 56 | ||
@@ -228,7 +236,7 @@ static int __init tx4938ide_probe(struct platform_device *pdev) | |||
228 | struct resource *res; | 236 | struct resource *res; |
229 | struct tx4938ide_platform_info *pdata = pdev->dev.platform_data; | 237 | struct tx4938ide_platform_info *pdata = pdev->dev.platform_data; |
230 | int irq, ret, i; | 238 | int irq, ret, i; |
231 | unsigned long mapbase; | 239 | unsigned long mapbase, mapctl; |
232 | struct ide_port_info d = tx4938ide_port_info; | 240 | struct ide_port_info d = tx4938ide_port_info; |
233 | 241 | ||
234 | irq = platform_get_irq(pdev, 0); | 242 | irq = platform_get_irq(pdev, 0); |
@@ -242,38 +250,43 @@ static int __init tx4938ide_probe(struct platform_device *pdev) | |||
242 | res->end - res->start + 1, "tx4938ide")) | 250 | res->end - res->start + 1, "tx4938ide")) |
243 | return -EBUSY; | 251 | return -EBUSY; |
244 | mapbase = (unsigned long)devm_ioremap(&pdev->dev, res->start, | 252 | mapbase = (unsigned long)devm_ioremap(&pdev->dev, res->start, |
245 | res->end - res->start + 1); | 253 | 8 << pdata->ioport_shift); |
246 | if (!mapbase) | 254 | mapctl = (unsigned long)devm_ioremap(&pdev->dev, |
255 | res->start + 0x10000 + | ||
256 | (6 << pdata->ioport_shift), | ||
257 | 1 << pdata->ioport_shift); | ||
258 | if (!mapbase || !mapctl) | ||
247 | return -EBUSY; | 259 | return -EBUSY; |
248 | 260 | ||
249 | memset(&hw, 0, sizeof(hw)); | 261 | memset(&hw, 0, sizeof(hw)); |
250 | if (pdata->ioport_shift) { | 262 | if (pdata->ioport_shift) { |
251 | unsigned long port = mapbase; | 263 | unsigned long port = mapbase; |
264 | unsigned long ctl = mapctl; | ||
252 | 265 | ||
253 | hw.io_ports_array[0] = port; | 266 | hw.io_ports_array[0] = port; |
254 | #ifdef __BIG_ENDIAN | 267 | #ifdef __BIG_ENDIAN |
255 | port++; | 268 | port++; |
269 | ctl++; | ||
256 | #endif | 270 | #endif |
257 | for (i = 1; i <= 7; i++) | 271 | for (i = 1; i <= 7; i++) |
258 | hw.io_ports_array[i] = | 272 | hw.io_ports_array[i] = |
259 | port + (i << pdata->ioport_shift); | 273 | port + (i << pdata->ioport_shift); |
260 | hw.io_ports.ctl_addr = | 274 | hw.io_ports.ctl_addr = ctl; |
261 | port + 0x10000 + (6 << pdata->ioport_shift); | ||
262 | } else | 275 | } else |
263 | ide_std_init_ports(&hw, mapbase, mapbase + 0x10006); | 276 | ide_std_init_ports(&hw, mapbase, mapctl); |
264 | hw.irq = irq; | 277 | hw.irq = irq; |
265 | hw.dev = &pdev->dev; | 278 | hw.dev = &pdev->dev; |
266 | 279 | ||
267 | pr_info("TX4938 IDE interface (base %#lx, irq %d)\n", mapbase, hw.irq); | 280 | pr_info("TX4938 IDE interface (base %#lx, ctl %#lx, irq %d)\n", |
281 | mapbase, mapctl, hw.irq); | ||
268 | if (pdata->gbus_clock) | 282 | if (pdata->gbus_clock) |
269 | tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, 0); | 283 | tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, 0); |
270 | else | 284 | else |
271 | d.port_ops = NULL; | 285 | d.port_ops = NULL; |
272 | ret = ide_host_add(&d, hws, &host); | 286 | ret = ide_host_add(&d, hws, &host); |
273 | if (ret) | 287 | if (!ret) |
274 | return ret; | 288 | platform_set_drvdata(pdev, host); |
275 | platform_set_drvdata(pdev, host); | 289 | return ret; |
276 | return 0; | ||
277 | } | 290 | } |
278 | 291 | ||
279 | static int __exit tx4938ide_remove(struct platform_device *pdev) | 292 | static int __exit tx4938ide_remove(struct platform_device *pdev) |
diff --git a/drivers/ieee1394/dv1394.c b/drivers/ieee1394/dv1394.c index 2f83543a9dfc..c19f23267157 100644 --- a/drivers/ieee1394/dv1394.c +++ b/drivers/ieee1394/dv1394.c | |||
@@ -1270,8 +1270,14 @@ static int dv1394_mmap(struct file *file, struct vm_area_struct *vma) | |||
1270 | struct video_card *video = file_to_video_card(file); | 1270 | struct video_card *video = file_to_video_card(file); |
1271 | int retval = -EINVAL; | 1271 | int retval = -EINVAL; |
1272 | 1272 | ||
1273 | /* serialize mmap */ | 1273 | /* |
1274 | mutex_lock(&video->mtx); | 1274 | * We cannot use the blocking variant mutex_lock here because .mmap |
1275 | * is called with mmap_sem held, while .ioctl, .read, .write acquire | ||
1276 | * video->mtx and subsequently call copy_to/from_user which will | ||
1277 | * grab mmap_sem in case of a page fault. | ||
1278 | */ | ||
1279 | if (!mutex_trylock(&video->mtx)) | ||
1280 | return -EAGAIN; | ||
1275 | 1281 | ||
1276 | if ( ! video_card_initialized(video) ) { | 1282 | if ( ! video_card_initialized(video) ) { |
1277 | retval = do_dv1394_init_default(video); | 1283 | retval = do_dv1394_init_default(video); |
@@ -1828,9 +1834,6 @@ static int dv1394_release(struct inode *inode, struct file *file) | |||
1828 | /* OK to free the DMA buffer, no more mappings can exist */ | 1834 | /* OK to free the DMA buffer, no more mappings can exist */ |
1829 | do_dv1394_shutdown(video, 1); | 1835 | do_dv1394_shutdown(video, 1); |
1830 | 1836 | ||
1831 | /* clean up async I/O users */ | ||
1832 | dv1394_fasync(-1, file, 0); | ||
1833 | |||
1834 | /* give someone else a turn */ | 1837 | /* give someone else a turn */ |
1835 | clear_bit(0, &video->open); | 1838 | clear_bit(0, &video->open); |
1836 | 1839 | ||
diff --git a/drivers/ieee1394/hosts.c b/drivers/ieee1394/hosts.c index 8dd09d850419..237d0c9d69c6 100644 --- a/drivers/ieee1394/hosts.c +++ b/drivers/ieee1394/hosts.c | |||
@@ -155,11 +155,11 @@ struct hpsb_host *hpsb_alloc_host(struct hpsb_host_driver *drv, size_t extra, | |||
155 | memcpy(&h->device, &nodemgr_dev_template_host, sizeof(h->device)); | 155 | memcpy(&h->device, &nodemgr_dev_template_host, sizeof(h->device)); |
156 | h->device.parent = dev; | 156 | h->device.parent = dev; |
157 | set_dev_node(&h->device, dev_to_node(dev)); | 157 | set_dev_node(&h->device, dev_to_node(dev)); |
158 | snprintf(h->device.bus_id, BUS_ID_SIZE, "fw-host%d", h->id); | 158 | dev_set_name(&h->device, "fw-host%d", h->id); |
159 | 159 | ||
160 | h->host_dev.parent = &h->device; | 160 | h->host_dev.parent = &h->device; |
161 | h->host_dev.class = &hpsb_host_class; | 161 | h->host_dev.class = &hpsb_host_class; |
162 | snprintf(h->host_dev.bus_id, BUS_ID_SIZE, "fw-host%d", h->id); | 162 | dev_set_name(&h->host_dev, "fw-host%d", h->id); |
163 | 163 | ||
164 | if (device_register(&h->device)) | 164 | if (device_register(&h->device)) |
165 | goto fail; | 165 | goto fail; |
diff --git a/drivers/ieee1394/nodemgr.c b/drivers/ieee1394/nodemgr.c index 2376b729e876..9e39f73282ee 100644 --- a/drivers/ieee1394/nodemgr.c +++ b/drivers/ieee1394/nodemgr.c | |||
@@ -826,13 +826,11 @@ static struct node_entry *nodemgr_create_node(octlet_t guid, | |||
826 | memcpy(&ne->device, &nodemgr_dev_template_ne, | 826 | memcpy(&ne->device, &nodemgr_dev_template_ne, |
827 | sizeof(ne->device)); | 827 | sizeof(ne->device)); |
828 | ne->device.parent = &host->device; | 828 | ne->device.parent = &host->device; |
829 | snprintf(ne->device.bus_id, BUS_ID_SIZE, "%016Lx", | 829 | dev_set_name(&ne->device, "%016Lx", (unsigned long long)(ne->guid)); |
830 | (unsigned long long)(ne->guid)); | ||
831 | 830 | ||
832 | ne->node_dev.parent = &ne->device; | 831 | ne->node_dev.parent = &ne->device; |
833 | ne->node_dev.class = &nodemgr_ne_class; | 832 | ne->node_dev.class = &nodemgr_ne_class; |
834 | snprintf(ne->node_dev.bus_id, BUS_ID_SIZE, "%016Lx", | 833 | dev_set_name(&ne->node_dev, "%016Lx", (unsigned long long)(ne->guid)); |
835 | (unsigned long long)(ne->guid)); | ||
836 | 834 | ||
837 | if (device_register(&ne->device)) | 835 | if (device_register(&ne->device)) |
838 | goto fail_devreg; | 836 | goto fail_devreg; |
@@ -932,13 +930,11 @@ static void nodemgr_register_device(struct node_entry *ne, | |||
932 | 930 | ||
933 | ud->device.parent = parent; | 931 | ud->device.parent = parent; |
934 | 932 | ||
935 | snprintf(ud->device.bus_id, BUS_ID_SIZE, "%s-%u", | 933 | dev_set_name(&ud->device, "%s-%u", dev_name(&ne->device), ud->id); |
936 | ne->device.bus_id, ud->id); | ||
937 | 934 | ||
938 | ud->unit_dev.parent = &ud->device; | 935 | ud->unit_dev.parent = &ud->device; |
939 | ud->unit_dev.class = &nodemgr_ud_class; | 936 | ud->unit_dev.class = &nodemgr_ud_class; |
940 | snprintf(ud->unit_dev.bus_id, BUS_ID_SIZE, "%s-%u", | 937 | dev_set_name(&ud->unit_dev, "%s-%u", dev_name(&ne->device), ud->id); |
941 | ne->device.bus_id, ud->id); | ||
942 | 938 | ||
943 | if (device_register(&ud->device)) | 939 | if (device_register(&ud->device)) |
944 | goto fail_devreg; | 940 | goto fail_devreg; |
@@ -953,7 +949,7 @@ static void nodemgr_register_device(struct node_entry *ne, | |||
953 | fail_classdevreg: | 949 | fail_classdevreg: |
954 | device_unregister(&ud->device); | 950 | device_unregister(&ud->device); |
955 | fail_devreg: | 951 | fail_devreg: |
956 | HPSB_ERR("Failed to create unit %s", ud->device.bus_id); | 952 | HPSB_ERR("Failed to create unit %s", dev_name(&ud->device)); |
957 | } | 953 | } |
958 | 954 | ||
959 | 955 | ||
diff --git a/drivers/ieee1394/raw1394.c b/drivers/ieee1394/raw1394.c index 9f19ac492106..bf7e761c12b1 100644 --- a/drivers/ieee1394/raw1394.c +++ b/drivers/ieee1394/raw1394.c | |||
@@ -2268,7 +2268,8 @@ static ssize_t raw1394_write(struct file *file, const char __user * buffer, | |||
2268 | return -EFAULT; | 2268 | return -EFAULT; |
2269 | } | 2269 | } |
2270 | 2270 | ||
2271 | mutex_lock(&fi->state_mutex); | 2271 | if (!mutex_trylock(&fi->state_mutex)) |
2272 | return -EAGAIN; | ||
2272 | 2273 | ||
2273 | switch (fi->state) { | 2274 | switch (fi->state) { |
2274 | case opened: | 2275 | case opened: |
@@ -2548,7 +2549,8 @@ static int raw1394_mmap(struct file *file, struct vm_area_struct *vma) | |||
2548 | struct file_info *fi = file->private_data; | 2549 | struct file_info *fi = file->private_data; |
2549 | int ret; | 2550 | int ret; |
2550 | 2551 | ||
2551 | mutex_lock(&fi->state_mutex); | 2552 | if (!mutex_trylock(&fi->state_mutex)) |
2553 | return -EAGAIN; | ||
2552 | 2554 | ||
2553 | if (fi->iso_state == RAW1394_ISO_INACTIVE) | 2555 | if (fi->iso_state == RAW1394_ISO_INACTIVE) |
2554 | ret = -EINVAL; | 2556 | ret = -EINVAL; |
@@ -2669,7 +2671,8 @@ static long raw1394_ioctl(struct file *file, unsigned int cmd, | |||
2669 | break; | 2671 | break; |
2670 | } | 2672 | } |
2671 | 2673 | ||
2672 | mutex_lock(&fi->state_mutex); | 2674 | if (!mutex_trylock(&fi->state_mutex)) |
2675 | return -EAGAIN; | ||
2673 | 2676 | ||
2674 | switch (fi->iso_state) { | 2677 | switch (fi->iso_state) { |
2675 | case RAW1394_ISO_INACTIVE: | 2678 | case RAW1394_ISO_INACTIVE: |
diff --git a/drivers/infiniband/core/uverbs_main.c b/drivers/infiniband/core/uverbs_main.c index d85af1b67027..eb36a81dd09b 100644 --- a/drivers/infiniband/core/uverbs_main.c +++ b/drivers/infiniband/core/uverbs_main.c | |||
@@ -358,8 +358,6 @@ static int ib_uverbs_event_close(struct inode *inode, struct file *filp) | |||
358 | } | 358 | } |
359 | spin_unlock_irq(&file->lock); | 359 | spin_unlock_irq(&file->lock); |
360 | 360 | ||
361 | ib_uverbs_event_fasync(-1, filp, 0); | ||
362 | |||
363 | if (file->is_async) { | 361 | if (file->is_async) { |
364 | ib_unregister_event_handler(&file->uverbs_file->event_handler); | 362 | ib_unregister_event_handler(&file->uverbs_file->event_handler); |
365 | kref_put(&file->uverbs_file->ref, ib_uverbs_release_file); | 363 | kref_put(&file->uverbs_file->ref, ib_uverbs_release_file); |
diff --git a/drivers/input/evdev.c b/drivers/input/evdev.c index 3524bef62be6..1070db330d35 100644 --- a/drivers/input/evdev.c +++ b/drivers/input/evdev.c | |||
@@ -235,7 +235,6 @@ static int evdev_release(struct inode *inode, struct file *file) | |||
235 | evdev_ungrab(evdev, client); | 235 | evdev_ungrab(evdev, client); |
236 | mutex_unlock(&evdev->mutex); | 236 | mutex_unlock(&evdev->mutex); |
237 | 237 | ||
238 | evdev_fasync(-1, file, 0); | ||
239 | evdev_detach_client(evdev, client); | 238 | evdev_detach_client(evdev, client); |
240 | kfree(client); | 239 | kfree(client); |
241 | 240 | ||
diff --git a/drivers/input/joydev.c b/drivers/input/joydev.c index 65d7077a75a1..a85b1485e774 100644 --- a/drivers/input/joydev.c +++ b/drivers/input/joydev.c | |||
@@ -244,7 +244,6 @@ static int joydev_release(struct inode *inode, struct file *file) | |||
244 | struct joydev_client *client = file->private_data; | 244 | struct joydev_client *client = file->private_data; |
245 | struct joydev *joydev = client->joydev; | 245 | struct joydev *joydev = client->joydev; |
246 | 246 | ||
247 | joydev_fasync(-1, file, 0); | ||
248 | joydev_detach_client(joydev, client); | 247 | joydev_detach_client(joydev, client); |
249 | kfree(client); | 248 | kfree(client); |
250 | 249 | ||
diff --git a/drivers/input/misc/hp_sdc_rtc.c b/drivers/input/misc/hp_sdc_rtc.c index 82ec6b1b6467..216a559f55ea 100644 --- a/drivers/input/misc/hp_sdc_rtc.c +++ b/drivers/input/misc/hp_sdc_rtc.c | |||
@@ -71,7 +71,6 @@ static int hp_sdc_rtc_ioctl(struct inode *inode, struct file *file, | |||
71 | static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait); | 71 | static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait); |
72 | 72 | ||
73 | static int hp_sdc_rtc_open(struct inode *inode, struct file *file); | 73 | static int hp_sdc_rtc_open(struct inode *inode, struct file *file); |
74 | static int hp_sdc_rtc_release(struct inode *inode, struct file *file); | ||
75 | static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on); | 74 | static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on); |
76 | 75 | ||
77 | static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off, | 76 | static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off, |
@@ -414,17 +413,6 @@ static int hp_sdc_rtc_open(struct inode *inode, struct file *file) | |||
414 | return 0; | 413 | return 0; |
415 | } | 414 | } |
416 | 415 | ||
417 | static int hp_sdc_rtc_release(struct inode *inode, struct file *file) | ||
418 | { | ||
419 | /* Turn off interrupts? */ | ||
420 | |||
421 | if (file->f_flags & FASYNC) { | ||
422 | hp_sdc_rtc_fasync (-1, file, 0); | ||
423 | } | ||
424 | |||
425 | return 0; | ||
426 | } | ||
427 | |||
428 | static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on) | 416 | static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on) |
429 | { | 417 | { |
430 | return fasync_helper (fd, filp, on, &hp_sdc_rtc_async_queue); | 418 | return fasync_helper (fd, filp, on, &hp_sdc_rtc_async_queue); |
@@ -680,7 +668,6 @@ static const struct file_operations hp_sdc_rtc_fops = { | |||
680 | .poll = hp_sdc_rtc_poll, | 668 | .poll = hp_sdc_rtc_poll, |
681 | .ioctl = hp_sdc_rtc_ioctl, | 669 | .ioctl = hp_sdc_rtc_ioctl, |
682 | .open = hp_sdc_rtc_open, | 670 | .open = hp_sdc_rtc_open, |
683 | .release = hp_sdc_rtc_release, | ||
684 | .fasync = hp_sdc_rtc_fasync, | 671 | .fasync = hp_sdc_rtc_fasync, |
685 | }; | 672 | }; |
686 | 673 | ||
diff --git a/drivers/input/mousedev.c b/drivers/input/mousedev.c index 8137e50ded87..d8c056fe7e98 100644 --- a/drivers/input/mousedev.c +++ b/drivers/input/mousedev.c | |||
@@ -519,7 +519,6 @@ static int mousedev_release(struct inode *inode, struct file *file) | |||
519 | struct mousedev_client *client = file->private_data; | 519 | struct mousedev_client *client = file->private_data; |
520 | struct mousedev *mousedev = client->mousedev; | 520 | struct mousedev *mousedev = client->mousedev; |
521 | 521 | ||
522 | mousedev_fasync(-1, file, 0); | ||
523 | mousedev_detach_client(mousedev, client); | 522 | mousedev_detach_client(mousedev, client); |
524 | kfree(client); | 523 | kfree(client); |
525 | 524 | ||
diff --git a/drivers/input/serio/serio_raw.c b/drivers/input/serio/serio_raw.c index 470770c09260..06bbd0e74c6f 100644 --- a/drivers/input/serio/serio_raw.c +++ b/drivers/input/serio/serio_raw.c | |||
@@ -135,7 +135,6 @@ static int serio_raw_release(struct inode *inode, struct file *file) | |||
135 | 135 | ||
136 | mutex_lock(&serio_raw_mutex); | 136 | mutex_lock(&serio_raw_mutex); |
137 | 137 | ||
138 | serio_raw_fasync(-1, file, 0); | ||
139 | serio_raw_cleanup(serio_raw); | 138 | serio_raw_cleanup(serio_raw); |
140 | 139 | ||
141 | mutex_unlock(&serio_raw_mutex); | 140 | mutex_unlock(&serio_raw_mutex); |
diff --git a/drivers/leds/leds-hp-disk.c b/drivers/leds/leds-hp-disk.c index 74645ab15660..44fa757d8254 100644 --- a/drivers/leds/leds-hp-disk.c +++ b/drivers/leds/leds-hp-disk.c | |||
@@ -27,7 +27,6 @@ | |||
27 | #include <linux/interrupt.h> | 27 | #include <linux/interrupt.h> |
28 | #include <linux/input.h> | 28 | #include <linux/input.h> |
29 | #include <linux/kthread.h> | 29 | #include <linux/kthread.h> |
30 | #include <linux/version.h> | ||
31 | #include <linux/leds.h> | 30 | #include <linux/leds.h> |
32 | #include <acpi/acpi_drivers.h> | 31 | #include <acpi/acpi_drivers.h> |
33 | 32 | ||
diff --git a/drivers/md/linear.c b/drivers/md/linear.c index 190147c79e79..3b90c5c924ec 100644 --- a/drivers/md/linear.c +++ b/drivers/md/linear.c | |||
@@ -148,6 +148,8 @@ static linear_conf_t *linear_conf(mddev_t *mddev, int raid_disks) | |||
148 | 148 | ||
149 | min_sectors = conf->array_sectors; | 149 | min_sectors = conf->array_sectors; |
150 | sector_div(min_sectors, PAGE_SIZE/sizeof(struct dev_info *)); | 150 | sector_div(min_sectors, PAGE_SIZE/sizeof(struct dev_info *)); |
151 | if (min_sectors == 0) | ||
152 | min_sectors = 1; | ||
151 | 153 | ||
152 | /* min_sectors is the minimum spacing that will fit the hash | 154 | /* min_sectors is the minimum spacing that will fit the hash |
153 | * table in one PAGE. This may be much smaller than needed. | 155 | * table in one PAGE. This may be much smaller than needed. |
diff --git a/drivers/md/md.c b/drivers/md/md.c index 9abf6ed16535..1b1d32694f6f 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c | |||
@@ -3884,7 +3884,6 @@ static int do_md_stop(mddev_t * mddev, int mode, int is_open) | |||
3884 | if (mode == 0) { | 3884 | if (mode == 0) { |
3885 | mdk_rdev_t *rdev; | 3885 | mdk_rdev_t *rdev; |
3886 | struct list_head *tmp; | 3886 | struct list_head *tmp; |
3887 | struct block_device *bdev; | ||
3888 | 3887 | ||
3889 | printk(KERN_INFO "md: %s stopped.\n", mdname(mddev)); | 3888 | printk(KERN_INFO "md: %s stopped.\n", mdname(mddev)); |
3890 | 3889 | ||
@@ -3941,11 +3940,6 @@ static int do_md_stop(mddev_t * mddev, int mode, int is_open) | |||
3941 | mddev->degraded = 0; | 3940 | mddev->degraded = 0; |
3942 | mddev->barriers_work = 0; | 3941 | mddev->barriers_work = 0; |
3943 | mddev->safemode = 0; | 3942 | mddev->safemode = 0; |
3944 | bdev = bdget_disk(mddev->gendisk, 0); | ||
3945 | if (bdev) { | ||
3946 | blkdev_ioctl(bdev, 0, BLKRRPART, 0); | ||
3947 | bdput(bdev); | ||
3948 | } | ||
3949 | kobject_uevent(&disk_to_dev(mddev->gendisk)->kobj, KOBJ_CHANGE); | 3943 | kobject_uevent(&disk_to_dev(mddev->gendisk)->kobj, KOBJ_CHANGE); |
3950 | 3944 | ||
3951 | } else if (mddev->pers) | 3945 | } else if (mddev->pers) |
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c index da5129a24b18..970a96ef9b18 100644 --- a/drivers/md/raid10.c +++ b/drivers/md/raid10.c | |||
@@ -1137,7 +1137,7 @@ static int raid10_add_disk(mddev_t *mddev, mdk_rdev_t *rdev) | |||
1137 | if (!enough(conf)) | 1137 | if (!enough(conf)) |
1138 | return -EINVAL; | 1138 | return -EINVAL; |
1139 | 1139 | ||
1140 | if (rdev->raid_disk) | 1140 | if (rdev->raid_disk >= 0) |
1141 | first = last = rdev->raid_disk; | 1141 | first = last = rdev->raid_disk; |
1142 | 1142 | ||
1143 | if (rdev->saved_raid_disk >= 0 && | 1143 | if (rdev->saved_raid_disk >= 0 && |
diff --git a/drivers/message/fusion/mptctl.c b/drivers/message/fusion/mptctl.c index f5233f3d9eff..b89f476cd0a9 100644 --- a/drivers/message/fusion/mptctl.c +++ b/drivers/message/fusion/mptctl.c | |||
@@ -559,12 +559,6 @@ mptctl_fasync(int fd, struct file *filep, int mode) | |||
559 | return ret; | 559 | return ret; |
560 | } | 560 | } |
561 | 561 | ||
562 | static int | ||
563 | mptctl_release(struct inode *inode, struct file *filep) | ||
564 | { | ||
565 | return fasync_helper(-1, filep, 0, &async_queue); | ||
566 | } | ||
567 | |||
568 | /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ | 562 | /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ |
569 | /* | 563 | /* |
570 | * MPT ioctl handler | 564 | * MPT ioctl handler |
@@ -2706,7 +2700,6 @@ mptctl_hp_targetinfo(unsigned long arg) | |||
2706 | static const struct file_operations mptctl_fops = { | 2700 | static const struct file_operations mptctl_fops = { |
2707 | .owner = THIS_MODULE, | 2701 | .owner = THIS_MODULE, |
2708 | .llseek = no_llseek, | 2702 | .llseek = no_llseek, |
2709 | .release = mptctl_release, | ||
2710 | .fasync = mptctl_fasync, | 2703 | .fasync = mptctl_fasync, |
2711 | .unlocked_ioctl = mptctl_ioctl, | 2704 | .unlocked_ioctl = mptctl_ioctl, |
2712 | #ifdef CONFIG_COMPAT | 2705 | #ifdef CONFIG_COMPAT |
diff --git a/drivers/message/i2o/i2o_config.c b/drivers/message/i2o/i2o_config.c index a3fabdbe6ca6..f3384c32b9a1 100644 --- a/drivers/message/i2o/i2o_config.c +++ b/drivers/message/i2o/i2o_config.c | |||
@@ -1097,28 +1097,17 @@ static int cfg_fasync(int fd, struct file *fp, int on) | |||
1097 | static int cfg_release(struct inode *inode, struct file *file) | 1097 | static int cfg_release(struct inode *inode, struct file *file) |
1098 | { | 1098 | { |
1099 | ulong id = (ulong) file->private_data; | 1099 | ulong id = (ulong) file->private_data; |
1100 | struct i2o_cfg_info *p1, *p2; | 1100 | struct i2o_cfg_info *p, **q; |
1101 | unsigned long flags; | 1101 | unsigned long flags; |
1102 | 1102 | ||
1103 | lock_kernel(); | 1103 | lock_kernel(); |
1104 | p1 = p2 = NULL; | ||
1105 | |||
1106 | spin_lock_irqsave(&i2o_config_lock, flags); | 1104 | spin_lock_irqsave(&i2o_config_lock, flags); |
1107 | for (p1 = open_files; p1;) { | 1105 | for (q = &open_files; (p = *q) != NULL; q = &p->next) { |
1108 | if (p1->q_id == id) { | 1106 | if (p->q_id == id) { |
1109 | 1107 | *q = p->next; | |
1110 | if (p1->fasync) | 1108 | kfree(p); |
1111 | cfg_fasync(-1, file, 0); | ||
1112 | if (p2) | ||
1113 | p2->next = p1->next; | ||
1114 | else | ||
1115 | open_files = p1->next; | ||
1116 | |||
1117 | kfree(p1); | ||
1118 | break; | 1109 | break; |
1119 | } | 1110 | } |
1120 | p2 = p1; | ||
1121 | p1 = p1->next; | ||
1122 | } | 1111 | } |
1123 | spin_unlock_irqrestore(&i2o_config_lock, flags); | 1112 | spin_unlock_irqrestore(&i2o_config_lock, flags); |
1124 | unlock_kernel(); | 1113 | unlock_kernel(); |
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index b550267c8d5e..257277394f8c 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig | |||
@@ -81,7 +81,7 @@ config MFD_TMIO | |||
81 | 81 | ||
82 | config MFD_T7L66XB | 82 | config MFD_T7L66XB |
83 | bool "Support Toshiba T7L66XB" | 83 | bool "Support Toshiba T7L66XB" |
84 | depends on ARM | 84 | depends on ARM && HAVE_CLK |
85 | select MFD_CORE | 85 | select MFD_CORE |
86 | select MFD_TMIO | 86 | select MFD_TMIO |
87 | help | 87 | help |
@@ -89,7 +89,7 @@ config MFD_T7L66XB | |||
89 | 89 | ||
90 | config MFD_TC6387XB | 90 | config MFD_TC6387XB |
91 | bool "Support Toshiba TC6387XB" | 91 | bool "Support Toshiba TC6387XB" |
92 | depends on ARM | 92 | depends on ARM && HAVE_CLK |
93 | select MFD_CORE | 93 | select MFD_CORE |
94 | select MFD_TMIO | 94 | select MFD_TMIO |
95 | help | 95 | help |
diff --git a/drivers/misc/panasonic-laptop.c b/drivers/misc/panasonic-laptop.c index a2cb598d8ab5..4a1bc64485d5 100644 --- a/drivers/misc/panasonic-laptop.c +++ b/drivers/misc/panasonic-laptop.c | |||
@@ -116,7 +116,6 @@ | |||
116 | * | 116 | * |
117 | */ | 117 | */ |
118 | 118 | ||
119 | #include <linux/version.h> | ||
120 | #include <linux/kernel.h> | 119 | #include <linux/kernel.h> |
121 | #include <linux/module.h> | 120 | #include <linux/module.h> |
122 | #include <linux/init.h> | 121 | #include <linux/init.h> |
diff --git a/drivers/misc/sony-laptop.c b/drivers/misc/sony-laptop.c index f483c4221f76..06f07e19dc70 100644 --- a/drivers/misc/sony-laptop.c +++ b/drivers/misc/sony-laptop.c | |||
@@ -1920,7 +1920,6 @@ static int sonypi_misc_fasync(int fd, struct file *filp, int on) | |||
1920 | 1920 | ||
1921 | static int sonypi_misc_release(struct inode *inode, struct file *file) | 1921 | static int sonypi_misc_release(struct inode *inode, struct file *file) |
1922 | { | 1922 | { |
1923 | sonypi_misc_fasync(-1, file, 0); | ||
1924 | atomic_dec(&sonypi_compat.open_count); | 1923 | atomic_dec(&sonypi_compat.open_count); |
1925 | return 0; | 1924 | return 0; |
1926 | } | 1925 | } |
diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c index 3e6f5d8609e8..d74ec46aa032 100644 --- a/drivers/mtd/chips/cfi_cmdset_0002.c +++ b/drivers/mtd/chips/cfi_cmdset_0002.c | |||
@@ -406,19 +406,6 @@ struct mtd_info *cfi_cmdset_0002(struct map_info *map, int primary) | |||
406 | /* Set the default CFI lock/unlock addresses */ | 406 | /* Set the default CFI lock/unlock addresses */ |
407 | cfi->addr_unlock1 = 0x555; | 407 | cfi->addr_unlock1 = 0x555; |
408 | cfi->addr_unlock2 = 0x2aa; | 408 | cfi->addr_unlock2 = 0x2aa; |
409 | /* Modify the unlock address if we are in compatibility mode */ | ||
410 | if ( /* x16 in x8 mode */ | ||
411 | ((cfi->device_type == CFI_DEVICETYPE_X8) && | ||
412 | (cfi->cfiq->InterfaceDesc == | ||
413 | CFI_INTERFACE_X8_BY_X16_ASYNC)) || | ||
414 | /* x32 in x16 mode */ | ||
415 | ((cfi->device_type == CFI_DEVICETYPE_X16) && | ||
416 | (cfi->cfiq->InterfaceDesc == | ||
417 | CFI_INTERFACE_X16_BY_X32_ASYNC))) | ||
418 | { | ||
419 | cfi->addr_unlock1 = 0xaaa; | ||
420 | cfi->addr_unlock2 = 0x555; | ||
421 | } | ||
422 | 409 | ||
423 | } /* CFI mode */ | 410 | } /* CFI mode */ |
424 | else if (cfi->cfi_mode == CFI_MODE_JEDEC) { | 411 | else if (cfi->cfi_mode == CFI_MODE_JEDEC) { |
diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c index f84ab6182148..2f3f2f719ba4 100644 --- a/drivers/mtd/chips/jedec_probe.c +++ b/drivers/mtd/chips/jedec_probe.c | |||
@@ -1808,9 +1808,7 @@ static inline u32 jedec_read_mfr(struct map_info *map, uint32_t base, | |||
1808 | * several first banks can contain 0x7f instead of actual ID | 1808 | * several first banks can contain 0x7f instead of actual ID |
1809 | */ | 1809 | */ |
1810 | do { | 1810 | do { |
1811 | uint32_t ofs = cfi_build_cmd_addr(0 + (bank << 8), | 1811 | uint32_t ofs = cfi_build_cmd_addr(0 + (bank << 8), map, cfi); |
1812 | cfi_interleave(cfi), | ||
1813 | cfi->device_type); | ||
1814 | mask = (1 << (cfi->device_type * 8)) - 1; | 1812 | mask = (1 << (cfi->device_type * 8)) - 1; |
1815 | result = map_read(map, base + ofs); | 1813 | result = map_read(map, base + ofs); |
1816 | bank++; | 1814 | bank++; |
@@ -1824,7 +1822,7 @@ static inline u32 jedec_read_id(struct map_info *map, uint32_t base, | |||
1824 | { | 1822 | { |
1825 | map_word result; | 1823 | map_word result; |
1826 | unsigned long mask; | 1824 | unsigned long mask; |
1827 | u32 ofs = cfi_build_cmd_addr(1, cfi_interleave(cfi), cfi->device_type); | 1825 | u32 ofs = cfi_build_cmd_addr(1, map, cfi); |
1828 | mask = (1 << (cfi->device_type * 8)) -1; | 1826 | mask = (1 << (cfi->device_type * 8)) -1; |
1829 | result = map_read(map, base + ofs); | 1827 | result = map_read(map, base + ofs); |
1830 | return result.x[0] & mask; | 1828 | return result.x[0] & mask; |
@@ -2067,8 +2065,8 @@ static int jedec_probe_chip(struct map_info *map, __u32 base, | |||
2067 | 2065 | ||
2068 | } | 2066 | } |
2069 | /* Ensure the unlock addresses we try stay inside the map */ | 2067 | /* Ensure the unlock addresses we try stay inside the map */ |
2070 | probe_offset1 = cfi_build_cmd_addr(cfi->addr_unlock1, cfi_interleave(cfi), cfi->device_type); | 2068 | probe_offset1 = cfi_build_cmd_addr(cfi->addr_unlock1, map, cfi); |
2071 | probe_offset2 = cfi_build_cmd_addr(cfi->addr_unlock2, cfi_interleave(cfi), cfi->device_type); | 2069 | probe_offset2 = cfi_build_cmd_addr(cfi->addr_unlock2, map, cfi); |
2072 | if ( ((base + probe_offset1 + map_bankwidth(map)) >= map->size) || | 2070 | if ( ((base + probe_offset1 + map_bankwidth(map)) >= map->size) || |
2073 | ((base + probe_offset2 + map_bankwidth(map)) >= map->size)) | 2071 | ((base + probe_offset2 + map_bankwidth(map)) >= map->size)) |
2074 | goto retry; | 2072 | goto retry; |
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c index 8387e05daae2..e39b21d3e168 100644 --- a/drivers/mtd/onenand/omap2.c +++ b/drivers/mtd/onenand/omap2.c | |||
@@ -38,7 +38,6 @@ | |||
38 | #include <asm/arch/gpmc.h> | 38 | #include <asm/arch/gpmc.h> |
39 | #include <asm/arch/onenand.h> | 39 | #include <asm/arch/onenand.h> |
40 | #include <asm/arch/gpio.h> | 40 | #include <asm/arch/gpio.h> |
41 | #include <asm/arch/gpmc.h> | ||
42 | #include <asm/arch/pm.h> | 41 | #include <asm/arch/pm.h> |
43 | 42 | ||
44 | #include <linux/dma-mapping.h> | 43 | #include <linux/dma-mapping.h> |
diff --git a/drivers/net/3c509.c b/drivers/net/3c509.c index 226a017a9991..535c234286ea 100644 --- a/drivers/net/3c509.c +++ b/drivers/net/3c509.c | |||
@@ -94,7 +94,7 @@ | |||
94 | #include <asm/io.h> | 94 | #include <asm/io.h> |
95 | #include <asm/irq.h> | 95 | #include <asm/irq.h> |
96 | 96 | ||
97 | static char version[] __initdata = DRV_NAME ".c:" DRV_VERSION " " DRV_RELDATE " becker@scyld.com\n"; | 97 | static char version[] __devinitdata = DRV_NAME ".c:" DRV_VERSION " " DRV_RELDATE " becker@scyld.com\n"; |
98 | 98 | ||
99 | #ifdef EL3_DEBUG | 99 | #ifdef EL3_DEBUG |
100 | static int el3_debug = EL3_DEBUG; | 100 | static int el3_debug = EL3_DEBUG; |
@@ -186,7 +186,7 @@ static int max_interrupt_work = 10; | |||
186 | static int nopnp; | 186 | static int nopnp; |
187 | #endif | 187 | #endif |
188 | 188 | ||
189 | static int __init el3_common_init(struct net_device *dev); | 189 | static int __devinit el3_common_init(struct net_device *dev); |
190 | static void el3_common_remove(struct net_device *dev); | 190 | static void el3_common_remove(struct net_device *dev); |
191 | static ushort id_read_eeprom(int index); | 191 | static ushort id_read_eeprom(int index); |
192 | static ushort read_eeprom(int ioaddr, int index); | 192 | static ushort read_eeprom(int ioaddr, int index); |
@@ -537,7 +537,7 @@ static struct mca_driver el3_mca_driver = { | |||
537 | static int mca_registered; | 537 | static int mca_registered; |
538 | #endif /* CONFIG_MCA */ | 538 | #endif /* CONFIG_MCA */ |
539 | 539 | ||
540 | static int __init el3_common_init(struct net_device *dev) | 540 | static int __devinit el3_common_init(struct net_device *dev) |
541 | { | 541 | { |
542 | struct el3_private *lp = netdev_priv(dev); | 542 | struct el3_private *lp = netdev_priv(dev); |
543 | int err; | 543 | int err; |
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 0f3e6b2d2808..1757bb3f6e08 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -1997,9 +1997,13 @@ config IGB_LRO | |||
1997 | If in doubt, say N. | 1997 | If in doubt, say N. |
1998 | 1998 | ||
1999 | config IGB_DCA | 1999 | config IGB_DCA |
2000 | bool "Enable DCA" | 2000 | bool "Direct Cache Access (DCA) Support" |
2001 | default y | 2001 | default y |
2002 | depends on IGB && DCA && !(IGB=y && DCA=m) | 2002 | depends on IGB && DCA && !(IGB=y && DCA=m) |
2003 | ---help--- | ||
2004 | Say Y here if you want to use Direct Cache Access (DCA) in the | ||
2005 | driver. DCA is a method for warming the CPU cache before data | ||
2006 | is used, with the intent of lessening the impact of cache misses. | ||
2003 | 2007 | ||
2004 | source "drivers/net/ixp2000/Kconfig" | 2008 | source "drivers/net/ixp2000/Kconfig" |
2005 | 2009 | ||
@@ -2424,9 +2428,13 @@ config IXGBE | |||
2424 | will be called ixgbe. | 2428 | will be called ixgbe. |
2425 | 2429 | ||
2426 | config IXGBE_DCA | 2430 | config IXGBE_DCA |
2427 | bool | 2431 | bool "Direct Cache Access (DCA) Support" |
2428 | default y | 2432 | default y |
2429 | depends on IXGBE && DCA && !(IXGBE=y && DCA=m) | 2433 | depends on IXGBE && DCA && !(IXGBE=y && DCA=m) |
2434 | ---help--- | ||
2435 | Say Y here if you want to use Direct Cache Access (DCA) in the | ||
2436 | driver. DCA is a method for warming the CPU cache before data | ||
2437 | is used, with the intent of lessening the impact of cache misses. | ||
2430 | 2438 | ||
2431 | config IXGB | 2439 | config IXGB |
2432 | tristate "Intel(R) PRO/10GbE support" | 2440 | tristate "Intel(R) PRO/10GbE support" |
@@ -2476,9 +2484,13 @@ config MYRI10GE | |||
2476 | will be called myri10ge. | 2484 | will be called myri10ge. |
2477 | 2485 | ||
2478 | config MYRI10GE_DCA | 2486 | config MYRI10GE_DCA |
2479 | bool | 2487 | bool "Direct Cache Access (DCA) Support" |
2480 | default y | 2488 | default y |
2481 | depends on MYRI10GE && DCA && !(MYRI10GE=y && DCA=m) | 2489 | depends on MYRI10GE && DCA && !(MYRI10GE=y && DCA=m) |
2490 | ---help--- | ||
2491 | Say Y here if you want to use Direct Cache Access (DCA) in the | ||
2492 | driver. DCA is a method for warming the CPU cache before data | ||
2493 | is used, with the intent of lessening the impact of cache misses. | ||
2482 | 2494 | ||
2483 | config NETXEN_NIC | 2495 | config NETXEN_NIC |
2484 | tristate "NetXen Multi port (1/10) Gigabit Ethernet NIC" | 2496 | tristate "NetXen Multi port (1/10) Gigabit Ethernet NIC" |
diff --git a/drivers/net/atl1e/atl1e.h b/drivers/net/atl1e/atl1e.h index b645fa0f3f64..c49550d507a0 100644 --- a/drivers/net/atl1e/atl1e.h +++ b/drivers/net/atl1e/atl1e.h | |||
@@ -46,7 +46,6 @@ | |||
46 | #include <linux/vmalloc.h> | 46 | #include <linux/vmalloc.h> |
47 | #include <linux/pagemap.h> | 47 | #include <linux/pagemap.h> |
48 | #include <linux/tcp.h> | 48 | #include <linux/tcp.h> |
49 | #include <linux/mii.h> | ||
50 | #include <linux/ethtool.h> | 49 | #include <linux/ethtool.h> |
51 | #include <linux/if_vlan.h> | 50 | #include <linux/if_vlan.h> |
52 | #include <linux/workqueue.h> | 51 | #include <linux/workqueue.h> |
diff --git a/drivers/net/bnx2x_init.h b/drivers/net/bnx2x_init.h index 130927cfc75b..a6c0b3abba29 100644 --- a/drivers/net/bnx2x_init.h +++ b/drivers/net/bnx2x_init.h | |||
@@ -564,14 +564,15 @@ static const struct arb_line write_arb_addr[NUM_WR_Q-1] = { | |||
564 | 564 | ||
565 | static void bnx2x_init_pxp(struct bnx2x *bp) | 565 | static void bnx2x_init_pxp(struct bnx2x *bp) |
566 | { | 566 | { |
567 | u16 devctl; | ||
567 | int r_order, w_order; | 568 | int r_order, w_order; |
568 | u32 val, i; | 569 | u32 val, i; |
569 | 570 | ||
570 | pci_read_config_word(bp->pdev, | 571 | pci_read_config_word(bp->pdev, |
571 | bp->pcie_cap + PCI_EXP_DEVCTL, (u16 *)&val); | 572 | bp->pcie_cap + PCI_EXP_DEVCTL, &devctl); |
572 | DP(NETIF_MSG_HW, "read 0x%x from devctl\n", (u16)val); | 573 | DP(NETIF_MSG_HW, "read 0x%x from devctl\n", devctl); |
573 | w_order = ((val & PCI_EXP_DEVCTL_PAYLOAD) >> 5); | 574 | w_order = ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5); |
574 | r_order = ((val & PCI_EXP_DEVCTL_READRQ) >> 12); | 575 | r_order = ((devctl & PCI_EXP_DEVCTL_READRQ) >> 12); |
575 | 576 | ||
576 | if (r_order > MAX_RD_ORD) { | 577 | if (r_order > MAX_RD_ORD) { |
577 | DP(NETIF_MSG_HW, "read order of %d order adjusted to %d\n", | 578 | DP(NETIF_MSG_HW, "read order of %d order adjusted to %d\n", |
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c index 68d0ed3a50d7..49f8e7891626 100644 --- a/drivers/net/bnx2x_main.c +++ b/drivers/net/bnx2x_main.c | |||
@@ -59,8 +59,8 @@ | |||
59 | #include "bnx2x.h" | 59 | #include "bnx2x.h" |
60 | #include "bnx2x_init.h" | 60 | #include "bnx2x_init.h" |
61 | 61 | ||
62 | #define DRV_MODULE_VERSION "1.45.22" | 62 | #define DRV_MODULE_VERSION "1.45.23" |
63 | #define DRV_MODULE_RELDATE "2008/09/09" | 63 | #define DRV_MODULE_RELDATE "2008/11/03" |
64 | #define BNX2X_BC_VER 0x040200 | 64 | #define BNX2X_BC_VER 0x040200 |
65 | 65 | ||
66 | /* Time in jiffies before concluding the transmitter is hung */ | 66 | /* Time in jiffies before concluding the transmitter is hung */ |
@@ -6479,6 +6479,7 @@ load_int_disable: | |||
6479 | bnx2x_free_irq(bp); | 6479 | bnx2x_free_irq(bp); |
6480 | load_error: | 6480 | load_error: |
6481 | bnx2x_free_mem(bp); | 6481 | bnx2x_free_mem(bp); |
6482 | bp->port.pmf = 0; | ||
6482 | 6483 | ||
6483 | /* TBD we really need to reset the chip | 6484 | /* TBD we really need to reset the chip |
6484 | if we want to recover from this */ | 6485 | if we want to recover from this */ |
@@ -6789,6 +6790,7 @@ unload_error: | |||
6789 | /* Report UNLOAD_DONE to MCP */ | 6790 | /* Report UNLOAD_DONE to MCP */ |
6790 | if (!BP_NOMCP(bp)) | 6791 | if (!BP_NOMCP(bp)) |
6791 | bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE); | 6792 | bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE); |
6793 | bp->port.pmf = 0; | ||
6792 | 6794 | ||
6793 | /* Free SKBs, SGEs, TPA pool and driver internals */ | 6795 | /* Free SKBs, SGEs, TPA pool and driver internals */ |
6794 | bnx2x_free_skbs(bp); | 6796 | bnx2x_free_skbs(bp); |
@@ -10196,8 +10198,6 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev, | |||
10196 | return -ENOMEM; | 10198 | return -ENOMEM; |
10197 | } | 10199 | } |
10198 | 10200 | ||
10199 | netif_carrier_off(dev); | ||
10200 | |||
10201 | bp = netdev_priv(dev); | 10201 | bp = netdev_priv(dev); |
10202 | bp->msglevel = debug; | 10202 | bp->msglevel = debug; |
10203 | 10203 | ||
@@ -10221,6 +10221,8 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev, | |||
10221 | goto init_one_exit; | 10221 | goto init_one_exit; |
10222 | } | 10222 | } |
10223 | 10223 | ||
10224 | netif_carrier_off(dev); | ||
10225 | |||
10224 | bp->common.name = board_info[ent->driver_data].name; | 10226 | bp->common.name = board_info[ent->driver_data].name; |
10225 | printk(KERN_INFO "%s: %s (%c%d) PCI-E x%d %s found at mem %lx," | 10227 | printk(KERN_INFO "%s: %s (%c%d) PCI-E x%d %s found at mem %lx," |
10226 | " IRQ %d, ", dev->name, bp->common.name, | 10228 | " IRQ %d, ", dev->name, bp->common.name, |
diff --git a/drivers/net/cris/eth_v10.c b/drivers/net/cris/eth_v10.c index 486fa215d3ad..c9806c58b2fd 100644 --- a/drivers/net/cris/eth_v10.c +++ b/drivers/net/cris/eth_v10.c | |||
@@ -32,14 +32,14 @@ | |||
32 | #include <linux/skbuff.h> | 32 | #include <linux/skbuff.h> |
33 | #include <linux/ethtool.h> | 33 | #include <linux/ethtool.h> |
34 | 34 | ||
35 | #include <asm/arch/svinto.h>/* DMA and register descriptions */ | 35 | #include <arch/svinto.h>/* DMA and register descriptions */ |
36 | #include <asm/io.h> /* CRIS_LED_* I/O functions */ | 36 | #include <asm/io.h> /* CRIS_LED_* I/O functions */ |
37 | #include <asm/irq.h> | 37 | #include <asm/irq.h> |
38 | #include <asm/dma.h> | 38 | #include <asm/dma.h> |
39 | #include <asm/system.h> | 39 | #include <asm/system.h> |
40 | #include <asm/ethernet.h> | 40 | #include <asm/ethernet.h> |
41 | #include <asm/cache.h> | 41 | #include <asm/cache.h> |
42 | #include <asm/arch/io_interface_mux.h> | 42 | #include <arch/io_interface_mux.h> |
43 | 43 | ||
44 | //#define ETHDEBUG | 44 | //#define ETHDEBUG |
45 | #define D(x) | 45 | #define D(x) |
diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c index e32f08d18c65..df66d620b115 100644 --- a/drivers/net/fs_enet/fs_enet-main.c +++ b/drivers/net/fs_enet/fs_enet-main.c | |||
@@ -1099,7 +1099,9 @@ static int __devinit fs_enet_probe(struct of_device *ofdev, | |||
1099 | ndev->stop = fs_enet_close; | 1099 | ndev->stop = fs_enet_close; |
1100 | ndev->get_stats = fs_enet_get_stats; | 1100 | ndev->get_stats = fs_enet_get_stats; |
1101 | ndev->set_multicast_list = fs_set_multicast_list; | 1101 | ndev->set_multicast_list = fs_set_multicast_list; |
1102 | 1102 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
1103 | ndev->poll_controller = fs_enet_netpoll; | ||
1104 | #endif | ||
1103 | if (fpi->use_napi) | 1105 | if (fpi->use_napi) |
1104 | netif_napi_add(ndev, &fep->napi, fs_enet_rx_napi, | 1106 | netif_napi_add(ndev, &fep->napi, fs_enet_rx_napi, |
1105 | fpi->napi_weight); | 1107 | fpi->napi_weight); |
@@ -1206,7 +1208,7 @@ static void __exit fs_cleanup(void) | |||
1206 | static void fs_enet_netpoll(struct net_device *dev) | 1208 | static void fs_enet_netpoll(struct net_device *dev) |
1207 | { | 1209 | { |
1208 | disable_irq(dev->irq); | 1210 | disable_irq(dev->irq); |
1209 | fs_enet_interrupt(dev->irq, dev, NULL); | 1211 | fs_enet_interrupt(dev->irq, dev); |
1210 | enable_irq(dev->irq); | 1212 | enable_irq(dev->irq); |
1211 | } | 1213 | } |
1212 | #endif | 1214 | #endif |
diff --git a/drivers/net/irda/ks959-sir.c b/drivers/net/irda/ks959-sir.c index f59d5b6b7bfe..600d96f9cdb7 100644 --- a/drivers/net/irda/ks959-sir.c +++ b/drivers/net/irda/ks959-sir.c | |||
@@ -118,7 +118,6 @@ | |||
118 | #include <linux/errno.h> | 118 | #include <linux/errno.h> |
119 | #include <linux/init.h> | 119 | #include <linux/init.h> |
120 | #include <linux/slab.h> | 120 | #include <linux/slab.h> |
121 | #include <linux/module.h> | ||
122 | #include <linux/kref.h> | 121 | #include <linux/kref.h> |
123 | #include <linux/usb.h> | 122 | #include <linux/usb.h> |
124 | #include <linux/device.h> | 123 | #include <linux/device.h> |
diff --git a/drivers/net/irda/ksdazzle-sir.c b/drivers/net/irda/ksdazzle-sir.c index 6c39f3f6d4e6..0e7f89337b25 100644 --- a/drivers/net/irda/ksdazzle-sir.c +++ b/drivers/net/irda/ksdazzle-sir.c | |||
@@ -82,7 +82,6 @@ | |||
82 | #include <linux/errno.h> | 82 | #include <linux/errno.h> |
83 | #include <linux/init.h> | 83 | #include <linux/init.h> |
84 | #include <linux/slab.h> | 84 | #include <linux/slab.h> |
85 | #include <linux/module.h> | ||
86 | #include <linux/kref.h> | 85 | #include <linux/kref.h> |
87 | #include <linux/usb.h> | 86 | #include <linux/usb.h> |
88 | #include <linux/device.h> | 87 | #include <linux/device.h> |
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c index e521d2cebad6..b13fbc4ebd87 100644 --- a/drivers/net/mv643xx_eth.c +++ b/drivers/net/mv643xx_eth.c | |||
@@ -1064,9 +1064,12 @@ static int smi_wait_ready(struct mv643xx_eth_shared_private *msp) | |||
1064 | return 0; | 1064 | return 0; |
1065 | } | 1065 | } |
1066 | 1066 | ||
1067 | if (!wait_event_timeout(msp->smi_busy_wait, smi_is_done(msp), | 1067 | if (!smi_is_done(msp)) { |
1068 | msecs_to_jiffies(100))) | 1068 | wait_event_timeout(msp->smi_busy_wait, smi_is_done(msp), |
1069 | return -ETIMEDOUT; | 1069 | msecs_to_jiffies(100)); |
1070 | if (!smi_is_done(msp)) | ||
1071 | return -ETIMEDOUT; | ||
1072 | } | ||
1070 | 1073 | ||
1071 | return 0; | 1074 | return 0; |
1072 | } | 1075 | } |
diff --git a/drivers/net/niu.c b/drivers/net/niu.c index 0d8338450675..2c3bb36cda17 100644 --- a/drivers/net/niu.c +++ b/drivers/net/niu.c | |||
@@ -8663,7 +8663,6 @@ static void __devinit niu_device_announce(struct niu *np) | |||
8663 | static int __devinit niu_pci_init_one(struct pci_dev *pdev, | 8663 | static int __devinit niu_pci_init_one(struct pci_dev *pdev, |
8664 | const struct pci_device_id *ent) | 8664 | const struct pci_device_id *ent) |
8665 | { | 8665 | { |
8666 | unsigned long niureg_base, niureg_len; | ||
8667 | union niu_parent_id parent_id; | 8666 | union niu_parent_id parent_id; |
8668 | struct net_device *dev; | 8667 | struct net_device *dev; |
8669 | struct niu *np; | 8668 | struct niu *np; |
@@ -8754,10 +8753,7 @@ static int __devinit niu_pci_init_one(struct pci_dev *pdev, | |||
8754 | 8753 | ||
8755 | dev->features |= (NETIF_F_SG | NETIF_F_HW_CSUM); | 8754 | dev->features |= (NETIF_F_SG | NETIF_F_HW_CSUM); |
8756 | 8755 | ||
8757 | niureg_base = pci_resource_start(pdev, 0); | 8756 | np->regs = pci_ioremap_bar(pdev, 0); |
8758 | niureg_len = pci_resource_len(pdev, 0); | ||
8759 | |||
8760 | np->regs = ioremap_nocache(niureg_base, niureg_len); | ||
8761 | if (!np->regs) { | 8757 | if (!np->regs) { |
8762 | dev_err(&pdev->dev, PFX "Cannot map device registers, " | 8758 | dev_err(&pdev->dev, PFX "Cannot map device registers, " |
8763 | "aborting.\n"); | 8759 | "aborting.\n"); |
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c index a8cf006c0998..e0b972d36664 100644 --- a/drivers/net/smc911x.c +++ b/drivers/net/smc911x.c | |||
@@ -498,7 +498,7 @@ static void smc911x_hardware_send_pkt(struct net_device *dev) | |||
498 | #else | 498 | #else |
499 | SMC_PUSH_DATA(lp, buf, len); | 499 | SMC_PUSH_DATA(lp, buf, len); |
500 | dev->trans_start = jiffies; | 500 | dev->trans_start = jiffies; |
501 | dev_kfree_skb(skb); | 501 | dev_kfree_skb_irq(skb); |
502 | #endif | 502 | #endif |
503 | if (!lp->tx_throttle) { | 503 | if (!lp->tx_throttle) { |
504 | netif_wake_queue(dev); | 504 | netif_wake_queue(dev); |
diff --git a/drivers/net/smc91x.c b/drivers/net/smc91x.c index 2ca301d71902..5879c719b538 100644 --- a/drivers/net/smc91x.c +++ b/drivers/net/smc91x.c | |||
@@ -2058,6 +2058,7 @@ static int smc_request_attrib(struct platform_device *pdev, | |||
2058 | struct net_device *ndev) | 2058 | struct net_device *ndev) |
2059 | { | 2059 | { |
2060 | struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib"); | 2060 | struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib"); |
2061 | struct smc_local *lp __maybe_unused = netdev_priv(ndev); | ||
2061 | 2062 | ||
2062 | if (!res) | 2063 | if (!res) |
2063 | return 0; | 2064 | return 0; |
@@ -2072,6 +2073,7 @@ static void smc_release_attrib(struct platform_device *pdev, | |||
2072 | struct net_device *ndev) | 2073 | struct net_device *ndev) |
2073 | { | 2074 | { |
2074 | struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib"); | 2075 | struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib"); |
2076 | struct smc_local *lp __maybe_unused = netdev_priv(ndev); | ||
2075 | 2077 | ||
2076 | if (res) | 2078 | if (res) |
2077 | release_mem_region(res->start, ATTRIB_SIZE); | 2079 | release_mem_region(res->start, ATTRIB_SIZE); |
diff --git a/drivers/net/tun.c b/drivers/net/tun.c index 680d78e38f13..5a6203072ce7 100644 --- a/drivers/net/tun.c +++ b/drivers/net/tun.c | |||
@@ -1068,8 +1068,6 @@ static int tun_chr_close(struct inode *inode, struct file *file) | |||
1068 | 1068 | ||
1069 | DBG(KERN_INFO "%s: tun_chr_close\n", tun->dev->name); | 1069 | DBG(KERN_INFO "%s: tun_chr_close\n", tun->dev->name); |
1070 | 1070 | ||
1071 | tun_chr_fasync(-1, file, 0); | ||
1072 | |||
1073 | rtnl_lock(); | 1071 | rtnl_lock(); |
1074 | 1072 | ||
1075 | /* Detach from net device */ | 1073 | /* Detach from net device */ |
diff --git a/drivers/net/ucc_geth_ethtool.c b/drivers/net/ucc_geth_ethtool.c index cfbbfee55836..85f38a6b6a49 100644 --- a/drivers/net/ucc_geth_ethtool.c +++ b/drivers/net/ucc_geth_ethtool.c | |||
@@ -37,7 +37,6 @@ | |||
37 | #include <asm/irq.h> | 37 | #include <asm/irq.h> |
38 | #include <asm/uaccess.h> | 38 | #include <asm/uaccess.h> |
39 | #include <asm/types.h> | 39 | #include <asm/types.h> |
40 | #include <asm/uaccess.h> | ||
41 | 40 | ||
42 | #include "ucc_geth.h" | 41 | #include "ucc_geth.h" |
43 | #include "ucc_geth_mii.h" | 42 | #include "ucc_geth_mii.h" |
diff --git a/drivers/net/wireless/ath5k/base.c b/drivers/net/wireless/ath5k/base.c index 7ac5f2847da5..6f368e8cdf17 100644 --- a/drivers/net/wireless/ath5k/base.c +++ b/drivers/net/wireless/ath5k/base.c | |||
@@ -2949,8 +2949,10 @@ static void ath5k_configure_filter(struct ieee80211_hw *hw, | |||
2949 | sc->opmode != NL80211_IFTYPE_MESH_POINT && | 2949 | sc->opmode != NL80211_IFTYPE_MESH_POINT && |
2950 | test_bit(ATH_STAT_PROMISC, sc->status)) | 2950 | test_bit(ATH_STAT_PROMISC, sc->status)) |
2951 | rfilt |= AR5K_RX_FILTER_PROM; | 2951 | rfilt |= AR5K_RX_FILTER_PROM; |
2952 | if (sc->opmode == NL80211_IFTYPE_ADHOC) | 2952 | if (sc->opmode == NL80211_IFTYPE_STATION || |
2953 | sc->opmode == NL80211_IFTYPE_ADHOC) { | ||
2953 | rfilt |= AR5K_RX_FILTER_BEACON; | 2954 | rfilt |= AR5K_RX_FILTER_BEACON; |
2955 | } | ||
2954 | if (sc->opmode == NL80211_IFTYPE_MESH_POINT) | 2956 | if (sc->opmode == NL80211_IFTYPE_MESH_POINT) |
2955 | rfilt |= AR5K_RX_FILTER_CONTROL | AR5K_RX_FILTER_BEACON | | 2957 | rfilt |= AR5K_RX_FILTER_CONTROL | AR5K_RX_FILTER_BEACON | |
2956 | AR5K_RX_FILTER_PROBEREQ | AR5K_RX_FILTER_PROM; | 2958 | AR5K_RX_FILTER_PROBEREQ | AR5K_RX_FILTER_PROM; |
diff --git a/drivers/net/wireless/ath5k/desc.c b/drivers/net/wireless/ath5k/desc.c index dd1374052ba9..5e362a7a3620 100644 --- a/drivers/net/wireless/ath5k/desc.c +++ b/drivers/net/wireless/ath5k/desc.c | |||
@@ -531,10 +531,10 @@ static int ath5k_hw_proc_5210_rx_status(struct ath5k_hw *ah, | |||
531 | AR5K_5210_RX_DESC_STATUS0_RECEIVE_SIGNAL); | 531 | AR5K_5210_RX_DESC_STATUS0_RECEIVE_SIGNAL); |
532 | rs->rs_rate = AR5K_REG_MS(rx_status->rx_status_0, | 532 | rs->rs_rate = AR5K_REG_MS(rx_status->rx_status_0, |
533 | AR5K_5210_RX_DESC_STATUS0_RECEIVE_RATE); | 533 | AR5K_5210_RX_DESC_STATUS0_RECEIVE_RATE); |
534 | rs->rs_antenna = rx_status->rx_status_0 & | 534 | rs->rs_antenna = AR5K_REG_MS(rx_status->rx_status_0, |
535 | AR5K_5210_RX_DESC_STATUS0_RECEIVE_ANTENNA; | 535 | AR5K_5210_RX_DESC_STATUS0_RECEIVE_ANTENNA); |
536 | rs->rs_more = rx_status->rx_status_0 & | 536 | rs->rs_more = !!(rx_status->rx_status_0 & |
537 | AR5K_5210_RX_DESC_STATUS0_MORE; | 537 | AR5K_5210_RX_DESC_STATUS0_MORE); |
538 | /* TODO: this timestamp is 13 bit, later on we assume 15 bit */ | 538 | /* TODO: this timestamp is 13 bit, later on we assume 15 bit */ |
539 | rs->rs_tstamp = AR5K_REG_MS(rx_status->rx_status_1, | 539 | rs->rs_tstamp = AR5K_REG_MS(rx_status->rx_status_1, |
540 | AR5K_5210_RX_DESC_STATUS1_RECEIVE_TIMESTAMP); | 540 | AR5K_5210_RX_DESC_STATUS1_RECEIVE_TIMESTAMP); |
@@ -607,10 +607,10 @@ static int ath5k_hw_proc_5212_rx_status(struct ath5k_hw *ah, | |||
607 | AR5K_5212_RX_DESC_STATUS0_RECEIVE_SIGNAL); | 607 | AR5K_5212_RX_DESC_STATUS0_RECEIVE_SIGNAL); |
608 | rs->rs_rate = AR5K_REG_MS(rx_status->rx_status_0, | 608 | rs->rs_rate = AR5K_REG_MS(rx_status->rx_status_0, |
609 | AR5K_5212_RX_DESC_STATUS0_RECEIVE_RATE); | 609 | AR5K_5212_RX_DESC_STATUS0_RECEIVE_RATE); |
610 | rs->rs_antenna = rx_status->rx_status_0 & | 610 | rs->rs_antenna = AR5K_REG_MS(rx_status->rx_status_0, |
611 | AR5K_5212_RX_DESC_STATUS0_RECEIVE_ANTENNA; | 611 | AR5K_5212_RX_DESC_STATUS0_RECEIVE_ANTENNA); |
612 | rs->rs_more = rx_status->rx_status_0 & | 612 | rs->rs_more = !!(rx_status->rx_status_0 & |
613 | AR5K_5212_RX_DESC_STATUS0_MORE; | 613 | AR5K_5212_RX_DESC_STATUS0_MORE); |
614 | rs->rs_tstamp = AR5K_REG_MS(rx_status->rx_status_1, | 614 | rs->rs_tstamp = AR5K_REG_MS(rx_status->rx_status_1, |
615 | AR5K_5212_RX_DESC_STATUS1_RECEIVE_TIMESTAMP); | 615 | AR5K_5212_RX_DESC_STATUS1_RECEIVE_TIMESTAMP); |
616 | rs->rs_status = 0; | 616 | rs->rs_status = 0; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c index 82e98b4602c5..2c35a017e5f6 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn.c | |||
@@ -3237,7 +3237,11 @@ static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw, | |||
3237 | return; | 3237 | return; |
3238 | } | 3238 | } |
3239 | 3239 | ||
3240 | iwl_scan_cancel_timeout(priv, 100); | 3240 | if (iwl_scan_cancel(priv)) { |
3241 | /* cancel scan failed, just live w/ bad key and rely | ||
3242 | briefly on SW decryption */ | ||
3243 | return; | ||
3244 | } | ||
3241 | 3245 | ||
3242 | key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK); | 3246 | key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK); |
3243 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | 3247 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); |
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c index 5436cb43bca7..f675b2993a3d 100644 --- a/drivers/net/wireless/iwlwifi/iwl3945-base.c +++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c | |||
@@ -5720,7 +5720,6 @@ static void iwl3945_alive_start(struct iwl3945_priv *priv) | |||
5720 | if (priv->error_recovering) | 5720 | if (priv->error_recovering) |
5721 | iwl3945_error_recovery(priv); | 5721 | iwl3945_error_recovery(priv); |
5722 | 5722 | ||
5723 | ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC); | ||
5724 | return; | 5723 | return; |
5725 | 5724 | ||
5726 | restart: | 5725 | restart: |
@@ -5965,6 +5964,7 @@ static void iwl3945_bg_alive_start(struct work_struct *data) | |||
5965 | mutex_lock(&priv->mutex); | 5964 | mutex_lock(&priv->mutex); |
5966 | iwl3945_alive_start(priv); | 5965 | iwl3945_alive_start(priv); |
5967 | mutex_unlock(&priv->mutex); | 5966 | mutex_unlock(&priv->mutex); |
5967 | ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC); | ||
5968 | } | 5968 | } |
5969 | 5969 | ||
5970 | static void iwl3945_bg_rf_kill(struct work_struct *work) | 5970 | static void iwl3945_bg_rf_kill(struct work_struct *work) |
@@ -6209,6 +6209,11 @@ static void iwl3945_bg_request_scan(struct work_struct *data) | |||
6209 | n_probes, | 6209 | n_probes, |
6210 | (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]); | 6210 | (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]); |
6211 | 6211 | ||
6212 | if (scan->channel_count == 0) { | ||
6213 | IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count); | ||
6214 | goto done; | ||
6215 | } | ||
6216 | |||
6212 | cmd.len += le16_to_cpu(scan->tx_cmd.len) + | 6217 | cmd.len += le16_to_cpu(scan->tx_cmd.len) + |
6213 | scan->channel_count * sizeof(struct iwl3945_scan_channel); | 6218 | scan->channel_count * sizeof(struct iwl3945_scan_channel); |
6214 | cmd.data = scan; | 6219 | cmd.data = scan; |
@@ -6226,6 +6231,14 @@ static void iwl3945_bg_request_scan(struct work_struct *data) | |||
6226 | return; | 6231 | return; |
6227 | 6232 | ||
6228 | done: | 6233 | done: |
6234 | /* can not perform scan make sure we clear scanning | ||
6235 | * bits from status so next scan request can be performed. | ||
6236 | * if we dont clear scanning status bit here all next scan | ||
6237 | * will fail | ||
6238 | */ | ||
6239 | clear_bit(STATUS_SCAN_HW, &priv->status); | ||
6240 | clear_bit(STATUS_SCANNING, &priv->status); | ||
6241 | |||
6229 | /* inform mac80211 scan aborted */ | 6242 | /* inform mac80211 scan aborted */ |
6230 | queue_work(priv->workqueue, &priv->scan_completed); | 6243 | queue_work(priv->workqueue, &priv->scan_completed); |
6231 | mutex_unlock(&priv->mutex); | 6244 | mutex_unlock(&priv->mutex); |
diff --git a/drivers/net/wireless/zd1211rw/zd_usb.c b/drivers/net/wireless/zd1211rw/zd_usb.c index d7a2f52e40cf..04c139666965 100644 --- a/drivers/net/wireless/zd1211rw/zd_usb.c +++ b/drivers/net/wireless/zd1211rw/zd_usb.c | |||
@@ -61,6 +61,7 @@ static struct usb_device_id usb_ids[] = { | |||
61 | { USB_DEVICE(0x0105, 0x145f), .driver_info = DEVICE_ZD1211 }, | 61 | { USB_DEVICE(0x0105, 0x145f), .driver_info = DEVICE_ZD1211 }, |
62 | /* ZD1211B */ | 62 | /* ZD1211B */ |
63 | { USB_DEVICE(0x0ace, 0x1215), .driver_info = DEVICE_ZD1211B }, | 63 | { USB_DEVICE(0x0ace, 0x1215), .driver_info = DEVICE_ZD1211B }, |
64 | { USB_DEVICE(0x0ace, 0xb215), .driver_info = DEVICE_ZD1211B }, | ||
64 | { USB_DEVICE(0x157e, 0x300d), .driver_info = DEVICE_ZD1211B }, | 65 | { USB_DEVICE(0x157e, 0x300d), .driver_info = DEVICE_ZD1211B }, |
65 | { USB_DEVICE(0x079b, 0x0062), .driver_info = DEVICE_ZD1211B }, | 66 | { USB_DEVICE(0x079b, 0x0062), .driver_info = DEVICE_ZD1211B }, |
66 | { USB_DEVICE(0x1582, 0x6003), .driver_info = DEVICE_ZD1211B }, | 67 | { USB_DEVICE(0x1582, 0x6003), .driver_info = DEVICE_ZD1211B }, |
@@ -82,6 +83,7 @@ static struct usb_device_id usb_ids[] = { | |||
82 | { USB_DEVICE(0x0cde, 0x001a), .driver_info = DEVICE_ZD1211B }, | 83 | { USB_DEVICE(0x0cde, 0x001a), .driver_info = DEVICE_ZD1211B }, |
83 | { USB_DEVICE(0x0586, 0x340a), .driver_info = DEVICE_ZD1211B }, | 84 | { USB_DEVICE(0x0586, 0x340a), .driver_info = DEVICE_ZD1211B }, |
84 | { USB_DEVICE(0x0471, 0x1237), .driver_info = DEVICE_ZD1211B }, | 85 | { USB_DEVICE(0x0471, 0x1237), .driver_info = DEVICE_ZD1211B }, |
86 | { USB_DEVICE(0x07fa, 0x1196), .driver_info = DEVICE_ZD1211B }, | ||
85 | /* "Driverless" devices that need ejecting */ | 87 | /* "Driverless" devices that need ejecting */ |
86 | { USB_DEVICE(0x0ace, 0x2011), .driver_info = DEVICE_INSTALLER }, | 88 | { USB_DEVICE(0x0ace, 0x2011), .driver_info = DEVICE_INSTALLER }, |
87 | { USB_DEVICE(0x0ace, 0x20ff), .driver_info = DEVICE_INSTALLER }, | 89 | { USB_DEVICE(0x0ace, 0x20ff), .driver_info = DEVICE_INSTALLER }, |
diff --git a/drivers/of/device.c b/drivers/of/device.c index 51e5214071da..224ae6bc67b6 100644 --- a/drivers/of/device.c +++ b/drivers/of/device.c | |||
@@ -105,7 +105,16 @@ EXPORT_SYMBOL(of_release_dev); | |||
105 | int of_device_register(struct of_device *ofdev) | 105 | int of_device_register(struct of_device *ofdev) |
106 | { | 106 | { |
107 | BUG_ON(ofdev->node == NULL); | 107 | BUG_ON(ofdev->node == NULL); |
108 | return device_register(&ofdev->dev); | 108 | |
109 | device_initialize(&ofdev->dev); | ||
110 | |||
111 | /* device_add will assume that this device is on the same node as | ||
112 | * the parent. If there is no parent defined, set the node | ||
113 | * explicitly */ | ||
114 | if (!ofdev->dev.parent) | ||
115 | set_dev_node(&ofdev->dev, of_node_to_nid(ofdev->node)); | ||
116 | |||
117 | return device_add(&ofdev->dev); | ||
109 | } | 118 | } |
110 | EXPORT_SYMBOL(of_device_register); | 119 | EXPORT_SYMBOL(of_device_register); |
111 | 120 | ||
diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig index f57eeae3830a..222904411a13 100644 --- a/drivers/pcmcia/Kconfig +++ b/drivers/pcmcia/Kconfig | |||
@@ -188,10 +188,6 @@ config PCMCIA_M8XX | |||
188 | 188 | ||
189 | This driver is also available as a module called m8xx_pcmcia. | 189 | This driver is also available as a module called m8xx_pcmcia. |
190 | 190 | ||
191 | config HD64465_PCMCIA | ||
192 | tristate "HD64465 host bridge support" | ||
193 | depends on HD64465 && PCMCIA | ||
194 | |||
195 | config PCMCIA_AU1X00 | 191 | config PCMCIA_AU1X00 |
196 | tristate "Au1x00 pcmcia support" | 192 | tristate "Au1x00 pcmcia support" |
197 | depends on SOC_AU1X00 && PCMCIA | 193 | depends on SOC_AU1X00 && PCMCIA |
diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile index 23e492bf75cf..238629ad7f7c 100644 --- a/drivers/pcmcia/Makefile +++ b/drivers/pcmcia/Makefile | |||
@@ -22,7 +22,6 @@ obj-$(CONFIG_I82365) += i82365.o | |||
22 | obj-$(CONFIG_I82092) += i82092.o | 22 | obj-$(CONFIG_I82092) += i82092.o |
23 | obj-$(CONFIG_TCIC) += tcic.o | 23 | obj-$(CONFIG_TCIC) += tcic.o |
24 | obj-$(CONFIG_PCMCIA_M8XX) += m8xx_pcmcia.o | 24 | obj-$(CONFIG_PCMCIA_M8XX) += m8xx_pcmcia.o |
25 | obj-$(CONFIG_HD64465_PCMCIA) += hd64465_ss.o | ||
26 | obj-$(CONFIG_PCMCIA_SA1100) += sa11xx_core.o sa1100_cs.o | 25 | obj-$(CONFIG_PCMCIA_SA1100) += sa11xx_core.o sa1100_cs.o |
27 | obj-$(CONFIG_PCMCIA_SA1111) += sa11xx_core.o sa1111_cs.o | 26 | obj-$(CONFIG_PCMCIA_SA1111) += sa11xx_core.o sa1111_cs.o |
28 | obj-$(CONFIG_M32R_PCC) += m32r_pcc.o | 27 | obj-$(CONFIG_M32R_PCC) += m32r_pcc.o |
diff --git a/drivers/pcmcia/hd64465_ss.c b/drivers/pcmcia/hd64465_ss.c deleted file mode 100644 index 9ef69cdb3183..000000000000 --- a/drivers/pcmcia/hd64465_ss.c +++ /dev/null | |||
@@ -1,939 +0,0 @@ | |||
1 | /* | ||
2 | * Device driver for the PCMCIA controller module of the | ||
3 | * Hitachi HD64465 handheld companion chip. | ||
4 | * | ||
5 | * Note that the HD64465 provides a very thin PCMCIA host bridge | ||
6 | * layer, requiring a lot of the work of supporting cards to be | ||
7 | * performed by the processor. For example: mapping of card | ||
8 | * interrupts to processor IRQs is done by IRQ demuxing software; | ||
9 | * IO and memory mappings are fixed; setting voltages according | ||
10 | * to card Voltage Select pins etc is done in software. | ||
11 | * | ||
12 | * Note also that this driver uses only the simple, fixed, | ||
13 | * 16MB, 16-bit wide mappings to PCMCIA spaces defined by the | ||
14 | * HD64465. Larger mappings, smaller mappings, or mappings of | ||
15 | * different width to the same socket, are all possible only by | ||
16 | * involving the SH7750's MMU, which is considered unnecessary here. | ||
17 | * The downside is that it may be possible for some drivers to | ||
18 | * break because they need or expect 8-bit mappings. | ||
19 | * | ||
20 | * This driver currently supports only the following configuration: | ||
21 | * SH7750 CPU, HD64465, TPS2206 voltage control chip. | ||
22 | * | ||
23 | * by Greg Banks <gbanks@pocketpenguins.com> | ||
24 | * (c) 2000 PocketPenguins Inc | ||
25 | */ | ||
26 | |||
27 | #include <linux/types.h> | ||
28 | #include <linux/module.h> | ||
29 | #include <linux/init.h> | ||
30 | #include <linux/string.h> | ||
31 | #include <linux/kernel.h> | ||
32 | #include <linux/ioport.h> | ||
33 | #include <linux/mm.h> | ||
34 | #include <linux/vmalloc.h> | ||
35 | #include <asm/errno.h> | ||
36 | #include <linux/irq.h> | ||
37 | #include <linux/interrupt.h> | ||
38 | #include <linux/platform_device.h> | ||
39 | |||
40 | #include <asm/io.h> | ||
41 | #include <asm/hd64465/hd64465.h> | ||
42 | #include <asm/hd64465/io.h> | ||
43 | |||
44 | #include <pcmcia/cs_types.h> | ||
45 | #include <pcmcia/cs.h> | ||
46 | #include <pcmcia/cistpl.h> | ||
47 | #include <pcmcia/ds.h> | ||
48 | #include <pcmcia/ss.h> | ||
49 | |||
50 | #define MODNAME "hd64465_ss" | ||
51 | |||
52 | /* #define HD64465_DEBUG 1 */ | ||
53 | |||
54 | #if HD64465_DEBUG | ||
55 | #define DPRINTK(args...) printk(MODNAME ": " args) | ||
56 | #else | ||
57 | #define DPRINTK(args...) | ||
58 | #endif | ||
59 | |||
60 | extern int hd64465_io_debug; | ||
61 | extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags); | ||
62 | extern void p3_iounmap(void *addr); | ||
63 | |||
64 | /*============================================================*/ | ||
65 | |||
66 | #define HS_IO_MAP_SIZE (64*1024) | ||
67 | |||
68 | typedef struct hs_socket_t | ||
69 | { | ||
70 | unsigned int number; | ||
71 | u_int irq; | ||
72 | u_long mem_base; | ||
73 | void *io_base; | ||
74 | u_long mem_length; | ||
75 | u_int ctrl_base; | ||
76 | socket_state_t state; | ||
77 | pccard_io_map io_maps[MAX_IO_WIN]; | ||
78 | pccard_mem_map mem_maps[MAX_WIN]; | ||
79 | struct pcmcia_socket socket; | ||
80 | } hs_socket_t; | ||
81 | |||
82 | |||
83 | |||
84 | #define HS_MAX_SOCKETS 2 | ||
85 | static hs_socket_t hs_sockets[HS_MAX_SOCKETS]; | ||
86 | |||
87 | #define hs_in(sp, r) inb((sp)->ctrl_base + (r)) | ||
88 | #define hs_out(sp, v, r) outb(v, (sp)->ctrl_base + (r)) | ||
89 | |||
90 | |||
91 | /* translate a boolean value to a bit in a register */ | ||
92 | #define bool_to_regbit(sp, r, bi, bo) \ | ||
93 | do { \ | ||
94 | unsigned short v = hs_in(sp, r); \ | ||
95 | if (bo) \ | ||
96 | v |= (bi); \ | ||
97 | else \ | ||
98 | v &= ~(bi); \ | ||
99 | hs_out(sp, v, r); \ | ||
100 | } while(0) | ||
101 | |||
102 | /* register offsets from HD64465_REG_PCC[01]ISR */ | ||
103 | #define ISR 0x0 | ||
104 | #define GCR 0x2 | ||
105 | #define CSCR 0x4 | ||
106 | #define CSCIER 0x6 | ||
107 | #define SCR 0x8 | ||
108 | |||
109 | |||
110 | /* Mask and values for CSCIER register */ | ||
111 | #define IER_MASK 0x80 | ||
112 | #define IER_ON 0x3f /* interrupts on */ | ||
113 | #define IER_OFF 0x00 /* interrupts off */ | ||
114 | |||
115 | /*============================================================*/ | ||
116 | |||
117 | #if HD64465_DEBUG > 10 | ||
118 | |||
119 | static void cis_hex_dump(const unsigned char *x, int len) | ||
120 | { | ||
121 | int i; | ||
122 | |||
123 | for (i=0 ; i<len ; i++) | ||
124 | { | ||
125 | if (!(i & 0xf)) | ||
126 | printk("\n%08x", (unsigned)(x + i)); | ||
127 | printk(" %02x", *(volatile unsigned short*)x); | ||
128 | x += 2; | ||
129 | } | ||
130 | printk("\n"); | ||
131 | } | ||
132 | |||
133 | #endif | ||
134 | /*============================================================*/ | ||
135 | |||
136 | /* | ||
137 | * This code helps create the illusion that the IREQ line from | ||
138 | * the PC card is mapped to one of the CPU's IRQ lines by the | ||
139 | * host bridge hardware (which is how every host bridge *except* | ||
140 | * the HD64465 works). In particular, it supports enabling | ||
141 | * and disabling the IREQ line by code which knows nothing | ||
142 | * about the host bridge (e.g. device drivers, IDE code) using | ||
143 | * the request_irq(), free_irq(), probe_irq_on() and probe_irq_off() | ||
144 | * functions. Also, it supports sharing the mapped IRQ with | ||
145 | * real hardware IRQs from the -IRL0-3 lines. | ||
146 | */ | ||
147 | |||
148 | #define HS_NUM_MAPPED_IRQS 16 /* Limitation of the PCMCIA code */ | ||
149 | static struct | ||
150 | { | ||
151 | /* index is mapped irq number */ | ||
152 | hs_socket_t *sock; | ||
153 | hw_irq_controller *old_handler; | ||
154 | } hs_mapped_irq[HS_NUM_MAPPED_IRQS]; | ||
155 | |||
156 | static void hs_socket_enable_ireq(hs_socket_t *sp) | ||
157 | { | ||
158 | unsigned short cscier; | ||
159 | |||
160 | DPRINTK("hs_socket_enable_ireq(sock=%d)\n", sp->number); | ||
161 | |||
162 | cscier = hs_in(sp, CSCIER); | ||
163 | cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK; | ||
164 | cscier |= HD64465_PCCCSCIER_PIREQE_LEVEL; | ||
165 | hs_out(sp, cscier, CSCIER); | ||
166 | } | ||
167 | |||
168 | static void hs_socket_disable_ireq(hs_socket_t *sp) | ||
169 | { | ||
170 | unsigned short cscier; | ||
171 | |||
172 | DPRINTK("hs_socket_disable_ireq(sock=%d)\n", sp->number); | ||
173 | |||
174 | cscier = hs_in(sp, CSCIER); | ||
175 | cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK; | ||
176 | hs_out(sp, cscier, CSCIER); | ||
177 | } | ||
178 | |||
179 | static unsigned int hs_startup_irq(unsigned int irq) | ||
180 | { | ||
181 | hs_socket_enable_ireq(hs_mapped_irq[irq].sock); | ||
182 | hs_mapped_irq[irq].old_handler->startup(irq); | ||
183 | return 0; | ||
184 | } | ||
185 | |||
186 | static void hs_shutdown_irq(unsigned int irq) | ||
187 | { | ||
188 | hs_socket_disable_ireq(hs_mapped_irq[irq].sock); | ||
189 | hs_mapped_irq[irq].old_handler->shutdown(irq); | ||
190 | } | ||
191 | |||
192 | static void hs_enable_irq(unsigned int irq) | ||
193 | { | ||
194 | hs_socket_enable_ireq(hs_mapped_irq[irq].sock); | ||
195 | hs_mapped_irq[irq].old_handler->enable(irq); | ||
196 | } | ||
197 | |||
198 | static void hs_disable_irq(unsigned int irq) | ||
199 | { | ||
200 | hs_socket_disable_ireq(hs_mapped_irq[irq].sock); | ||
201 | hs_mapped_irq[irq].old_handler->disable(irq); | ||
202 | } | ||
203 | |||
204 | extern struct hw_interrupt_type no_irq_type; | ||
205 | |||
206 | static void hs_mask_and_ack_irq(unsigned int irq) | ||
207 | { | ||
208 | hs_socket_disable_ireq(hs_mapped_irq[irq].sock); | ||
209 | /* ack_none() spuriously complains about an unexpected IRQ */ | ||
210 | if (hs_mapped_irq[irq].old_handler != &no_irq_type) | ||
211 | hs_mapped_irq[irq].old_handler->ack(irq); | ||
212 | } | ||
213 | |||
214 | static void hs_end_irq(unsigned int irq) | ||
215 | { | ||
216 | hs_socket_enable_ireq(hs_mapped_irq[irq].sock); | ||
217 | hs_mapped_irq[irq].old_handler->end(irq); | ||
218 | } | ||
219 | |||
220 | |||
221 | static struct hw_interrupt_type hd64465_ss_irq_type = { | ||
222 | .typename = "PCMCIA-IRQ", | ||
223 | .startup = hs_startup_irq, | ||
224 | .shutdown = hs_shutdown_irq, | ||
225 | .enable = hs_enable_irq, | ||
226 | .disable = hs_disable_irq, | ||
227 | .ack = hs_mask_and_ack_irq, | ||
228 | .end = hs_end_irq | ||
229 | }; | ||
230 | |||
231 | /* | ||
232 | * This function should only ever be called with interrupts disabled. | ||
233 | */ | ||
234 | static void hs_map_irq(hs_socket_t *sp, unsigned int irq) | ||
235 | { | ||
236 | struct irq_desc *desc; | ||
237 | |||
238 | DPRINTK("hs_map_irq(sock=%d irq=%d)\n", sp->number, irq); | ||
239 | |||
240 | if (irq >= HS_NUM_MAPPED_IRQS) | ||
241 | return; | ||
242 | |||
243 | desc = irq_to_desc(irq); | ||
244 | hs_mapped_irq[irq].sock = sp; | ||
245 | /* insert ourselves as the irq controller */ | ||
246 | hs_mapped_irq[irq].old_handler = desc->chip; | ||
247 | desc->chip = &hd64465_ss_irq_type; | ||
248 | } | ||
249 | |||
250 | |||
251 | /* | ||
252 | * This function should only ever be called with interrupts disabled. | ||
253 | */ | ||
254 | static void hs_unmap_irq(hs_socket_t *sp, unsigned int irq) | ||
255 | { | ||
256 | struct irq_desc *desc; | ||
257 | |||
258 | DPRINTK("hs_unmap_irq(sock=%d irq=%d)\n", sp->number, irq); | ||
259 | |||
260 | if (irq >= HS_NUM_MAPPED_IRQS) | ||
261 | return; | ||
262 | |||
263 | desc = irq_to_desc(irq); | ||
264 | /* restore the original irq controller */ | ||
265 | desc->chip = hs_mapped_irq[irq].old_handler; | ||
266 | } | ||
267 | |||
268 | /*============================================================*/ | ||
269 | |||
270 | |||
271 | /* | ||
272 | * Set Vpp and Vcc (in tenths of a Volt). Does not | ||
273 | * support the hi-Z state. | ||
274 | * | ||
275 | * Note, this assumes the board uses a TPS2206 chip to control | ||
276 | * the Vcc and Vpp voltages to the hs_sockets. If your board | ||
277 | * uses the MIC2563 (also supported by the HD64465) then you | ||
278 | * will have to modify this function. | ||
279 | */ | ||
280 | /* 0V 3.3V 5.5V */ | ||
281 | static const u_char hs_tps2206_avcc[3] = { 0x00, 0x04, 0x08 }; | ||
282 | static const u_char hs_tps2206_bvcc[3] = { 0x00, 0x80, 0x40 }; | ||
283 | |||
284 | static int hs_set_voltages(hs_socket_t *sp, int Vcc, int Vpp) | ||
285 | { | ||
286 | u_int psr; | ||
287 | u_int vcci = 0; | ||
288 | u_int sock = sp->number; | ||
289 | |||
290 | DPRINTK("hs_set_voltage(%d, %d, %d)\n", sock, Vcc, Vpp); | ||
291 | |||
292 | switch (Vcc) | ||
293 | { | ||
294 | case 0: vcci = 0; break; | ||
295 | case 33: vcci = 1; break; | ||
296 | case 50: vcci = 2; break; | ||
297 | default: return 0; | ||
298 | } | ||
299 | |||
300 | /* Note: Vpp = 120 not supported -- Greg Banks */ | ||
301 | if (Vpp != 0 && Vpp != Vcc) | ||
302 | return 0; | ||
303 | |||
304 | /* The PSR register holds 8 of the 9 bits which control | ||
305 | * the TPS2206 via its serial interface. | ||
306 | */ | ||
307 | psr = inw(HD64465_REG_PCCPSR); | ||
308 | switch (sock) | ||
309 | { | ||
310 | case 0: | ||
311 | psr &= 0x0f; | ||
312 | psr |= hs_tps2206_avcc[vcci]; | ||
313 | psr |= (Vpp == 0 ? 0x00 : 0x02); | ||
314 | break; | ||
315 | case 1: | ||
316 | psr &= 0xf0; | ||
317 | psr |= hs_tps2206_bvcc[vcci]; | ||
318 | psr |= (Vpp == 0 ? 0x00 : 0x20); | ||
319 | break; | ||
320 | }; | ||
321 | outw(psr, HD64465_REG_PCCPSR); | ||
322 | |||
323 | return 1; | ||
324 | } | ||
325 | |||
326 | |||
327 | /*============================================================*/ | ||
328 | |||
329 | /* | ||
330 | * Drive the RESET line to the card. | ||
331 | */ | ||
332 | static void hs_reset_socket(hs_socket_t *sp, int on) | ||
333 | { | ||
334 | unsigned short v; | ||
335 | |||
336 | v = hs_in(sp, GCR); | ||
337 | if (on) | ||
338 | v |= HD64465_PCCGCR_PCCR; | ||
339 | else | ||
340 | v &= ~HD64465_PCCGCR_PCCR; | ||
341 | hs_out(sp, v, GCR); | ||
342 | } | ||
343 | |||
344 | /*============================================================*/ | ||
345 | |||
346 | static int hs_init(struct pcmcia_socket *s) | ||
347 | { | ||
348 | hs_socket_t *sp = container_of(s, struct hs_socket_t, socket); | ||
349 | |||
350 | DPRINTK("hs_init(%d)\n", sp->number); | ||
351 | |||
352 | return 0; | ||
353 | } | ||
354 | |||
355 | /*============================================================*/ | ||
356 | |||
357 | |||
358 | static int hs_get_status(struct pcmcia_socket *s, u_int *value) | ||
359 | { | ||
360 | hs_socket_t *sp = container_of(s, struct hs_socket_t, socket); | ||
361 | unsigned int isr; | ||
362 | u_int status = 0; | ||
363 | |||
364 | |||
365 | isr = hs_in(sp, ISR); | ||
366 | |||
367 | /* Card is seated and powered when *both* CD pins are low */ | ||
368 | if ((isr & HD64465_PCCISR_PCD_MASK) == 0) | ||
369 | { | ||
370 | status |= SS_DETECT; /* card present */ | ||
371 | |||
372 | switch (isr & HD64465_PCCISR_PBVD_MASK) | ||
373 | { | ||
374 | case HD64465_PCCISR_PBVD_BATGOOD: | ||
375 | break; | ||
376 | case HD64465_PCCISR_PBVD_BATWARN: | ||
377 | status |= SS_BATWARN; | ||
378 | break; | ||
379 | default: | ||
380 | status |= SS_BATDEAD; | ||
381 | break; | ||
382 | } | ||
383 | |||
384 | if (isr & HD64465_PCCISR_PREADY) | ||
385 | status |= SS_READY; | ||
386 | |||
387 | if (isr & HD64465_PCCISR_PMWP) | ||
388 | status |= SS_WRPROT; | ||
389 | |||
390 | /* Voltage Select pins interpreted as per Table 4-5 of the std. | ||
391 | * Assuming we have the TPS2206, the socket is a "Low Voltage | ||
392 | * key, 3.3V and 5V available, no X.XV available". | ||
393 | */ | ||
394 | switch (isr & (HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1)) | ||
395 | { | ||
396 | case HD64465_PCCISR_PVS1: | ||
397 | printk(KERN_NOTICE MODNAME ": cannot handle X.XV card, ignored\n"); | ||
398 | status = 0; | ||
399 | break; | ||
400 | case 0: | ||
401 | case HD64465_PCCISR_PVS2: | ||
402 | /* 3.3V */ | ||
403 | status |= SS_3VCARD; | ||
404 | break; | ||
405 | case HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1: | ||
406 | /* 5V */ | ||
407 | break; | ||
408 | } | ||
409 | |||
410 | /* TODO: SS_POWERON */ | ||
411 | /* TODO: SS_STSCHG */ | ||
412 | } | ||
413 | |||
414 | DPRINTK("hs_get_status(%d) = %x\n", sock, status); | ||
415 | |||
416 | *value = status; | ||
417 | return 0; | ||
418 | } | ||
419 | |||
420 | /*============================================================*/ | ||
421 | |||
422 | static int hs_set_socket(struct pcmcia_socket *s, socket_state_t *state) | ||
423 | { | ||
424 | hs_socket_t *sp = container_of(s, struct hs_socket_t, socket); | ||
425 | u_long flags; | ||
426 | u_int changed; | ||
427 | unsigned short cscier; | ||
428 | |||
429 | DPRINTK("hs_set_socket(sock=%d, flags=%x, csc_mask=%x, Vcc=%d, Vpp=%d, io_irq=%d)\n", | ||
430 | sock, state->flags, state->csc_mask, state->Vcc, state->Vpp, state->io_irq); | ||
431 | |||
432 | local_irq_save(flags); /* Don't want interrupts happening here */ | ||
433 | |||
434 | if (state->Vpp != sp->state.Vpp || | ||
435 | state->Vcc != sp->state.Vcc) { | ||
436 | if (!hs_set_voltages(sp, state->Vcc, state->Vpp)) { | ||
437 | local_irq_restore(flags); | ||
438 | return -EINVAL; | ||
439 | } | ||
440 | } | ||
441 | |||
442 | /* hd64465_io_debug = 1; */ | ||
443 | /* | ||
444 | * Handle changes in the Card Status Change mask, | ||
445 | * by propagating to the CSCR register | ||
446 | */ | ||
447 | changed = sp->state.csc_mask ^ state->csc_mask; | ||
448 | cscier = hs_in(sp, CSCIER); | ||
449 | |||
450 | if (changed & SS_DETECT) { | ||
451 | if (state->csc_mask & SS_DETECT) | ||
452 | cscier |= HD64465_PCCCSCIER_PCDE; | ||
453 | else | ||
454 | cscier &= ~HD64465_PCCCSCIER_PCDE; | ||
455 | } | ||
456 | |||
457 | if (changed & SS_READY) { | ||
458 | if (state->csc_mask & SS_READY) | ||
459 | cscier |= HD64465_PCCCSCIER_PRE; | ||
460 | else | ||
461 | cscier &= ~HD64465_PCCCSCIER_PRE; | ||
462 | } | ||
463 | |||
464 | if (changed & SS_BATDEAD) { | ||
465 | if (state->csc_mask & SS_BATDEAD) | ||
466 | cscier |= HD64465_PCCCSCIER_PBDE; | ||
467 | else | ||
468 | cscier &= ~HD64465_PCCCSCIER_PBDE; | ||
469 | } | ||
470 | |||
471 | if (changed & SS_BATWARN) { | ||
472 | if (state->csc_mask & SS_BATWARN) | ||
473 | cscier |= HD64465_PCCCSCIER_PBWE; | ||
474 | else | ||
475 | cscier &= ~HD64465_PCCCSCIER_PBWE; | ||
476 | } | ||
477 | |||
478 | if (changed & SS_STSCHG) { | ||
479 | if (state->csc_mask & SS_STSCHG) | ||
480 | cscier |= HD64465_PCCCSCIER_PSCE; | ||
481 | else | ||
482 | cscier &= ~HD64465_PCCCSCIER_PSCE; | ||
483 | } | ||
484 | |||
485 | hs_out(sp, cscier, CSCIER); | ||
486 | |||
487 | if (sp->state.io_irq && !state->io_irq) | ||
488 | hs_unmap_irq(sp, sp->state.io_irq); | ||
489 | else if (!sp->state.io_irq && state->io_irq) | ||
490 | hs_map_irq(sp, state->io_irq); | ||
491 | |||
492 | |||
493 | /* | ||
494 | * Handle changes in the flags field, | ||
495 | * by propagating to config registers. | ||
496 | */ | ||
497 | changed = sp->state.flags ^ state->flags; | ||
498 | |||
499 | if (changed & SS_IOCARD) { | ||
500 | DPRINTK("card type: %s\n", | ||
501 | (state->flags & SS_IOCARD ? "i/o" : "memory" )); | ||
502 | bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCT, | ||
503 | state->flags & SS_IOCARD); | ||
504 | } | ||
505 | |||
506 | if (changed & SS_RESET) { | ||
507 | DPRINTK("%s reset card\n", | ||
508 | (state->flags & SS_RESET ? "start" : "stop")); | ||
509 | bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCR, | ||
510 | state->flags & SS_RESET); | ||
511 | } | ||
512 | |||
513 | if (changed & SS_OUTPUT_ENA) { | ||
514 | DPRINTK("%sabling card output\n", | ||
515 | (state->flags & SS_OUTPUT_ENA ? "en" : "dis")); | ||
516 | bool_to_regbit(sp, GCR, HD64465_PCCGCR_PDRV, | ||
517 | state->flags & SS_OUTPUT_ENA); | ||
518 | } | ||
519 | |||
520 | /* TODO: SS_SPKR_ENA */ | ||
521 | |||
522 | /* hd64465_io_debug = 0; */ | ||
523 | sp->state = *state; | ||
524 | |||
525 | local_irq_restore(flags); | ||
526 | |||
527 | #if HD64465_DEBUG > 10 | ||
528 | if (state->flags & SS_OUTPUT_ENA) | ||
529 | cis_hex_dump((const unsigned char*)sp->mem_base, 0x100); | ||
530 | #endif | ||
531 | return 0; | ||
532 | } | ||
533 | |||
534 | /*============================================================*/ | ||
535 | |||
536 | static int hs_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io) | ||
537 | { | ||
538 | hs_socket_t *sp = container_of(s, struct hs_socket_t, socket); | ||
539 | int map = io->map; | ||
540 | int sock = sp->number; | ||
541 | struct pccard_io_map *sio; | ||
542 | pgprot_t prot; | ||
543 | |||
544 | DPRINTK("hs_set_io_map(sock=%d, map=%d, flags=0x%x, speed=%dns, start=%#lx, stop=%#lx)\n", | ||
545 | sock, map, io->flags, io->speed, io->start, io->stop); | ||
546 | if (map >= MAX_IO_WIN) | ||
547 | return -EINVAL; | ||
548 | sio = &sp->io_maps[map]; | ||
549 | |||
550 | /* check for null changes */ | ||
551 | if (io->flags == sio->flags && | ||
552 | io->start == sio->start && | ||
553 | io->stop == sio->stop) | ||
554 | return 0; | ||
555 | |||
556 | if (io->flags & MAP_AUTOSZ) | ||
557 | prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IODYN); | ||
558 | else if (io->flags & MAP_16BIT) | ||
559 | prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO16); | ||
560 | else | ||
561 | prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO8); | ||
562 | |||
563 | /* TODO: handle MAP_USE_WAIT */ | ||
564 | if (io->flags & MAP_USE_WAIT) | ||
565 | printk(KERN_INFO MODNAME ": MAP_USE_WAIT unimplemented\n"); | ||
566 | /* TODO: handle MAP_PREFETCH */ | ||
567 | if (io->flags & MAP_PREFETCH) | ||
568 | printk(KERN_INFO MODNAME ": MAP_PREFETCH unimplemented\n"); | ||
569 | /* TODO: handle MAP_WRPROT */ | ||
570 | if (io->flags & MAP_WRPROT) | ||
571 | printk(KERN_INFO MODNAME ": MAP_WRPROT unimplemented\n"); | ||
572 | /* TODO: handle MAP_0WS */ | ||
573 | if (io->flags & MAP_0WS) | ||
574 | printk(KERN_INFO MODNAME ": MAP_0WS unimplemented\n"); | ||
575 | |||
576 | if (io->flags & MAP_ACTIVE) { | ||
577 | unsigned long pstart, psize, paddrbase; | ||
578 | |||
579 | paddrbase = virt_to_phys((void*)(sp->mem_base + 2 * HD64465_PCC_WINDOW)); | ||
580 | pstart = io->start & PAGE_MASK; | ||
581 | psize = ((io->stop + PAGE_SIZE) & PAGE_MASK) - pstart; | ||
582 | |||
583 | /* | ||
584 | * Change PTEs in only that portion of the mapping requested | ||
585 | * by the caller. This means that most of the time, most of | ||
586 | * the PTEs in the io_vma will be unmapped and only the bottom | ||
587 | * page will be mapped. But the code allows for weird cards | ||
588 | * that might want IO ports > 4K. | ||
589 | */ | ||
590 | sp->io_base = p3_ioremap(paddrbase + pstart, psize, pgprot_val(prot)); | ||
591 | |||
592 | /* | ||
593 | * Change the mapping used by inb() outb() etc | ||
594 | */ | ||
595 | hd64465_port_map(io->start, | ||
596 | io->stop - io->start + 1, | ||
597 | (unsigned long)sp->io_base + io->start, 0); | ||
598 | } else { | ||
599 | hd64465_port_unmap(sio->start, sio->stop - sio->start + 1); | ||
600 | p3_iounmap(sp->io_base); | ||
601 | } | ||
602 | |||
603 | *sio = *io; | ||
604 | return 0; | ||
605 | } | ||
606 | |||
607 | /*============================================================*/ | ||
608 | |||
609 | static int hs_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem) | ||
610 | { | ||
611 | hs_socket_t *sp = container_of(s, struct hs_socket_t, socket); | ||
612 | struct pccard_mem_map *smem; | ||
613 | int map = mem->map; | ||
614 | unsigned long paddr; | ||
615 | |||
616 | #if 0 | ||
617 | DPRINTK("hs_set_mem_map(sock=%d, map=%d, flags=0x%x, card_start=0x%08x)\n", | ||
618 | sock, map, mem->flags, mem->card_start); | ||
619 | #endif | ||
620 | |||
621 | if (map >= MAX_WIN) | ||
622 | return -EINVAL; | ||
623 | smem = &sp->mem_maps[map]; | ||
624 | |||
625 | paddr = sp->mem_base; /* base of Attribute mapping */ | ||
626 | if (!(mem->flags & MAP_ATTRIB)) | ||
627 | paddr += HD64465_PCC_WINDOW; /* base of Common mapping */ | ||
628 | paddr += mem->card_start; | ||
629 | |||
630 | /* Because we specified SS_CAP_STATIC_MAP, we are obliged | ||
631 | * at this time to report the system address corresponding | ||
632 | * to the card address requested. This is how Socket Services | ||
633 | * queries our fixed mapping. I wish this fact had been | ||
634 | * documented - Greg Banks. | ||
635 | */ | ||
636 | mem->static_start = paddr; | ||
637 | |||
638 | *smem = *mem; | ||
639 | |||
640 | return 0; | ||
641 | } | ||
642 | |||
643 | /* TODO: do we need to use the MMU to access Common memory ??? */ | ||
644 | |||
645 | /*============================================================*/ | ||
646 | |||
647 | /* | ||
648 | * This function is registered with the HD64465 glue code to do a | ||
649 | * secondary demux step on the PCMCIA interrupts. It handles | ||
650 | * mapping the IREQ request from the card to a standard Linux | ||
651 | * IRQ, as requested by SocketServices. | ||
652 | */ | ||
653 | static int hs_irq_demux(int irq, void *dev) | ||
654 | { | ||
655 | hs_socket_t *sp = dev; | ||
656 | u_int cscr; | ||
657 | |||
658 | DPRINTK("hs_irq_demux(irq=%d)\n", irq); | ||
659 | |||
660 | if (sp->state.io_irq && | ||
661 | (cscr = hs_in(sp, CSCR)) & HD64465_PCCCSCR_PIREQ) { | ||
662 | cscr &= ~HD64465_PCCCSCR_PIREQ; | ||
663 | hs_out(sp, cscr, CSCR); | ||
664 | return sp->state.io_irq; | ||
665 | } | ||
666 | |||
667 | return irq; | ||
668 | } | ||
669 | |||
670 | /*============================================================*/ | ||
671 | |||
672 | /* | ||
673 | * Interrupt handling routine. | ||
674 | */ | ||
675 | |||
676 | static irqreturn_t hs_interrupt(int irq, void *dev) | ||
677 | { | ||
678 | hs_socket_t *sp = dev; | ||
679 | u_int events = 0; | ||
680 | u_int cscr; | ||
681 | |||
682 | cscr = hs_in(sp, CSCR); | ||
683 | |||
684 | DPRINTK("hs_interrupt, cscr=%04x\n", cscr); | ||
685 | |||
686 | /* check for bus-related changes to be reported to Socket Services */ | ||
687 | if (cscr & HD64465_PCCCSCR_PCDC) { | ||
688 | /* double-check for a 16-bit card, as we don't support CardBus */ | ||
689 | if ((hs_in(sp, ISR) & HD64465_PCCISR_PCD_MASK) != 0) { | ||
690 | printk(KERN_NOTICE MODNAME | ||
691 | ": socket %d, card not a supported card type or not inserted correctly\n", | ||
692 | sp->number); | ||
693 | /* Don't do the rest unless a card is present */ | ||
694 | cscr &= ~(HD64465_PCCCSCR_PCDC| | ||
695 | HD64465_PCCCSCR_PRC| | ||
696 | HD64465_PCCCSCR_PBW| | ||
697 | HD64465_PCCCSCR_PBD| | ||
698 | HD64465_PCCCSCR_PSC); | ||
699 | } else { | ||
700 | cscr &= ~HD64465_PCCCSCR_PCDC; | ||
701 | events |= SS_DETECT; /* card insertion or removal */ | ||
702 | } | ||
703 | } | ||
704 | if (cscr & HD64465_PCCCSCR_PRC) { | ||
705 | cscr &= ~HD64465_PCCCSCR_PRC; | ||
706 | events |= SS_READY; /* ready signal changed */ | ||
707 | } | ||
708 | if (cscr & HD64465_PCCCSCR_PBW) { | ||
709 | cscr &= ~HD64465_PCCCSCR_PSC; | ||
710 | events |= SS_BATWARN; /* battery warning */ | ||
711 | } | ||
712 | if (cscr & HD64465_PCCCSCR_PBD) { | ||
713 | cscr &= ~HD64465_PCCCSCR_PSC; | ||
714 | events |= SS_BATDEAD; /* battery dead */ | ||
715 | } | ||
716 | if (cscr & HD64465_PCCCSCR_PSC) { | ||
717 | cscr &= ~HD64465_PCCCSCR_PSC; | ||
718 | events |= SS_STSCHG; /* STSCHG (status changed) signal */ | ||
719 | } | ||
720 | |||
721 | if (cscr & HD64465_PCCCSCR_PIREQ) { | ||
722 | cscr &= ~HD64465_PCCCSCR_PIREQ; | ||
723 | |||
724 | /* This should have been dealt with during irq demux */ | ||
725 | printk(KERN_NOTICE MODNAME ": unexpected IREQ from card\n"); | ||
726 | } | ||
727 | |||
728 | hs_out(sp, cscr, CSCR); | ||
729 | |||
730 | if (events) | ||
731 | pcmcia_parse_events(&sp->socket, events); | ||
732 | |||
733 | return IRQ_HANDLED; | ||
734 | } | ||
735 | |||
736 | /*============================================================*/ | ||
737 | |||
738 | static struct pccard_operations hs_operations = { | ||
739 | .init = hs_init, | ||
740 | .get_status = hs_get_status, | ||
741 | .set_socket = hs_set_socket, | ||
742 | .set_io_map = hs_set_io_map, | ||
743 | .set_mem_map = hs_set_mem_map, | ||
744 | }; | ||
745 | |||
746 | static int hs_init_socket(hs_socket_t *sp, int irq, unsigned long mem_base, | ||
747 | unsigned int ctrl_base) | ||
748 | { | ||
749 | unsigned short v; | ||
750 | int i, err; | ||
751 | |||
752 | memset(sp, 0, sizeof(*sp)); | ||
753 | sp->irq = irq; | ||
754 | sp->mem_base = mem_base; | ||
755 | sp->mem_length = 4*HD64465_PCC_WINDOW; /* 16MB */ | ||
756 | sp->ctrl_base = ctrl_base; | ||
757 | |||
758 | for (i=0 ; i<MAX_IO_WIN ; i++) | ||
759 | sp->io_maps[i].map = i; | ||
760 | for (i=0 ; i<MAX_WIN ; i++) | ||
761 | sp->mem_maps[i].map = i; | ||
762 | |||
763 | hd64465_register_irq_demux(sp->irq, hs_irq_demux, sp); | ||
764 | |||
765 | if ((err = request_irq(sp->irq, hs_interrupt, IRQF_DISABLED, MODNAME, sp)) < 0) | ||
766 | return err; | ||
767 | if (request_mem_region(sp->mem_base, sp->mem_length, MODNAME) == 0) { | ||
768 | sp->mem_base = 0; | ||
769 | return -ENOMEM; | ||
770 | } | ||
771 | |||
772 | |||
773 | /* According to section 3.2 of the PCMCIA standard, low-voltage | ||
774 | * capable cards must implement cold insertion, i.e. Vpp and | ||
775 | * Vcc set to 0 before card is inserted. | ||
776 | */ | ||
777 | /*hs_set_voltages(sp, 0, 0);*/ | ||
778 | |||
779 | /* hi-Z the outputs to the card and set 16MB map mode */ | ||
780 | v = hs_in(sp, GCR); | ||
781 | v &= ~HD64465_PCCGCR_PCCT; /* memory-only card */ | ||
782 | hs_out(sp, v, GCR); | ||
783 | |||
784 | v = hs_in(sp, GCR); | ||
785 | v |= HD64465_PCCGCR_PDRV; /* enable outputs to card */ | ||
786 | hs_out(sp, v, GCR); | ||
787 | |||
788 | v = hs_in(sp, GCR); | ||
789 | v |= HD64465_PCCGCR_PMMOD; /* 16MB mapping mode */ | ||
790 | hs_out(sp, v, GCR); | ||
791 | |||
792 | v = hs_in(sp, GCR); | ||
793 | /* lowest 16MB of Common */ | ||
794 | v &= ~(HD64465_PCCGCR_PPA25|HD64465_PCCGCR_PPA24); | ||
795 | hs_out(sp, v, GCR); | ||
796 | |||
797 | hs_reset_socket(sp, 1); | ||
798 | |||
799 | printk(KERN_INFO "HD64465 PCMCIA bridge socket %d at 0x%08lx irq %d\n", | ||
800 | i, sp->mem_base, sp->irq); | ||
801 | |||
802 | return 0; | ||
803 | } | ||
804 | |||
805 | static void hs_exit_socket(hs_socket_t *sp) | ||
806 | { | ||
807 | unsigned short cscier, gcr; | ||
808 | unsigned long flags; | ||
809 | |||
810 | local_irq_save(flags); | ||
811 | |||
812 | /* turn off interrupts in hardware */ | ||
813 | cscier = hs_in(sp, CSCIER); | ||
814 | cscier = (cscier & IER_MASK) | IER_OFF; | ||
815 | hs_out(sp, cscier, CSCIER); | ||
816 | |||
817 | /* hi-Z the outputs to the card */ | ||
818 | gcr = hs_in(sp, GCR); | ||
819 | gcr &= HD64465_PCCGCR_PDRV; | ||
820 | hs_out(sp, gcr, GCR); | ||
821 | |||
822 | /* power the card down */ | ||
823 | hs_set_voltages(sp, 0, 0); | ||
824 | |||
825 | if (sp->mem_base != 0) | ||
826 | release_mem_region(sp->mem_base, sp->mem_length); | ||
827 | if (sp->irq != 0) { | ||
828 | free_irq(sp->irq, hs_interrupt); | ||
829 | hd64465_unregister_irq_demux(sp->irq); | ||
830 | } | ||
831 | |||
832 | local_irq_restore(flags); | ||
833 | } | ||
834 | |||
835 | static struct device_driver hd64465_driver = { | ||
836 | .name = "hd64465-pcmcia", | ||
837 | .bus = &platform_bus_type, | ||
838 | .suspend = pcmcia_socket_dev_suspend, | ||
839 | .resume = pcmcia_socket_dev_resume, | ||
840 | }; | ||
841 | |||
842 | static struct platform_device hd64465_device = { | ||
843 | .name = "hd64465-pcmcia", | ||
844 | .id = 0, | ||
845 | }; | ||
846 | |||
847 | static int __init init_hs(void) | ||
848 | { | ||
849 | int i; | ||
850 | unsigned short v; | ||
851 | |||
852 | /* hd64465_io_debug = 1; */ | ||
853 | if (driver_register(&hd64465_driver)) | ||
854 | return -EINVAL; | ||
855 | |||
856 | /* Wake both sockets out of STANDBY mode */ | ||
857 | /* TODO: wait 15ms */ | ||
858 | v = inw(HD64465_REG_SMSCR); | ||
859 | v &= ~(HD64465_SMSCR_PC0ST|HD64465_SMSCR_PC1ST); | ||
860 | outw(v, HD64465_REG_SMSCR); | ||
861 | |||
862 | /* keep power controller out of shutdown mode */ | ||
863 | v = inb(HD64465_REG_PCC0SCR); | ||
864 | v |= HD64465_PCCSCR_SHDN; | ||
865 | outb(v, HD64465_REG_PCC0SCR); | ||
866 | |||
867 | /* use serial (TPS2206) power controller */ | ||
868 | v = inb(HD64465_REG_PCC0CSCR); | ||
869 | v |= HD64465_PCCCSCR_PSWSEL; | ||
870 | outb(v, HD64465_REG_PCC0CSCR); | ||
871 | |||
872 | /* | ||
873 | * Setup hs_sockets[] structures and request system resources. | ||
874 | * TODO: on memory allocation failure, power down the socket | ||
875 | * before quitting. | ||
876 | */ | ||
877 | for (i=0; i<HS_MAX_SOCKETS; i++) { | ||
878 | hs_set_voltages(&hs_sockets[i], 0, 0); | ||
879 | |||
880 | hs_sockets[i].socket.features |= SS_CAP_PCCARD | SS_CAP_STATIC_MAP; /* mappings are fixed in host memory */ | ||
881 | hs_sockets[i].socket.resource_ops = &pccard_static_ops; | ||
882 | hs_sockets[i].socket.irq_mask = 0xffde;/*0xffff*/ /* IRQs mapped in s/w so can do any, really */ | ||
883 | hs_sockets[i].socket.map_size = HD64465_PCC_WINDOW; /* 16MB fixed window size */ | ||
884 | |||
885 | hs_sockets[i].socket.owner = THIS_MODULE; | ||
886 | hs_sockets[i].socket.ss_entry = &hs_operations; | ||
887 | } | ||
888 | |||
889 | i = hs_init_socket(&hs_sockets[0], | ||
890 | HD64465_IRQ_PCMCIA0, | ||
891 | HD64465_PCC0_BASE, | ||
892 | HD64465_REG_PCC0ISR); | ||
893 | if (i < 0) { | ||
894 | unregister_driver(&hd64465_driver); | ||
895 | return i; | ||
896 | } | ||
897 | i = hs_init_socket(&hs_sockets[1], | ||
898 | HD64465_IRQ_PCMCIA1, | ||
899 | HD64465_PCC1_BASE, | ||
900 | HD64465_REG_PCC1ISR); | ||
901 | if (i < 0) { | ||
902 | unregister_driver(&hd64465_driver); | ||
903 | return i; | ||
904 | } | ||
905 | |||
906 | /* hd64465_io_debug = 0; */ | ||
907 | |||
908 | platform_device_register(&hd64465_device); | ||
909 | |||
910 | for (i=0; i<HS_MAX_SOCKETS; i++) { | ||
911 | unsigned int ret; | ||
912 | hs_sockets[i].socket.dev.parent = &hd64465_device.dev; | ||
913 | hs_sockets[i].number = i; | ||
914 | ret = pcmcia_register_socket(&hs_sockets[i].socket); | ||
915 | if (ret && i) | ||
916 | pcmcia_unregister_socket(&hs_sockets[0].socket); | ||
917 | } | ||
918 | |||
919 | return 0; | ||
920 | } | ||
921 | |||
922 | static void __exit exit_hs(void) | ||
923 | { | ||
924 | int i; | ||
925 | |||
926 | for (i=0 ; i<HS_MAX_SOCKETS ; i++) { | ||
927 | pcmcia_unregister_socket(&hs_sockets[i].socket); | ||
928 | hs_exit_socket(&hs_sockets[i]); | ||
929 | } | ||
930 | |||
931 | platform_device_unregister(&hd64465_device); | ||
932 | unregister_driver(&hd64465_driver); | ||
933 | } | ||
934 | |||
935 | module_init(init_hs); | ||
936 | module_exit(exit_hs); | ||
937 | |||
938 | /*============================================================*/ | ||
939 | /*END*/ | ||
diff --git a/drivers/pnp/interface.c b/drivers/pnp/interface.c index 478a4a739c00..c3f1c8e9d254 100644 --- a/drivers/pnp/interface.c +++ b/drivers/pnp/interface.c | |||
@@ -12,7 +12,6 @@ | |||
12 | #include <linux/errno.h> | 12 | #include <linux/errno.h> |
13 | #include <linux/list.h> | 13 | #include <linux/list.h> |
14 | #include <linux/types.h> | 14 | #include <linux/types.h> |
15 | #include <linux/pnp.h> | ||
16 | #include <linux/stat.h> | 15 | #include <linux/stat.h> |
17 | #include <linux/ctype.h> | 16 | #include <linux/ctype.h> |
18 | #include <linux/slab.h> | 17 | #include <linux/slab.h> |
diff --git a/drivers/ps3/ps3-lpm.c b/drivers/ps3/ps3-lpm.c index 85edf945ab86..204158cf7a55 100644 --- a/drivers/ps3/ps3-lpm.c +++ b/drivers/ps3/ps3-lpm.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/module.h> | 22 | #include <linux/module.h> |
23 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
24 | #include <linux/uaccess.h> | 24 | #include <linux/uaccess.h> |
25 | #include <asm/smp.h> | ||
25 | #include <asm/time.h> | 26 | #include <asm/time.h> |
26 | #include <asm/ps3.h> | 27 | #include <asm/ps3.h> |
27 | #include <asm/lv1call.h> | 28 | #include <asm/lv1call.h> |
diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c index 7af60b98d8a4..a04c1b6b1575 100644 --- a/drivers/rtc/interface.c +++ b/drivers/rtc/interface.c | |||
@@ -271,7 +271,7 @@ int rtc_read_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm) | |||
271 | dev_dbg(&rtc->dev, "alarm rollover: %s\n", "year"); | 271 | dev_dbg(&rtc->dev, "alarm rollover: %s\n", "year"); |
272 | do { | 272 | do { |
273 | alarm->time.tm_year++; | 273 | alarm->time.tm_year++; |
274 | } while (!rtc_valid_tm(&alarm->time)); | 274 | } while (rtc_valid_tm(&alarm->time) != 0); |
275 | break; | 275 | break; |
276 | 276 | ||
277 | default: | 277 | default: |
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c index 5549231179a2..6cf8e282338f 100644 --- a/drivers/rtc/rtc-cmos.c +++ b/drivers/rtc/rtc-cmos.c | |||
@@ -794,7 +794,7 @@ cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) | |||
794 | goto cleanup2; | 794 | goto cleanup2; |
795 | } | 795 | } |
796 | 796 | ||
797 | pr_info("%s: alarms up to one %s%s, %zd bytes nvram, %s irqs\n", | 797 | pr_info("%s: alarms up to one %s%s, %zd bytes nvram%s\n", |
798 | cmos_rtc.rtc->dev.bus_id, | 798 | cmos_rtc.rtc->dev.bus_id, |
799 | is_valid_irq(rtc_irq) | 799 | is_valid_irq(rtc_irq) |
800 | ? (cmos_rtc.mon_alrm | 800 | ? (cmos_rtc.mon_alrm |
diff --git a/drivers/rtc/rtc-dev.c b/drivers/rtc/rtc-dev.c index 079e9ed907e0..ecdea44ae4e5 100644 --- a/drivers/rtc/rtc-dev.c +++ b/drivers/rtc/rtc-dev.c | |||
@@ -446,9 +446,6 @@ static int rtc_dev_release(struct inode *inode, struct file *file) | |||
446 | if (rtc->ops->release) | 446 | if (rtc->ops->release) |
447 | rtc->ops->release(rtc->dev.parent); | 447 | rtc->ops->release(rtc->dev.parent); |
448 | 448 | ||
449 | if (file->f_flags & FASYNC) | ||
450 | rtc_dev_fasync(-1, file, 0); | ||
451 | |||
452 | clear_bit_unlock(RTC_DEV_BUSY, &rtc->flags); | 449 | clear_bit_unlock(RTC_DEV_BUSY, &rtc->flags); |
453 | return 0; | 450 | return 0; |
454 | } | 451 | } |
diff --git a/drivers/rtc/rtc-m48t59.c b/drivers/rtc/rtc-m48t59.c index 04b63dab6932..43afb7ab5289 100644 --- a/drivers/rtc/rtc-m48t59.c +++ b/drivers/rtc/rtc-m48t59.c | |||
@@ -87,6 +87,10 @@ static int m48t59_rtc_read_time(struct device *dev, struct rtc_time *tm) | |||
87 | dev_dbg(dev, "Century bit is enabled\n"); | 87 | dev_dbg(dev, "Century bit is enabled\n"); |
88 | tm->tm_year += 100; /* one century */ | 88 | tm->tm_year += 100; /* one century */ |
89 | } | 89 | } |
90 | #ifdef CONFIG_SPARC | ||
91 | /* Sun SPARC machines count years since 1968 */ | ||
92 | tm->tm_year += 68; | ||
93 | #endif | ||
90 | 94 | ||
91 | tm->tm_wday = bcd2bin(val & 0x07); | 95 | tm->tm_wday = bcd2bin(val & 0x07); |
92 | tm->tm_hour = bcd2bin(M48T59_READ(M48T59_HOUR) & 0x3F); | 96 | tm->tm_hour = bcd2bin(M48T59_READ(M48T59_HOUR) & 0x3F); |
@@ -110,11 +114,20 @@ static int m48t59_rtc_set_time(struct device *dev, struct rtc_time *tm) | |||
110 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | 114 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); |
111 | unsigned long flags; | 115 | unsigned long flags; |
112 | u8 val = 0; | 116 | u8 val = 0; |
117 | int year = tm->tm_year; | ||
118 | |||
119 | #ifdef CONFIG_SPARC | ||
120 | /* Sun SPARC machines count years since 1968 */ | ||
121 | year -= 68; | ||
122 | #endif | ||
113 | 123 | ||
114 | dev_dbg(dev, "RTC set time %04d-%02d-%02d %02d/%02d/%02d\n", | 124 | dev_dbg(dev, "RTC set time %04d-%02d-%02d %02d/%02d/%02d\n", |
115 | tm->tm_year + 1900, tm->tm_mon, tm->tm_mday, | 125 | year + 1900, tm->tm_mon, tm->tm_mday, |
116 | tm->tm_hour, tm->tm_min, tm->tm_sec); | 126 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
117 | 127 | ||
128 | if (year < 0) | ||
129 | return -EINVAL; | ||
130 | |||
118 | spin_lock_irqsave(&m48t59->lock, flags); | 131 | spin_lock_irqsave(&m48t59->lock, flags); |
119 | /* Issue the WRITE command */ | 132 | /* Issue the WRITE command */ |
120 | M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); | 133 | M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); |
@@ -125,9 +138,9 @@ static int m48t59_rtc_set_time(struct device *dev, struct rtc_time *tm) | |||
125 | M48T59_WRITE((bin2bcd(tm->tm_mday) & 0x3F), M48T59_MDAY); | 138 | M48T59_WRITE((bin2bcd(tm->tm_mday) & 0x3F), M48T59_MDAY); |
126 | /* tm_mon is 0-11 */ | 139 | /* tm_mon is 0-11 */ |
127 | M48T59_WRITE((bin2bcd(tm->tm_mon + 1) & 0x1F), M48T59_MONTH); | 140 | M48T59_WRITE((bin2bcd(tm->tm_mon + 1) & 0x1F), M48T59_MONTH); |
128 | M48T59_WRITE(bin2bcd(tm->tm_year % 100), M48T59_YEAR); | 141 | M48T59_WRITE(bin2bcd(year % 100), M48T59_YEAR); |
129 | 142 | ||
130 | if (pdata->type == M48T59RTC_TYPE_M48T59 && (tm->tm_year / 100)) | 143 | if (pdata->type == M48T59RTC_TYPE_M48T59 && (year / 100)) |
131 | val = (M48T59_WDAY_CEB | M48T59_WDAY_CB); | 144 | val = (M48T59_WDAY_CEB | M48T59_WDAY_CB); |
132 | val |= (bin2bcd(tm->tm_wday) & 0x07); | 145 | val |= (bin2bcd(tm->tm_wday) & 0x07); |
133 | M48T59_WRITE(val, M48T59_WDAY); | 146 | M48T59_WRITE(val, M48T59_WDAY); |
@@ -159,6 +172,10 @@ static int m48t59_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
159 | M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL); | 172 | M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL); |
160 | 173 | ||
161 | tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR)); | 174 | tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR)); |
175 | #ifdef CONFIG_SPARC | ||
176 | /* Sun SPARC machines count years since 1968 */ | ||
177 | tm->tm_year += 68; | ||
178 | #endif | ||
162 | /* tm_mon is 0-11 */ | 179 | /* tm_mon is 0-11 */ |
163 | tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1; | 180 | tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1; |
164 | 181 | ||
@@ -192,11 +209,20 @@ static int m48t59_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
192 | struct rtc_time *tm = &alrm->time; | 209 | struct rtc_time *tm = &alrm->time; |
193 | u8 mday, hour, min, sec; | 210 | u8 mday, hour, min, sec; |
194 | unsigned long flags; | 211 | unsigned long flags; |
212 | int year = tm->tm_year; | ||
213 | |||
214 | #ifdef CONFIG_SPARC | ||
215 | /* Sun SPARC machines count years since 1968 */ | ||
216 | year -= 68; | ||
217 | #endif | ||
195 | 218 | ||
196 | /* If no irq, we don't support ALARM */ | 219 | /* If no irq, we don't support ALARM */ |
197 | if (m48t59->irq == NO_IRQ) | 220 | if (m48t59->irq == NO_IRQ) |
198 | return -EIO; | 221 | return -EIO; |
199 | 222 | ||
223 | if (year < 0) | ||
224 | return -EINVAL; | ||
225 | |||
200 | /* | 226 | /* |
201 | * 0xff means "always match" | 227 | * 0xff means "always match" |
202 | */ | 228 | */ |
@@ -228,7 +254,7 @@ static int m48t59_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
228 | spin_unlock_irqrestore(&m48t59->lock, flags); | 254 | spin_unlock_irqrestore(&m48t59->lock, flags); |
229 | 255 | ||
230 | dev_dbg(dev, "RTC set alarm time %04d-%02d-%02d %02d/%02d/%02d\n", | 256 | dev_dbg(dev, "RTC set alarm time %04d-%02d-%02d %02d/%02d/%02d\n", |
231 | tm->tm_year + 1900, tm->tm_mon, tm->tm_mday, | 257 | year + 1900, tm->tm_mon, tm->tm_mday, |
232 | tm->tm_hour, tm->tm_min, tm->tm_sec); | 258 | tm->tm_hour, tm->tm_min, tm->tm_sec); |
233 | return 0; | 259 | return 0; |
234 | } | 260 | } |
diff --git a/drivers/sbus/char/jsflash.c b/drivers/sbus/char/jsflash.c index 2bec9ccc0293..a9a9893a5f95 100644 --- a/drivers/sbus/char/jsflash.c +++ b/drivers/sbus/char/jsflash.c | |||
@@ -36,7 +36,6 @@ | |||
36 | #include <linux/poll.h> | 36 | #include <linux/poll.h> |
37 | #include <linux/init.h> | 37 | #include <linux/init.h> |
38 | #include <linux/string.h> | 38 | #include <linux/string.h> |
39 | #include <linux/smp_lock.h> | ||
40 | #include <linux/genhd.h> | 39 | #include <linux/genhd.h> |
41 | #include <linux/blkdev.h> | 40 | #include <linux/blkdev.h> |
42 | 41 | ||
diff --git a/drivers/scsi/megaraid/megaraid_sas.c b/drivers/scsi/megaraid/megaraid_sas.c index afe1de998763..a454f94623d7 100644 --- a/drivers/scsi/megaraid/megaraid_sas.c +++ b/drivers/scsi/megaraid/megaraid_sas.c | |||
@@ -2988,17 +2988,6 @@ static int megasas_mgmt_open(struct inode *inode, struct file *filep) | |||
2988 | } | 2988 | } |
2989 | 2989 | ||
2990 | /** | 2990 | /** |
2991 | * megasas_mgmt_release - char node "release" entry point | ||
2992 | */ | ||
2993 | static int megasas_mgmt_release(struct inode *inode, struct file *filep) | ||
2994 | { | ||
2995 | filep->private_data = NULL; | ||
2996 | fasync_helper(-1, filep, 0, &megasas_async_queue); | ||
2997 | |||
2998 | return 0; | ||
2999 | } | ||
3000 | |||
3001 | /** | ||
3002 | * megasas_mgmt_fasync - Async notifier registration from applications | 2991 | * megasas_mgmt_fasync - Async notifier registration from applications |
3003 | * | 2992 | * |
3004 | * This function adds the calling process to a driver global queue. When an | 2993 | * This function adds the calling process to a driver global queue. When an |
@@ -3345,7 +3334,6 @@ megasas_mgmt_compat_ioctl(struct file *file, unsigned int cmd, | |||
3345 | static const struct file_operations megasas_mgmt_fops = { | 3334 | static const struct file_operations megasas_mgmt_fops = { |
3346 | .owner = THIS_MODULE, | 3335 | .owner = THIS_MODULE, |
3347 | .open = megasas_mgmt_open, | 3336 | .open = megasas_mgmt_open, |
3348 | .release = megasas_mgmt_release, | ||
3349 | .fasync = megasas_mgmt_fasync, | 3337 | .fasync = megasas_mgmt_fasync, |
3350 | .unlocked_ioctl = megasas_mgmt_ioctl, | 3338 | .unlocked_ioctl = megasas_mgmt_ioctl, |
3351 | #ifdef CONFIG_COMPAT | 3339 | #ifdef CONFIG_COMPAT |
diff --git a/drivers/scsi/sg.c b/drivers/scsi/sg.c index 9adf35bd8b56..5103855242ae 100644 --- a/drivers/scsi/sg.c +++ b/drivers/scsi/sg.c | |||
@@ -327,7 +327,6 @@ sg_release(struct inode *inode, struct file *filp) | |||
327 | if ((!(sfp = (Sg_fd *) filp->private_data)) || (!(sdp = sfp->parentdp))) | 327 | if ((!(sfp = (Sg_fd *) filp->private_data)) || (!(sdp = sfp->parentdp))) |
328 | return -ENXIO; | 328 | return -ENXIO; |
329 | SCSI_LOG_TIMEOUT(3, printk("sg_release: %s\n", sdp->disk->disk_name)); | 329 | SCSI_LOG_TIMEOUT(3, printk("sg_release: %s\n", sdp->disk->disk_name)); |
330 | sg_fasync(-1, filp, 0); /* remove filp from async notification list */ | ||
331 | if (0 == sg_remove_sfp(sdp, sfp)) { /* Returns 1 when sdp gone */ | 330 | if (0 == sg_remove_sfp(sdp, sfp)) { /* Returns 1 when sdp gone */ |
332 | if (!sdp->detached) { | 331 | if (!sdp->detached) { |
333 | scsi_device_put(sdp->device); | 332 | scsi_device_put(sdp->device); |
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c index 61fb8b6d19af..d5efd6c77904 100644 --- a/drivers/serial/atmel_serial.c +++ b/drivers/serial/atmel_serial.c | |||
@@ -1258,6 +1258,8 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, | |||
1258 | atmel_port->clk = clk_get(&pdev->dev, "usart"); | 1258 | atmel_port->clk = clk_get(&pdev->dev, "usart"); |
1259 | clk_enable(atmel_port->clk); | 1259 | clk_enable(atmel_port->clk); |
1260 | port->uartclk = clk_get_rate(atmel_port->clk); | 1260 | port->uartclk = clk_get_rate(atmel_port->clk); |
1261 | clk_disable(atmel_port->clk); | ||
1262 | /* only enable clock when USART is in use */ | ||
1261 | } | 1263 | } |
1262 | 1264 | ||
1263 | atmel_port->use_dma_rx = data->use_dma_rx; | 1265 | atmel_port->use_dma_rx = data->use_dma_rx; |
@@ -1379,6 +1381,8 @@ static int __init atmel_console_setup(struct console *co, char *options) | |||
1379 | return -ENODEV; | 1381 | return -ENODEV; |
1380 | } | 1382 | } |
1381 | 1383 | ||
1384 | clk_enable(atmel_ports[co->index].clk); | ||
1385 | |||
1382 | UART_PUT_IDR(port, -1); | 1386 | UART_PUT_IDR(port, -1); |
1383 | UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); | 1387 | UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); |
1384 | UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); | 1388 | UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); |
@@ -1403,7 +1407,7 @@ static struct console atmel_console = { | |||
1403 | .data = &atmel_uart, | 1407 | .data = &atmel_uart, |
1404 | }; | 1408 | }; |
1405 | 1409 | ||
1406 | #define ATMEL_CONSOLE_DEVICE &atmel_console | 1410 | #define ATMEL_CONSOLE_DEVICE (&atmel_console) |
1407 | 1411 | ||
1408 | /* | 1412 | /* |
1409 | * Early console initialization (before VM subsystem initialized). | 1413 | * Early console initialization (before VM subsystem initialized). |
@@ -1534,6 +1538,15 @@ static int __devinit atmel_serial_probe(struct platform_device *pdev) | |||
1534 | if (ret) | 1538 | if (ret) |
1535 | goto err_add_port; | 1539 | goto err_add_port; |
1536 | 1540 | ||
1541 | if (atmel_is_console_port(&port->uart) | ||
1542 | && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) { | ||
1543 | /* | ||
1544 | * The serial core enabled the clock for us, so undo | ||
1545 | * the clk_enable() in atmel_console_setup() | ||
1546 | */ | ||
1547 | clk_disable(port->clk); | ||
1548 | } | ||
1549 | |||
1537 | device_init_wakeup(&pdev->dev, 1); | 1550 | device_init_wakeup(&pdev->dev, 1); |
1538 | platform_set_drvdata(pdev, port); | 1551 | platform_set_drvdata(pdev, port); |
1539 | 1552 | ||
@@ -1544,7 +1557,6 @@ err_add_port: | |||
1544 | port->rx_ring.buf = NULL; | 1557 | port->rx_ring.buf = NULL; |
1545 | err_alloc_ring: | 1558 | err_alloc_ring: |
1546 | if (!atmel_is_console_port(&port->uart)) { | 1559 | if (!atmel_is_console_port(&port->uart)) { |
1547 | clk_disable(port->clk); | ||
1548 | clk_put(port->clk); | 1560 | clk_put(port->clk); |
1549 | port->clk = NULL; | 1561 | port->clk = NULL; |
1550 | } | 1562 | } |
@@ -1568,7 +1580,6 @@ static int __devexit atmel_serial_remove(struct platform_device *pdev) | |||
1568 | 1580 | ||
1569 | /* "port" is allocated statically, so we shouldn't free it */ | 1581 | /* "port" is allocated statically, so we shouldn't free it */ |
1570 | 1582 | ||
1571 | clk_disable(atmel_port->clk); | ||
1572 | clk_put(atmel_port->clk); | 1583 | clk_put(atmel_port->clk); |
1573 | 1584 | ||
1574 | return ret; | 1585 | return ret; |
diff --git a/drivers/serial/crisv10.c b/drivers/serial/crisv10.c index 211c21797ce0..8b2c619a09f2 100644 --- a/drivers/serial/crisv10.c +++ b/drivers/serial/crisv10.c | |||
@@ -34,14 +34,14 @@ static char *serial_version = "$Revision: 1.25 $"; | |||
34 | #include <asm/system.h> | 34 | #include <asm/system.h> |
35 | #include <linux/delay.h> | 35 | #include <linux/delay.h> |
36 | 36 | ||
37 | #include <asm/arch/svinto.h> | 37 | #include <arch/svinto.h> |
38 | 38 | ||
39 | /* non-arch dependent serial structures are in linux/serial.h */ | 39 | /* non-arch dependent serial structures are in linux/serial.h */ |
40 | #include <linux/serial.h> | 40 | #include <linux/serial.h> |
41 | /* while we keep our own stuff (struct e100_serial) in a local .h file */ | 41 | /* while we keep our own stuff (struct e100_serial) in a local .h file */ |
42 | #include "crisv10.h" | 42 | #include "crisv10.h" |
43 | #include <asm/fasttimer.h> | 43 | #include <asm/fasttimer.h> |
44 | #include <asm/arch/io_interface_mux.h> | 44 | #include <arch/io_interface_mux.h> |
45 | 45 | ||
46 | #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER | 46 | #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER |
47 | #ifndef CONFIG_ETRAX_FAST_TIMER | 47 | #ifndef CONFIG_ETRAX_FAST_TIMER |
diff --git a/drivers/serial/crisv10.h b/drivers/serial/crisv10.h index e3c5c8c3c09b..f36a729280bc 100644 --- a/drivers/serial/crisv10.h +++ b/drivers/serial/crisv10.h | |||
@@ -10,7 +10,7 @@ | |||
10 | #include <linux/circ_buf.h> | 10 | #include <linux/circ_buf.h> |
11 | #include <asm/termios.h> | 11 | #include <asm/termios.h> |
12 | #include <asm/dma.h> | 12 | #include <asm/dma.h> |
13 | #include <asm/arch/io_interface_mux.h> | 13 | #include <arch/io_interface_mux.h> |
14 | 14 | ||
15 | /* Software state per channel */ | 15 | /* Software state per channel */ |
16 | 16 | ||
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index f0658d2c45b2..5c0f32c7fbf6 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c | |||
@@ -250,8 +250,7 @@ static inline void h8300_sci_disable(struct uart_port *port) | |||
250 | } | 250 | } |
251 | #endif | 251 | #endif |
252 | 252 | ||
253 | #if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \ | 253 | #if defined(__H8300H__) || defined(__H8300S__) |
254 | defined(__H8300H__) || defined(__H8300S__) | ||
255 | static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag) | 254 | static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag) |
256 | { | 255 | { |
257 | int ch = (port->mapbase - SMR0) >> 3; | 256 | int ch = (port->mapbase - SMR0) >> 3; |
@@ -285,11 +284,6 @@ static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag) | |||
285 | #define sci_init_pins_irda NULL | 284 | #define sci_init_pins_irda NULL |
286 | #endif | 285 | #endif |
287 | 286 | ||
288 | #ifdef SCI_ONLY | ||
289 | #define sci_init_pins_scif NULL | ||
290 | #endif | ||
291 | |||
292 | #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF) | ||
293 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) | 287 | #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) |
294 | static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag) | 288 | static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag) |
295 | { | 289 | { |
@@ -449,7 +443,6 @@ static inline int scif_rxroom(struct uart_port *port) | |||
449 | return sci_in(port, SCFDR) & SCIF_RFDC_MASK; | 443 | return sci_in(port, SCFDR) & SCIF_RFDC_MASK; |
450 | } | 444 | } |
451 | #endif | 445 | #endif |
452 | #endif /* SCIF_ONLY || SCI_AND_SCIF */ | ||
453 | 446 | ||
454 | static inline int sci_txroom(struct uart_port *port) | 447 | static inline int sci_txroom(struct uart_port *port) |
455 | { | 448 | { |
@@ -485,11 +478,9 @@ static void sci_transmit_chars(struct uart_port *port) | |||
485 | return; | 478 | return; |
486 | } | 479 | } |
487 | 480 | ||
488 | #ifndef SCI_ONLY | ||
489 | if (port->type == PORT_SCIF) | 481 | if (port->type == PORT_SCIF) |
490 | count = scif_txroom(port); | 482 | count = scif_txroom(port); |
491 | else | 483 | else |
492 | #endif | ||
493 | count = sci_txroom(port); | 484 | count = sci_txroom(port); |
494 | 485 | ||
495 | do { | 486 | do { |
@@ -519,12 +510,10 @@ static void sci_transmit_chars(struct uart_port *port) | |||
519 | } else { | 510 | } else { |
520 | ctrl = sci_in(port, SCSCR); | 511 | ctrl = sci_in(port, SCSCR); |
521 | 512 | ||
522 | #if !defined(SCI_ONLY) | ||
523 | if (port->type == PORT_SCIF) { | 513 | if (port->type == PORT_SCIF) { |
524 | sci_in(port, SCxSR); /* Dummy read */ | 514 | sci_in(port, SCxSR); /* Dummy read */ |
525 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); | 515 | sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port)); |
526 | } | 516 | } |
527 | #endif | ||
528 | 517 | ||
529 | ctrl |= SCI_CTRL_FLAGS_TIE; | 518 | ctrl |= SCI_CTRL_FLAGS_TIE; |
530 | sci_out(port, SCSCR, ctrl); | 519 | sci_out(port, SCSCR, ctrl); |
@@ -547,11 +536,9 @@ static inline void sci_receive_chars(struct uart_port *port) | |||
547 | return; | 536 | return; |
548 | 537 | ||
549 | while (1) { | 538 | while (1) { |
550 | #if !defined(SCI_ONLY) | ||
551 | if (port->type == PORT_SCIF) | 539 | if (port->type == PORT_SCIF) |
552 | count = scif_rxroom(port); | 540 | count = scif_rxroom(port); |
553 | else | 541 | else |
554 | #endif | ||
555 | count = sci_rxroom(port); | 542 | count = sci_rxroom(port); |
556 | 543 | ||
557 | /* Don't copy more bytes than there is room for in the buffer */ | 544 | /* Don't copy more bytes than there is room for in the buffer */ |
@@ -810,26 +797,27 @@ static irqreturn_t sci_br_interrupt(int irq, void *ptr) | |||
810 | 797 | ||
811 | static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) | 798 | static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr) |
812 | { | 799 | { |
813 | unsigned short ssr_status, scr_status; | 800 | unsigned short ssr_status, scr_status; |
814 | struct uart_port *port = ptr; | 801 | struct uart_port *port = ptr; |
802 | irqreturn_t ret = IRQ_NONE; | ||
815 | 803 | ||
816 | ssr_status = sci_in(port,SCxSR); | 804 | ssr_status = sci_in(port,SCxSR); |
817 | scr_status = sci_in(port,SCSCR); | 805 | scr_status = sci_in(port,SCSCR); |
818 | 806 | ||
819 | /* Tx Interrupt */ | 807 | /* Tx Interrupt */ |
820 | if ((ssr_status & 0x0020) && (scr_status & 0x0080)) | 808 | if ((ssr_status & 0x0020) && (scr_status & SCI_CTRL_FLAGS_TIE)) |
821 | sci_tx_interrupt(irq, ptr); | 809 | ret = sci_tx_interrupt(irq, ptr); |
822 | /* Rx Interrupt */ | 810 | /* Rx Interrupt */ |
823 | if ((ssr_status & 0x0002) && (scr_status & 0x0040)) | 811 | if ((ssr_status & 0x0002) && (scr_status & SCI_CTRL_FLAGS_RIE)) |
824 | sci_rx_interrupt(irq, ptr); | 812 | ret = sci_rx_interrupt(irq, ptr); |
825 | /* Error Interrupt */ | 813 | /* Error Interrupt */ |
826 | if ((ssr_status & 0x0080) && (scr_status & 0x0400)) | 814 | if ((ssr_status & 0x0080) && (scr_status & SCI_CTRL_FLAGS_REIE)) |
827 | sci_er_interrupt(irq, ptr); | 815 | ret = sci_er_interrupt(irq, ptr); |
828 | /* Break Interrupt */ | 816 | /* Break Interrupt */ |
829 | if ((ssr_status & 0x0010) && (scr_status & 0x0200)) | 817 | if ((ssr_status & 0x0010) && (scr_status & SCI_CTRL_FLAGS_REIE)) |
830 | sci_br_interrupt(irq, ptr); | 818 | ret = sci_br_interrupt(irq, ptr); |
831 | 819 | ||
832 | return IRQ_HANDLED; | 820 | return ret; |
833 | } | 821 | } |
834 | 822 | ||
835 | #if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK) | 823 | #if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK) |
@@ -1054,10 +1042,8 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | |||
1054 | 1042 | ||
1055 | sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */ | 1043 | sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */ |
1056 | 1044 | ||
1057 | #if !defined(SCI_ONLY) | ||
1058 | if (port->type == PORT_SCIF) | 1045 | if (port->type == PORT_SCIF) |
1059 | sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST); | 1046 | sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST); |
1060 | #endif | ||
1061 | 1047 | ||
1062 | smr_val = sci_in(port, SCSMR) & 3; | 1048 | smr_val = sci_in(port, SCSMR) & 3; |
1063 | if ((termios->c_cflag & CSIZE) == CS7) | 1049 | if ((termios->c_cflag & CSIZE) == CS7) |
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index 7cd28b226800..6163a45f968f 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
@@ -16,7 +16,6 @@ | |||
16 | # define SCPCR 0xA4000116 /* 16 bit SCI and SCIF */ | 16 | # define SCPCR 0xA4000116 /* 16 bit SCI and SCIF */ |
17 | # define SCPDR 0xA4000136 /* 8 bit SCI and SCIF */ | 17 | # define SCPDR 0xA4000136 /* 8 bit SCI and SCIF */ |
18 | # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ | 18 | # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ |
19 | # define SCI_AND_SCIF | ||
20 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) | 19 | #elif defined(CONFIG_CPU_SUBTYPE_SH7705) |
21 | # define SCIF0 0xA4400000 | 20 | # define SCIF0 0xA4400000 |
22 | # define SCIF2 0xA4410000 | 21 | # define SCIF2 0xA4410000 |
@@ -30,17 +29,15 @@ | |||
30 | * SCIF0 (0xA4400000) -> Internal clock, SCK pin as serial clock output | 29 | * SCIF0 (0xA4400000) -> Internal clock, SCK pin as serial clock output |
31 | */ | 30 | */ |
32 | # define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0 | 31 | # define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0 |
33 | # define SCIF_ONLY | ||
34 | #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 32 | #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
35 | defined(CONFIG_CPU_SUBTYPE_SH7721) | 33 | defined(CONFIG_CPU_SUBTYPE_SH7721) |
36 | # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ | 34 | # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ |
37 | # define SCIF_ONLY | ||
38 | #define SCIF_ORER 0x0200 /* overrun error bit */ | 35 | #define SCIF_ORER 0x0200 /* overrun error bit */ |
39 | #elif defined(CONFIG_SH_RTS7751R2D) | 36 | #elif defined(CONFIG_SH_RTS7751R2D) |
37 | # define SCSPTR1 0xFFE0001C /* 8 bit SCIF */ | ||
40 | # define SCSPTR2 0xFFE80020 /* 16 bit SCIF */ | 38 | # define SCSPTR2 0xFFE80020 /* 16 bit SCIF */ |
41 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 39 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
42 | # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 40 | # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
43 | # define SCIF_ONLY | ||
44 | #elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \ | 41 | #elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \ |
45 | defined(CONFIG_CPU_SUBTYPE_SH7750R) || \ | 42 | defined(CONFIG_CPU_SUBTYPE_SH7750R) || \ |
46 | defined(CONFIG_CPU_SUBTYPE_SH7750S) || \ | 43 | defined(CONFIG_CPU_SUBTYPE_SH7750S) || \ |
@@ -53,28 +50,24 @@ | |||
53 | # define SCSCR_INIT(port) (((port)->type == PORT_SCI) ? \ | 50 | # define SCSCR_INIT(port) (((port)->type == PORT_SCI) ? \ |
54 | 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ : \ | 51 | 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ : \ |
55 | 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ ) | 52 | 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ ) |
56 | # define SCI_AND_SCIF | ||
57 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) | 53 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) |
58 | # define SCSPTR0 0xfe600024 /* 16 bit SCIF */ | 54 | # define SCSPTR0 0xfe600024 /* 16 bit SCIF */ |
59 | # define SCSPTR1 0xfe610024 /* 16 bit SCIF */ | 55 | # define SCSPTR1 0xfe610024 /* 16 bit SCIF */ |
60 | # define SCSPTR2 0xfe620024 /* 16 bit SCIF */ | 56 | # define SCSPTR2 0xfe620024 /* 16 bit SCIF */ |
61 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 57 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
62 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 58 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
63 | # define SCIF_ONLY | ||
64 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) | 59 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) |
65 | # define SCSPTR0 0xA4400000 /* 16 bit SCIF */ | 60 | # define SCSPTR0 0xA4400000 /* 16 bit SCIF */ |
66 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 61 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
67 | # define PACR 0xa4050100 | 62 | # define PACR 0xa4050100 |
68 | # define PBCR 0xa4050102 | 63 | # define PBCR 0xa4050102 |
69 | # define SCSCR_INIT(port) 0x3B | 64 | # define SCSCR_INIT(port) 0x3B |
70 | # define SCIF_ONLY | ||
71 | #elif defined(CONFIG_CPU_SUBTYPE_SH7343) | 65 | #elif defined(CONFIG_CPU_SUBTYPE_SH7343) |
72 | # define SCSPTR0 0xffe00010 /* 16 bit SCIF */ | 66 | # define SCSPTR0 0xffe00010 /* 16 bit SCIF */ |
73 | # define SCSPTR1 0xffe10010 /* 16 bit SCIF */ | 67 | # define SCSPTR1 0xffe10010 /* 16 bit SCIF */ |
74 | # define SCSPTR2 0xffe20010 /* 16 bit SCIF */ | 68 | # define SCSPTR2 0xffe20010 /* 16 bit SCIF */ |
75 | # define SCSPTR3 0xffe30010 /* 16 bit SCIF */ | 69 | # define SCSPTR3 0xffe30010 /* 16 bit SCIF */ |
76 | # define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */ | 70 | # define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */ |
77 | # define SCIF_ONLY | ||
78 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) | 71 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) |
79 | # define PADR 0xA4050120 | 72 | # define PADR 0xA4050120 |
80 | # define PSDR 0xA405013e | 73 | # define PSDR 0xA405013e |
@@ -82,7 +75,6 @@ | |||
82 | # define PSCR 0xA405011E | 75 | # define PSCR 0xA405011E |
83 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 76 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
84 | # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 77 | # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
85 | # define SCIF_ONLY | ||
86 | #elif defined(CONFIG_CPU_SUBTYPE_SH7366) | 78 | #elif defined(CONFIG_CPU_SUBTYPE_SH7366) |
87 | # define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ | 79 | # define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ |
88 | # define SCSPTR0 SCPDR0 | 80 | # define SCSPTR0 SCPDR0 |
@@ -97,12 +89,10 @@ | |||
97 | # define SCSPTR5 0xa4050128 | 89 | # define SCSPTR5 0xa4050128 |
98 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 90 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
99 | # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 91 | # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
100 | # define SCIF_ONLY | ||
101 | #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) | 92 | #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) |
102 | # define SCSPTR2 0xffe80020 /* 16 bit SCIF */ | 93 | # define SCSPTR2 0xffe80020 /* 16 bit SCIF */ |
103 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 94 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
104 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 95 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
105 | # define SCIF_ONLY | ||
106 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) | 96 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) |
107 | # define SCIF_BASE_ADDR 0x01030000 | 97 | # define SCIF_BASE_ADDR 0x01030000 |
108 | # define SCIF_ADDR_SH5 PHYS_PERIPHERAL_BLOCK+SCIF_BASE_ADDR | 98 | # define SCIF_ADDR_SH5 PHYS_PERIPHERAL_BLOCK+SCIF_BASE_ADDR |
@@ -111,14 +101,11 @@ | |||
111 | # define SCSPTR2 ((port->mapbase)+SCIF_PTR2_OFFS) /* 16 bit SCIF */ | 101 | # define SCSPTR2 ((port->mapbase)+SCIF_PTR2_OFFS) /* 16 bit SCIF */ |
112 | # define SCLSR2 ((port->mapbase)+SCIF_LSR2_OFFS) /* 16 bit SCIF */ | 102 | # define SCLSR2 ((port->mapbase)+SCIF_LSR2_OFFS) /* 16 bit SCIF */ |
113 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0, TE=1,RE=1,REIE=1 */ | 103 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0, TE=1,RE=1,REIE=1 */ |
114 | # define SCIF_ONLY | ||
115 | #elif defined(CONFIG_H83007) || defined(CONFIG_H83068) | 104 | #elif defined(CONFIG_H83007) || defined(CONFIG_H83068) |
116 | # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ | 105 | # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ |
117 | # define SCI_ONLY | ||
118 | # define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port) | 106 | # define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port) |
119 | #elif defined(CONFIG_H8S2678) | 107 | #elif defined(CONFIG_H8S2678) |
120 | # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ | 108 | # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ |
121 | # define SCI_ONLY | ||
122 | # define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port) | 109 | # define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port) |
123 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) | 110 | #elif defined(CONFIG_CPU_SUBTYPE_SH7763) |
124 | # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ | 111 | # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ |
@@ -126,20 +113,17 @@ | |||
126 | # define SCSPTR2 0xffe10020 /* 16 bit SCIF/IRDA */ | 113 | # define SCSPTR2 0xffe10020 /* 16 bit SCIF/IRDA */ |
127 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 114 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
128 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 115 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
129 | # define SCIF_ONLY | ||
130 | #elif defined(CONFIG_CPU_SUBTYPE_SH7770) | 116 | #elif defined(CONFIG_CPU_SUBTYPE_SH7770) |
131 | # define SCSPTR0 0xff923020 /* 16 bit SCIF */ | 117 | # define SCSPTR0 0xff923020 /* 16 bit SCIF */ |
132 | # define SCSPTR1 0xff924020 /* 16 bit SCIF */ | 118 | # define SCSPTR1 0xff924020 /* 16 bit SCIF */ |
133 | # define SCSPTR2 0xff925020 /* 16 bit SCIF */ | 119 | # define SCSPTR2 0xff925020 /* 16 bit SCIF */ |
134 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 120 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
135 | # define SCSCR_INIT(port) 0x3c /* TIE=0,RIE=0,TE=1,RE=1,REIE=1,cke=2 */ | 121 | # define SCSCR_INIT(port) 0x3c /* TIE=0,RIE=0,TE=1,RE=1,REIE=1,cke=2 */ |
136 | # define SCIF_ONLY | ||
137 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) | 122 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) |
138 | # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ | 123 | # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ |
139 | # define SCSPTR1 0xffe10024 /* 16 bit SCIF */ | 124 | # define SCSPTR1 0xffe10024 /* 16 bit SCIF */ |
140 | # define SCIF_ORER 0x0001 /* Overrun error bit */ | 125 | # define SCIF_ORER 0x0001 /* Overrun error bit */ |
141 | # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 126 | # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
142 | # define SCIF_ONLY | ||
143 | #elif defined(CONFIG_CPU_SUBTYPE_SH7785) | 127 | #elif defined(CONFIG_CPU_SUBTYPE_SH7785) |
144 | # define SCSPTR0 0xffea0024 /* 16 bit SCIF */ | 128 | # define SCSPTR0 0xffea0024 /* 16 bit SCIF */ |
145 | # define SCSPTR1 0xffeb0024 /* 16 bit SCIF */ | 129 | # define SCSPTR1 0xffeb0024 /* 16 bit SCIF */ |
@@ -149,7 +133,6 @@ | |||
149 | # define SCSPTR5 0xffef0024 /* 16 bit SCIF */ | 133 | # define SCSPTR5 0xffef0024 /* 16 bit SCIF */ |
150 | # define SCIF_OPER 0x0001 /* Overrun error bit */ | 134 | # define SCIF_OPER 0x0001 /* Overrun error bit */ |
151 | # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 135 | # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
152 | # define SCIF_ONLY | ||
153 | #elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \ | 136 | #elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \ |
154 | defined(CONFIG_CPU_SUBTYPE_SH7206) || \ | 137 | defined(CONFIG_CPU_SUBTYPE_SH7206) || \ |
155 | defined(CONFIG_CPU_SUBTYPE_SH7263) | 138 | defined(CONFIG_CPU_SUBTYPE_SH7263) |
@@ -158,14 +141,12 @@ | |||
158 | # define SCSPTR2 0xfffe9020 /* 16 bit SCIF */ | 141 | # define SCSPTR2 0xfffe9020 /* 16 bit SCIF */ |
159 | # define SCSPTR3 0xfffe9820 /* 16 bit SCIF */ | 142 | # define SCSPTR3 0xfffe9820 /* 16 bit SCIF */ |
160 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 143 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
161 | # define SCIF_ONLY | ||
162 | #elif defined(CONFIG_CPU_SUBTYPE_SH7619) | 144 | #elif defined(CONFIG_CPU_SUBTYPE_SH7619) |
163 | # define SCSPTR0 0xf8400020 /* 16 bit SCIF */ | 145 | # define SCSPTR0 0xf8400020 /* 16 bit SCIF */ |
164 | # define SCSPTR1 0xf8410020 /* 16 bit SCIF */ | 146 | # define SCSPTR1 0xf8410020 /* 16 bit SCIF */ |
165 | # define SCSPTR2 0xf8420020 /* 16 bit SCIF */ | 147 | # define SCSPTR2 0xf8420020 /* 16 bit SCIF */ |
166 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 148 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
167 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 149 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
168 | # define SCIF_ONLY | ||
169 | #elif defined(CONFIG_CPU_SUBTYPE_SHX3) | 150 | #elif defined(CONFIG_CPU_SUBTYPE_SHX3) |
170 | # define SCSPTR0 0xffc30020 /* 16 bit SCIF */ | 151 | # define SCSPTR0 0xffc30020 /* 16 bit SCIF */ |
171 | # define SCSPTR1 0xffc40020 /* 16 bit SCIF */ | 152 | # define SCSPTR1 0xffc40020 /* 16 bit SCIF */ |
@@ -173,7 +154,6 @@ | |||
173 | # define SCSPTR3 0xffc60020 /* 16 bit SCIF */ | 154 | # define SCSPTR3 0xffc60020 /* 16 bit SCIF */ |
174 | # define SCIF_ORER 0x0001 /* Overrun error bit */ | 155 | # define SCIF_ORER 0x0001 /* Overrun error bit */ |
175 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 156 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
176 | # define SCIF_ONLY | ||
177 | #else | 157 | #else |
178 | # error CPU subtype not defined | 158 | # error CPU subtype not defined |
179 | #endif | 159 | #endif |
@@ -186,6 +166,7 @@ | |||
186 | #if defined(CONFIG_CPU_SUBTYPE_SH7750) || \ | 166 | #if defined(CONFIG_CPU_SUBTYPE_SH7750) || \ |
187 | defined(CONFIG_CPU_SUBTYPE_SH7091) || \ | 167 | defined(CONFIG_CPU_SUBTYPE_SH7091) || \ |
188 | defined(CONFIG_CPU_SUBTYPE_SH7750R) || \ | 168 | defined(CONFIG_CPU_SUBTYPE_SH7750R) || \ |
169 | defined(CONFIG_CPU_SUBTYPE_SH7722) || \ | ||
189 | defined(CONFIG_CPU_SUBTYPE_SH7750S) || \ | 170 | defined(CONFIG_CPU_SUBTYPE_SH7750S) || \ |
190 | defined(CONFIG_CPU_SUBTYPE_SH7751) || \ | 171 | defined(CONFIG_CPU_SUBTYPE_SH7751) || \ |
191 | defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ | 172 | defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ |
@@ -244,55 +225,28 @@ | |||
244 | # define SCIF_TXROOM_MAX 16 | 225 | # define SCIF_TXROOM_MAX 16 |
245 | #endif | 226 | #endif |
246 | 227 | ||
247 | #if defined(SCI_ONLY) | 228 | #define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND) |
248 | # define SCxSR_TEND(port) SCI_TEND | 229 | #define SCxSR_ERRORS(port) (((port)->type == PORT_SCI) ? SCI_ERRORS : SCIF_ERRORS) |
249 | # define SCxSR_ERRORS(port) SCI_ERRORS | 230 | #define SCxSR_RDxF(port) (((port)->type == PORT_SCI) ? SCI_RDRF : SCIF_RDF) |
250 | # define SCxSR_RDxF(port) SCI_RDRF | 231 | #define SCxSR_TDxE(port) (((port)->type == PORT_SCI) ? SCI_TDRE : SCIF_TDFE) |
251 | # define SCxSR_TDxE(port) SCI_TDRE | 232 | #define SCxSR_FER(port) (((port)->type == PORT_SCI) ? SCI_FER : SCIF_FER) |
252 | # define SCxSR_ORER(port) SCI_ORER | 233 | #define SCxSR_PER(port) (((port)->type == PORT_SCI) ? SCI_PER : SCIF_PER) |
253 | # define SCxSR_FER(port) SCI_FER | 234 | #define SCxSR_BRK(port) (((port)->type == PORT_SCI) ? 0x00 : SCIF_BRK) |
254 | # define SCxSR_PER(port) SCI_PER | 235 | |
255 | # define SCxSR_BRK(port) 0x00 | ||
256 | # define SCxSR_RDxF_CLEAR(port) 0xbc | ||
257 | # define SCxSR_ERROR_CLEAR(port) 0xc4 | ||
258 | # define SCxSR_TDxE_CLEAR(port) 0x78 | ||
259 | # define SCxSR_BREAK_CLEAR(port) 0xc4 | ||
260 | #elif defined(SCIF_ONLY) | ||
261 | # define SCxSR_TEND(port) SCIF_TEND | ||
262 | # define SCxSR_ERRORS(port) SCIF_ERRORS | ||
263 | # define SCxSR_RDxF(port) SCIF_RDF | ||
264 | # define SCxSR_TDxE(port) SCIF_TDFE | ||
265 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) | 236 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) |
266 | # define SCxSR_ORER(port) SCIF_ORER | 237 | # define SCxSR_ORER(port) (((port)->type == PORT_SCI) ? SCI_ORER : SCIF_ORER) |
267 | #else | 238 | #else |
268 | # define SCxSR_ORER(port) 0x0000 | 239 | # define SCxSR_ORER(port) (((port)->type == PORT_SCI) ? SCI_ORER : 0x0000) |
269 | #endif | 240 | #endif |
270 | # define SCxSR_FER(port) SCIF_FER | 241 | |
271 | # define SCxSR_PER(port) SCIF_PER | ||
272 | # define SCxSR_BRK(port) SCIF_BRK | ||
273 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ | 242 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ |
274 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ | 243 | defined(CONFIG_CPU_SUBTYPE_SH7720) || \ |
275 | defined(CONFIG_CPU_SUBTYPE_SH7721) | 244 | defined(CONFIG_CPU_SUBTYPE_SH7721) |
276 | # define SCxSR_RDxF_CLEAR(port) (sci_in(port,SCxSR)&0xfffc) | 245 | # define SCxSR_RDxF_CLEAR(port) (sci_in(port, SCxSR) & 0xfffc) |
277 | # define SCxSR_ERROR_CLEAR(port) (sci_in(port,SCxSR)&0xfd73) | 246 | # define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73) |
278 | # define SCxSR_TDxE_CLEAR(port) (sci_in(port,SCxSR)&0xffdf) | 247 | # define SCxSR_TDxE_CLEAR(port) (sci_in(port, SCxSR) & 0xffdf) |
279 | # define SCxSR_BREAK_CLEAR(port) (sci_in(port,SCxSR)&0xffe3) | 248 | # define SCxSR_BREAK_CLEAR(port) (sci_in(port, SCxSR) & 0xffe3) |
280 | #else | ||
281 | /* SH7705 can also use this, clearing is same between 7705 and 7709 */ | ||
282 | # define SCxSR_RDxF_CLEAR(port) 0x00fc | ||
283 | # define SCxSR_ERROR_CLEAR(port) 0x0073 | ||
284 | # define SCxSR_TDxE_CLEAR(port) 0x00df | ||
285 | # define SCxSR_BREAK_CLEAR(port) 0x00e3 | ||
286 | #endif | ||
287 | #else | 249 | #else |
288 | # define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND) | ||
289 | # define SCxSR_ERRORS(port) (((port)->type == PORT_SCI) ? SCI_ERRORS : SCIF_ERRORS) | ||
290 | # define SCxSR_RDxF(port) (((port)->type == PORT_SCI) ? SCI_RDRF : SCIF_RDF) | ||
291 | # define SCxSR_TDxE(port) (((port)->type == PORT_SCI) ? SCI_TDRE : SCIF_TDFE) | ||
292 | # define SCxSR_ORER(port) (((port)->type == PORT_SCI) ? SCI_ORER : 0x0000) | ||
293 | # define SCxSR_FER(port) (((port)->type == PORT_SCI) ? SCI_FER : SCIF_FER) | ||
294 | # define SCxSR_PER(port) (((port)->type == PORT_SCI) ? SCI_PER : SCIF_PER) | ||
295 | # define SCxSR_BRK(port) (((port)->type == PORT_SCI) ? 0x00 : SCIF_BRK) | ||
296 | # define SCxSR_RDxF_CLEAR(port) (((port)->type == PORT_SCI) ? 0xbc : 0x00fc) | 250 | # define SCxSR_RDxF_CLEAR(port) (((port)->type == PORT_SCI) ? 0xbc : 0x00fc) |
297 | # define SCxSR_ERROR_CLEAR(port) (((port)->type == PORT_SCI) ? 0xc4 : 0x0073) | 251 | # define SCxSR_ERROR_CLEAR(port) (((port)->type == PORT_SCI) ? 0xc4 : 0x0073) |
298 | # define SCxSR_TDxE_CLEAR(port) (((port)->type == PORT_SCI) ? 0x78 : 0x00df) | 252 | # define SCxSR_TDxE_CLEAR(port) (((port)->type == PORT_SCI) ? 0x78 : 0x00df) |
@@ -574,18 +528,20 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
574 | defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ | 528 | defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ |
575 | defined(CONFIG_CPU_SUBTYPE_SH7750R) || \ | 529 | defined(CONFIG_CPU_SUBTYPE_SH7750R) || \ |
576 | defined(CONFIG_CPU_SUBTYPE_SH7750S) || \ | 530 | defined(CONFIG_CPU_SUBTYPE_SH7750S) || \ |
577 | defined(CONFIG_CPU_SUBTYPE_SH7091) || \ | 531 | defined(CONFIG_CPU_SUBTYPE_SH7091) |
578 | defined(CONFIG_CPU_SUBTYPE_SH4_202) | ||
579 | static inline int sci_rxd_in(struct uart_port *port) | 532 | static inline int sci_rxd_in(struct uart_port *port) |
580 | { | 533 | { |
581 | #ifndef SCIF_ONLY | ||
582 | if (port->mapbase == 0xffe00000) | 534 | if (port->mapbase == 0xffe00000) |
583 | return ctrl_inb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */ | 535 | return ctrl_inb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */ |
584 | #endif | ||
585 | #ifndef SCI_ONLY | ||
586 | if (port->mapbase == 0xffe80000) | 536 | if (port->mapbase == 0xffe80000) |
587 | return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ | 537 | return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ |
588 | #endif | 538 | return 1; |
539 | } | ||
540 | #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) | ||
541 | static inline int sci_rxd_in(struct uart_port *port) | ||
542 | { | ||
543 | if (port->mapbase == 0xffe80000) | ||
544 | return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ | ||
589 | return 1; | 545 | return 1; |
590 | } | 546 | } |
591 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) | 547 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) |
@@ -651,7 +607,7 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
651 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) | 607 | #elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) |
652 | static inline int sci_rxd_in(struct uart_port *port) | 608 | static inline int sci_rxd_in(struct uart_port *port) |
653 | { | 609 | { |
654 | return sci_in(port, SCSPTR)&0x0001 ? 1 : 0; /* SCIF */ | 610 | return sci_in(port, SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ |
655 | } | 611 | } |
656 | #elif defined(__H8300H__) || defined(__H8300S__) | 612 | #elif defined(__H8300H__) || defined(__H8300S__) |
657 | static inline int sci_rxd_in(struct uart_port *port) | 613 | static inline int sci_rxd_in(struct uart_port *port) |
diff --git a/drivers/staging/echo/echo.c b/drivers/staging/echo/echo.c index b8f2c5e9dee5..fd4007e329e7 100644 --- a/drivers/staging/echo/echo.c +++ b/drivers/staging/echo/echo.c | |||
@@ -106,7 +106,6 @@ | |||
106 | 106 | ||
107 | #include <linux/kernel.h> /* We're doing kernel work */ | 107 | #include <linux/kernel.h> /* We're doing kernel work */ |
108 | #include <linux/module.h> | 108 | #include <linux/module.h> |
109 | #include <linux/kernel.h> | ||
110 | #include <linux/slab.h> | 109 | #include <linux/slab.h> |
111 | 110 | ||
112 | #include "bit_operations.h" | 111 | #include "bit_operations.h" |
diff --git a/drivers/staging/me4000/me4000.c b/drivers/staging/me4000/me4000.c index 0b33773bb4f6..0394e2709278 100644 --- a/drivers/staging/me4000/me4000.c +++ b/drivers/staging/me4000/me4000.c | |||
@@ -39,7 +39,6 @@ | |||
39 | #include <asm/uaccess.h> | 39 | #include <asm/uaccess.h> |
40 | #include <asm/io.h> | 40 | #include <asm/io.h> |
41 | #include <asm/system.h> | 41 | #include <asm/system.h> |
42 | #include <asm/uaccess.h> | ||
43 | 42 | ||
44 | /* Include-File for the Meilhaus ME-4000 I/O board */ | 43 | /* Include-File for the Meilhaus ME-4000 I/O board */ |
45 | #include "me4000.h" | 44 | #include "me4000.h" |
@@ -1633,9 +1632,6 @@ static int me4000_release(struct inode *inode_p, struct file *file_p) | |||
1633 | 1632 | ||
1634 | free_irq(ext_int_context->irq, ext_int_context); | 1633 | free_irq(ext_int_context->irq, ext_int_context); |
1635 | 1634 | ||
1636 | /* Delete the fasync structure and free memory */ | ||
1637 | me4000_ext_int_fasync(0, file_p, 0); | ||
1638 | |||
1639 | /* Mark as unused */ | 1635 | /* Mark as unused */ |
1640 | ext_int_context->in_use = 0; | 1636 | ext_int_context->in_use = 0; |
1641 | } else { | 1637 | } else { |
diff --git a/drivers/telephony/ixj.c b/drivers/telephony/ixj.c index 41b6530b8f25..a913efc69669 100644 --- a/drivers/telephony/ixj.c +++ b/drivers/telephony/ixj.c | |||
@@ -2328,7 +2328,6 @@ static int ixj_release(struct inode *inode, struct file *file_p) | |||
2328 | j->rec_codec = j->play_codec = 0; | 2328 | j->rec_codec = j->play_codec = 0; |
2329 | j->rec_frame_size = j->play_frame_size = 0; | 2329 | j->rec_frame_size = j->play_frame_size = 0; |
2330 | j->flags.cidsent = j->flags.cidring = 0; | 2330 | j->flags.cidsent = j->flags.cidring = 0; |
2331 | ixj_fasync(-1, file_p, 0); /* remove from list of async notification */ | ||
2332 | 2331 | ||
2333 | if(j->cardtype == QTI_LINEJACK && !j->readers && !j->writers) { | 2332 | if(j->cardtype == QTI_LINEJACK && !j->readers && !j->writers) { |
2334 | ixj_set_port(j, PORT_PSTN); | 2333 | ixj_set_port(j, PORT_PSTN); |
diff --git a/drivers/uio/uio.c b/drivers/uio/uio.c index f9b4647255aa..2d2440cd57a9 100644 --- a/drivers/uio/uio.c +++ b/drivers/uio/uio.c | |||
@@ -367,9 +367,6 @@ static int uio_release(struct inode *inode, struct file *filep) | |||
367 | ret = idev->info->release(idev->info, inode); | 367 | ret = idev->info->release(idev->info, inode); |
368 | 368 | ||
369 | module_put(idev->owner); | 369 | module_put(idev->owner); |
370 | |||
371 | if (filep->f_flags & FASYNC) | ||
372 | ret = uio_fasync(-1, filep, 0); | ||
373 | kfree(listener); | 370 | kfree(listener); |
374 | return ret; | 371 | return ret; |
375 | } | 372 | } |
diff --git a/drivers/usb/gadget/inode.c b/drivers/usb/gadget/inode.c index f4585d3e90d7..eeb26c0f88e5 100644 --- a/drivers/usb/gadget/inode.c +++ b/drivers/usb/gadget/inode.c | |||
@@ -1251,7 +1251,6 @@ dev_release (struct inode *inode, struct file *fd) | |||
1251 | * alternatively, all host requests will time out. | 1251 | * alternatively, all host requests will time out. |
1252 | */ | 1252 | */ |
1253 | 1253 | ||
1254 | fasync_helper (-1, fd, 0, &dev->fasync); | ||
1255 | kfree (dev->buf); | 1254 | kfree (dev->buf); |
1256 | dev->buf = NULL; | 1255 | dev->buf = NULL; |
1257 | put_dev (dev); | 1256 | put_dev (dev); |
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 0f13448c6f79..3f3ce13fef43 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig | |||
@@ -2083,6 +2083,38 @@ config FB_METRONOME | |||
2083 | controller. The pre-release name for this device was 8track | 2083 | controller. The pre-release name for this device was 8track |
2084 | and could also have been called by some vendors as PVI-nnnn. | 2084 | and could also have been called by some vendors as PVI-nnnn. |
2085 | 2085 | ||
2086 | config FB_MB862XX | ||
2087 | tristate "Fujitsu MB862xx GDC support" | ||
2088 | depends on FB | ||
2089 | select FB_CFB_FILLRECT | ||
2090 | select FB_CFB_COPYAREA | ||
2091 | select FB_CFB_IMAGEBLIT | ||
2092 | ---help--- | ||
2093 | Frame buffer driver for Fujitsu Carmine/Coral-P(A)/Lime controllers. | ||
2094 | |||
2095 | config FB_MB862XX_PCI_GDC | ||
2096 | bool "Carmine/Coral-P(A) GDC" | ||
2097 | depends on PCI && FB_MB862XX | ||
2098 | ---help--- | ||
2099 | This enables framebuffer support for Fujitsu Carmine/Coral-P(A) | ||
2100 | PCI graphics controller devices. | ||
2101 | |||
2102 | config FB_MB862XX_LIME | ||
2103 | bool "Lime GDC" | ||
2104 | depends on FB_MB862XX | ||
2105 | depends on OF && !FB_MB862XX_PCI_GDC | ||
2106 | select FB_FOREIGN_ENDIAN | ||
2107 | select FB_LITTLE_ENDIAN | ||
2108 | ---help--- | ||
2109 | Framebuffer support for Fujitsu Lime GDC on host CPU bus. | ||
2110 | |||
2111 | config FB_PRE_INIT_FB | ||
2112 | bool "Don't reinitialize, use bootloader's GDC/Display configuration" | ||
2113 | depends on FB_MB862XX_LIME | ||
2114 | ---help--- | ||
2115 | Select this option if display contents should be inherited as set by | ||
2116 | the bootloader. | ||
2117 | |||
2086 | source "drivers/video/omap/Kconfig" | 2118 | source "drivers/video/omap/Kconfig" |
2087 | 2119 | ||
2088 | source "drivers/video/backlight/Kconfig" | 2120 | source "drivers/video/backlight/Kconfig" |
diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 248bddc8d0b0..e39e33e797da 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile | |||
@@ -122,6 +122,7 @@ obj-$(CONFIG_FB_SH_MOBILE_LCDC) += sh_mobile_lcdcfb.o | |||
122 | obj-$(CONFIG_FB_OMAP) += omap/ | 122 | obj-$(CONFIG_FB_OMAP) += omap/ |
123 | obj-$(CONFIG_XEN_FBDEV_FRONTEND) += xen-fbfront.o | 123 | obj-$(CONFIG_XEN_FBDEV_FRONTEND) += xen-fbfront.o |
124 | obj-$(CONFIG_FB_CARMINE) += carminefb.o | 124 | obj-$(CONFIG_FB_CARMINE) += carminefb.o |
125 | obj-$(CONFIG_FB_MB862XX) += mb862xx/ | ||
125 | 126 | ||
126 | # Platform or fallback drivers go here | 127 | # Platform or fallback drivers go here |
127 | obj-$(CONFIG_FB_UVESA) += uvesafb.o | 128 | obj-$(CONFIG_FB_UVESA) += uvesafb.o |
diff --git a/drivers/video/cirrusfb.c b/drivers/video/cirrusfb.c index 048b139f0e50..8a8760230bc7 100644 --- a/drivers/video/cirrusfb.c +++ b/drivers/video/cirrusfb.c | |||
@@ -2049,7 +2049,7 @@ static void cirrusfb_pci_unmap(struct fb_info *info) | |||
2049 | #endif /* CONFIG_PCI */ | 2049 | #endif /* CONFIG_PCI */ |
2050 | 2050 | ||
2051 | #ifdef CONFIG_ZORRO | 2051 | #ifdef CONFIG_ZORRO |
2052 | static void __devexit cirrusfb_zorro_unmap(struct fb_info *info) | 2052 | static void cirrusfb_zorro_unmap(struct fb_info *info) |
2053 | { | 2053 | { |
2054 | struct cirrusfb_info *cinfo = info->par; | 2054 | struct cirrusfb_info *cinfo = info->par; |
2055 | struct zorro_dev *zdev = to_zorro_dev(info->device); | 2055 | struct zorro_dev *zdev = to_zorro_dev(info->device); |
diff --git a/drivers/video/fbmem.c b/drivers/video/fbmem.c index 6048b55f2878..1d5ae39cb271 100644 --- a/drivers/video/fbmem.c +++ b/drivers/video/fbmem.c | |||
@@ -1002,13 +1002,9 @@ fb_blank(struct fb_info *info, int blank) | |||
1002 | return ret; | 1002 | return ret; |
1003 | } | 1003 | } |
1004 | 1004 | ||
1005 | static long | 1005 | static long do_fb_ioctl(struct fb_info *info, unsigned int cmd, |
1006 | fb_ioctl(struct file *file, unsigned int cmd, | 1006 | unsigned long arg) |
1007 | unsigned long arg) | ||
1008 | { | 1007 | { |
1009 | struct inode *inode = file->f_path.dentry->d_inode; | ||
1010 | int fbidx = iminor(inode); | ||
1011 | struct fb_info *info; | ||
1012 | struct fb_ops *fb; | 1008 | struct fb_ops *fb; |
1013 | struct fb_var_screeninfo var; | 1009 | struct fb_var_screeninfo var; |
1014 | struct fb_fix_screeninfo fix; | 1010 | struct fb_fix_screeninfo fix; |
@@ -1018,14 +1014,10 @@ fb_ioctl(struct file *file, unsigned int cmd, | |||
1018 | void __user *argp = (void __user *)arg; | 1014 | void __user *argp = (void __user *)arg; |
1019 | long ret = 0; | 1015 | long ret = 0; |
1020 | 1016 | ||
1021 | info = registered_fb[fbidx]; | ||
1022 | mutex_lock(&info->lock); | ||
1023 | fb = info->fbops; | 1017 | fb = info->fbops; |
1024 | 1018 | if (!fb) | |
1025 | if (!fb) { | ||
1026 | mutex_unlock(&info->lock); | ||
1027 | return -ENODEV; | 1019 | return -ENODEV; |
1028 | } | 1020 | |
1029 | switch (cmd) { | 1021 | switch (cmd) { |
1030 | case FBIOGET_VSCREENINFO: | 1022 | case FBIOGET_VSCREENINFO: |
1031 | ret = copy_to_user(argp, &info->var, | 1023 | ret = copy_to_user(argp, &info->var, |
@@ -1126,6 +1118,21 @@ fb_ioctl(struct file *file, unsigned int cmd, | |||
1126 | else | 1118 | else |
1127 | ret = fb->fb_ioctl(info, cmd, arg); | 1119 | ret = fb->fb_ioctl(info, cmd, arg); |
1128 | } | 1120 | } |
1121 | return ret; | ||
1122 | } | ||
1123 | |||
1124 | static long fb_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | ||
1125 | __acquires(&info->lock) | ||
1126 | __releases(&info->lock) | ||
1127 | { | ||
1128 | struct inode *inode = file->f_path.dentry->d_inode; | ||
1129 | int fbidx = iminor(inode); | ||
1130 | struct fb_info *info; | ||
1131 | long ret; | ||
1132 | |||
1133 | info = registered_fb[fbidx]; | ||
1134 | mutex_lock(&info->lock); | ||
1135 | ret = do_fb_ioctl(info, cmd, arg); | ||
1129 | mutex_unlock(&info->lock); | 1136 | mutex_unlock(&info->lock); |
1130 | return ret; | 1137 | return ret; |
1131 | } | 1138 | } |
@@ -1157,8 +1164,8 @@ struct fb_cmap32 { | |||
1157 | compat_caddr_t transp; | 1164 | compat_caddr_t transp; |
1158 | }; | 1165 | }; |
1159 | 1166 | ||
1160 | static int fb_getput_cmap(struct inode *inode, struct file *file, | 1167 | static int fb_getput_cmap(struct fb_info *info, unsigned int cmd, |
1161 | unsigned int cmd, unsigned long arg) | 1168 | unsigned long arg) |
1162 | { | 1169 | { |
1163 | struct fb_cmap_user __user *cmap; | 1170 | struct fb_cmap_user __user *cmap; |
1164 | struct fb_cmap32 __user *cmap32; | 1171 | struct fb_cmap32 __user *cmap32; |
@@ -1181,7 +1188,7 @@ static int fb_getput_cmap(struct inode *inode, struct file *file, | |||
1181 | put_user(compat_ptr(data), &cmap->transp)) | 1188 | put_user(compat_ptr(data), &cmap->transp)) |
1182 | return -EFAULT; | 1189 | return -EFAULT; |
1183 | 1190 | ||
1184 | err = fb_ioctl(file, cmd, (unsigned long) cmap); | 1191 | err = do_fb_ioctl(info, cmd, (unsigned long) cmap); |
1185 | 1192 | ||
1186 | if (!err) { | 1193 | if (!err) { |
1187 | if (copy_in_user(&cmap32->start, | 1194 | if (copy_in_user(&cmap32->start, |
@@ -1223,8 +1230,8 @@ static int do_fscreeninfo_to_user(struct fb_fix_screeninfo *fix, | |||
1223 | return err; | 1230 | return err; |
1224 | } | 1231 | } |
1225 | 1232 | ||
1226 | static int fb_get_fscreeninfo(struct inode *inode, struct file *file, | 1233 | static int fb_get_fscreeninfo(struct fb_info *info, unsigned int cmd, |
1227 | unsigned int cmd, unsigned long arg) | 1234 | unsigned long arg) |
1228 | { | 1235 | { |
1229 | mm_segment_t old_fs; | 1236 | mm_segment_t old_fs; |
1230 | struct fb_fix_screeninfo fix; | 1237 | struct fb_fix_screeninfo fix; |
@@ -1235,7 +1242,7 @@ static int fb_get_fscreeninfo(struct inode *inode, struct file *file, | |||
1235 | 1242 | ||
1236 | old_fs = get_fs(); | 1243 | old_fs = get_fs(); |
1237 | set_fs(KERNEL_DS); | 1244 | set_fs(KERNEL_DS); |
1238 | err = fb_ioctl(file, cmd, (unsigned long) &fix); | 1245 | err = do_fb_ioctl(info, cmd, (unsigned long) &fix); |
1239 | set_fs(old_fs); | 1246 | set_fs(old_fs); |
1240 | 1247 | ||
1241 | if (!err) | 1248 | if (!err) |
@@ -1244,8 +1251,10 @@ static int fb_get_fscreeninfo(struct inode *inode, struct file *file, | |||
1244 | return err; | 1251 | return err; |
1245 | } | 1252 | } |
1246 | 1253 | ||
1247 | static long | 1254 | static long fb_compat_ioctl(struct file *file, unsigned int cmd, |
1248 | fb_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | 1255 | unsigned long arg) |
1256 | __acquires(&info->lock) | ||
1257 | __releases(&info->lock) | ||
1249 | { | 1258 | { |
1250 | struct inode *inode = file->f_path.dentry->d_inode; | 1259 | struct inode *inode = file->f_path.dentry->d_inode; |
1251 | int fbidx = iminor(inode); | 1260 | int fbidx = iminor(inode); |
@@ -1262,16 +1271,16 @@ fb_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
1262 | case FBIOPUT_CON2FBMAP: | 1271 | case FBIOPUT_CON2FBMAP: |
1263 | arg = (unsigned long) compat_ptr(arg); | 1272 | arg = (unsigned long) compat_ptr(arg); |
1264 | case FBIOBLANK: | 1273 | case FBIOBLANK: |
1265 | mutex_unlock(&info->lock); | 1274 | ret = do_fb_ioctl(info, cmd, arg); |
1266 | return fb_ioctl(file, cmd, arg); | 1275 | break; |
1267 | 1276 | ||
1268 | case FBIOGET_FSCREENINFO: | 1277 | case FBIOGET_FSCREENINFO: |
1269 | ret = fb_get_fscreeninfo(inode, file, cmd, arg); | 1278 | ret = fb_get_fscreeninfo(info, cmd, arg); |
1270 | break; | 1279 | break; |
1271 | 1280 | ||
1272 | case FBIOGETCMAP: | 1281 | case FBIOGETCMAP: |
1273 | case FBIOPUTCMAP: | 1282 | case FBIOPUTCMAP: |
1274 | ret = fb_getput_cmap(inode, file, cmd, arg); | 1283 | ret = fb_getput_cmap(info, cmd, arg); |
1275 | break; | 1284 | break; |
1276 | 1285 | ||
1277 | default: | 1286 | default: |
@@ -1286,6 +1295,8 @@ fb_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
1286 | 1295 | ||
1287 | static int | 1296 | static int |
1288 | fb_mmap(struct file *file, struct vm_area_struct * vma) | 1297 | fb_mmap(struct file *file, struct vm_area_struct * vma) |
1298 | __acquires(&info->lock) | ||
1299 | __releases(&info->lock) | ||
1289 | { | 1300 | { |
1290 | int fbidx = iminor(file->f_path.dentry->d_inode); | 1301 | int fbidx = iminor(file->f_path.dentry->d_inode); |
1291 | struct fb_info *info = registered_fb[fbidx]; | 1302 | struct fb_info *info = registered_fb[fbidx]; |
@@ -1339,6 +1350,8 @@ fb_mmap(struct file *file, struct vm_area_struct * vma) | |||
1339 | 1350 | ||
1340 | static int | 1351 | static int |
1341 | fb_open(struct inode *inode, struct file *file) | 1352 | fb_open(struct inode *inode, struct file *file) |
1353 | __acquires(&info->lock) | ||
1354 | __releases(&info->lock) | ||
1342 | { | 1355 | { |
1343 | int fbidx = iminor(inode); | 1356 | int fbidx = iminor(inode); |
1344 | struct fb_info *info; | 1357 | struct fb_info *info; |
@@ -1374,6 +1387,8 @@ out: | |||
1374 | 1387 | ||
1375 | static int | 1388 | static int |
1376 | fb_release(struct inode *inode, struct file *file) | 1389 | fb_release(struct inode *inode, struct file *file) |
1390 | __acquires(&info->lock) | ||
1391 | __releases(&info->lock) | ||
1377 | { | 1392 | { |
1378 | struct fb_info * const info = file->private_data; | 1393 | struct fb_info * const info = file->private_data; |
1379 | 1394 | ||
diff --git a/drivers/video/mb862xx/Makefile b/drivers/video/mb862xx/Makefile new file mode 100644 index 000000000000..07664814bb1d --- /dev/null +++ b/drivers/video/mb862xx/Makefile | |||
@@ -0,0 +1,5 @@ | |||
1 | # | ||
2 | # Makefile for the MB862xx framebuffer driver | ||
3 | # | ||
4 | |||
5 | obj-$(CONFIG_FB_MB862XX) := mb862xxfb.o | ||
diff --git a/drivers/video/mb862xx/mb862xx_reg.h b/drivers/video/mb862xx/mb862xx_reg.h new file mode 100644 index 000000000000..2ba65e118500 --- /dev/null +++ b/drivers/video/mb862xx/mb862xx_reg.h | |||
@@ -0,0 +1,138 @@ | |||
1 | /* | ||
2 | * Fujitsu MB862xx Graphics Controller Registers/Bits | ||
3 | */ | ||
4 | |||
5 | #ifndef _MB862XX_REG_H | ||
6 | #define _MB862XX_REG_H | ||
7 | |||
8 | #ifdef MB862XX_MMIO_BOTTOM | ||
9 | #define MB862XX_MMIO_BASE 0x03fc0000 | ||
10 | #else | ||
11 | #define MB862XX_MMIO_BASE 0x01fc0000 | ||
12 | #endif | ||
13 | #define MB862XX_I2C_BASE 0x0000c000 | ||
14 | #define MB862XX_DISP_BASE 0x00010000 | ||
15 | #define MB862XX_CAP_BASE 0x00018000 | ||
16 | #define MB862XX_DRAW_BASE 0x00030000 | ||
17 | #define MB862XX_GEO_BASE 0x00038000 | ||
18 | #define MB862XX_PIO_BASE 0x00038000 | ||
19 | #define MB862XX_MMIO_SIZE 0x40000 | ||
20 | |||
21 | /* Host interface/pio registers */ | ||
22 | #define GC_IST 0x00000020 | ||
23 | #define GC_IMASK 0x00000024 | ||
24 | #define GC_SRST 0x0000002c | ||
25 | #define GC_CCF 0x00000038 | ||
26 | #define GC_CID 0x000000f0 | ||
27 | #define GC_REVISION 0x00000084 | ||
28 | |||
29 | #define GC_CCF_CGE_100 0x00000000 | ||
30 | #define GC_CCF_CGE_133 0x00040000 | ||
31 | #define GC_CCF_CGE_166 0x00080000 | ||
32 | #define GC_CCF_COT_100 0x00000000 | ||
33 | #define GC_CCF_COT_133 0x00010000 | ||
34 | #define GC_CID_CNAME_MSK 0x0000ff00 | ||
35 | #define GC_CID_VERSION_MSK 0x000000ff | ||
36 | |||
37 | /* define enabled interrupts hereby */ | ||
38 | #define GC_INT_EN 0x00000000 | ||
39 | |||
40 | /* Memory interface mode register */ | ||
41 | #define GC_MMR 0x0000fffc | ||
42 | |||
43 | /* Display Controller registers */ | ||
44 | #define GC_DCM0 0x00000000 | ||
45 | #define GC_HTP 0x00000004 | ||
46 | #define GC_HDB_HDP 0x00000008 | ||
47 | #define GC_VSW_HSW_HSP 0x0000000c | ||
48 | #define GC_VTR 0x00000010 | ||
49 | #define GC_VDP_VSP 0x00000014 | ||
50 | #define GC_WY_WX 0x00000018 | ||
51 | #define GC_WH_WW 0x0000001c | ||
52 | #define GC_L0M 0x00000020 | ||
53 | #define GC_L0OA0 0x00000024 | ||
54 | #define GC_L0DA0 0x00000028 | ||
55 | #define GC_L0DY_L0DX 0x0000002c | ||
56 | #define GC_DCM1 0x00000100 | ||
57 | #define GC_L0EM 0x00000110 | ||
58 | #define GC_L0WY_L0WX 0x00000114 | ||
59 | #define GC_L0WH_L0WW 0x00000118 | ||
60 | #define GC_DCM2 0x00000104 | ||
61 | #define GC_DCM3 0x00000108 | ||
62 | #define GC_CPM_CUTC 0x000000a0 | ||
63 | #define GC_CUOA0 0x000000a4 | ||
64 | #define GC_CUY0_CUX0 0x000000a8 | ||
65 | #define GC_CUOA1 0x000000ac | ||
66 | #define GC_CUY1_CUX1 0x000000b0 | ||
67 | #define GC_L0PAL0 0x00000400 | ||
68 | |||
69 | #define GC_CPM_CEN0 0x00100000 | ||
70 | #define GC_CPM_CEN1 0x00200000 | ||
71 | |||
72 | #define GC_DCM01_ESY 0x00000004 | ||
73 | #define GC_DCM01_SC 0x00003f00 | ||
74 | #define GC_DCM01_RESV 0x00004000 | ||
75 | #define GC_DCM01_CKS 0x00008000 | ||
76 | #define GC_DCM01_L0E 0x00010000 | ||
77 | #define GC_DCM01_DEN 0x80000000 | ||
78 | #define GC_L0M_L0C_8 0x00000000 | ||
79 | #define GC_L0M_L0C_16 0x80000000 | ||
80 | #define GC_L0EM_L0EC_24 0x40000000 | ||
81 | #define GC_L0M_L0W_UNIT 64 | ||
82 | |||
83 | #define GC_DISP_REFCLK_400 400 | ||
84 | |||
85 | /* Carmine specific */ | ||
86 | #define MB86297_DRAW_BASE 0x00020000 | ||
87 | #define MB86297_DISP0_BASE 0x00100000 | ||
88 | #define MB86297_DISP1_BASE 0x00140000 | ||
89 | #define MB86297_WRBACK_BASE 0x00180000 | ||
90 | #define MB86297_CAP0_BASE 0x00200000 | ||
91 | #define MB86297_CAP1_BASE 0x00280000 | ||
92 | #define MB86297_DRAMCTRL_BASE 0x00300000 | ||
93 | #define MB86297_CTRL_BASE 0x00400000 | ||
94 | #define MB86297_I2C_BASE 0x00500000 | ||
95 | |||
96 | #define GC_CTRL_STATUS 0x00000000 | ||
97 | #define GC_CTRL_INT_MASK 0x00000004 | ||
98 | #define GC_CTRL_CLK_ENABLE 0x0000000c | ||
99 | #define GC_CTRL_SOFT_RST 0x00000010 | ||
100 | |||
101 | #define GC_CTRL_CLK_EN_DRAM 0x00000001 | ||
102 | #define GC_CTRL_CLK_EN_2D3D 0x00000002 | ||
103 | #define GC_CTRL_CLK_EN_DISP0 0x00000020 | ||
104 | #define GC_CTRL_CLK_EN_DISP1 0x00000040 | ||
105 | |||
106 | #define GC_2D3D_REV 0x000004b4 | ||
107 | #define GC_RE_REVISION 0x24240200 | ||
108 | |||
109 | /* define enabled interrupts hereby */ | ||
110 | #define GC_CARMINE_INT_EN 0x00000004 | ||
111 | |||
112 | /* DRAM controller */ | ||
113 | #define GC_DCTL_MODE_ADD 0x00000000 | ||
114 | #define GC_DCTL_SETTIME1_EMODE 0x00000004 | ||
115 | #define GC_DCTL_REFRESH_SETTIME2 0x00000008 | ||
116 | #define GC_DCTL_RSV0_STATES 0x0000000C | ||
117 | #define GC_DCTL_RSV2_RSV1 0x00000010 | ||
118 | #define GC_DCTL_DDRIF2_DDRIF1 0x00000014 | ||
119 | #define GC_DCTL_IOCONT1_IOCONT0 0x00000024 | ||
120 | |||
121 | #define GC_DCTL_STATES_MSK 0x0000000f | ||
122 | #define GC_DCTL_INIT_WAIT_CNT 3000 | ||
123 | #define GC_DCTL_INIT_WAIT_INTERVAL 1 | ||
124 | |||
125 | /* DRAM ctrl values for Carmine PCI Eval. board */ | ||
126 | #define GC_EVB_DCTL_MODE_ADD 0x012105c3 | ||
127 | #define GC_EVB_DCTL_MODE_ADD_AFT_RST 0x002105c3 | ||
128 | #define GC_EVB_DCTL_SETTIME1_EMODE 0x47498000 | ||
129 | #define GC_EVB_DCTL_REFRESH_SETTIME2 0x00422a22 | ||
130 | #define GC_EVB_DCTL_RSV0_STATES 0x00200003 | ||
131 | #define GC_EVB_DCTL_RSV0_STATES_AFT_RST 0x00200002 | ||
132 | #define GC_EVB_DCTL_RSV2_RSV1 0x0000000f | ||
133 | #define GC_EVB_DCTL_DDRIF2_DDRIF1 0x00556646 | ||
134 | #define GC_EVB_DCTL_IOCONT1_IOCONT0 0x05550555 | ||
135 | |||
136 | #define GC_DISP_REFCLK_533 533 | ||
137 | |||
138 | #endif | ||
diff --git a/drivers/video/mb862xx/mb862xxfb.c b/drivers/video/mb862xx/mb862xxfb.c new file mode 100644 index 000000000000..38718d95fbb9 --- /dev/null +++ b/drivers/video/mb862xx/mb862xxfb.c | |||
@@ -0,0 +1,1061 @@ | |||
1 | /* | ||
2 | * drivers/mb862xx/mb862xxfb.c | ||
3 | * | ||
4 | * Fujitsu Carmine/Coral-P(A)/Lime framebuffer driver | ||
5 | * | ||
6 | * (C) 2008 Anatolij Gustschin <agust@denx.de> | ||
7 | * DENX Software Engineering | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #undef DEBUG | ||
16 | |||
17 | #include <linux/fb.h> | ||
18 | #include <linux/delay.h> | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/interrupt.h> | ||
21 | #include <linux/pci.h> | ||
22 | #if defined(CONFIG_PPC_OF) | ||
23 | #include <linux/of_platform.h> | ||
24 | #endif | ||
25 | #include "mb862xxfb.h" | ||
26 | #include "mb862xx_reg.h" | ||
27 | |||
28 | #define NR_PALETTE 256 | ||
29 | #define MB862XX_MEM_SIZE 0x1000000 | ||
30 | #define CORALP_MEM_SIZE 0x4000000 | ||
31 | #define CARMINE_MEM_SIZE 0x8000000 | ||
32 | #define DRV_NAME "mb862xxfb" | ||
33 | |||
34 | #if defined(CONFIG_LWMON5) | ||
35 | static struct mb862xx_gc_mode lwmon5_gc_mode = { | ||
36 | /* Mode for Sharp LQ104V1DG61 TFT LCD Panel */ | ||
37 | { "640x480", 60, 640, 480, 40000, 48, 16, 32, 11, 96, 2, 0, 0, 0 }, | ||
38 | /* 16 bits/pixel, 32MB, 100MHz, SDRAM memory mode value */ | ||
39 | 16, 0x2000000, GC_CCF_COT_100, 0x414fb7f2 | ||
40 | }; | ||
41 | #endif | ||
42 | |||
43 | #if defined(CONFIG_SOCRATES) | ||
44 | static struct mb862xx_gc_mode socrates_gc_mode = { | ||
45 | /* Mode for Prime View PM070WL4 TFT LCD Panel */ | ||
46 | { "800x480", 45, 800, 480, 40000, 86, 42, 33, 10, 128, 2, 0, 0, 0 }, | ||
47 | /* 16 bits/pixel, 16MB, 133MHz, SDRAM memory mode value */ | ||
48 | 16, 0x1000000, GC_CCF_COT_133, 0x4157ba63 | ||
49 | }; | ||
50 | #endif | ||
51 | |||
52 | /* Helpers */ | ||
53 | static inline int h_total(struct fb_var_screeninfo *var) | ||
54 | { | ||
55 | return var->xres + var->left_margin + | ||
56 | var->right_margin + var->hsync_len; | ||
57 | } | ||
58 | |||
59 | static inline int v_total(struct fb_var_screeninfo *var) | ||
60 | { | ||
61 | return var->yres + var->upper_margin + | ||
62 | var->lower_margin + var->vsync_len; | ||
63 | } | ||
64 | |||
65 | static inline int hsp(struct fb_var_screeninfo *var) | ||
66 | { | ||
67 | return var->xres + var->right_margin - 1; | ||
68 | } | ||
69 | |||
70 | static inline int vsp(struct fb_var_screeninfo *var) | ||
71 | { | ||
72 | return var->yres + var->lower_margin - 1; | ||
73 | } | ||
74 | |||
75 | static inline int d_pitch(struct fb_var_screeninfo *var) | ||
76 | { | ||
77 | return var->xres * var->bits_per_pixel / 8; | ||
78 | } | ||
79 | |||
80 | static inline unsigned int chan_to_field(unsigned int chan, | ||
81 | struct fb_bitfield *bf) | ||
82 | { | ||
83 | chan &= 0xffff; | ||
84 | chan >>= 16 - bf->length; | ||
85 | return chan << bf->offset; | ||
86 | } | ||
87 | |||
88 | static int mb862xxfb_setcolreg(unsigned regno, | ||
89 | unsigned red, unsigned green, unsigned blue, | ||
90 | unsigned transp, struct fb_info *info) | ||
91 | { | ||
92 | struct mb862xxfb_par *par = info->par; | ||
93 | unsigned int val; | ||
94 | |||
95 | switch (info->fix.visual) { | ||
96 | case FB_VISUAL_TRUECOLOR: | ||
97 | if (regno < 16) { | ||
98 | val = chan_to_field(red, &info->var.red); | ||
99 | val |= chan_to_field(green, &info->var.green); | ||
100 | val |= chan_to_field(blue, &info->var.blue); | ||
101 | par->pseudo_palette[regno] = val; | ||
102 | } | ||
103 | break; | ||
104 | case FB_VISUAL_PSEUDOCOLOR: | ||
105 | if (regno < 256) { | ||
106 | val = (red >> 8) << 16; | ||
107 | val |= (green >> 8) << 8; | ||
108 | val |= blue >> 8; | ||
109 | outreg(disp, GC_L0PAL0 + (regno * 4), val); | ||
110 | } | ||
111 | break; | ||
112 | default: | ||
113 | return 1; /* unsupported type */ | ||
114 | } | ||
115 | return 0; | ||
116 | } | ||
117 | |||
118 | static int mb862xxfb_check_var(struct fb_var_screeninfo *var, | ||
119 | struct fb_info *fbi) | ||
120 | { | ||
121 | unsigned long tmp; | ||
122 | |||
123 | if (fbi->dev) | ||
124 | dev_dbg(fbi->dev, "%s\n", __func__); | ||
125 | |||
126 | /* check if these values fit into the registers */ | ||
127 | if (var->hsync_len > 255 || var->vsync_len > 255) | ||
128 | return -EINVAL; | ||
129 | |||
130 | if ((var->xres + var->right_margin) >= 4096) | ||
131 | return -EINVAL; | ||
132 | |||
133 | if ((var->yres + var->lower_margin) > 4096) | ||
134 | return -EINVAL; | ||
135 | |||
136 | if (h_total(var) > 4096 || v_total(var) > 4096) | ||
137 | return -EINVAL; | ||
138 | |||
139 | if (var->xres_virtual > 4096 || var->yres_virtual > 4096) | ||
140 | return -EINVAL; | ||
141 | |||
142 | if (var->bits_per_pixel <= 8) | ||
143 | var->bits_per_pixel = 8; | ||
144 | else if (var->bits_per_pixel <= 16) | ||
145 | var->bits_per_pixel = 16; | ||
146 | else if (var->bits_per_pixel <= 32) | ||
147 | var->bits_per_pixel = 32; | ||
148 | |||
149 | /* | ||
150 | * can cope with 8,16 or 24/32bpp if resulting | ||
151 | * pitch is divisible by 64 without remainder | ||
152 | */ | ||
153 | if (d_pitch(&fbi->var) % GC_L0M_L0W_UNIT) { | ||
154 | int r; | ||
155 | |||
156 | var->bits_per_pixel = 0; | ||
157 | do { | ||
158 | var->bits_per_pixel += 8; | ||
159 | r = d_pitch(&fbi->var) % GC_L0M_L0W_UNIT; | ||
160 | } while (r && var->bits_per_pixel <= 32); | ||
161 | |||
162 | if (d_pitch(&fbi->var) % GC_L0M_L0W_UNIT) | ||
163 | return -EINVAL; | ||
164 | } | ||
165 | |||
166 | /* line length is going to be 128 bit aligned */ | ||
167 | tmp = (var->xres * var->bits_per_pixel) / 8; | ||
168 | if ((tmp & 15) != 0) | ||
169 | return -EINVAL; | ||
170 | |||
171 | /* set r/g/b positions and validate bpp */ | ||
172 | switch (var->bits_per_pixel) { | ||
173 | case 8: | ||
174 | var->red.length = var->bits_per_pixel; | ||
175 | var->green.length = var->bits_per_pixel; | ||
176 | var->blue.length = var->bits_per_pixel; | ||
177 | var->red.offset = 0; | ||
178 | var->green.offset = 0; | ||
179 | var->blue.offset = 0; | ||
180 | var->transp.length = 0; | ||
181 | break; | ||
182 | case 16: | ||
183 | var->red.length = 5; | ||
184 | var->green.length = 5; | ||
185 | var->blue.length = 5; | ||
186 | var->red.offset = 10; | ||
187 | var->green.offset = 5; | ||
188 | var->blue.offset = 0; | ||
189 | var->transp.length = 0; | ||
190 | break; | ||
191 | case 24: | ||
192 | case 32: | ||
193 | var->transp.length = 8; | ||
194 | var->red.length = 8; | ||
195 | var->green.length = 8; | ||
196 | var->blue.length = 8; | ||
197 | var->transp.offset = 24; | ||
198 | var->red.offset = 16; | ||
199 | var->green.offset = 8; | ||
200 | var->blue.offset = 0; | ||
201 | break; | ||
202 | default: | ||
203 | return -EINVAL; | ||
204 | } | ||
205 | return 0; | ||
206 | } | ||
207 | |||
208 | /* | ||
209 | * set display parameters | ||
210 | */ | ||
211 | static int mb862xxfb_set_par(struct fb_info *fbi) | ||
212 | { | ||
213 | struct mb862xxfb_par *par = fbi->par; | ||
214 | unsigned long reg, sc; | ||
215 | |||
216 | dev_dbg(par->dev, "%s\n", __func__); | ||
217 | |||
218 | if (par->pre_init) | ||
219 | return 0; | ||
220 | |||
221 | /* disp off */ | ||
222 | reg = inreg(disp, GC_DCM1); | ||
223 | reg &= ~GC_DCM01_DEN; | ||
224 | outreg(disp, GC_DCM1, reg); | ||
225 | |||
226 | /* set display reference clock div. */ | ||
227 | sc = par->refclk / (1000000 / fbi->var.pixclock) - 1; | ||
228 | reg = inreg(disp, GC_DCM1); | ||
229 | reg &= ~(GC_DCM01_CKS | GC_DCM01_RESV | GC_DCM01_SC); | ||
230 | reg |= sc << 8; | ||
231 | outreg(disp, GC_DCM1, reg); | ||
232 | dev_dbg(par->dev, "SC 0x%lx\n", sc); | ||
233 | |||
234 | /* disp dimension, format */ | ||
235 | reg = pack(d_pitch(&fbi->var) / GC_L0M_L0W_UNIT, | ||
236 | (fbi->var.yres - 1)); | ||
237 | if (fbi->var.bits_per_pixel == 16) | ||
238 | reg |= GC_L0M_L0C_16; | ||
239 | outreg(disp, GC_L0M, reg); | ||
240 | |||
241 | if (fbi->var.bits_per_pixel == 32) { | ||
242 | reg = inreg(disp, GC_L0EM); | ||
243 | outreg(disp, GC_L0EM, reg | GC_L0EM_L0EC_24); | ||
244 | } | ||
245 | outreg(disp, GC_WY_WX, 0); | ||
246 | reg = pack(fbi->var.yres - 1, fbi->var.xres); | ||
247 | outreg(disp, GC_WH_WW, reg); | ||
248 | outreg(disp, GC_L0OA0, 0); | ||
249 | outreg(disp, GC_L0DA0, 0); | ||
250 | outreg(disp, GC_L0DY_L0DX, 0); | ||
251 | outreg(disp, GC_L0WY_L0WX, 0); | ||
252 | outreg(disp, GC_L0WH_L0WW, reg); | ||
253 | |||
254 | /* both HW-cursors off */ | ||
255 | reg = inreg(disp, GC_CPM_CUTC); | ||
256 | reg &= ~(GC_CPM_CEN0 | GC_CPM_CEN1); | ||
257 | outreg(disp, GC_CPM_CUTC, reg); | ||
258 | |||
259 | /* timings */ | ||
260 | reg = pack(fbi->var.xres - 1, fbi->var.xres - 1); | ||
261 | outreg(disp, GC_HDB_HDP, reg); | ||
262 | reg = pack((fbi->var.yres - 1), vsp(&fbi->var)); | ||
263 | outreg(disp, GC_VDP_VSP, reg); | ||
264 | reg = ((fbi->var.vsync_len - 1) << 24) | | ||
265 | pack((fbi->var.hsync_len - 1), hsp(&fbi->var)); | ||
266 | outreg(disp, GC_VSW_HSW_HSP, reg); | ||
267 | outreg(disp, GC_HTP, pack(h_total(&fbi->var) - 1, 0)); | ||
268 | outreg(disp, GC_VTR, pack(v_total(&fbi->var) - 1, 0)); | ||
269 | |||
270 | /* display on */ | ||
271 | reg = inreg(disp, GC_DCM1); | ||
272 | reg |= GC_DCM01_DEN | GC_DCM01_L0E; | ||
273 | reg &= ~GC_DCM01_ESY; | ||
274 | outreg(disp, GC_DCM1, reg); | ||
275 | return 0; | ||
276 | } | ||
277 | |||
278 | static int mb862xxfb_pan(struct fb_var_screeninfo *var, | ||
279 | struct fb_info *info) | ||
280 | { | ||
281 | struct mb862xxfb_par *par = info->par; | ||
282 | unsigned long reg; | ||
283 | |||
284 | reg = pack(var->yoffset, var->xoffset); | ||
285 | outreg(disp, GC_L0WY_L0WX, reg); | ||
286 | |||
287 | reg = pack(var->yres_virtual, var->xres_virtual); | ||
288 | outreg(disp, GC_L0WH_L0WW, reg); | ||
289 | return 0; | ||
290 | } | ||
291 | |||
292 | static int mb862xxfb_blank(int mode, struct fb_info *fbi) | ||
293 | { | ||
294 | struct mb862xxfb_par *par = fbi->par; | ||
295 | unsigned long reg; | ||
296 | |||
297 | dev_dbg(fbi->dev, "blank mode=%d\n", mode); | ||
298 | |||
299 | switch (mode) { | ||
300 | case FB_BLANK_POWERDOWN: | ||
301 | reg = inreg(disp, GC_DCM1); | ||
302 | reg &= ~GC_DCM01_DEN; | ||
303 | outreg(disp, GC_DCM1, reg); | ||
304 | break; | ||
305 | case FB_BLANK_UNBLANK: | ||
306 | reg = inreg(disp, GC_DCM1); | ||
307 | reg |= GC_DCM01_DEN; | ||
308 | outreg(disp, GC_DCM1, reg); | ||
309 | break; | ||
310 | case FB_BLANK_NORMAL: | ||
311 | case FB_BLANK_VSYNC_SUSPEND: | ||
312 | case FB_BLANK_HSYNC_SUSPEND: | ||
313 | default: | ||
314 | return 1; | ||
315 | } | ||
316 | return 0; | ||
317 | } | ||
318 | |||
319 | /* framebuffer ops */ | ||
320 | static struct fb_ops mb862xxfb_ops = { | ||
321 | .owner = THIS_MODULE, | ||
322 | .fb_check_var = mb862xxfb_check_var, | ||
323 | .fb_set_par = mb862xxfb_set_par, | ||
324 | .fb_setcolreg = mb862xxfb_setcolreg, | ||
325 | .fb_blank = mb862xxfb_blank, | ||
326 | .fb_pan_display = mb862xxfb_pan, | ||
327 | .fb_fillrect = cfb_fillrect, | ||
328 | .fb_copyarea = cfb_copyarea, | ||
329 | .fb_imageblit = cfb_imageblit, | ||
330 | }; | ||
331 | |||
332 | /* initialize fb_info data */ | ||
333 | static int mb862xxfb_init_fbinfo(struct fb_info *fbi) | ||
334 | { | ||
335 | struct mb862xxfb_par *par = fbi->par; | ||
336 | struct mb862xx_gc_mode *mode = par->gc_mode; | ||
337 | unsigned long reg; | ||
338 | |||
339 | fbi->fbops = &mb862xxfb_ops; | ||
340 | fbi->pseudo_palette = par->pseudo_palette; | ||
341 | fbi->screen_base = par->fb_base; | ||
342 | fbi->screen_size = par->mapped_vram; | ||
343 | |||
344 | strcpy(fbi->fix.id, DRV_NAME); | ||
345 | fbi->fix.smem_start = (unsigned long)par->fb_base_phys; | ||
346 | fbi->fix.smem_len = par->mapped_vram; | ||
347 | fbi->fix.mmio_start = (unsigned long)par->mmio_base_phys; | ||
348 | fbi->fix.mmio_len = par->mmio_len; | ||
349 | fbi->fix.accel = FB_ACCEL_NONE; | ||
350 | fbi->fix.type = FB_TYPE_PACKED_PIXELS; | ||
351 | fbi->fix.type_aux = 0; | ||
352 | fbi->fix.xpanstep = 1; | ||
353 | fbi->fix.ypanstep = 1; | ||
354 | fbi->fix.ywrapstep = 0; | ||
355 | |||
356 | reg = inreg(disp, GC_DCM1); | ||
357 | if (reg & GC_DCM01_DEN && reg & GC_DCM01_L0E) { | ||
358 | /* get the disp mode from active display cfg */ | ||
359 | unsigned long sc = ((reg & GC_DCM01_SC) >> 8) + 1; | ||
360 | unsigned long hsp, vsp, ht, vt; | ||
361 | |||
362 | dev_dbg(par->dev, "using bootloader's disp. mode\n"); | ||
363 | fbi->var.pixclock = (sc * 1000000) / par->refclk; | ||
364 | fbi->var.xres = (inreg(disp, GC_HDB_HDP) & 0x0fff) + 1; | ||
365 | reg = inreg(disp, GC_VDP_VSP); | ||
366 | fbi->var.yres = ((reg >> 16) & 0x0fff) + 1; | ||
367 | vsp = (reg & 0x0fff) + 1; | ||
368 | fbi->var.xres_virtual = fbi->var.xres; | ||
369 | fbi->var.yres_virtual = fbi->var.yres; | ||
370 | reg = inreg(disp, GC_L0EM); | ||
371 | if (reg & GC_L0EM_L0EC_24) { | ||
372 | fbi->var.bits_per_pixel = 32; | ||
373 | } else { | ||
374 | reg = inreg(disp, GC_L0M); | ||
375 | if (reg & GC_L0M_L0C_16) | ||
376 | fbi->var.bits_per_pixel = 16; | ||
377 | else | ||
378 | fbi->var.bits_per_pixel = 8; | ||
379 | } | ||
380 | reg = inreg(disp, GC_VSW_HSW_HSP); | ||
381 | fbi->var.hsync_len = ((reg & 0xff0000) >> 16) + 1; | ||
382 | fbi->var.vsync_len = ((reg & 0x3f000000) >> 24) + 1; | ||
383 | hsp = (reg & 0xffff) + 1; | ||
384 | ht = ((inreg(disp, GC_HTP) & 0xfff0000) >> 16) + 1; | ||
385 | fbi->var.right_margin = hsp - fbi->var.xres; | ||
386 | fbi->var.left_margin = ht - hsp - fbi->var.hsync_len; | ||
387 | vt = ((inreg(disp, GC_VTR) & 0xfff0000) >> 16) + 1; | ||
388 | fbi->var.lower_margin = vsp - fbi->var.yres; | ||
389 | fbi->var.upper_margin = vt - vsp - fbi->var.vsync_len; | ||
390 | } else if (mode) { | ||
391 | dev_dbg(par->dev, "using supplied mode\n"); | ||
392 | fb_videomode_to_var(&fbi->var, (struct fb_videomode *)mode); | ||
393 | fbi->var.bits_per_pixel = mode->def_bpp ? mode->def_bpp : 8; | ||
394 | } else { | ||
395 | int ret; | ||
396 | |||
397 | ret = fb_find_mode(&fbi->var, fbi, "640x480-16@60", | ||
398 | NULL, 0, NULL, 16); | ||
399 | if (ret == 0 || ret == 4) { | ||
400 | dev_err(par->dev, | ||
401 | "failed to get initial mode\n"); | ||
402 | return -EINVAL; | ||
403 | } | ||
404 | } | ||
405 | |||
406 | fbi->var.xoffset = 0; | ||
407 | fbi->var.yoffset = 0; | ||
408 | fbi->var.grayscale = 0; | ||
409 | fbi->var.nonstd = 0; | ||
410 | fbi->var.height = -1; | ||
411 | fbi->var.width = -1; | ||
412 | fbi->var.accel_flags = 0; | ||
413 | fbi->var.vmode = FB_VMODE_NONINTERLACED; | ||
414 | fbi->var.activate = FB_ACTIVATE_NOW; | ||
415 | fbi->flags = FBINFO_DEFAULT | | ||
416 | #ifdef __BIG_ENDIAN | ||
417 | FBINFO_FOREIGN_ENDIAN | | ||
418 | #endif | ||
419 | FBINFO_HWACCEL_XPAN | | ||
420 | FBINFO_HWACCEL_YPAN; | ||
421 | |||
422 | /* check and possibly fix bpp */ | ||
423 | if ((fbi->fbops->fb_check_var)(&fbi->var, fbi)) | ||
424 | dev_err(par->dev, "check_var() failed on initial setup?\n"); | ||
425 | |||
426 | fbi->fix.visual = fbi->var.bits_per_pixel == 8 ? | ||
427 | FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; | ||
428 | fbi->fix.line_length = (fbi->var.xres_virtual * | ||
429 | fbi->var.bits_per_pixel) / 8; | ||
430 | return 0; | ||
431 | } | ||
432 | |||
433 | /* | ||
434 | * show some display controller and cursor registers | ||
435 | */ | ||
436 | static ssize_t mb862xxfb_show_dispregs(struct device *dev, | ||
437 | struct device_attribute *attr, char *buf) | ||
438 | { | ||
439 | struct fb_info *fbi = dev_get_drvdata(dev); | ||
440 | struct mb862xxfb_par *par = fbi->par; | ||
441 | char *ptr = buf; | ||
442 | unsigned int reg; | ||
443 | |||
444 | for (reg = GC_DCM0; reg <= GC_L0DY_L0DX; reg += 4) | ||
445 | ptr += sprintf(ptr, "%08x = %08x\n", | ||
446 | reg, inreg(disp, reg)); | ||
447 | |||
448 | for (reg = GC_CPM_CUTC; reg <= GC_CUY1_CUX1; reg += 4) | ||
449 | ptr += sprintf(ptr, "%08x = %08x\n", | ||
450 | reg, inreg(disp, reg)); | ||
451 | |||
452 | for (reg = GC_DCM1; reg <= GC_L0WH_L0WW; reg += 4) | ||
453 | ptr += sprintf(ptr, "%08x = %08x\n", | ||
454 | reg, inreg(disp, reg)); | ||
455 | |||
456 | return ptr - buf; | ||
457 | } | ||
458 | |||
459 | static DEVICE_ATTR(dispregs, 0444, mb862xxfb_show_dispregs, NULL); | ||
460 | |||
461 | irqreturn_t mb862xx_intr(int irq, void *dev_id) | ||
462 | { | ||
463 | struct mb862xxfb_par *par = (struct mb862xxfb_par *) dev_id; | ||
464 | unsigned long reg_ist, mask; | ||
465 | |||
466 | if (!par) | ||
467 | return IRQ_NONE; | ||
468 | |||
469 | if (par->type == BT_CARMINE) { | ||
470 | /* Get Interrupt Status */ | ||
471 | reg_ist = inreg(ctrl, GC_CTRL_STATUS); | ||
472 | mask = inreg(ctrl, GC_CTRL_INT_MASK); | ||
473 | if (reg_ist == 0) | ||
474 | return IRQ_HANDLED; | ||
475 | |||
476 | reg_ist &= mask; | ||
477 | if (reg_ist == 0) | ||
478 | return IRQ_HANDLED; | ||
479 | |||
480 | /* Clear interrupt status */ | ||
481 | outreg(ctrl, 0x0, reg_ist); | ||
482 | } else { | ||
483 | /* Get status */ | ||
484 | reg_ist = inreg(host, GC_IST); | ||
485 | mask = inreg(host, GC_IMASK); | ||
486 | |||
487 | reg_ist &= mask; | ||
488 | if (reg_ist == 0) | ||
489 | return IRQ_HANDLED; | ||
490 | |||
491 | /* Clear status */ | ||
492 | outreg(host, GC_IST, ~reg_ist); | ||
493 | } | ||
494 | return IRQ_HANDLED; | ||
495 | } | ||
496 | |||
497 | #if defined(CONFIG_FB_MB862XX_LIME) | ||
498 | /* | ||
499 | * GDC (Lime, Coral(B/Q), Mint, ...) on host bus | ||
500 | */ | ||
501 | static int mb862xx_gdc_init(struct mb862xxfb_par *par) | ||
502 | { | ||
503 | unsigned long ccf, mmr; | ||
504 | unsigned long ver, rev; | ||
505 | |||
506 | if (!par) | ||
507 | return -ENODEV; | ||
508 | |||
509 | #if defined(CONFIG_FB_PRE_INIT_FB) | ||
510 | par->pre_init = 1; | ||
511 | #endif | ||
512 | par->host = par->mmio_base; | ||
513 | par->i2c = par->mmio_base + MB862XX_I2C_BASE; | ||
514 | par->disp = par->mmio_base + MB862XX_DISP_BASE; | ||
515 | par->cap = par->mmio_base + MB862XX_CAP_BASE; | ||
516 | par->draw = par->mmio_base + MB862XX_DRAW_BASE; | ||
517 | par->geo = par->mmio_base + MB862XX_GEO_BASE; | ||
518 | par->pio = par->mmio_base + MB862XX_PIO_BASE; | ||
519 | |||
520 | par->refclk = GC_DISP_REFCLK_400; | ||
521 | |||
522 | ver = inreg(host, GC_CID); | ||
523 | rev = inreg(pio, GC_REVISION); | ||
524 | if ((ver == 0x303) && (rev & 0xffffff00) == 0x20050100) { | ||
525 | dev_info(par->dev, "Fujitsu Lime v1.%d found\n", | ||
526 | (int)rev & 0xff); | ||
527 | par->type = BT_LIME; | ||
528 | ccf = par->gc_mode ? par->gc_mode->ccf : GC_CCF_COT_100; | ||
529 | mmr = par->gc_mode ? par->gc_mode->mmr : 0x414fb7f2; | ||
530 | } else { | ||
531 | dev_info(par->dev, "? GDC, CID/Rev.: 0x%lx/0x%lx \n", ver, rev); | ||
532 | return -ENODEV; | ||
533 | } | ||
534 | |||
535 | if (!par->pre_init) { | ||
536 | outreg(host, GC_CCF, ccf); | ||
537 | udelay(200); | ||
538 | outreg(host, GC_MMR, mmr); | ||
539 | udelay(10); | ||
540 | } | ||
541 | |||
542 | /* interrupt status */ | ||
543 | outreg(host, GC_IST, 0); | ||
544 | outreg(host, GC_IMASK, GC_INT_EN); | ||
545 | return 0; | ||
546 | } | ||
547 | |||
548 | static int __devinit of_platform_mb862xx_probe(struct of_device *ofdev, | ||
549 | const struct of_device_id *id) | ||
550 | { | ||
551 | struct device_node *np = ofdev->node; | ||
552 | struct device *dev = &ofdev->dev; | ||
553 | struct mb862xxfb_par *par; | ||
554 | struct fb_info *info; | ||
555 | struct resource res; | ||
556 | resource_size_t res_size; | ||
557 | unsigned long ret = -ENODEV; | ||
558 | |||
559 | if (of_address_to_resource(np, 0, &res)) { | ||
560 | dev_err(dev, "Invalid address\n"); | ||
561 | return -ENXIO; | ||
562 | } | ||
563 | |||
564 | info = framebuffer_alloc(sizeof(struct mb862xxfb_par), dev); | ||
565 | if (info == NULL) { | ||
566 | dev_err(dev, "cannot allocate framebuffer\n"); | ||
567 | return -ENOMEM; | ||
568 | } | ||
569 | |||
570 | par = info->par; | ||
571 | par->info = info; | ||
572 | par->dev = dev; | ||
573 | |||
574 | par->irq = irq_of_parse_and_map(np, 0); | ||
575 | if (par->irq == NO_IRQ) { | ||
576 | dev_err(dev, "failed to map irq\n"); | ||
577 | ret = -ENODEV; | ||
578 | goto fbrel; | ||
579 | } | ||
580 | |||
581 | res_size = 1 + res.end - res.start; | ||
582 | par->res = request_mem_region(res.start, res_size, DRV_NAME); | ||
583 | if (par->res == NULL) { | ||
584 | dev_err(dev, "Cannot claim framebuffer/mmio\n"); | ||
585 | ret = -ENXIO; | ||
586 | goto irqdisp; | ||
587 | } | ||
588 | |||
589 | #if defined(CONFIG_LWMON5) | ||
590 | par->gc_mode = &lwmon5_gc_mode; | ||
591 | #endif | ||
592 | |||
593 | #if defined(CONFIG_SOCRATES) | ||
594 | par->gc_mode = &socrates_gc_mode; | ||
595 | #endif | ||
596 | |||
597 | par->fb_base_phys = res.start; | ||
598 | par->mmio_base_phys = res.start + MB862XX_MMIO_BASE; | ||
599 | par->mmio_len = MB862XX_MMIO_SIZE; | ||
600 | if (par->gc_mode) | ||
601 | par->mapped_vram = par->gc_mode->max_vram; | ||
602 | else | ||
603 | par->mapped_vram = MB862XX_MEM_SIZE; | ||
604 | |||
605 | par->fb_base = ioremap(par->fb_base_phys, par->mapped_vram); | ||
606 | if (par->fb_base == NULL) { | ||
607 | dev_err(dev, "Cannot map framebuffer\n"); | ||
608 | goto rel_reg; | ||
609 | } | ||
610 | |||
611 | par->mmio_base = ioremap(par->mmio_base_phys, par->mmio_len); | ||
612 | if (par->mmio_base == NULL) { | ||
613 | dev_err(dev, "Cannot map registers\n"); | ||
614 | goto fb_unmap; | ||
615 | } | ||
616 | |||
617 | dev_dbg(dev, "fb phys 0x%llx 0x%lx\n", | ||
618 | (u64)par->fb_base_phys, (ulong)par->mapped_vram); | ||
619 | dev_dbg(dev, "mmio phys 0x%llx 0x%lx, (irq = %d)\n", | ||
620 | (u64)par->mmio_base_phys, (ulong)par->mmio_len, par->irq); | ||
621 | |||
622 | if (mb862xx_gdc_init(par)) | ||
623 | goto io_unmap; | ||
624 | |||
625 | if (request_irq(par->irq, mb862xx_intr, IRQF_DISABLED, | ||
626 | DRV_NAME, (void *)par)) { | ||
627 | dev_err(dev, "Cannot request irq\n"); | ||
628 | goto io_unmap; | ||
629 | } | ||
630 | |||
631 | mb862xxfb_init_fbinfo(info); | ||
632 | |||
633 | if (fb_alloc_cmap(&info->cmap, NR_PALETTE, 0) < 0) { | ||
634 | dev_err(dev, "Could not allocate cmap for fb_info.\n"); | ||
635 | goto free_irq; | ||
636 | } | ||
637 | |||
638 | if ((info->fbops->fb_set_par)(info)) | ||
639 | dev_err(dev, "set_var() failed on initial setup?\n"); | ||
640 | |||
641 | if (register_framebuffer(info)) { | ||
642 | dev_err(dev, "failed to register framebuffer\n"); | ||
643 | goto rel_cmap; | ||
644 | } | ||
645 | |||
646 | dev_set_drvdata(dev, info); | ||
647 | |||
648 | if (device_create_file(dev, &dev_attr_dispregs)) | ||
649 | dev_err(dev, "Can't create sysfs regdump file\n"); | ||
650 | return 0; | ||
651 | |||
652 | rel_cmap: | ||
653 | fb_dealloc_cmap(&info->cmap); | ||
654 | free_irq: | ||
655 | outreg(host, GC_IMASK, 0); | ||
656 | free_irq(par->irq, (void *)par); | ||
657 | io_unmap: | ||
658 | iounmap(par->mmio_base); | ||
659 | fb_unmap: | ||
660 | iounmap(par->fb_base); | ||
661 | rel_reg: | ||
662 | release_mem_region(res.start, res_size); | ||
663 | irqdisp: | ||
664 | irq_dispose_mapping(par->irq); | ||
665 | fbrel: | ||
666 | dev_set_drvdata(dev, NULL); | ||
667 | framebuffer_release(info); | ||
668 | return ret; | ||
669 | } | ||
670 | |||
671 | static int __devexit of_platform_mb862xx_remove(struct of_device *ofdev) | ||
672 | { | ||
673 | struct fb_info *fbi = dev_get_drvdata(&ofdev->dev); | ||
674 | struct mb862xxfb_par *par = fbi->par; | ||
675 | resource_size_t res_size = 1 + par->res->end - par->res->start; | ||
676 | unsigned long reg; | ||
677 | |||
678 | dev_dbg(fbi->dev, "%s release\n", fbi->fix.id); | ||
679 | |||
680 | /* display off */ | ||
681 | reg = inreg(disp, GC_DCM1); | ||
682 | reg &= ~(GC_DCM01_DEN | GC_DCM01_L0E); | ||
683 | outreg(disp, GC_DCM1, reg); | ||
684 | |||
685 | /* disable interrupts */ | ||
686 | outreg(host, GC_IMASK, 0); | ||
687 | |||
688 | free_irq(par->irq, (void *)par); | ||
689 | irq_dispose_mapping(par->irq); | ||
690 | |||
691 | device_remove_file(&ofdev->dev, &dev_attr_dispregs); | ||
692 | |||
693 | unregister_framebuffer(fbi); | ||
694 | fb_dealloc_cmap(&fbi->cmap); | ||
695 | |||
696 | iounmap(par->mmio_base); | ||
697 | iounmap(par->fb_base); | ||
698 | |||
699 | dev_set_drvdata(&ofdev->dev, NULL); | ||
700 | release_mem_region(par->res->start, res_size); | ||
701 | framebuffer_release(fbi); | ||
702 | return 0; | ||
703 | } | ||
704 | |||
705 | /* | ||
706 | * common types | ||
707 | */ | ||
708 | static struct of_device_id __devinitdata of_platform_mb862xx_tbl[] = { | ||
709 | { .compatible = "fujitsu,MB86276", }, | ||
710 | { .compatible = "fujitsu,lime", }, | ||
711 | { .compatible = "fujitsu,MB86277", }, | ||
712 | { .compatible = "fujitsu,mint", }, | ||
713 | { .compatible = "fujitsu,MB86293", }, | ||
714 | { .compatible = "fujitsu,MB86294", }, | ||
715 | { .compatible = "fujitsu,coral", }, | ||
716 | { /* end */ } | ||
717 | }; | ||
718 | |||
719 | static struct of_platform_driver of_platform_mb862xxfb_driver = { | ||
720 | .owner = THIS_MODULE, | ||
721 | .name = DRV_NAME, | ||
722 | .match_table = of_platform_mb862xx_tbl, | ||
723 | .probe = of_platform_mb862xx_probe, | ||
724 | .remove = __devexit_p(of_platform_mb862xx_remove), | ||
725 | }; | ||
726 | #endif | ||
727 | |||
728 | #if defined(CONFIG_FB_MB862XX_PCI_GDC) | ||
729 | static int coralp_init(struct mb862xxfb_par *par) | ||
730 | { | ||
731 | int cn, ver; | ||
732 | |||
733 | par->host = par->mmio_base; | ||
734 | par->i2c = par->mmio_base + MB862XX_I2C_BASE; | ||
735 | par->disp = par->mmio_base + MB862XX_DISP_BASE; | ||
736 | par->cap = par->mmio_base + MB862XX_CAP_BASE; | ||
737 | par->draw = par->mmio_base + MB862XX_DRAW_BASE; | ||
738 | par->geo = par->mmio_base + MB862XX_GEO_BASE; | ||
739 | par->pio = par->mmio_base + MB862XX_PIO_BASE; | ||
740 | |||
741 | par->refclk = GC_DISP_REFCLK_400; | ||
742 | |||
743 | ver = inreg(host, GC_CID); | ||
744 | cn = (ver & GC_CID_CNAME_MSK) >> 8; | ||
745 | ver = ver & GC_CID_VERSION_MSK; | ||
746 | if (cn == 3) { | ||
747 | dev_info(par->dev, "Fujitsu Coral-%s GDC Rev.%d found\n",\ | ||
748 | (ver == 6) ? "P" : (ver == 8) ? "PA" : "?", | ||
749 | par->pdev->revision); | ||
750 | outreg(host, GC_CCF, GC_CCF_CGE_166 | GC_CCF_COT_133); | ||
751 | udelay(200); | ||
752 | outreg(host, GC_MMR, GC_MMR_CORALP_EVB_VAL); | ||
753 | udelay(10); | ||
754 | /* Clear interrupt status */ | ||
755 | outreg(host, GC_IST, 0); | ||
756 | } else { | ||
757 | return -ENODEV; | ||
758 | } | ||
759 | return 0; | ||
760 | } | ||
761 | |||
762 | static int init_dram_ctrl(struct mb862xxfb_par *par) | ||
763 | { | ||
764 | unsigned long i = 0; | ||
765 | |||
766 | /* | ||
767 | * Set io mode first! Spec. says IC may be destroyed | ||
768 | * if not set to SSTL2/LVCMOS before init. | ||
769 | */ | ||
770 | outreg(dram_ctrl, GC_DCTL_IOCONT1_IOCONT0, GC_EVB_DCTL_IOCONT1_IOCONT0); | ||
771 | |||
772 | /* DRAM init */ | ||
773 | outreg(dram_ctrl, GC_DCTL_MODE_ADD, GC_EVB_DCTL_MODE_ADD); | ||
774 | outreg(dram_ctrl, GC_DCTL_SETTIME1_EMODE, GC_EVB_DCTL_SETTIME1_EMODE); | ||
775 | outreg(dram_ctrl, GC_DCTL_REFRESH_SETTIME2, | ||
776 | GC_EVB_DCTL_REFRESH_SETTIME2); | ||
777 | outreg(dram_ctrl, GC_DCTL_RSV2_RSV1, GC_EVB_DCTL_RSV2_RSV1); | ||
778 | outreg(dram_ctrl, GC_DCTL_DDRIF2_DDRIF1, GC_EVB_DCTL_DDRIF2_DDRIF1); | ||
779 | outreg(dram_ctrl, GC_DCTL_RSV0_STATES, GC_EVB_DCTL_RSV0_STATES); | ||
780 | |||
781 | /* DLL reset done? */ | ||
782 | while ((inreg(dram_ctrl, GC_DCTL_RSV0_STATES) & GC_DCTL_STATES_MSK)) { | ||
783 | udelay(GC_DCTL_INIT_WAIT_INTERVAL); | ||
784 | if (i++ > GC_DCTL_INIT_WAIT_CNT) { | ||
785 | dev_err(par->dev, "VRAM init failed.\n"); | ||
786 | return -EINVAL; | ||
787 | } | ||
788 | } | ||
789 | outreg(dram_ctrl, GC_DCTL_MODE_ADD, GC_EVB_DCTL_MODE_ADD_AFT_RST); | ||
790 | outreg(dram_ctrl, GC_DCTL_RSV0_STATES, GC_EVB_DCTL_RSV0_STATES_AFT_RST); | ||
791 | return 0; | ||
792 | } | ||
793 | |||
794 | static int carmine_init(struct mb862xxfb_par *par) | ||
795 | { | ||
796 | unsigned long reg; | ||
797 | |||
798 | par->ctrl = par->mmio_base + MB86297_CTRL_BASE; | ||
799 | par->i2c = par->mmio_base + MB86297_I2C_BASE; | ||
800 | par->disp = par->mmio_base + MB86297_DISP0_BASE; | ||
801 | par->disp1 = par->mmio_base + MB86297_DISP1_BASE; | ||
802 | par->cap = par->mmio_base + MB86297_CAP0_BASE; | ||
803 | par->cap1 = par->mmio_base + MB86297_CAP1_BASE; | ||
804 | par->draw = par->mmio_base + MB86297_DRAW_BASE; | ||
805 | par->dram_ctrl = par->mmio_base + MB86297_DRAMCTRL_BASE; | ||
806 | par->wrback = par->mmio_base + MB86297_WRBACK_BASE; | ||
807 | |||
808 | par->refclk = GC_DISP_REFCLK_533; | ||
809 | |||
810 | /* warm up */ | ||
811 | reg = GC_CTRL_CLK_EN_DRAM | GC_CTRL_CLK_EN_2D3D | GC_CTRL_CLK_EN_DISP0; | ||
812 | outreg(ctrl, GC_CTRL_CLK_ENABLE, reg); | ||
813 | |||
814 | /* check for engine module revision */ | ||
815 | if (inreg(draw, GC_2D3D_REV) == GC_RE_REVISION) | ||
816 | dev_info(par->dev, "Fujitsu Carmine GDC Rev.%d found\n", | ||
817 | par->pdev->revision); | ||
818 | else | ||
819 | goto err_init; | ||
820 | |||
821 | reg &= ~GC_CTRL_CLK_EN_2D3D; | ||
822 | outreg(ctrl, GC_CTRL_CLK_ENABLE, reg); | ||
823 | |||
824 | /* set up vram */ | ||
825 | if (init_dram_ctrl(par) < 0) | ||
826 | goto err_init; | ||
827 | |||
828 | outreg(ctrl, GC_CTRL_INT_MASK, 0); | ||
829 | return 0; | ||
830 | |||
831 | err_init: | ||
832 | outreg(ctrl, GC_CTRL_CLK_ENABLE, 0); | ||
833 | return -EINVAL; | ||
834 | } | ||
835 | |||
836 | static inline int mb862xx_pci_gdc_init(struct mb862xxfb_par *par) | ||
837 | { | ||
838 | switch (par->type) { | ||
839 | case BT_CORALP: | ||
840 | return coralp_init(par); | ||
841 | case BT_CARMINE: | ||
842 | return carmine_init(par); | ||
843 | default: | ||
844 | return -ENODEV; | ||
845 | } | ||
846 | } | ||
847 | |||
848 | #define CHIP_ID(id) \ | ||
849 | { PCI_DEVICE(PCI_VENDOR_ID_FUJITSU_LIMITED, id) } | ||
850 | |||
851 | static struct pci_device_id mb862xx_pci_tbl[] __devinitdata = { | ||
852 | /* MB86295/MB86296 */ | ||
853 | CHIP_ID(PCI_DEVICE_ID_FUJITSU_CORALP), | ||
854 | CHIP_ID(PCI_DEVICE_ID_FUJITSU_CORALPA), | ||
855 | /* MB86297 */ | ||
856 | CHIP_ID(PCI_DEVICE_ID_FUJITSU_CARMINE), | ||
857 | { 0, } | ||
858 | }; | ||
859 | |||
860 | MODULE_DEVICE_TABLE(pci, mb862xx_pci_tbl); | ||
861 | |||
862 | static int __devinit mb862xx_pci_probe(struct pci_dev *pdev, | ||
863 | const struct pci_device_id *ent) | ||
864 | { | ||
865 | struct mb862xxfb_par *par; | ||
866 | struct fb_info *info; | ||
867 | struct device *dev = &pdev->dev; | ||
868 | int ret; | ||
869 | |||
870 | ret = pci_enable_device(pdev); | ||
871 | if (ret < 0) { | ||
872 | dev_err(dev, "Cannot enable PCI device\n"); | ||
873 | goto out; | ||
874 | } | ||
875 | |||
876 | info = framebuffer_alloc(sizeof(struct mb862xxfb_par), dev); | ||
877 | if (!info) { | ||
878 | dev_err(dev, "framebuffer alloc failed\n"); | ||
879 | ret = -ENOMEM; | ||
880 | goto dis_dev; | ||
881 | } | ||
882 | |||
883 | par = info->par; | ||
884 | par->info = info; | ||
885 | par->dev = dev; | ||
886 | par->pdev = pdev; | ||
887 | par->irq = pdev->irq; | ||
888 | |||
889 | ret = pci_request_regions(pdev, DRV_NAME); | ||
890 | if (ret < 0) { | ||
891 | dev_err(dev, "Cannot reserve region(s) for PCI device\n"); | ||
892 | goto rel_fb; | ||
893 | } | ||
894 | |||
895 | switch (pdev->device) { | ||
896 | case PCI_DEVICE_ID_FUJITSU_CORALP: | ||
897 | case PCI_DEVICE_ID_FUJITSU_CORALPA: | ||
898 | par->fb_base_phys = pci_resource_start(par->pdev, 0); | ||
899 | par->mapped_vram = CORALP_MEM_SIZE; | ||
900 | par->mmio_base_phys = par->fb_base_phys + MB862XX_MMIO_BASE; | ||
901 | par->mmio_len = MB862XX_MMIO_SIZE; | ||
902 | par->type = BT_CORALP; | ||
903 | break; | ||
904 | case PCI_DEVICE_ID_FUJITSU_CARMINE: | ||
905 | par->fb_base_phys = pci_resource_start(par->pdev, 2); | ||
906 | par->mmio_base_phys = pci_resource_start(par->pdev, 3); | ||
907 | par->mmio_len = pci_resource_len(par->pdev, 3); | ||
908 | par->mapped_vram = CARMINE_MEM_SIZE; | ||
909 | par->type = BT_CARMINE; | ||
910 | break; | ||
911 | default: | ||
912 | /* should never occur */ | ||
913 | goto rel_reg; | ||
914 | } | ||
915 | |||
916 | par->fb_base = ioremap(par->fb_base_phys, par->mapped_vram); | ||
917 | if (par->fb_base == NULL) { | ||
918 | dev_err(dev, "Cannot map framebuffer\n"); | ||
919 | goto rel_reg; | ||
920 | } | ||
921 | |||
922 | par->mmio_base = ioremap(par->mmio_base_phys, par->mmio_len); | ||
923 | if (par->mmio_base == NULL) { | ||
924 | dev_err(dev, "Cannot map registers\n"); | ||
925 | ret = -EIO; | ||
926 | goto fb_unmap; | ||
927 | } | ||
928 | |||
929 | dev_dbg(dev, "fb phys 0x%llx 0x%lx\n", | ||
930 | (u64)par->fb_base_phys, (ulong)par->mapped_vram); | ||
931 | dev_dbg(dev, "mmio phys 0x%llx 0x%lx\n", | ||
932 | (u64)par->mmio_base_phys, (ulong)par->mmio_len); | ||
933 | |||
934 | if (mb862xx_pci_gdc_init(par)) | ||
935 | goto io_unmap; | ||
936 | |||
937 | if (request_irq(par->irq, mb862xx_intr, IRQF_DISABLED | IRQF_SHARED, | ||
938 | DRV_NAME, (void *)par)) { | ||
939 | dev_err(dev, "Cannot request irq\n"); | ||
940 | goto io_unmap; | ||
941 | } | ||
942 | |||
943 | mb862xxfb_init_fbinfo(info); | ||
944 | |||
945 | if (fb_alloc_cmap(&info->cmap, NR_PALETTE, 0) < 0) { | ||
946 | dev_err(dev, "Could not allocate cmap for fb_info.\n"); | ||
947 | ret = -ENOMEM; | ||
948 | goto free_irq; | ||
949 | } | ||
950 | |||
951 | if ((info->fbops->fb_set_par)(info)) | ||
952 | dev_err(dev, "set_var() failed on initial setup?\n"); | ||
953 | |||
954 | ret = register_framebuffer(info); | ||
955 | if (ret < 0) { | ||
956 | dev_err(dev, "failed to register framebuffer\n"); | ||
957 | goto rel_cmap; | ||
958 | } | ||
959 | |||
960 | pci_set_drvdata(pdev, info); | ||
961 | |||
962 | if (device_create_file(dev, &dev_attr_dispregs)) | ||
963 | dev_err(dev, "Can't create sysfs regdump file\n"); | ||
964 | |||
965 | if (par->type == BT_CARMINE) | ||
966 | outreg(ctrl, GC_CTRL_INT_MASK, GC_CARMINE_INT_EN); | ||
967 | else | ||
968 | outreg(host, GC_IMASK, GC_INT_EN); | ||
969 | |||
970 | return 0; | ||
971 | |||
972 | rel_cmap: | ||
973 | fb_dealloc_cmap(&info->cmap); | ||
974 | free_irq: | ||
975 | free_irq(par->irq, (void *)par); | ||
976 | io_unmap: | ||
977 | iounmap(par->mmio_base); | ||
978 | fb_unmap: | ||
979 | iounmap(par->fb_base); | ||
980 | rel_reg: | ||
981 | pci_release_regions(pdev); | ||
982 | rel_fb: | ||
983 | framebuffer_release(info); | ||
984 | dis_dev: | ||
985 | pci_disable_device(pdev); | ||
986 | out: | ||
987 | return ret; | ||
988 | } | ||
989 | |||
990 | static void __devexit mb862xx_pci_remove(struct pci_dev *pdev) | ||
991 | { | ||
992 | struct fb_info *fbi = pci_get_drvdata(pdev); | ||
993 | struct mb862xxfb_par *par = fbi->par; | ||
994 | unsigned long reg; | ||
995 | |||
996 | dev_dbg(fbi->dev, "%s release\n", fbi->fix.id); | ||
997 | |||
998 | /* display off */ | ||
999 | reg = inreg(disp, GC_DCM1); | ||
1000 | reg &= ~(GC_DCM01_DEN | GC_DCM01_L0E); | ||
1001 | outreg(disp, GC_DCM1, reg); | ||
1002 | |||
1003 | if (par->type == BT_CARMINE) { | ||
1004 | outreg(ctrl, GC_CTRL_INT_MASK, 0); | ||
1005 | outreg(ctrl, GC_CTRL_CLK_ENABLE, 0); | ||
1006 | } else { | ||
1007 | outreg(host, GC_IMASK, 0); | ||
1008 | } | ||
1009 | |||
1010 | device_remove_file(&pdev->dev, &dev_attr_dispregs); | ||
1011 | |||
1012 | pci_set_drvdata(pdev, NULL); | ||
1013 | unregister_framebuffer(fbi); | ||
1014 | fb_dealloc_cmap(&fbi->cmap); | ||
1015 | |||
1016 | free_irq(par->irq, (void *)par); | ||
1017 | iounmap(par->mmio_base); | ||
1018 | iounmap(par->fb_base); | ||
1019 | |||
1020 | pci_release_regions(pdev); | ||
1021 | framebuffer_release(fbi); | ||
1022 | pci_disable_device(pdev); | ||
1023 | } | ||
1024 | |||
1025 | static struct pci_driver mb862xxfb_pci_driver = { | ||
1026 | .name = DRV_NAME, | ||
1027 | .id_table = mb862xx_pci_tbl, | ||
1028 | .probe = mb862xx_pci_probe, | ||
1029 | .remove = __devexit_p(mb862xx_pci_remove), | ||
1030 | }; | ||
1031 | #endif | ||
1032 | |||
1033 | static int __devinit mb862xxfb_init(void) | ||
1034 | { | ||
1035 | int ret = -ENODEV; | ||
1036 | |||
1037 | #if defined(CONFIG_FB_MB862XX_LIME) | ||
1038 | ret = of_register_platform_driver(&of_platform_mb862xxfb_driver); | ||
1039 | #endif | ||
1040 | #if defined(CONFIG_FB_MB862XX_PCI_GDC) | ||
1041 | ret = pci_register_driver(&mb862xxfb_pci_driver); | ||
1042 | #endif | ||
1043 | return ret; | ||
1044 | } | ||
1045 | |||
1046 | static void __exit mb862xxfb_exit(void) | ||
1047 | { | ||
1048 | #if defined(CONFIG_FB_MB862XX_LIME) | ||
1049 | of_unregister_platform_driver(&of_platform_mb862xxfb_driver); | ||
1050 | #endif | ||
1051 | #if defined(CONFIG_FB_MB862XX_PCI_GDC) | ||
1052 | pci_unregister_driver(&mb862xxfb_pci_driver); | ||
1053 | #endif | ||
1054 | } | ||
1055 | |||
1056 | module_init(mb862xxfb_init); | ||
1057 | module_exit(mb862xxfb_exit); | ||
1058 | |||
1059 | MODULE_DESCRIPTION("Fujitsu MB862xx Framebuffer driver"); | ||
1060 | MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>"); | ||
1061 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/drivers/video/mb862xx/mb862xxfb.h b/drivers/video/mb862xx/mb862xxfb.h new file mode 100644 index 000000000000..c4c8f4dd2217 --- /dev/null +++ b/drivers/video/mb862xx/mb862xxfb.h | |||
@@ -0,0 +1,83 @@ | |||
1 | #ifndef __MB862XX_H__ | ||
2 | #define __MB862XX_H__ | ||
3 | |||
4 | #define PCI_VENDOR_ID_FUJITSU_LIMITED 0x10cf | ||
5 | #define PCI_DEVICE_ID_FUJITSU_CORALP 0x2019 | ||
6 | #define PCI_DEVICE_ID_FUJITSU_CORALPA 0x201e | ||
7 | #define PCI_DEVICE_ID_FUJITSU_CARMINE 0x202b | ||
8 | |||
9 | #define GC_MMR_CORALP_EVB_VAL 0x11d7fa13 | ||
10 | |||
11 | enum gdctype { | ||
12 | BT_NONE, | ||
13 | BT_LIME, | ||
14 | BT_MINT, | ||
15 | BT_CORAL, | ||
16 | BT_CORALP, | ||
17 | BT_CARMINE, | ||
18 | }; | ||
19 | |||
20 | struct mb862xx_gc_mode { | ||
21 | struct fb_videomode def_mode; /* mode of connected display */ | ||
22 | unsigned int def_bpp; /* default depth */ | ||
23 | unsigned long max_vram; /* connected SDRAM size */ | ||
24 | unsigned long ccf; /* gdc clk */ | ||
25 | unsigned long mmr; /* memory mode for SDRAM */ | ||
26 | }; | ||
27 | |||
28 | /* private data */ | ||
29 | struct mb862xxfb_par { | ||
30 | struct fb_info *info; /* fb info head */ | ||
31 | struct device *dev; | ||
32 | struct pci_dev *pdev; | ||
33 | struct resource *res; /* framebuffer/mmio resource */ | ||
34 | |||
35 | resource_size_t fb_base_phys; /* fb base, 36-bit PPC440EPx */ | ||
36 | resource_size_t mmio_base_phys; /* io base addr */ | ||
37 | void __iomem *fb_base; /* remapped framebuffer */ | ||
38 | void __iomem *mmio_base; /* remapped registers */ | ||
39 | size_t mapped_vram; /* length of remapped vram */ | ||
40 | size_t mmio_len; /* length of register region */ | ||
41 | |||
42 | void __iomem *host; /* relocatable reg. bases */ | ||
43 | void __iomem *i2c; | ||
44 | void __iomem *disp; | ||
45 | void __iomem *disp1; | ||
46 | void __iomem *cap; | ||
47 | void __iomem *cap1; | ||
48 | void __iomem *draw; | ||
49 | void __iomem *geo; | ||
50 | void __iomem *pio; | ||
51 | void __iomem *ctrl; | ||
52 | void __iomem *dram_ctrl; | ||
53 | void __iomem *wrback; | ||
54 | |||
55 | unsigned int irq; | ||
56 | unsigned int type; /* GDC type */ | ||
57 | unsigned int refclk; /* disp. reference clock */ | ||
58 | struct mb862xx_gc_mode *gc_mode; /* GDC mode init data */ | ||
59 | int pre_init; /* don't init display if 1 */ | ||
60 | |||
61 | u32 pseudo_palette[16]; | ||
62 | }; | ||
63 | |||
64 | #if defined(CONFIG_FB_MB862XX_LIME) && defined(CONFIG_FB_MB862XX_PCI_GDC) | ||
65 | #error "Select Lime GDC or CoralP/Carmine support, but not both together" | ||
66 | #endif | ||
67 | #if defined(CONFIG_FB_MB862XX_LIME) | ||
68 | #define gdc_read __raw_readl | ||
69 | #define gdc_write __raw_writel | ||
70 | #else | ||
71 | #define gdc_read readl | ||
72 | #define gdc_write writel | ||
73 | #endif | ||
74 | |||
75 | #define inreg(type, off) \ | ||
76 | gdc_read((par->type + (off))) | ||
77 | |||
78 | #define outreg(type, off, val) \ | ||
79 | gdc_write((val), (par->type + (off))) | ||
80 | |||
81 | #define pack(a, b) (((a) << 16) | (b)) | ||
82 | |||
83 | #endif | ||
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 1a22fe782a27..4fd3fa5546b1 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig | |||
@@ -67,11 +67,11 @@ config AT91RM9200_WATCHDOG | |||
67 | system when the timeout is reached. | 67 | system when the timeout is reached. |
68 | 68 | ||
69 | config AT91SAM9X_WATCHDOG | 69 | config AT91SAM9X_WATCHDOG |
70 | tristate "AT91SAM9X watchdog" | 70 | tristate "AT91SAM9X / AT91CAP9 watchdog" |
71 | depends on WATCHDOG && (ARCH_AT91SAM9260 || ARCH_AT91SAM9261) | 71 | depends on ARCH_AT91 && !ARCH_AT91RM9200 |
72 | help | 72 | help |
73 | Watchdog timer embedded into AT91SAM9X chips. This will reboot your | 73 | Watchdog timer embedded into AT91SAM9X and AT91CAP9 chips. This will |
74 | system when the timeout is reached. | 74 | reboot your system when the timeout is reached. |
75 | 75 | ||
76 | config 21285_WATCHDOG | 76 | config 21285_WATCHDOG |
77 | tristate "DC21285 watchdog" | 77 | tristate "DC21285 watchdog" |
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c index b4babfc31586..b1da287f90ec 100644 --- a/drivers/watchdog/at91sam9_wdt.c +++ b/drivers/watchdog/at91sam9_wdt.c | |||
@@ -30,7 +30,7 @@ | |||
30 | #include <linux/bitops.h> | 30 | #include <linux/bitops.h> |
31 | #include <linux/uaccess.h> | 31 | #include <linux/uaccess.h> |
32 | 32 | ||
33 | #include <asm/arch/at91_wdt.h> | 33 | #include <mach/at91_wdt.h> |
34 | 34 | ||
35 | #define DRV_NAME "AT91SAM9 Watchdog" | 35 | #define DRV_NAME "AT91SAM9 Watchdog" |
36 | 36 | ||
diff --git a/drivers/xen/balloon.c b/drivers/xen/balloon.c index 8c83abc73400..a0fb5eac407c 100644 --- a/drivers/xen/balloon.c +++ b/drivers/xen/balloon.c | |||
@@ -41,7 +41,6 @@ | |||
41 | #include <linux/pagemap.h> | 41 | #include <linux/pagemap.h> |
42 | #include <linux/highmem.h> | 42 | #include <linux/highmem.h> |
43 | #include <linux/mutex.h> | 43 | #include <linux/mutex.h> |
44 | #include <linux/highmem.h> | ||
45 | #include <linux/list.h> | 44 | #include <linux/list.h> |
46 | #include <linux/sysdev.h> | 45 | #include <linux/sysdev.h> |
47 | 46 | ||