diff options
author | John W. Linville <linville@tuxdriver.com> | 2005-04-21 20:00:02 -0400 |
---|---|---|
committer | David S. Miller <davem@sunset.davemloft.net> | 2005-04-21 20:00:02 -0400 |
commit | fcf026936c613fc6ca4685677a461100d87eec81 (patch) | |
tree | a666b7538467be00b16bcc2f33b1dcdbfdffe277 /drivers | |
parent | 6e9017a7d9b949aea638eeba67d34affaa145f14 (diff) |
[TG3]: use TG3_FLG2_5705_PLUS instead of multi-way if's
Replace a number of three-way if statements checking for 5705, 5750,
and 5752 to reference the equivalent TG3_FLG2_5705_PLUS flag instead.
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/tg3.c | 16 |
1 files changed, 4 insertions, 12 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 4375eec06d37..7ff598c9a0ca 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -85,9 +85,7 @@ | |||
85 | /* hardware minimum and maximum for a single frame's data payload */ | 85 | /* hardware minimum and maximum for a single frame's data payload */ |
86 | #define TG3_MIN_MTU 60 | 86 | #define TG3_MIN_MTU 60 |
87 | #define TG3_MAX_MTU(tp) \ | 87 | #define TG3_MAX_MTU(tp) \ |
88 | ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 && \ | 88 | (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ? 9000 : 1500) |
89 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750 && \ | ||
90 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752) ? 9000 : 1500) | ||
91 | 89 | ||
92 | /* These numbers seem to be hard coded in the NIC firmware somehow. | 90 | /* These numbers seem to be hard coded in the NIC firmware somehow. |
93 | * You can't change the ring sizes, but you can change where you place | 91 | * You can't change the ring sizes, but you can change where you place |
@@ -863,9 +861,7 @@ out: | |||
863 | if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) { | 861 | if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) { |
864 | /* Cannot do read-modify-write on 5401 */ | 862 | /* Cannot do read-modify-write on 5401 */ |
865 | tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x4c20); | 863 | tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x4c20); |
866 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 && | 864 | } else if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) { |
867 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750 && | ||
868 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752) { | ||
869 | u32 phy_reg; | 865 | u32 phy_reg; |
870 | 866 | ||
871 | /* Set bit 14 with read-modify-write to preserve other bits */ | 867 | /* Set bit 14 with read-modify-write to preserve other bits */ |
@@ -877,9 +873,7 @@ out: | |||
877 | /* Set phy register 0x10 bit 0 to high fifo elasticity to support | 873 | /* Set phy register 0x10 bit 0 to high fifo elasticity to support |
878 | * jumbo frames transmission. | 874 | * jumbo frames transmission. |
879 | */ | 875 | */ |
880 | if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 && | 876 | if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) { |
881 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750 && | ||
882 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752) { | ||
883 | u32 phy_reg; | 877 | u32 phy_reg; |
884 | 878 | ||
885 | if (!tg3_readphy(tp, MII_TG3_EXT_CTRL, &phy_reg)) | 879 | if (!tg3_readphy(tp, MII_TG3_EXT_CTRL, &phy_reg)) |
@@ -8483,9 +8477,7 @@ static int __devinit tg3_test_dma(struct tg3 *tp) | |||
8483 | /* DMA read watermark not used on PCIE */ | 8477 | /* DMA read watermark not used on PCIE */ |
8484 | tp->dma_rwctrl |= 0x00180000; | 8478 | tp->dma_rwctrl |= 0x00180000; |
8485 | } else if (!(tp->tg3_flags & TG3_FLAG_PCIX_MODE)) { | 8479 | } else if (!(tp->tg3_flags & TG3_FLAG_PCIX_MODE)) { |
8486 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 || | 8480 | if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) |
8487 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 || | ||
8488 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) | ||
8489 | tp->dma_rwctrl |= 0x003f0000; | 8481 | tp->dma_rwctrl |= 0x003f0000; |
8490 | else | 8482 | else |
8491 | tp->dma_rwctrl |= 0x003f000f; | 8483 | tp->dma_rwctrl |= 0x003f000f; |