diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-29 20:22:03 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-29 20:22:03 -0400 |
commit | a6ce22a5f61ba838b43763bf1e5be399f9dee4d0 (patch) | |
tree | 2abed83e85724bd45c5b0b842b9ce36d1c4ca160 /drivers | |
parent | 4e950f6f0189f65f8bf069cf2272649ef418f5e4 (diff) | |
parent | 09120a8cd38dbdb0c9a59ff8456cf88b510e6baa (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/jejb/scsi-rc-fixes-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/jejb/scsi-rc-fixes-2.6: (28 commits)
[SCSI] mpt fusion: Changes in mptctl.c for logging support
[SCSI] mpt fusion: Changes in mptfc.c mptlan.c mptsas.c and mptspi.c for logging support
[SCSI] mpt fusion: Changes in mptscsih.c for logging support
[SCSI] mpt fusion: Changes in mptbase.c for logging support
[SCSI] mpt fusion: logging support in Kconfig, Makefile, mptbase.h and addition of mptdebug.h
[SCSI] libsas: Fix potential NULL dereference in sas_smp_get_phy_events()
[SCSI] bsg: Fix build for CONFIG_BLOCK=n
[SCSI] aacraid: fix Sunrise Lake reset handling
[SCSI] aacraid: add SCSI SYNCHONIZE_CACHE range checking
[SCSI] add easyRAID to the no report luns blacklist
[SCSI] advansys: lindent and other large, uninteresting changes
[SCSI] aic79xx, aic7xxx: Fix incorrect width setting
[SCSI] qla2xxx: fix to honor ignored parameters in sysfs attributes
[SCSI] aacraid: draw line in sand, sundry cleanup and version update
[SCSI] iscsi_tcp: Turn off bounce buffers
[SCSI] libiscsi: fix cmd seqeunce number checking
[SCSI] iscsi_tcp, ib_iser Enable module refcounting for iscsi host template
[SCSI] libiscsi: make sure session is not blocked when removing host
[SCSI] libsas: Remove PCI dependencies
[SCSI] simscsi: convert to use the data buffer accessors
...
Diffstat (limited to 'drivers')
34 files changed, 15895 insertions, 14818 deletions
diff --git a/drivers/infiniband/ulp/iser/iscsi_iser.c b/drivers/infiniband/ulp/iser/iscsi_iser.c index 5db314380271..bad8dacafd10 100644 --- a/drivers/infiniband/ulp/iser/iscsi_iser.c +++ b/drivers/infiniband/ulp/iser/iscsi_iser.c | |||
@@ -548,6 +548,7 @@ iscsi_iser_ep_disconnect(__u64 ep_handle) | |||
548 | } | 548 | } |
549 | 549 | ||
550 | static struct scsi_host_template iscsi_iser_sht = { | 550 | static struct scsi_host_template iscsi_iser_sht = { |
551 | .module = THIS_MODULE, | ||
551 | .name = "iSCSI Initiator over iSER, v." DRV_VER, | 552 | .name = "iSCSI Initiator over iSER, v." DRV_VER, |
552 | .queuecommand = iscsi_queuecommand, | 553 | .queuecommand = iscsi_queuecommand, |
553 | .can_queue = ISCSI_DEF_XMIT_CMDS_MAX - 1, | 554 | .can_queue = ISCSI_DEF_XMIT_CMDS_MAX - 1, |
diff --git a/drivers/message/fusion/Kconfig b/drivers/message/fusion/Kconfig index 4494e0fd36c6..f55cc03a75c9 100644 --- a/drivers/message/fusion/Kconfig +++ b/drivers/message/fusion/Kconfig | |||
@@ -102,4 +102,18 @@ config FUSION_LAN | |||
102 | 102 | ||
103 | If unsure whether you really want or need this, say N. | 103 | If unsure whether you really want or need this, say N. |
104 | 104 | ||
105 | config FUSION_LOGGING | ||
106 | bool "Fusion MPT logging facility" | ||
107 | depends on FUSION | ||
108 | ---help--- | ||
109 | This turns on a logging facility that can be used to debug a number | ||
110 | of Fusion MPT related problems. | ||
111 | |||
112 | The debug level can be programmed on the fly via SysFS (hex values) | ||
113 | |||
114 | echo [level] > /sys/class/scsi_host/host#/debug_level | ||
115 | |||
116 | There are various debug levels that an be found in the source: | ||
117 | file:drivers/message/fusion/mptdebug.h | ||
118 | |||
105 | endmenu | 119 | endmenu |
diff --git a/drivers/message/fusion/Makefile b/drivers/message/fusion/Makefile index 6003b46c8438..95c9532cb07c 100644 --- a/drivers/message/fusion/Makefile +++ b/drivers/message/fusion/Makefile | |||
@@ -1,39 +1,8 @@ | |||
1 | # Fusion MPT drivers; recognized debug defines... | 1 | # Fusion MPT drivers; recognized debug defines... |
2 | # MPT general: | ||
3 | #EXTRA_CFLAGS += -DMPT_DEBUG | ||
4 | #EXTRA_CFLAGS += -DMPT_DEBUG_MSG_FRAME | ||
5 | #EXTRA_CFLAGS += -DMPT_DEBUG_SG | ||
6 | #EXTRA_CFLAGS += -DMPT_DEBUG_EVENTS | ||
7 | #EXTRA_CFLAGS += -DMPT_DEBUG_VERBOSE_EVENTS | ||
8 | #EXTRA_CFLAGS += -DMPT_DEBUG_INIT | ||
9 | #EXTRA_CFLAGS += -DMPT_DEBUG_EXIT | ||
10 | #EXTRA_CFLAGS += -DMPT_DEBUG_FAIL | ||
11 | #EXTRA_CFLAGS += -DMPT_DEBUG_DV | ||
12 | #EXTRA_CFLAGS += -DMPT_DEBUG_TM | ||
13 | #EXTRA_CFLAGS += -DMPT_DEBUG_REPLY | ||
14 | 2 | ||
15 | # | 3 | # enable verbose logging |
16 | # driver/module specifics... | 4 | # CONFIG_FUSION_LOGGING needs to be enabled in Kconfig |
17 | # | 5 | #EXTRA_CFLAGS += -DMPT_DEBUG_VERBOSE |
18 | # For mptbase: | ||
19 | #CFLAGS_mptbase.o += -DMPT_DEBUG_HANDSHAKE | ||
20 | #CFLAGS_mptbase.o += -DMPT_DEBUG_CONFIG | ||
21 | #CFLAGS_mptbase.o += -DMPT_DEBUG_DL | ||
22 | #CFLAGS_mptbase.o += -DMPT_DEBUG_IRQ | ||
23 | #CFLAGS_mptbase.o += -DMPT_DEBUG_RESET | ||
24 | # | ||
25 | # For mptscsih: | ||
26 | #CFLAGS_mptscsih.o += -DMPT_DEBUG_SCSI | ||
27 | # | ||
28 | # For mptctl: | ||
29 | #CFLAGS_mptctl.o += -DMPT_DEBUG_IOCTL | ||
30 | # | ||
31 | # For mptfc: | ||
32 | #CFLAGS_mptfc.o += -DMPT_DEBUG_FC | ||
33 | |||
34 | # For mptsas: | ||
35 | #CFLAGS_mptsas.o += -DMPT_DEBUG_SAS | ||
36 | #CFLAGS_mptsas.o += -DMPT_DEBUG_SAS_WIDE | ||
37 | 6 | ||
38 | 7 | ||
39 | #=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-} LSI_LOGIC | 8 | #=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-} LSI_LOGIC |
diff --git a/drivers/message/fusion/mptbase.c b/drivers/message/fusion/mptbase.c index 04f75e24dcec..e866dacde7e5 100644 --- a/drivers/message/fusion/mptbase.c +++ b/drivers/message/fusion/mptbase.c | |||
@@ -87,6 +87,10 @@ static int mpt_channel_mapping; | |||
87 | module_param(mpt_channel_mapping, int, 0); | 87 | module_param(mpt_channel_mapping, int, 0); |
88 | MODULE_PARM_DESC(mpt_channel_mapping, " Mapping id's to channels (default=0)"); | 88 | MODULE_PARM_DESC(mpt_channel_mapping, " Mapping id's to channels (default=0)"); |
89 | 89 | ||
90 | static int mpt_debug_level; | ||
91 | module_param(mpt_debug_level, int, 0); | ||
92 | MODULE_PARM_DESC(mpt_debug_level, " debug level - refer to mptdebug.h - (default=0)"); | ||
93 | |||
90 | #ifdef MFCNT | 94 | #ifdef MFCNT |
91 | static int mfcounter = 0; | 95 | static int mfcounter = 0; |
92 | #define PRINT_MF_COUNT 20000 | 96 | #define PRINT_MF_COUNT 20000 |
@@ -179,9 +183,7 @@ static void mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc); | |||
179 | 183 | ||
180 | //int mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag); | 184 | //int mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag); |
181 | static int ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *evReply, int *evHandlers); | 185 | static int ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *evReply, int *evHandlers); |
182 | #ifdef MPT_DEBUG_REPLY | ||
183 | static void mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf); | 186 | static void mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf); |
184 | #endif | ||
185 | static void mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info); | 187 | static void mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info); |
186 | static void mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info); | 188 | static void mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info); |
187 | static void mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info); | 189 | static void mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info); |
@@ -229,7 +231,7 @@ mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa) | |||
229 | int req_idx = 0; | 231 | int req_idx = 0; |
230 | int cb_idx; | 232 | int cb_idx; |
231 | 233 | ||
232 | dmfprintk((MYIOC_s_INFO_FMT "Got TURBO reply req_idx=%08x\n", | 234 | dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got TURBO reply req_idx=%08x\n", |
233 | ioc->name, pa)); | 235 | ioc->name, pa)); |
234 | 236 | ||
235 | switch (pa >> MPI_CONTEXT_REPLY_TYPE_SHIFT) { | 237 | switch (pa >> MPI_CONTEXT_REPLY_TYPE_SHIFT) { |
@@ -312,9 +314,9 @@ mpt_reply(MPT_ADAPTER *ioc, u32 pa) | |||
312 | cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx; | 314 | cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx; |
313 | mf = MPT_INDEX_2_MFPTR(ioc, req_idx); | 315 | mf = MPT_INDEX_2_MFPTR(ioc, req_idx); |
314 | 316 | ||
315 | dmfprintk((MYIOC_s_INFO_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n", | 317 | dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n", |
316 | ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function)); | 318 | ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function)); |
317 | DBG_DUMP_REPLY_FRAME(mr) | 319 | DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mr) |
318 | 320 | ||
319 | /* Check/log IOC log info | 321 | /* Check/log IOC log info |
320 | */ | 322 | */ |
@@ -329,10 +331,8 @@ mpt_reply(MPT_ADAPTER *ioc, u32 pa) | |||
329 | mpt_sas_log_info(ioc, log_info); | 331 | mpt_sas_log_info(ioc, log_info); |
330 | } | 332 | } |
331 | 333 | ||
332 | #ifdef MPT_DEBUG_REPLY | ||
333 | if (ioc_stat & MPI_IOCSTATUS_MASK) | 334 | if (ioc_stat & MPI_IOCSTATUS_MASK) |
334 | mpt_iocstatus_info(ioc, (u32)ioc_stat, mf); | 335 | mpt_iocstatus_info(ioc, (u32)ioc_stat, mf); |
335 | #endif | ||
336 | 336 | ||
337 | /* Check for (valid) IO callback! */ | 337 | /* Check for (valid) IO callback! */ |
338 | if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS || | 338 | if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS || |
@@ -414,17 +414,17 @@ mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *reply) | |||
414 | int freereq = 1; | 414 | int freereq = 1; |
415 | u8 func; | 415 | u8 func; |
416 | 416 | ||
417 | dmfprintk((MYIOC_s_INFO_FMT "mpt_base_reply() called\n", ioc->name)); | 417 | dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_base_reply() called\n", ioc->name)); |
418 | 418 | #ifdef CONFIG_FUSION_LOGGING | |
419 | #if defined(MPT_DEBUG_MSG_FRAME) | 419 | if ((ioc->debug_level & MPT_DEBUG_MSG_FRAME) && |
420 | if (!(reply->u.hdr.MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY)) { | 420 | !(reply->u.hdr.MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY)) { |
421 | dmfprintk((KERN_INFO MYNAM ": Original request frame (@%p) header\n", mf)); | 421 | dmfprintk(ioc, printk(KERN_INFO MYNAM ": Original request frame (@%p) header\n", mf)); |
422 | DBG_DUMP_REQUEST_FRAME_HDR(mf) | 422 | DBG_DUMP_REQUEST_FRAME_HDR(ioc, (u32 *)mf) |
423 | } | 423 | } |
424 | #endif | 424 | #endif |
425 | 425 | ||
426 | func = reply->u.hdr.Function; | 426 | func = reply->u.hdr.Function; |
427 | dmfprintk((MYIOC_s_INFO_FMT "mpt_base_reply, Function=%02Xh\n", | 427 | dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_base_reply, Function=%02Xh\n", |
428 | ioc->name, func)); | 428 | ioc->name, func)); |
429 | 429 | ||
430 | if (func == MPI_FUNCTION_EVENT_NOTIFICATION) { | 430 | if (func == MPI_FUNCTION_EVENT_NOTIFICATION) { |
@@ -435,7 +435,7 @@ mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *reply) | |||
435 | results = ProcessEventNotification(ioc, pEvReply, &evHandlers); | 435 | results = ProcessEventNotification(ioc, pEvReply, &evHandlers); |
436 | if (results != evHandlers) { | 436 | if (results != evHandlers) { |
437 | /* CHECKME! Any special handling needed here? */ | 437 | /* CHECKME! Any special handling needed here? */ |
438 | devtverboseprintk((MYIOC_s_WARN_FMT "Called %d event handlers, sum results = %d\n", | 438 | devtverboseprintk(ioc, printk(MYIOC_s_WARN_FMT "Called %d event handlers, sum results = %d\n", |
439 | ioc->name, evHandlers, results)); | 439 | ioc->name, evHandlers, results)); |
440 | } | 440 | } |
441 | 441 | ||
@@ -446,7 +446,7 @@ mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *reply) | |||
446 | if (pEvReply->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) { | 446 | if (pEvReply->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) { |
447 | freereq = 0; | 447 | freereq = 0; |
448 | } else { | 448 | } else { |
449 | devtverboseprintk((MYIOC_s_WARN_FMT "EVENT_NOTIFICATION reply %p returns Request frame\n", | 449 | devtverboseprintk(ioc, printk(MYIOC_s_WARN_FMT "EVENT_NOTIFICATION reply %p returns Request frame\n", |
450 | ioc->name, pEvReply)); | 450 | ioc->name, pEvReply)); |
451 | } | 451 | } |
452 | 452 | ||
@@ -455,13 +455,13 @@ mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *reply) | |||
455 | #endif | 455 | #endif |
456 | 456 | ||
457 | } else if (func == MPI_FUNCTION_EVENT_ACK) { | 457 | } else if (func == MPI_FUNCTION_EVENT_ACK) { |
458 | dprintk((MYIOC_s_INFO_FMT "mpt_base_reply, EventAck reply received\n", | 458 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_base_reply, EventAck reply received\n", |
459 | ioc->name)); | 459 | ioc->name)); |
460 | } else if (func == MPI_FUNCTION_CONFIG) { | 460 | } else if (func == MPI_FUNCTION_CONFIG) { |
461 | CONFIGPARMS *pCfg; | 461 | CONFIGPARMS *pCfg; |
462 | unsigned long flags; | 462 | unsigned long flags; |
463 | 463 | ||
464 | dcprintk((MYIOC_s_INFO_FMT "config_complete (mf=%p,mr=%p)\n", | 464 | dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "config_complete (mf=%p,mr=%p)\n", |
465 | ioc->name, mf, reply)); | 465 | ioc->name, mf, reply)); |
466 | 466 | ||
467 | pCfg = * ((CONFIGPARMS **)((u8 *) mf + ioc->req_sz - sizeof(void *))); | 467 | pCfg = * ((CONFIGPARMS **)((u8 *) mf + ioc->req_sz - sizeof(void *))); |
@@ -484,7 +484,7 @@ mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *reply) | |||
484 | u16 status; | 484 | u16 status; |
485 | 485 | ||
486 | status = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK; | 486 | status = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK; |
487 | dcprintk((KERN_NOTICE " IOCStatus=%04xh, IOCLogInfo=%08xh\n", | 487 | dcprintk(ioc, printk(KERN_NOTICE " IOCStatus=%04xh, IOCLogInfo=%08xh\n", |
488 | status, le32_to_cpu(pReply->IOCLogInfo))); | 488 | status, le32_to_cpu(pReply->IOCLogInfo))); |
489 | 489 | ||
490 | pCfg->status = status; | 490 | pCfg->status = status; |
@@ -789,7 +789,7 @@ mpt_get_msg_frame(int handle, MPT_ADAPTER *ioc) | |||
789 | printk(KERN_INFO "MF Count 0x%x Max 0x%x \n", ioc->mfcnt, ioc->req_depth); | 789 | printk(KERN_INFO "MF Count 0x%x Max 0x%x \n", ioc->mfcnt, ioc->req_depth); |
790 | #endif | 790 | #endif |
791 | 791 | ||
792 | dmfprintk((KERN_INFO MYNAM ": %s: mpt_get_msg_frame(%d,%d), got mf=%p\n", | 792 | dmfprintk(ioc, printk(KERN_INFO MYNAM ": %s: mpt_get_msg_frame(%d,%d), got mf=%p\n", |
793 | ioc->name, handle, ioc->id, mf)); | 793 | ioc->name, handle, ioc->id, mf)); |
794 | return mf; | 794 | return mf; |
795 | } | 795 | } |
@@ -820,27 +820,10 @@ mpt_put_msg_frame(int handle, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf) | |||
820 | mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx); | 820 | mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx); |
821 | mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0; | 821 | mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0; |
822 | 822 | ||
823 | #ifdef MPT_DEBUG_MSG_FRAME | 823 | DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf); |
824 | { | ||
825 | u32 *m = mf->u.frame.hwhdr.__hdr; | ||
826 | int ii, n; | ||
827 | |||
828 | printk(KERN_INFO MYNAM ": %s: About to Put msg frame @ %p:\n" KERN_INFO " ", | ||
829 | ioc->name, m); | ||
830 | n = ioc->req_sz/4 - 1; | ||
831 | while (m[n] == 0) | ||
832 | n--; | ||
833 | for (ii=0; ii<=n; ii++) { | ||
834 | if (ii && ((ii%8)==0)) | ||
835 | printk("\n" KERN_INFO " "); | ||
836 | printk(" %08x", le32_to_cpu(m[ii])); | ||
837 | } | ||
838 | printk("\n"); | ||
839 | } | ||
840 | #endif | ||
841 | 824 | ||
842 | mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx]; | 825 | mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx]; |
843 | dsgprintk((MYIOC_s_INFO_FMT "mf_dma_addr=%x req_idx=%d RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx, ioc->RequestNB[req_idx])); | 826 | dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx, ioc->RequestNB[req_idx])); |
844 | CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr); | 827 | CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr); |
845 | } | 828 | } |
846 | 829 | ||
@@ -955,7 +938,7 @@ mpt_send_handshake_request(int handle, MPT_ADAPTER *ioc, int reqBytes, u32 *req, | |||
955 | if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE)) | 938 | if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE)) |
956 | return -5; | 939 | return -5; |
957 | 940 | ||
958 | dhsprintk((KERN_INFO MYNAM ": %s: mpt_send_handshake_request start, WaitCnt=%d\n", | 941 | dhsprintk(ioc, printk(KERN_INFO MYNAM ": %s: mpt_send_handshake_request start, WaitCnt=%d\n", |
959 | ioc->name, ii)); | 942 | ioc->name, ii)); |
960 | 943 | ||
961 | CHIPREG_WRITE32(&ioc->chip->IntStatus, 0); | 944 | CHIPREG_WRITE32(&ioc->chip->IntStatus, 0); |
@@ -1066,7 +1049,7 @@ mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init) | |||
1066 | host_page_buffer_sz, | 1049 | host_page_buffer_sz, |
1067 | &ioc->HostPageBuffer_dma)) != NULL) { | 1050 | &ioc->HostPageBuffer_dma)) != NULL) { |
1068 | 1051 | ||
1069 | dinitprintk((MYIOC_s_INFO_FMT | 1052 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
1070 | "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n", | 1053 | "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n", |
1071 | ioc->name, ioc->HostPageBuffer, | 1054 | ioc->name, ioc->HostPageBuffer, |
1072 | (u32)ioc->HostPageBuffer_dma, | 1055 | (u32)ioc->HostPageBuffer_dma, |
@@ -1410,31 +1393,37 @@ mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1410 | struct proc_dir_entry *dent, *ent; | 1393 | struct proc_dir_entry *dent, *ent; |
1411 | #endif | 1394 | #endif |
1412 | 1395 | ||
1396 | ioc = kzalloc(sizeof(MPT_ADAPTER), GFP_ATOMIC); | ||
1397 | if (ioc == NULL) { | ||
1398 | printk(KERN_ERR MYNAM ": ERROR - Insufficient memory to add adapter!\n"); | ||
1399 | return -ENOMEM; | ||
1400 | } | ||
1401 | |||
1402 | ioc->debug_level = mpt_debug_level; | ||
1403 | if (mpt_debug_level) | ||
1404 | printk(KERN_INFO MYNAM ": mpt_debug_level=%xh\n", mpt_debug_level); | ||
1405 | |||
1413 | if (pci_enable_device(pdev)) | 1406 | if (pci_enable_device(pdev)) |
1414 | return r; | 1407 | return r; |
1415 | 1408 | ||
1416 | dinitprintk((KERN_WARNING MYNAM ": mpt_adapter_install\n")); | 1409 | dinitprintk(ioc, printk(KERN_WARNING MYNAM ": mpt_adapter_install\n")); |
1417 | 1410 | ||
1418 | if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { | 1411 | if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { |
1419 | dprintk((KERN_INFO MYNAM | 1412 | dprintk(ioc, printk(KERN_INFO MYNAM |
1420 | ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n")); | 1413 | ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n")); |
1421 | } else if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) { | 1414 | } else if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) { |
1422 | printk(KERN_WARNING MYNAM ": 32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTED\n"); | 1415 | printk(KERN_WARNING MYNAM ": 32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTED\n"); |
1423 | return r; | 1416 | return r; |
1424 | } | 1417 | } |
1425 | 1418 | ||
1426 | if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) | 1419 | if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) { |
1427 | dprintk((KERN_INFO MYNAM | 1420 | dprintk(ioc, printk(KERN_INFO MYNAM |
1428 | ": Using 64 bit consistent mask\n")); | 1421 | ": Using 64 bit consistent mask\n")); |
1429 | else | 1422 | } else { |
1430 | dprintk((KERN_INFO MYNAM | 1423 | dprintk(ioc, printk(KERN_INFO MYNAM |
1431 | ": Not using 64 bit consistent mask\n")); | 1424 | ": Not using 64 bit consistent mask\n")); |
1432 | |||
1433 | ioc = kzalloc(sizeof(MPT_ADAPTER), GFP_ATOMIC); | ||
1434 | if (ioc == NULL) { | ||
1435 | printk(KERN_ERR MYNAM ": ERROR - Insufficient memory to add adapter!\n"); | ||
1436 | return -ENOMEM; | ||
1437 | } | 1425 | } |
1426 | |||
1438 | ioc->alloc_total = sizeof(MPT_ADAPTER); | 1427 | ioc->alloc_total = sizeof(MPT_ADAPTER); |
1439 | ioc->req_sz = MPT_DEFAULT_FRAME_SIZE; /* avoid div by zero! */ | 1428 | ioc->req_sz = MPT_DEFAULT_FRAME_SIZE; /* avoid div by zero! */ |
1440 | ioc->reply_sz = MPT_REPLY_FRAME_SIZE; | 1429 | ioc->reply_sz = MPT_REPLY_FRAME_SIZE; |
@@ -1502,9 +1491,9 @@ mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1502 | return -EINVAL; | 1491 | return -EINVAL; |
1503 | } | 1492 | } |
1504 | ioc->memmap = mem; | 1493 | ioc->memmap = mem; |
1505 | dinitprintk((KERN_INFO MYNAM ": mem = %p, mem_phys = %lx\n", mem, mem_phys)); | 1494 | dinitprintk(ioc, printk(KERN_INFO MYNAM ": mem = %p, mem_phys = %lx\n", mem, mem_phys)); |
1506 | 1495 | ||
1507 | dinitprintk((KERN_INFO MYNAM ": facts @ %p, pfacts[0] @ %p\n", | 1496 | dinitprintk(ioc, printk(KERN_INFO MYNAM ": facts @ %p, pfacts[0] @ %p\n", |
1508 | &ioc->facts, &ioc->pfacts[0])); | 1497 | &ioc->facts, &ioc->pfacts[0])); |
1509 | 1498 | ||
1510 | ioc->mem_phys = mem_phys; | 1499 | ioc->mem_phys = mem_phys; |
@@ -1830,6 +1819,7 @@ mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag) | |||
1830 | int ret = 0; | 1819 | int ret = 0; |
1831 | int reset_alt_ioc_active = 0; | 1820 | int reset_alt_ioc_active = 0; |
1832 | int irq_allocated = 0; | 1821 | int irq_allocated = 0; |
1822 | u8 *a; | ||
1833 | 1823 | ||
1834 | printk(KERN_INFO MYNAM ": Initiating %s %s\n", | 1824 | printk(KERN_INFO MYNAM ": Initiating %s %s\n", |
1835 | ioc->name, reason==MPT_HOSTEVENT_IOC_BRINGUP ? "bringup" : "recovery"); | 1825 | ioc->name, reason==MPT_HOSTEVENT_IOC_BRINGUP ? "bringup" : "recovery"); |
@@ -1858,7 +1848,8 @@ mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag) | |||
1858 | 1848 | ||
1859 | if (reset_alt_ioc_active && ioc->alt_ioc) { | 1849 | if (reset_alt_ioc_active && ioc->alt_ioc) { |
1860 | /* (re)Enable alt-IOC! (reply interrupt, FreeQ) */ | 1850 | /* (re)Enable alt-IOC! (reply interrupt, FreeQ) */ |
1861 | dprintk((KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n", | 1851 | dprintk(ioc, printk(KERN_INFO MYNAM |
1852 | ": alt-%s reply irq re-enabled\n", | ||
1862 | ioc->alt_ioc->name)); | 1853 | ioc->alt_ioc->name)); |
1863 | CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM); | 1854 | CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM); |
1864 | ioc->alt_ioc->active = 1; | 1855 | ioc->alt_ioc->active = 1; |
@@ -1891,7 +1882,7 @@ mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag) | |||
1891 | 1882 | ||
1892 | 1883 | ||
1893 | if (ii == 5) { | 1884 | if (ii == 5) { |
1894 | dinitprintk((MYIOC_s_INFO_FMT "Retry IocFacts failed rc=%x\n", ioc->name, rc)); | 1885 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Retry IocFacts failed rc=%x\n", ioc->name, rc)); |
1895 | ret = -2; | 1886 | ret = -2; |
1896 | } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) { | 1887 | } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) { |
1897 | MptDisplayIocCapabilities(ioc); | 1888 | MptDisplayIocCapabilities(ioc); |
@@ -1899,13 +1890,15 @@ mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag) | |||
1899 | 1890 | ||
1900 | if (alt_ioc_ready) { | 1891 | if (alt_ioc_ready) { |
1901 | if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) { | 1892 | if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) { |
1902 | dinitprintk((MYIOC_s_INFO_FMT "Initial Alt IocFacts failed rc=%x\n", ioc->name, rc)); | 1893 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
1894 | "Initial Alt IocFacts failed rc=%x\n", ioc->name, rc)); | ||
1903 | /* Retry - alt IOC was initialized once | 1895 | /* Retry - alt IOC was initialized once |
1904 | */ | 1896 | */ |
1905 | rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason); | 1897 | rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason); |
1906 | } | 1898 | } |
1907 | if (rc) { | 1899 | if (rc) { |
1908 | dinitprintk((MYIOC_s_INFO_FMT "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc)); | 1900 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
1901 | "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc)); | ||
1909 | alt_ioc_ready = 0; | 1902 | alt_ioc_ready = 0; |
1910 | reset_alt_ioc_active = 0; | 1903 | reset_alt_ioc_active = 0; |
1911 | } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) { | 1904 | } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) { |
@@ -1938,7 +1931,7 @@ mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag) | |||
1938 | ioc->pci_irq = ioc->pcidev->irq; | 1931 | ioc->pci_irq = ioc->pcidev->irq; |
1939 | pci_set_master(ioc->pcidev); /* ?? */ | 1932 | pci_set_master(ioc->pcidev); /* ?? */ |
1940 | pci_set_drvdata(ioc->pcidev, ioc); | 1933 | pci_set_drvdata(ioc->pcidev, ioc); |
1941 | dprintk((KERN_INFO MYNAM ": %s installed at interrupt " | 1934 | dprintk(ioc, printk(KERN_INFO MYNAM ": %s installed at interrupt " |
1942 | "%d\n", ioc->name, ioc->pcidev->irq)); | 1935 | "%d\n", ioc->name, ioc->pcidev->irq)); |
1943 | } | 1936 | } |
1944 | } | 1937 | } |
@@ -1976,7 +1969,7 @@ mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag) | |||
1976 | 1969 | ||
1977 | if (reason == MPT_HOSTEVENT_IOC_BRINGUP){ | 1970 | if (reason == MPT_HOSTEVENT_IOC_BRINGUP){ |
1978 | if (ioc->upload_fw) { | 1971 | if (ioc->upload_fw) { |
1979 | ddlprintk((MYIOC_s_INFO_FMT | 1972 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
1980 | "firmware upload required!\n", ioc->name)); | 1973 | "firmware upload required!\n", ioc->name)); |
1981 | 1974 | ||
1982 | /* Controller is not operational, cannot do upload | 1975 | /* Controller is not operational, cannot do upload |
@@ -1992,7 +1985,8 @@ mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag) | |||
1992 | * chips (mpt_adapter_disable, | 1985 | * chips (mpt_adapter_disable, |
1993 | * mpt_diag_reset) | 1986 | * mpt_diag_reset) |
1994 | */ | 1987 | */ |
1995 | ddlprintk((MYIOC_s_INFO_FMT ": mpt_upload: alt_%s has cached_fw=%p \n", | 1988 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
1989 | ": mpt_upload: alt_%s has cached_fw=%p \n", | ||
1996 | ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw)); | 1990 | ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw)); |
1997 | ioc->alt_ioc->cached_fw = NULL; | 1991 | ioc->alt_ioc->cached_fw = NULL; |
1998 | } | 1992 | } |
@@ -2012,7 +2006,7 @@ mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag) | |||
2012 | 2006 | ||
2013 | if (reset_alt_ioc_active && ioc->alt_ioc) { | 2007 | if (reset_alt_ioc_active && ioc->alt_ioc) { |
2014 | /* (re)Enable alt-IOC! (reply interrupt) */ | 2008 | /* (re)Enable alt-IOC! (reply interrupt) */ |
2015 | dinitprintk((KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n", | 2009 | dinitprintk(ioc, printk(KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n", |
2016 | ioc->alt_ioc->name)); | 2010 | ioc->alt_ioc->name)); |
2017 | CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM); | 2011 | CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM); |
2018 | ioc->alt_ioc->active = 1; | 2012 | ioc->alt_ioc->active = 1; |
@@ -2064,13 +2058,13 @@ mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag) | |||
2064 | * (LANPage1_t stuff) | 2058 | * (LANPage1_t stuff) |
2065 | */ | 2059 | */ |
2066 | (void) GetLanConfigPages(ioc); | 2060 | (void) GetLanConfigPages(ioc); |
2067 | #ifdef MPT_DEBUG | 2061 | a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow; |
2068 | { | 2062 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
2069 | u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow; | 2063 | "LanAddr = %02X:%02X:%02X:" |
2070 | dprintk((MYIOC_s_INFO_FMT "LanAddr = %02X:%02X:%02X:%02X:%02X:%02X\n", | 2064 | "%02X:%02X:%02X\n", |
2071 | ioc->name, a[5], a[4], a[3], a[2], a[1], a[0] )); | 2065 | ioc->name, a[5], a[4], |
2072 | } | 2066 | a[3], a[2], a[1], a[0] )); |
2073 | #endif | 2067 | |
2074 | } | 2068 | } |
2075 | } else { | 2069 | } else { |
2076 | /* Get NVRAM and adapter maximums from SPP 0 and 2 | 2070 | /* Get NVRAM and adapter maximums from SPP 0 and 2 |
@@ -2107,15 +2101,17 @@ mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag) | |||
2107 | rc = handlers = 0; | 2101 | rc = handlers = 0; |
2108 | for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) { | 2102 | for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) { |
2109 | if ((ret == 0) && MptResetHandlers[ii]) { | 2103 | if ((ret == 0) && MptResetHandlers[ii]) { |
2110 | dprintk((MYIOC_s_INFO_FMT "Calling IOC post_reset handler #%d\n", | 2104 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
2111 | ioc->name, ii)); | 2105 | "Calling IOC post_reset handler #%d\n", |
2106 | ioc->name, ii)); | ||
2112 | rc += mpt_signal_reset(ii, ioc, MPT_IOC_POST_RESET); | 2107 | rc += mpt_signal_reset(ii, ioc, MPT_IOC_POST_RESET); |
2113 | handlers++; | 2108 | handlers++; |
2114 | } | 2109 | } |
2115 | 2110 | ||
2116 | if (alt_ioc_ready && MptResetHandlers[ii]) { | 2111 | if (alt_ioc_ready && MptResetHandlers[ii]) { |
2117 | drsprintk((MYIOC_s_INFO_FMT "Calling alt-%s post_reset handler #%d\n", | 2112 | drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
2118 | ioc->name, ioc->alt_ioc->name, ii)); | 2113 | "Calling alt-%s post_reset handler #%d\n", |
2114 | ioc->name, ioc->alt_ioc->name, ii)); | ||
2119 | rc += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_POST_RESET); | 2115 | rc += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_POST_RESET); |
2120 | handlers++; | 2116 | handlers++; |
2121 | } | 2117 | } |
@@ -2153,7 +2149,7 @@ mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev) | |||
2153 | unsigned int func = PCI_FUNC(pdev->devfn); | 2149 | unsigned int func = PCI_FUNC(pdev->devfn); |
2154 | MPT_ADAPTER *ioc_srch; | 2150 | MPT_ADAPTER *ioc_srch; |
2155 | 2151 | ||
2156 | dprintk((MYIOC_s_INFO_FMT "PCI device %s devfn=%x/%x," | 2152 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "PCI device %s devfn=%x/%x," |
2157 | " searching for devfn match on %x or %x\n", | 2153 | " searching for devfn match on %x or %x\n", |
2158 | ioc->name, pci_name(pdev), pdev->bus->number, | 2154 | ioc->name, pci_name(pdev), pdev->bus->number, |
2159 | pdev->devfn, func-1, func+1)); | 2155 | pdev->devfn, func-1, func+1)); |
@@ -2178,7 +2174,7 @@ mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev) | |||
2178 | ioc_srch->name, ioc_srch->alt_ioc->name); | 2174 | ioc_srch->name, ioc_srch->alt_ioc->name); |
2179 | break; | 2175 | break; |
2180 | } | 2176 | } |
2181 | dprintk((KERN_INFO MYNAM ": FOUND! binding %s <==> %s\n", | 2177 | dprintk(ioc, printk(KERN_INFO MYNAM ": FOUND! binding %s <==> %s\n", |
2182 | ioc->name, ioc_srch->name)); | 2178 | ioc->name, ioc_srch->name)); |
2183 | ioc_srch->alt_ioc = ioc; | 2179 | ioc_srch->alt_ioc = ioc; |
2184 | ioc->alt_ioc = ioc_srch; | 2180 | ioc->alt_ioc = ioc_srch; |
@@ -2199,7 +2195,7 @@ mpt_adapter_disable(MPT_ADAPTER *ioc) | |||
2199 | int ret; | 2195 | int ret; |
2200 | 2196 | ||
2201 | if (ioc->cached_fw != NULL) { | 2197 | if (ioc->cached_fw != NULL) { |
2202 | ddlprintk((KERN_INFO MYNAM ": mpt_adapter_disable: Pushing FW onto adapter\n")); | 2198 | ddlprintk(ioc, printk(KERN_INFO MYNAM ": mpt_adapter_disable: Pushing FW onto adapter\n")); |
2203 | if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)ioc->cached_fw, NO_SLEEP)) < 0) { | 2199 | if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)ioc->cached_fw, NO_SLEEP)) < 0) { |
2204 | printk(KERN_WARNING MYNAM | 2200 | printk(KERN_WARNING MYNAM |
2205 | ": firmware downloadboot failure (%d)!\n", ret); | 2201 | ": firmware downloadboot failure (%d)!\n", ret); |
@@ -2214,7 +2210,7 @@ mpt_adapter_disable(MPT_ADAPTER *ioc) | |||
2214 | 2210 | ||
2215 | if (ioc->alloc != NULL) { | 2211 | if (ioc->alloc != NULL) { |
2216 | sz = ioc->alloc_sz; | 2212 | sz = ioc->alloc_sz; |
2217 | dexitprintk((KERN_INFO MYNAM ": %s.free @ %p, sz=%d bytes\n", | 2213 | dexitprintk(ioc, printk(KERN_INFO MYNAM ": %s.free @ %p, sz=%d bytes\n", |
2218 | ioc->name, ioc->alloc, ioc->alloc_sz)); | 2214 | ioc->name, ioc->alloc, ioc->alloc_sz)); |
2219 | pci_free_consistent(ioc->pcidev, sz, | 2215 | pci_free_consistent(ioc->pcidev, sz, |
2220 | ioc->alloc, ioc->alloc_dma); | 2216 | ioc->alloc, ioc->alloc_dma); |
@@ -2256,7 +2252,7 @@ mpt_adapter_disable(MPT_ADAPTER *ioc) | |||
2256 | 2252 | ||
2257 | if (ioc->spi_data.pIocPg4 != NULL) { | 2253 | if (ioc->spi_data.pIocPg4 != NULL) { |
2258 | sz = ioc->spi_data.IocPg4Sz; | 2254 | sz = ioc->spi_data.IocPg4Sz; |
2259 | pci_free_consistent(ioc->pcidev, sz, | 2255 | pci_free_consistent(ioc->pcidev, sz, |
2260 | ioc->spi_data.pIocPg4, | 2256 | ioc->spi_data.pIocPg4, |
2261 | ioc->spi_data.IocPg4_dma); | 2257 | ioc->spi_data.IocPg4_dma); |
2262 | ioc->spi_data.pIocPg4 = NULL; | 2258 | ioc->spi_data.pIocPg4 = NULL; |
@@ -2279,7 +2275,7 @@ mpt_adapter_disable(MPT_ADAPTER *ioc) | |||
2279 | ": %s: host page buffers free failed (%d)!\n", | 2275 | ": %s: host page buffers free failed (%d)!\n", |
2280 | __FUNCTION__, ret); | 2276 | __FUNCTION__, ret); |
2281 | } | 2277 | } |
2282 | dexitprintk((KERN_INFO MYNAM ": %s HostPageBuffer free @ %p, sz=%d bytes\n", | 2278 | dexitprintk(ioc, printk(KERN_INFO MYNAM ": %s HostPageBuffer free @ %p, sz=%d bytes\n", |
2283 | ioc->name, ioc->HostPageBuffer, ioc->HostPageBuffer_sz)); | 2279 | ioc->name, ioc->HostPageBuffer, ioc->HostPageBuffer_sz)); |
2284 | pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz, | 2280 | pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz, |
2285 | ioc->HostPageBuffer, | 2281 | ioc->HostPageBuffer, |
@@ -2325,7 +2321,7 @@ mpt_adapter_dispose(MPT_ADAPTER *ioc) | |||
2325 | #if defined(CONFIG_MTRR) && 0 | 2321 | #if defined(CONFIG_MTRR) && 0 |
2326 | if (ioc->mtrr_reg > 0) { | 2322 | if (ioc->mtrr_reg > 0) { |
2327 | mtrr_del(ioc->mtrr_reg, 0, 0); | 2323 | mtrr_del(ioc->mtrr_reg, 0, 0); |
2328 | dprintk((KERN_INFO MYNAM ": %s: MTRR region de-registered\n", ioc->name)); | 2324 | dprintk(ioc, printk(KERN_INFO MYNAM ": %s: MTRR region de-registered\n", ioc->name)); |
2329 | } | 2325 | } |
2330 | #endif | 2326 | #endif |
2331 | 2327 | ||
@@ -2333,7 +2329,7 @@ mpt_adapter_dispose(MPT_ADAPTER *ioc) | |||
2333 | list_del(&ioc->list); | 2329 | list_del(&ioc->list); |
2334 | 2330 | ||
2335 | sz_last = ioc->alloc_total; | 2331 | sz_last = ioc->alloc_total; |
2336 | dprintk((KERN_INFO MYNAM ": %s: free'd %d of %d bytes\n", | 2332 | dprintk(ioc, printk(KERN_INFO MYNAM ": %s: free'd %d of %d bytes\n", |
2337 | ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first)); | 2333 | ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first)); |
2338 | 2334 | ||
2339 | if (ioc->alt_ioc) | 2335 | if (ioc->alt_ioc) |
@@ -2413,7 +2409,7 @@ MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag) | |||
2413 | 2409 | ||
2414 | /* Get current [raw] IOC state */ | 2410 | /* Get current [raw] IOC state */ |
2415 | ioc_state = mpt_GetIocState(ioc, 0); | 2411 | ioc_state = mpt_GetIocState(ioc, 0); |
2416 | dhsprintk((KERN_INFO MYNAM "::MakeIocReady, %s [raw] state=%08x\n", ioc->name, ioc_state)); | 2412 | dhsprintk(ioc, printk(KERN_INFO MYNAM "::MakeIocReady, %s [raw] state=%08x\n", ioc->name, ioc_state)); |
2417 | 2413 | ||
2418 | /* | 2414 | /* |
2419 | * Check to see if IOC got left/stuck in doorbell handshake | 2415 | * Check to see if IOC got left/stuck in doorbell handshake |
@@ -2444,7 +2440,7 @@ MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag) | |||
2444 | * Hmmm... Did it get left operational? | 2440 | * Hmmm... Did it get left operational? |
2445 | */ | 2441 | */ |
2446 | if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_OPERATIONAL) { | 2442 | if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_OPERATIONAL) { |
2447 | dinitprintk((MYIOC_s_INFO_FMT "IOC operational unexpected\n", | 2443 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOC operational unexpected\n", |
2448 | ioc->name)); | 2444 | ioc->name)); |
2449 | 2445 | ||
2450 | /* Check WhoInit. | 2446 | /* Check WhoInit. |
@@ -2453,7 +2449,7 @@ MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag) | |||
2453 | * Else, fall through to KickStart case | 2449 | * Else, fall through to KickStart case |
2454 | */ | 2450 | */ |
2455 | whoinit = (ioc_state & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT; | 2451 | whoinit = (ioc_state & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT; |
2456 | dinitprintk((KERN_INFO MYNAM | 2452 | dinitprintk(ioc, printk(KERN_INFO MYNAM |
2457 | ": whoinit 0x%x statefault %d force %d\n", | 2453 | ": whoinit 0x%x statefault %d force %d\n", |
2458 | whoinit, statefault, force)); | 2454 | whoinit, statefault, force)); |
2459 | if (whoinit == MPI_WHOINIT_PCI_PEER) | 2455 | if (whoinit == MPI_WHOINIT_PCI_PEER) |
@@ -2589,7 +2585,7 @@ GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason) | |||
2589 | get_facts.Function = MPI_FUNCTION_IOC_FACTS; | 2585 | get_facts.Function = MPI_FUNCTION_IOC_FACTS; |
2590 | /* Assert: All other get_facts fields are zero! */ | 2586 | /* Assert: All other get_facts fields are zero! */ |
2591 | 2587 | ||
2592 | dinitprintk((MYIOC_s_INFO_FMT | 2588 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
2593 | "Sending get IocFacts request req_sz=%d reply_sz=%d\n", | 2589 | "Sending get IocFacts request req_sz=%d reply_sz=%d\n", |
2594 | ioc->name, req_sz, reply_sz)); | 2590 | ioc->name, req_sz, reply_sz)); |
2595 | 2591 | ||
@@ -2691,8 +2687,9 @@ GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason) | |||
2691 | sz = sz >> 1; | 2687 | sz = sz >> 1; |
2692 | } | 2688 | } |
2693 | ioc->NBShiftFactor = shiftFactor; | 2689 | ioc->NBShiftFactor = shiftFactor; |
2694 | dinitprintk((MYIOC_s_INFO_FMT "NB_for_64_byte_frame=%x NBShiftFactor=%x BlockSize=%x\n", | 2690 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
2695 | ioc->name, vv, shiftFactor, r)); | 2691 | "NB_for_64_byte_frame=%x NBShiftFactor=%x BlockSize=%x\n", |
2692 | ioc->name, vv, shiftFactor, r)); | ||
2696 | 2693 | ||
2697 | if (reason == MPT_HOSTEVENT_IOC_BRINGUP) { | 2694 | if (reason == MPT_HOSTEVENT_IOC_BRINGUP) { |
2698 | /* | 2695 | /* |
@@ -2704,9 +2701,9 @@ GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason) | |||
2704 | ioc->reply_sz = MPT_REPLY_FRAME_SIZE; | 2701 | ioc->reply_sz = MPT_REPLY_FRAME_SIZE; |
2705 | ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth); | 2702 | ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth); |
2706 | 2703 | ||
2707 | dinitprintk((MYIOC_s_INFO_FMT "reply_sz=%3d, reply_depth=%4d\n", | 2704 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "reply_sz=%3d, reply_depth=%4d\n", |
2708 | ioc->name, ioc->reply_sz, ioc->reply_depth)); | 2705 | ioc->name, ioc->reply_sz, ioc->reply_depth)); |
2709 | dinitprintk((MYIOC_s_INFO_FMT "req_sz =%3d, req_depth =%4d\n", | 2706 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "req_sz =%3d, req_depth =%4d\n", |
2710 | ioc->name, ioc->req_sz, ioc->req_depth)); | 2707 | ioc->name, ioc->req_sz, ioc->req_depth)); |
2711 | 2708 | ||
2712 | /* Get port facts! */ | 2709 | /* Get port facts! */ |
@@ -2765,7 +2762,7 @@ GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag) | |||
2765 | get_pfacts.PortNumber = portnum; | 2762 | get_pfacts.PortNumber = portnum; |
2766 | /* Assert: All other get_pfacts fields are zero! */ | 2763 | /* Assert: All other get_pfacts fields are zero! */ |
2767 | 2764 | ||
2768 | dinitprintk((MYIOC_s_INFO_FMT "Sending get PortFacts(%d) request\n", | 2765 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending get PortFacts(%d) request\n", |
2769 | ioc->name, portnum)); | 2766 | ioc->name, portnum)); |
2770 | 2767 | ||
2771 | /* No non-zero fields in the get_pfacts request are greater than | 2768 | /* No non-zero fields in the get_pfacts request are greater than |
@@ -2841,12 +2838,12 @@ SendIocInit(MPT_ADAPTER *ioc, int sleepFlag) | |||
2841 | ioc->upload_fw = 1; | 2838 | ioc->upload_fw = 1; |
2842 | else | 2839 | else |
2843 | ioc->upload_fw = 0; | 2840 | ioc->upload_fw = 0; |
2844 | ddlprintk((MYIOC_s_INFO_FMT "upload_fw %d facts.Flags=%x\n", | 2841 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "upload_fw %d facts.Flags=%x\n", |
2845 | ioc->name, ioc->upload_fw, ioc->facts.Flags)); | 2842 | ioc->name, ioc->upload_fw, ioc->facts.Flags)); |
2846 | 2843 | ||
2847 | ioc_init.MaxDevices = (U8)ioc->devices_per_bus; | 2844 | ioc_init.MaxDevices = (U8)ioc->devices_per_bus; |
2848 | ioc_init.MaxBuses = (U8)ioc->number_of_buses; | 2845 | ioc_init.MaxBuses = (U8)ioc->number_of_buses; |
2849 | dinitprintk((MYIOC_s_INFO_FMT "facts.MsgVersion=%x\n", | 2846 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "facts.MsgVersion=%x\n", |
2850 | ioc->name, ioc->facts.MsgVersion)); | 2847 | ioc->name, ioc->facts.MsgVersion)); |
2851 | if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) { | 2848 | if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) { |
2852 | // set MsgVersion and HeaderVersion host driver was built with | 2849 | // set MsgVersion and HeaderVersion host driver was built with |
@@ -2877,7 +2874,7 @@ SendIocInit(MPT_ADAPTER *ioc, int sleepFlag) | |||
2877 | ioc->facts.MaxDevices = ioc_init.MaxDevices; | 2874 | ioc->facts.MaxDevices = ioc_init.MaxDevices; |
2878 | ioc->facts.MaxBuses = ioc_init.MaxBuses; | 2875 | ioc->facts.MaxBuses = ioc_init.MaxBuses; |
2879 | 2876 | ||
2880 | dhsprintk((MYIOC_s_INFO_FMT "Sending IOCInit (req @ %p)\n", | 2877 | dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOCInit (req @ %p)\n", |
2881 | ioc->name, &ioc_init)); | 2878 | ioc->name, &ioc_init)); |
2882 | 2879 | ||
2883 | r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init, | 2880 | r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init, |
@@ -2891,7 +2888,7 @@ SendIocInit(MPT_ADAPTER *ioc, int sleepFlag) | |||
2891 | * since we don't even look at its contents. | 2888 | * since we don't even look at its contents. |
2892 | */ | 2889 | */ |
2893 | 2890 | ||
2894 | dhsprintk((MYIOC_s_INFO_FMT "Sending PortEnable (req @ %p)\n", | 2891 | dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending PortEnable (req @ %p)\n", |
2895 | ioc->name, &ioc_init)); | 2892 | ioc->name, &ioc_init)); |
2896 | 2893 | ||
2897 | if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) { | 2894 | if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) { |
@@ -2922,7 +2919,7 @@ SendIocInit(MPT_ADAPTER *ioc, int sleepFlag) | |||
2922 | state = mpt_GetIocState(ioc, 1); | 2919 | state = mpt_GetIocState(ioc, 1); |
2923 | count++; | 2920 | count++; |
2924 | } | 2921 | } |
2925 | dinitprintk((MYIOC_s_INFO_FMT "INFO - Wait IOC_OPERATIONAL state (cnt=%d)\n", | 2922 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "INFO - Wait IOC_OPERATIONAL state (cnt=%d)\n", |
2926 | ioc->name, count)); | 2923 | ioc->name, count)); |
2927 | 2924 | ||
2928 | ioc->aen_event_read_flag=0; | 2925 | ioc->aen_event_read_flag=0; |
@@ -2962,7 +2959,7 @@ SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag) | |||
2962 | /* port_enable.MsgFlags = 0; */ | 2959 | /* port_enable.MsgFlags = 0; */ |
2963 | /* port_enable.MsgContext = 0; */ | 2960 | /* port_enable.MsgContext = 0; */ |
2964 | 2961 | ||
2965 | dinitprintk((MYIOC_s_INFO_FMT "Sending Port(%d)Enable (req @ %p)\n", | 2962 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending Port(%d)Enable (req @ %p)\n", |
2966 | ioc->name, portnum, &port_enable)); | 2963 | ioc->name, portnum, &port_enable)); |
2967 | 2964 | ||
2968 | /* RAID FW may take a long time to enable | 2965 | /* RAID FW may take a long time to enable |
@@ -3015,7 +3012,7 @@ mpt_free_fw_memory(MPT_ADAPTER *ioc) | |||
3015 | int sz; | 3012 | int sz; |
3016 | 3013 | ||
3017 | sz = ioc->facts.FWImageSize; | 3014 | sz = ioc->facts.FWImageSize; |
3018 | dinitprintk((KERN_INFO MYNAM "free_fw_memory: FW Image @ %p[%p], sz=%d[%x] bytes\n", | 3015 | dinitprintk(ioc, printk(KERN_INFO MYNAM "free_fw_memory: FW Image @ %p[%p], sz=%d[%x] bytes\n", |
3019 | ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz)); | 3016 | ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz)); |
3020 | pci_free_consistent(ioc->pcidev, sz, | 3017 | pci_free_consistent(ioc->pcidev, sz, |
3021 | ioc->cached_fw, ioc->cached_fw_dma); | 3018 | ioc->cached_fw, ioc->cached_fw_dma); |
@@ -3059,7 +3056,7 @@ mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag) | |||
3059 | 3056 | ||
3060 | mpt_alloc_fw_memory(ioc, sz); | 3057 | mpt_alloc_fw_memory(ioc, sz); |
3061 | 3058 | ||
3062 | dinitprintk((KERN_INFO MYNAM ": FW Image @ %p[%p], sz=%d[%x] bytes\n", | 3059 | dinitprintk(ioc, printk(KERN_INFO MYNAM ": FW Image @ %p[%p], sz=%d[%x] bytes\n", |
3063 | ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz)); | 3060 | ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz)); |
3064 | 3061 | ||
3065 | if (ioc->cached_fw == NULL) { | 3062 | if (ioc->cached_fw == NULL) { |
@@ -3091,14 +3088,14 @@ mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag) | |||
3091 | mpt_add_sge(&request[sgeoffset], flagsLength, ioc->cached_fw_dma); | 3088 | mpt_add_sge(&request[sgeoffset], flagsLength, ioc->cached_fw_dma); |
3092 | 3089 | ||
3093 | sgeoffset += sizeof(u32) + sizeof(dma_addr_t); | 3090 | sgeoffset += sizeof(u32) + sizeof(dma_addr_t); |
3094 | dinitprintk((KERN_INFO MYNAM ": Sending FW Upload (req @ %p) sgeoffset=%d \n", | 3091 | dinitprintk(ioc, printk(KERN_INFO MYNAM ": Sending FW Upload (req @ %p) sgeoffset=%d \n", |
3095 | prequest, sgeoffset)); | 3092 | prequest, sgeoffset)); |
3096 | DBG_DUMP_FW_REQUEST_FRAME(prequest) | 3093 | DBG_DUMP_FW_REQUEST_FRAME(ioc, (u32 *)prequest) |
3097 | 3094 | ||
3098 | ii = mpt_handshake_req_reply_wait(ioc, sgeoffset, (u32*)prequest, | 3095 | ii = mpt_handshake_req_reply_wait(ioc, sgeoffset, (u32*)prequest, |
3099 | reply_sz, (u16*)preply, 65 /*seconds*/, sleepFlag); | 3096 | reply_sz, (u16*)preply, 65 /*seconds*/, sleepFlag); |
3100 | 3097 | ||
3101 | dinitprintk((KERN_INFO MYNAM ": FW Upload completed rc=%x \n", ii)); | 3098 | dinitprintk(ioc, printk(KERN_INFO MYNAM ": FW Upload completed rc=%x \n", ii)); |
3102 | 3099 | ||
3103 | cmdStatus = -EFAULT; | 3100 | cmdStatus = -EFAULT; |
3104 | if (ii == 0) { | 3101 | if (ii == 0) { |
@@ -3113,13 +3110,13 @@ mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag) | |||
3113 | cmdStatus = 0; | 3110 | cmdStatus = 0; |
3114 | } | 3111 | } |
3115 | } | 3112 | } |
3116 | dinitprintk((MYIOC_s_INFO_FMT ": do_upload cmdStatus=%d \n", | 3113 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": do_upload cmdStatus=%d \n", |
3117 | ioc->name, cmdStatus)); | 3114 | ioc->name, cmdStatus)); |
3118 | 3115 | ||
3119 | 3116 | ||
3120 | if (cmdStatus) { | 3117 | if (cmdStatus) { |
3121 | 3118 | ||
3122 | ddlprintk((MYIOC_s_INFO_FMT ": fw upload failed, freeing image \n", | 3119 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": fw upload failed, freeing image \n", |
3123 | ioc->name)); | 3120 | ioc->name)); |
3124 | mpt_free_fw_memory(ioc); | 3121 | mpt_free_fw_memory(ioc); |
3125 | } | 3122 | } |
@@ -3154,7 +3151,7 @@ mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag) | |||
3154 | u32 load_addr; | 3151 | u32 load_addr; |
3155 | u32 ioc_state=0; | 3152 | u32 ioc_state=0; |
3156 | 3153 | ||
3157 | ddlprintk((MYIOC_s_INFO_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n", | 3154 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n", |
3158 | ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader)); | 3155 | ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader)); |
3159 | 3156 | ||
3160 | CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF); | 3157 | CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF); |
@@ -3179,7 +3176,7 @@ mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag) | |||
3179 | for (count = 0; count < 30; count ++) { | 3176 | for (count = 0; count < 30; count ++) { |
3180 | diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic); | 3177 | diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic); |
3181 | if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) { | 3178 | if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) { |
3182 | ddlprintk((MYIOC_s_INFO_FMT "RESET_ADAPTER cleared, count=%d\n", | 3179 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RESET_ADAPTER cleared, count=%d\n", |
3183 | ioc->name, count)); | 3180 | ioc->name, count)); |
3184 | break; | 3181 | break; |
3185 | } | 3182 | } |
@@ -3192,7 +3189,7 @@ mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag) | |||
3192 | } | 3189 | } |
3193 | 3190 | ||
3194 | if ( count == 30 ) { | 3191 | if ( count == 30 ) { |
3195 | ddlprintk((MYIOC_s_INFO_FMT "downloadboot failed! " | 3192 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot failed! " |
3196 | "Unable to get MPI_DIAG_DRWE mode, diag0val=%x\n", | 3193 | "Unable to get MPI_DIAG_DRWE mode, diag0val=%x\n", |
3197 | ioc->name, diag0val)); | 3194 | ioc->name, diag0val)); |
3198 | return -3; | 3195 | return -3; |
@@ -3218,10 +3215,10 @@ mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag) | |||
3218 | pci_enable_io_access(ioc->pcidev); | 3215 | pci_enable_io_access(ioc->pcidev); |
3219 | 3216 | ||
3220 | CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress); | 3217 | CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress); |
3221 | ddlprintk((MYIOC_s_INFO_FMT "LoadStart addr written 0x%x \n", | 3218 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "LoadStart addr written 0x%x \n", |
3222 | ioc->name, pFwHeader->LoadStartAddress)); | 3219 | ioc->name, pFwHeader->LoadStartAddress)); |
3223 | 3220 | ||
3224 | ddlprintk((MYIOC_s_INFO_FMT "Write FW Image: 0x%x bytes @ %p\n", | 3221 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write FW Image: 0x%x bytes @ %p\n", |
3225 | ioc->name, fwSize*4, ptrFw)); | 3222 | ioc->name, fwSize*4, ptrFw)); |
3226 | while (fwSize--) { | 3223 | while (fwSize--) { |
3227 | CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++); | 3224 | CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++); |
@@ -3236,7 +3233,7 @@ mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag) | |||
3236 | fwSize = (pExtImage->ImageSize + 3) >> 2; | 3233 | fwSize = (pExtImage->ImageSize + 3) >> 2; |
3237 | ptrFw = (u32 *)pExtImage; | 3234 | ptrFw = (u32 *)pExtImage; |
3238 | 3235 | ||
3239 | ddlprintk((MYIOC_s_INFO_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n", | 3236 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n", |
3240 | ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr)); | 3237 | ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr)); |
3241 | CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr); | 3238 | CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr); |
3242 | 3239 | ||
@@ -3247,11 +3244,11 @@ mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag) | |||
3247 | } | 3244 | } |
3248 | 3245 | ||
3249 | /* Write the IopResetVectorRegAddr */ | 3246 | /* Write the IopResetVectorRegAddr */ |
3250 | ddlprintk((MYIOC_s_INFO_FMT "Write IopResetVector Addr=%x! \n", ioc->name, pFwHeader->IopResetRegAddr)); | 3247 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Addr=%x! \n", ioc->name, pFwHeader->IopResetRegAddr)); |
3251 | CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr); | 3248 | CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr); |
3252 | 3249 | ||
3253 | /* Write the IopResetVectorValue */ | 3250 | /* Write the IopResetVectorValue */ |
3254 | ddlprintk((MYIOC_s_INFO_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue)); | 3251 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue)); |
3255 | CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue); | 3252 | CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue); |
3256 | 3253 | ||
3257 | /* Clear the internal flash bad bit - autoincrementing register, | 3254 | /* Clear the internal flash bad bit - autoincrementing register, |
@@ -3285,11 +3282,11 @@ mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag) | |||
3285 | pci_disable_io_access(ioc->pcidev); | 3282 | pci_disable_io_access(ioc->pcidev); |
3286 | 3283 | ||
3287 | diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic); | 3284 | diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic); |
3288 | ddlprintk((MYIOC_s_INFO_FMT "downloadboot diag0val=%x, " | 3285 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot diag0val=%x, " |
3289 | "turning off PREVENT_IOC_BOOT, DISABLE_ARM, RW_ENABLE\n", | 3286 | "turning off PREVENT_IOC_BOOT, DISABLE_ARM, RW_ENABLE\n", |
3290 | ioc->name, diag0val)); | 3287 | ioc->name, diag0val)); |
3291 | diag0val &= ~(MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM | MPI_DIAG_RW_ENABLE); | 3288 | diag0val &= ~(MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM | MPI_DIAG_RW_ENABLE); |
3292 | ddlprintk((MYIOC_s_INFO_FMT "downloadboot now diag0val=%x\n", | 3289 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot now diag0val=%x\n", |
3293 | ioc->name, diag0val)); | 3290 | ioc->name, diag0val)); |
3294 | CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val); | 3291 | CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val); |
3295 | 3292 | ||
@@ -3300,7 +3297,7 @@ mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag) | |||
3300 | ioc_state = mpt_GetIocState(ioc, 0); | 3297 | ioc_state = mpt_GetIocState(ioc, 0); |
3301 | if ( (GetIocFacts(ioc, sleepFlag, | 3298 | if ( (GetIocFacts(ioc, sleepFlag, |
3302 | MPT_HOSTEVENT_IOC_BRINGUP)) != 0 ) { | 3299 | MPT_HOSTEVENT_IOC_BRINGUP)) != 0 ) { |
3303 | ddlprintk((MYIOC_s_INFO_FMT "GetIocFacts failed: IocState=%x\n", | 3300 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "GetIocFacts failed: IocState=%x\n", |
3304 | ioc->name, ioc_state)); | 3301 | ioc->name, ioc_state)); |
3305 | return -EFAULT; | 3302 | return -EFAULT; |
3306 | } | 3303 | } |
@@ -3308,17 +3305,20 @@ mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag) | |||
3308 | 3305 | ||
3309 | for (count=0; count<HZ*20; count++) { | 3306 | for (count=0; count<HZ*20; count++) { |
3310 | if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) { | 3307 | if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) { |
3311 | ddlprintk((MYIOC_s_INFO_FMT "downloadboot successful! (count=%d) IocState=%x\n", | 3308 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
3312 | ioc->name, count, ioc_state)); | 3309 | "downloadboot successful! (count=%d) IocState=%x\n", |
3310 | ioc->name, count, ioc_state)); | ||
3313 | if (ioc->bus_type == SAS) { | 3311 | if (ioc->bus_type == SAS) { |
3314 | return 0; | 3312 | return 0; |
3315 | } | 3313 | } |
3316 | if ((SendIocInit(ioc, sleepFlag)) != 0) { | 3314 | if ((SendIocInit(ioc, sleepFlag)) != 0) { |
3317 | ddlprintk((MYIOC_s_INFO_FMT "downloadboot: SendIocInit failed\n", | 3315 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
3316 | "downloadboot: SendIocInit failed\n", | ||
3318 | ioc->name)); | 3317 | ioc->name)); |
3319 | return -EFAULT; | 3318 | return -EFAULT; |
3320 | } | 3319 | } |
3321 | ddlprintk((MYIOC_s_INFO_FMT "downloadboot: SendIocInit successful\n", | 3320 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
3321 | "downloadboot: SendIocInit successful\n", | ||
3322 | ioc->name)); | 3322 | ioc->name)); |
3323 | return 0; | 3323 | return 0; |
3324 | } | 3324 | } |
@@ -3328,8 +3328,8 @@ mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag) | |||
3328 | mdelay (10); | 3328 | mdelay (10); |
3329 | } | 3329 | } |
3330 | } | 3330 | } |
3331 | ddlprintk((MYIOC_s_INFO_FMT "downloadboot failed! IocState=%x\n", | 3331 | ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
3332 | ioc->name, ioc_state)); | 3332 | "downloadboot failed! IocState=%x\n",ioc->name, ioc_state)); |
3333 | return -EFAULT; | 3333 | return -EFAULT; |
3334 | } | 3334 | } |
3335 | 3335 | ||
@@ -3366,7 +3366,7 @@ KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag) | |||
3366 | u32 ioc_state=0; | 3366 | u32 ioc_state=0; |
3367 | int cnt,cntdn; | 3367 | int cnt,cntdn; |
3368 | 3368 | ||
3369 | dinitprintk((KERN_WARNING MYNAM ": KickStarting %s!\n", ioc->name)); | 3369 | dinitprintk(ioc, printk(KERN_WARNING MYNAM ": KickStarting %s!\n", ioc->name)); |
3370 | if (ioc->bus_type == SPI) { | 3370 | if (ioc->bus_type == SPI) { |
3371 | /* Always issue a Msg Unit Reset first. This will clear some | 3371 | /* Always issue a Msg Unit Reset first. This will clear some |
3372 | * SCSI bus hang conditions. | 3372 | * SCSI bus hang conditions. |
@@ -3384,14 +3384,14 @@ KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag) | |||
3384 | if (hard_reset_done < 0) | 3384 | if (hard_reset_done < 0) |
3385 | return hard_reset_done; | 3385 | return hard_reset_done; |
3386 | 3386 | ||
3387 | dinitprintk((MYIOC_s_INFO_FMT "Diagnostic reset successful!\n", | 3387 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset successful!\n", |
3388 | ioc->name)); | 3388 | ioc->name)); |
3389 | 3389 | ||
3390 | cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 2; /* 2 seconds */ | 3390 | cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 2; /* 2 seconds */ |
3391 | for (cnt=0; cnt<cntdn; cnt++) { | 3391 | for (cnt=0; cnt<cntdn; cnt++) { |
3392 | ioc_state = mpt_GetIocState(ioc, 1); | 3392 | ioc_state = mpt_GetIocState(ioc, 1); |
3393 | if ((ioc_state == MPI_IOC_STATE_READY) || (ioc_state == MPI_IOC_STATE_OPERATIONAL)) { | 3393 | if ((ioc_state == MPI_IOC_STATE_READY) || (ioc_state == MPI_IOC_STATE_OPERATIONAL)) { |
3394 | dinitprintk((MYIOC_s_INFO_FMT "KickStart successful! (cnt=%d)\n", | 3394 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStart successful! (cnt=%d)\n", |
3395 | ioc->name, cnt)); | 3395 | ioc->name, cnt)); |
3396 | return hard_reset_done; | 3396 | return hard_reset_done; |
3397 | } | 3397 | } |
@@ -3434,15 +3434,13 @@ mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag) | |||
3434 | u32 doorbell; | 3434 | u32 doorbell; |
3435 | int hard_reset_done = 0; | 3435 | int hard_reset_done = 0; |
3436 | int count = 0; | 3436 | int count = 0; |
3437 | #ifdef MPT_DEBUG | ||
3438 | u32 diag1val = 0; | 3437 | u32 diag1val = 0; |
3439 | #endif | ||
3440 | 3438 | ||
3441 | /* Clear any existing interrupts */ | 3439 | /* Clear any existing interrupts */ |
3442 | CHIPREG_WRITE32(&ioc->chip->IntStatus, 0); | 3440 | CHIPREG_WRITE32(&ioc->chip->IntStatus, 0); |
3443 | 3441 | ||
3444 | if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078) { | 3442 | if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078) { |
3445 | drsprintk((MYIOC_s_WARN_FMT "%s: Doorbell=%p; 1078 reset " | 3443 | drsprintk(ioc, printk(MYIOC_s_WARN_FMT "%s: Doorbell=%p; 1078 reset " |
3446 | "address=%p\n", ioc->name, __FUNCTION__, | 3444 | "address=%p\n", ioc->name, __FUNCTION__, |
3447 | &ioc->chip->Doorbell, &ioc->chip->Reset_1078)); | 3445 | &ioc->chip->Doorbell, &ioc->chip->Reset_1078)); |
3448 | CHIPREG_WRITE32(&ioc->chip->Reset_1078, 0x07); | 3446 | CHIPREG_WRITE32(&ioc->chip->Reset_1078, 0x07); |
@@ -3455,7 +3453,7 @@ mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag) | |||
3455 | doorbell = CHIPREG_READ32(&ioc->chip->Doorbell); | 3453 | doorbell = CHIPREG_READ32(&ioc->chip->Doorbell); |
3456 | doorbell &= MPI_IOC_STATE_MASK; | 3454 | doorbell &= MPI_IOC_STATE_MASK; |
3457 | 3455 | ||
3458 | drsprintk((MYIOC_s_INFO_FMT | 3456 | drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
3459 | "looking for READY STATE: doorbell=%x" | 3457 | "looking for READY STATE: doorbell=%x" |
3460 | " count=%d\n", | 3458 | " count=%d\n", |
3461 | ioc->name, doorbell, count)); | 3459 | ioc->name, doorbell, count)); |
@@ -3475,12 +3473,12 @@ mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag) | |||
3475 | /* Use "Diagnostic reset" method! (only thing available!) */ | 3473 | /* Use "Diagnostic reset" method! (only thing available!) */ |
3476 | diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic); | 3474 | diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic); |
3477 | 3475 | ||
3478 | #ifdef MPT_DEBUG | 3476 | if (ioc->debug_level & MPT_DEBUG) { |
3479 | if (ioc->alt_ioc) | 3477 | if (ioc->alt_ioc) |
3480 | diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic); | 3478 | diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic); |
3481 | dprintk((MYIOC_s_INFO_FMT "DbG1: diag0=%08x, diag1=%08x\n", | 3479 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG1: diag0=%08x, diag1=%08x\n", |
3482 | ioc->name, diag0val, diag1val)); | 3480 | ioc->name, diag0val, diag1val)); |
3483 | #endif | 3481 | } |
3484 | 3482 | ||
3485 | /* Do the reset if we are told to ignore the reset history | 3483 | /* Do the reset if we are told to ignore the reset history |
3486 | * or if the reset history is 0 | 3484 | * or if the reset history is 0 |
@@ -3514,16 +3512,16 @@ mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag) | |||
3514 | 3512 | ||
3515 | diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic); | 3513 | diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic); |
3516 | 3514 | ||
3517 | dprintk((MYIOC_s_INFO_FMT "Wrote magic DiagWriteEn sequence (%x)\n", | 3515 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Wrote magic DiagWriteEn sequence (%x)\n", |
3518 | ioc->name, diag0val)); | 3516 | ioc->name, diag0val)); |
3519 | } | 3517 | } |
3520 | 3518 | ||
3521 | #ifdef MPT_DEBUG | 3519 | if (ioc->debug_level & MPT_DEBUG) { |
3522 | if (ioc->alt_ioc) | 3520 | if (ioc->alt_ioc) |
3523 | diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic); | 3521 | diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic); |
3524 | dprintk((MYIOC_s_INFO_FMT "DbG2: diag0=%08x, diag1=%08x\n", | 3522 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG2: diag0=%08x, diag1=%08x\n", |
3525 | ioc->name, diag0val, diag1val)); | 3523 | ioc->name, diag0val, diag1val)); |
3526 | #endif | 3524 | } |
3527 | /* | 3525 | /* |
3528 | * Disable the ARM (Bug fix) | 3526 | * Disable the ARM (Bug fix) |
3529 | * | 3527 | * |
@@ -3537,7 +3535,7 @@ mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag) | |||
3537 | */ | 3535 | */ |
3538 | CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER); | 3536 | CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER); |
3539 | hard_reset_done = 1; | 3537 | hard_reset_done = 1; |
3540 | dprintk((MYIOC_s_INFO_FMT "Diagnostic reset performed\n", | 3538 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset performed\n", |
3541 | ioc->name)); | 3539 | ioc->name)); |
3542 | 3540 | ||
3543 | /* | 3541 | /* |
@@ -3552,12 +3550,14 @@ mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag) | |||
3552 | 3550 | ||
3553 | for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) { | 3551 | for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) { |
3554 | if (MptResetHandlers[ii]) { | 3552 | if (MptResetHandlers[ii]) { |
3555 | dprintk((MYIOC_s_INFO_FMT "Calling IOC pre_reset handler #%d\n", | 3553 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
3556 | ioc->name, ii)); | 3554 | "Calling IOC pre_reset handler #%d\n", |
3555 | ioc->name, ii)); | ||
3557 | r += mpt_signal_reset(ii, ioc, MPT_IOC_PRE_RESET); | 3556 | r += mpt_signal_reset(ii, ioc, MPT_IOC_PRE_RESET); |
3558 | if (ioc->alt_ioc) { | 3557 | if (ioc->alt_ioc) { |
3559 | dprintk((MYIOC_s_INFO_FMT "Calling alt-%s pre_reset handler #%d\n", | 3558 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
3560 | ioc->name, ioc->alt_ioc->name, ii)); | 3559 | "Calling alt-%s pre_reset handler #%d\n", |
3560 | ioc->name, ioc->alt_ioc->name, ii)); | ||
3561 | r += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_PRE_RESET); | 3561 | r += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_PRE_RESET); |
3562 | } | 3562 | } |
3563 | } | 3563 | } |
@@ -3580,7 +3580,7 @@ mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag) | |||
3580 | break; | 3580 | break; |
3581 | } | 3581 | } |
3582 | 3582 | ||
3583 | dprintk((MYIOC_s_INFO_FMT "cached_fw: diag0val=%x count=%d\n", | 3583 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "cached_fw: diag0val=%x count=%d\n", |
3584 | iocp->name, diag0val, count)); | 3584 | iocp->name, diag0val, count)); |
3585 | /* wait 1 sec */ | 3585 | /* wait 1 sec */ |
3586 | if (sleepFlag == CAN_SLEEP) { | 3586 | if (sleepFlag == CAN_SLEEP) { |
@@ -3621,12 +3621,12 @@ mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag) | |||
3621 | } | 3621 | } |
3622 | 3622 | ||
3623 | diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic); | 3623 | diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic); |
3624 | #ifdef MPT_DEBUG | 3624 | if (ioc->debug_level & MPT_DEBUG) { |
3625 | if (ioc->alt_ioc) | 3625 | if (ioc->alt_ioc) |
3626 | diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic); | 3626 | diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic); |
3627 | dprintk((MYIOC_s_INFO_FMT "DbG3: diag0=%08x, diag1=%08x\n", | 3627 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG3: diag0=%08x, diag1=%08x\n", |
3628 | ioc->name, diag0val, diag1val)); | 3628 | ioc->name, diag0val, diag1val)); |
3629 | #endif | 3629 | } |
3630 | 3630 | ||
3631 | /* Clear RESET_HISTORY bit! Place board in the | 3631 | /* Clear RESET_HISTORY bit! Place board in the |
3632 | * diagnostic mode to update the diag register. | 3632 | * diagnostic mode to update the diag register. |
@@ -3680,12 +3680,12 @@ mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag) | |||
3680 | return -3; | 3680 | return -3; |
3681 | } | 3681 | } |
3682 | 3682 | ||
3683 | #ifdef MPT_DEBUG | 3683 | if (ioc->debug_level & MPT_DEBUG) { |
3684 | if (ioc->alt_ioc) | 3684 | if (ioc->alt_ioc) |
3685 | diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic); | 3685 | diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic); |
3686 | dprintk((MYIOC_s_INFO_FMT "DbG4: diag0=%08x, diag1=%08x\n", | 3686 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG4: diag0=%08x, diag1=%08x\n", |
3687 | ioc->name, diag0val, diag1val)); | 3687 | ioc->name, diag0val, diag1val)); |
3688 | #endif | 3688 | } |
3689 | 3689 | ||
3690 | /* | 3690 | /* |
3691 | * Reset flag that says we've enabled event notification | 3691 | * Reset flag that says we've enabled event notification |
@@ -3717,7 +3717,7 @@ SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag) | |||
3717 | u32 state; | 3717 | u32 state; |
3718 | int cntdn, count; | 3718 | int cntdn, count; |
3719 | 3719 | ||
3720 | drsprintk((KERN_INFO MYNAM ": %s: Sending IOC reset(0x%02x)!\n", | 3720 | drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOC reset(0x%02x)!\n", |
3721 | ioc->name, reset_type)); | 3721 | ioc->name, reset_type)); |
3722 | CHIPREG_WRITE32(&ioc->chip->Doorbell, reset_type<<MPI_DOORBELL_FUNCTION_SHIFT); | 3722 | CHIPREG_WRITE32(&ioc->chip->Doorbell, reset_type<<MPI_DOORBELL_FUNCTION_SHIFT); |
3723 | if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) | 3723 | if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) |
@@ -3782,14 +3782,14 @@ initChainBuffers(MPT_ADAPTER *ioc) | |||
3782 | return -1; | 3782 | return -1; |
3783 | 3783 | ||
3784 | ioc->ReqToChain = (int *) mem; | 3784 | ioc->ReqToChain = (int *) mem; |
3785 | dinitprintk((KERN_INFO MYNAM ": %s ReqToChain alloc @ %p, sz=%d bytes\n", | 3785 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReqToChain alloc @ %p, sz=%d bytes\n", |
3786 | ioc->name, mem, sz)); | 3786 | ioc->name, mem, sz)); |
3787 | mem = kmalloc(sz, GFP_ATOMIC); | 3787 | mem = kmalloc(sz, GFP_ATOMIC); |
3788 | if (mem == NULL) | 3788 | if (mem == NULL) |
3789 | return -1; | 3789 | return -1; |
3790 | 3790 | ||
3791 | ioc->RequestNB = (int *) mem; | 3791 | ioc->RequestNB = (int *) mem; |
3792 | dinitprintk((KERN_INFO MYNAM ": %s RequestNB alloc @ %p, sz=%d bytes\n", | 3792 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestNB alloc @ %p, sz=%d bytes\n", |
3793 | ioc->name, mem, sz)); | 3793 | ioc->name, mem, sz)); |
3794 | } | 3794 | } |
3795 | for (ii = 0; ii < ioc->req_depth; ii++) { | 3795 | for (ii = 0; ii < ioc->req_depth; ii++) { |
@@ -3819,7 +3819,7 @@ initChainBuffers(MPT_ADAPTER *ioc) | |||
3819 | numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale + | 3819 | numSGE = 1 + (scale - 1) * (ioc->facts.MaxChainDepth-1) + scale + |
3820 | (ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32)); | 3820 | (ioc->req_sz - 64) / (sizeof(dma_addr_t) + sizeof(u32)); |
3821 | } | 3821 | } |
3822 | dinitprintk((KERN_INFO MYNAM ": %s num_sge=%d numSGE=%d\n", | 3822 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "num_sge=%d numSGE=%d\n", |
3823 | ioc->name, num_sge, numSGE)); | 3823 | ioc->name, num_sge, numSGE)); |
3824 | 3824 | ||
3825 | if ( numSGE > MPT_SCSI_SG_DEPTH ) | 3825 | if ( numSGE > MPT_SCSI_SG_DEPTH ) |
@@ -3832,7 +3832,7 @@ initChainBuffers(MPT_ADAPTER *ioc) | |||
3832 | } | 3832 | } |
3833 | num_chain++; | 3833 | num_chain++; |
3834 | 3834 | ||
3835 | dinitprintk((KERN_INFO MYNAM ": %s Now numSGE=%d num_sge=%d num_chain=%d\n", | 3835 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Now numSGE=%d num_sge=%d num_chain=%d\n", |
3836 | ioc->name, numSGE, num_sge, num_chain)); | 3836 | ioc->name, numSGE, num_sge, num_chain)); |
3837 | 3837 | ||
3838 | if (ioc->bus_type == SPI) | 3838 | if (ioc->bus_type == SPI) |
@@ -3849,7 +3849,7 @@ initChainBuffers(MPT_ADAPTER *ioc) | |||
3849 | return -1; | 3849 | return -1; |
3850 | 3850 | ||
3851 | ioc->ChainToChain = (int *) mem; | 3851 | ioc->ChainToChain = (int *) mem; |
3852 | dinitprintk((KERN_INFO MYNAM ": %s ChainToChain alloc @ %p, sz=%d bytes\n", | 3852 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainToChain alloc @ %p, sz=%d bytes\n", |
3853 | ioc->name, mem, sz)); | 3853 | ioc->name, mem, sz)); |
3854 | } else { | 3854 | } else { |
3855 | mem = (u8 *) ioc->ChainToChain; | 3855 | mem = (u8 *) ioc->ChainToChain; |
@@ -3885,22 +3885,22 @@ PrimeIocFifos(MPT_ADAPTER *ioc) | |||
3885 | return -1; | 3885 | return -1; |
3886 | 3886 | ||
3887 | total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth); | 3887 | total_size = reply_sz = (ioc->reply_sz * ioc->reply_depth); |
3888 | dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffer sz=%d bytes, ReplyDepth=%d\n", | 3888 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d bytes, ReplyDepth=%d\n", |
3889 | ioc->name, ioc->reply_sz, ioc->reply_depth)); | 3889 | ioc->name, ioc->reply_sz, ioc->reply_depth)); |
3890 | dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffer sz=%d[%x] bytes\n", | 3890 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffer sz=%d[%x] bytes\n", |
3891 | ioc->name, reply_sz, reply_sz)); | 3891 | ioc->name, reply_sz, reply_sz)); |
3892 | 3892 | ||
3893 | sz = (ioc->req_sz * ioc->req_depth); | 3893 | sz = (ioc->req_sz * ioc->req_depth); |
3894 | dinitprintk((KERN_INFO MYNAM ": %s.RequestBuffer sz=%d bytes, RequestDepth=%d\n", | 3894 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d bytes, RequestDepth=%d\n", |
3895 | ioc->name, ioc->req_sz, ioc->req_depth)); | 3895 | ioc->name, ioc->req_sz, ioc->req_depth)); |
3896 | dinitprintk((KERN_INFO MYNAM ": %s.RequestBuffer sz=%d[%x] bytes\n", | 3896 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffer sz=%d[%x] bytes\n", |
3897 | ioc->name, sz, sz)); | 3897 | ioc->name, sz, sz)); |
3898 | total_size += sz; | 3898 | total_size += sz; |
3899 | 3899 | ||
3900 | sz = num_chain * ioc->req_sz; /* chain buffer pool size */ | 3900 | sz = num_chain * ioc->req_sz; /* chain buffer pool size */ |
3901 | dinitprintk((KERN_INFO MYNAM ": %s.ChainBuffer sz=%d bytes, ChainDepth=%d\n", | 3901 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d bytes, ChainDepth=%d\n", |
3902 | ioc->name, ioc->req_sz, num_chain)); | 3902 | ioc->name, ioc->req_sz, num_chain)); |
3903 | dinitprintk((KERN_INFO MYNAM ": %s.ChainBuffer sz=%d[%x] bytes num_chain=%d\n", | 3903 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffer sz=%d[%x] bytes num_chain=%d\n", |
3904 | ioc->name, sz, sz, num_chain)); | 3904 | ioc->name, sz, sz, num_chain)); |
3905 | 3905 | ||
3906 | total_size += sz; | 3906 | total_size += sz; |
@@ -3911,7 +3911,7 @@ PrimeIocFifos(MPT_ADAPTER *ioc) | |||
3911 | goto out_fail; | 3911 | goto out_fail; |
3912 | } | 3912 | } |
3913 | 3913 | ||
3914 | dinitprintk((KERN_INFO MYNAM ": %s.Total alloc @ %p[%p], sz=%d[%x] bytes\n", | 3914 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Total alloc @ %p[%p], sz=%d[%x] bytes\n", |
3915 | ioc->name, mem, (void *)(ulong)alloc_dma, total_size, total_size)); | 3915 | ioc->name, mem, (void *)(ulong)alloc_dma, total_size, total_size)); |
3916 | 3916 | ||
3917 | memset(mem, 0, total_size); | 3917 | memset(mem, 0, total_size); |
@@ -3922,7 +3922,7 @@ PrimeIocFifos(MPT_ADAPTER *ioc) | |||
3922 | ioc->reply_frames = (MPT_FRAME_HDR *) mem; | 3922 | ioc->reply_frames = (MPT_FRAME_HDR *) mem; |
3923 | ioc->reply_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF); | 3923 | ioc->reply_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF); |
3924 | 3924 | ||
3925 | dinitprintk((KERN_INFO MYNAM ": %s ReplyBuffers @ %p[%p]\n", | 3925 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n", |
3926 | ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma)); | 3926 | ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma)); |
3927 | 3927 | ||
3928 | alloc_dma += reply_sz; | 3928 | alloc_dma += reply_sz; |
@@ -3933,7 +3933,7 @@ PrimeIocFifos(MPT_ADAPTER *ioc) | |||
3933 | ioc->req_frames = (MPT_FRAME_HDR *) mem; | 3933 | ioc->req_frames = (MPT_FRAME_HDR *) mem; |
3934 | ioc->req_frames_dma = alloc_dma; | 3934 | ioc->req_frames_dma = alloc_dma; |
3935 | 3935 | ||
3936 | dinitprintk((KERN_INFO MYNAM ": %s RequestBuffers @ %p[%p]\n", | 3936 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RequestBuffers @ %p[%p]\n", |
3937 | ioc->name, mem, (void *)(ulong)alloc_dma)); | 3937 | ioc->name, mem, (void *)(ulong)alloc_dma)); |
3938 | 3938 | ||
3939 | ioc->req_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF); | 3939 | ioc->req_frames_low_dma = (u32) (alloc_dma & 0xFFFFFFFF); |
@@ -3947,7 +3947,7 @@ PrimeIocFifos(MPT_ADAPTER *ioc) | |||
3947 | ioc->mtrr_reg = mtrr_add(ioc->req_frames_dma, | 3947 | ioc->mtrr_reg = mtrr_add(ioc->req_frames_dma, |
3948 | sz, | 3948 | sz, |
3949 | MTRR_TYPE_WRCOMB, 1); | 3949 | MTRR_TYPE_WRCOMB, 1); |
3950 | dprintk((MYIOC_s_INFO_FMT "MTRR region registered (base:size=%08x:%x)\n", | 3950 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "MTRR region registered (base:size=%08x:%x)\n", |
3951 | ioc->name, ioc->req_frames_dma, sz)); | 3951 | ioc->name, ioc->req_frames_dma, sz)); |
3952 | #endif | 3952 | #endif |
3953 | 3953 | ||
@@ -3959,7 +3959,7 @@ PrimeIocFifos(MPT_ADAPTER *ioc) | |||
3959 | ioc->ChainBuffer = mem; | 3959 | ioc->ChainBuffer = mem; |
3960 | ioc->ChainBufferDMA = alloc_dma; | 3960 | ioc->ChainBufferDMA = alloc_dma; |
3961 | 3961 | ||
3962 | dinitprintk((KERN_INFO MYNAM " :%s ChainBuffers @ %p(%p)\n", | 3962 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ChainBuffers @ %p(%p)\n", |
3963 | ioc->name, ioc->ChainBuffer, (void *)(ulong)ioc->ChainBufferDMA)); | 3963 | ioc->name, ioc->ChainBuffer, (void *)(ulong)ioc->ChainBufferDMA)); |
3964 | 3964 | ||
3965 | /* Initialize the free chain Q. | 3965 | /* Initialize the free chain Q. |
@@ -4004,7 +4004,7 @@ PrimeIocFifos(MPT_ADAPTER *ioc) | |||
4004 | 4004 | ||
4005 | ioc->sense_buf_low_dma = (u32) (ioc->sense_buf_pool_dma & 0xFFFFFFFF); | 4005 | ioc->sense_buf_low_dma = (u32) (ioc->sense_buf_pool_dma & 0xFFFFFFFF); |
4006 | ioc->alloc_total += sz; | 4006 | ioc->alloc_total += sz; |
4007 | dinitprintk((KERN_INFO MYNAM ": %s.SenseBuffers @ %p[%p]\n", | 4007 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SenseBuffers @ %p[%p]\n", |
4008 | ioc->name, ioc->sense_buf_pool, (void *)(ulong)ioc->sense_buf_pool_dma)); | 4008 | ioc->name, ioc->sense_buf_pool, (void *)(ulong)ioc->sense_buf_pool_dma)); |
4009 | 4009 | ||
4010 | } | 4010 | } |
@@ -4012,7 +4012,7 @@ PrimeIocFifos(MPT_ADAPTER *ioc) | |||
4012 | /* Post Reply frames to FIFO | 4012 | /* Post Reply frames to FIFO |
4013 | */ | 4013 | */ |
4014 | alloc_dma = ioc->alloc_dma; | 4014 | alloc_dma = ioc->alloc_dma; |
4015 | dinitprintk((KERN_INFO MYNAM ": %s.ReplyBuffers @ %p[%p]\n", | 4015 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ReplyBuffers @ %p[%p]\n", |
4016 | ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma)); | 4016 | ioc->name, ioc->reply_frames, (void *)(ulong)alloc_dma)); |
4017 | 4017 | ||
4018 | for (i = 0; i < ioc->reply_depth; i++) { | 4018 | for (i = 0; i < ioc->reply_depth; i++) { |
@@ -4093,7 +4093,7 @@ mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req, | |||
4093 | if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) | 4093 | if ((t = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) |
4094 | failcnt++; | 4094 | failcnt++; |
4095 | 4095 | ||
4096 | dhsprintk((MYIOC_s_INFO_FMT "HandShake request start reqBytes=%d, WaitCnt=%d%s\n", | 4096 | dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request start reqBytes=%d, WaitCnt=%d%s\n", |
4097 | ioc->name, reqBytes, t, failcnt ? " - MISSING DOORBELL HANDSHAKE!" : "")); | 4097 | ioc->name, reqBytes, t, failcnt ? " - MISSING DOORBELL HANDSHAKE!" : "")); |
4098 | 4098 | ||
4099 | /* Read doorbell and check for active bit */ | 4099 | /* Read doorbell and check for active bit */ |
@@ -4128,10 +4128,10 @@ mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req, | |||
4128 | failcnt++; | 4128 | failcnt++; |
4129 | } | 4129 | } |
4130 | 4130 | ||
4131 | dhsprintk((KERN_INFO MYNAM ": Handshake request frame (@%p) header\n", req)); | 4131 | dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Handshake request frame (@%p) header\n", ioc->name, req)); |
4132 | DBG_DUMP_REQUEST_FRAME_HDR(req) | 4132 | DBG_DUMP_REQUEST_FRAME_HDR(ioc, (u32 *)req) |
4133 | 4133 | ||
4134 | dhsprintk((MYIOC_s_INFO_FMT "HandShake request post done, WaitCnt=%d%s\n", | 4134 | dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake request post done, WaitCnt=%d%s\n", |
4135 | ioc->name, t, failcnt ? " - MISSING DOORBELL ACK!" : "")); | 4135 | ioc->name, t, failcnt ? " - MISSING DOORBELL ACK!" : "")); |
4136 | 4136 | ||
4137 | /* | 4137 | /* |
@@ -4140,7 +4140,7 @@ mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes, u32 *req, | |||
4140 | if (!failcnt && (t = WaitForDoorbellReply(ioc, maxwait, sleepFlag)) < 0) | 4140 | if (!failcnt && (t = WaitForDoorbellReply(ioc, maxwait, sleepFlag)) < 0) |
4141 | failcnt++; | 4141 | failcnt++; |
4142 | 4142 | ||
4143 | dhsprintk((MYIOC_s_INFO_FMT "HandShake reply count=%d%s\n", | 4143 | dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HandShake reply count=%d%s\n", |
4144 | ioc->name, t, failcnt ? " - MISSING DOORBELL REPLY!" : "")); | 4144 | ioc->name, t, failcnt ? " - MISSING DOORBELL REPLY!" : "")); |
4145 | 4145 | ||
4146 | /* | 4146 | /* |
@@ -4196,7 +4196,7 @@ WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag) | |||
4196 | } | 4196 | } |
4197 | 4197 | ||
4198 | if (cntdn) { | 4198 | if (cntdn) { |
4199 | dprintk((MYIOC_s_INFO_FMT "WaitForDoorbell ACK (count=%d)\n", | 4199 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell ACK (count=%d)\n", |
4200 | ioc->name, count)); | 4200 | ioc->name, count)); |
4201 | return count; | 4201 | return count; |
4202 | } | 4202 | } |
@@ -4245,7 +4245,7 @@ WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag) | |||
4245 | } | 4245 | } |
4246 | 4246 | ||
4247 | if (cntdn) { | 4247 | if (cntdn) { |
4248 | dprintk((MYIOC_s_INFO_FMT "WaitForDoorbell INT (cnt=%d) howlong=%d\n", | 4248 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell INT (cnt=%d) howlong=%d\n", |
4249 | ioc->name, count, howlong)); | 4249 | ioc->name, count, howlong)); |
4250 | return count; | 4250 | return count; |
4251 | } | 4251 | } |
@@ -4297,7 +4297,7 @@ WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag) | |||
4297 | } | 4297 | } |
4298 | } | 4298 | } |
4299 | 4299 | ||
4300 | dhsprintk((MYIOC_s_INFO_FMT "WaitCnt=%d First handshake reply word=%08x%s\n", | 4300 | dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitCnt=%d First handshake reply word=%08x%s\n", |
4301 | ioc->name, t, le32_to_cpu(*(u32 *)hs_reply), | 4301 | ioc->name, t, le32_to_cpu(*(u32 *)hs_reply), |
4302 | failcnt ? " - MISSING DOORBELL HANDSHAKE!" : "")); | 4302 | failcnt ? " - MISSING DOORBELL HANDSHAKE!" : "")); |
4303 | 4303 | ||
@@ -4333,10 +4333,10 @@ WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag) | |||
4333 | } | 4333 | } |
4334 | #endif | 4334 | #endif |
4335 | 4335 | ||
4336 | dhsprintk((MYIOC_s_INFO_FMT "Got Handshake reply:\n", ioc->name)); | 4336 | dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got Handshake reply:\n", ioc->name)); |
4337 | DBG_DUMP_REPLY_FRAME(mptReply) | 4337 | DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mptReply) |
4338 | 4338 | ||
4339 | dhsprintk((MYIOC_s_INFO_FMT "WaitForDoorbell REPLY WaitCnt=%d (sz=%d)\n", | 4339 | dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "WaitForDoorbell REPLY WaitCnt=%d (sz=%d)\n", |
4340 | ioc->name, t, u16cnt/2)); | 4340 | ioc->name, t, u16cnt/2)); |
4341 | return u16cnt/2; | 4341 | return u16cnt/2; |
4342 | } | 4342 | } |
@@ -4761,7 +4761,7 @@ mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum) | |||
4761 | 4761 | ||
4762 | ioc->spi_data.nvram = (int *) mem; | 4762 | ioc->spi_data.nvram = (int *) mem; |
4763 | 4763 | ||
4764 | dprintk((MYIOC_s_INFO_FMT "SCSI device NVRAM settings @ %p, sz=%d\n", | 4764 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SCSI device NVRAM settings @ %p, sz=%d\n", |
4765 | ioc->name, ioc->spi_data.nvram, sz)); | 4765 | ioc->name, ioc->spi_data.nvram, sz)); |
4766 | } | 4766 | } |
4767 | 4767 | ||
@@ -4797,7 +4797,8 @@ mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum) | |||
4797 | ioc->spi_data.minSyncFactor = MPT_ASYNC; | 4797 | ioc->spi_data.minSyncFactor = MPT_ASYNC; |
4798 | ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN; | 4798 | ioc->spi_data.busType = MPT_HOST_BUS_UNKNOWN; |
4799 | rc = 1; | 4799 | rc = 1; |
4800 | ddvprintk((MYIOC_s_INFO_FMT "Unable to read PortPage0 minSyncFactor=%x\n", | 4800 | ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
4801 | "Unable to read PortPage0 minSyncFactor=%x\n", | ||
4801 | ioc->name, ioc->spi_data.minSyncFactor)); | 4802 | ioc->name, ioc->spi_data.minSyncFactor)); |
4802 | } else { | 4803 | } else { |
4803 | /* Save the Port Page 0 data | 4804 | /* Save the Port Page 0 data |
@@ -4808,7 +4809,8 @@ mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum) | |||
4808 | 4809 | ||
4809 | if ( (pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_QAS) == 0 ) { | 4810 | if ( (pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_QAS) == 0 ) { |
4810 | ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS; | 4811 | ioc->spi_data.noQas |= MPT_TARGET_NO_NEGO_QAS; |
4811 | ddvprintk((KERN_INFO MYNAM " :%s noQas due to Capabilities=%x\n", | 4812 | ddvprintk(ioc, printk(KERN_INFO MYNAM |
4813 | " :%s noQas due to Capabilities=%x\n", | ||
4812 | ioc->name, pPP0->Capabilities)); | 4814 | ioc->name, pPP0->Capabilities)); |
4813 | } | 4815 | } |
4814 | ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0; | 4816 | ioc->spi_data.maxBusWidth = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_WIDE ? 1 : 0; |
@@ -4817,7 +4819,8 @@ mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum) | |||
4817 | ioc->spi_data.maxSyncOffset = (u8) (data >> 16); | 4819 | ioc->spi_data.maxSyncOffset = (u8) (data >> 16); |
4818 | data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK; | 4820 | data = pPP0->Capabilities & MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK; |
4819 | ioc->spi_data.minSyncFactor = (u8) (data >> 8); | 4821 | ioc->spi_data.minSyncFactor = (u8) (data >> 8); |
4820 | ddvprintk((MYIOC_s_INFO_FMT "PortPage0 minSyncFactor=%x\n", | 4822 | ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
4823 | "PortPage0 minSyncFactor=%x\n", | ||
4821 | ioc->name, ioc->spi_data.minSyncFactor)); | 4824 | ioc->name, ioc->spi_data.minSyncFactor)); |
4822 | } else { | 4825 | } else { |
4823 | ioc->spi_data.maxSyncOffset = 0; | 4826 | ioc->spi_data.maxSyncOffset = 0; |
@@ -4833,7 +4836,8 @@ mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum) | |||
4833 | 4836 | ||
4834 | if (ioc->spi_data.minSyncFactor < MPT_ULTRA) { | 4837 | if (ioc->spi_data.minSyncFactor < MPT_ULTRA) { |
4835 | ioc->spi_data.minSyncFactor = MPT_ULTRA; | 4838 | ioc->spi_data.minSyncFactor = MPT_ULTRA; |
4836 | ddvprintk((MYIOC_s_INFO_FMT "HVD or SE detected, minSyncFactor=%x\n", | 4839 | ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
4840 | "HVD or SE detected, minSyncFactor=%x\n", | ||
4837 | ioc->name, ioc->spi_data.minSyncFactor)); | 4841 | ioc->name, ioc->spi_data.minSyncFactor)); |
4838 | } | 4842 | } |
4839 | } | 4843 | } |
@@ -4949,10 +4953,10 @@ mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum) | |||
4949 | ioc->spi_data.sdp0version = cfg.cfghdr.hdr->PageVersion; | 4953 | ioc->spi_data.sdp0version = cfg.cfghdr.hdr->PageVersion; |
4950 | ioc->spi_data.sdp0length = cfg.cfghdr.hdr->PageLength; | 4954 | ioc->spi_data.sdp0length = cfg.cfghdr.hdr->PageLength; |
4951 | 4955 | ||
4952 | dcprintk((MYIOC_s_INFO_FMT "Headers: 0: version %d length %d\n", | 4956 | dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 0: version %d length %d\n", |
4953 | ioc->name, ioc->spi_data.sdp0version, ioc->spi_data.sdp0length)); | 4957 | ioc->name, ioc->spi_data.sdp0version, ioc->spi_data.sdp0length)); |
4954 | 4958 | ||
4955 | dcprintk((MYIOC_s_INFO_FMT "Headers: 1: version %d length %d\n", | 4959 | dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Headers: 1: version %d length %d\n", |
4956 | ioc->name, ioc->spi_data.sdp1version, ioc->spi_data.sdp1length)); | 4960 | ioc->name, ioc->spi_data.sdp1version, ioc->spi_data.sdp1length)); |
4957 | return 0; | 4961 | return 0; |
4958 | } | 4962 | } |
@@ -5361,12 +5365,12 @@ mpt_read_ioc_pg_1(MPT_ADAPTER *ioc) | |||
5361 | cfg.physAddr = ioc1_dma; | 5365 | cfg.physAddr = ioc1_dma; |
5362 | cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT; | 5366 | cfg.action = MPI_CONFIG_ACTION_PAGE_READ_CURRENT; |
5363 | if (mpt_config(ioc, &cfg) == 0) { | 5367 | if (mpt_config(ioc, &cfg) == 0) { |
5364 | 5368 | ||
5365 | tmp = le32_to_cpu(pIoc1->Flags) & MPI_IOCPAGE1_REPLY_COALESCING; | 5369 | tmp = le32_to_cpu(pIoc1->Flags) & MPI_IOCPAGE1_REPLY_COALESCING; |
5366 | if (tmp == MPI_IOCPAGE1_REPLY_COALESCING) { | 5370 | if (tmp == MPI_IOCPAGE1_REPLY_COALESCING) { |
5367 | tmp = le32_to_cpu(pIoc1->CoalescingTimeout); | 5371 | tmp = le32_to_cpu(pIoc1->CoalescingTimeout); |
5368 | 5372 | ||
5369 | dprintk((MYIOC_s_INFO_FMT "Coalescing Enabled Timeout = %d\n", | 5373 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Coalescing Enabled Timeout = %d\n", |
5370 | ioc->name, tmp)); | 5374 | ioc->name, tmp)); |
5371 | 5375 | ||
5372 | if (tmp > MPT_COALESCING_TIMEOUT) { | 5376 | if (tmp > MPT_COALESCING_TIMEOUT) { |
@@ -5377,26 +5381,29 @@ mpt_read_ioc_pg_1(MPT_ADAPTER *ioc) | |||
5377 | cfg.dir = 1; | 5381 | cfg.dir = 1; |
5378 | cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT; | 5382 | cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT; |
5379 | if (mpt_config(ioc, &cfg) == 0) { | 5383 | if (mpt_config(ioc, &cfg) == 0) { |
5380 | dprintk((MYIOC_s_INFO_FMT "Reset Current Coalescing Timeout to = %d\n", | 5384 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Reset Current Coalescing Timeout to = %d\n", |
5381 | ioc->name, MPT_COALESCING_TIMEOUT)); | 5385 | ioc->name, MPT_COALESCING_TIMEOUT)); |
5382 | 5386 | ||
5383 | cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM; | 5387 | cfg.action = MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM; |
5384 | if (mpt_config(ioc, &cfg) == 0) { | 5388 | if (mpt_config(ioc, &cfg) == 0) { |
5385 | dprintk((MYIOC_s_INFO_FMT "Reset NVRAM Coalescing Timeout to = %d\n", | 5389 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
5390 | "Reset NVRAM Coalescing Timeout to = %d\n", | ||
5386 | ioc->name, MPT_COALESCING_TIMEOUT)); | 5391 | ioc->name, MPT_COALESCING_TIMEOUT)); |
5387 | } else { | 5392 | } else { |
5388 | dprintk((MYIOC_s_INFO_FMT "Reset NVRAM Coalescing Timeout Failed\n", | 5393 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
5389 | ioc->name)); | 5394 | "Reset NVRAM Coalescing Timeout Failed\n", |
5395 | ioc->name)); | ||
5390 | } | 5396 | } |
5391 | 5397 | ||
5392 | } else { | 5398 | } else { |
5393 | dprintk((MYIOC_s_WARN_FMT "Reset of Current Coalescing Timeout Failed!\n", | 5399 | dprintk(ioc, printk(MYIOC_s_WARN_FMT |
5394 | ioc->name)); | 5400 | "Reset of Current Coalescing Timeout Failed!\n", |
5401 | ioc->name)); | ||
5395 | } | 5402 | } |
5396 | } | 5403 | } |
5397 | 5404 | ||
5398 | } else { | 5405 | } else { |
5399 | dprintk((MYIOC_s_WARN_FMT "Coalescing Disabled\n", ioc->name)); | 5406 | dprintk(ioc, printk(MYIOC_s_WARN_FMT "Coalescing Disabled\n", ioc->name)); |
5400 | } | 5407 | } |
5401 | } | 5408 | } |
5402 | 5409 | ||
@@ -5461,13 +5468,13 @@ SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch) | |||
5461 | 5468 | ||
5462 | evnp = (EventNotification_t *) mpt_get_msg_frame(mpt_base_index, ioc); | 5469 | evnp = (EventNotification_t *) mpt_get_msg_frame(mpt_base_index, ioc); |
5463 | if (evnp == NULL) { | 5470 | if (evnp == NULL) { |
5464 | devtverboseprintk((MYIOC_s_WARN_FMT "Unable to allocate event request frame!\n", | 5471 | devtverboseprintk(ioc, printk(MYIOC_s_WARN_FMT "Unable to allocate event request frame!\n", |
5465 | ioc->name)); | 5472 | ioc->name)); |
5466 | return 0; | 5473 | return 0; |
5467 | } | 5474 | } |
5468 | memset(evnp, 0, sizeof(*evnp)); | 5475 | memset(evnp, 0, sizeof(*evnp)); |
5469 | 5476 | ||
5470 | devtverboseprintk((MYIOC_s_INFO_FMT "Sending EventNotification (%d) request %p\n", ioc->name, EvSwitch, evnp)); | 5477 | devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending EventNotification (%d) request %p\n", ioc->name, EvSwitch, evnp)); |
5471 | 5478 | ||
5472 | evnp->Function = MPI_FUNCTION_EVENT_NOTIFICATION; | 5479 | evnp->Function = MPI_FUNCTION_EVENT_NOTIFICATION; |
5473 | evnp->ChainOffset = 0; | 5480 | evnp->ChainOffset = 0; |
@@ -5491,12 +5498,12 @@ SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp) | |||
5491 | EventAck_t *pAck; | 5498 | EventAck_t *pAck; |
5492 | 5499 | ||
5493 | if ((pAck = (EventAck_t *) mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) { | 5500 | if ((pAck = (EventAck_t *) mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) { |
5494 | dfailprintk((MYIOC_s_WARN_FMT "%s, no msg frames!!\n", | 5501 | dfailprintk(ioc, printk(MYIOC_s_WARN_FMT "%s, no msg frames!!\n", |
5495 | ioc->name,__FUNCTION__)); | 5502 | ioc->name,__FUNCTION__)); |
5496 | return -1; | 5503 | return -1; |
5497 | } | 5504 | } |
5498 | 5505 | ||
5499 | devtverboseprintk((MYIOC_s_INFO_FMT "Sending EventAck\n", ioc->name)); | 5506 | devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending EventAck\n", ioc->name)); |
5500 | 5507 | ||
5501 | pAck->Function = MPI_FUNCTION_EVENT_ACK; | 5508 | pAck->Function = MPI_FUNCTION_EVENT_ACK; |
5502 | pAck->ChainOffset = 0; | 5509 | pAck->ChainOffset = 0; |
@@ -5541,7 +5548,7 @@ mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg) | |||
5541 | */ | 5548 | */ |
5542 | in_isr = in_interrupt(); | 5549 | in_isr = in_interrupt(); |
5543 | if (in_isr) { | 5550 | if (in_isr) { |
5544 | dcprintk((MYIOC_s_WARN_FMT "Config request not allowed in ISR context!\n", | 5551 | dcprintk(ioc, printk(MYIOC_s_WARN_FMT "Config request not allowed in ISR context!\n", |
5545 | ioc->name)); | 5552 | ioc->name)); |
5546 | return -EPERM; | 5553 | return -EPERM; |
5547 | } | 5554 | } |
@@ -5549,7 +5556,7 @@ mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg) | |||
5549 | /* Get and Populate a free Frame | 5556 | /* Get and Populate a free Frame |
5550 | */ | 5557 | */ |
5551 | if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) { | 5558 | if ((mf = mpt_get_msg_frame(mpt_base_index, ioc)) == NULL) { |
5552 | dcprintk((MYIOC_s_WARN_FMT "mpt_config: no msg frames!\n", | 5559 | dcprintk(ioc, printk(MYIOC_s_WARN_FMT "mpt_config: no msg frames!\n", |
5553 | ioc->name)); | 5560 | ioc->name)); |
5554 | return -EAGAIN; | 5561 | return -EAGAIN; |
5555 | } | 5562 | } |
@@ -5594,13 +5601,13 @@ mpt_config(MPT_ADAPTER *ioc, CONFIGPARMS *pCfg) | |||
5594 | if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) { | 5601 | if ((pCfg->cfghdr.hdr->PageType & MPI_CONFIG_PAGETYPE_MASK) == MPI_CONFIG_PAGETYPE_EXTENDED) { |
5595 | flagsLength |= pExtHdr->ExtPageLength * 4; | 5602 | flagsLength |= pExtHdr->ExtPageLength * 4; |
5596 | 5603 | ||
5597 | dcprintk((MYIOC_s_INFO_FMT "Sending Config request type %d, page %d and action %d\n", | 5604 | dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending Config request type %d, page %d and action %d\n", |
5598 | ioc->name, pReq->ExtPageType, pReq->Header.PageNumber, pReq->Action)); | 5605 | ioc->name, pReq->ExtPageType, pReq->Header.PageNumber, pReq->Action)); |
5599 | } | 5606 | } |
5600 | else { | 5607 | else { |
5601 | flagsLength |= pCfg->cfghdr.hdr->PageLength * 4; | 5608 | flagsLength |= pCfg->cfghdr.hdr->PageLength * 4; |
5602 | 5609 | ||
5603 | dcprintk((MYIOC_s_INFO_FMT "Sending Config request type %d, page %d and action %d\n", | 5610 | dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending Config request type %d, page %d and action %d\n", |
5604 | ioc->name, pReq->Header.PageType, pReq->Header.PageNumber, pReq->Action)); | 5611 | ioc->name, pReq->Header.PageType, pReq->Header.PageNumber, pReq->Action)); |
5605 | } | 5612 | } |
5606 | 5613 | ||
@@ -5650,7 +5657,7 @@ mpt_timer_expired(unsigned long data) | |||
5650 | { | 5657 | { |
5651 | MPT_ADAPTER *ioc = (MPT_ADAPTER *) data; | 5658 | MPT_ADAPTER *ioc = (MPT_ADAPTER *) data; |
5652 | 5659 | ||
5653 | dcprintk((MYIOC_s_WARN_FMT "mpt_timer_expired! \n", ioc->name)); | 5660 | dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_timer_expired! \n", ioc->name)); |
5654 | 5661 | ||
5655 | /* Perform a FW reload */ | 5662 | /* Perform a FW reload */ |
5656 | if (mpt_HardResetHandler(ioc, NO_SLEEP) < 0) | 5663 | if (mpt_HardResetHandler(ioc, NO_SLEEP) < 0) |
@@ -5660,7 +5667,7 @@ mpt_timer_expired(unsigned long data) | |||
5660 | * Hard reset clean-up will wake up | 5667 | * Hard reset clean-up will wake up |
5661 | * process and free all resources. | 5668 | * process and free all resources. |
5662 | */ | 5669 | */ |
5663 | dcprintk((MYIOC_s_WARN_FMT "mpt_timer_expired complete!\n", ioc->name)); | 5670 | dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_timer_expired complete!\n", ioc->name)); |
5664 | 5671 | ||
5665 | return; | 5672 | return; |
5666 | } | 5673 | } |
@@ -5679,7 +5686,7 @@ mpt_ioc_reset(MPT_ADAPTER *ioc, int reset_phase) | |||
5679 | CONFIGPARMS *pCfg; | 5686 | CONFIGPARMS *pCfg; |
5680 | unsigned long flags; | 5687 | unsigned long flags; |
5681 | 5688 | ||
5682 | dprintk((KERN_WARNING MYNAM | 5689 | dprintk(ioc, printk(KERN_DEBUG MYNAM |
5683 | ": IOC %s_reset routed to MPT base driver!\n", | 5690 | ": IOC %s_reset routed to MPT base driver!\n", |
5684 | reset_phase==MPT_IOC_SETUP_RESET ? "setup" : ( | 5691 | reset_phase==MPT_IOC_SETUP_RESET ? "setup" : ( |
5685 | reset_phase==MPT_IOC_PRE_RESET ? "pre" : "post"))); | 5692 | reset_phase==MPT_IOC_PRE_RESET ? "pre" : "post"))); |
@@ -6050,7 +6057,7 @@ mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag) | |||
6050 | int rc; | 6057 | int rc; |
6051 | unsigned long flags; | 6058 | unsigned long flags; |
6052 | 6059 | ||
6053 | dtmprintk((MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name)); | 6060 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HardResetHandler Entered!\n", ioc->name)); |
6054 | #ifdef MFCNT | 6061 | #ifdef MFCNT |
6055 | printk(MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name); | 6062 | printk(MYIOC_s_INFO_FMT "HardResetHandler Entered!\n", ioc->name); |
6056 | printk("MF count 0x%x !\n", ioc->mfcnt); | 6063 | printk("MF count 0x%x !\n", ioc->mfcnt); |
@@ -6082,11 +6089,11 @@ mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag) | |||
6082 | 6089 | ||
6083 | for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) { | 6090 | for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) { |
6084 | if (MptResetHandlers[ii]) { | 6091 | if (MptResetHandlers[ii]) { |
6085 | dtmprintk((MYIOC_s_INFO_FMT "Calling IOC reset_setup handler #%d\n", | 6092 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Calling IOC reset_setup handler #%d\n", |
6086 | ioc->name, ii)); | 6093 | ioc->name, ii)); |
6087 | r += mpt_signal_reset(ii, ioc, MPT_IOC_SETUP_RESET); | 6094 | r += mpt_signal_reset(ii, ioc, MPT_IOC_SETUP_RESET); |
6088 | if (ioc->alt_ioc) { | 6095 | if (ioc->alt_ioc) { |
6089 | dtmprintk((MYIOC_s_INFO_FMT "Calling alt-%s setup reset handler #%d\n", | 6096 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Calling alt-%s setup reset handler #%d\n", |
6090 | ioc->name, ioc->alt_ioc->name, ii)); | 6097 | ioc->name, ioc->alt_ioc->name, ii)); |
6091 | r += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_SETUP_RESET); | 6098 | r += mpt_signal_reset(ii, ioc->alt_ioc, MPT_IOC_SETUP_RESET); |
6092 | } | 6099 | } |
@@ -6108,7 +6115,7 @@ mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag) | |||
6108 | ioc->alt_ioc->diagPending = 0; | 6115 | ioc->alt_ioc->diagPending = 0; |
6109 | spin_unlock_irqrestore(&ioc->diagLock, flags); | 6116 | spin_unlock_irqrestore(&ioc->diagLock, flags); |
6110 | 6117 | ||
6111 | dtmprintk((MYIOC_s_INFO_FMT "HardResetHandler rc = %d!\n", ioc->name, rc)); | 6118 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "HardResetHandler rc = %d!\n", ioc->name, rc)); |
6112 | 6119 | ||
6113 | return rc; | 6120 | return rc; |
6114 | } | 6121 | } |
@@ -6509,16 +6516,18 @@ ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply | |||
6509 | } | 6516 | } |
6510 | 6517 | ||
6511 | EventDescriptionStr(event, evData0, evStr); | 6518 | EventDescriptionStr(event, evData0, evStr); |
6512 | devtprintk((MYIOC_s_INFO_FMT "MPT event:(%02Xh) : %s\n", | 6519 | devtprintk(ioc, printk(MYIOC_s_DEBUG_FMT "MPT event:(%02Xh) : %s\n", |
6513 | ioc->name, | 6520 | ioc->name, |
6514 | event, | 6521 | event, |
6515 | evStr)); | 6522 | evStr)); |
6516 | 6523 | ||
6517 | #if defined(MPT_DEBUG) || defined(MPT_DEBUG_VERBOSE_EVENTS) | 6524 | #ifdef CONFIG_FUSION_LOGGING |
6518 | printk(KERN_INFO MYNAM ": Event data:\n" KERN_INFO); | 6525 | devtverboseprintk(ioc, printk(KERN_DEBUG MYNAM |
6526 | ": Event data:\n")); | ||
6519 | for (ii = 0; ii < evDataLen; ii++) | 6527 | for (ii = 0; ii < evDataLen; ii++) |
6520 | printk(" %08x", le32_to_cpu(pEventReply->Data[ii])); | 6528 | devtverboseprintk(ioc, printk(" %08x", |
6521 | printk("\n"); | 6529 | le32_to_cpu(pEventReply->Data[ii]))); |
6530 | devtverboseprintk(ioc, printk(KERN_DEBUG "\n")); | ||
6522 | #endif | 6531 | #endif |
6523 | 6532 | ||
6524 | /* | 6533 | /* |
@@ -6573,7 +6582,7 @@ ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply | |||
6573 | */ | 6582 | */ |
6574 | for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) { | 6583 | for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) { |
6575 | if (MptEvHandlers[ii]) { | 6584 | if (MptEvHandlers[ii]) { |
6576 | devtverboseprintk((MYIOC_s_INFO_FMT "Routing Event to event handler #%d\n", | 6585 | devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Routing Event to event handler #%d\n", |
6577 | ioc->name, ii)); | 6586 | ioc->name, ii)); |
6578 | r += (*(MptEvHandlers[ii]))(ioc, pEventReply); | 6587 | r += (*(MptEvHandlers[ii]))(ioc, pEventReply); |
6579 | handlers++; | 6588 | handlers++; |
@@ -6585,10 +6594,10 @@ ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *pEventReply | |||
6585 | * If needed, send (a single) EventAck. | 6594 | * If needed, send (a single) EventAck. |
6586 | */ | 6595 | */ |
6587 | if (pEventReply->AckRequired == MPI_EVENT_NOTIFICATION_ACK_REQUIRED) { | 6596 | if (pEventReply->AckRequired == MPI_EVENT_NOTIFICATION_ACK_REQUIRED) { |
6588 | devtverboseprintk((MYIOC_s_WARN_FMT | 6597 | devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
6589 | "EventAck required\n",ioc->name)); | 6598 | "EventAck required\n",ioc->name)); |
6590 | if ((ii = SendEventAck(ioc, pEventReply)) != 0) { | 6599 | if ((ii = SendEventAck(ioc, pEventReply)) != 0) { |
6591 | devtverboseprintk((MYIOC_s_WARN_FMT "SendEventAck returned %d\n", | 6600 | devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SendEventAck returned %d\n", |
6592 | ioc->name, ii)); | 6601 | ioc->name, ii)); |
6593 | } | 6602 | } |
6594 | } | 6603 | } |
@@ -6935,7 +6944,6 @@ union loginfo_type { | |||
6935 | sas_loginfo.dw.code, sas_loginfo.dw.subcode); | 6944 | sas_loginfo.dw.code, sas_loginfo.dw.subcode); |
6936 | } | 6945 | } |
6937 | 6946 | ||
6938 | #ifdef MPT_DEBUG_REPLY | ||
6939 | /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ | 6947 | /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ |
6940 | /** | 6948 | /** |
6941 | * mpt_iocstatus_info_config - IOCSTATUS information for config pages | 6949 | * mpt_iocstatus_info_config - IOCSTATUS information for config pages |
@@ -7240,7 +7248,6 @@ mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf) | |||
7240 | 7248 | ||
7241 | printk(MYIOC_s_INFO_FMT "IOCStatus(0x%04X): %s\n", ioc->name, status, desc); | 7249 | printk(MYIOC_s_INFO_FMT "IOCStatus(0x%04X): %s\n", ioc->name, status, desc); |
7242 | } | 7250 | } |
7243 | #endif | ||
7244 | 7251 | ||
7245 | /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ | 7252 | /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ |
7246 | EXPORT_SYMBOL(mpt_attach); | 7253 | EXPORT_SYMBOL(mpt_attach); |
@@ -7305,11 +7312,7 @@ fusion_init(void) | |||
7305 | 7312 | ||
7306 | /* Register for hard reset handling callbacks. | 7313 | /* Register for hard reset handling callbacks. |
7307 | */ | 7314 | */ |
7308 | if (mpt_reset_register(mpt_base_index, mpt_ioc_reset) == 0) { | 7315 | mpt_reset_register(mpt_base_index, mpt_ioc_reset); |
7309 | dprintk((KERN_INFO MYNAM ": Register for IOC reset notification\n")); | ||
7310 | } else { | ||
7311 | /* FIXME! */ | ||
7312 | } | ||
7313 | 7316 | ||
7314 | #ifdef CONFIG_PROC_FS | 7317 | #ifdef CONFIG_PROC_FS |
7315 | (void) procmpt_create(); | 7318 | (void) procmpt_create(); |
@@ -7328,8 +7331,6 @@ static void __exit | |||
7328 | fusion_exit(void) | 7331 | fusion_exit(void) |
7329 | { | 7332 | { |
7330 | 7333 | ||
7331 | dexitprintk((KERN_INFO MYNAM ": fusion_exit() called!\n")); | ||
7332 | |||
7333 | mpt_reset_deregister(mpt_base_index); | 7334 | mpt_reset_deregister(mpt_base_index); |
7334 | 7335 | ||
7335 | #ifdef CONFIG_PROC_FS | 7336 | #ifdef CONFIG_PROC_FS |
diff --git a/drivers/message/fusion/mptbase.h b/drivers/message/fusion/mptbase.h index 98eb9c688e17..15ff22645844 100644 --- a/drivers/message/fusion/mptbase.h +++ b/drivers/message/fusion/mptbase.h | |||
@@ -186,6 +186,7 @@ | |||
186 | * MPT drivers. NOTE: Users of these macro defs must | 186 | * MPT drivers. NOTE: Users of these macro defs must |
187 | * themselves define their own MYNAM. | 187 | * themselves define their own MYNAM. |
188 | */ | 188 | */ |
189 | #define MYIOC_s_DEBUG_FMT KERN_DEBUG MYNAM ": %s: " | ||
189 | #define MYIOC_s_INFO_FMT KERN_INFO MYNAM ": %s: " | 190 | #define MYIOC_s_INFO_FMT KERN_INFO MYNAM ": %s: " |
190 | #define MYIOC_s_NOTE_FMT KERN_NOTICE MYNAM ": %s: " | 191 | #define MYIOC_s_NOTE_FMT KERN_NOTICE MYNAM ": %s: " |
191 | #define MYIOC_s_WARN_FMT KERN_WARNING MYNAM ": %s: WARNING - " | 192 | #define MYIOC_s_WARN_FMT KERN_WARNING MYNAM ": %s: WARNING - " |
@@ -543,6 +544,7 @@ typedef struct _MPT_ADAPTER | |||
543 | char board_tracer[16]; | 544 | char board_tracer[16]; |
544 | u16 nvdata_version_persistent; | 545 | u16 nvdata_version_persistent; |
545 | u16 nvdata_version_default; | 546 | u16 nvdata_version_default; |
547 | int debug_level; | ||
546 | u8 io_missing_delay; | 548 | u8 io_missing_delay; |
547 | u8 device_missing_delay; | 549 | u8 device_missing_delay; |
548 | SYSIF_REGS __iomem *chip; /* == c8817000 (mmap) */ | 550 | SYSIF_REGS __iomem *chip; /* == c8817000 (mmap) */ |
@@ -718,171 +720,7 @@ typedef struct _mpt_sge { | |||
718 | /* | 720 | /* |
719 | * Funky (private) macros... | 721 | * Funky (private) macros... |
720 | */ | 722 | */ |
721 | #ifdef MPT_DEBUG | 723 | #include "mptdebug.h" |
722 | #define dprintk(x) printk x | ||
723 | #else | ||
724 | #define dprintk(x) | ||
725 | #endif | ||
726 | |||
727 | #ifdef MPT_DEBUG_INIT | ||
728 | #define dinitprintk(x) printk x | ||
729 | #define DBG_DUMP_FW_REQUEST_FRAME(mfp) \ | ||
730 | { int i, n = 10; \ | ||
731 | u32 *m = (u32 *)(mfp); \ | ||
732 | printk(KERN_INFO " "); \ | ||
733 | for (i=0; i<n; i++) \ | ||
734 | printk(" %08x", le32_to_cpu(m[i])); \ | ||
735 | printk("\n"); \ | ||
736 | } | ||
737 | #else | ||
738 | #define dinitprintk(x) | ||
739 | #define DBG_DUMP_FW_REQUEST_FRAME(mfp) | ||
740 | #endif | ||
741 | |||
742 | #ifdef MPT_DEBUG_EXIT | ||
743 | #define dexitprintk(x) printk x | ||
744 | #else | ||
745 | #define dexitprintk(x) | ||
746 | #endif | ||
747 | |||
748 | #if defined MPT_DEBUG_FAIL || defined (MPT_DEBUG_SG) | ||
749 | #define dfailprintk(x) printk x | ||
750 | #else | ||
751 | #define dfailprintk(x) | ||
752 | #endif | ||
753 | |||
754 | #ifdef MPT_DEBUG_HANDSHAKE | ||
755 | #define dhsprintk(x) printk x | ||
756 | #else | ||
757 | #define dhsprintk(x) | ||
758 | #endif | ||
759 | |||
760 | #if defined(MPT_DEBUG_EVENTS) || defined(MPT_DEBUG_VERBOSE_EVENTS) | ||
761 | #define devtprintk(x) printk x | ||
762 | #else | ||
763 | #define devtprintk(x) | ||
764 | #endif | ||
765 | |||
766 | #ifdef MPT_DEBUG_VERBOSE_EVENTS | ||
767 | #define devtverboseprintk(x) printk x | ||
768 | #else | ||
769 | #define devtverboseprintk(x) | ||
770 | #endif | ||
771 | |||
772 | #ifdef MPT_DEBUG_RESET | ||
773 | #define drsprintk(x) printk x | ||
774 | #else | ||
775 | #define drsprintk(x) | ||
776 | #endif | ||
777 | |||
778 | //#if defined(MPT_DEBUG) || defined(MPT_DEBUG_MSG_FRAME) | ||
779 | #if defined(MPT_DEBUG_MSG_FRAME) | ||
780 | #define dmfprintk(x) printk x | ||
781 | #define DBG_DUMP_REQUEST_FRAME(mfp) \ | ||
782 | { int i, n = 24; \ | ||
783 | u32 *m = (u32 *)(mfp); \ | ||
784 | for (i=0; i<n; i++) { \ | ||
785 | if (i && ((i%8)==0)) \ | ||
786 | printk("\n"); \ | ||
787 | printk("%08x ", le32_to_cpu(m[i])); \ | ||
788 | } \ | ||
789 | printk("\n"); \ | ||
790 | } | ||
791 | #else | ||
792 | #define dmfprintk(x) | ||
793 | #define DBG_DUMP_REQUEST_FRAME(mfp) | ||
794 | #endif | ||
795 | |||
796 | #ifdef MPT_DEBUG_IRQ | ||
797 | #define dirqprintk(x) printk x | ||
798 | #else | ||
799 | #define dirqprintk(x) | ||
800 | #endif | ||
801 | |||
802 | #ifdef MPT_DEBUG_SG | ||
803 | #define dsgprintk(x) printk x | ||
804 | #else | ||
805 | #define dsgprintk(x) | ||
806 | #endif | ||
807 | |||
808 | #if defined(MPT_DEBUG_DL) || defined(MPT_DEBUG) | ||
809 | #define ddlprintk(x) printk x | ||
810 | #else | ||
811 | #define ddlprintk(x) | ||
812 | #endif | ||
813 | |||
814 | #ifdef MPT_DEBUG_DV | ||
815 | #define ddvprintk(x) printk x | ||
816 | #else | ||
817 | #define ddvprintk(x) | ||
818 | #endif | ||
819 | |||
820 | #if defined(MPT_DEBUG_DV) || defined(MPT_DEBUG_DV_TINY) | ||
821 | #define ddvtprintk(x) printk x | ||
822 | #else | ||
823 | #define ddvtprintk(x) | ||
824 | #endif | ||
825 | |||
826 | #ifdef MPT_DEBUG_IOCTL | ||
827 | #define dctlprintk(x) printk x | ||
828 | #else | ||
829 | #define dctlprintk(x) | ||
830 | #endif | ||
831 | |||
832 | #ifdef MPT_DEBUG_REPLY | ||
833 | #define dreplyprintk(x) printk x | ||
834 | #else | ||
835 | #define dreplyprintk(x) | ||
836 | #endif | ||
837 | |||
838 | #ifdef DMPT_DEBUG_FC | ||
839 | #define dfcprintk(x) printk x | ||
840 | #else | ||
841 | #define dfcprintk(x) | ||
842 | #endif | ||
843 | |||
844 | #ifdef MPT_DEBUG_TM | ||
845 | #define dtmprintk(x) printk x | ||
846 | #define DBG_DUMP_TM_REQUEST_FRAME(mfp) \ | ||
847 | { u32 *m = (u32 *)(mfp); \ | ||
848 | int i, n = 13; \ | ||
849 | printk("TM_REQUEST:\n"); \ | ||
850 | for (i=0; i<n; i++) { \ | ||
851 | if (i && ((i%8)==0)) \ | ||
852 | printk("\n"); \ | ||
853 | printk("%08x ", le32_to_cpu(m[i])); \ | ||
854 | } \ | ||
855 | printk("\n"); \ | ||
856 | } | ||
857 | #define DBG_DUMP_TM_REPLY_FRAME(mfp) \ | ||
858 | { u32 *m = (u32 *)(mfp); \ | ||
859 | int i, n = (le32_to_cpu(m[0]) & 0x00FF0000) >> 16; \ | ||
860 | printk("TM_REPLY MessageLength=%d:\n", n); \ | ||
861 | for (i=0; i<n; i++) { \ | ||
862 | if (i && ((i%8)==0)) \ | ||
863 | printk("\n"); \ | ||
864 | printk(" %08x", le32_to_cpu(m[i])); \ | ||
865 | } \ | ||
866 | printk("\n"); \ | ||
867 | } | ||
868 | #else | ||
869 | #define dtmprintk(x) | ||
870 | #define DBG_DUMP_TM_REQUEST_FRAME(mfp) | ||
871 | #define DBG_DUMP_TM_REPLY_FRAME(mfp) | ||
872 | #endif | ||
873 | |||
874 | #if defined(MPT_DEBUG_CONFIG) || defined(MPT_DEBUG) | ||
875 | #define dcprintk(x) printk x | ||
876 | #else | ||
877 | #define dcprintk(x) | ||
878 | #endif | ||
879 | |||
880 | #if defined(MPT_DEBUG_SCSI) || defined(MPT_DEBUG) || defined(MPT_DEBUG_MSG_FRAME) | ||
881 | #define dsprintk(x) printk x | ||
882 | #else | ||
883 | #define dsprintk(x) | ||
884 | #endif | ||
885 | |||
886 | 724 | ||
887 | #define MPT_INDEX_2_MFPTR(ioc,idx) \ | 725 | #define MPT_INDEX_2_MFPTR(ioc,idx) \ |
888 | (MPT_FRAME_HDR*)( (u8*)(ioc)->req_frames + (ioc)->req_sz * (idx) ) | 726 | (MPT_FRAME_HDR*)( (u8*)(ioc)->req_frames + (ioc)->req_sz * (idx) ) |
@@ -893,36 +731,6 @@ typedef struct _mpt_sge { | |||
893 | #define MPT_INDEX_2_RFPTR(ioc,idx) \ | 731 | #define MPT_INDEX_2_RFPTR(ioc,idx) \ |
894 | (MPT_FRAME_HDR*)( (u8*)(ioc)->reply_frames + (ioc)->req_sz * (idx) ) | 732 | (MPT_FRAME_HDR*)( (u8*)(ioc)->reply_frames + (ioc)->req_sz * (idx) ) |
895 | 733 | ||
896 | #if defined(MPT_DEBUG) || defined(MPT_DEBUG_MSG_FRAME) | ||
897 | #define DBG_DUMP_REPLY_FRAME(mfp) \ | ||
898 | { u32 *m = (u32 *)(mfp); \ | ||
899 | int i, n = (le32_to_cpu(m[0]) & 0x00FF0000) >> 16; \ | ||
900 | printk(KERN_INFO " "); \ | ||
901 | for (i=0; i<n; i++) \ | ||
902 | printk(" %08x", le32_to_cpu(m[i])); \ | ||
903 | printk("\n"); \ | ||
904 | } | ||
905 | #define DBG_DUMP_REQUEST_FRAME_HDR(mfp) \ | ||
906 | { int i, n = 3; \ | ||
907 | u32 *m = (u32 *)(mfp); \ | ||
908 | printk(KERN_INFO " "); \ | ||
909 | for (i=0; i<n; i++) \ | ||
910 | printk(" %08x", le32_to_cpu(m[i])); \ | ||
911 | printk("\n"); \ | ||
912 | } | ||
913 | #else | ||
914 | #define DBG_DUMP_REPLY_FRAME(mfp) | ||
915 | #define DBG_DUMP_REQUEST_FRAME_HDR(mfp) | ||
916 | #endif | ||
917 | |||
918 | // debug sas wide ports | ||
919 | #ifdef MPT_DEBUG_SAS_WIDE | ||
920 | #define dsaswideprintk(x) printk x | ||
921 | #else | ||
922 | #define dsaswideprintk(x) | ||
923 | #endif | ||
924 | |||
925 | |||
926 | /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ | 734 | /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ |
927 | 735 | ||
928 | #define SCSI_STD_SENSE_BYTES 18 | 736 | #define SCSI_STD_SENSE_BYTES 18 |
diff --git a/drivers/message/fusion/mptctl.c b/drivers/message/fusion/mptctl.c index 58e6c319cc76..89695e705bdc 100644 --- a/drivers/message/fusion/mptctl.c +++ b/drivers/message/fusion/mptctl.c | |||
@@ -181,7 +181,7 @@ static inline int | |||
181 | mptctl_syscall_down(MPT_ADAPTER *ioc, int nonblock) | 181 | mptctl_syscall_down(MPT_ADAPTER *ioc, int nonblock) |
182 | { | 182 | { |
183 | int rc = 0; | 183 | int rc = 0; |
184 | dctlprintk((KERN_INFO MYNAM "::mptctl_syscall_down(%p,%d) called\n", ioc, nonblock)); | 184 | // dctlprintk(ioc, printk(KERN_DEBUG MYNAM "::mptctl_syscall_down(%p,%d) called\n", ioc, nonblock)); |
185 | 185 | ||
186 | if (nonblock) { | 186 | if (nonblock) { |
187 | if (!mutex_trylock(&ioc->ioctl->ioctl_mutex)) | 187 | if (!mutex_trylock(&ioc->ioctl->ioctl_mutex)) |
@@ -190,7 +190,7 @@ mptctl_syscall_down(MPT_ADAPTER *ioc, int nonblock) | |||
190 | if (mutex_lock_interruptible(&ioc->ioctl->ioctl_mutex)) | 190 | if (mutex_lock_interruptible(&ioc->ioctl->ioctl_mutex)) |
191 | rc = -ERESTARTSYS; | 191 | rc = -ERESTARTSYS; |
192 | } | 192 | } |
193 | dctlprintk((KERN_INFO MYNAM "::mptctl_syscall_down return %d\n", rc)); | 193 | // dctlprintk(ioc, printk(KERN_DEBUG MYNAM "::mptctl_syscall_down return %d\n", rc)); |
194 | return rc; | 194 | return rc; |
195 | } | 195 | } |
196 | 196 | ||
@@ -209,18 +209,19 @@ mptctl_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply) | |||
209 | u16 iocStatus; | 209 | u16 iocStatus; |
210 | u8 cmd; | 210 | u8 cmd; |
211 | 211 | ||
212 | dctlprintk(("mptctl_reply()!\n")); | ||
213 | if (req) | 212 | if (req) |
214 | cmd = req->u.hdr.Function; | 213 | cmd = req->u.hdr.Function; |
215 | else | 214 | else |
216 | return 1; | 215 | return 1; |
216 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "\tcompleting mpi function (0x%02X), req=%p, " | ||
217 | "reply=%p\n", ioc->name, req->u.hdr.Function, req, reply)); | ||
217 | 218 | ||
218 | if (ioc->ioctl) { | 219 | if (ioc->ioctl) { |
219 | 220 | ||
220 | if (reply==NULL) { | 221 | if (reply==NULL) { |
221 | 222 | ||
222 | dctlprintk(("mptctl_reply() NULL Reply " | 223 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mptctl_reply() NULL Reply " |
223 | "Function=%x!\n", cmd)); | 224 | "Function=%x!\n", ioc->name, cmd)); |
224 | 225 | ||
225 | ioc->ioctl->status |= MPT_IOCTL_STATUS_COMMAND_GOOD; | 226 | ioc->ioctl->status |= MPT_IOCTL_STATUS_COMMAND_GOOD; |
226 | ioc->ioctl->reset &= ~MPTCTL_RESET_OK; | 227 | ioc->ioctl->reset &= ~MPTCTL_RESET_OK; |
@@ -233,14 +234,9 @@ mptctl_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply) | |||
233 | 234 | ||
234 | } | 235 | } |
235 | 236 | ||
236 | dctlprintk(("mptctl_reply() with req=%p " | ||
237 | "reply=%p Function=%x!\n", req, reply, cmd)); | ||
238 | |||
239 | /* Copy the reply frame (which much exist | 237 | /* Copy the reply frame (which much exist |
240 | * for non-SCSI I/O) to the IOC structure. | 238 | * for non-SCSI I/O) to the IOC structure. |
241 | */ | 239 | */ |
242 | dctlprintk(("Copying Reply Frame @%p to ioc%d!\n", | ||
243 | reply, ioc->id)); | ||
244 | memcpy(ioc->ioctl->ReplyFrame, reply, | 240 | memcpy(ioc->ioctl->ReplyFrame, reply, |
245 | min(ioc->reply_sz, 4*reply->u.reply.MsgLength)); | 241 | min(ioc->reply_sz, 4*reply->u.reply.MsgLength)); |
246 | ioc->ioctl->status |= MPT_IOCTL_STATUS_RF_VALID; | 242 | ioc->ioctl->status |= MPT_IOCTL_STATUS_RF_VALID; |
@@ -252,8 +248,24 @@ mptctl_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply) | |||
252 | if (iocStatus == MPI_IOCSTATUS_SUCCESS) | 248 | if (iocStatus == MPI_IOCSTATUS_SUCCESS) |
253 | ioc->ioctl->status |= MPT_IOCTL_STATUS_COMMAND_GOOD; | 249 | ioc->ioctl->status |= MPT_IOCTL_STATUS_COMMAND_GOOD; |
254 | 250 | ||
251 | if (iocStatus || reply->u.reply.IOCLogInfo) | ||
252 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "\tiocstatus (0x%04X), " | ||
253 | "loginfo (0x%08X)\n", ioc->name, | ||
254 | iocStatus, | ||
255 | le32_to_cpu(reply->u.reply.IOCLogInfo))); | ||
256 | |||
255 | if ((cmd == MPI_FUNCTION_SCSI_IO_REQUEST) || | 257 | if ((cmd == MPI_FUNCTION_SCSI_IO_REQUEST) || |
256 | (cmd == MPI_FUNCTION_RAID_SCSI_IO_PASSTHROUGH)) { | 258 | (cmd == MPI_FUNCTION_RAID_SCSI_IO_PASSTHROUGH)) { |
259 | |||
260 | if (reply->u.sreply.SCSIStatus || reply->u.sreply.SCSIState) | ||
261 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT | ||
262 | "\tscsi_status (0x%02x), scsi_state (0x%02x), " | ||
263 | "tag = (0x%04x), transfer_count (0x%08x)\n", ioc->name, | ||
264 | reply->u.sreply.SCSIStatus, | ||
265 | reply->u.sreply.SCSIState, | ||
266 | le16_to_cpu(reply->u.sreply.TaskTag), | ||
267 | le32_to_cpu(reply->u.sreply.TransferCount))); | ||
268 | |||
257 | ioc->ioctl->reset &= ~MPTCTL_RESET_OK; | 269 | ioc->ioctl->reset &= ~MPTCTL_RESET_OK; |
258 | 270 | ||
259 | if ((iocStatus == MPI_IOCSTATUS_SCSI_DATA_UNDERRUN) || | 271 | if ((iocStatus == MPI_IOCSTATUS_SCSI_DATA_UNDERRUN) || |
@@ -298,8 +310,8 @@ static void mptctl_timeout_expired (MPT_IOCTL *ioctl) | |||
298 | { | 310 | { |
299 | int rc = 1; | 311 | int rc = 1; |
300 | 312 | ||
301 | dctlprintk((KERN_NOTICE MYNAM ": Timeout Expired! Host %d\n", | 313 | dctlprintk(ioctl->ioc, printk(MYIOC_s_DEBUG_FMT ": Timeout Expired! Host %d\n", |
302 | ioctl->ioc->id)); | 314 | ioctl->ioc->name, ioctl->ioc->id)); |
303 | if (ioctl == NULL) | 315 | if (ioctl == NULL) |
304 | return; | 316 | return; |
305 | 317 | ||
@@ -311,7 +323,7 @@ static void mptctl_timeout_expired (MPT_IOCTL *ioctl) | |||
311 | /* Issue a reset for this device. | 323 | /* Issue a reset for this device. |
312 | * The IOC is not responding. | 324 | * The IOC is not responding. |
313 | */ | 325 | */ |
314 | dctlprintk((MYIOC_s_INFO_FMT "Calling HardReset! \n", | 326 | dctlprintk(ioctl->ioc, printk(MYIOC_s_DEBUG_FMT "Calling HardReset! \n", |
315 | ioctl->ioc->name)); | 327 | ioctl->ioc->name)); |
316 | mpt_HardResetHandler(ioctl->ioc, CAN_SLEEP); | 328 | mpt_HardResetHandler(ioctl->ioc, CAN_SLEEP); |
317 | } | 329 | } |
@@ -350,14 +362,14 @@ static int mptctl_bus_reset(MPT_IOCTL *ioctl) | |||
350 | /* Send request | 362 | /* Send request |
351 | */ | 363 | */ |
352 | if ((mf = mpt_get_msg_frame(mptctl_id, ioctl->ioc)) == NULL) { | 364 | if ((mf = mpt_get_msg_frame(mptctl_id, ioctl->ioc)) == NULL) { |
353 | dctlprintk((MYIOC_s_WARN_FMT "IssueTaskMgmt, no msg frames!!\n", | 365 | dtmprintk(ioctl->ioc, printk(MYIOC_s_DEBUG_FMT "IssueTaskMgmt, no msg frames!!\n", |
354 | ioctl->ioc->name)); | 366 | ioctl->ioc->name)); |
355 | 367 | ||
356 | mptctl_free_tm_flags(ioctl->ioc); | 368 | mptctl_free_tm_flags(ioctl->ioc); |
357 | return -ENOMEM; | 369 | return -ENOMEM; |
358 | } | 370 | } |
359 | 371 | ||
360 | dtmprintk((MYIOC_s_INFO_FMT "IssueTaskMgmt request @ %p\n", | 372 | dtmprintk(ioctl->ioc, printk(MYIOC_s_DEBUG_FMT "IssueTaskMgmt request @ %p\n", |
361 | ioctl->ioc->name, mf)); | 373 | ioctl->ioc->name, mf)); |
362 | 374 | ||
363 | pScsiTm = (SCSITaskMgmt_t *) mf; | 375 | pScsiTm = (SCSITaskMgmt_t *) mf; |
@@ -377,15 +389,15 @@ static int mptctl_bus_reset(MPT_IOCTL *ioctl) | |||
377 | pScsiTm->Reserved2[ii] = 0; | 389 | pScsiTm->Reserved2[ii] = 0; |
378 | 390 | ||
379 | pScsiTm->TaskMsgContext = 0; | 391 | pScsiTm->TaskMsgContext = 0; |
380 | dtmprintk((MYIOC_s_INFO_FMT | 392 | dtmprintk(ioctl->ioc, printk(MYIOC_s_DEBUG_FMT |
381 | "mptctl_bus_reset: issued.\n", ioctl->ioc->name)); | 393 | "mptctl_bus_reset: issued.\n", ioctl->ioc->name)); |
382 | 394 | ||
383 | DBG_DUMP_TM_REQUEST_FRAME((u32 *)mf); | 395 | DBG_DUMP_TM_REQUEST_FRAME(ioctl->ioc, (u32 *)mf); |
384 | 396 | ||
385 | ioctl->wait_done=0; | 397 | ioctl->wait_done=0; |
386 | if ((retval = mpt_send_handshake_request(mptctl_id, ioctl->ioc, | 398 | if ((retval = mpt_send_handshake_request(mptctl_id, ioctl->ioc, |
387 | sizeof(SCSITaskMgmt_t), (u32*)pScsiTm, CAN_SLEEP)) != 0) { | 399 | sizeof(SCSITaskMgmt_t), (u32*)pScsiTm, CAN_SLEEP)) != 0) { |
388 | dfailprintk((MYIOC_s_ERR_FMT "_send_handshake FAILED!" | 400 | dfailprintk(ioctl->ioc, printk(MYIOC_s_ERR_FMT "_send_handshake FAILED!" |
389 | " (hd %p, ioc %p, mf %p) \n", hd->ioc->name, hd, | 401 | " (hd %p, ioc %p, mf %p) \n", hd->ioc->name, hd, |
390 | hd->ioc, mf)); | 402 | hd->ioc, mf)); |
391 | goto mptctl_bus_reset_done; | 403 | goto mptctl_bus_reset_done; |
@@ -456,7 +468,7 @@ static int | |||
456 | mptctl_ioc_reset(MPT_ADAPTER *ioc, int reset_phase) | 468 | mptctl_ioc_reset(MPT_ADAPTER *ioc, int reset_phase) |
457 | { | 469 | { |
458 | MPT_IOCTL *ioctl = ioc->ioctl; | 470 | MPT_IOCTL *ioctl = ioc->ioctl; |
459 | dctlprintk((KERN_INFO MYNAM ": IOC %s_reset routed to IOCTL driver!\n", | 471 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": IOC %s_reset routed to IOCTL driver!\n",ioc->name, |
460 | reset_phase==MPT_IOC_SETUP_RESET ? "setup" : ( | 472 | reset_phase==MPT_IOC_SETUP_RESET ? "setup" : ( |
461 | reset_phase==MPT_IOC_PRE_RESET ? "pre" : "post"))); | 473 | reset_phase==MPT_IOC_PRE_RESET ? "pre" : "post"))); |
462 | 474 | ||
@@ -487,7 +499,8 @@ mptctl_event_process(MPT_ADAPTER *ioc, EventNotificationReply_t *pEvReply) | |||
487 | 499 | ||
488 | event = le32_to_cpu(pEvReply->Event) & 0xFF; | 500 | event = le32_to_cpu(pEvReply->Event) & 0xFF; |
489 | 501 | ||
490 | dctlprintk(("%s() called\n", __FUNCTION__)); | 502 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "%s() called\n", |
503 | ioc->name, __FUNCTION__)); | ||
491 | if(async_queue == NULL) | 504 | if(async_queue == NULL) |
492 | return 1; | 505 | return 1; |
493 | 506 | ||
@@ -497,8 +510,10 @@ mptctl_event_process(MPT_ADAPTER *ioc, EventNotificationReply_t *pEvReply) | |||
497 | */ | 510 | */ |
498 | if (event == 0x21 ) { | 511 | if (event == 0x21 ) { |
499 | ioc->aen_event_read_flag=1; | 512 | ioc->aen_event_read_flag=1; |
500 | dctlprintk(("Raised SIGIO to application\n")); | 513 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Raised SIGIO to application\n", |
501 | devtverboseprintk(("Raised SIGIO to application\n")); | 514 | ioc->name)); |
515 | devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT | ||
516 | "Raised SIGIO to application\n", ioc->name)); | ||
502 | kill_fasync(&async_queue, SIGIO, POLL_IN); | 517 | kill_fasync(&async_queue, SIGIO, POLL_IN); |
503 | return 1; | 518 | return 1; |
504 | } | 519 | } |
@@ -515,8 +530,10 @@ mptctl_event_process(MPT_ADAPTER *ioc, EventNotificationReply_t *pEvReply) | |||
515 | */ | 530 | */ |
516 | if (ioc->events && (ioc->eventTypes & ( 1 << event))) { | 531 | if (ioc->events && (ioc->eventTypes & ( 1 << event))) { |
517 | ioc->aen_event_read_flag=1; | 532 | ioc->aen_event_read_flag=1; |
518 | dctlprintk(("Raised SIGIO to application\n")); | 533 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
519 | devtverboseprintk(("Raised SIGIO to application\n")); | 534 | "Raised SIGIO to application\n", ioc->name)); |
535 | devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT | ||
536 | "Raised SIGIO to application\n", ioc->name)); | ||
520 | kill_fasync(&async_queue, SIGIO, POLL_IN); | 537 | kill_fasync(&async_queue, SIGIO, POLL_IN); |
521 | } | 538 | } |
522 | return 1; | 539 | return 1; |
@@ -530,14 +547,12 @@ mptctl_fasync(int fd, struct file *filep, int mode) | |||
530 | list_for_each_entry(ioc, &ioc_list, list) | 547 | list_for_each_entry(ioc, &ioc_list, list) |
531 | ioc->aen_event_read_flag=0; | 548 | ioc->aen_event_read_flag=0; |
532 | 549 | ||
533 | dctlprintk(("%s() called\n", __FUNCTION__)); | ||
534 | return fasync_helper(fd, filep, mode, &async_queue); | 550 | return fasync_helper(fd, filep, mode, &async_queue); |
535 | } | 551 | } |
536 | 552 | ||
537 | static int | 553 | static int |
538 | mptctl_release(struct inode *inode, struct file *filep) | 554 | mptctl_release(struct inode *inode, struct file *filep) |
539 | { | 555 | { |
540 | dctlprintk(("%s() called\n", __FUNCTION__)); | ||
541 | return fasync_helper(-1, filep, 0, &async_queue); | 556 | return fasync_helper(-1, filep, 0, &async_queue); |
542 | } | 557 | } |
543 | 558 | ||
@@ -558,8 +573,6 @@ __mptctl_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
558 | int ret; | 573 | int ret; |
559 | MPT_ADAPTER *iocp = NULL; | 574 | MPT_ADAPTER *iocp = NULL; |
560 | 575 | ||
561 | dctlprintk(("mptctl_ioctl() called\n")); | ||
562 | |||
563 | if (copy_from_user(&khdr, uhdr, sizeof(khdr))) { | 576 | if (copy_from_user(&khdr, uhdr, sizeof(khdr))) { |
564 | printk(KERN_ERR "%s::mptctl_ioctl() @%d - " | 577 | printk(KERN_ERR "%s::mptctl_ioctl() @%d - " |
565 | "Unable to copy mpt_ioctl_header data @ %p\n", | 578 | "Unable to copy mpt_ioctl_header data @ %p\n", |
@@ -574,13 +587,13 @@ __mptctl_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
574 | iocnumX = khdr.iocnum & 0xFF; | 587 | iocnumX = khdr.iocnum & 0xFF; |
575 | if (((iocnum = mpt_verify_adapter(iocnumX, &iocp)) < 0) || | 588 | if (((iocnum = mpt_verify_adapter(iocnumX, &iocp)) < 0) || |
576 | (iocp == NULL)) { | 589 | (iocp == NULL)) { |
577 | dctlprintk((KERN_ERR "%s::mptctl_ioctl() @%d - ioc%d not found!\n", | 590 | printk(KERN_DEBUG "%s::mptctl_ioctl() @%d - ioc%d not found!\n", |
578 | __FILE__, __LINE__, iocnumX)); | 591 | __FILE__, __LINE__, iocnumX); |
579 | return -ENODEV; | 592 | return -ENODEV; |
580 | } | 593 | } |
581 | 594 | ||
582 | if (!iocp->active) { | 595 | if (!iocp->active) { |
583 | printk(KERN_ERR "%s::mptctl_ioctl() @%d - Controller disabled.\n", | 596 | printk(KERN_DEBUG "%s::mptctl_ioctl() @%d - Controller disabled.\n", |
584 | __FILE__, __LINE__); | 597 | __FILE__, __LINE__); |
585 | return -EFAULT; | 598 | return -EFAULT; |
586 | } | 599 | } |
@@ -612,8 +625,6 @@ __mptctl_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
612 | if ((ret = mptctl_syscall_down(iocp, nonblock)) != 0) | 625 | if ((ret = mptctl_syscall_down(iocp, nonblock)) != 0) |
613 | return ret; | 626 | return ret; |
614 | 627 | ||
615 | dctlprintk((MYIOC_s_INFO_FMT ": mptctl_ioctl()\n", iocp->name)); | ||
616 | |||
617 | if (cmd == MPTFWDOWNLOAD) | 628 | if (cmd == MPTFWDOWNLOAD) |
618 | ret = mptctl_fw_download(arg); | 629 | ret = mptctl_fw_download(arg); |
619 | else if (cmd == MPTCOMMAND) | 630 | else if (cmd == MPTCOMMAND) |
@@ -648,8 +659,6 @@ static int mptctl_do_reset(unsigned long arg) | |||
648 | struct mpt_ioctl_diag_reset krinfo; | 659 | struct mpt_ioctl_diag_reset krinfo; |
649 | MPT_ADAPTER *iocp; | 660 | MPT_ADAPTER *iocp; |
650 | 661 | ||
651 | dctlprintk((KERN_INFO "mptctl_do_reset called.\n")); | ||
652 | |||
653 | if (copy_from_user(&krinfo, urinfo, sizeof(struct mpt_ioctl_diag_reset))) { | 662 | if (copy_from_user(&krinfo, urinfo, sizeof(struct mpt_ioctl_diag_reset))) { |
654 | printk(KERN_ERR "%s@%d::mptctl_do_reset - " | 663 | printk(KERN_ERR "%s@%d::mptctl_do_reset - " |
655 | "Unable to copy mpt_ioctl_diag_reset struct @ %p\n", | 664 | "Unable to copy mpt_ioctl_diag_reset struct @ %p\n", |
@@ -658,11 +667,14 @@ static int mptctl_do_reset(unsigned long arg) | |||
658 | } | 667 | } |
659 | 668 | ||
660 | if (mpt_verify_adapter(krinfo.hdr.iocnum, &iocp) < 0) { | 669 | if (mpt_verify_adapter(krinfo.hdr.iocnum, &iocp) < 0) { |
661 | dctlprintk((KERN_ERR "%s@%d::mptctl_do_reset - ioc%d not found!\n", | 670 | printk(KERN_DEBUG "%s@%d::mptctl_do_reset - ioc%d not found!\n", |
662 | __FILE__, __LINE__, krinfo.hdr.iocnum)); | 671 | __FILE__, __LINE__, krinfo.hdr.iocnum); |
663 | return -ENODEV; /* (-6) No such device or address */ | 672 | return -ENODEV; /* (-6) No such device or address */ |
664 | } | 673 | } |
665 | 674 | ||
675 | dctlprintk(iocp, printk(MYIOC_s_DEBUG_FMT "mptctl_do_reset called.\n", | ||
676 | iocp->name)); | ||
677 | |||
666 | if (mpt_HardResetHandler(iocp, CAN_SLEEP) != 0) { | 678 | if (mpt_HardResetHandler(iocp, CAN_SLEEP) != 0) { |
667 | printk (KERN_ERR "%s@%d::mptctl_do_reset - reset failed.\n", | 679 | printk (KERN_ERR "%s@%d::mptctl_do_reset - reset failed.\n", |
668 | __FILE__, __LINE__); | 680 | __FILE__, __LINE__); |
@@ -695,7 +707,6 @@ mptctl_fw_download(unsigned long arg) | |||
695 | struct mpt_fw_xfer __user *ufwdl = (void __user *) arg; | 707 | struct mpt_fw_xfer __user *ufwdl = (void __user *) arg; |
696 | struct mpt_fw_xfer kfwdl; | 708 | struct mpt_fw_xfer kfwdl; |
697 | 709 | ||
698 | dctlprintk((KERN_INFO "mptctl_fwdl called. mptctl_id = %xh\n", mptctl_id)); //tc | ||
699 | if (copy_from_user(&kfwdl, ufwdl, sizeof(struct mpt_fw_xfer))) { | 710 | if (copy_from_user(&kfwdl, ufwdl, sizeof(struct mpt_fw_xfer))) { |
700 | printk(KERN_ERR "%s@%d::_ioctl_fwdl - " | 711 | printk(KERN_ERR "%s@%d::_ioctl_fwdl - " |
701 | "Unable to copy mpt_fw_xfer struct @ %p\n", | 712 | "Unable to copy mpt_fw_xfer struct @ %p\n", |
@@ -744,15 +755,8 @@ mptctl_do_fw_download(int ioc, char __user *ufwbuf, size_t fwlen) | |||
744 | u16 iocstat; | 755 | u16 iocstat; |
745 | pFWDownloadReply_t ReplyMsg = NULL; | 756 | pFWDownloadReply_t ReplyMsg = NULL; |
746 | 757 | ||
747 | dctlprintk(("mptctl_do_fwdl called. mptctl_id = %xh.\n", mptctl_id)); | ||
748 | |||
749 | dctlprintk(("DbG: kfwdl.bufp = %p\n", ufwbuf)); | ||
750 | dctlprintk(("DbG: kfwdl.fwlen = %d\n", (int)fwlen)); | ||
751 | dctlprintk(("DbG: kfwdl.ioc = %04xh\n", ioc)); | ||
752 | |||
753 | if (mpt_verify_adapter(ioc, &iocp) < 0) { | 758 | if (mpt_verify_adapter(ioc, &iocp) < 0) { |
754 | dctlprintk(("ioctl_fwdl - ioc%d not found!\n", | 759 | printk(KERN_DEBUG "ioctl_fwdl - ioc%d not found!\n", ioc); |
755 | ioc)); | ||
756 | return -ENODEV; /* (-6) No such device or address */ | 760 | return -ENODEV; /* (-6) No such device or address */ |
757 | } else { | 761 | } else { |
758 | 762 | ||
@@ -761,6 +765,16 @@ mptctl_do_fw_download(int ioc, char __user *ufwbuf, size_t fwlen) | |||
761 | if ((mf = mpt_get_msg_frame(mptctl_id, iocp)) == NULL) | 765 | if ((mf = mpt_get_msg_frame(mptctl_id, iocp)) == NULL) |
762 | return -EAGAIN; | 766 | return -EAGAIN; |
763 | } | 767 | } |
768 | |||
769 | dctlprintk(iocp, printk(MYIOC_s_DEBUG_FMT | ||
770 | "mptctl_do_fwdl called. mptctl_id = %xh.\n", iocp->name, mptctl_id)); | ||
771 | dctlprintk(iocp, printk(MYIOC_s_DEBUG_FMT "DbG: kfwdl.bufp = %p\n", | ||
772 | iocp->name, ufwbuf)); | ||
773 | dctlprintk(iocp, printk(MYIOC_s_DEBUG_FMT "DbG: kfwdl.fwlen = %d\n", | ||
774 | iocp->name, (int)fwlen)); | ||
775 | dctlprintk(iocp, printk(MYIOC_s_DEBUG_FMT "DbG: kfwdl.ioc = %04xh\n", | ||
776 | iocp->name, ioc)); | ||
777 | |||
764 | dlmsg = (FWDownload_t*) mf; | 778 | dlmsg = (FWDownload_t*) mf; |
765 | ptsge = (FWDownloadTCSGE_t *) &dlmsg->SGL; | 779 | ptsge = (FWDownloadTCSGE_t *) &dlmsg->SGL; |
766 | sgOut = (char *) (ptsge + 1); | 780 | sgOut = (char *) (ptsge + 1); |
@@ -829,7 +843,8 @@ mptctl_do_fw_download(int ioc, char __user *ufwbuf, size_t fwlen) | |||
829 | goto fwdl_out; | 843 | goto fwdl_out; |
830 | } | 844 | } |
831 | 845 | ||
832 | dctlprintk(("DbG: sgl buffer = %p, sgfrags = %d\n", sgl, numfrags)); | 846 | dctlprintk(iocp, printk(MYIOC_s_DEBUG_FMT "DbG: sgl buffer = %p, sgfrags = %d\n", |
847 | iocp->name, sgl, numfrags)); | ||
833 | 848 | ||
834 | /* | 849 | /* |
835 | * Parse SG list, copying sgl itself, | 850 | * Parse SG list, copying sgl itself, |
@@ -865,15 +880,7 @@ mptctl_do_fw_download(int ioc, char __user *ufwbuf, size_t fwlen) | |||
865 | sgOut += (sizeof(dma_addr_t) + sizeof(u32)); | 880 | sgOut += (sizeof(dma_addr_t) + sizeof(u32)); |
866 | } | 881 | } |
867 | 882 | ||
868 | #ifdef MPT_DEBUG | 883 | DBG_DUMP_FW_DOWNLOAD(iocp, (u32 *)mf, numfrags); |
869 | { | ||
870 | u32 *m = (u32 *)mf; | ||
871 | printk(KERN_INFO MYNAM ": F/W download request:\n" KERN_INFO " "); | ||
872 | for (i=0; i < 7+numfrags*2; i++) | ||
873 | printk(" %08x", le32_to_cpu(m[i])); | ||
874 | printk("\n"); | ||
875 | } | ||
876 | #endif | ||
877 | 884 | ||
878 | /* | 885 | /* |
879 | * Finally, perform firmware download. | 886 | * Finally, perform firmware download. |
@@ -1049,13 +1056,11 @@ kbuf_alloc_2_sgl(int bytes, u32 sgdir, int sge_offset, int *frags, | |||
1049 | *frags = numfrags; | 1056 | *frags = numfrags; |
1050 | *blp = buflist; | 1057 | *blp = buflist; |
1051 | 1058 | ||
1052 | dctlprintk((KERN_INFO MYNAM "-SG: kbuf_alloc_2_sgl() - " | 1059 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "-SG: kbuf_alloc_2_sgl() - " |
1053 | "%d SG frags generated!\n", | 1060 | "%d SG frags generated!\n", ioc->name, numfrags)); |
1054 | numfrags)); | ||
1055 | 1061 | ||
1056 | dctlprintk((KERN_INFO MYNAM "-SG: kbuf_alloc_2_sgl() - " | 1062 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "-SG: kbuf_alloc_2_sgl() - " |
1057 | "last (big) alloc_sz=%d\n", | 1063 | "last (big) alloc_sz=%d\n", ioc->name, alloc_sz)); |
1058 | alloc_sz)); | ||
1059 | 1064 | ||
1060 | return sglbuf; | 1065 | return sglbuf; |
1061 | 1066 | ||
@@ -1139,7 +1144,8 @@ kfree_sgl(MptSge_t *sgl, dma_addr_t sgl_dma, struct buflist *buflist, MPT_ADAPTE | |||
1139 | 1144 | ||
1140 | pci_free_consistent(ioc->pcidev, MAX_SGL_BYTES, sgl, sgl_dma); | 1145 | pci_free_consistent(ioc->pcidev, MAX_SGL_BYTES, sgl, sgl_dma); |
1141 | kfree(buflist); | 1146 | kfree(buflist); |
1142 | dctlprintk((KERN_INFO MYNAM "-SG: Free'd 1 SGL buf + %d kbufs!\n", n)); | 1147 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "-SG: Free'd 1 SGL buf + %d kbufs!\n", |
1148 | ioc->name, n)); | ||
1143 | } | 1149 | } |
1144 | 1150 | ||
1145 | /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ | 1151 | /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ |
@@ -1166,7 +1172,6 @@ mptctl_getiocinfo (unsigned long arg, unsigned int data_size) | |||
1166 | struct scsi_device *sdev; | 1172 | struct scsi_device *sdev; |
1167 | VirtDevice *vdev; | 1173 | VirtDevice *vdev; |
1168 | 1174 | ||
1169 | dctlprintk((": mptctl_getiocinfo called.\n")); | ||
1170 | /* Add of PCI INFO results in unaligned access for | 1175 | /* Add of PCI INFO results in unaligned access for |
1171 | * IA64 and Sparc. Reset long to int. Return no PCI | 1176 | * IA64 and Sparc. Reset long to int. Return no PCI |
1172 | * data for obsolete format. | 1177 | * data for obsolete format. |
@@ -1199,8 +1204,8 @@ mptctl_getiocinfo (unsigned long arg, unsigned int data_size) | |||
1199 | 1204 | ||
1200 | if (((iocnum = mpt_verify_adapter(karg->hdr.iocnum, &ioc)) < 0) || | 1205 | if (((iocnum = mpt_verify_adapter(karg->hdr.iocnum, &ioc)) < 0) || |
1201 | (ioc == NULL)) { | 1206 | (ioc == NULL)) { |
1202 | dctlprintk((KERN_ERR "%s::mptctl_getiocinfo() @%d - ioc%d not found!\n", | 1207 | printk(KERN_DEBUG "%s::mptctl_getiocinfo() @%d - ioc%d not found!\n", |
1203 | __FILE__, __LINE__, iocnum)); | 1208 | __FILE__, __LINE__, iocnum); |
1204 | kfree(karg); | 1209 | kfree(karg); |
1205 | return -ENODEV; | 1210 | return -ENODEV; |
1206 | } | 1211 | } |
@@ -1214,6 +1219,9 @@ mptctl_getiocinfo (unsigned long arg, unsigned int data_size) | |||
1214 | return -EFAULT; | 1219 | return -EFAULT; |
1215 | } | 1220 | } |
1216 | 1221 | ||
1222 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mptctl_getiocinfo called.\n", | ||
1223 | ioc->name)); | ||
1224 | |||
1217 | /* Fill in the data and return the structure to the calling | 1225 | /* Fill in the data and return the structure to the calling |
1218 | * program | 1226 | * program |
1219 | */ | 1227 | */ |
@@ -1320,7 +1328,6 @@ mptctl_gettargetinfo (unsigned long arg) | |||
1320 | u8 port; | 1328 | u8 port; |
1321 | struct scsi_device *sdev; | 1329 | struct scsi_device *sdev; |
1322 | 1330 | ||
1323 | dctlprintk(("mptctl_gettargetinfo called.\n")); | ||
1324 | if (copy_from_user(&karg, uarg, sizeof(struct mpt_ioctl_targetinfo))) { | 1331 | if (copy_from_user(&karg, uarg, sizeof(struct mpt_ioctl_targetinfo))) { |
1325 | printk(KERN_ERR "%s@%d::mptctl_gettargetinfo - " | 1332 | printk(KERN_ERR "%s@%d::mptctl_gettargetinfo - " |
1326 | "Unable to read in mpt_ioctl_targetinfo struct @ %p\n", | 1333 | "Unable to read in mpt_ioctl_targetinfo struct @ %p\n", |
@@ -1330,11 +1337,13 @@ mptctl_gettargetinfo (unsigned long arg) | |||
1330 | 1337 | ||
1331 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || | 1338 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || |
1332 | (ioc == NULL)) { | 1339 | (ioc == NULL)) { |
1333 | dctlprintk((KERN_ERR "%s::mptctl_gettargetinfo() @%d - ioc%d not found!\n", | 1340 | printk(KERN_DEBUG "%s::mptctl_gettargetinfo() @%d - ioc%d not found!\n", |
1334 | __FILE__, __LINE__, iocnum)); | 1341 | __FILE__, __LINE__, iocnum); |
1335 | return -ENODEV; | 1342 | return -ENODEV; |
1336 | } | 1343 | } |
1337 | 1344 | ||
1345 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mptctl_gettargetinfo called.\n", | ||
1346 | ioc->name)); | ||
1338 | /* Get the port number and set the maximum number of bytes | 1347 | /* Get the port number and set the maximum number of bytes |
1339 | * in the returned structure. | 1348 | * in the returned structure. |
1340 | * Ignore the port setting. | 1349 | * Ignore the port setting. |
@@ -1434,7 +1443,6 @@ mptctl_readtest (unsigned long arg) | |||
1434 | MPT_ADAPTER *ioc; | 1443 | MPT_ADAPTER *ioc; |
1435 | int iocnum; | 1444 | int iocnum; |
1436 | 1445 | ||
1437 | dctlprintk(("mptctl_readtest called.\n")); | ||
1438 | if (copy_from_user(&karg, uarg, sizeof(struct mpt_ioctl_test))) { | 1446 | if (copy_from_user(&karg, uarg, sizeof(struct mpt_ioctl_test))) { |
1439 | printk(KERN_ERR "%s@%d::mptctl_readtest - " | 1447 | printk(KERN_ERR "%s@%d::mptctl_readtest - " |
1440 | "Unable to read in mpt_ioctl_test struct @ %p\n", | 1448 | "Unable to read in mpt_ioctl_test struct @ %p\n", |
@@ -1444,11 +1452,13 @@ mptctl_readtest (unsigned long arg) | |||
1444 | 1452 | ||
1445 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || | 1453 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || |
1446 | (ioc == NULL)) { | 1454 | (ioc == NULL)) { |
1447 | dctlprintk((KERN_ERR "%s::mptctl_readtest() @%d - ioc%d not found!\n", | 1455 | printk(KERN_DEBUG "%s::mptctl_readtest() @%d - ioc%d not found!\n", |
1448 | __FILE__, __LINE__, iocnum)); | 1456 | __FILE__, __LINE__, iocnum); |
1449 | return -ENODEV; | 1457 | return -ENODEV; |
1450 | } | 1458 | } |
1451 | 1459 | ||
1460 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mptctl_readtest called.\n", | ||
1461 | ioc->name)); | ||
1452 | /* Fill in the data and return the structure to the calling | 1462 | /* Fill in the data and return the structure to the calling |
1453 | * program | 1463 | * program |
1454 | */ | 1464 | */ |
@@ -1494,7 +1504,6 @@ mptctl_eventquery (unsigned long arg) | |||
1494 | MPT_ADAPTER *ioc; | 1504 | MPT_ADAPTER *ioc; |
1495 | int iocnum; | 1505 | int iocnum; |
1496 | 1506 | ||
1497 | dctlprintk(("mptctl_eventquery called.\n")); | ||
1498 | if (copy_from_user(&karg, uarg, sizeof(struct mpt_ioctl_eventquery))) { | 1507 | if (copy_from_user(&karg, uarg, sizeof(struct mpt_ioctl_eventquery))) { |
1499 | printk(KERN_ERR "%s@%d::mptctl_eventquery - " | 1508 | printk(KERN_ERR "%s@%d::mptctl_eventquery - " |
1500 | "Unable to read in mpt_ioctl_eventquery struct @ %p\n", | 1509 | "Unable to read in mpt_ioctl_eventquery struct @ %p\n", |
@@ -1504,11 +1513,13 @@ mptctl_eventquery (unsigned long arg) | |||
1504 | 1513 | ||
1505 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || | 1514 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || |
1506 | (ioc == NULL)) { | 1515 | (ioc == NULL)) { |
1507 | dctlprintk((KERN_ERR "%s::mptctl_eventquery() @%d - ioc%d not found!\n", | 1516 | printk(KERN_DEBUG "%s::mptctl_eventquery() @%d - ioc%d not found!\n", |
1508 | __FILE__, __LINE__, iocnum)); | 1517 | __FILE__, __LINE__, iocnum); |
1509 | return -ENODEV; | 1518 | return -ENODEV; |
1510 | } | 1519 | } |
1511 | 1520 | ||
1521 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mptctl_eventquery called.\n", | ||
1522 | ioc->name)); | ||
1512 | karg.eventEntries = MPTCTL_EVENT_LOG_SIZE; | 1523 | karg.eventEntries = MPTCTL_EVENT_LOG_SIZE; |
1513 | karg.eventTypes = ioc->eventTypes; | 1524 | karg.eventTypes = ioc->eventTypes; |
1514 | 1525 | ||
@@ -1532,7 +1543,6 @@ mptctl_eventenable (unsigned long arg) | |||
1532 | MPT_ADAPTER *ioc; | 1543 | MPT_ADAPTER *ioc; |
1533 | int iocnum; | 1544 | int iocnum; |
1534 | 1545 | ||
1535 | dctlprintk(("mptctl_eventenable called.\n")); | ||
1536 | if (copy_from_user(&karg, uarg, sizeof(struct mpt_ioctl_eventenable))) { | 1546 | if (copy_from_user(&karg, uarg, sizeof(struct mpt_ioctl_eventenable))) { |
1537 | printk(KERN_ERR "%s@%d::mptctl_eventenable - " | 1547 | printk(KERN_ERR "%s@%d::mptctl_eventenable - " |
1538 | "Unable to read in mpt_ioctl_eventenable struct @ %p\n", | 1548 | "Unable to read in mpt_ioctl_eventenable struct @ %p\n", |
@@ -1542,11 +1552,13 @@ mptctl_eventenable (unsigned long arg) | |||
1542 | 1552 | ||
1543 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || | 1553 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || |
1544 | (ioc == NULL)) { | 1554 | (ioc == NULL)) { |
1545 | dctlprintk((KERN_ERR "%s::mptctl_eventenable() @%d - ioc%d not found!\n", | 1555 | printk(KERN_DEBUG "%s::mptctl_eventenable() @%d - ioc%d not found!\n", |
1546 | __FILE__, __LINE__, iocnum)); | 1556 | __FILE__, __LINE__, iocnum); |
1547 | return -ENODEV; | 1557 | return -ENODEV; |
1548 | } | 1558 | } |
1549 | 1559 | ||
1560 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mptctl_eventenable called.\n", | ||
1561 | ioc->name)); | ||
1550 | if (ioc->events == NULL) { | 1562 | if (ioc->events == NULL) { |
1551 | /* Have not yet allocated memory - do so now. | 1563 | /* Have not yet allocated memory - do so now. |
1552 | */ | 1564 | */ |
@@ -1579,7 +1591,6 @@ mptctl_eventreport (unsigned long arg) | |||
1579 | int iocnum; | 1591 | int iocnum; |
1580 | int numBytes, maxEvents, max; | 1592 | int numBytes, maxEvents, max; |
1581 | 1593 | ||
1582 | dctlprintk(("mptctl_eventreport called.\n")); | ||
1583 | if (copy_from_user(&karg, uarg, sizeof(struct mpt_ioctl_eventreport))) { | 1594 | if (copy_from_user(&karg, uarg, sizeof(struct mpt_ioctl_eventreport))) { |
1584 | printk(KERN_ERR "%s@%d::mptctl_eventreport - " | 1595 | printk(KERN_ERR "%s@%d::mptctl_eventreport - " |
1585 | "Unable to read in mpt_ioctl_eventreport struct @ %p\n", | 1596 | "Unable to read in mpt_ioctl_eventreport struct @ %p\n", |
@@ -1589,10 +1600,12 @@ mptctl_eventreport (unsigned long arg) | |||
1589 | 1600 | ||
1590 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || | 1601 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || |
1591 | (ioc == NULL)) { | 1602 | (ioc == NULL)) { |
1592 | dctlprintk((KERN_ERR "%s::mptctl_eventreport() @%d - ioc%d not found!\n", | 1603 | printk(KERN_DEBUG "%s::mptctl_eventreport() @%d - ioc%d not found!\n", |
1593 | __FILE__, __LINE__, iocnum)); | 1604 | __FILE__, __LINE__, iocnum); |
1594 | return -ENODEV; | 1605 | return -ENODEV; |
1595 | } | 1606 | } |
1607 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mptctl_eventreport called.\n", | ||
1608 | ioc->name)); | ||
1596 | 1609 | ||
1597 | numBytes = karg.hdr.maxDataSize - sizeof(mpt_ioctl_header); | 1610 | numBytes = karg.hdr.maxDataSize - sizeof(mpt_ioctl_header); |
1598 | maxEvents = numBytes/sizeof(MPT_IOCTL_EVENTS); | 1611 | maxEvents = numBytes/sizeof(MPT_IOCTL_EVENTS); |
@@ -1632,7 +1645,6 @@ mptctl_replace_fw (unsigned long arg) | |||
1632 | int iocnum; | 1645 | int iocnum; |
1633 | int newFwSize; | 1646 | int newFwSize; |
1634 | 1647 | ||
1635 | dctlprintk(("mptctl_replace_fw called.\n")); | ||
1636 | if (copy_from_user(&karg, uarg, sizeof(struct mpt_ioctl_replace_fw))) { | 1648 | if (copy_from_user(&karg, uarg, sizeof(struct mpt_ioctl_replace_fw))) { |
1637 | printk(KERN_ERR "%s@%d::mptctl_replace_fw - " | 1649 | printk(KERN_ERR "%s@%d::mptctl_replace_fw - " |
1638 | "Unable to read in mpt_ioctl_replace_fw struct @ %p\n", | 1650 | "Unable to read in mpt_ioctl_replace_fw struct @ %p\n", |
@@ -1642,11 +1654,13 @@ mptctl_replace_fw (unsigned long arg) | |||
1642 | 1654 | ||
1643 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || | 1655 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || |
1644 | (ioc == NULL)) { | 1656 | (ioc == NULL)) { |
1645 | dctlprintk((KERN_ERR "%s::mptctl_replace_fw() @%d - ioc%d not found!\n", | 1657 | printk(KERN_DEBUG "%s::mptctl_replace_fw() @%d - ioc%d not found!\n", |
1646 | __FILE__, __LINE__, iocnum)); | 1658 | __FILE__, __LINE__, iocnum); |
1647 | return -ENODEV; | 1659 | return -ENODEV; |
1648 | } | 1660 | } |
1649 | 1661 | ||
1662 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mptctl_replace_fw called.\n", | ||
1663 | ioc->name)); | ||
1650 | /* If caching FW, Free the old FW image | 1664 | /* If caching FW, Free the old FW image |
1651 | */ | 1665 | */ |
1652 | if (ioc->cached_fw == NULL) | 1666 | if (ioc->cached_fw == NULL) |
@@ -1704,7 +1718,6 @@ mptctl_mpt_command (unsigned long arg) | |||
1704 | int iocnum; | 1718 | int iocnum; |
1705 | int rc; | 1719 | int rc; |
1706 | 1720 | ||
1707 | dctlprintk(("mptctl_command called.\n")); | ||
1708 | 1721 | ||
1709 | if (copy_from_user(&karg, uarg, sizeof(struct mpt_ioctl_command))) { | 1722 | if (copy_from_user(&karg, uarg, sizeof(struct mpt_ioctl_command))) { |
1710 | printk(KERN_ERR "%s@%d::mptctl_mpt_command - " | 1723 | printk(KERN_ERR "%s@%d::mptctl_mpt_command - " |
@@ -1715,8 +1728,8 @@ mptctl_mpt_command (unsigned long arg) | |||
1715 | 1728 | ||
1716 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || | 1729 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || |
1717 | (ioc == NULL)) { | 1730 | (ioc == NULL)) { |
1718 | dctlprintk((KERN_ERR "%s::mptctl_mpt_command() @%d - ioc%d not found!\n", | 1731 | printk(KERN_DEBUG "%s::mptctl_mpt_command() @%d - ioc%d not found!\n", |
1719 | __FILE__, __LINE__, iocnum)); | 1732 | __FILE__, __LINE__, iocnum); |
1720 | return -ENODEV; | 1733 | return -ENODEV; |
1721 | } | 1734 | } |
1722 | 1735 | ||
@@ -1756,13 +1769,12 @@ mptctl_do_mpt_command (struct mpt_ioctl_command karg, void __user *mfPtr) | |||
1756 | ulong timeout; | 1769 | ulong timeout; |
1757 | struct scsi_device *sdev; | 1770 | struct scsi_device *sdev; |
1758 | 1771 | ||
1759 | dctlprintk(("mptctl_do_mpt_command called.\n")); | ||
1760 | bufIn.kptr = bufOut.kptr = NULL; | 1772 | bufIn.kptr = bufOut.kptr = NULL; |
1761 | 1773 | ||
1762 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || | 1774 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || |
1763 | (ioc == NULL)) { | 1775 | (ioc == NULL)) { |
1764 | dctlprintk((KERN_ERR "%s::mptctl_do_mpt_command() @%d - ioc%d not found!\n", | 1776 | printk(KERN_DEBUG "%s::mptctl_do_mpt_command() @%d - ioc%d not found!\n", |
1765 | __FILE__, __LINE__, iocnum)); | 1777 | __FILE__, __LINE__, iocnum); |
1766 | return -ENODEV; | 1778 | return -ENODEV; |
1767 | } | 1779 | } |
1768 | if (!ioc->ioctl) { | 1780 | if (!ioc->ioctl) { |
@@ -1816,6 +1828,9 @@ mptctl_do_mpt_command (struct mpt_ioctl_command karg, void __user *mfPtr) | |||
1816 | 1828 | ||
1817 | /* Verify that this request is allowed. | 1829 | /* Verify that this request is allowed. |
1818 | */ | 1830 | */ |
1831 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "sending mpi function (0x%02X), req=%p\n", | ||
1832 | ioc->name, hdr->Function, mf)); | ||
1833 | |||
1819 | switch (hdr->Function) { | 1834 | switch (hdr->Function) { |
1820 | case MPI_FUNCTION_IOC_FACTS: | 1835 | case MPI_FUNCTION_IOC_FACTS: |
1821 | case MPI_FUNCTION_PORT_FACTS: | 1836 | case MPI_FUNCTION_PORT_FACTS: |
@@ -1823,6 +1838,18 @@ mptctl_do_mpt_command (struct mpt_ioctl_command karg, void __user *mfPtr) | |||
1823 | break; | 1838 | break; |
1824 | 1839 | ||
1825 | case MPI_FUNCTION_CONFIG: | 1840 | case MPI_FUNCTION_CONFIG: |
1841 | { | ||
1842 | Config_t *config_frame; | ||
1843 | config_frame = (Config_t *)mf; | ||
1844 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "\ttype=0x%02x ext_type=0x%02x " | ||
1845 | "number=0x%02x action=0x%02x\n", ioc->name, | ||
1846 | config_frame->Header.PageType, | ||
1847 | config_frame->ExtPageType, | ||
1848 | config_frame->Header.PageNumber, | ||
1849 | config_frame->Action)); | ||
1850 | break; | ||
1851 | } | ||
1852 | |||
1826 | case MPI_FUNCTION_FC_COMMON_TRANSPORT_SEND: | 1853 | case MPI_FUNCTION_FC_COMMON_TRANSPORT_SEND: |
1827 | case MPI_FUNCTION_FC_EX_LINK_SRVC_SEND: | 1854 | case MPI_FUNCTION_FC_EX_LINK_SRVC_SEND: |
1828 | case MPI_FUNCTION_FW_UPLOAD: | 1855 | case MPI_FUNCTION_FW_UPLOAD: |
@@ -2158,12 +2185,12 @@ mptctl_do_mpt_command (struct mpt_ioctl_command karg, void __user *mfPtr) | |||
2158 | ioc->ioctl->wait_done = 0; | 2185 | ioc->ioctl->wait_done = 0; |
2159 | if (hdr->Function == MPI_FUNCTION_SCSI_TASK_MGMT) { | 2186 | if (hdr->Function == MPI_FUNCTION_SCSI_TASK_MGMT) { |
2160 | 2187 | ||
2161 | DBG_DUMP_TM_REQUEST_FRAME((u32 *)mf); | 2188 | DBG_DUMP_TM_REQUEST_FRAME(ioc, (u32 *)mf); |
2162 | 2189 | ||
2163 | if (mpt_send_handshake_request(mptctl_id, ioc, | 2190 | if (mpt_send_handshake_request(mptctl_id, ioc, |
2164 | sizeof(SCSITaskMgmt_t), (u32*)mf, | 2191 | sizeof(SCSITaskMgmt_t), (u32*)mf, |
2165 | CAN_SLEEP) != 0) { | 2192 | CAN_SLEEP) != 0) { |
2166 | dfailprintk((MYIOC_s_ERR_FMT "_send_handshake FAILED!" | 2193 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT "_send_handshake FAILED!" |
2167 | " (ioc %p, mf %p) \n", ioc->name, | 2194 | " (ioc %p, mf %p) \n", ioc->name, |
2168 | ioc, mf)); | 2195 | ioc, mf)); |
2169 | mptctl_free_tm_flags(ioc); | 2196 | mptctl_free_tm_flags(ioc); |
@@ -2303,7 +2330,6 @@ mptctl_hp_hostinfo(unsigned long arg, unsigned int data_size) | |||
2303 | MPT_FRAME_HDR *mf = NULL; | 2330 | MPT_FRAME_HDR *mf = NULL; |
2304 | MPIHeader_t *mpi_hdr; | 2331 | MPIHeader_t *mpi_hdr; |
2305 | 2332 | ||
2306 | dctlprintk((": mptctl_hp_hostinfo called.\n")); | ||
2307 | /* Reset long to int. Should affect IA64 and SPARC only | 2333 | /* Reset long to int. Should affect IA64 and SPARC only |
2308 | */ | 2334 | */ |
2309 | if (data_size == sizeof(hp_host_info_t)) | 2335 | if (data_size == sizeof(hp_host_info_t)) |
@@ -2322,10 +2348,12 @@ mptctl_hp_hostinfo(unsigned long arg, unsigned int data_size) | |||
2322 | 2348 | ||
2323 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || | 2349 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || |
2324 | (ioc == NULL)) { | 2350 | (ioc == NULL)) { |
2325 | dctlprintk((KERN_ERR "%s::mptctl_hp_hostinfo() @%d - ioc%d not found!\n", | 2351 | printk(KERN_DEBUG "%s::mptctl_hp_hostinfo() @%d - ioc%d not found!\n", |
2326 | __FILE__, __LINE__, iocnum)); | 2352 | __FILE__, __LINE__, iocnum); |
2327 | return -ENODEV; | 2353 | return -ENODEV; |
2328 | } | 2354 | } |
2355 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": mptctl_hp_hostinfo called.\n", | ||
2356 | ioc->name)); | ||
2329 | 2357 | ||
2330 | /* Fill in the data and return the structure to the calling | 2358 | /* Fill in the data and return the structure to the calling |
2331 | * program | 2359 | * program |
@@ -2441,7 +2469,7 @@ mptctl_hp_hostinfo(unsigned long arg, unsigned int data_size) | |||
2441 | * Gather ISTWI(Industry Standard Two Wire Interface) Data | 2469 | * Gather ISTWI(Industry Standard Two Wire Interface) Data |
2442 | */ | 2470 | */ |
2443 | if ((mf = mpt_get_msg_frame(mptctl_id, ioc)) == NULL) { | 2471 | if ((mf = mpt_get_msg_frame(mptctl_id, ioc)) == NULL) { |
2444 | dfailprintk((MYIOC_s_WARN_FMT "%s, no msg frames!!\n", | 2472 | dfailprintk(ioc, printk(MYIOC_s_WARN_FMT "%s, no msg frames!!\n", |
2445 | ioc->name,__FUNCTION__)); | 2473 | ioc->name,__FUNCTION__)); |
2446 | goto out; | 2474 | goto out; |
2447 | } | 2475 | } |
@@ -2474,7 +2502,7 @@ mptctl_hp_hostinfo(unsigned long arg, unsigned int data_size) | |||
2474 | HZ*MPT_IOCTL_DEFAULT_TIMEOUT /* 10 sec */); | 2502 | HZ*MPT_IOCTL_DEFAULT_TIMEOUT /* 10 sec */); |
2475 | 2503 | ||
2476 | if(rc <=0 && (ioc->ioctl->wait_done != 1 )) { | 2504 | if(rc <=0 && (ioc->ioctl->wait_done != 1 )) { |
2477 | /* | 2505 | /* |
2478 | * Now we need to reset the board | 2506 | * Now we need to reset the board |
2479 | */ | 2507 | */ |
2480 | mpt_free_msg_frame(ioc, mf); | 2508 | mpt_free_msg_frame(ioc, mf); |
@@ -2482,7 +2510,7 @@ mptctl_hp_hostinfo(unsigned long arg, unsigned int data_size) | |||
2482 | goto out; | 2510 | goto out; |
2483 | } | 2511 | } |
2484 | 2512 | ||
2485 | /* | 2513 | /* |
2486 | *ISTWI Data Definition | 2514 | *ISTWI Data Definition |
2487 | * pbuf[0] = FW_VERSION = 0x4 | 2515 | * pbuf[0] = FW_VERSION = 0x4 |
2488 | * pbuf[1] = Bay Count = 6 or 4 or 2, depending on | 2516 | * pbuf[1] = Bay Count = 6 or 4 or 2, depending on |
@@ -2538,7 +2566,6 @@ mptctl_hp_targetinfo(unsigned long arg) | |||
2538 | ConfigPageHeader_t hdr; | 2566 | ConfigPageHeader_t hdr; |
2539 | int tmp, np, rc = 0; | 2567 | int tmp, np, rc = 0; |
2540 | 2568 | ||
2541 | dctlprintk((": mptctl_hp_targetinfo called.\n")); | ||
2542 | if (copy_from_user(&karg, uarg, sizeof(hp_target_info_t))) { | 2569 | if (copy_from_user(&karg, uarg, sizeof(hp_target_info_t))) { |
2543 | printk(KERN_ERR "%s@%d::mptctl_hp_targetinfo - " | 2570 | printk(KERN_ERR "%s@%d::mptctl_hp_targetinfo - " |
2544 | "Unable to read in hp_host_targetinfo struct @ %p\n", | 2571 | "Unable to read in hp_host_targetinfo struct @ %p\n", |
@@ -2548,10 +2575,12 @@ mptctl_hp_targetinfo(unsigned long arg) | |||
2548 | 2575 | ||
2549 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || | 2576 | if (((iocnum = mpt_verify_adapter(karg.hdr.iocnum, &ioc)) < 0) || |
2550 | (ioc == NULL)) { | 2577 | (ioc == NULL)) { |
2551 | dctlprintk((KERN_ERR "%s::mptctl_hp_targetinfo() @%d - ioc%d not found!\n", | 2578 | printk(KERN_DEBUG "%s::mptctl_hp_targetinfo() @%d - ioc%d not found!\n", |
2552 | __FILE__, __LINE__, iocnum)); | 2579 | __FILE__, __LINE__, iocnum); |
2553 | return -ENODEV; | 2580 | return -ENODEV; |
2554 | } | 2581 | } |
2582 | dctlprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": mptctl_hp_targetinfo called.\n", | ||
2583 | ioc->name)); | ||
2555 | 2584 | ||
2556 | /* There is nothing to do for FCP parts. | 2585 | /* There is nothing to do for FCP parts. |
2557 | */ | 2586 | */ |
@@ -2694,7 +2723,6 @@ compat_mptfwxfer_ioctl(struct file *filp, unsigned int cmd, | |||
2694 | int nonblock = (filp->f_flags & O_NONBLOCK); | 2723 | int nonblock = (filp->f_flags & O_NONBLOCK); |
2695 | int ret; | 2724 | int ret; |
2696 | 2725 | ||
2697 | dctlprintk((KERN_INFO MYNAM "::compat_mptfwxfer_ioctl() called\n")); | ||
2698 | 2726 | ||
2699 | if (copy_from_user(&kfw32, (char __user *)arg, sizeof(kfw32))) | 2727 | if (copy_from_user(&kfw32, (char __user *)arg, sizeof(kfw32))) |
2700 | return -EFAULT; | 2728 | return -EFAULT; |
@@ -2703,14 +2731,16 @@ compat_mptfwxfer_ioctl(struct file *filp, unsigned int cmd, | |||
2703 | iocnumX = kfw32.iocnum & 0xFF; | 2731 | iocnumX = kfw32.iocnum & 0xFF; |
2704 | if (((iocnum = mpt_verify_adapter(iocnumX, &iocp)) < 0) || | 2732 | if (((iocnum = mpt_verify_adapter(iocnumX, &iocp)) < 0) || |
2705 | (iocp == NULL)) { | 2733 | (iocp == NULL)) { |
2706 | dctlprintk((KERN_ERR MYNAM "::compat_mptfwxfer_ioctl @%d - ioc%d not found!\n", | 2734 | printk(KERN_DEBUG MYNAM "::compat_mptfwxfer_ioctl @%d - ioc%d not found!\n", |
2707 | __LINE__, iocnumX)); | 2735 | __LINE__, iocnumX); |
2708 | return -ENODEV; | 2736 | return -ENODEV; |
2709 | } | 2737 | } |
2710 | 2738 | ||
2711 | if ((ret = mptctl_syscall_down(iocp, nonblock)) != 0) | 2739 | if ((ret = mptctl_syscall_down(iocp, nonblock)) != 0) |
2712 | return ret; | 2740 | return ret; |
2713 | 2741 | ||
2742 | dctlprintk(iocp, printk(MYIOC_s_DEBUG_FMT "compat_mptfwxfer_ioctl() called\n", | ||
2743 | iocp->name)); | ||
2714 | kfw.iocnum = iocnum; | 2744 | kfw.iocnum = iocnum; |
2715 | kfw.fwlen = kfw32.fwlen; | 2745 | kfw.fwlen = kfw32.fwlen; |
2716 | kfw.bufp = compat_ptr(kfw32.bufp); | 2746 | kfw.bufp = compat_ptr(kfw32.bufp); |
@@ -2734,8 +2764,6 @@ compat_mpt_command(struct file *filp, unsigned int cmd, | |||
2734 | int nonblock = (filp->f_flags & O_NONBLOCK); | 2764 | int nonblock = (filp->f_flags & O_NONBLOCK); |
2735 | int ret; | 2765 | int ret; |
2736 | 2766 | ||
2737 | dctlprintk((KERN_INFO MYNAM "::compat_mpt_command() called\n")); | ||
2738 | |||
2739 | if (copy_from_user(&karg32, (char __user *)arg, sizeof(karg32))) | 2767 | if (copy_from_user(&karg32, (char __user *)arg, sizeof(karg32))) |
2740 | return -EFAULT; | 2768 | return -EFAULT; |
2741 | 2769 | ||
@@ -2743,14 +2771,16 @@ compat_mpt_command(struct file *filp, unsigned int cmd, | |||
2743 | iocnumX = karg32.hdr.iocnum & 0xFF; | 2771 | iocnumX = karg32.hdr.iocnum & 0xFF; |
2744 | if (((iocnum = mpt_verify_adapter(iocnumX, &iocp)) < 0) || | 2772 | if (((iocnum = mpt_verify_adapter(iocnumX, &iocp)) < 0) || |
2745 | (iocp == NULL)) { | 2773 | (iocp == NULL)) { |
2746 | dctlprintk((KERN_ERR MYNAM "::compat_mpt_command @%d - ioc%d not found!\n", | 2774 | printk(KERN_DEBUG MYNAM "::compat_mpt_command @%d - ioc%d not found!\n", |
2747 | __LINE__, iocnumX)); | 2775 | __LINE__, iocnumX); |
2748 | return -ENODEV; | 2776 | return -ENODEV; |
2749 | } | 2777 | } |
2750 | 2778 | ||
2751 | if ((ret = mptctl_syscall_down(iocp, nonblock)) != 0) | 2779 | if ((ret = mptctl_syscall_down(iocp, nonblock)) != 0) |
2752 | return ret; | 2780 | return ret; |
2753 | 2781 | ||
2782 | dctlprintk(iocp, printk(MYIOC_s_DEBUG_FMT "compat_mpt_command() called\n", | ||
2783 | iocp->name)); | ||
2754 | /* Copy data to karg */ | 2784 | /* Copy data to karg */ |
2755 | karg.hdr.iocnum = karg32.hdr.iocnum; | 2785 | karg.hdr.iocnum = karg32.hdr.iocnum; |
2756 | karg.hdr.port = karg32.hdr.port; | 2786 | karg.hdr.port = karg32.hdr.port; |
@@ -2878,11 +2908,7 @@ static int __init mptctl_init(void) | |||
2878 | 2908 | ||
2879 | show_mptmod_ver(my_NAME, my_VERSION); | 2909 | show_mptmod_ver(my_NAME, my_VERSION); |
2880 | 2910 | ||
2881 | if(mpt_device_driver_register(&mptctl_driver, | 2911 | mpt_device_driver_register(&mptctl_driver, MPTCTL_DRIVER); |
2882 | MPTCTL_DRIVER) != 0 ) { | ||
2883 | dprintk((KERN_INFO MYNAM | ||
2884 | ": failed to register dd callbacks\n")); | ||
2885 | } | ||
2886 | 2912 | ||
2887 | /* Register this device */ | 2913 | /* Register this device */ |
2888 | err = misc_register(&mptctl_miscdev); | 2914 | err = misc_register(&mptctl_miscdev); |
@@ -2905,16 +2931,8 @@ static int __init mptctl_init(void) | |||
2905 | goto out_fail; | 2931 | goto out_fail; |
2906 | } | 2932 | } |
2907 | 2933 | ||
2908 | if (mpt_reset_register(mptctl_id, mptctl_ioc_reset) == 0) { | 2934 | mpt_reset_register(mptctl_id, mptctl_ioc_reset); |
2909 | dprintk((KERN_INFO MYNAM ": Registered for IOC reset notifications\n")); | 2935 | mpt_event_register(mptctl_id, mptctl_event_process); |
2910 | } else { | ||
2911 | /* FIXME! */ | ||
2912 | } | ||
2913 | |||
2914 | if (mpt_event_register(mptctl_id, mptctl_event_process) == 0) { | ||
2915 | devtverboseprintk((KERN_INFO MYNAM | ||
2916 | ": Registered for IOC event notifications\n")); | ||
2917 | } | ||
2918 | 2936 | ||
2919 | return 0; | 2937 | return 0; |
2920 | 2938 | ||
@@ -2934,11 +2952,9 @@ static void mptctl_exit(void) | |||
2934 | 2952 | ||
2935 | /* De-register reset handler from base module */ | 2953 | /* De-register reset handler from base module */ |
2936 | mpt_reset_deregister(mptctl_id); | 2954 | mpt_reset_deregister(mptctl_id); |
2937 | dprintk((KERN_INFO MYNAM ": Deregistered for IOC reset notifications\n")); | ||
2938 | 2955 | ||
2939 | /* De-register callback handler from base module */ | 2956 | /* De-register callback handler from base module */ |
2940 | mpt_deregister(mptctl_id); | 2957 | mpt_deregister(mptctl_id); |
2941 | printk(KERN_INFO MYNAM ": Deregistered from Fusion MPT base driver\n"); | ||
2942 | 2958 | ||
2943 | mpt_device_driver_deregister(MPTCTL_DRIVER); | 2959 | mpt_device_driver_deregister(MPTCTL_DRIVER); |
2944 | 2960 | ||
diff --git a/drivers/message/fusion/mptdebug.h b/drivers/message/fusion/mptdebug.h new file mode 100644 index 000000000000..ffdb0a6191b4 --- /dev/null +++ b/drivers/message/fusion/mptdebug.h | |||
@@ -0,0 +1,288 @@ | |||
1 | /* | ||
2 | * linux/drivers/message/fusion/mptdebug.h | ||
3 | * For use with LSI PCI chip/adapter(s) | ||
4 | * running LSI Fusion MPT (Message Passing Technology) firmware. | ||
5 | * | ||
6 | * Copyright (c) 1999-2007 LSI Corporation | ||
7 | * (mailto:DL-MPTFusionLinux@lsi.com) | ||
8 | * | ||
9 | */ | ||
10 | /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ | ||
11 | |||
12 | #ifndef MPTDEBUG_H_INCLUDED | ||
13 | #define MPTDEBUG_H_INCLUDED | ||
14 | |||
15 | /* | ||
16 | * debug level can be programmed on the fly via SysFS (hex values) | ||
17 | * | ||
18 | * Example: (programming for MPT_DEBUG_EVENTS on host 5) | ||
19 | * | ||
20 | * echo 8 > /sys/class/scsi_host/host5/debug_level | ||
21 | * | ||
22 | * -------------------------------------------------------- | ||
23 | * mpt_debug_level - command line parameter | ||
24 | * this allow enabling debug at driver load time (for all iocs) | ||
25 | * | ||
26 | * Example (programming for MPT_DEBUG_EVENTS) | ||
27 | * | ||
28 | * insmod mptbase.ko mpt_debug_level=8 | ||
29 | * | ||
30 | * -------------------------------------------------------- | ||
31 | * CONFIG_FUSION_LOGGING - enables compiling debug into driver | ||
32 | * this can be enabled in the driver Makefile | ||
33 | * | ||
34 | * | ||
35 | * -------------------------------------------------------- | ||
36 | * Please note most debug prints are set to logging priority = debug | ||
37 | * This is the lowest level, and most verbose. Please refer to manual | ||
38 | * pages for syslogd or syslogd-ng on how to configure this. | ||
39 | */ | ||
40 | |||
41 | #define MPT_DEBUG 0x00000001 | ||
42 | #define MPT_DEBUG_MSG_FRAME 0x00000002 | ||
43 | #define MPT_DEBUG_SG 0x00000004 | ||
44 | #define MPT_DEBUG_EVENTS 0x00000008 | ||
45 | #define MPT_DEBUG_VERBOSE_EVENTS 0x00000010 | ||
46 | #define MPT_DEBUG_INIT 0x00000020 | ||
47 | #define MPT_DEBUG_EXIT 0x00000040 | ||
48 | #define MPT_DEBUG_FAIL 0x00000080 | ||
49 | #define MPT_DEBUG_TM 0x00000100 | ||
50 | #define MPT_DEBUG_DV 0x00000200 | ||
51 | #define MPT_DEBUG_REPLY 0x00000400 | ||
52 | #define MPT_DEBUG_HANDSHAKE 0x00000800 | ||
53 | #define MPT_DEBUG_CONFIG 0x00001000 | ||
54 | #define MPT_DEBUG_DL 0x00002000 | ||
55 | #define MPT_DEBUG_RESET 0x00008000 | ||
56 | #define MPT_DEBUG_SCSI 0x00010000 | ||
57 | #define MPT_DEBUG_IOCTL 0x00020000 | ||
58 | #define MPT_DEBUG_FC 0x00080000 | ||
59 | #define MPT_DEBUG_SAS 0x00100000 | ||
60 | #define MPT_DEBUG_SAS_WIDE 0x00200000 | ||
61 | |||
62 | /* | ||
63 | * CONFIG_FUSION_LOGGING - enabled in Kconfig | ||
64 | */ | ||
65 | |||
66 | #ifdef CONFIG_FUSION_LOGGING | ||
67 | #define MPT_CHECK_LOGGING(IOC, CMD, BITS) \ | ||
68 | { \ | ||
69 | if (IOC->debug_level & BITS) \ | ||
70 | CMD; \ | ||
71 | } | ||
72 | #else | ||
73 | #define MPT_CHECK_LOGGING(IOC, CMD, BITS) | ||
74 | #endif | ||
75 | |||
76 | |||
77 | /* | ||
78 | * debug macros | ||
79 | */ | ||
80 | |||
81 | #define dprintk(IOC, CMD) \ | ||
82 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG) | ||
83 | |||
84 | #define dsgprintk(IOC, CMD) \ | ||
85 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SG) | ||
86 | |||
87 | #define devtprintk(IOC, CMD) \ | ||
88 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_EVENTS) | ||
89 | |||
90 | #define devtverboseprintk(IOC, CMD) \ | ||
91 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_VERBOSE_EVENTS) | ||
92 | |||
93 | #define dinitprintk(IOC, CMD) \ | ||
94 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_INIT) | ||
95 | |||
96 | #define dexitprintk(IOC, CMD) \ | ||
97 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_EXIT) | ||
98 | |||
99 | #define dfailprintk(IOC, CMD) \ | ||
100 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_FAIL) | ||
101 | |||
102 | #define dtmprintk(IOC, CMD) \ | ||
103 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_TM) | ||
104 | |||
105 | #define ddvprintk(IOC, CMD) \ | ||
106 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_DV) | ||
107 | |||
108 | #define dreplyprintk(IOC, CMD) \ | ||
109 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_REPLY) | ||
110 | |||
111 | #define dhsprintk(IOC, CMD) \ | ||
112 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_HANDSHAKE) | ||
113 | |||
114 | #define dcprintk(IOC, CMD) \ | ||
115 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_CONFIG) | ||
116 | |||
117 | #define ddlprintk(IOC, CMD) \ | ||
118 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_DL) | ||
119 | |||
120 | #define drsprintk(IOC, CMD) \ | ||
121 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_RESET) | ||
122 | |||
123 | #define dsprintk(IOC, CMD) \ | ||
124 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SCSI) | ||
125 | |||
126 | #define dctlprintk(IOC, CMD) \ | ||
127 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_IOCTL) | ||
128 | |||
129 | #define dfcprintk(IOC, CMD) \ | ||
130 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_FC) | ||
131 | |||
132 | #define dsasprintk(IOC, CMD) \ | ||
133 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SAS) | ||
134 | |||
135 | #define dsaswideprintk(IOC, CMD) \ | ||
136 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_SAS_WIDE) | ||
137 | |||
138 | |||
139 | |||
140 | /* | ||
141 | * Verbose logging | ||
142 | */ | ||
143 | #if defined(MPT_DEBUG_VERBOSE) && defined(CONFIG_FUSION_LOGGING) | ||
144 | static inline void | ||
145 | DBG_DUMP_FW_DOWNLOAD(MPT_ADAPTER *ioc, u32 *mfp, int numfrags) | ||
146 | { | ||
147 | int i; | ||
148 | |||
149 | if (!(ioc->debug_level & MPT_DEBUG)) | ||
150 | return; | ||
151 | printk(KERN_DEBUG "F/W download request:\n"); | ||
152 | for (i=0; i < 7+numfrags*2; i++) | ||
153 | printk(" %08x", le32_to_cpu(mfp[i])); | ||
154 | printk("\n"); | ||
155 | } | ||
156 | |||
157 | static inline void | ||
158 | DBG_DUMP_PUT_MSG_FRAME(MPT_ADAPTER *ioc, u32 *mfp) | ||
159 | { | ||
160 | int ii, n; | ||
161 | |||
162 | if (!(ioc->debug_level & MPT_DEBUG_MSG_FRAME)) | ||
163 | return; | ||
164 | printk(KERN_DEBUG "%s: About to Put msg frame @ %p:\n", | ||
165 | ioc->name, mfp); | ||
166 | n = ioc->req_sz/4 - 1; | ||
167 | while (mfp[n] == 0) | ||
168 | n--; | ||
169 | for (ii=0; ii<=n; ii++) { | ||
170 | if (ii && ((ii%8)==0)) | ||
171 | printk("\n"); | ||
172 | printk(" %08x", le32_to_cpu(mfp[ii])); | ||
173 | } | ||
174 | printk("\n"); | ||
175 | } | ||
176 | |||
177 | static inline void | ||
178 | DBG_DUMP_FW_REQUEST_FRAME(MPT_ADAPTER *ioc, u32 *mfp) | ||
179 | { | ||
180 | int i, n; | ||
181 | |||
182 | if (!(ioc->debug_level & MPT_DEBUG_MSG_FRAME)) | ||
183 | return; | ||
184 | n = 10; | ||
185 | printk(KERN_INFO " "); | ||
186 | for (i = 0; i < n; i++) | ||
187 | printk(" %08x", le32_to_cpu(mfp[i])); | ||
188 | printk("\n"); | ||
189 | } | ||
190 | |||
191 | static inline void | ||
192 | DBG_DUMP_REQUEST_FRAME(MPT_ADAPTER *ioc, u32 *mfp) | ||
193 | { | ||
194 | int i, n; | ||
195 | |||
196 | if (!(ioc->debug_level & MPT_DEBUG_MSG_FRAME)) | ||
197 | return; | ||
198 | n = 24; | ||
199 | for (i=0; i<n; i++) { | ||
200 | if (i && ((i%8)==0)) | ||
201 | printk("\n"); | ||
202 | printk("%08x ", le32_to_cpu(mfp[i])); | ||
203 | } | ||
204 | printk("\n"); | ||
205 | } | ||
206 | |||
207 | static inline void | ||
208 | DBG_DUMP_REPLY_FRAME(MPT_ADAPTER *ioc, u32 *mfp) | ||
209 | { | ||
210 | int i, n; | ||
211 | |||
212 | if (!(ioc->debug_level & MPT_DEBUG_MSG_FRAME)) | ||
213 | return; | ||
214 | n = (le32_to_cpu(mfp[0]) & 0x00FF0000) >> 16; | ||
215 | printk(KERN_INFO " "); | ||
216 | for (i=0; i<n; i++) | ||
217 | printk(" %08x", le32_to_cpu(mfp[i])); | ||
218 | printk("\n"); | ||
219 | } | ||
220 | |||
221 | static inline void | ||
222 | DBG_DUMP_REQUEST_FRAME_HDR(MPT_ADAPTER *ioc, u32 *mfp) | ||
223 | { | ||
224 | int i, n; | ||
225 | |||
226 | if (!(ioc->debug_level & MPT_DEBUG_MSG_FRAME)) | ||
227 | return; | ||
228 | n = 3; | ||
229 | printk(KERN_INFO " "); | ||
230 | for (i=0; i<n; i++) | ||
231 | printk(" %08x", le32_to_cpu(mfp[i])); | ||
232 | printk("\n"); | ||
233 | } | ||
234 | |||
235 | static inline void | ||
236 | DBG_DUMP_TM_REQUEST_FRAME(MPT_ADAPTER *ioc, u32 *mfp) | ||
237 | { | ||
238 | int i, n; | ||
239 | |||
240 | if (!(ioc->debug_level & MPT_DEBUG_TM)) | ||
241 | return; | ||
242 | n = 13; | ||
243 | printk(KERN_DEBUG "TM_REQUEST:\n"); | ||
244 | for (i=0; i<n; i++) { | ||
245 | if (i && ((i%8)==0)) | ||
246 | printk("\n"); | ||
247 | printk("%08x ", le32_to_cpu(mfp[i])); | ||
248 | } | ||
249 | printk("\n"); | ||
250 | } | ||
251 | |||
252 | static inline void | ||
253 | DBG_DUMP_TM_REPLY_FRAME(MPT_ADAPTER *ioc, u32 *mfp) | ||
254 | { | ||
255 | int i, n; | ||
256 | |||
257 | if (!(ioc->debug_level & MPT_DEBUG_TM)) | ||
258 | return; | ||
259 | n = (le32_to_cpu(mfp[0]) & 0x00FF0000) >> 16; | ||
260 | printk(KERN_DEBUG "TM_REPLY MessageLength=%d:\n", n); | ||
261 | for (i=0; i<n; i++) { | ||
262 | if (i && ((i%8)==0)) | ||
263 | printk("\n"); | ||
264 | printk(" %08x", le32_to_cpu(mfp[i])); | ||
265 | } | ||
266 | printk("\n"); | ||
267 | } | ||
268 | |||
269 | #define dmfprintk(IOC, CMD) \ | ||
270 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_MSG_FRAME) | ||
271 | |||
272 | # else /* ifdef MPT_DEBUG_MF */ | ||
273 | |||
274 | #define DBG_DUMP_FW_DOWNLOAD(IOC, mfp, numfrags) | ||
275 | #define DBG_DUMP_PUT_MSG_FRAME(IOC, mfp) | ||
276 | #define DBG_DUMP_FW_REQUEST_FRAME(IOC, mfp) | ||
277 | #define DBG_DUMP_REQUEST_FRAME(IOC, mfp) | ||
278 | #define DBG_DUMP_REPLY_FRAME(IOC, mfp) | ||
279 | #define DBG_DUMP_REQUEST_FRAME_HDR(IOC, mfp) | ||
280 | #define DBG_DUMP_TM_REQUEST_FRAME(IOC, mfp) | ||
281 | #define DBG_DUMP_TM_REPLY_FRAME(IOC, mfp) | ||
282 | |||
283 | #define dmfprintk(IOC, CMD) \ | ||
284 | MPT_CHECK_LOGGING(IOC, CMD, MPT_DEBUG_MSG_FRAME) | ||
285 | |||
286 | #endif /* defined(MPT_DEBUG_VERBOSE) && defined(CONFIG_FUSION_LOGGING) */ | ||
287 | |||
288 | #endif /* ifndef MPTDEBUG_H_INCLUDED */ | ||
diff --git a/drivers/message/fusion/mptfc.c b/drivers/message/fusion/mptfc.c index f2ebaa9992fe..8422c25e4a3e 100644 --- a/drivers/message/fusion/mptfc.c +++ b/drivers/message/fusion/mptfc.c | |||
@@ -188,16 +188,18 @@ mptfc_block_error_handler(struct scsi_cmnd *SCpnt, | |||
188 | int (*func)(struct scsi_cmnd *SCpnt), | 188 | int (*func)(struct scsi_cmnd *SCpnt), |
189 | const char *caller) | 189 | const char *caller) |
190 | { | 190 | { |
191 | MPT_SCSI_HOST *hd; | ||
191 | struct scsi_device *sdev = SCpnt->device; | 192 | struct scsi_device *sdev = SCpnt->device; |
192 | struct Scsi_Host *shost = sdev->host; | 193 | struct Scsi_Host *shost = sdev->host; |
193 | struct fc_rport *rport = starget_to_rport(scsi_target(sdev)); | 194 | struct fc_rport *rport = starget_to_rport(scsi_target(sdev)); |
194 | unsigned long flags; | 195 | unsigned long flags; |
195 | int ready; | 196 | int ready; |
196 | 197 | ||
198 | hd = (MPT_SCSI_HOST *) SCpnt->device->host->hostdata; | ||
197 | spin_lock_irqsave(shost->host_lock, flags); | 199 | spin_lock_irqsave(shost->host_lock, flags); |
198 | while ((ready = fc_remote_port_chkready(rport) >> 16) == DID_IMM_RETRY) { | 200 | while ((ready = fc_remote_port_chkready(rport) >> 16) == DID_IMM_RETRY) { |
199 | spin_unlock_irqrestore(shost->host_lock, flags); | 201 | spin_unlock_irqrestore(shost->host_lock, flags); |
200 | dfcprintk ((MYIOC_s_INFO_FMT | 202 | dfcprintk (hd->ioc, printk(MYIOC_s_DEBUG_FMT |
201 | "mptfc_block_error_handler.%d: %d:%d, port status is " | 203 | "mptfc_block_error_handler.%d: %d:%d, port status is " |
202 | "DID_IMM_RETRY, deferring %s recovery.\n", | 204 | "DID_IMM_RETRY, deferring %s recovery.\n", |
203 | ((MPT_SCSI_HOST *) shost->hostdata)->ioc->name, | 205 | ((MPT_SCSI_HOST *) shost->hostdata)->ioc->name, |
@@ -209,7 +211,7 @@ mptfc_block_error_handler(struct scsi_cmnd *SCpnt, | |||
209 | spin_unlock_irqrestore(shost->host_lock, flags); | 211 | spin_unlock_irqrestore(shost->host_lock, flags); |
210 | 212 | ||
211 | if (ready == DID_NO_CONNECT || !SCpnt->device->hostdata) { | 213 | if (ready == DID_NO_CONNECT || !SCpnt->device->hostdata) { |
212 | dfcprintk ((MYIOC_s_INFO_FMT | 214 | dfcprintk (hd->ioc, printk(MYIOC_s_DEBUG_FMT |
213 | "%s.%d: %d:%d, failing recovery, " | 215 | "%s.%d: %d:%d, failing recovery, " |
214 | "port state %d, vdev %p.\n", caller, | 216 | "port state %d, vdev %p.\n", caller, |
215 | ((MPT_SCSI_HOST *) shost->hostdata)->ioc->name, | 217 | ((MPT_SCSI_HOST *) shost->hostdata)->ioc->name, |
@@ -218,7 +220,7 @@ mptfc_block_error_handler(struct scsi_cmnd *SCpnt, | |||
218 | SCpnt->device->hostdata)); | 220 | SCpnt->device->hostdata)); |
219 | return FAILED; | 221 | return FAILED; |
220 | } | 222 | } |
221 | dfcprintk ((MYIOC_s_INFO_FMT | 223 | dfcprintk (hd->ioc, printk(MYIOC_s_DEBUG_FMT |
222 | "%s.%d: %d:%d, executing recovery.\n", caller, | 224 | "%s.%d: %d:%d, executing recovery.\n", caller, |
223 | ((MPT_SCSI_HOST *) shost->hostdata)->ioc->name, | 225 | ((MPT_SCSI_HOST *) shost->hostdata)->ioc->name, |
224 | ((MPT_SCSI_HOST *) shost->hostdata)->ioc->sh->host_no, | 226 | ((MPT_SCSI_HOST *) shost->hostdata)->ioc->sh->host_no, |
@@ -483,7 +485,7 @@ mptfc_register_dev(MPT_ADAPTER *ioc, int channel, FCDevicePage0_t *pg0) | |||
483 | 485 | ||
484 | pn = (u64)ri->pg0.WWPN.High << 32 | (u64)ri->pg0.WWPN.Low; | 486 | pn = (u64)ri->pg0.WWPN.High << 32 | (u64)ri->pg0.WWPN.Low; |
485 | nn = (u64)ri->pg0.WWNN.High << 32 | (u64)ri->pg0.WWNN.Low; | 487 | nn = (u64)ri->pg0.WWNN.High << 32 | (u64)ri->pg0.WWNN.Low; |
486 | dfcprintk ((MYIOC_s_INFO_FMT | 488 | dfcprintk (ioc, printk(MYIOC_s_DEBUG_FMT |
487 | "mptfc_reg_dev.%d: %x, %llx / %llx, tid %d, " | 489 | "mptfc_reg_dev.%d: %x, %llx / %llx, tid %d, " |
488 | "rport tid %d, tmo %d\n", | 490 | "rport tid %d, tmo %d\n", |
489 | ioc->name, | 491 | ioc->name, |
@@ -559,6 +561,35 @@ mptfc_target_alloc(struct scsi_target *starget) | |||
559 | 561 | ||
560 | return rc; | 562 | return rc; |
561 | } | 563 | } |
564 | /* | ||
565 | * mptfc_dump_lun_info | ||
566 | * @ioc | ||
567 | * @rport | ||
568 | * @sdev | ||
569 | * | ||
570 | */ | ||
571 | static void | ||
572 | mptfc_dump_lun_info(MPT_ADAPTER *ioc, struct fc_rport *rport, struct scsi_device *sdev, | ||
573 | VirtTarget *vtarget) | ||
574 | { | ||
575 | u64 nn, pn; | ||
576 | struct mptfc_rport_info *ri; | ||
577 | |||
578 | ri = *((struct mptfc_rport_info **)rport->dd_data); | ||
579 | pn = (u64)ri->pg0.WWPN.High << 32 | (u64)ri->pg0.WWPN.Low; | ||
580 | nn = (u64)ri->pg0.WWNN.High << 32 | (u64)ri->pg0.WWNN.Low; | ||
581 | dfcprintk (ioc, printk(MYIOC_s_DEBUG_FMT | ||
582 | "mptfc_slv_alloc.%d: num_luns %d, sdev.id %d, " | ||
583 | "CurrentTargetID %d, %x %llx %llx\n", | ||
584 | ioc->name, | ||
585 | sdev->host->host_no, | ||
586 | vtarget->num_luns, | ||
587 | sdev->id, ri->pg0.CurrentTargetID, | ||
588 | ri->pg0.PortIdentifier, | ||
589 | (unsigned long long)pn, | ||
590 | (unsigned long long)nn)); | ||
591 | } | ||
592 | |||
562 | 593 | ||
563 | /* | 594 | /* |
564 | * OS entry point to allow host driver to alloc memory | 595 | * OS entry point to allow host driver to alloc memory |
@@ -606,25 +637,7 @@ mptfc_slave_alloc(struct scsi_device *sdev) | |||
606 | vtarget->num_luns++; | 637 | vtarget->num_luns++; |
607 | 638 | ||
608 | 639 | ||
609 | #ifdef DMPT_DEBUG_FC | 640 | mptfc_dump_lun_info(hd->ioc, rport, sdev, vtarget); |
610 | { | ||
611 | u64 nn, pn; | ||
612 | struct mptfc_rport_info *ri; | ||
613 | ri = *((struct mptfc_rport_info **)rport->dd_data); | ||
614 | pn = (u64)ri->pg0.WWPN.High << 32 | (u64)ri->pg0.WWPN.Low; | ||
615 | nn = (u64)ri->pg0.WWNN.High << 32 | (u64)ri->pg0.WWNN.Low; | ||
616 | dfcprintk ((MYIOC_s_INFO_FMT | ||
617 | "mptfc_slv_alloc.%d: num_luns %d, sdev.id %d, " | ||
618 | "CurrentTargetID %d, %x %llx %llx\n", | ||
619 | hd->ioc->name, | ||
620 | sdev->host->host_no, | ||
621 | vtarget->num_luns, | ||
622 | sdev->id, ri->pg0.CurrentTargetID, | ||
623 | ri->pg0.PortIdentifier, | ||
624 | (unsigned long long)pn, | ||
625 | (unsigned long long)nn)); | ||
626 | } | ||
627 | #endif | ||
628 | 641 | ||
629 | return 0; | 642 | return 0; |
630 | } | 643 | } |
@@ -653,27 +666,12 @@ mptfc_qcmd(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *)) | |||
653 | /* dd_data is null until finished adding target */ | 666 | /* dd_data is null until finished adding target */ |
654 | ri = *((struct mptfc_rport_info **)rport->dd_data); | 667 | ri = *((struct mptfc_rport_info **)rport->dd_data); |
655 | if (unlikely(!ri)) { | 668 | if (unlikely(!ri)) { |
656 | dfcprintk ((MYIOC_s_INFO_FMT | ||
657 | "mptfc_qcmd.%d: %d:%d, dd_data is null.\n", | ||
658 | ((MPT_SCSI_HOST *) SCpnt->device->host->hostdata)->ioc->name, | ||
659 | ((MPT_SCSI_HOST *) SCpnt->device->host->hostdata)->ioc->sh->host_no, | ||
660 | SCpnt->device->id,SCpnt->device->lun)); | ||
661 | SCpnt->result = DID_IMM_RETRY << 16; | 669 | SCpnt->result = DID_IMM_RETRY << 16; |
662 | done(SCpnt); | 670 | done(SCpnt); |
663 | return 0; | 671 | return 0; |
664 | } | 672 | } |
665 | 673 | ||
666 | err = mptscsih_qcmd(SCpnt,done); | 674 | return mptscsih_qcmd(SCpnt,done); |
667 | #ifdef DMPT_DEBUG_FC | ||
668 | if (unlikely(err)) { | ||
669 | dfcprintk ((MYIOC_s_INFO_FMT | ||
670 | "mptfc_qcmd.%d: %d:%d, mptscsih_qcmd returns non-zero, (%x).\n", | ||
671 | ((MPT_SCSI_HOST *) SCpnt->device->host->hostdata)->ioc->name, | ||
672 | ((MPT_SCSI_HOST *) SCpnt->device->host->hostdata)->ioc->sh->host_no, | ||
673 | SCpnt->device->id,SCpnt->device->lun,err)); | ||
674 | } | ||
675 | #endif | ||
676 | return err; | ||
677 | } | 675 | } |
678 | 676 | ||
679 | /* | 677 | /* |
@@ -1041,7 +1039,7 @@ mptfc_setup_reset(struct work_struct *work) | |||
1041 | 1039 | ||
1042 | pn = (u64)ri->pg0.WWPN.High << 32 | | 1040 | pn = (u64)ri->pg0.WWPN.High << 32 | |
1043 | (u64)ri->pg0.WWPN.Low; | 1041 | (u64)ri->pg0.WWPN.Low; |
1044 | dfcprintk ((MYIOC_s_INFO_FMT | 1042 | dfcprintk (ioc, printk(MYIOC_s_DEBUG_FMT |
1045 | "mptfc_setup_reset.%d: %llx deleted\n", | 1043 | "mptfc_setup_reset.%d: %llx deleted\n", |
1046 | ioc->name, | 1044 | ioc->name, |
1047 | ioc->sh->host_no, | 1045 | ioc->sh->host_no, |
@@ -1088,7 +1086,7 @@ mptfc_rescan_devices(struct work_struct *work) | |||
1088 | 1086 | ||
1089 | pn = (u64)ri->pg0.WWPN.High << 32 | | 1087 | pn = (u64)ri->pg0.WWPN.High << 32 | |
1090 | (u64)ri->pg0.WWPN.Low; | 1088 | (u64)ri->pg0.WWPN.Low; |
1091 | dfcprintk ((MYIOC_s_INFO_FMT | 1089 | dfcprintk (ioc, printk(MYIOC_s_DEBUG_FMT |
1092 | "mptfc_rescan.%d: %llx deleted\n", | 1090 | "mptfc_rescan.%d: %llx deleted\n", |
1093 | ioc->name, | 1091 | ioc->name, |
1094 | ioc->sh->host_no, | 1092 | ioc->sh->host_no, |
@@ -1212,7 +1210,7 @@ mptfc_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1212 | 1210 | ||
1213 | if (numSGE < sh->sg_tablesize) { | 1211 | if (numSGE < sh->sg_tablesize) { |
1214 | /* Reset this value */ | 1212 | /* Reset this value */ |
1215 | dprintk((MYIOC_s_INFO_FMT | 1213 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
1216 | "Resetting sg_tablesize to %d from %d\n", | 1214 | "Resetting sg_tablesize to %d from %d\n", |
1217 | ioc->name, numSGE, sh->sg_tablesize)); | 1215 | ioc->name, numSGE, sh->sg_tablesize)); |
1218 | sh->sg_tablesize = numSGE; | 1216 | sh->sg_tablesize = numSGE; |
@@ -1232,7 +1230,7 @@ mptfc_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1232 | goto out_mptfc_probe; | 1230 | goto out_mptfc_probe; |
1233 | } | 1231 | } |
1234 | 1232 | ||
1235 | dprintk((MYIOC_s_INFO_FMT "ScsiLookup @ %p\n", | 1233 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ScsiLookup @ %p\n", |
1236 | ioc->name, hd->ScsiLookup)); | 1234 | ioc->name, hd->ScsiLookup)); |
1237 | 1235 | ||
1238 | /* Clear the TM flags | 1236 | /* Clear the TM flags |
@@ -1264,7 +1262,7 @@ mptfc_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1264 | sh->transportt = mptfc_transport_template; | 1262 | sh->transportt = mptfc_transport_template; |
1265 | error = scsi_add_host (sh, &ioc->pcidev->dev); | 1263 | error = scsi_add_host (sh, &ioc->pcidev->dev); |
1266 | if(error) { | 1264 | if(error) { |
1267 | dprintk((KERN_ERR MYNAM | 1265 | dprintk(ioc, printk(KERN_ERR MYNAM |
1268 | "scsi_add_host failed\n")); | 1266 | "scsi_add_host failed\n")); |
1269 | goto out_mptfc_probe; | 1267 | goto out_mptfc_probe; |
1270 | } | 1268 | } |
@@ -1323,7 +1321,7 @@ mptfc_event_process(MPT_ADAPTER *ioc, EventNotificationReply_t *pEvReply) | |||
1323 | unsigned long flags; | 1321 | unsigned long flags; |
1324 | int rc=1; | 1322 | int rc=1; |
1325 | 1323 | ||
1326 | devtverboseprintk((MYIOC_s_INFO_FMT "MPT event (=%02Xh) routed to SCSI host driver!\n", | 1324 | devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "MPT event (=%02Xh) routed to SCSI host driver!\n", |
1327 | ioc->name, event)); | 1325 | ioc->name, event)); |
1328 | 1326 | ||
1329 | if (ioc->sh == NULL || | 1327 | if (ioc->sh == NULL || |
@@ -1357,8 +1355,8 @@ mptfc_ioc_reset(MPT_ADAPTER *ioc, int reset_phase) | |||
1357 | return rc; | 1355 | return rc; |
1358 | 1356 | ||
1359 | 1357 | ||
1360 | dtmprintk((KERN_WARNING MYNAM | 1358 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
1361 | ": IOC %s_reset routed to FC host driver!\n", | 1359 | ": IOC %s_reset routed to FC host driver!\n",ioc->name, |
1362 | reset_phase==MPT_IOC_SETUP_RESET ? "setup" : ( | 1360 | reset_phase==MPT_IOC_SETUP_RESET ? "setup" : ( |
1363 | reset_phase==MPT_IOC_PRE_RESET ? "pre" : "post"))); | 1361 | reset_phase==MPT_IOC_PRE_RESET ? "pre" : "post"))); |
1364 | 1362 | ||
@@ -1413,15 +1411,8 @@ mptfc_init(void) | |||
1413 | mptfcTaskCtx = mpt_register(mptscsih_taskmgmt_complete, MPTFC_DRIVER); | 1411 | mptfcTaskCtx = mpt_register(mptscsih_taskmgmt_complete, MPTFC_DRIVER); |
1414 | mptfcInternalCtx = mpt_register(mptscsih_scandv_complete, MPTFC_DRIVER); | 1412 | mptfcInternalCtx = mpt_register(mptscsih_scandv_complete, MPTFC_DRIVER); |
1415 | 1413 | ||
1416 | if (mpt_event_register(mptfcDoneCtx, mptfc_event_process) == 0) { | 1414 | mpt_event_register(mptfcDoneCtx, mptfc_event_process); |
1417 | devtverboseprintk((KERN_INFO MYNAM | 1415 | mpt_reset_register(mptfcDoneCtx, mptfc_ioc_reset); |
1418 | ": Registered for IOC event notifications\n")); | ||
1419 | } | ||
1420 | |||
1421 | if (mpt_reset_register(mptfcDoneCtx, mptfc_ioc_reset) == 0) { | ||
1422 | dprintk((KERN_INFO MYNAM | ||
1423 | ": Registered for IOC reset notifications\n")); | ||
1424 | } | ||
1425 | 1416 | ||
1426 | error = pci_register_driver(&mptfc_driver); | 1417 | error = pci_register_driver(&mptfc_driver); |
1427 | if (error) | 1418 | if (error) |
@@ -1486,12 +1477,7 @@ mptfc_exit(void) | |||
1486 | fc_release_transport(mptfc_transport_template); | 1477 | fc_release_transport(mptfc_transport_template); |
1487 | 1478 | ||
1488 | mpt_reset_deregister(mptfcDoneCtx); | 1479 | mpt_reset_deregister(mptfcDoneCtx); |
1489 | dprintk((KERN_INFO MYNAM | ||
1490 | ": Deregistered for IOC reset notifications\n")); | ||
1491 | |||
1492 | mpt_event_deregister(mptfcDoneCtx); | 1480 | mpt_event_deregister(mptfcDoneCtx); |
1493 | dprintk((KERN_INFO MYNAM | ||
1494 | ": Deregistered for IOC event notifications\n")); | ||
1495 | 1481 | ||
1496 | mpt_deregister(mptfcInternalCtx); | 1482 | mpt_deregister(mptfcInternalCtx); |
1497 | mpt_deregister(mptfcTaskCtx); | 1483 | mpt_deregister(mptfcTaskCtx); |
diff --git a/drivers/message/fusion/mptlan.c b/drivers/message/fusion/mptlan.c index 7e8a90cb484e..01fc397fdd97 100644 --- a/drivers/message/fusion/mptlan.c +++ b/drivers/message/fusion/mptlan.c | |||
@@ -1524,8 +1524,7 @@ static int __init mpt_lan_init (void) | |||
1524 | 1524 | ||
1525 | dlprintk((KERN_INFO MYNAM ": Registered for IOC reset notifications\n")); | 1525 | dlprintk((KERN_INFO MYNAM ": Registered for IOC reset notifications\n")); |
1526 | 1526 | ||
1527 | if (mpt_device_driver_register(&mptlan_driver, MPTLAN_DRIVER)) | 1527 | mpt_device_driver_register(&mptlan_driver, MPTLAN_DRIVER); |
1528 | dprintk((KERN_INFO MYNAM ": failed to register dd callbacks\n")); | ||
1529 | return 0; | 1528 | return 0; |
1530 | } | 1529 | } |
1531 | 1530 | ||
diff --git a/drivers/message/fusion/mptsas.c b/drivers/message/fusion/mptsas.c index d50664640512..29add83da588 100644 --- a/drivers/message/fusion/mptsas.c +++ b/drivers/message/fusion/mptsas.c | |||
@@ -201,103 +201,91 @@ struct mptsas_enclosure { | |||
201 | u8 sep_channel; /* SEP channel logical channel id */ | 201 | u8 sep_channel; /* SEP channel logical channel id */ |
202 | }; | 202 | }; |
203 | 203 | ||
204 | #ifdef MPT_DEBUG_SAS | 204 | static void mptsas_print_phy_data(MPT_ADAPTER *ioc, |
205 | static void mptsas_print_phy_data(MPI_SAS_IO_UNIT0_PHY_DATA *phy_data) | 205 | MPI_SAS_IO_UNIT0_PHY_DATA *phy_data) |
206 | { | 206 | { |
207 | printk("---- IO UNIT PAGE 0 ------------\n"); | 207 | dsasprintk(ioc, printk(KERN_DEBUG "---- IO UNIT PAGE 0 ------------\n")); |
208 | printk("Handle=0x%X\n", | 208 | dsasprintk(ioc, printk(KERN_DEBUG "Handle=0x%X\n", |
209 | le16_to_cpu(phy_data->AttachedDeviceHandle)); | 209 | le16_to_cpu(phy_data->AttachedDeviceHandle))); |
210 | printk("Controller Handle=0x%X\n", | 210 | dsasprintk(ioc, printk(KERN_DEBUG "Controller Handle=0x%X\n", |
211 | le16_to_cpu(phy_data->ControllerDevHandle)); | 211 | le16_to_cpu(phy_data->ControllerDevHandle))); |
212 | printk("Port=0x%X\n", phy_data->Port); | 212 | dsasprintk(ioc, printk(KERN_DEBUG "Port=0x%X\n", phy_data->Port)); |
213 | printk("Port Flags=0x%X\n", phy_data->PortFlags); | 213 | dsasprintk(ioc, printk(KERN_DEBUG "Port Flags=0x%X\n", phy_data->PortFlags)); |
214 | printk("PHY Flags=0x%X\n", phy_data->PhyFlags); | 214 | dsasprintk(ioc, printk(KERN_DEBUG "PHY Flags=0x%X\n", phy_data->PhyFlags)); |
215 | printk("Negotiated Link Rate=0x%X\n", phy_data->NegotiatedLinkRate); | 215 | dsasprintk(ioc, printk(KERN_DEBUG "Negotiated Link Rate=0x%X\n", phy_data->NegotiatedLinkRate)); |
216 | printk("Controller PHY Device Info=0x%X\n", | 216 | dsasprintk(ioc, printk(KERN_DEBUG "Controller PHY Device Info=0x%X\n", |
217 | le32_to_cpu(phy_data->ControllerPhyDeviceInfo)); | 217 | le32_to_cpu(phy_data->ControllerPhyDeviceInfo))); |
218 | printk("DiscoveryStatus=0x%X\n", | 218 | dsasprintk(ioc, printk(KERN_DEBUG "DiscoveryStatus=0x%X\n\n", |
219 | le32_to_cpu(phy_data->DiscoveryStatus)); | 219 | le32_to_cpu(phy_data->DiscoveryStatus))); |
220 | printk("\n"); | ||
221 | } | 220 | } |
222 | 221 | ||
223 | static void mptsas_print_phy_pg0(SasPhyPage0_t *pg0) | 222 | static void mptsas_print_phy_pg0(MPT_ADAPTER *ioc, SasPhyPage0_t *pg0) |
224 | { | 223 | { |
225 | __le64 sas_address; | 224 | __le64 sas_address; |
226 | 225 | ||
227 | memcpy(&sas_address, &pg0->SASAddress, sizeof(__le64)); | 226 | memcpy(&sas_address, &pg0->SASAddress, sizeof(__le64)); |
228 | 227 | ||
229 | printk("---- SAS PHY PAGE 0 ------------\n"); | 228 | dsasprintk(ioc, printk(KERN_DEBUG "---- SAS PHY PAGE 0 ------------\n")); |
230 | printk("Attached Device Handle=0x%X\n", | 229 | dsasprintk(ioc, printk(KERN_DEBUG "Attached Device Handle=0x%X\n", |
231 | le16_to_cpu(pg0->AttachedDevHandle)); | 230 | le16_to_cpu(pg0->AttachedDevHandle))); |
232 | printk("SAS Address=0x%llX\n", | 231 | dsasprintk(ioc, printk(KERN_DEBUG "SAS Address=0x%llX\n", |
233 | (unsigned long long)le64_to_cpu(sas_address)); | 232 | (unsigned long long)le64_to_cpu(sas_address))); |
234 | printk("Attached PHY Identifier=0x%X\n", pg0->AttachedPhyIdentifier); | 233 | dsasprintk(ioc, printk(KERN_DEBUG "Attached PHY Identifier=0x%X\n", pg0->AttachedPhyIdentifier)); |
235 | printk("Attached Device Info=0x%X\n", | 234 | dsasprintk(ioc, printk(KERN_DEBUG "Attached Device Info=0x%X\n", |
236 | le32_to_cpu(pg0->AttachedDeviceInfo)); | 235 | le32_to_cpu(pg0->AttachedDeviceInfo))); |
237 | printk("Programmed Link Rate=0x%X\n", pg0->ProgrammedLinkRate); | 236 | dsasprintk(ioc, printk(KERN_DEBUG "Programmed Link Rate=0x%X\n", pg0->ProgrammedLinkRate)); |
238 | printk("Change Count=0x%X\n", pg0->ChangeCount); | 237 | dsasprintk(ioc, printk(KERN_DEBUG "Change Count=0x%X\n", pg0->ChangeCount)); |
239 | printk("PHY Info=0x%X\n", le32_to_cpu(pg0->PhyInfo)); | 238 | dsasprintk(ioc, printk(KERN_DEBUG "PHY Info=0x%X\n\n", le32_to_cpu(pg0->PhyInfo))); |
240 | printk("\n"); | ||
241 | } | 239 | } |
242 | 240 | ||
243 | static void mptsas_print_phy_pg1(SasPhyPage1_t *pg1) | 241 | static void mptsas_print_phy_pg1(MPT_ADAPTER *ioc, SasPhyPage1_t *pg1) |
244 | { | 242 | { |
245 | printk("---- SAS PHY PAGE 1 ------------\n"); | 243 | dsasprintk(ioc, printk(KERN_DEBUG "---- SAS PHY PAGE 1 ------------\n")); |
246 | printk("Invalid Dword Count=0x%x\n", pg1->InvalidDwordCount); | 244 | dsasprintk(ioc, printk(KERN_DEBUG "Invalid Dword Count=0x%x\n", pg1->InvalidDwordCount)); |
247 | printk("Running Disparity Error Count=0x%x\n", | 245 | dsasprintk(ioc, printk(KERN_DEBUG "Running Disparity Error Count=0x%x\n", |
248 | pg1->RunningDisparityErrorCount); | 246 | pg1->RunningDisparityErrorCount)); |
249 | printk("Loss Dword Synch Count=0x%x\n", pg1->LossDwordSynchCount); | 247 | dsasprintk(ioc, printk(KERN_DEBUG "Loss Dword Synch Count=0x%x\n", pg1->LossDwordSynchCount)); |
250 | printk("PHY Reset Problem Count=0x%x\n", pg1->PhyResetProblemCount); | 248 | dsasprintk(ioc, printk(KERN_DEBUG "PHY Reset Problem Count=0x%x\n\n", pg1->PhyResetProblemCount)); |
251 | printk("\n"); | ||
252 | } | 249 | } |
253 | 250 | ||
254 | static void mptsas_print_device_pg0(SasDevicePage0_t *pg0) | 251 | static void mptsas_print_device_pg0(MPT_ADAPTER *ioc, SasDevicePage0_t *pg0) |
255 | { | 252 | { |
256 | __le64 sas_address; | 253 | __le64 sas_address; |
257 | 254 | ||
258 | memcpy(&sas_address, &pg0->SASAddress, sizeof(__le64)); | 255 | memcpy(&sas_address, &pg0->SASAddress, sizeof(__le64)); |
259 | 256 | ||
260 | printk("---- SAS DEVICE PAGE 0 ---------\n"); | 257 | dsasprintk(ioc, printk(KERN_DEBUG "---- SAS DEVICE PAGE 0 ---------\n")); |
261 | printk("Handle=0x%X\n" ,le16_to_cpu(pg0->DevHandle)); | 258 | dsasprintk(ioc, printk(KERN_DEBUG "Handle=0x%X\n" ,le16_to_cpu(pg0->DevHandle))); |
262 | printk("Parent Handle=0x%X\n" ,le16_to_cpu(pg0->ParentDevHandle)); | 259 | dsasprintk(ioc, printk(KERN_DEBUG "Parent Handle=0x%X\n" ,le16_to_cpu(pg0->ParentDevHandle))); |
263 | printk("Enclosure Handle=0x%X\n", le16_to_cpu(pg0->EnclosureHandle)); | 260 | dsasprintk(ioc, printk(KERN_DEBUG "Enclosure Handle=0x%X\n", le16_to_cpu(pg0->EnclosureHandle))); |
264 | printk("Slot=0x%X\n", le16_to_cpu(pg0->Slot)); | 261 | dsasprintk(ioc, printk(KERN_DEBUG "Slot=0x%X\n", le16_to_cpu(pg0->Slot))); |
265 | printk("SAS Address=0x%llX\n", (unsigned long long) | 262 | dsasprintk(ioc, printk(KERN_DEBUG "SAS Address=0x%llX\n", (unsigned long long) |
266 | le64_to_cpu(sas_address)); | 263 | le64_to_cpu(sas_address))); |
267 | printk("Target ID=0x%X\n", pg0->TargetID); | 264 | dsasprintk(ioc, printk(KERN_DEBUG "Target ID=0x%X\n", pg0->TargetID)); |
268 | printk("Bus=0x%X\n", pg0->Bus); | 265 | dsasprintk(ioc, printk(KERN_DEBUG "Bus=0x%X\n", pg0->Bus)); |
269 | /* The PhyNum field specifies the PHY number of the parent | 266 | /* The PhyNum field specifies the PHY number of the parent |
270 | * device this device is linked to | 267 | * device this device is linked to |
271 | */ | 268 | */ |
272 | printk("Parent Phy Num=0x%X\n", pg0->PhyNum); | 269 | dsasprintk(ioc, printk(KERN_DEBUG "Parent Phy Num=0x%X\n", pg0->PhyNum)); |
273 | printk("Access Status=0x%X\n", le16_to_cpu(pg0->AccessStatus)); | 270 | dsasprintk(ioc, printk(KERN_DEBUG "Access Status=0x%X\n", le16_to_cpu(pg0->AccessStatus))); |
274 | printk("Device Info=0x%X\n", le32_to_cpu(pg0->DeviceInfo)); | 271 | dsasprintk(ioc, printk(KERN_DEBUG "Device Info=0x%X\n", le32_to_cpu(pg0->DeviceInfo))); |
275 | printk("Flags=0x%X\n", le16_to_cpu(pg0->Flags)); | 272 | dsasprintk(ioc, printk(KERN_DEBUG "Flags=0x%X\n", le16_to_cpu(pg0->Flags))); |
276 | printk("Physical Port=0x%X\n", pg0->PhysicalPort); | 273 | dsasprintk(ioc, printk(KERN_DEBUG "Physical Port=0x%X\n\n", pg0->PhysicalPort)); |
277 | printk("\n"); | ||
278 | } | 274 | } |
279 | 275 | ||
280 | static void mptsas_print_expander_pg1(SasExpanderPage1_t *pg1) | 276 | static void mptsas_print_expander_pg1(MPT_ADAPTER *ioc, SasExpanderPage1_t *pg1) |
281 | { | 277 | { |
282 | printk("---- SAS EXPANDER PAGE 1 ------------\n"); | 278 | dsasprintk(ioc, printk(KERN_DEBUG "---- SAS EXPANDER PAGE 1 ------------\n")); |
283 | 279 | dsasprintk(ioc, printk(KERN_DEBUG "Physical Port=0x%X\n", pg1->PhysicalPort)); | |
284 | printk("Physical Port=0x%X\n", pg1->PhysicalPort); | 280 | dsasprintk(ioc, printk(KERN_DEBUG "PHY Identifier=0x%X\n", pg1->PhyIdentifier)); |
285 | printk("PHY Identifier=0x%X\n", pg1->PhyIdentifier); | 281 | dsasprintk(ioc, printk(KERN_DEBUG "Negotiated Link Rate=0x%X\n", pg1->NegotiatedLinkRate)); |
286 | printk("Negotiated Link Rate=0x%X\n", pg1->NegotiatedLinkRate); | 282 | dsasprintk(ioc, printk(KERN_DEBUG "Programmed Link Rate=0x%X\n", pg1->ProgrammedLinkRate)); |
287 | printk("Programmed Link Rate=0x%X\n", pg1->ProgrammedLinkRate); | 283 | dsasprintk(ioc, printk(KERN_DEBUG "Hardware Link Rate=0x%X\n", pg1->HwLinkRate)); |
288 | printk("Hardware Link Rate=0x%X\n", pg1->HwLinkRate); | 284 | dsasprintk(ioc, printk(KERN_DEBUG "Owner Device Handle=0x%X\n", |
289 | printk("Owner Device Handle=0x%X\n", | 285 | le16_to_cpu(pg1->OwnerDevHandle))); |
290 | le16_to_cpu(pg1->OwnerDevHandle)); | 286 | dsasprintk(ioc, printk(KERN_DEBUG "Attached Device Handle=0x%X\n\n", |
291 | printk("Attached Device Handle=0x%X\n", | 287 | le16_to_cpu(pg1->AttachedDevHandle))); |
292 | le16_to_cpu(pg1->AttachedDevHandle)); | ||
293 | } | 288 | } |
294 | #else | ||
295 | #define mptsas_print_phy_data(phy_data) do { } while (0) | ||
296 | #define mptsas_print_phy_pg0(pg0) do { } while (0) | ||
297 | #define mptsas_print_phy_pg1(pg1) do { } while (0) | ||
298 | #define mptsas_print_device_pg0(pg0) do { } while (0) | ||
299 | #define mptsas_print_expander_pg1(pg1) do { } while (0) | ||
300 | #endif | ||
301 | 289 | ||
302 | static inline MPT_ADAPTER *phy_to_ioc(struct sas_phy *phy) | 290 | static inline MPT_ADAPTER *phy_to_ioc(struct sas_phy *phy) |
303 | { | 291 | { |
@@ -354,7 +342,7 @@ mptsas_is_end_device(struct mptsas_devinfo * attached) | |||
354 | 342 | ||
355 | /* no mutex */ | 343 | /* no mutex */ |
356 | static void | 344 | static void |
357 | mptsas_port_delete(struct mptsas_portinfo_details * port_details) | 345 | mptsas_port_delete(MPT_ADAPTER *ioc, struct mptsas_portinfo_details * port_details) |
358 | { | 346 | { |
359 | struct mptsas_portinfo *port_info; | 347 | struct mptsas_portinfo *port_info; |
360 | struct mptsas_phyinfo *phy_info; | 348 | struct mptsas_phyinfo *phy_info; |
@@ -366,7 +354,7 @@ mptsas_port_delete(struct mptsas_portinfo_details * port_details) | |||
366 | port_info = port_details->port_info; | 354 | port_info = port_details->port_info; |
367 | phy_info = port_info->phy_info; | 355 | phy_info = port_info->phy_info; |
368 | 356 | ||
369 | dsaswideprintk((KERN_DEBUG "%s: [%p]: num_phys=%02d " | 357 | dsaswideprintk(ioc, printk(KERN_DEBUG "%s: [%p]: num_phys=%02d " |
370 | "bitmask=0x%016llX\n", __FUNCTION__, port_details, | 358 | "bitmask=0x%016llX\n", __FUNCTION__, port_details, |
371 | port_details->num_phys, (unsigned long long) | 359 | port_details->num_phys, (unsigned long long) |
372 | port_details->phy_bitmask)); | 360 | port_details->phy_bitmask)); |
@@ -390,20 +378,19 @@ mptsas_get_rphy(struct mptsas_phyinfo *phy_info) | |||
390 | } | 378 | } |
391 | 379 | ||
392 | static inline void | 380 | static inline void |
393 | mptsas_set_rphy(struct mptsas_phyinfo *phy_info, struct sas_rphy *rphy) | 381 | mptsas_set_rphy(MPT_ADAPTER *ioc, struct mptsas_phyinfo *phy_info, struct sas_rphy *rphy) |
394 | { | 382 | { |
395 | if (phy_info->port_details) { | 383 | if (phy_info->port_details) { |
396 | phy_info->port_details->rphy = rphy; | 384 | phy_info->port_details->rphy = rphy; |
397 | dsaswideprintk((KERN_DEBUG "sas_rphy_add: rphy=%p\n", rphy)); | 385 | dsaswideprintk(ioc, printk(KERN_DEBUG "sas_rphy_add: rphy=%p\n", rphy)); |
398 | } | 386 | } |
399 | 387 | ||
400 | #ifdef MPT_DEBUG_SAS_WIDE | ||
401 | if (rphy) { | 388 | if (rphy) { |
402 | dev_printk(KERN_DEBUG, &rphy->dev, "add:"); | 389 | dsaswideprintk(ioc, dev_printk(KERN_DEBUG, |
403 | printk("rphy=%p release=%p\n", | 390 | &rphy->dev, "add:")); |
404 | rphy, rphy->dev.release); | 391 | dsaswideprintk(ioc, printk(KERN_DEBUG "rphy=%p release=%p\n", |
392 | rphy, rphy->dev.release)); | ||
405 | } | 393 | } |
406 | #endif | ||
407 | } | 394 | } |
408 | 395 | ||
409 | static inline struct sas_port * | 396 | static inline struct sas_port * |
@@ -416,18 +403,17 @@ mptsas_get_port(struct mptsas_phyinfo *phy_info) | |||
416 | } | 403 | } |
417 | 404 | ||
418 | static inline void | 405 | static inline void |
419 | mptsas_set_port(struct mptsas_phyinfo *phy_info, struct sas_port *port) | 406 | mptsas_set_port(MPT_ADAPTER *ioc, struct mptsas_phyinfo *phy_info, struct sas_port *port) |
420 | { | 407 | { |
421 | if (phy_info->port_details) | 408 | if (phy_info->port_details) |
422 | phy_info->port_details->port = port; | 409 | phy_info->port_details->port = port; |
423 | 410 | ||
424 | #ifdef MPT_DEBUG_SAS_WIDE | ||
425 | if (port) { | 411 | if (port) { |
426 | dev_printk(KERN_DEBUG, &port->dev, "add: "); | 412 | dsaswideprintk(ioc, dev_printk(KERN_DEBUG, |
427 | printk("port=%p release=%p\n", | 413 | &port->dev, "add:")); |
428 | port, port->dev.release); | 414 | dsaswideprintk(ioc, printk(KERN_DEBUG "port=%p release=%p\n", |
415 | port, port->dev.release)); | ||
429 | } | 416 | } |
430 | #endif | ||
431 | } | 417 | } |
432 | 418 | ||
433 | static inline struct scsi_target * | 419 | static inline struct scsi_target * |
@@ -477,7 +463,7 @@ mptsas_setup_wide_ports(MPT_ADAPTER *ioc, struct mptsas_portinfo *port_info) | |||
477 | * Removing a phy from a port, letting the last | 463 | * Removing a phy from a port, letting the last |
478 | * phy be removed by firmware events. | 464 | * phy be removed by firmware events. |
479 | */ | 465 | */ |
480 | dsaswideprintk((KERN_DEBUG | 466 | dsaswideprintk(ioc, printk(KERN_DEBUG |
481 | "%s: [%p]: deleting phy = %d\n", | 467 | "%s: [%p]: deleting phy = %d\n", |
482 | __FUNCTION__, port_details, i)); | 468 | __FUNCTION__, port_details, i)); |
483 | port_details->num_phys--; | 469 | port_details->num_phys--; |
@@ -493,7 +479,7 @@ mptsas_setup_wide_ports(MPT_ADAPTER *ioc, struct mptsas_portinfo *port_info) | |||
493 | phy_info = port_info->phy_info; | 479 | phy_info = port_info->phy_info; |
494 | for (i = 0 ; i < port_info->num_phys ; i++, phy_info++) { | 480 | for (i = 0 ; i < port_info->num_phys ; i++, phy_info++) { |
495 | sas_address = phy_info->attached.sas_address; | 481 | sas_address = phy_info->attached.sas_address; |
496 | dsaswideprintk((KERN_DEBUG "phy_id=%d sas_address=0x%018llX\n", | 482 | dsaswideprintk(ioc, printk(KERN_DEBUG "phy_id=%d sas_address=0x%018llX\n", |
497 | i, (unsigned long long)sas_address)); | 483 | i, (unsigned long long)sas_address)); |
498 | if (!sas_address) | 484 | if (!sas_address) |
499 | continue; | 485 | continue; |
@@ -512,7 +498,7 @@ mptsas_setup_wide_ports(MPT_ADAPTER *ioc, struct mptsas_portinfo *port_info) | |||
512 | port_details->phy_bitmask |= | 498 | port_details->phy_bitmask |= |
513 | (1 << phy_info->phy_id); | 499 | (1 << phy_info->phy_id); |
514 | phy_info->sas_port_add_phy=1; | 500 | phy_info->sas_port_add_phy=1; |
515 | dsaswideprintk((KERN_DEBUG "\t\tForming port\n\t\t" | 501 | dsaswideprintk(ioc, printk(KERN_DEBUG "\t\tForming port\n\t\t" |
516 | "phy_id=%d sas_address=0x%018llX\n", | 502 | "phy_id=%d sas_address=0x%018llX\n", |
517 | i, (unsigned long long)sas_address)); | 503 | i, (unsigned long long)sas_address)); |
518 | phy_info->port_details = port_details; | 504 | phy_info->port_details = port_details; |
@@ -529,7 +515,7 @@ mptsas_setup_wide_ports(MPT_ADAPTER *ioc, struct mptsas_portinfo *port_info) | |||
529 | continue; | 515 | continue; |
530 | if (phy_info_cmp->port_details == port_details ) | 516 | if (phy_info_cmp->port_details == port_details ) |
531 | continue; | 517 | continue; |
532 | dsaswideprintk((KERN_DEBUG | 518 | dsaswideprintk(ioc, printk(KERN_DEBUG |
533 | "\t\tphy_id=%d sas_address=0x%018llX\n", | 519 | "\t\tphy_id=%d sas_address=0x%018llX\n", |
534 | j, (unsigned long long) | 520 | j, (unsigned long long) |
535 | phy_info_cmp->attached.sas_address)); | 521 | phy_info_cmp->attached.sas_address)); |
@@ -559,21 +545,19 @@ mptsas_setup_wide_ports(MPT_ADAPTER *ioc, struct mptsas_portinfo *port_info) | |||
559 | 545 | ||
560 | out: | 546 | out: |
561 | 547 | ||
562 | #ifdef MPT_DEBUG_SAS_WIDE | ||
563 | for (i = 0; i < port_info->num_phys; i++) { | 548 | for (i = 0; i < port_info->num_phys; i++) { |
564 | port_details = port_info->phy_info[i].port_details; | 549 | port_details = port_info->phy_info[i].port_details; |
565 | if (!port_details) | 550 | if (!port_details) |
566 | continue; | 551 | continue; |
567 | dsaswideprintk((KERN_DEBUG | 552 | dsaswideprintk(ioc, printk(KERN_DEBUG |
568 | "%s: [%p]: phy_id=%02d num_phys=%02d " | 553 | "%s: [%p]: phy_id=%02d num_phys=%02d " |
569 | "bitmask=0x%016llX\n", __FUNCTION__, | 554 | "bitmask=0x%016llX\n", __FUNCTION__, |
570 | port_details, i, port_details->num_phys, | 555 | port_details, i, port_details->num_phys, |
571 | (unsigned long long)port_details->phy_bitmask)); | 556 | (unsigned long long)port_details->phy_bitmask)); |
572 | dsaswideprintk((KERN_DEBUG"\t\tport = %p rphy=%p\n", | 557 | dsaswideprintk(ioc, printk(KERN_DEBUG"\t\tport = %p rphy=%p\n", |
573 | port_details->port, port_details->rphy)); | 558 | port_details->port, port_details->rphy)); |
574 | } | 559 | } |
575 | dsaswideprintk((KERN_DEBUG"\n")); | 560 | dsaswideprintk(ioc, printk(KERN_DEBUG"\n")); |
576 | #endif | ||
577 | mutex_unlock(&ioc->sas_topology_mutex); | 561 | mutex_unlock(&ioc->sas_topology_mutex); |
578 | } | 562 | } |
579 | 563 | ||
@@ -622,7 +606,7 @@ mptsas_target_reset(MPT_ADAPTER *ioc, u8 channel, u8 id) | |||
622 | SCSITaskMgmt_t *pScsiTm; | 606 | SCSITaskMgmt_t *pScsiTm; |
623 | 607 | ||
624 | if ((mf = mpt_get_msg_frame(ioc->TaskCtx, ioc)) == NULL) { | 608 | if ((mf = mpt_get_msg_frame(ioc->TaskCtx, ioc)) == NULL) { |
625 | dfailprintk((MYIOC_s_WARN_FMT "%s, no msg frames @%d!!\n", | 609 | dfailprintk(ioc, printk(MYIOC_s_WARN_FMT "%s, no msg frames @%d!!\n", |
626 | ioc->name,__FUNCTION__, __LINE__)); | 610 | ioc->name,__FUNCTION__, __LINE__)); |
627 | return 0; | 611 | return 0; |
628 | } | 612 | } |
@@ -637,12 +621,12 @@ mptsas_target_reset(MPT_ADAPTER *ioc, u8 channel, u8 id) | |||
637 | pScsiTm->TaskType = MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET; | 621 | pScsiTm->TaskType = MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET; |
638 | pScsiTm->MsgFlags = MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION; | 622 | pScsiTm->MsgFlags = MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION; |
639 | 623 | ||
640 | DBG_DUMP_TM_REQUEST_FRAME(mf); | 624 | DBG_DUMP_TM_REQUEST_FRAME(ioc, (u32 *)mf); |
641 | 625 | ||
642 | if (mpt_send_handshake_request(ioc->TaskCtx, ioc, | 626 | if (mpt_send_handshake_request(ioc->TaskCtx, ioc, |
643 | sizeof(SCSITaskMgmt_t), (u32 *)mf, NO_SLEEP)) { | 627 | sizeof(SCSITaskMgmt_t), (u32 *)mf, NO_SLEEP)) { |
644 | mpt_free_msg_frame(ioc, mf); | 628 | mpt_free_msg_frame(ioc, mf); |
645 | dfailprintk((MYIOC_s_WARN_FMT "%s, tm handshake failed @%d!!\n", | 629 | dfailprintk(ioc, printk(MYIOC_s_WARN_FMT "%s, tm handshake failed @%d!!\n", |
646 | ioc->name,__FUNCTION__, __LINE__)); | 630 | ioc->name,__FUNCTION__, __LINE__)); |
647 | return 0; | 631 | return 0; |
648 | } | 632 | } |
@@ -681,7 +665,7 @@ mptsas_target_reset_queue(MPT_ADAPTER *ioc, | |||
681 | target_reset_list = kzalloc(sizeof(*target_reset_list), | 665 | target_reset_list = kzalloc(sizeof(*target_reset_list), |
682 | GFP_ATOMIC); | 666 | GFP_ATOMIC); |
683 | if (!target_reset_list) { | 667 | if (!target_reset_list) { |
684 | dfailprintk((MYIOC_s_WARN_FMT "%s, failed to allocate mem @%d..!!\n", | 668 | dfailprintk(ioc, printk(MYIOC_s_WARN_FMT "%s, failed to allocate mem @%d..!!\n", |
685 | ioc->name,__FUNCTION__, __LINE__)); | 669 | ioc->name,__FUNCTION__, __LINE__)); |
686 | return; | 670 | return; |
687 | } | 671 | } |
@@ -748,7 +732,7 @@ mptsas_dev_reset_complete(MPT_ADAPTER *ioc) | |||
748 | 732 | ||
749 | ev = kzalloc(sizeof(*ev), GFP_ATOMIC); | 733 | ev = kzalloc(sizeof(*ev), GFP_ATOMIC); |
750 | if (!ev) { | 734 | if (!ev) { |
751 | dfailprintk((MYIOC_s_WARN_FMT "%s, failed to allocate mem @%d..!!\n", | 735 | dfailprintk(ioc, printk(MYIOC_s_WARN_FMT "%s, failed to allocate mem @%d..!!\n", |
752 | ioc->name,__FUNCTION__, __LINE__)); | 736 | ioc->name,__FUNCTION__, __LINE__)); |
753 | return; | 737 | return; |
754 | } | 738 | } |
@@ -1168,7 +1152,7 @@ static int mptsas_get_linkerrors(struct sas_phy *phy) | |||
1168 | if (error) | 1152 | if (error) |
1169 | goto out_free_consistent; | 1153 | goto out_free_consistent; |
1170 | 1154 | ||
1171 | mptsas_print_phy_pg1(buffer); | 1155 | mptsas_print_phy_pg1(ioc, buffer); |
1172 | 1156 | ||
1173 | phy->invalid_dword_count = le32_to_cpu(buffer->InvalidDwordCount); | 1157 | phy->invalid_dword_count = le32_to_cpu(buffer->InvalidDwordCount); |
1174 | phy->running_disparity_error_count = | 1158 | phy->running_disparity_error_count = |
@@ -1397,7 +1381,7 @@ mptsas_sas_io_unit_pg0(MPT_ADAPTER *ioc, struct mptsas_portinfo *port_info) | |||
1397 | le16_to_cpu(buffer->NvdataVersionDefault); | 1381 | le16_to_cpu(buffer->NvdataVersionDefault); |
1398 | 1382 | ||
1399 | for (i = 0; i < port_info->num_phys; i++) { | 1383 | for (i = 0; i < port_info->num_phys; i++) { |
1400 | mptsas_print_phy_data(&buffer->PhyData[i]); | 1384 | mptsas_print_phy_data(ioc, &buffer->PhyData[i]); |
1401 | port_info->phy_info[i].phy_id = i; | 1385 | port_info->phy_info[i].phy_id = i; |
1402 | port_info->phy_info[i].port_id = | 1386 | port_info->phy_info[i].port_id = |
1403 | buffer->PhyData[i].Port; | 1387 | buffer->PhyData[i].Port; |
@@ -1522,7 +1506,7 @@ mptsas_sas_phy_pg0(MPT_ADAPTER *ioc, struct mptsas_phyinfo *phy_info, | |||
1522 | if (error) | 1506 | if (error) |
1523 | goto out_free_consistent; | 1507 | goto out_free_consistent; |
1524 | 1508 | ||
1525 | mptsas_print_phy_pg0(buffer); | 1509 | mptsas_print_phy_pg0(ioc, buffer); |
1526 | 1510 | ||
1527 | phy_info->hw_link_rate = buffer->HwLinkRate; | 1511 | phy_info->hw_link_rate = buffer->HwLinkRate; |
1528 | phy_info->programmed_link_rate = buffer->ProgrammedLinkRate; | 1512 | phy_info->programmed_link_rate = buffer->ProgrammedLinkRate; |
@@ -1589,7 +1573,7 @@ mptsas_sas_device_pg0(MPT_ADAPTER *ioc, struct mptsas_devinfo *device_info, | |||
1589 | if (error) | 1573 | if (error) |
1590 | goto out_free_consistent; | 1574 | goto out_free_consistent; |
1591 | 1575 | ||
1592 | mptsas_print_device_pg0(buffer); | 1576 | mptsas_print_device_pg0(ioc, buffer); |
1593 | 1577 | ||
1594 | device_info->handle = le16_to_cpu(buffer->DevHandle); | 1578 | device_info->handle = le16_to_cpu(buffer->DevHandle); |
1595 | device_info->handle_parent = le16_to_cpu(buffer->ParentDevHandle); | 1579 | device_info->handle_parent = le16_to_cpu(buffer->ParentDevHandle); |
@@ -1737,7 +1721,7 @@ mptsas_sas_expander_pg1(MPT_ADAPTER *ioc, struct mptsas_phyinfo *phy_info, | |||
1737 | goto out_free_consistent; | 1721 | goto out_free_consistent; |
1738 | 1722 | ||
1739 | 1723 | ||
1740 | mptsas_print_expander_pg1(buffer); | 1724 | mptsas_print_expander_pg1(ioc, buffer); |
1741 | 1725 | ||
1742 | /* save config data */ | 1726 | /* save config data */ |
1743 | phy_info->phy_id = buffer->PhyIdentifier; | 1727 | phy_info->phy_id = buffer->PhyIdentifier; |
@@ -1946,17 +1930,17 @@ static int mptsas_probe_one_phy(struct device *dev, | |||
1946 | } | 1930 | } |
1947 | error = sas_port_add(port); | 1931 | error = sas_port_add(port); |
1948 | if (error) { | 1932 | if (error) { |
1949 | dfailprintk((MYIOC_s_ERR_FMT | 1933 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
1950 | "%s: exit at line=%d\n", ioc->name, | 1934 | "%s: exit at line=%d\n", ioc->name, |
1951 | __FUNCTION__, __LINE__)); | 1935 | __FUNCTION__, __LINE__)); |
1952 | goto out; | 1936 | goto out; |
1953 | } | 1937 | } |
1954 | mptsas_set_port(phy_info, port); | 1938 | mptsas_set_port(ioc, phy_info, port); |
1955 | dsaswideprintk((KERN_DEBUG | 1939 | dsaswideprintk(ioc, printk(KERN_DEBUG |
1956 | "sas_port_alloc: port=%p dev=%p port_id=%d\n", | 1940 | "sas_port_alloc: port=%p dev=%p port_id=%d\n", |
1957 | port, dev, port->port_identifier)); | 1941 | port, dev, port->port_identifier)); |
1958 | } | 1942 | } |
1959 | dsaswideprintk((KERN_DEBUG "sas_port_add_phy: phy_id=%d\n", | 1943 | dsaswideprintk(ioc, printk(KERN_DEBUG "sas_port_add_phy: phy_id=%d\n", |
1960 | phy_info->phy_id)); | 1944 | phy_info->phy_id)); |
1961 | sas_port_add_phy(port, phy_info->phy); | 1945 | sas_port_add_phy(port, phy_info->phy); |
1962 | phy_info->sas_port_add_phy = 0; | 1946 | phy_info->sas_port_add_phy = 0; |
@@ -2017,7 +2001,7 @@ static int mptsas_probe_one_phy(struct device *dev, | |||
2017 | break; | 2001 | break; |
2018 | } | 2002 | } |
2019 | if (!rphy) { | 2003 | if (!rphy) { |
2020 | dfailprintk((MYIOC_s_ERR_FMT | 2004 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
2021 | "%s: exit at line=%d\n", ioc->name, | 2005 | "%s: exit at line=%d\n", ioc->name, |
2022 | __FUNCTION__, __LINE__)); | 2006 | __FUNCTION__, __LINE__)); |
2023 | goto out; | 2007 | goto out; |
@@ -2026,13 +2010,13 @@ static int mptsas_probe_one_phy(struct device *dev, | |||
2026 | rphy->identify = identify; | 2010 | rphy->identify = identify; |
2027 | error = sas_rphy_add(rphy); | 2011 | error = sas_rphy_add(rphy); |
2028 | if (error) { | 2012 | if (error) { |
2029 | dfailprintk((MYIOC_s_ERR_FMT | 2013 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
2030 | "%s: exit at line=%d\n", ioc->name, | 2014 | "%s: exit at line=%d\n", ioc->name, |
2031 | __FUNCTION__, __LINE__)); | 2015 | __FUNCTION__, __LINE__)); |
2032 | sas_rphy_free(rphy); | 2016 | sas_rphy_free(rphy); |
2033 | goto out; | 2017 | goto out; |
2034 | } | 2018 | } |
2035 | mptsas_set_rphy(phy_info, rphy); | 2019 | mptsas_set_rphy(ioc, phy_info, rphy); |
2036 | } | 2020 | } |
2037 | 2021 | ||
2038 | out: | 2022 | out: |
@@ -2258,18 +2242,17 @@ mptsas_delete_expander_phys(MPT_ADAPTER *ioc) | |||
2258 | if (phy_info->attached.sas_address != | 2242 | if (phy_info->attached.sas_address != |
2259 | expander_sas_address) | 2243 | expander_sas_address) |
2260 | continue; | 2244 | continue; |
2261 | #ifdef MPT_DEBUG_SAS_WIDE | 2245 | dsaswideprintk(ioc, |
2262 | dev_printk(KERN_DEBUG, &port->dev, | 2246 | dev_printk(KERN_DEBUG, &port->dev, |
2263 | "delete port (%d)\n", port->port_identifier); | 2247 | "delete port (%d)\n", port->port_identifier)); |
2264 | #endif | ||
2265 | sas_port_delete(port); | 2248 | sas_port_delete(port); |
2266 | mptsas_port_delete(phy_info->port_details); | 2249 | mptsas_port_delete(ioc, phy_info->port_details); |
2267 | } | 2250 | } |
2268 | next_port: | 2251 | next_port: |
2269 | 2252 | ||
2270 | phy_info = port_info->phy_info; | 2253 | phy_info = port_info->phy_info; |
2271 | for (i = 0; i < port_info->num_phys; i++, phy_info++) | 2254 | for (i = 0; i < port_info->num_phys; i++, phy_info++) |
2272 | mptsas_port_delete(phy_info->port_details); | 2255 | mptsas_port_delete(ioc, phy_info->port_details); |
2273 | 2256 | ||
2274 | list_del(&port_info->list); | 2257 | list_del(&port_info->list); |
2275 | kfree(port_info->phy_info); | 2258 | kfree(port_info->phy_info); |
@@ -2555,7 +2538,7 @@ mptsas_hotplug_work(struct work_struct *work) | |||
2555 | (MPI_SAS_DEVICE_PGAD_FORM_BUS_TARGET_ID << | 2538 | (MPI_SAS_DEVICE_PGAD_FORM_BUS_TARGET_ID << |
2556 | MPI_SAS_DEVICE_PGAD_FORM_SHIFT), | 2539 | MPI_SAS_DEVICE_PGAD_FORM_SHIFT), |
2557 | (ev->channel << 8) + ev->id)) { | 2540 | (ev->channel << 8) + ev->id)) { |
2558 | dfailprintk((MYIOC_s_ERR_FMT | 2541 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
2559 | "%s: exit at line=%d\n", ioc->name, | 2542 | "%s: exit at line=%d\n", ioc->name, |
2560 | __FUNCTION__, __LINE__)); | 2543 | __FUNCTION__, __LINE__)); |
2561 | break; | 2544 | break; |
@@ -2575,20 +2558,20 @@ mptsas_hotplug_work(struct work_struct *work) | |||
2575 | * Sanity checks, for non-existing phys and remote rphys. | 2558 | * Sanity checks, for non-existing phys and remote rphys. |
2576 | */ | 2559 | */ |
2577 | if (!phy_info){ | 2560 | if (!phy_info){ |
2578 | dfailprintk((MYIOC_s_ERR_FMT | 2561 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
2579 | "%s: exit at line=%d\n", ioc->name, | 2562 | "%s: exit at line=%d\n", ioc->name, |
2580 | __FUNCTION__, __LINE__)); | 2563 | __FUNCTION__, __LINE__)); |
2581 | break; | 2564 | break; |
2582 | } | 2565 | } |
2583 | if (!phy_info->port_details) { | 2566 | if (!phy_info->port_details) { |
2584 | dfailprintk((MYIOC_s_ERR_FMT | 2567 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
2585 | "%s: exit at line=%d\n", ioc->name, | 2568 | "%s: exit at line=%d\n", ioc->name, |
2586 | __FUNCTION__, __LINE__)); | 2569 | __FUNCTION__, __LINE__)); |
2587 | break; | 2570 | break; |
2588 | } | 2571 | } |
2589 | rphy = mptsas_get_rphy(phy_info); | 2572 | rphy = mptsas_get_rphy(phy_info); |
2590 | if (!rphy) { | 2573 | if (!rphy) { |
2591 | dfailprintk((MYIOC_s_ERR_FMT | 2574 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
2592 | "%s: exit at line=%d\n", ioc->name, | 2575 | "%s: exit at line=%d\n", ioc->name, |
2593 | __FUNCTION__, __LINE__)); | 2576 | __FUNCTION__, __LINE__)); |
2594 | break; | 2577 | break; |
@@ -2596,7 +2579,7 @@ mptsas_hotplug_work(struct work_struct *work) | |||
2596 | 2579 | ||
2597 | port = mptsas_get_port(phy_info); | 2580 | port = mptsas_get_port(phy_info); |
2598 | if (!port) { | 2581 | if (!port) { |
2599 | dfailprintk((MYIOC_s_ERR_FMT | 2582 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
2600 | "%s: exit at line=%d\n", ioc->name, | 2583 | "%s: exit at line=%d\n", ioc->name, |
2601 | __FUNCTION__, __LINE__)); | 2584 | __FUNCTION__, __LINE__)); |
2602 | break; | 2585 | break; |
@@ -2607,7 +2590,7 @@ mptsas_hotplug_work(struct work_struct *work) | |||
2607 | vtarget = starget->hostdata; | 2590 | vtarget = starget->hostdata; |
2608 | 2591 | ||
2609 | if (!vtarget) { | 2592 | if (!vtarget) { |
2610 | dfailprintk((MYIOC_s_ERR_FMT | 2593 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
2611 | "%s: exit at line=%d\n", ioc->name, | 2594 | "%s: exit at line=%d\n", ioc->name, |
2612 | __FUNCTION__, __LINE__)); | 2595 | __FUNCTION__, __LINE__)); |
2613 | break; | 2596 | break; |
@@ -2645,12 +2628,10 @@ mptsas_hotplug_work(struct work_struct *work) | |||
2645 | printk(MYIOC_s_INFO_FMT | 2628 | printk(MYIOC_s_INFO_FMT |
2646 | "removing %s device, channel %d, id %d, phy %d\n", | 2629 | "removing %s device, channel %d, id %d, phy %d\n", |
2647 | ioc->name, ds, ev->channel, ev->id, phy_info->phy_id); | 2630 | ioc->name, ds, ev->channel, ev->id, phy_info->phy_id); |
2648 | #ifdef MPT_DEBUG_SAS_WIDE | ||
2649 | dev_printk(KERN_DEBUG, &port->dev, | 2631 | dev_printk(KERN_DEBUG, &port->dev, |
2650 | "delete port (%d)\n", port->port_identifier); | 2632 | "delete port (%d)\n", port->port_identifier); |
2651 | #endif | ||
2652 | sas_port_delete(port); | 2633 | sas_port_delete(port); |
2653 | mptsas_port_delete(phy_info->port_details); | 2634 | mptsas_port_delete(ioc, phy_info->port_details); |
2654 | break; | 2635 | break; |
2655 | case MPTSAS_ADD_DEVICE: | 2636 | case MPTSAS_ADD_DEVICE: |
2656 | 2637 | ||
@@ -2664,7 +2645,7 @@ mptsas_hotplug_work(struct work_struct *work) | |||
2664 | (MPI_SAS_DEVICE_PGAD_FORM_BUS_TARGET_ID << | 2645 | (MPI_SAS_DEVICE_PGAD_FORM_BUS_TARGET_ID << |
2665 | MPI_SAS_DEVICE_PGAD_FORM_SHIFT), | 2646 | MPI_SAS_DEVICE_PGAD_FORM_SHIFT), |
2666 | (ev->channel << 8) + ev->id)) { | 2647 | (ev->channel << 8) + ev->id)) { |
2667 | dfailprintk((MYIOC_s_ERR_FMT | 2648 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
2668 | "%s: exit at line=%d\n", ioc->name, | 2649 | "%s: exit at line=%d\n", ioc->name, |
2669 | __FUNCTION__, __LINE__)); | 2650 | __FUNCTION__, __LINE__)); |
2670 | break; | 2651 | break; |
@@ -2676,7 +2657,7 @@ mptsas_hotplug_work(struct work_struct *work) | |||
2676 | sas_device.sas_address); | 2657 | sas_device.sas_address); |
2677 | 2658 | ||
2678 | if (!phy_info || !phy_info->port_details) { | 2659 | if (!phy_info || !phy_info->port_details) { |
2679 | dfailprintk((MYIOC_s_ERR_FMT | 2660 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
2680 | "%s: exit at line=%d\n", ioc->name, | 2661 | "%s: exit at line=%d\n", ioc->name, |
2681 | __FUNCTION__, __LINE__)); | 2662 | __FUNCTION__, __LINE__)); |
2682 | break; | 2663 | break; |
@@ -2688,7 +2669,7 @@ mptsas_hotplug_work(struct work_struct *work) | |||
2688 | vtarget = starget->hostdata; | 2669 | vtarget = starget->hostdata; |
2689 | 2670 | ||
2690 | if (!vtarget) { | 2671 | if (!vtarget) { |
2691 | dfailprintk((MYIOC_s_ERR_FMT | 2672 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
2692 | "%s: exit at line=%d\n", ioc->name, | 2673 | "%s: exit at line=%d\n", ioc->name, |
2693 | __FUNCTION__, __LINE__)); | 2674 | __FUNCTION__, __LINE__)); |
2694 | break; | 2675 | break; |
@@ -2711,7 +2692,7 @@ mptsas_hotplug_work(struct work_struct *work) | |||
2711 | } | 2692 | } |
2712 | 2693 | ||
2713 | if (mptsas_get_rphy(phy_info)) { | 2694 | if (mptsas_get_rphy(phy_info)) { |
2714 | dfailprintk((MYIOC_s_ERR_FMT | 2695 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
2715 | "%s: exit at line=%d\n", ioc->name, | 2696 | "%s: exit at line=%d\n", ioc->name, |
2716 | __FUNCTION__, __LINE__)); | 2697 | __FUNCTION__, __LINE__)); |
2717 | if (ev->channel) printk("%d\n", __LINE__); | 2698 | if (ev->channel) printk("%d\n", __LINE__); |
@@ -2720,7 +2701,7 @@ mptsas_hotplug_work(struct work_struct *work) | |||
2720 | 2701 | ||
2721 | port = mptsas_get_port(phy_info); | 2702 | port = mptsas_get_port(phy_info); |
2722 | if (!port) { | 2703 | if (!port) { |
2723 | dfailprintk((MYIOC_s_ERR_FMT | 2704 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
2724 | "%s: exit at line=%d\n", ioc->name, | 2705 | "%s: exit at line=%d\n", ioc->name, |
2725 | __FUNCTION__, __LINE__)); | 2706 | __FUNCTION__, __LINE__)); |
2726 | break; | 2707 | break; |
@@ -2745,7 +2726,7 @@ mptsas_hotplug_work(struct work_struct *work) | |||
2745 | mptsas_parse_device_info(&identify, &phy_info->attached); | 2726 | mptsas_parse_device_info(&identify, &phy_info->attached); |
2746 | rphy = sas_end_device_alloc(port); | 2727 | rphy = sas_end_device_alloc(port); |
2747 | if (!rphy) { | 2728 | if (!rphy) { |
2748 | dfailprintk((MYIOC_s_ERR_FMT | 2729 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
2749 | "%s: exit at line=%d\n", ioc->name, | 2730 | "%s: exit at line=%d\n", ioc->name, |
2750 | __FUNCTION__, __LINE__)); | 2731 | __FUNCTION__, __LINE__)); |
2751 | break; /* non-fatal: an rphy can be added later */ | 2732 | break; /* non-fatal: an rphy can be added later */ |
@@ -2753,13 +2734,13 @@ mptsas_hotplug_work(struct work_struct *work) | |||
2753 | 2734 | ||
2754 | rphy->identify = identify; | 2735 | rphy->identify = identify; |
2755 | if (sas_rphy_add(rphy)) { | 2736 | if (sas_rphy_add(rphy)) { |
2756 | dfailprintk((MYIOC_s_ERR_FMT | 2737 | dfailprintk(ioc, printk(MYIOC_s_ERR_FMT |
2757 | "%s: exit at line=%d\n", ioc->name, | 2738 | "%s: exit at line=%d\n", ioc->name, |
2758 | __FUNCTION__, __LINE__)); | 2739 | __FUNCTION__, __LINE__)); |
2759 | sas_rphy_free(rphy); | 2740 | sas_rphy_free(rphy); |
2760 | break; | 2741 | break; |
2761 | } | 2742 | } |
2762 | mptsas_set_rphy(phy_info, rphy); | 2743 | mptsas_set_rphy(ioc, phy_info, rphy); |
2763 | break; | 2744 | break; |
2764 | case MPTSAS_ADD_RAID: | 2745 | case MPTSAS_ADD_RAID: |
2765 | sdev = scsi_device_lookup(ioc->sh, MPTSAS_RAID_CHANNEL, | 2746 | sdev = scsi_device_lookup(ioc->sh, MPTSAS_RAID_CHANNEL, |
@@ -3175,7 +3156,7 @@ mptsas_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
3175 | 3156 | ||
3176 | if (numSGE < sh->sg_tablesize) { | 3157 | if (numSGE < sh->sg_tablesize) { |
3177 | /* Reset this value */ | 3158 | /* Reset this value */ |
3178 | dprintk((MYIOC_s_INFO_FMT | 3159 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
3179 | "Resetting sg_tablesize to %d from %d\n", | 3160 | "Resetting sg_tablesize to %d from %d\n", |
3180 | ioc->name, numSGE, sh->sg_tablesize)); | 3161 | ioc->name, numSGE, sh->sg_tablesize)); |
3181 | sh->sg_tablesize = numSGE; | 3162 | sh->sg_tablesize = numSGE; |
@@ -3193,7 +3174,7 @@ mptsas_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
3193 | goto out_mptsas_probe; | 3174 | goto out_mptsas_probe; |
3194 | } | 3175 | } |
3195 | 3176 | ||
3196 | dprintk((MYIOC_s_INFO_FMT "ScsiLookup @ %p\n", | 3177 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ScsiLookup @ %p\n", |
3197 | ioc->name, hd->ScsiLookup)); | 3178 | ioc->name, hd->ScsiLookup)); |
3198 | 3179 | ||
3199 | /* Clear the TM flags | 3180 | /* Clear the TM flags |
@@ -3233,7 +3214,7 @@ mptsas_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
3233 | 3214 | ||
3234 | error = scsi_add_host(sh, &ioc->pcidev->dev); | 3215 | error = scsi_add_host(sh, &ioc->pcidev->dev); |
3235 | if (error) { | 3216 | if (error) { |
3236 | dprintk((KERN_ERR MYNAM | 3217 | dprintk(ioc, printk(KERN_ERR MYNAM |
3237 | "scsi_add_host failed\n")); | 3218 | "scsi_add_host failed\n")); |
3238 | goto out_mptsas_probe; | 3219 | goto out_mptsas_probe; |
3239 | } | 3220 | } |
@@ -3261,7 +3242,7 @@ static void __devexit mptsas_remove(struct pci_dev *pdev) | |||
3261 | list_for_each_entry_safe(p, n, &ioc->sas_topology, list) { | 3242 | list_for_each_entry_safe(p, n, &ioc->sas_topology, list) { |
3262 | list_del(&p->list); | 3243 | list_del(&p->list); |
3263 | for (i = 0 ; i < p->num_phys ; i++) | 3244 | for (i = 0 ; i < p->num_phys ; i++) |
3264 | mptsas_port_delete(p->phy_info[i].port_details); | 3245 | mptsas_port_delete(ioc, p->phy_info[i].port_details); |
3265 | kfree(p->phy_info); | 3246 | kfree(p->phy_info); |
3266 | kfree(p); | 3247 | kfree(p); |
3267 | } | 3248 | } |
@@ -3316,15 +3297,8 @@ mptsas_init(void) | |||
3316 | mpt_register(mptscsih_scandv_complete, MPTSAS_DRIVER); | 3297 | mpt_register(mptscsih_scandv_complete, MPTSAS_DRIVER); |
3317 | mptsasMgmtCtx = mpt_register(mptsas_mgmt_done, MPTSAS_DRIVER); | 3298 | mptsasMgmtCtx = mpt_register(mptsas_mgmt_done, MPTSAS_DRIVER); |
3318 | 3299 | ||
3319 | if (mpt_event_register(mptsasDoneCtx, mptsas_event_process) == 0) { | 3300 | mpt_event_register(mptsasDoneCtx, mptsas_event_process); |
3320 | devtverboseprintk((KERN_INFO MYNAM | 3301 | mpt_reset_register(mptsasDoneCtx, mptsas_ioc_reset); |
3321 | ": Registered for IOC event notifications\n")); | ||
3322 | } | ||
3323 | |||
3324 | if (mpt_reset_register(mptsasDoneCtx, mptsas_ioc_reset) == 0) { | ||
3325 | dprintk((KERN_INFO MYNAM | ||
3326 | ": Registered for IOC reset notifications\n")); | ||
3327 | } | ||
3328 | 3302 | ||
3329 | error = pci_register_driver(&mptsas_driver); | 3303 | error = pci_register_driver(&mptsas_driver); |
3330 | if (error) | 3304 | if (error) |
diff --git a/drivers/message/fusion/mptscsih.c b/drivers/message/fusion/mptscsih.c index fd3aa2619f42..5431529741ad 100644 --- a/drivers/message/fusion/mptscsih.c +++ b/drivers/message/fusion/mptscsih.c | |||
@@ -191,7 +191,7 @@ mptscsih_getFreeChainBuffer(MPT_ADAPTER *ioc, int *retIndex) | |||
191 | int rc; | 191 | int rc; |
192 | int chain_idx; | 192 | int chain_idx; |
193 | 193 | ||
194 | dsgprintk((MYIOC_s_INFO_FMT "getFreeChainBuffer called\n", | 194 | dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "getFreeChainBuffer called\n", |
195 | ioc->name)); | 195 | ioc->name)); |
196 | spin_lock_irqsave(&ioc->FreeQlock, flags); | 196 | spin_lock_irqsave(&ioc->FreeQlock, flags); |
197 | if (!list_empty(&ioc->FreeChainQ)) { | 197 | if (!list_empty(&ioc->FreeChainQ)) { |
@@ -203,12 +203,12 @@ mptscsih_getFreeChainBuffer(MPT_ADAPTER *ioc, int *retIndex) | |||
203 | offset = (u8 *)chainBuf - (u8 *)ioc->ChainBuffer; | 203 | offset = (u8 *)chainBuf - (u8 *)ioc->ChainBuffer; |
204 | chain_idx = offset / ioc->req_sz; | 204 | chain_idx = offset / ioc->req_sz; |
205 | rc = SUCCESS; | 205 | rc = SUCCESS; |
206 | dsgprintk((MYIOC_s_ERR_FMT "getFreeChainBuffer chainBuf=%p ChainBuffer=%p offset=%d chain_idx=%d\n", | 206 | dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "getFreeChainBuffer chainBuf=%p ChainBuffer=%p offset=%d chain_idx=%d\n", |
207 | ioc->name, chainBuf, ioc->ChainBuffer, offset, chain_idx)); | 207 | ioc->name, chainBuf, ioc->ChainBuffer, offset, chain_idx)); |
208 | } else { | 208 | } else { |
209 | rc = FAILED; | 209 | rc = FAILED; |
210 | chain_idx = MPT_HOST_NO_CHAIN; | 210 | chain_idx = MPT_HOST_NO_CHAIN; |
211 | dfailprintk((MYIOC_s_INFO_FMT "getFreeChainBuffer failed\n", | 211 | dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT "getFreeChainBuffer failed\n", |
212 | ioc->name)); | 212 | ioc->name)); |
213 | } | 213 | } |
214 | spin_unlock_irqrestore(&ioc->FreeQlock, flags); | 214 | spin_unlock_irqrestore(&ioc->FreeQlock, flags); |
@@ -337,7 +337,7 @@ nextSGEset: | |||
337 | */ | 337 | */ |
338 | pReq->ChainOffset = 0; | 338 | pReq->ChainOffset = 0; |
339 | RequestNB = (((sgeOffset - 1) >> ioc->NBShiftFactor) + 1) & 0x03; | 339 | RequestNB = (((sgeOffset - 1) >> ioc->NBShiftFactor) + 1) & 0x03; |
340 | dsgprintk((MYIOC_s_INFO_FMT | 340 | dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
341 | "Single Buffer RequestNB=%x, sgeOffset=%d\n", ioc->name, RequestNB, sgeOffset)); | 341 | "Single Buffer RequestNB=%x, sgeOffset=%d\n", ioc->name, RequestNB, sgeOffset)); |
342 | ioc->RequestNB[req_idx] = RequestNB; | 342 | ioc->RequestNB[req_idx] = RequestNB; |
343 | } | 343 | } |
@@ -353,7 +353,7 @@ nextSGEset: | |||
353 | * Loop until done. | 353 | * Loop until done. |
354 | */ | 354 | */ |
355 | 355 | ||
356 | dsgprintk((MYIOC_s_INFO_FMT "SG: Chain Required! sg done %d\n", | 356 | dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "SG: Chain Required! sg done %d\n", |
357 | ioc->name, sg_done)); | 357 | ioc->name, sg_done)); |
358 | 358 | ||
359 | /* Set LAST_ELEMENT flag for last non-chain element | 359 | /* Set LAST_ELEMENT flag for last non-chain element |
@@ -386,7 +386,7 @@ nextSGEset: | |||
386 | */ | 386 | */ |
387 | pReq->ChainOffset = (u8) (sgeOffset >> 2); | 387 | pReq->ChainOffset = (u8) (sgeOffset >> 2); |
388 | RequestNB = (((sgeOffset - 1) >> ioc->NBShiftFactor) + 1) & 0x03; | 388 | RequestNB = (((sgeOffset - 1) >> ioc->NBShiftFactor) + 1) & 0x03; |
389 | dsgprintk((MYIOC_s_ERR_FMT "Chain Buffer Needed, RequestNB=%x sgeOffset=%d\n", ioc->name, RequestNB, sgeOffset)); | 389 | dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Chain Buffer Needed, RequestNB=%x sgeOffset=%d\n", ioc->name, RequestNB, sgeOffset)); |
390 | ioc->RequestNB[req_idx] = RequestNB; | 390 | ioc->RequestNB[req_idx] = RequestNB; |
391 | } | 391 | } |
392 | 392 | ||
@@ -397,7 +397,7 @@ nextSGEset: | |||
397 | * in current buffer. Get a chain buffer. | 397 | * in current buffer. Get a chain buffer. |
398 | */ | 398 | */ |
399 | if ((mptscsih_getFreeChainBuffer(ioc, &newIndex)) == FAILED) { | 399 | if ((mptscsih_getFreeChainBuffer(ioc, &newIndex)) == FAILED) { |
400 | dfailprintk((MYIOC_s_INFO_FMT | 400 | dfailprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
401 | "getFreeChainBuffer FAILED SCSI cmd=%02x (%p)\n", | 401 | "getFreeChainBuffer FAILED SCSI cmd=%02x (%p)\n", |
402 | ioc->name, pReq->CDB[0], SCpnt)); | 402 | ioc->name, pReq->CDB[0], SCpnt)); |
403 | return FAILED; | 403 | return FAILED; |
@@ -419,7 +419,7 @@ nextSGEset: | |||
419 | * out the Address and Flags fields. | 419 | * out the Address and Flags fields. |
420 | */ | 420 | */ |
421 | chainSge = (char *) psge; | 421 | chainSge = (char *) psge; |
422 | dsgprintk((KERN_INFO " Current buff @ %p (index 0x%x)", | 422 | dsgprintk(ioc, printk(KERN_DEBUG " Current buff @ %p (index 0x%x)", |
423 | psge, req_idx)); | 423 | psge, req_idx)); |
424 | 424 | ||
425 | /* Start the SGE for the next buffer | 425 | /* Start the SGE for the next buffer |
@@ -428,7 +428,7 @@ nextSGEset: | |||
428 | sgeOffset = 0; | 428 | sgeOffset = 0; |
429 | sg_done = 0; | 429 | sg_done = 0; |
430 | 430 | ||
431 | dsgprintk((KERN_INFO " Chain buff @ %p (index 0x%x)\n", | 431 | dsgprintk(ioc, printk(KERN_DEBUG " Chain buff @ %p (index 0x%x)\n", |
432 | psge, chain_idx)); | 432 | psge, chain_idx)); |
433 | 433 | ||
434 | /* Start the SGE for the next buffer | 434 | /* Start the SGE for the next buffer |
@@ -456,7 +456,7 @@ mptscsih_issue_sep_command(MPT_ADAPTER *ioc, VirtTarget *vtarget, | |||
456 | return; | 456 | return; |
457 | 457 | ||
458 | if ((mf = mpt_get_msg_frame(ioc->InternalCtx, ioc)) == NULL) { | 458 | if ((mf = mpt_get_msg_frame(ioc->InternalCtx, ioc)) == NULL) { |
459 | dfailprintk((MYIOC_s_WARN_FMT "%s: no msg frames!!\n", | 459 | dfailprintk(ioc, printk(MYIOC_s_WARN_FMT "%s: no msg frames!!\n", |
460 | ioc->name,__FUNCTION__)); | 460 | ioc->name,__FUNCTION__)); |
461 | return; | 461 | return; |
462 | } | 462 | } |
@@ -467,93 +467,158 @@ mptscsih_issue_sep_command(MPT_ADAPTER *ioc, VirtTarget *vtarget, | |||
467 | SEPMsg->TargetID = vtarget->id; | 467 | SEPMsg->TargetID = vtarget->id; |
468 | SEPMsg->Action = MPI_SEP_REQ_ACTION_WRITE_STATUS; | 468 | SEPMsg->Action = MPI_SEP_REQ_ACTION_WRITE_STATUS; |
469 | SEPMsg->SlotStatus = SlotStatus; | 469 | SEPMsg->SlotStatus = SlotStatus; |
470 | devtverboseprintk((MYIOC_s_WARN_FMT | 470 | devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
471 | "Sending SEP cmd=%x channel=%d id=%d\n", | 471 | "Sending SEP cmd=%x channel=%d id=%d\n", |
472 | ioc->name, SlotStatus, SEPMsg->Bus, SEPMsg->TargetID)); | 472 | ioc->name, SlotStatus, SEPMsg->Bus, SEPMsg->TargetID)); |
473 | mpt_put_msg_frame(ioc->DoneCtx, ioc, mf); | 473 | mpt_put_msg_frame(ioc->DoneCtx, ioc, mf); |
474 | } | 474 | } |
475 | 475 | ||
476 | #ifdef MPT_DEBUG_REPLY | 476 | #ifdef CONFIG_FUSION_LOGGING |
477 | /** | 477 | /** |
478 | * mptscsih_iocstatus_info_scsiio - IOCSTATUS information for SCSIIO | 478 | * mptscsih_info_scsiio - debug print info on reply frame |
479 | * @ioc: Pointer to MPT_ADAPTER structure | 479 | * @ioc: Pointer to MPT_ADAPTER structure |
480 | * @ioc_status: U32 IOCStatus word from IOC | ||
481 | * @scsi_status: U8 sam status from target | ||
482 | * @scsi_state: U8 scsi state | ||
483 | * @sc: original scsi cmnd pointer | 480 | * @sc: original scsi cmnd pointer |
484 | * @mf: Pointer to MPT request frame | 481 | * @pScsiReply: Pointer to MPT reply frame |
482 | * | ||
483 | * MPT_DEBUG_REPLY needs to be enabled to obtain this info | ||
485 | * | 484 | * |
486 | * Refer to lsi/mpi.h. | 485 | * Refer to lsi/mpi.h. |
487 | **/ | 486 | **/ |
488 | static void | 487 | static void |
489 | mptscsih_iocstatus_info_scsiio(MPT_ADAPTER *ioc, u32 ioc_status, | 488 | mptscsih_info_scsiio(MPT_ADAPTER *ioc, struct scsi_cmnd *sc, SCSIIOReply_t * pScsiReply) |
490 | u8 scsi_status, u8 scsi_state, struct scsi_cmnd *sc) | ||
491 | { | 489 | { |
492 | char extend_desc[EVENT_DESCR_STR_SZ]; | 490 | char *desc = NULL; |
493 | char *desc = NULL; | 491 | char *desc1 = NULL; |
492 | u16 ioc_status; | ||
493 | u8 skey, asc, ascq; | ||
494 | |||
495 | ioc_status = le16_to_cpu(pScsiReply->IOCStatus) & MPI_IOCSTATUS_MASK; | ||
494 | 496 | ||
495 | switch (ioc_status) { | 497 | switch (ioc_status) { |
496 | 498 | ||
497 | case MPI_IOCSTATUS_SCSI_INVALID_BUS: /* 0x0041 */ | 499 | case MPI_IOCSTATUS_SUCCESS: |
498 | desc = "SCSI Invalid Bus"; | 500 | desc = "success"; |
499 | break; | 501 | break; |
500 | 502 | case MPI_IOCSTATUS_SCSI_INVALID_BUS: | |
501 | case MPI_IOCSTATUS_SCSI_INVALID_TARGETID: /* 0x0042 */ | 503 | desc = "invalid bus"; |
502 | desc = "SCSI Invalid TargetID"; | ||
503 | break; | 504 | break; |
504 | 505 | case MPI_IOCSTATUS_SCSI_INVALID_TARGETID: | |
505 | case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE: /* 0x0043 */ | 506 | desc = "invalid target_id"; |
506 | /* | ||
507 | * Inquiry is issued for device scanning | ||
508 | */ | ||
509 | if (sc->cmnd[0] != 0x12) | ||
510 | desc = "SCSI Device Not There"; | ||
511 | break; | 507 | break; |
512 | 508 | case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE: | |
513 | case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: /* 0x0044 */ | 509 | desc = "device not there"; |
514 | desc = "SCSI Data Overrun"; | ||
515 | break; | 510 | break; |
516 | 511 | case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: | |
517 | case MPI_IOCSTATUS_SCSI_IO_DATA_ERROR: /* 0x0046 */ | 512 | desc = "data overrun"; |
518 | desc = "SCSI I/O Data Error"; | ||
519 | break; | 513 | break; |
520 | 514 | case MPI_IOCSTATUS_SCSI_DATA_UNDERRUN: | |
521 | case MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR: /* 0x0047 */ | 515 | desc = "data underrun"; |
522 | desc = "SCSI Protocol Error"; | ||
523 | break; | 516 | break; |
524 | 517 | case MPI_IOCSTATUS_SCSI_IO_DATA_ERROR: | |
525 | case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: /* 0x0048 */ | 518 | desc = "I/O data error"; |
526 | desc = "SCSI Task Terminated"; | ||
527 | break; | 519 | break; |
528 | 520 | case MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR: | |
529 | case MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: /* 0x0049 */ | 521 | desc = "protocol error"; |
530 | desc = "SCSI Residual Mismatch"; | ||
531 | break; | 522 | break; |
532 | 523 | case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: | |
533 | case MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED: /* 0x004A */ | 524 | desc = "task terminated"; |
534 | desc = "SCSI Task Management Failed"; | ||
535 | break; | 525 | break; |
536 | 526 | case MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: | |
537 | case MPI_IOCSTATUS_SCSI_IOC_TERMINATED: /* 0x004B */ | 527 | desc = "residual mismatch"; |
538 | desc = "SCSI IOC Terminated"; | 528 | break; |
529 | case MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED: | ||
530 | desc = "task management failed"; | ||
531 | break; | ||
532 | case MPI_IOCSTATUS_SCSI_IOC_TERMINATED: | ||
533 | desc = "IOC terminated"; | ||
534 | break; | ||
535 | case MPI_IOCSTATUS_SCSI_EXT_TERMINATED: | ||
536 | desc = "ext terminated"; | ||
539 | break; | 537 | break; |
538 | default: | ||
539 | desc = ""; | ||
540 | break; | ||
541 | } | ||
542 | |||
543 | switch (pScsiReply->SCSIStatus) | ||
544 | { | ||
540 | 545 | ||
541 | case MPI_IOCSTATUS_SCSI_EXT_TERMINATED: /* 0x004C */ | 546 | case MPI_SCSI_STATUS_SUCCESS: |
542 | desc = "SCSI Ext Terminated"; | 547 | desc1 = "success"; |
548 | break; | ||
549 | case MPI_SCSI_STATUS_CHECK_CONDITION: | ||
550 | desc1 = "check condition"; | ||
551 | break; | ||
552 | case MPI_SCSI_STATUS_CONDITION_MET: | ||
553 | desc1 = "condition met"; | ||
554 | break; | ||
555 | case MPI_SCSI_STATUS_BUSY: | ||
556 | desc1 = "busy"; | ||
557 | break; | ||
558 | case MPI_SCSI_STATUS_INTERMEDIATE: | ||
559 | desc1 = "intermediate"; | ||
560 | break; | ||
561 | case MPI_SCSI_STATUS_INTERMEDIATE_CONDMET: | ||
562 | desc1 = "intermediate condmet"; | ||
563 | break; | ||
564 | case MPI_SCSI_STATUS_RESERVATION_CONFLICT: | ||
565 | desc1 = "reservation conflict"; | ||
566 | break; | ||
567 | case MPI_SCSI_STATUS_COMMAND_TERMINATED: | ||
568 | desc1 = "command terminated"; | ||
569 | break; | ||
570 | case MPI_SCSI_STATUS_TASK_SET_FULL: | ||
571 | desc1 = "task set full"; | ||
572 | break; | ||
573 | case MPI_SCSI_STATUS_ACA_ACTIVE: | ||
574 | desc1 = "aca active"; | ||
575 | break; | ||
576 | case MPI_SCSI_STATUS_FCPEXT_DEVICE_LOGGED_OUT: | ||
577 | desc1 = "fcpext device logged out"; | ||
578 | break; | ||
579 | case MPI_SCSI_STATUS_FCPEXT_NO_LINK: | ||
580 | desc1 = "fcpext no link"; | ||
581 | break; | ||
582 | case MPI_SCSI_STATUS_FCPEXT_UNASSIGNED: | ||
583 | desc1 = "fcpext unassigned"; | ||
584 | break; | ||
585 | default: | ||
586 | desc1 = ""; | ||
543 | break; | 587 | break; |
544 | } | 588 | } |
545 | 589 | ||
546 | if (!desc) | 590 | scsi_print_command(sc); |
547 | return; | 591 | printk(KERN_DEBUG "\tfw_channel = %d, fw_id = %d\n", |
592 | pScsiReply->Bus, pScsiReply->TargetID); | ||
593 | printk(KERN_DEBUG "\trequest_len = %d, underflow = %d, resid = %d\n", | ||
594 | scsi_bufflen(sc), sc->underflow, scsi_get_resid(sc)); | ||
595 | printk(KERN_DEBUG "\ttag = %d, transfer_count = %d, sc->result = %08X\n", | ||
596 | le16_to_cpu(pScsiReply->TaskTag), | ||
597 | le32_to_cpu(pScsiReply->TransferCount), sc->result); | ||
548 | 598 | ||
549 | snprintf(extend_desc, EVENT_DESCR_STR_SZ, | 599 | printk(KERN_DEBUG "\tiocstatus = %s (0x%04x), " |
550 | "[%d:%d:%d:%d] cmd=%02Xh, sam_status=%02Xh state=%02Xh", | 600 | "scsi_status = %s (0x%02x), scsi_state = (0x%02x)\n", |
551 | sc->device->host->host_no, | 601 | desc, ioc_status, |
552 | sc->device->channel, sc->device->id, sc->device->lun, | 602 | desc1, pScsiReply->SCSIStatus, |
553 | sc->cmnd[0], scsi_status, scsi_state); | 603 | pScsiReply->SCSIState); |
554 | 604 | ||
555 | printk(MYIOC_s_INFO_FMT "IOCStatus(0x%04X): %s: %s\n", | 605 | if (pScsiReply->SCSIState & MPI_SCSI_STATE_AUTOSENSE_VALID) { |
556 | ioc->name, ioc_status, desc, extend_desc); | 606 | skey = sc->sense_buffer[2] & 0x0F; |
607 | asc = sc->sense_buffer[12]; | ||
608 | ascq = sc->sense_buffer[13]; | ||
609 | |||
610 | printk(KERN_DEBUG "\t[sense_key,asc,ascq]: " | ||
611 | "[0x%02x,0x%02x,0x%02x]\n", | ||
612 | skey, asc, ascq); | ||
613 | } | ||
614 | |||
615 | /* | ||
616 | * Look for + dump FCP ResponseInfo[]! | ||
617 | */ | ||
618 | if (pScsiReply->SCSIState & MPI_SCSI_STATE_RESPONSE_INFO_VALID && | ||
619 | pScsiReply->ResponseInfo) | ||
620 | printk(KERN_DEBUG "response_info = %08xh\n", | ||
621 | le32_to_cpu(pScsiReply->ResponseInfo)); | ||
557 | } | 622 | } |
558 | #endif | 623 | #endif |
559 | 624 | ||
@@ -627,11 +692,11 @@ mptscsih_io_done(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *mr) | |||
627 | pScsiReply = (SCSIIOReply_t *) mr; | 692 | pScsiReply = (SCSIIOReply_t *) mr; |
628 | 693 | ||
629 | if((ioc->facts.MsgVersion >= MPI_VERSION_01_05) && pScsiReply){ | 694 | if((ioc->facts.MsgVersion >= MPI_VERSION_01_05) && pScsiReply){ |
630 | dmfprintk((MYIOC_s_INFO_FMT | 695 | dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
631 | "ScsiDone (mf=%p,mr=%p,sc=%p,idx=%d,task-tag=%d)\n", | 696 | "ScsiDone (mf=%p,mr=%p,sc=%p,idx=%d,task-tag=%d)\n", |
632 | ioc->name, mf, mr, sc, req_idx, pScsiReply->TaskTag)); | 697 | ioc->name, mf, mr, sc, req_idx, pScsiReply->TaskTag)); |
633 | }else{ | 698 | }else{ |
634 | dmfprintk((MYIOC_s_INFO_FMT | 699 | dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
635 | "ScsiDone (mf=%p,mr=%p,sc=%p,idx=%d)\n", | 700 | "ScsiDone (mf=%p,mr=%p,sc=%p,idx=%d)\n", |
636 | ioc->name, mf, mr, sc, req_idx)); | 701 | ioc->name, mf, mr, sc, req_idx)); |
637 | } | 702 | } |
@@ -759,7 +824,7 @@ mptscsih_io_done(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *mr) | |||
759 | sc->result=DID_SOFT_ERROR << 16; | 824 | sc->result=DID_SOFT_ERROR << 16; |
760 | else /* Sufficient data transfer occurred */ | 825 | else /* Sufficient data transfer occurred */ |
761 | sc->result = (DID_OK << 16) | scsi_status; | 826 | sc->result = (DID_OK << 16) | scsi_status; |
762 | dreplyprintk((KERN_NOTICE | 827 | dreplyprintk(ioc, printk(KERN_DEBUG |
763 | "RESIDUAL_MISMATCH: result=%x on channel=%d id=%d\n", | 828 | "RESIDUAL_MISMATCH: result=%x on channel=%d id=%d\n", |
764 | sc->result, sc->device->channel, sc->device->id)); | 829 | sc->result, sc->device->channel, sc->device->id)); |
765 | break; | 830 | break; |
@@ -792,9 +857,11 @@ mptscsih_io_done(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *mr) | |||
792 | } | 857 | } |
793 | } | 858 | } |
794 | 859 | ||
795 | dreplyprintk((KERN_NOTICE " sc->underflow={report ERR if < %02xh bytes xfer'd}\n", | 860 | |
861 | dreplyprintk(ioc, printk(KERN_DEBUG " sc->underflow={report ERR if < %02xh bytes xfer'd}\n", | ||
796 | sc->underflow)); | 862 | sc->underflow)); |
797 | dreplyprintk((KERN_NOTICE " ActBytesXferd=%02xh\n", xfer_cnt)); | 863 | dreplyprintk(ioc, printk(KERN_DEBUG " ActBytesXferd=%02xh\n", xfer_cnt)); |
864 | |||
798 | /* Report Queue Full | 865 | /* Report Queue Full |
799 | */ | 866 | */ |
800 | if (scsi_status == MPI_SCSI_STATUS_TASK_SET_FULL) | 867 | if (scsi_status == MPI_SCSI_STATUS_TASK_SET_FULL) |
@@ -871,27 +938,9 @@ mptscsih_io_done(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *mr) | |||
871 | 938 | ||
872 | } /* switch(status) */ | 939 | } /* switch(status) */ |
873 | 940 | ||
874 | #ifdef MPT_DEBUG_REPLY | 941 | #ifdef CONFIG_FUSION_LOGGING |
875 | if (sc->result) { | 942 | if (sc->result && (ioc->debug_level & MPT_DEBUG_REPLY)) |
876 | 943 | mptscsih_info_scsiio(ioc, sc, pScsiReply); | |
877 | mptscsih_iocstatus_info_scsiio(ioc, status, | ||
878 | scsi_status, scsi_state, sc); | ||
879 | |||
880 | dreplyprintk(("%s: [%d:%d:%d:%d] cmd=0x%02x " | ||
881 | "result=0x%08x\n\tiocstatus=0x%04X " | ||
882 | "scsi_state=0x%02X scsi_status=0x%02X " | ||
883 | "loginfo=0x%08X\n", __FUNCTION__, | ||
884 | sc->device->host->host_no, sc->device->channel, sc->device->id, | ||
885 | sc->device->lun, sc->cmnd[0], sc->result, status, | ||
886 | scsi_state, scsi_status, log_info)); | ||
887 | |||
888 | dreplyprintk(("%s: [%d:%d:%d:%d] resid=%d " | ||
889 | "bufflen=%d xfer_cnt=%d\n", __FUNCTION__, | ||
890 | sc->device->host->host_no, | ||
891 | sc->device->channel, sc->device->id, | ||
892 | sc->device->lun, scsi_get_resid(sc), | ||
893 | scsi_bufflen(sc), xfer_cnt)); | ||
894 | } | ||
895 | #endif | 944 | #endif |
896 | 945 | ||
897 | } /* end of address reply case */ | 946 | } /* end of address reply case */ |
@@ -925,7 +974,7 @@ mptscsih_flush_running_cmds(MPT_SCSI_HOST *hd) | |||
925 | int ii; | 974 | int ii; |
926 | int max = ioc->req_depth; | 975 | int max = ioc->req_depth; |
927 | 976 | ||
928 | dprintk((KERN_INFO MYNAM ": flush_ScsiLookup called\n")); | 977 | dprintk(ioc, printk(KERN_DEBUG MYNAM ": flush_ScsiLookup called\n")); |
929 | for (ii= 0; ii < max; ii++) { | 978 | for (ii= 0; ii < max; ii++) { |
930 | if ((SCpnt = hd->ScsiLookup[ii]) != NULL) { | 979 | if ((SCpnt = hd->ScsiLookup[ii]) != NULL) { |
931 | 980 | ||
@@ -937,7 +986,7 @@ mptscsih_flush_running_cmds(MPT_SCSI_HOST *hd) | |||
937 | hd->ScsiLookup[ii] = NULL; | 986 | hd->ScsiLookup[ii] = NULL; |
938 | 987 | ||
939 | mf = MPT_INDEX_2_MFPTR(ioc, ii); | 988 | mf = MPT_INDEX_2_MFPTR(ioc, ii); |
940 | dmfprintk(( "flush: ScsiDone (mf=%p,sc=%p)\n", | 989 | dmfprintk(ioc, printk(KERN_DEBUG MYNAM ": flush: ScsiDone (mf=%p,sc=%p)\n", |
941 | mf, SCpnt)); | 990 | mf, SCpnt)); |
942 | 991 | ||
943 | /* Free Chain buffers */ | 992 | /* Free Chain buffers */ |
@@ -987,7 +1036,7 @@ mptscsih_search_running_cmds(MPT_SCSI_HOST *hd, VirtDevice *vdevice) | |||
987 | struct scsi_cmnd *sc; | 1036 | struct scsi_cmnd *sc; |
988 | struct scsi_lun lun; | 1037 | struct scsi_lun lun; |
989 | 1038 | ||
990 | dsprintk((KERN_INFO MYNAM ": search_running channel %d id %d lun %d max %d\n", | 1039 | dsprintk(hd->ioc, printk(KERN_DEBUG MYNAM ": search_running channel %d id %d lun %d max %d\n", |
991 | vdevice->vtarget->channel, vdevice->vtarget->id, vdevice->lun, max)); | 1040 | vdevice->vtarget->channel, vdevice->vtarget->id, vdevice->lun, max)); |
992 | 1041 | ||
993 | for (ii=0; ii < max; ii++) { | 1042 | for (ii=0; ii < max; ii++) { |
@@ -1020,9 +1069,9 @@ mptscsih_search_running_cmds(MPT_SCSI_HOST *hd, VirtDevice *vdevice) | |||
1020 | scsi_dma_unmap(sc); | 1069 | scsi_dma_unmap(sc); |
1021 | sc->host_scribble = NULL; | 1070 | sc->host_scribble = NULL; |
1022 | sc->result = DID_NO_CONNECT << 16; | 1071 | sc->result = DID_NO_CONNECT << 16; |
1023 | dsprintk(( "search_running: found (sc=%p, mf = %p) " | 1072 | sdev_printk(KERN_INFO, sc->device, "completing cmds: fw_channel %d," |
1024 | "channel %d id %d, lun %d \n", sc, mf, | 1073 | "fw_id %d, sc=%p, mf = %p, idx=%x\n", vdevice->vtarget->channel, |
1025 | vdevice->vtarget->channel, vdevice->vtarget->id, vdevice->lun)); | 1074 | vdevice->vtarget->id, sc, mf, ii); |
1026 | sc->scsi_done(sc); | 1075 | sc->scsi_done(sc); |
1027 | } | 1076 | } |
1028 | } | 1077 | } |
@@ -1057,7 +1106,7 @@ mptscsih_report_queue_full(struct scsi_cmnd *sc, SCSIIOReply_t *pScsiReply, SCSI | |||
1057 | return; | 1106 | return; |
1058 | 1107 | ||
1059 | if (time - hd->last_queue_full > 10 * HZ) { | 1108 | if (time - hd->last_queue_full > 10 * HZ) { |
1060 | dprintk((MYIOC_s_WARN_FMT "Device (%d:%d:%d) reported QUEUE_FULL!\n", | 1109 | dprintk(hd->ioc, printk(MYIOC_s_WARN_FMT "Device (%d:%d:%d) reported QUEUE_FULL!\n", |
1061 | hd->ioc->name, 0, sc->device->id, sc->device->lun)); | 1110 | hd->ioc->name, 0, sc->device->id, sc->device->lun)); |
1062 | hd->last_queue_full = time; | 1111 | hd->last_queue_full = time; |
1063 | } | 1112 | } |
@@ -1098,7 +1147,7 @@ mptscsih_remove(struct pci_dev *pdev) | |||
1098 | hd->ScsiLookup = NULL; | 1147 | hd->ScsiLookup = NULL; |
1099 | } | 1148 | } |
1100 | 1149 | ||
1101 | dprintk((MYIOC_s_INFO_FMT | 1150 | dprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT |
1102 | "Free'd ScsiLookup (%d) memory\n", | 1151 | "Free'd ScsiLookup (%d) memory\n", |
1103 | hd->ioc->name, sz1)); | 1152 | hd->ioc->name, sz1)); |
1104 | 1153 | ||
@@ -1317,17 +1366,19 @@ mptscsih_qcmd(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *)) | |||
1317 | u32 cmd_len; | 1366 | u32 cmd_len; |
1318 | int my_idx; | 1367 | int my_idx; |
1319 | int ii; | 1368 | int ii; |
1369 | MPT_ADAPTER *ioc; | ||
1320 | 1370 | ||
1321 | hd = (MPT_SCSI_HOST *) SCpnt->device->host->hostdata; | 1371 | hd = (MPT_SCSI_HOST *) SCpnt->device->host->hostdata; |
1372 | ioc = hd->ioc; | ||
1322 | lun = SCpnt->device->lun; | 1373 | lun = SCpnt->device->lun; |
1323 | SCpnt->scsi_done = done; | 1374 | SCpnt->scsi_done = done; |
1324 | 1375 | ||
1325 | dmfprintk((MYIOC_s_INFO_FMT "qcmd: SCpnt=%p, done()=%p\n", | 1376 | dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "qcmd: SCpnt=%p, done()=%p\n", |
1326 | (hd && hd->ioc) ? hd->ioc->name : "ioc?", SCpnt, done)); | 1377 | ioc->name, SCpnt, done)); |
1327 | 1378 | ||
1328 | if (hd->resetPending) { | 1379 | if (hd->resetPending) { |
1329 | dtmprintk((MYIOC_s_WARN_FMT "qcmd: SCpnt=%p timeout + 60HZ\n", | 1380 | dtmprintk(ioc, printk(MYIOC_s_WARN_FMT "qcmd: SCpnt=%p timeout + 60HZ\n", |
1330 | (hd && hd->ioc) ? hd->ioc->name : "ioc?", SCpnt)); | 1381 | ioc->name, SCpnt)); |
1331 | return SCSI_MLQUEUE_HOST_BUSY; | 1382 | return SCSI_MLQUEUE_HOST_BUSY; |
1332 | } | 1383 | } |
1333 | 1384 | ||
@@ -1335,8 +1386,8 @@ mptscsih_qcmd(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *)) | |||
1335 | * Put together a MPT SCSI request... | 1386 | * Put together a MPT SCSI request... |
1336 | */ | 1387 | */ |
1337 | if ((mf = mpt_get_msg_frame(hd->ioc->DoneCtx, hd->ioc)) == NULL) { | 1388 | if ((mf = mpt_get_msg_frame(hd->ioc->DoneCtx, hd->ioc)) == NULL) { |
1338 | dprintk((MYIOC_s_WARN_FMT "QueueCmd, no msg frames!!\n", | 1389 | dprintk(ioc, printk(MYIOC_s_WARN_FMT "QueueCmd, no msg frames!!\n", |
1339 | hd->ioc->name)); | 1390 | ioc->name)); |
1340 | return SCSI_MLQUEUE_HOST_BUSY; | 1391 | return SCSI_MLQUEUE_HOST_BUSY; |
1341 | } | 1392 | } |
1342 | 1393 | ||
@@ -1422,9 +1473,9 @@ mptscsih_qcmd(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *)) | |||
1422 | hd->ScsiLookup[my_idx] = SCpnt; | 1473 | hd->ScsiLookup[my_idx] = SCpnt; |
1423 | 1474 | ||
1424 | mpt_put_msg_frame(hd->ioc->DoneCtx, hd->ioc, mf); | 1475 | mpt_put_msg_frame(hd->ioc->DoneCtx, hd->ioc, mf); |
1425 | dmfprintk((MYIOC_s_INFO_FMT "Issued SCSI cmd (%p) mf=%p idx=%d\n", | 1476 | dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Issued SCSI cmd (%p) mf=%p idx=%d\n", |
1426 | hd->ioc->name, SCpnt, mf, my_idx)); | 1477 | ioc->name, SCpnt, mf, my_idx)); |
1427 | DBG_DUMP_REQUEST_FRAME(mf) | 1478 | DBG_DUMP_REQUEST_FRAME(ioc, (u32 *)mf) |
1428 | return 0; | 1479 | return 0; |
1429 | 1480 | ||
1430 | fail: | 1481 | fail: |
@@ -1475,7 +1526,7 @@ mptscsih_freeChainBuffers(MPT_ADAPTER *ioc, int req_idx) | |||
1475 | list_add_tail(&chain->u.frame.linkage.list, &ioc->FreeChainQ); | 1526 | list_add_tail(&chain->u.frame.linkage.list, &ioc->FreeChainQ); |
1476 | spin_unlock_irqrestore(&ioc->FreeQlock, flags); | 1527 | spin_unlock_irqrestore(&ioc->FreeQlock, flags); |
1477 | 1528 | ||
1478 | dmfprintk((MYIOC_s_INFO_FMT "FreeChainBuffers (index %d)\n", | 1529 | dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "FreeChainBuffers (index %d)\n", |
1479 | ioc->name, chain_idx)); | 1530 | ioc->name, chain_idx)); |
1480 | 1531 | ||
1481 | /* handle next */ | 1532 | /* handle next */ |
@@ -1519,7 +1570,7 @@ mptscsih_TMHandler(MPT_SCSI_HOST *hd, u8 type, u8 channel, u8 id, int lun, int c | |||
1519 | unsigned long flags; | 1570 | unsigned long flags; |
1520 | 1571 | ||
1521 | ioc = hd->ioc; | 1572 | ioc = hd->ioc; |
1522 | dtmprintk((MYIOC_s_INFO_FMT "TMHandler Entered!\n", ioc->name)); | 1573 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "TMHandler Entered!\n", ioc->name)); |
1523 | 1574 | ||
1524 | // SJR - CHECKME - Can we avoid this here? | 1575 | // SJR - CHECKME - Can we avoid this here? |
1525 | // (mpt_HardResetHandler has this check...) | 1576 | // (mpt_HardResetHandler has this check...) |
@@ -1539,20 +1590,20 @@ mptscsih_TMHandler(MPT_SCSI_HOST *hd, u8 type, u8 channel, u8 id, int lun, int c | |||
1539 | */ | 1590 | */ |
1540 | if (mptscsih_tm_pending_wait(hd) == FAILED) { | 1591 | if (mptscsih_tm_pending_wait(hd) == FAILED) { |
1541 | if (type == MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK) { | 1592 | if (type == MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK) { |
1542 | dtmprintk((KERN_INFO MYNAM ": %s: TMHandler abort: " | 1593 | dtmprintk(ioc, printk(KERN_DEBUG MYNAM ": %s: TMHandler abort: " |
1543 | "Timed out waiting for last TM (%d) to complete! \n", | 1594 | "Timed out waiting for last TM (%d) to complete! \n", |
1544 | hd->ioc->name, hd->tmPending)); | 1595 | ioc->name, hd->tmPending)); |
1545 | return FAILED; | 1596 | return FAILED; |
1546 | } else if (type == MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET) { | 1597 | } else if (type == MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET) { |
1547 | dtmprintk((KERN_INFO MYNAM ": %s: TMHandler target " | 1598 | dtmprintk(ioc, printk(KERN_DEBUG MYNAM ": %s: TMHandler target " |
1548 | "reset: Timed out waiting for last TM (%d) " | 1599 | "reset: Timed out waiting for last TM (%d) " |
1549 | "to complete! \n", hd->ioc->name, | 1600 | "to complete! \n", ioc->name, |
1550 | hd->tmPending)); | 1601 | hd->tmPending)); |
1551 | return FAILED; | 1602 | return FAILED; |
1552 | } else if (type == MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS) { | 1603 | } else if (type == MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS) { |
1553 | dtmprintk((KERN_INFO MYNAM ": %s: TMHandler bus reset: " | 1604 | dtmprintk(ioc, printk(KERN_DEBUG MYNAM ": %s: TMHandler bus reset: " |
1554 | "Timed out waiting for last TM (%d) to complete! \n", | 1605 | "Timed out waiting for last TM (%d) to complete! \n", |
1555 | hd->ioc->name, hd->tmPending)); | 1606 | ioc->name, hd->tmPending)); |
1556 | return FAILED; | 1607 | return FAILED; |
1557 | } | 1608 | } |
1558 | } else { | 1609 | } else { |
@@ -1591,12 +1642,13 @@ mptscsih_TMHandler(MPT_SCSI_HOST *hd, u8 type, u8 channel, u8 id, int lun, int c | |||
1591 | ctx2abort, timeout); | 1642 | ctx2abort, timeout); |
1592 | if (rc) | 1643 | if (rc) |
1593 | printk(MYIOC_s_INFO_FMT "Issue of TaskMgmt failed!\n", | 1644 | printk(MYIOC_s_INFO_FMT "Issue of TaskMgmt failed!\n", |
1594 | hd->ioc->name); | 1645 | ioc->name); |
1595 | else | 1646 | else |
1596 | dtmprintk((MYIOC_s_INFO_FMT "Issue of TaskMgmt Successful!\n", | 1647 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Issue of TaskMgmt Successful!\n", |
1597 | hd->ioc->name)); | 1648 | ioc->name)); |
1598 | 1649 | ||
1599 | dtmprintk((MYIOC_s_INFO_FMT "TMHandler rc = %d!\n", hd->ioc->name, rc)); | 1650 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
1651 | "TMHandler rc = %d!\n", ioc->name, rc)); | ||
1600 | 1652 | ||
1601 | return rc; | 1653 | return rc; |
1602 | } | 1654 | } |
@@ -1632,11 +1684,11 @@ mptscsih_IssueTaskMgmt(MPT_SCSI_HOST *hd, u8 type, u8 channel, u8 id, int lun, i | |||
1632 | /* Return Fail to calling function if no message frames available. | 1684 | /* Return Fail to calling function if no message frames available. |
1633 | */ | 1685 | */ |
1634 | if ((mf = mpt_get_msg_frame(hd->ioc->TaskCtx, hd->ioc)) == NULL) { | 1686 | if ((mf = mpt_get_msg_frame(hd->ioc->TaskCtx, hd->ioc)) == NULL) { |
1635 | dfailprintk((MYIOC_s_ERR_FMT "IssueTaskMgmt, no msg frames!!\n", | 1687 | dfailprintk(hd->ioc, printk(MYIOC_s_ERR_FMT "IssueTaskMgmt, no msg frames!!\n", |
1636 | hd->ioc->name)); | 1688 | hd->ioc->name)); |
1637 | return FAILED; | 1689 | return FAILED; |
1638 | } | 1690 | } |
1639 | dtmprintk((MYIOC_s_INFO_FMT "IssueTaskMgmt request @ %p\n", | 1691 | dtmprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "IssueTaskMgmt request @ %p\n", |
1640 | hd->ioc->name, mf)); | 1692 | hd->ioc->name, mf)); |
1641 | 1693 | ||
1642 | /* Format the Request | 1694 | /* Format the Request |
@@ -1660,27 +1712,27 @@ mptscsih_IssueTaskMgmt(MPT_SCSI_HOST *hd, u8 type, u8 channel, u8 id, int lun, i | |||
1660 | 1712 | ||
1661 | pScsiTm->TaskMsgContext = ctx2abort; | 1713 | pScsiTm->TaskMsgContext = ctx2abort; |
1662 | 1714 | ||
1663 | dtmprintk((MYIOC_s_INFO_FMT "IssueTaskMgmt: ctx2abort (0x%08x) " | 1715 | dtmprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "IssueTaskMgmt: ctx2abort (0x%08x) " |
1664 | "type=%d\n", hd->ioc->name, ctx2abort, type)); | 1716 | "type=%d\n", hd->ioc->name, ctx2abort, type)); |
1665 | 1717 | ||
1666 | DBG_DUMP_TM_REQUEST_FRAME((u32 *)pScsiTm); | 1718 | DBG_DUMP_TM_REQUEST_FRAME(ioc, (u32 *)pScsiTm); |
1667 | 1719 | ||
1668 | if ((retval = mpt_send_handshake_request(hd->ioc->TaskCtx, hd->ioc, | 1720 | if ((retval = mpt_send_handshake_request(hd->ioc->TaskCtx, hd->ioc, |
1669 | sizeof(SCSITaskMgmt_t), (u32*)pScsiTm, CAN_SLEEP)) != 0) { | 1721 | sizeof(SCSITaskMgmt_t), (u32*)pScsiTm, CAN_SLEEP)) != 0) { |
1670 | dfailprintk((MYIOC_s_ERR_FMT "send_handshake FAILED!" | 1722 | dfailprintk(hd->ioc, printk(MYIOC_s_ERR_FMT "send_handshake FAILED!" |
1671 | " (hd %p, ioc %p, mf %p, rc=%d) \n", hd->ioc->name, hd, | 1723 | " (hd %p, ioc %p, mf %p, rc=%d) \n", hd->ioc->name, hd, |
1672 | hd->ioc, mf, retval)); | 1724 | hd->ioc, mf, retval)); |
1673 | goto fail_out; | 1725 | goto fail_out; |
1674 | } | 1726 | } |
1675 | 1727 | ||
1676 | if(mptscsih_tm_wait_for_completion(hd, timeout) == FAILED) { | 1728 | if(mptscsih_tm_wait_for_completion(hd, timeout) == FAILED) { |
1677 | dfailprintk((MYIOC_s_ERR_FMT "task management request TIMED OUT!" | 1729 | dfailprintk(hd->ioc, printk(MYIOC_s_ERR_FMT "task management request TIMED OUT!" |
1678 | " (hd %p, ioc %p, mf %p) \n", hd->ioc->name, hd, | 1730 | " (hd %p, ioc %p, mf %p) \n", hd->ioc->name, hd, |
1679 | hd->ioc, mf)); | 1731 | hd->ioc, mf)); |
1680 | dtmprintk((MYIOC_s_INFO_FMT "Calling HardReset! \n", | 1732 | dtmprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "Calling HardReset! \n", |
1681 | hd->ioc->name)); | 1733 | hd->ioc->name)); |
1682 | retval = mpt_HardResetHandler(hd->ioc, CAN_SLEEP); | 1734 | retval = mpt_HardResetHandler(hd->ioc, CAN_SLEEP); |
1683 | dtmprintk((MYIOC_s_INFO_FMT "rc=%d \n", | 1735 | dtmprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "rc=%d \n", |
1684 | hd->ioc->name, retval)); | 1736 | hd->ioc->name, retval)); |
1685 | goto fail_out; | 1737 | goto fail_out; |
1686 | } | 1738 | } |
@@ -1748,8 +1800,8 @@ mptscsih_abort(struct scsi_cmnd * SCpnt) | |||
1748 | if ((hd = (MPT_SCSI_HOST *) SCpnt->device->host->hostdata) == NULL) { | 1800 | if ((hd = (MPT_SCSI_HOST *) SCpnt->device->host->hostdata) == NULL) { |
1749 | SCpnt->result = DID_RESET << 16; | 1801 | SCpnt->result = DID_RESET << 16; |
1750 | SCpnt->scsi_done(SCpnt); | 1802 | SCpnt->scsi_done(SCpnt); |
1751 | dfailprintk((KERN_INFO MYNAM ": mptscsih_abort: Can't locate " | 1803 | printk(KERN_DEBUG MYNAM ": mptscsih_abort: Can't locate " |
1752 | "host! (sc=%p)\n", SCpnt)); | 1804 | "host! (sc=%p)\n", SCpnt); |
1753 | return FAILED; | 1805 | return FAILED; |
1754 | } | 1806 | } |
1755 | 1807 | ||
@@ -1760,7 +1812,7 @@ mptscsih_abort(struct scsi_cmnd * SCpnt) | |||
1760 | 1812 | ||
1761 | vdevice = SCpnt->device->hostdata; | 1813 | vdevice = SCpnt->device->hostdata; |
1762 | if (!vdevice || !vdevice->vtarget) { | 1814 | if (!vdevice || !vdevice->vtarget) { |
1763 | dtmprintk((MYIOC_s_DEBUG_FMT "task abort: device has been " | 1815 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "task abort: device has been " |
1764 | "deleted (sc=%p)\n", ioc->name, SCpnt)); | 1816 | "deleted (sc=%p)\n", ioc->name, SCpnt)); |
1765 | SCpnt->result = DID_NO_CONNECT << 16; | 1817 | SCpnt->result = DID_NO_CONNECT << 16; |
1766 | SCpnt->scsi_done(SCpnt); | 1818 | SCpnt->scsi_done(SCpnt); |
@@ -1771,7 +1823,7 @@ mptscsih_abort(struct scsi_cmnd * SCpnt) | |||
1771 | /* Task aborts are not supported for hidden raid components. | 1823 | /* Task aborts are not supported for hidden raid components. |
1772 | */ | 1824 | */ |
1773 | if (vdevice->vtarget->tflags & MPT_TARGET_FLAGS_RAID_COMPONENT) { | 1825 | if (vdevice->vtarget->tflags & MPT_TARGET_FLAGS_RAID_COMPONENT) { |
1774 | dtmprintk((MYIOC_s_DEBUG_FMT "task abort: hidden raid " | 1826 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "task abort: hidden raid " |
1775 | "component (sc=%p)\n", ioc->name, SCpnt)); | 1827 | "component (sc=%p)\n", ioc->name, SCpnt)); |
1776 | SCpnt->result = DID_RESET << 16; | 1828 | SCpnt->result = DID_RESET << 16; |
1777 | retval = FAILED; | 1829 | retval = FAILED; |
@@ -1785,7 +1837,7 @@ mptscsih_abort(struct scsi_cmnd * SCpnt) | |||
1785 | * Do OS callback. | 1837 | * Do OS callback. |
1786 | */ | 1838 | */ |
1787 | SCpnt->result = DID_RESET << 16; | 1839 | SCpnt->result = DID_RESET << 16; |
1788 | dtmprintk((KERN_INFO MYNAM ": %s: mptscsih_abort: " | 1840 | dtmprintk(ioc, printk(KERN_DEBUG MYNAM ": %s: mptscsih_abort: " |
1789 | "Command not in the active list! (sc=%p)\n", ioc->name, | 1841 | "Command not in the active list! (sc=%p)\n", ioc->name, |
1790 | SCpnt)); | 1842 | SCpnt)); |
1791 | retval = 0; | 1843 | retval = 0; |
@@ -1850,8 +1902,8 @@ mptscsih_dev_reset(struct scsi_cmnd * SCpnt) | |||
1850 | /* If we can't locate our host adapter structure, return FAILED status. | 1902 | /* If we can't locate our host adapter structure, return FAILED status. |
1851 | */ | 1903 | */ |
1852 | if ((hd = (MPT_SCSI_HOST *) SCpnt->device->host->hostdata) == NULL){ | 1904 | if ((hd = (MPT_SCSI_HOST *) SCpnt->device->host->hostdata) == NULL){ |
1853 | dtmprintk((KERN_INFO MYNAM ": mptscsih_dev_reset: Can't " | 1905 | printk(KERN_DEBUG MYNAM ": mptscsih_dev_reset: Can't " |
1854 | "locate host! (sc=%p)\n", SCpnt)); | 1906 | "locate host! (sc=%p)\n", SCpnt); |
1855 | return FAILED; | 1907 | return FAILED; |
1856 | } | 1908 | } |
1857 | 1909 | ||
@@ -1913,8 +1965,8 @@ mptscsih_bus_reset(struct scsi_cmnd * SCpnt) | |||
1913 | /* If we can't locate our host adapter structure, return FAILED status. | 1965 | /* If we can't locate our host adapter structure, return FAILED status. |
1914 | */ | 1966 | */ |
1915 | if ((hd = (MPT_SCSI_HOST *) SCpnt->device->host->hostdata) == NULL){ | 1967 | if ((hd = (MPT_SCSI_HOST *) SCpnt->device->host->hostdata) == NULL){ |
1916 | dtmprintk((KERN_INFO MYNAM ": mptscsih_bus_reset: Can't " | 1968 | printk(KERN_DEBUG MYNAM ": mptscsih_bus_reset: Can't " |
1917 | "locate host! (sc=%p)\n", SCpnt )); | 1969 | "locate host! (sc=%p)\n", SCpnt ); |
1918 | return FAILED; | 1970 | return FAILED; |
1919 | } | 1971 | } |
1920 | 1972 | ||
@@ -1957,8 +2009,8 @@ mptscsih_host_reset(struct scsi_cmnd *SCpnt) | |||
1957 | 2009 | ||
1958 | /* If we can't locate the host to reset, then we failed. */ | 2010 | /* If we can't locate the host to reset, then we failed. */ |
1959 | if ((hd = (MPT_SCSI_HOST *) SCpnt->device->host->hostdata) == NULL){ | 2011 | if ((hd = (MPT_SCSI_HOST *) SCpnt->device->host->hostdata) == NULL){ |
1960 | dtmprintk( ( KERN_INFO MYNAM ": mptscsih_host_reset: Can't " | 2012 | printk( KERN_DEBUG MYNAM ": mptscsih_host_reset: Can't " |
1961 | "locate host! (sc=%p)\n", SCpnt)); | 2013 | "locate host! (sc=%p)\n", SCpnt); |
1962 | return FAILED; | 2014 | return FAILED; |
1963 | } | 2015 | } |
1964 | 2016 | ||
@@ -2106,16 +2158,16 @@ mptscsih_taskmgmt_complete(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *m | |||
2106 | u8 tmType; | 2158 | u8 tmType; |
2107 | u32 termination_count; | 2159 | u32 termination_count; |
2108 | 2160 | ||
2109 | dtmprintk((MYIOC_s_WARN_FMT "TaskMgmt completed (mf=%p,mr=%p)\n", | 2161 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "TaskMgmt completed (mf=%p,mr=%p)\n", |
2110 | ioc->name, mf, mr)); | 2162 | ioc->name, mf, mr)); |
2111 | if (!ioc->sh) { | 2163 | if (!ioc->sh) { |
2112 | dtmprintk((MYIOC_s_WARN_FMT | 2164 | dtmprintk(ioc, printk(MYIOC_s_WARN_FMT |
2113 | "TaskMgmt Complete: NULL Scsi Host Ptr\n", ioc->name)); | 2165 | "TaskMgmt Complete: NULL Scsi Host Ptr\n", ioc->name)); |
2114 | return 1; | 2166 | return 1; |
2115 | } | 2167 | } |
2116 | 2168 | ||
2117 | if (mr == NULL) { | 2169 | if (mr == NULL) { |
2118 | dtmprintk((MYIOC_s_WARN_FMT | 2170 | dtmprintk(ioc, printk(MYIOC_s_WARN_FMT |
2119 | "ERROR! TaskMgmt Reply: NULL Request %p\n", ioc->name, mf)); | 2171 | "ERROR! TaskMgmt Reply: NULL Request %p\n", ioc->name, mf)); |
2120 | return 1; | 2172 | return 1; |
2121 | } | 2173 | } |
@@ -2131,19 +2183,21 @@ mptscsih_taskmgmt_complete(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *m | |||
2131 | pScsiTmReply->ResponseCode) | 2183 | pScsiTmReply->ResponseCode) |
2132 | mptscsih_taskmgmt_response_code(ioc, | 2184 | mptscsih_taskmgmt_response_code(ioc, |
2133 | pScsiTmReply->ResponseCode); | 2185 | pScsiTmReply->ResponseCode); |
2134 | DBG_DUMP_TM_REPLY_FRAME((u32 *)pScsiTmReply); | 2186 | DBG_DUMP_TM_REPLY_FRAME(ioc, (u32 *)pScsiTmReply); |
2135 | 2187 | ||
2136 | #if defined(MPT_DEBUG_REPLY) || defined(MPT_DEBUG_TM) | 2188 | #ifdef CONFIG_FUSION_LOGGING |
2137 | printk("%s: ha=%d [%d:%d:0] task_type=0x%02X " | 2189 | if ((ioc->debug_level & MPT_DEBUG_REPLY) || |
2138 | "iocstatus=0x%04X\n\tloginfo=0x%08X response_code=0x%02X " | 2190 | (ioc->debug_level & MPT_DEBUG_TM )) |
2139 | "term_cmnds=%d\n", __FUNCTION__, ioc->id, pScsiTmReply->Bus, | 2191 | printk("%s: ha=%d [%d:%d:0] task_type=0x%02X " |
2140 | pScsiTmReply->TargetID, pScsiTmReq->TaskType, | 2192 | "iocstatus=0x%04X\n\tloginfo=0x%08X response_code=0x%02X " |
2141 | le16_to_cpu(pScsiTmReply->IOCStatus), | 2193 | "term_cmnds=%d\n", __FUNCTION__, ioc->id, pScsiTmReply->Bus, |
2142 | le32_to_cpu(pScsiTmReply->IOCLogInfo),pScsiTmReply->ResponseCode, | 2194 | pScsiTmReply->TargetID, pScsiTmReq->TaskType, |
2143 | le32_to_cpu(pScsiTmReply->TerminationCount)); | 2195 | le16_to_cpu(pScsiTmReply->IOCStatus), |
2196 | le32_to_cpu(pScsiTmReply->IOCLogInfo),pScsiTmReply->ResponseCode, | ||
2197 | le32_to_cpu(pScsiTmReply->TerminationCount)); | ||
2144 | #endif | 2198 | #endif |
2145 | if (!iocstatus) { | 2199 | if (!iocstatus) { |
2146 | dtmprintk((MYIOC_s_WARN_FMT " TaskMgmt SUCCESS\n", ioc->name)); | 2200 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT " TaskMgmt SUCCESS\n", ioc->name)); |
2147 | hd->abortSCpnt = NULL; | 2201 | hd->abortSCpnt = NULL; |
2148 | goto out; | 2202 | goto out; |
2149 | } | 2203 | } |
@@ -2224,10 +2278,6 @@ mptscsih_bios_param(struct scsi_device * sdev, struct block_device *bdev, | |||
2224 | geom[1] = sectors; | 2278 | geom[1] = sectors; |
2225 | geom[2] = cylinders; | 2279 | geom[2] = cylinders; |
2226 | 2280 | ||
2227 | dprintk((KERN_NOTICE | ||
2228 | ": bios_param: Id=%i Lun=%i Channel=%i CHS=%i/%i/%i\n", | ||
2229 | sdev->id, sdev->lun, sdev->channel, (int)cylinders, heads, sectors)); | ||
2230 | |||
2231 | return 0; | 2281 | return 0; |
2232 | } | 2282 | } |
2233 | 2283 | ||
@@ -2393,11 +2443,11 @@ mptscsih_slave_configure(struct scsi_device *sdev) | |||
2393 | vtarget = starget->hostdata; | 2443 | vtarget = starget->hostdata; |
2394 | vdevice = sdev->hostdata; | 2444 | vdevice = sdev->hostdata; |
2395 | 2445 | ||
2396 | dsprintk((MYIOC_s_INFO_FMT | 2446 | dsprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT |
2397 | "device @ %p, channel=%d, id=%d, lun=%d\n", | 2447 | "device @ %p, channel=%d, id=%d, lun=%d\n", |
2398 | hd->ioc->name, sdev, sdev->channel, sdev->id, sdev->lun)); | 2448 | hd->ioc->name, sdev, sdev->channel, sdev->id, sdev->lun)); |
2399 | if (hd->ioc->bus_type == SPI) | 2449 | if (hd->ioc->bus_type == SPI) |
2400 | dsprintk((MYIOC_s_INFO_FMT | 2450 | dsprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT |
2401 | "sdtr %d wdtr %d ppr %d inq length=%d\n", | 2451 | "sdtr %d wdtr %d ppr %d inq length=%d\n", |
2402 | hd->ioc->name, sdev->sdtr, sdev->wdtr, | 2452 | hd->ioc->name, sdev->sdtr, sdev->wdtr, |
2403 | sdev->ppr, sdev->inquiry_len)); | 2453 | sdev->ppr, sdev->inquiry_len)); |
@@ -2411,19 +2461,19 @@ mptscsih_slave_configure(struct scsi_device *sdev) | |||
2411 | vdevice->configured_lun = 1; | 2461 | vdevice->configured_lun = 1; |
2412 | mptscsih_change_queue_depth(sdev, MPT_SCSI_CMD_PER_DEV_HIGH); | 2462 | mptscsih_change_queue_depth(sdev, MPT_SCSI_CMD_PER_DEV_HIGH); |
2413 | 2463 | ||
2414 | dsprintk((MYIOC_s_INFO_FMT | 2464 | dsprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT |
2415 | "Queue depth=%d, tflags=%x\n", | 2465 | "Queue depth=%d, tflags=%x\n", |
2416 | hd->ioc->name, sdev->queue_depth, vtarget->tflags)); | 2466 | hd->ioc->name, sdev->queue_depth, vtarget->tflags)); |
2417 | 2467 | ||
2418 | if (hd->ioc->bus_type == SPI) | 2468 | if (hd->ioc->bus_type == SPI) |
2419 | dsprintk((MYIOC_s_INFO_FMT | 2469 | dsprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT |
2420 | "negoFlags=%x, maxOffset=%x, SyncFactor=%x\n", | 2470 | "negoFlags=%x, maxOffset=%x, SyncFactor=%x\n", |
2421 | hd->ioc->name, vtarget->negoFlags, vtarget->maxOffset, | 2471 | hd->ioc->name, vtarget->negoFlags, vtarget->maxOffset, |
2422 | vtarget->minSyncFactor)); | 2472 | vtarget->minSyncFactor)); |
2423 | 2473 | ||
2424 | slave_configure_exit: | 2474 | slave_configure_exit: |
2425 | 2475 | ||
2426 | dsprintk((MYIOC_s_INFO_FMT | 2476 | dsprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT |
2427 | "tagged %d, simple %d, ordered %d\n", | 2477 | "tagged %d, simple %d, ordered %d\n", |
2428 | hd->ioc->name,sdev->tagged_supported, sdev->simple_tags, | 2478 | hd->ioc->name,sdev->tagged_supported, sdev->simple_tags, |
2429 | sdev->ordered_tags)); | 2479 | sdev->ordered_tags)); |
@@ -2490,7 +2540,7 @@ mptscsih_copy_sense_data(struct scsi_cmnd *sc, MPT_SCSI_HOST *hd, MPT_FRAME_HDR | |||
2490 | } | 2540 | } |
2491 | } | 2541 | } |
2492 | } else { | 2542 | } else { |
2493 | dprintk((MYIOC_s_INFO_FMT "Hmmm... SenseData len=0! (?)\n", | 2543 | dprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "Hmmm... SenseData len=0! (?)\n", |
2494 | hd->ioc->name)); | 2544 | hd->ioc->name)); |
2495 | } | 2545 | } |
2496 | } | 2546 | } |
@@ -2520,7 +2570,7 @@ mptscsih_ioc_reset(MPT_ADAPTER *ioc, int reset_phase) | |||
2520 | unsigned long flags; | 2570 | unsigned long flags; |
2521 | int ii; | 2571 | int ii; |
2522 | 2572 | ||
2523 | dtmprintk((KERN_WARNING MYNAM | 2573 | dtmprintk(ioc, printk(KERN_DEBUG MYNAM |
2524 | ": IOC %s_reset routed to SCSI host driver!\n", | 2574 | ": IOC %s_reset routed to SCSI host driver!\n", |
2525 | reset_phase==MPT_IOC_SETUP_RESET ? "setup" : ( | 2575 | reset_phase==MPT_IOC_SETUP_RESET ? "setup" : ( |
2526 | reset_phase==MPT_IOC_PRE_RESET ? "pre" : "post"))); | 2576 | reset_phase==MPT_IOC_PRE_RESET ? "pre" : "post"))); |
@@ -2535,7 +2585,7 @@ mptscsih_ioc_reset(MPT_ADAPTER *ioc, int reset_phase) | |||
2535 | hd = (MPT_SCSI_HOST *) ioc->sh->hostdata; | 2585 | hd = (MPT_SCSI_HOST *) ioc->sh->hostdata; |
2536 | 2586 | ||
2537 | if (reset_phase == MPT_IOC_SETUP_RESET) { | 2587 | if (reset_phase == MPT_IOC_SETUP_RESET) { |
2538 | dtmprintk((MYIOC_s_WARN_FMT "Setup-Diag Reset\n", ioc->name)); | 2588 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Setup-Diag Reset\n", ioc->name)); |
2539 | 2589 | ||
2540 | /* Clean Up: | 2590 | /* Clean Up: |
2541 | * 1. Set Hard Reset Pending Flag | 2591 | * 1. Set Hard Reset Pending Flag |
@@ -2544,7 +2594,7 @@ mptscsih_ioc_reset(MPT_ADAPTER *ioc, int reset_phase) | |||
2544 | hd->resetPending = 1; | 2594 | hd->resetPending = 1; |
2545 | 2595 | ||
2546 | } else if (reset_phase == MPT_IOC_PRE_RESET) { | 2596 | } else if (reset_phase == MPT_IOC_PRE_RESET) { |
2547 | dtmprintk((MYIOC_s_WARN_FMT "Pre-Diag Reset\n", ioc->name)); | 2597 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Pre-Diag Reset\n", ioc->name)); |
2548 | 2598 | ||
2549 | /* 2. Flush running commands | 2599 | /* 2. Flush running commands |
2550 | * Clean ScsiLookup (and associated memory) | 2600 | * Clean ScsiLookup (and associated memory) |
@@ -2564,10 +2614,10 @@ mptscsih_ioc_reset(MPT_ADAPTER *ioc, int reset_phase) | |||
2564 | mpt_free_msg_frame(ioc, hd->cmdPtr); | 2614 | mpt_free_msg_frame(ioc, hd->cmdPtr); |
2565 | } | 2615 | } |
2566 | 2616 | ||
2567 | dtmprintk((MYIOC_s_WARN_FMT "Pre-Reset complete.\n", ioc->name)); | 2617 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Pre-Reset complete.\n", ioc->name)); |
2568 | 2618 | ||
2569 | } else { | 2619 | } else { |
2570 | dtmprintk((MYIOC_s_WARN_FMT "Post-Diag Reset\n", ioc->name)); | 2620 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Post-Diag Reset\n", ioc->name)); |
2571 | 2621 | ||
2572 | /* Once a FW reload begins, all new OS commands are | 2622 | /* Once a FW reload begins, all new OS commands are |
2573 | * redirected to the doneQ w/ a reset status. | 2623 | * redirected to the doneQ w/ a reset status. |
@@ -2607,7 +2657,7 @@ mptscsih_ioc_reset(MPT_ADAPTER *ioc, int reset_phase) | |||
2607 | hd->cmdPtr = NULL; | 2657 | hd->cmdPtr = NULL; |
2608 | } | 2658 | } |
2609 | 2659 | ||
2610 | dtmprintk((MYIOC_s_WARN_FMT "Post-Reset complete.\n", ioc->name)); | 2660 | dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Post-Reset complete.\n", ioc->name)); |
2611 | 2661 | ||
2612 | } | 2662 | } |
2613 | 2663 | ||
@@ -2621,7 +2671,7 @@ mptscsih_event_process(MPT_ADAPTER *ioc, EventNotificationReply_t *pEvReply) | |||
2621 | MPT_SCSI_HOST *hd; | 2671 | MPT_SCSI_HOST *hd; |
2622 | u8 event = le32_to_cpu(pEvReply->Event) & 0xFF; | 2672 | u8 event = le32_to_cpu(pEvReply->Event) & 0xFF; |
2623 | 2673 | ||
2624 | devtverboseprintk((MYIOC_s_INFO_FMT "MPT event (=%02Xh) routed to SCSI host driver!\n", | 2674 | devtverboseprintk(ioc, printk(MYIOC_s_DEBUG_FMT "MPT event (=%02Xh) routed to SCSI host driver!\n", |
2625 | ioc->name, event)); | 2675 | ioc->name, event)); |
2626 | 2676 | ||
2627 | if (ioc->sh == NULL || | 2677 | if (ioc->sh == NULL || |
@@ -2663,7 +2713,7 @@ mptscsih_event_process(MPT_ADAPTER *ioc, EventNotificationReply_t *pEvReply) | |||
2663 | case MPI_EVENT_STATE_CHANGE: /* 02 */ | 2713 | case MPI_EVENT_STATE_CHANGE: /* 02 */ |
2664 | case MPI_EVENT_EVENT_CHANGE: /* 0A */ | 2714 | case MPI_EVENT_EVENT_CHANGE: /* 0A */ |
2665 | default: | 2715 | default: |
2666 | dprintk((KERN_INFO " Ignoring event (=%02Xh)\n", event)); | 2716 | dprintk(ioc, printk(KERN_DEBUG MYNAM ": Ignoring event (=%02Xh)\n", event)); |
2667 | break; | 2717 | break; |
2668 | } | 2718 | } |
2669 | 2719 | ||
@@ -2724,7 +2774,7 @@ mptscsih_scandv_complete(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *mr) | |||
2724 | } | 2774 | } |
2725 | hd->cmdPtr = NULL; | 2775 | hd->cmdPtr = NULL; |
2726 | 2776 | ||
2727 | ddvprintk((MYIOC_s_INFO_FMT "ScanDvComplete (mf=%p,mr=%p,idx=%d)\n", | 2777 | ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ScanDvComplete (mf=%p,mr=%p,idx=%d)\n", |
2728 | hd->ioc->name, mf, mr, req_idx)); | 2778 | hd->ioc->name, mf, mr, req_idx)); |
2729 | 2779 | ||
2730 | hd->pLocal = &hd->localReply; | 2780 | hd->pLocal = &hd->localReply; |
@@ -2744,9 +2794,6 @@ mptscsih_scandv_complete(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *mr) | |||
2744 | status = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK; | 2794 | status = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK; |
2745 | scsi_status = pReply->SCSIStatus; | 2795 | scsi_status = pReply->SCSIStatus; |
2746 | 2796 | ||
2747 | ddvtprintk((KERN_NOTICE " IOCStatus=%04xh, SCSIState=%02xh, SCSIStatus=%02xh, IOCLogInfo=%08xh\n", | ||
2748 | status, pReply->SCSIState, scsi_status, | ||
2749 | le32_to_cpu(pReply->IOCLogInfo))); | ||
2750 | 2797 | ||
2751 | switch(status) { | 2798 | switch(status) { |
2752 | 2799 | ||
@@ -2799,7 +2846,7 @@ mptscsih_scandv_complete(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *mr) | |||
2799 | SCSI_STD_SENSE_BYTES); | 2846 | SCSI_STD_SENSE_BYTES); |
2800 | memcpy(hd->pLocal->sense, sense_data, sz); | 2847 | memcpy(hd->pLocal->sense, sense_data, sz); |
2801 | 2848 | ||
2802 | ddvprintk((KERN_NOTICE " Check Condition, sense ptr %p\n", | 2849 | ddvprintk(ioc, printk(KERN_DEBUG " Check Condition, sense ptr %p\n", |
2803 | sense_data)); | 2850 | sense_data)); |
2804 | } else if (pReply->SCSIState & MPI_SCSI_STATE_AUTOSENSE_FAILED) { | 2851 | } else if (pReply->SCSIState & MPI_SCSI_STATE_AUTOSENSE_FAILED) { |
2805 | if (pReq->CDB[0] == INQUIRY) | 2852 | if (pReq->CDB[0] == INQUIRY) |
@@ -2830,8 +2877,6 @@ mptscsih_scandv_complete(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *mr) | |||
2830 | 2877 | ||
2831 | } /* switch(status) */ | 2878 | } /* switch(status) */ |
2832 | 2879 | ||
2833 | ddvtprintk((KERN_NOTICE " completionCode set to %08xh\n", | ||
2834 | completionCode)); | ||
2835 | } /* end of address reply case */ | 2880 | } /* end of address reply case */ |
2836 | 2881 | ||
2837 | hd->pLocal->completion = completionCode; | 2882 | hd->pLocal->completion = completionCode; |
@@ -2862,7 +2907,7 @@ mptscsih_timer_expired(unsigned long data) | |||
2862 | { | 2907 | { |
2863 | MPT_SCSI_HOST *hd = (MPT_SCSI_HOST *) data; | 2908 | MPT_SCSI_HOST *hd = (MPT_SCSI_HOST *) data; |
2864 | 2909 | ||
2865 | ddvprintk((MYIOC_s_WARN_FMT "Timer Expired! Cmd %p\n", hd->ioc->name, hd->cmdPtr)); | 2910 | ddvprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "Timer Expired! Cmd %p\n", hd->ioc->name, hd->cmdPtr)); |
2866 | 2911 | ||
2867 | if (hd->cmdPtr) { | 2912 | if (hd->cmdPtr) { |
2868 | MPIHeader_t *cmd = (MPIHeader_t *)hd->cmdPtr; | 2913 | MPIHeader_t *cmd = (MPIHeader_t *)hd->cmdPtr; |
@@ -2874,7 +2919,6 @@ mptscsih_timer_expired(unsigned long data) | |||
2874 | * If new eh code, do nothing. Wait for OS cmd timeout | 2919 | * If new eh code, do nothing. Wait for OS cmd timeout |
2875 | * for bus reset. | 2920 | * for bus reset. |
2876 | */ | 2921 | */ |
2877 | ddvtprintk((MYIOC_s_NOTE_FMT "DV Cmd Timeout: NoOp\n", hd->ioc->name)); | ||
2878 | } else { | 2922 | } else { |
2879 | /* Perform a FW reload */ | 2923 | /* Perform a FW reload */ |
2880 | if (mpt_HardResetHandler(hd->ioc, NO_SLEEP) < 0) { | 2924 | if (mpt_HardResetHandler(hd->ioc, NO_SLEEP) < 0) { |
@@ -2891,7 +2935,7 @@ mptscsih_timer_expired(unsigned long data) | |||
2891 | * The FW will reply to all outstanding commands, callback will finish cleanup. | 2935 | * The FW will reply to all outstanding commands, callback will finish cleanup. |
2892 | * Hard reset clean-up will free all resources. | 2936 | * Hard reset clean-up will free all resources. |
2893 | */ | 2937 | */ |
2894 | ddvprintk((MYIOC_s_WARN_FMT "Timer Expired Complete!\n", hd->ioc->name)); | 2938 | ddvprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "Timer Expired Complete!\n", hd->ioc->name)); |
2895 | 2939 | ||
2896 | return; | 2940 | return; |
2897 | } | 2941 | } |
@@ -2932,7 +2976,7 @@ mptscsih_do_cmd(MPT_SCSI_HOST *hd, INTERNAL_CMD *io) | |||
2932 | 2976 | ||
2933 | in_isr = in_interrupt(); | 2977 | in_isr = in_interrupt(); |
2934 | if (in_isr) { | 2978 | if (in_isr) { |
2935 | dprintk((MYIOC_s_WARN_FMT "Internal SCSI IO request not allowed in ISR context!\n", | 2979 | dprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "Internal SCSI IO request not allowed in ISR context!\n", |
2936 | hd->ioc->name)); | 2980 | hd->ioc->name)); |
2937 | return -EPERM; | 2981 | return -EPERM; |
2938 | } | 2982 | } |
@@ -3035,7 +3079,7 @@ mptscsih_do_cmd(MPT_SCSI_HOST *hd, INTERNAL_CMD *io) | |||
3035 | /* Get and Populate a free Frame | 3079 | /* Get and Populate a free Frame |
3036 | */ | 3080 | */ |
3037 | if ((mf = mpt_get_msg_frame(hd->ioc->InternalCtx, hd->ioc)) == NULL) { | 3081 | if ((mf = mpt_get_msg_frame(hd->ioc->InternalCtx, hd->ioc)) == NULL) { |
3038 | ddvprintk((MYIOC_s_WARN_FMT "No msg frames!\n", | 3082 | ddvprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "No msg frames!\n", |
3039 | hd->ioc->name)); | 3083 | hd->ioc->name)); |
3040 | return -EBUSY; | 3084 | return -EBUSY; |
3041 | } | 3085 | } |
@@ -3075,7 +3119,7 @@ mptscsih_do_cmd(MPT_SCSI_HOST *hd, INTERNAL_CMD *io) | |||
3075 | 3119 | ||
3076 | if (cmd == REQUEST_SENSE) { | 3120 | if (cmd == REQUEST_SENSE) { |
3077 | pScsiReq->Control = cpu_to_le32(dir | MPI_SCSIIO_CONTROL_UNTAGGED); | 3121 | pScsiReq->Control = cpu_to_le32(dir | MPI_SCSIIO_CONTROL_UNTAGGED); |
3078 | ddvprintk((MYIOC_s_INFO_FMT "Untagged! 0x%2x\n", | 3122 | ddvprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "Untagged! 0x%2x\n", |
3079 | hd->ioc->name, cmd)); | 3123 | hd->ioc->name, cmd)); |
3080 | } | 3124 | } |
3081 | 3125 | ||
@@ -3086,7 +3130,7 @@ mptscsih_do_cmd(MPT_SCSI_HOST *hd, INTERNAL_CMD *io) | |||
3086 | pScsiReq->SenseBufferLowAddr = cpu_to_le32(hd->ioc->sense_buf_low_dma | 3130 | pScsiReq->SenseBufferLowAddr = cpu_to_le32(hd->ioc->sense_buf_low_dma |
3087 | + (my_idx * MPT_SENSE_BUFFER_ALLOC)); | 3131 | + (my_idx * MPT_SENSE_BUFFER_ALLOC)); |
3088 | 3132 | ||
3089 | ddvprintk((MYIOC_s_INFO_FMT "Sending Command 0x%x for (%d:%d:%d)\n", | 3133 | ddvprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "Sending Command 0x%x for (%d:%d:%d)\n", |
3090 | hd->ioc->name, cmd, io->channel, io->id, io->lun)); | 3134 | hd->ioc->name, cmd, io->channel, io->id, io->lun)); |
3091 | 3135 | ||
3092 | if (dir == MPI_SCSIIO_CONTROL_READ) { | 3136 | if (dir == MPI_SCSIIO_CONTROL_READ) { |
@@ -3138,7 +3182,7 @@ mptscsih_do_cmd(MPT_SCSI_HOST *hd, INTERNAL_CMD *io) | |||
3138 | } else { | 3182 | } else { |
3139 | rc = -EFAULT; | 3183 | rc = -EFAULT; |
3140 | /* This should never happen. */ | 3184 | /* This should never happen. */ |
3141 | ddvprintk((MYIOC_s_INFO_FMT "_do_cmd: Null pLocal!!!\n", | 3185 | ddvprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "_do_cmd: Null pLocal!!!\n", |
3142 | hd->ioc->name)); | 3186 | hd->ioc->name)); |
3143 | } | 3187 | } |
3144 | 3188 | ||
@@ -3324,6 +3368,35 @@ mptscsih_device_delay_show(struct class_device *cdev, char *buf) | |||
3324 | static CLASS_DEVICE_ATTR(device_delay, S_IRUGO, | 3368 | static CLASS_DEVICE_ATTR(device_delay, S_IRUGO, |
3325 | mptscsih_device_delay_show, NULL); | 3369 | mptscsih_device_delay_show, NULL); |
3326 | 3370 | ||
3371 | static ssize_t | ||
3372 | mptscsih_debug_level_show(struct class_device *cdev, char *buf) | ||
3373 | { | ||
3374 | struct Scsi_Host *host = class_to_shost(cdev); | ||
3375 | MPT_SCSI_HOST *hd = (MPT_SCSI_HOST *)host->hostdata; | ||
3376 | MPT_ADAPTER *ioc = hd->ioc; | ||
3377 | |||
3378 | return snprintf(buf, PAGE_SIZE, "%08xh\n", ioc->debug_level); | ||
3379 | } | ||
3380 | static ssize_t | ||
3381 | mptscsih_debug_level_store(struct class_device *cdev, const char *buf, | ||
3382 | size_t count) | ||
3383 | { | ||
3384 | struct Scsi_Host *host = class_to_shost(cdev); | ||
3385 | MPT_SCSI_HOST *hd = (MPT_SCSI_HOST *)host->hostdata; | ||
3386 | MPT_ADAPTER *ioc = hd->ioc; | ||
3387 | int val = 0; | ||
3388 | |||
3389 | if (sscanf(buf, "%x", &val) != 1) | ||
3390 | return -EINVAL; | ||
3391 | |||
3392 | ioc->debug_level = val; | ||
3393 | printk(MYIOC_s_INFO_FMT "debug_level=%08xh\n", | ||
3394 | ioc->name, ioc->debug_level); | ||
3395 | return strlen(buf); | ||
3396 | } | ||
3397 | static CLASS_DEVICE_ATTR(debug_level, S_IRUGO | S_IWUSR, | ||
3398 | mptscsih_debug_level_show, mptscsih_debug_level_store); | ||
3399 | |||
3327 | struct class_device_attribute *mptscsih_host_attrs[] = { | 3400 | struct class_device_attribute *mptscsih_host_attrs[] = { |
3328 | &class_device_attr_version_fw, | 3401 | &class_device_attr_version_fw, |
3329 | &class_device_attr_version_bios, | 3402 | &class_device_attr_version_bios, |
@@ -3336,6 +3409,7 @@ struct class_device_attribute *mptscsih_host_attrs[] = { | |||
3336 | &class_device_attr_board_tracer, | 3409 | &class_device_attr_board_tracer, |
3337 | &class_device_attr_io_delay, | 3410 | &class_device_attr_io_delay, |
3338 | &class_device_attr_device_delay, | 3411 | &class_device_attr_device_delay, |
3412 | &class_device_attr_debug_level, | ||
3339 | NULL, | 3413 | NULL, |
3340 | }; | 3414 | }; |
3341 | EXPORT_SYMBOL(mptscsih_host_attrs); | 3415 | EXPORT_SYMBOL(mptscsih_host_attrs); |
diff --git a/drivers/message/fusion/mptspi.c b/drivers/message/fusion/mptspi.c index 947fe2901800..8c98420640a5 100644 --- a/drivers/message/fusion/mptspi.c +++ b/drivers/message/fusion/mptspi.c | |||
@@ -138,7 +138,9 @@ mptspi_setTargetNegoParms(MPT_SCSI_HOST *hd, VirtTarget *target, | |||
138 | else { | 138 | else { |
139 | factor = MPT_ULTRA320; | 139 | factor = MPT_ULTRA320; |
140 | if (scsi_device_qas(sdev)) { | 140 | if (scsi_device_qas(sdev)) { |
141 | ddvprintk((KERN_INFO "Enabling QAS due to byte56=%02x on id=%d!\n", scsi_device_qas(sdev), id)); | 141 | ddvprintk(hd->ioc, |
142 | printk(KERN_DEBUG "Enabling QAS due to " | ||
143 | "byte56=%02x on id=%d!\n", scsi_device_qas(sdev), id)); | ||
142 | noQas = 0; | 144 | noQas = 0; |
143 | } | 145 | } |
144 | if (sdev->type == TYPE_TAPE && | 146 | if (sdev->type == TYPE_TAPE && |
@@ -225,7 +227,8 @@ mptspi_setTargetNegoParms(MPT_SCSI_HOST *hd, VirtTarget *target, | |||
225 | /* Disable QAS in a mixed configuration case | 227 | /* Disable QAS in a mixed configuration case |
226 | */ | 228 | */ |
227 | 229 | ||
228 | ddvprintk((KERN_INFO "Disabling QAS due to noQas=%02x on id=%d!\n", noQas, id)); | 230 | ddvprintk(hd->ioc, printk(KERN_DEBUG |
231 | "Disabling QAS due to noQas=%02x on id=%d!\n", noQas, id)); | ||
229 | } | 232 | } |
230 | } | 233 | } |
231 | 234 | ||
@@ -256,8 +259,8 @@ mptspi_writeIOCPage4(MPT_SCSI_HOST *hd, u8 channel , u8 id) | |||
256 | /* Get a MF for this command. | 259 | /* Get a MF for this command. |
257 | */ | 260 | */ |
258 | if ((mf = mpt_get_msg_frame(ioc->DoneCtx, ioc)) == NULL) { | 261 | if ((mf = mpt_get_msg_frame(ioc->DoneCtx, ioc)) == NULL) { |
259 | dfailprintk((MYIOC_s_WARN_FMT "writeIOCPage4 : no msg frames!\n", | 262 | dfailprintk(ioc, printk(MYIOC_s_WARN_FMT |
260 | ioc->name)); | 263 | "writeIOCPage4 : no msg frames!\n",ioc->name)); |
261 | return -EAGAIN; | 264 | return -EAGAIN; |
262 | } | 265 | } |
263 | 266 | ||
@@ -297,7 +300,7 @@ mptspi_writeIOCPage4(MPT_SCSI_HOST *hd, u8 channel , u8 id) | |||
297 | 300 | ||
298 | mpt_add_sge((char *)&pReq->PageBufferSGE, flagsLength, dataDma); | 301 | mpt_add_sge((char *)&pReq->PageBufferSGE, flagsLength, dataDma); |
299 | 302 | ||
300 | ddvprintk((MYIOC_s_INFO_FMT | 303 | ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
301 | "writeIOCPage4: MaxSEP=%d ActiveSEP=%d id=%d bus=%d\n", | 304 | "writeIOCPage4: MaxSEP=%d ActiveSEP=%d id=%d bus=%d\n", |
302 | ioc->name, IOCPage4Ptr->MaxSEP, IOCPage4Ptr->ActiveSEP, id, channel)); | 305 | ioc->name, IOCPage4Ptr->MaxSEP, IOCPage4Ptr->ActiveSEP, id, channel)); |
303 | 306 | ||
@@ -422,7 +425,7 @@ static int mptspi_target_alloc(struct scsi_target *starget) | |||
422 | if (starget->channel == 0 && | 425 | if (starget->channel == 0 && |
423 | mptspi_is_raid(hd, starget->id)) { | 426 | mptspi_is_raid(hd, starget->id)) { |
424 | vtarget->raidVolume = 1; | 427 | vtarget->raidVolume = 1; |
425 | ddvprintk((KERN_INFO | 428 | ddvprintk(hd->ioc, printk(KERN_DEBUG |
426 | "RAID Volume @ channel=%d id=%d\n", starget->channel, | 429 | "RAID Volume @ channel=%d id=%d\n", starget->channel, |
427 | starget->id)); | 430 | starget->id)); |
428 | } | 431 | } |
@@ -462,7 +465,7 @@ mptspi_target_destroy(struct scsi_target *starget) | |||
462 | static void | 465 | static void |
463 | mptspi_print_write_nego(struct _MPT_SCSI_HOST *hd, struct scsi_target *starget, u32 ii) | 466 | mptspi_print_write_nego(struct _MPT_SCSI_HOST *hd, struct scsi_target *starget, u32 ii) |
464 | { | 467 | { |
465 | ddvprintk((MYIOC_s_INFO_FMT "id=%d Requested = 0x%08x" | 468 | ddvprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "id=%d Requested = 0x%08x" |
466 | " ( %s factor = 0x%02x @ offset = 0x%02x %s%s%s%s%s%s%s%s)\n", | 469 | " ( %s factor = 0x%02x @ offset = 0x%02x %s%s%s%s%s%s%s%s)\n", |
467 | hd->ioc->name, starget->id, ii, | 470 | hd->ioc->name, starget->id, ii, |
468 | ii & MPI_SCSIDEVPAGE0_NP_WIDE ? "Wide ": "", | 471 | ii & MPI_SCSIDEVPAGE0_NP_WIDE ? "Wide ": "", |
@@ -487,7 +490,7 @@ mptspi_print_write_nego(struct _MPT_SCSI_HOST *hd, struct scsi_target *starget, | |||
487 | static void | 490 | static void |
488 | mptspi_print_read_nego(struct _MPT_SCSI_HOST *hd, struct scsi_target *starget, u32 ii) | 491 | mptspi_print_read_nego(struct _MPT_SCSI_HOST *hd, struct scsi_target *starget, u32 ii) |
489 | { | 492 | { |
490 | ddvprintk((MYIOC_s_INFO_FMT "id=%d Read = 0x%08x" | 493 | ddvprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "id=%d Read = 0x%08x" |
491 | " ( %s factor = 0x%02x @ offset = 0x%02x %s%s%s%s%s%s%s%s)\n", | 494 | " ( %s factor = 0x%02x @ offset = 0x%02x %s%s%s%s%s%s%s%s)\n", |
492 | hd->ioc->name, starget->id, ii, | 495 | hd->ioc->name, starget->id, ii, |
493 | ii & MPI_SCSIDEVPAGE0_NP_WIDE ? "Wide ": "", | 496 | ii & MPI_SCSIDEVPAGE0_NP_WIDE ? "Wide ": "", |
@@ -613,7 +616,7 @@ mptscsih_quiesce_raid(MPT_SCSI_HOST *hd, int quiesce, u8 channel, u8 id) | |||
613 | /* Get and Populate a free Frame | 616 | /* Get and Populate a free Frame |
614 | */ | 617 | */ |
615 | if ((mf = mpt_get_msg_frame(hd->ioc->InternalCtx, hd->ioc)) == NULL) { | 618 | if ((mf = mpt_get_msg_frame(hd->ioc->InternalCtx, hd->ioc)) == NULL) { |
616 | ddvprintk((MYIOC_s_WARN_FMT "_do_raid: no msg frames!\n", | 619 | ddvprintk(hd->ioc, printk(MYIOC_s_WARN_FMT "_do_raid: no msg frames!\n", |
617 | hd->ioc->name)); | 620 | hd->ioc->name)); |
618 | return -EAGAIN; | 621 | return -EAGAIN; |
619 | } | 622 | } |
@@ -635,7 +638,7 @@ mptscsih_quiesce_raid(MPT_SCSI_HOST *hd, int quiesce, u8 channel, u8 id) | |||
635 | mpt_add_sge((char *)&pReq->ActionDataSGE, | 638 | mpt_add_sge((char *)&pReq->ActionDataSGE, |
636 | MPT_SGE_FLAGS_SSIMPLE_READ | 0, (dma_addr_t) -1); | 639 | MPT_SGE_FLAGS_SSIMPLE_READ | 0, (dma_addr_t) -1); |
637 | 640 | ||
638 | ddvprintk((MYIOC_s_INFO_FMT "RAID Volume action=%x channel=%d id=%d\n", | 641 | ddvprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "RAID Volume action=%x channel=%d id=%d\n", |
639 | hd->ioc->name, pReq->Action, channel, id)); | 642 | hd->ioc->name, pReq->Action, channel, id)); |
640 | 643 | ||
641 | hd->pLocal = NULL; | 644 | hd->pLocal = NULL; |
@@ -735,7 +738,7 @@ static int mptspi_slave_configure(struct scsi_device *sdev) | |||
735 | if (ret) | 738 | if (ret) |
736 | return ret; | 739 | return ret; |
737 | 740 | ||
738 | ddvprintk((MYIOC_s_INFO_FMT "id=%d min_period=0x%02x" | 741 | ddvprintk(hd->ioc, printk(MYIOC_s_DEBUG_FMT "id=%d min_period=0x%02x" |
739 | " max_offset=0x%02x max_width=%d\n", hd->ioc->name, | 742 | " max_offset=0x%02x max_width=%d\n", hd->ioc->name, |
740 | sdev->id, spi_min_period(scsi_target(sdev)), | 743 | sdev->id, spi_min_period(scsi_target(sdev)), |
741 | spi_max_offset(scsi_target(sdev)), | 744 | spi_max_offset(scsi_target(sdev)), |
@@ -768,10 +771,8 @@ mptspi_qcmd(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *)) | |||
768 | return 0; | 771 | return 0; |
769 | } | 772 | } |
770 | 773 | ||
771 | #ifdef MPT_DEBUG_DV | ||
772 | if (spi_dv_pending(scsi_target(SCpnt->device))) | 774 | if (spi_dv_pending(scsi_target(SCpnt->device))) |
773 | scsi_print_command(SCpnt); | 775 | ddvprintk(hd->ioc, scsi_print_command(SCpnt)); |
774 | #endif | ||
775 | 776 | ||
776 | return mptscsih_qcmd(SCpnt,done); | 777 | return mptscsih_qcmd(SCpnt,done); |
777 | } | 778 | } |
@@ -1415,7 +1416,7 @@ mptspi_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1415 | 1416 | ||
1416 | if (numSGE < sh->sg_tablesize) { | 1417 | if (numSGE < sh->sg_tablesize) { |
1417 | /* Reset this value */ | 1418 | /* Reset this value */ |
1418 | dprintk((MYIOC_s_INFO_FMT | 1419 | dprintk(ioc, printk(MYIOC_s_INFO_FMT |
1419 | "Resetting sg_tablesize to %d from %d\n", | 1420 | "Resetting sg_tablesize to %d from %d\n", |
1420 | ioc->name, numSGE, sh->sg_tablesize)); | 1421 | ioc->name, numSGE, sh->sg_tablesize)); |
1421 | sh->sg_tablesize = numSGE; | 1422 | sh->sg_tablesize = numSGE; |
@@ -1435,7 +1436,7 @@ mptspi_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1435 | goto out_mptspi_probe; | 1436 | goto out_mptspi_probe; |
1436 | } | 1437 | } |
1437 | 1438 | ||
1438 | dprintk((MYIOC_s_INFO_FMT "ScsiLookup @ %p\n", | 1439 | dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "ScsiLookup @ %p\n", |
1439 | ioc->name, hd->ScsiLookup)); | 1440 | ioc->name, hd->ScsiLookup)); |
1440 | 1441 | ||
1441 | /* Clear the TM flags | 1442 | /* Clear the TM flags |
@@ -1463,7 +1464,7 @@ mptspi_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1463 | ioc->spi_data.Saf_Te = mpt_saf_te; | 1464 | ioc->spi_data.Saf_Te = mpt_saf_te; |
1464 | 1465 | ||
1465 | hd->negoNvram = MPT_SCSICFG_USE_NVRAM; | 1466 | hd->negoNvram = MPT_SCSICFG_USE_NVRAM; |
1466 | ddvprintk((MYIOC_s_INFO_FMT | 1467 | ddvprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
1467 | "saf_te %x\n", | 1468 | "saf_te %x\n", |
1468 | ioc->name, | 1469 | ioc->name, |
1469 | mpt_saf_te)); | 1470 | mpt_saf_te)); |
@@ -1481,7 +1482,7 @@ mptspi_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |||
1481 | 1482 | ||
1482 | error = scsi_add_host (sh, &ioc->pcidev->dev); | 1483 | error = scsi_add_host (sh, &ioc->pcidev->dev); |
1483 | if(error) { | 1484 | if(error) { |
1484 | dprintk((KERN_ERR MYNAM | 1485 | dprintk(ioc, printk(KERN_ERR MYNAM |
1485 | "scsi_add_host failed\n")); | 1486 | "scsi_add_host failed\n")); |
1486 | goto out_mptspi_probe; | 1487 | goto out_mptspi_probe; |
1487 | } | 1488 | } |
@@ -1536,15 +1537,8 @@ mptspi_init(void) | |||
1536 | mptspiTaskCtx = mpt_register(mptscsih_taskmgmt_complete, MPTSPI_DRIVER); | 1537 | mptspiTaskCtx = mpt_register(mptscsih_taskmgmt_complete, MPTSPI_DRIVER); |
1537 | mptspiInternalCtx = mpt_register(mptscsih_scandv_complete, MPTSPI_DRIVER); | 1538 | mptspiInternalCtx = mpt_register(mptscsih_scandv_complete, MPTSPI_DRIVER); |
1538 | 1539 | ||
1539 | if (mpt_event_register(mptspiDoneCtx, mptspi_event_process) == 0) { | 1540 | mpt_event_register(mptspiDoneCtx, mptspi_event_process); |
1540 | devtverboseprintk((KERN_INFO MYNAM | 1541 | mpt_reset_register(mptspiDoneCtx, mptspi_ioc_reset); |
1541 | ": Registered for IOC event notifications\n")); | ||
1542 | } | ||
1543 | |||
1544 | if (mpt_reset_register(mptspiDoneCtx, mptspi_ioc_reset) == 0) { | ||
1545 | dprintk((KERN_INFO MYNAM | ||
1546 | ": Registered for IOC reset notifications\n")); | ||
1547 | } | ||
1548 | 1542 | ||
1549 | error = pci_register_driver(&mptspi_driver); | 1543 | error = pci_register_driver(&mptspi_driver); |
1550 | if (error) | 1544 | if (error) |
@@ -1564,12 +1558,7 @@ mptspi_exit(void) | |||
1564 | pci_unregister_driver(&mptspi_driver); | 1558 | pci_unregister_driver(&mptspi_driver); |
1565 | 1559 | ||
1566 | mpt_reset_deregister(mptspiDoneCtx); | 1560 | mpt_reset_deregister(mptspiDoneCtx); |
1567 | dprintk((KERN_INFO MYNAM | ||
1568 | ": Deregistered for IOC reset notifications\n")); | ||
1569 | |||
1570 | mpt_event_deregister(mptspiDoneCtx); | 1561 | mpt_event_deregister(mptspiDoneCtx); |
1571 | dprintk((KERN_INFO MYNAM | ||
1572 | ": Deregistered for IOC event notifications\n")); | ||
1573 | 1562 | ||
1574 | mpt_deregister(mptspiInternalCtx); | 1563 | mpt_deregister(mptspiInternalCtx); |
1575 | mpt_deregister(mptspiTaskCtx); | 1564 | mpt_deregister(mptspiTaskCtx); |
diff --git a/drivers/scsi/aacraid/aachba.c b/drivers/scsi/aacraid/aachba.c index a26baab09dbf..6800e578e4b1 100644 --- a/drivers/scsi/aacraid/aachba.c +++ b/drivers/scsi/aacraid/aachba.c | |||
@@ -194,8 +194,7 @@ static inline int aac_valid_context(struct scsi_cmnd *scsicmd, | |||
194 | struct scsi_device *device; | 194 | struct scsi_device *device; |
195 | 195 | ||
196 | if (unlikely(!scsicmd || !scsicmd->scsi_done )) { | 196 | if (unlikely(!scsicmd || !scsicmd->scsi_done )) { |
197 | dprintk((KERN_WARNING "aac_valid_context: scsi command corrupt\n")) | 197 | dprintk((KERN_WARNING "aac_valid_context: scsi command corrupt\n")); |
198 | ; | ||
199 | aac_fib_complete(fibptr); | 198 | aac_fib_complete(fibptr); |
200 | aac_fib_free(fibptr); | 199 | aac_fib_free(fibptr); |
201 | return 0; | 200 | return 0; |
@@ -1689,23 +1688,23 @@ static void synchronize_callback(void *context, struct fib *fibptr) | |||
1689 | if (!aac_valid_context(cmd, fibptr)) | 1688 | if (!aac_valid_context(cmd, fibptr)) |
1690 | return; | 1689 | return; |
1691 | 1690 | ||
1692 | dprintk((KERN_DEBUG "synchronize_callback[cpu %d]: t = %ld.\n", | 1691 | dprintk((KERN_DEBUG "synchronize_callback[cpu %d]: t = %ld.\n", |
1693 | smp_processor_id(), jiffies)); | 1692 | smp_processor_id(), jiffies)); |
1694 | BUG_ON(fibptr == NULL); | 1693 | BUG_ON(fibptr == NULL); |
1695 | 1694 | ||
1696 | 1695 | ||
1697 | synchronizereply = fib_data(fibptr); | 1696 | synchronizereply = fib_data(fibptr); |
1698 | if (le32_to_cpu(synchronizereply->status) == CT_OK) | 1697 | if (le32_to_cpu(synchronizereply->status) == CT_OK) |
1699 | cmd->result = DID_OK << 16 | | 1698 | cmd->result = DID_OK << 16 | |
1700 | COMMAND_COMPLETE << 8 | SAM_STAT_GOOD; | 1699 | COMMAND_COMPLETE << 8 | SAM_STAT_GOOD; |
1701 | else { | 1700 | else { |
1702 | struct scsi_device *sdev = cmd->device; | 1701 | struct scsi_device *sdev = cmd->device; |
1703 | struct aac_dev *dev = fibptr->dev; | 1702 | struct aac_dev *dev = fibptr->dev; |
1704 | u32 cid = sdev_id(sdev); | 1703 | u32 cid = sdev_id(sdev); |
1705 | printk(KERN_WARNING | 1704 | printk(KERN_WARNING |
1706 | "synchronize_callback: synchronize failed, status = %d\n", | 1705 | "synchronize_callback: synchronize failed, status = %d\n", |
1707 | le32_to_cpu(synchronizereply->status)); | 1706 | le32_to_cpu(synchronizereply->status)); |
1708 | cmd->result = DID_OK << 16 | | 1707 | cmd->result = DID_OK << 16 | |
1709 | COMMAND_COMPLETE << 8 | SAM_STAT_CHECK_CONDITION; | 1708 | COMMAND_COMPLETE << 8 | SAM_STAT_CHECK_CONDITION; |
1710 | set_sense((u8 *)&dev->fsa_dev[cid].sense_data, | 1709 | set_sense((u8 *)&dev->fsa_dev[cid].sense_data, |
1711 | HARDWARE_ERROR, | 1710 | HARDWARE_ERROR, |
@@ -1713,7 +1712,7 @@ static void synchronize_callback(void *context, struct fib *fibptr) | |||
1713 | ASENCODE_INTERNAL_TARGET_FAILURE, 0, 0, | 1712 | ASENCODE_INTERNAL_TARGET_FAILURE, 0, 0, |
1714 | 0, 0); | 1713 | 0, 0); |
1715 | memcpy(cmd->sense_buffer, &dev->fsa_dev[cid].sense_data, | 1714 | memcpy(cmd->sense_buffer, &dev->fsa_dev[cid].sense_data, |
1716 | min(sizeof(dev->fsa_dev[cid].sense_data), | 1715 | min(sizeof(dev->fsa_dev[cid].sense_data), |
1717 | sizeof(cmd->sense_buffer))); | 1716 | sizeof(cmd->sense_buffer))); |
1718 | } | 1717 | } |
1719 | 1718 | ||
@@ -1731,6 +1730,9 @@ static int aac_synchronize(struct scsi_cmnd *scsicmd) | |||
1731 | struct scsi_device *sdev = scsicmd->device; | 1730 | struct scsi_device *sdev = scsicmd->device; |
1732 | int active = 0; | 1731 | int active = 0; |
1733 | struct aac_dev *aac; | 1732 | struct aac_dev *aac; |
1733 | u64 lba = ((u64)scsicmd->cmnd[2] << 24) | (scsicmd->cmnd[3] << 16) | | ||
1734 | (scsicmd->cmnd[4] << 8) | scsicmd->cmnd[5]; | ||
1735 | u32 count = (scsicmd->cmnd[7] << 8) | scsicmd->cmnd[8]; | ||
1734 | unsigned long flags; | 1736 | unsigned long flags; |
1735 | 1737 | ||
1736 | /* | 1738 | /* |
@@ -1739,7 +1741,51 @@ static int aac_synchronize(struct scsi_cmnd *scsicmd) | |||
1739 | */ | 1741 | */ |
1740 | spin_lock_irqsave(&sdev->list_lock, flags); | 1742 | spin_lock_irqsave(&sdev->list_lock, flags); |
1741 | list_for_each_entry(cmd, &sdev->cmd_list, list) | 1743 | list_for_each_entry(cmd, &sdev->cmd_list, list) |
1742 | if (cmd != scsicmd && cmd->SCp.phase == AAC_OWNER_FIRMWARE) { | 1744 | if (cmd->SCp.phase == AAC_OWNER_FIRMWARE) { |
1745 | u64 cmnd_lba; | ||
1746 | u32 cmnd_count; | ||
1747 | |||
1748 | if (cmd->cmnd[0] == WRITE_6) { | ||
1749 | cmnd_lba = ((cmd->cmnd[1] & 0x1F) << 16) | | ||
1750 | (cmd->cmnd[2] << 8) | | ||
1751 | cmd->cmnd[3]; | ||
1752 | cmnd_count = cmd->cmnd[4]; | ||
1753 | if (cmnd_count == 0) | ||
1754 | cmnd_count = 256; | ||
1755 | } else if (cmd->cmnd[0] == WRITE_16) { | ||
1756 | cmnd_lba = ((u64)cmd->cmnd[2] << 56) | | ||
1757 | ((u64)cmd->cmnd[3] << 48) | | ||
1758 | ((u64)cmd->cmnd[4] << 40) | | ||
1759 | ((u64)cmd->cmnd[5] << 32) | | ||
1760 | ((u64)cmd->cmnd[6] << 24) | | ||
1761 | (cmd->cmnd[7] << 16) | | ||
1762 | (cmd->cmnd[8] << 8) | | ||
1763 | cmd->cmnd[9]; | ||
1764 | cmnd_count = (cmd->cmnd[10] << 24) | | ||
1765 | (cmd->cmnd[11] << 16) | | ||
1766 | (cmd->cmnd[12] << 8) | | ||
1767 | cmd->cmnd[13]; | ||
1768 | } else if (cmd->cmnd[0] == WRITE_12) { | ||
1769 | cmnd_lba = ((u64)cmd->cmnd[2] << 24) | | ||
1770 | (cmd->cmnd[3] << 16) | | ||
1771 | (cmd->cmnd[4] << 8) | | ||
1772 | cmd->cmnd[5]; | ||
1773 | cmnd_count = (cmd->cmnd[6] << 24) | | ||
1774 | (cmd->cmnd[7] << 16) | | ||
1775 | (cmd->cmnd[8] << 8) | | ||
1776 | cmd->cmnd[9]; | ||
1777 | } else if (cmd->cmnd[0] == WRITE_10) { | ||
1778 | cmnd_lba = ((u64)cmd->cmnd[2] << 24) | | ||
1779 | (cmd->cmnd[3] << 16) | | ||
1780 | (cmd->cmnd[4] << 8) | | ||
1781 | cmd->cmnd[5]; | ||
1782 | cmnd_count = (cmd->cmnd[7] << 8) | | ||
1783 | cmd->cmnd[8]; | ||
1784 | } else | ||
1785 | continue; | ||
1786 | if (((cmnd_lba + cmnd_count) < lba) || | ||
1787 | (count && ((lba + count) < cmnd_lba))) | ||
1788 | continue; | ||
1743 | ++active; | 1789 | ++active; |
1744 | break; | 1790 | break; |
1745 | } | 1791 | } |
@@ -1768,7 +1814,7 @@ static int aac_synchronize(struct scsi_cmnd *scsicmd) | |||
1768 | synchronizecmd->command = cpu_to_le32(VM_ContainerConfig); | 1814 | synchronizecmd->command = cpu_to_le32(VM_ContainerConfig); |
1769 | synchronizecmd->type = cpu_to_le32(CT_FLUSH_CACHE); | 1815 | synchronizecmd->type = cpu_to_le32(CT_FLUSH_CACHE); |
1770 | synchronizecmd->cid = cpu_to_le32(scmd_id(scsicmd)); | 1816 | synchronizecmd->cid = cpu_to_le32(scmd_id(scsicmd)); |
1771 | synchronizecmd->count = | 1817 | synchronizecmd->count = |
1772 | cpu_to_le32(sizeof(((struct aac_synchronize_reply *)NULL)->data)); | 1818 | cpu_to_le32(sizeof(((struct aac_synchronize_reply *)NULL)->data)); |
1773 | 1819 | ||
1774 | /* | 1820 | /* |
@@ -1790,7 +1836,7 @@ static int aac_synchronize(struct scsi_cmnd *scsicmd) | |||
1790 | return 0; | 1836 | return 0; |
1791 | } | 1837 | } |
1792 | 1838 | ||
1793 | printk(KERN_WARNING | 1839 | printk(KERN_WARNING |
1794 | "aac_synchronize: aac_fib_send failed with status: %d.\n", status); | 1840 | "aac_synchronize: aac_fib_send failed with status: %d.\n", status); |
1795 | aac_fib_complete(cmd_fibcontext); | 1841 | aac_fib_complete(cmd_fibcontext); |
1796 | aac_fib_free(cmd_fibcontext); | 1842 | aac_fib_free(cmd_fibcontext); |
diff --git a/drivers/scsi/aacraid/aacraid.h b/drivers/scsi/aacraid/aacraid.h index 400d03403cd5..94727b9375ec 100644 --- a/drivers/scsi/aacraid/aacraid.h +++ b/drivers/scsi/aacraid/aacraid.h | |||
@@ -12,7 +12,7 @@ | |||
12 | *----------------------------------------------------------------------------*/ | 12 | *----------------------------------------------------------------------------*/ |
13 | 13 | ||
14 | #ifndef AAC_DRIVER_BUILD | 14 | #ifndef AAC_DRIVER_BUILD |
15 | # define AAC_DRIVER_BUILD 2447 | 15 | # define AAC_DRIVER_BUILD 2449 |
16 | # define AAC_DRIVER_BRANCH "-ms" | 16 | # define AAC_DRIVER_BRANCH "-ms" |
17 | #endif | 17 | #endif |
18 | #define MAXIMUM_NUM_CONTAINERS 32 | 18 | #define MAXIMUM_NUM_CONTAINERS 32 |
@@ -1807,10 +1807,10 @@ struct aac_aifcmd { | |||
1807 | * accounting for the fact capacity could be a 64 bit value | 1807 | * accounting for the fact capacity could be a 64 bit value |
1808 | * | 1808 | * |
1809 | */ | 1809 | */ |
1810 | static inline u32 cap_to_cyls(sector_t capacity, u32 divisor) | 1810 | static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor) |
1811 | { | 1811 | { |
1812 | sector_div(capacity, divisor); | 1812 | sector_div(capacity, divisor); |
1813 | return (u32)capacity; | 1813 | return capacity; |
1814 | } | 1814 | } |
1815 | 1815 | ||
1816 | /* SCp.phase values */ | 1816 | /* SCp.phase values */ |
diff --git a/drivers/scsi/aacraid/linit.c b/drivers/scsi/aacraid/linit.c index c709dc8ad99d..813556c60007 100644 --- a/drivers/scsi/aacraid/linit.c +++ b/drivers/scsi/aacraid/linit.c | |||
@@ -826,7 +826,7 @@ static ssize_t aac_show_reset_adapter(struct class_device *class_dev, | |||
826 | tmp = aac_adapter_check_health(dev); | 826 | tmp = aac_adapter_check_health(dev); |
827 | if ((tmp == 0) && dev->in_reset) | 827 | if ((tmp == 0) && dev->in_reset) |
828 | tmp = -EBUSY; | 828 | tmp = -EBUSY; |
829 | len = snprintf(buf, PAGE_SIZE, "0x%x", tmp); | 829 | len = snprintf(buf, PAGE_SIZE, "0x%x\n", tmp); |
830 | return len; | 830 | return len; |
831 | } | 831 | } |
832 | 832 | ||
@@ -1126,9 +1126,8 @@ static int __devinit aac_probe_one(struct pci_dev *pdev, | |||
1126 | static void aac_shutdown(struct pci_dev *dev) | 1126 | static void aac_shutdown(struct pci_dev *dev) |
1127 | { | 1127 | { |
1128 | struct Scsi_Host *shost = pci_get_drvdata(dev); | 1128 | struct Scsi_Host *shost = pci_get_drvdata(dev); |
1129 | struct aac_dev *aac = (struct aac_dev *)shost->hostdata; | ||
1130 | scsi_block_requests(shost); | 1129 | scsi_block_requests(shost); |
1131 | __aac_shutdown(aac); | 1130 | __aac_shutdown((struct aac_dev *)shost->hostdata); |
1132 | } | 1131 | } |
1133 | 1132 | ||
1134 | static void __devexit aac_remove_one(struct pci_dev *pdev) | 1133 | static void __devexit aac_remove_one(struct pci_dev *pdev) |
diff --git a/drivers/scsi/aacraid/nark.c b/drivers/scsi/aacraid/nark.c index a8ace5677813..c55f7c862f0e 100644 --- a/drivers/scsi/aacraid/nark.c +++ b/drivers/scsi/aacraid/nark.c | |||
@@ -1,11 +1,10 @@ | |||
1 | /* | 1 | /* |
2 | * Adaptec AAC series RAID controller driver | 2 | * Adaptec AAC series RAID controller driver |
3 | * (c) Copyright 2001 Red Hat Inc. <alan@redhat.com> | ||
4 | * | 3 | * |
5 | * based on the old aacraid driver that is.. | 4 | * based on the old aacraid driver that is.. |
6 | * Adaptec aacraid device driver for Linux. | 5 | * Adaptec aacraid device driver for Linux. |
7 | * | 6 | * |
8 | * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com) | 7 | * Copyright (c) 2006-2007 Adaptec, Inc. (aacraid@adaptec.com) |
9 | * | 8 | * |
10 | * This program is free software; you can redistribute it and/or modify | 9 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License as published by | 10 | * it under the terms of the GNU General Public License as published by |
diff --git a/drivers/scsi/aacraid/rkt.c b/drivers/scsi/aacraid/rkt.c index 9c5fcfb398c2..8cd6588a83e3 100644 --- a/drivers/scsi/aacraid/rkt.c +++ b/drivers/scsi/aacraid/rkt.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * based on the old aacraid driver that is.. | 5 | * based on the old aacraid driver that is.. |
6 | * Adaptec aacraid device driver for Linux. | 6 | * Adaptec aacraid device driver for Linux. |
7 | * | 7 | * |
8 | * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com) | 8 | * Copyright (c) 2000-2007 Adaptec, Inc. (aacraid@adaptec.com) |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License as published by | 11 | * it under the terms of the GNU General Public License as published by |
diff --git a/drivers/scsi/aacraid/rx.c b/drivers/scsi/aacraid/rx.c index ebc65b9fea92..73eef3dc5dc6 100644 --- a/drivers/scsi/aacraid/rx.c +++ b/drivers/scsi/aacraid/rx.c | |||
@@ -472,7 +472,7 @@ static int aac_rx_restart_adapter(struct aac_dev *dev, int bled) | |||
472 | else { | 472 | else { |
473 | bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS, | 473 | bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS, |
474 | 0, 0, 0, 0, 0, 0, &var, NULL, NULL, NULL, NULL); | 474 | 0, 0, 0, 0, 0, 0, &var, NULL, NULL, NULL, NULL); |
475 | if (!bled && (var != 0x00000001)) | 475 | if (!bled && (var != 0x00000001) && (var != 0x3803000F)) |
476 | bled = -EINVAL; | 476 | bled = -EINVAL; |
477 | } | 477 | } |
478 | if (bled && (bled != -ETIMEDOUT)) | 478 | if (bled && (bled != -ETIMEDOUT)) |
diff --git a/drivers/scsi/advansys.c b/drivers/scsi/advansys.c index 2b6689709e53..79c0b6e37a3b 100644 --- a/drivers/scsi/advansys.c +++ b/drivers/scsi/advansys.c | |||
@@ -1,4 +1,4 @@ | |||
1 | #define ASC_VERSION "3.3K" /* AdvanSys Driver Version */ | 1 | #define ASC_VERSION "3.3K" /* AdvanSys Driver Version */ |
2 | 2 | ||
3 | /* | 3 | /* |
4 | * advansys.c - Linux Host Driver for AdvanSys SCSI Adapters | 4 | * advansys.c - Linux Host Driver for AdvanSys SCSI Adapters |
@@ -802,7 +802,6 @@ | |||
802 | #include <linux/pci.h> | 802 | #include <linux/pci.h> |
803 | #endif /* CONFIG_PCI */ | 803 | #endif /* CONFIG_PCI */ |
804 | 804 | ||
805 | |||
806 | /* | 805 | /* |
807 | * --- Driver Options | 806 | * --- Driver Options |
808 | */ | 807 | */ |
@@ -816,18 +815,6 @@ | |||
816 | /* Enable driver tracing. */ | 815 | /* Enable driver tracing. */ |
817 | /* #define ADVANSYS_DEBUG */ | 816 | /* #define ADVANSYS_DEBUG */ |
818 | 817 | ||
819 | |||
820 | /* | ||
821 | * --- Debugging Header | ||
822 | */ | ||
823 | |||
824 | #ifdef ADVANSYS_DEBUG | ||
825 | #define STATIC | ||
826 | #else /* ADVANSYS_DEBUG */ | ||
827 | #define STATIC static | ||
828 | #endif /* ADVANSYS_DEBUG */ | ||
829 | |||
830 | |||
831 | /* | 818 | /* |
832 | * --- Asc Library Constants and Macros | 819 | * --- Asc Library Constants and Macros |
833 | */ | 820 | */ |
@@ -845,10 +832,10 @@ | |||
845 | * are all consistent at 8, 16, and 32 bits respectively. Pointers | 832 | * are all consistent at 8, 16, and 32 bits respectively. Pointers |
846 | * and long types are 64 bits on Alpha and UltraSPARC. | 833 | * and long types are 64 bits on Alpha and UltraSPARC. |
847 | */ | 834 | */ |
848 | #define ASC_PADDR __u32 /* Physical/Bus address data type. */ | 835 | #define ASC_PADDR __u32 /* Physical/Bus address data type. */ |
849 | #define ASC_VADDR __u32 /* Virtual address data type. */ | 836 | #define ASC_VADDR __u32 /* Virtual address data type. */ |
850 | #define ASC_DCNT __u32 /* Unsigned Data count type. */ | 837 | #define ASC_DCNT __u32 /* Unsigned Data count type. */ |
851 | #define ASC_SDCNT __s32 /* Signed Data count type. */ | 838 | #define ASC_SDCNT __s32 /* Signed Data count type. */ |
852 | 839 | ||
853 | /* | 840 | /* |
854 | * These macros are used to convert a virtual address to a | 841 | * These macros are used to convert a virtual address to a |
@@ -911,7 +898,7 @@ typedef unsigned char uchar; | |||
911 | #define CC_VERY_LONG_SG_LIST 0 | 898 | #define CC_VERY_LONG_SG_LIST 0 |
912 | #define ASC_SRB2SCSIQ(srb_ptr) (srb_ptr) | 899 | #define ASC_SRB2SCSIQ(srb_ptr) (srb_ptr) |
913 | 900 | ||
914 | #define PortAddr unsigned short /* port address size */ | 901 | #define PortAddr unsigned short /* port address size */ |
915 | #define inp(port) inb(port) | 902 | #define inp(port) inb(port) |
916 | #define outp(port, byte) outb((byte), (port)) | 903 | #define outp(port, byte) outb((byte), (port)) |
917 | 904 | ||
@@ -1038,17 +1025,17 @@ typedef unsigned char uchar; | |||
1038 | #define ASC_INQ_CLOCKING(inq) (((inq)->info & 0x0c) >> 2) | 1025 | #define ASC_INQ_CLOCKING(inq) (((inq)->info & 0x0c) >> 2) |
1039 | 1026 | ||
1040 | typedef struct { | 1027 | typedef struct { |
1041 | uchar periph; | 1028 | uchar periph; |
1042 | uchar devtype; | 1029 | uchar devtype; |
1043 | uchar ver; | 1030 | uchar ver; |
1044 | uchar byte3; | 1031 | uchar byte3; |
1045 | uchar add_len; | 1032 | uchar add_len; |
1046 | uchar res1; | 1033 | uchar res1; |
1047 | uchar res2; | 1034 | uchar res2; |
1048 | uchar flags; | 1035 | uchar flags; |
1049 | uchar vendor_id[8]; | 1036 | uchar vendor_id[8]; |
1050 | uchar product_id[16]; | 1037 | uchar product_id[16]; |
1051 | uchar product_rev_level[4]; | 1038 | uchar product_rev_level[4]; |
1052 | } ASC_SCSI_INQUIRY; | 1039 | } ASC_SCSI_INQUIRY; |
1053 | 1040 | ||
1054 | #define ASC_SG_LIST_PER_Q 7 | 1041 | #define ASC_SG_LIST_PER_Q 7 |
@@ -1165,139 +1152,139 @@ typedef struct { | |||
1165 | #define ASC_QNO_TO_QADDR(q_no) ((ASC_QADR_BEG)+((int)(q_no) << 6)) | 1152 | #define ASC_QNO_TO_QADDR(q_no) ((ASC_QADR_BEG)+((int)(q_no) << 6)) |
1166 | 1153 | ||
1167 | typedef struct asc_scsiq_1 { | 1154 | typedef struct asc_scsiq_1 { |
1168 | uchar status; | 1155 | uchar status; |
1169 | uchar q_no; | 1156 | uchar q_no; |
1170 | uchar cntl; | 1157 | uchar cntl; |
1171 | uchar sg_queue_cnt; | 1158 | uchar sg_queue_cnt; |
1172 | uchar target_id; | 1159 | uchar target_id; |
1173 | uchar target_lun; | 1160 | uchar target_lun; |
1174 | ASC_PADDR data_addr; | 1161 | ASC_PADDR data_addr; |
1175 | ASC_DCNT data_cnt; | 1162 | ASC_DCNT data_cnt; |
1176 | ASC_PADDR sense_addr; | 1163 | ASC_PADDR sense_addr; |
1177 | uchar sense_len; | 1164 | uchar sense_len; |
1178 | uchar extra_bytes; | 1165 | uchar extra_bytes; |
1179 | } ASC_SCSIQ_1; | 1166 | } ASC_SCSIQ_1; |
1180 | 1167 | ||
1181 | typedef struct asc_scsiq_2 { | 1168 | typedef struct asc_scsiq_2 { |
1182 | ASC_VADDR srb_ptr; | 1169 | ASC_VADDR srb_ptr; |
1183 | uchar target_ix; | 1170 | uchar target_ix; |
1184 | uchar flag; | 1171 | uchar flag; |
1185 | uchar cdb_len; | 1172 | uchar cdb_len; |
1186 | uchar tag_code; | 1173 | uchar tag_code; |
1187 | ushort vm_id; | 1174 | ushort vm_id; |
1188 | } ASC_SCSIQ_2; | 1175 | } ASC_SCSIQ_2; |
1189 | 1176 | ||
1190 | typedef struct asc_scsiq_3 { | 1177 | typedef struct asc_scsiq_3 { |
1191 | uchar done_stat; | 1178 | uchar done_stat; |
1192 | uchar host_stat; | 1179 | uchar host_stat; |
1193 | uchar scsi_stat; | 1180 | uchar scsi_stat; |
1194 | uchar scsi_msg; | 1181 | uchar scsi_msg; |
1195 | } ASC_SCSIQ_3; | 1182 | } ASC_SCSIQ_3; |
1196 | 1183 | ||
1197 | typedef struct asc_scsiq_4 { | 1184 | typedef struct asc_scsiq_4 { |
1198 | uchar cdb[ASC_MAX_CDB_LEN]; | 1185 | uchar cdb[ASC_MAX_CDB_LEN]; |
1199 | uchar y_first_sg_list_qp; | 1186 | uchar y_first_sg_list_qp; |
1200 | uchar y_working_sg_qp; | 1187 | uchar y_working_sg_qp; |
1201 | uchar y_working_sg_ix; | 1188 | uchar y_working_sg_ix; |
1202 | uchar y_res; | 1189 | uchar y_res; |
1203 | ushort x_req_count; | 1190 | ushort x_req_count; |
1204 | ushort x_reconnect_rtn; | 1191 | ushort x_reconnect_rtn; |
1205 | ASC_PADDR x_saved_data_addr; | 1192 | ASC_PADDR x_saved_data_addr; |
1206 | ASC_DCNT x_saved_data_cnt; | 1193 | ASC_DCNT x_saved_data_cnt; |
1207 | } ASC_SCSIQ_4; | 1194 | } ASC_SCSIQ_4; |
1208 | 1195 | ||
1209 | typedef struct asc_q_done_info { | 1196 | typedef struct asc_q_done_info { |
1210 | ASC_SCSIQ_2 d2; | 1197 | ASC_SCSIQ_2 d2; |
1211 | ASC_SCSIQ_3 d3; | 1198 | ASC_SCSIQ_3 d3; |
1212 | uchar q_status; | 1199 | uchar q_status; |
1213 | uchar q_no; | 1200 | uchar q_no; |
1214 | uchar cntl; | 1201 | uchar cntl; |
1215 | uchar sense_len; | 1202 | uchar sense_len; |
1216 | uchar extra_bytes; | 1203 | uchar extra_bytes; |
1217 | uchar res; | 1204 | uchar res; |
1218 | ASC_DCNT remain_bytes; | 1205 | ASC_DCNT remain_bytes; |
1219 | } ASC_QDONE_INFO; | 1206 | } ASC_QDONE_INFO; |
1220 | 1207 | ||
1221 | typedef struct asc_sg_list { | 1208 | typedef struct asc_sg_list { |
1222 | ASC_PADDR addr; | 1209 | ASC_PADDR addr; |
1223 | ASC_DCNT bytes; | 1210 | ASC_DCNT bytes; |
1224 | } ASC_SG_LIST; | 1211 | } ASC_SG_LIST; |
1225 | 1212 | ||
1226 | typedef struct asc_sg_head { | 1213 | typedef struct asc_sg_head { |
1227 | ushort entry_cnt; | 1214 | ushort entry_cnt; |
1228 | ushort queue_cnt; | 1215 | ushort queue_cnt; |
1229 | ushort entry_to_copy; | 1216 | ushort entry_to_copy; |
1230 | ushort res; | 1217 | ushort res; |
1231 | ASC_SG_LIST sg_list[ASC_MAX_SG_LIST]; | 1218 | ASC_SG_LIST sg_list[ASC_MAX_SG_LIST]; |
1232 | } ASC_SG_HEAD; | 1219 | } ASC_SG_HEAD; |
1233 | 1220 | ||
1234 | #define ASC_MIN_SG_LIST 2 | 1221 | #define ASC_MIN_SG_LIST 2 |
1235 | 1222 | ||
1236 | typedef struct asc_min_sg_head { | 1223 | typedef struct asc_min_sg_head { |
1237 | ushort entry_cnt; | 1224 | ushort entry_cnt; |
1238 | ushort queue_cnt; | 1225 | ushort queue_cnt; |
1239 | ushort entry_to_copy; | 1226 | ushort entry_to_copy; |
1240 | ushort res; | 1227 | ushort res; |
1241 | ASC_SG_LIST sg_list[ASC_MIN_SG_LIST]; | 1228 | ASC_SG_LIST sg_list[ASC_MIN_SG_LIST]; |
1242 | } ASC_MIN_SG_HEAD; | 1229 | } ASC_MIN_SG_HEAD; |
1243 | 1230 | ||
1244 | #define QCX_SORT (0x0001) | 1231 | #define QCX_SORT (0x0001) |
1245 | #define QCX_COALEASE (0x0002) | 1232 | #define QCX_COALEASE (0x0002) |
1246 | 1233 | ||
1247 | typedef struct asc_scsi_q { | 1234 | typedef struct asc_scsi_q { |
1248 | ASC_SCSIQ_1 q1; | 1235 | ASC_SCSIQ_1 q1; |
1249 | ASC_SCSIQ_2 q2; | 1236 | ASC_SCSIQ_2 q2; |
1250 | uchar *cdbptr; | 1237 | uchar *cdbptr; |
1251 | ASC_SG_HEAD *sg_head; | 1238 | ASC_SG_HEAD *sg_head; |
1252 | ushort remain_sg_entry_cnt; | 1239 | ushort remain_sg_entry_cnt; |
1253 | ushort next_sg_index; | 1240 | ushort next_sg_index; |
1254 | } ASC_SCSI_Q; | 1241 | } ASC_SCSI_Q; |
1255 | 1242 | ||
1256 | typedef struct asc_scsi_req_q { | 1243 | typedef struct asc_scsi_req_q { |
1257 | ASC_SCSIQ_1 r1; | 1244 | ASC_SCSIQ_1 r1; |
1258 | ASC_SCSIQ_2 r2; | 1245 | ASC_SCSIQ_2 r2; |
1259 | uchar *cdbptr; | 1246 | uchar *cdbptr; |
1260 | ASC_SG_HEAD *sg_head; | 1247 | ASC_SG_HEAD *sg_head; |
1261 | uchar *sense_ptr; | 1248 | uchar *sense_ptr; |
1262 | ASC_SCSIQ_3 r3; | 1249 | ASC_SCSIQ_3 r3; |
1263 | uchar cdb[ASC_MAX_CDB_LEN]; | 1250 | uchar cdb[ASC_MAX_CDB_LEN]; |
1264 | uchar sense[ASC_MIN_SENSE_LEN]; | 1251 | uchar sense[ASC_MIN_SENSE_LEN]; |
1265 | } ASC_SCSI_REQ_Q; | 1252 | } ASC_SCSI_REQ_Q; |
1266 | 1253 | ||
1267 | typedef struct asc_scsi_bios_req_q { | 1254 | typedef struct asc_scsi_bios_req_q { |
1268 | ASC_SCSIQ_1 r1; | 1255 | ASC_SCSIQ_1 r1; |
1269 | ASC_SCSIQ_2 r2; | 1256 | ASC_SCSIQ_2 r2; |
1270 | uchar *cdbptr; | 1257 | uchar *cdbptr; |
1271 | ASC_SG_HEAD *sg_head; | 1258 | ASC_SG_HEAD *sg_head; |
1272 | uchar *sense_ptr; | 1259 | uchar *sense_ptr; |
1273 | ASC_SCSIQ_3 r3; | 1260 | ASC_SCSIQ_3 r3; |
1274 | uchar cdb[ASC_MAX_CDB_LEN]; | 1261 | uchar cdb[ASC_MAX_CDB_LEN]; |
1275 | uchar sense[ASC_MIN_SENSE_LEN]; | 1262 | uchar sense[ASC_MIN_SENSE_LEN]; |
1276 | } ASC_SCSI_BIOS_REQ_Q; | 1263 | } ASC_SCSI_BIOS_REQ_Q; |
1277 | 1264 | ||
1278 | typedef struct asc_risc_q { | 1265 | typedef struct asc_risc_q { |
1279 | uchar fwd; | 1266 | uchar fwd; |
1280 | uchar bwd; | 1267 | uchar bwd; |
1281 | ASC_SCSIQ_1 i1; | 1268 | ASC_SCSIQ_1 i1; |
1282 | ASC_SCSIQ_2 i2; | 1269 | ASC_SCSIQ_2 i2; |
1283 | ASC_SCSIQ_3 i3; | 1270 | ASC_SCSIQ_3 i3; |
1284 | ASC_SCSIQ_4 i4; | 1271 | ASC_SCSIQ_4 i4; |
1285 | } ASC_RISC_Q; | 1272 | } ASC_RISC_Q; |
1286 | 1273 | ||
1287 | typedef struct asc_sg_list_q { | 1274 | typedef struct asc_sg_list_q { |
1288 | uchar seq_no; | 1275 | uchar seq_no; |
1289 | uchar q_no; | 1276 | uchar q_no; |
1290 | uchar cntl; | 1277 | uchar cntl; |
1291 | uchar sg_head_qp; | 1278 | uchar sg_head_qp; |
1292 | uchar sg_list_cnt; | 1279 | uchar sg_list_cnt; |
1293 | uchar sg_cur_list_cnt; | 1280 | uchar sg_cur_list_cnt; |
1294 | } ASC_SG_LIST_Q; | 1281 | } ASC_SG_LIST_Q; |
1295 | 1282 | ||
1296 | typedef struct asc_risc_sg_list_q { | 1283 | typedef struct asc_risc_sg_list_q { |
1297 | uchar fwd; | 1284 | uchar fwd; |
1298 | uchar bwd; | 1285 | uchar bwd; |
1299 | ASC_SG_LIST_Q sg; | 1286 | ASC_SG_LIST_Q sg; |
1300 | ASC_SG_LIST sg_list[7]; | 1287 | ASC_SG_LIST sg_list[7]; |
1301 | } ASC_RISC_SG_LIST_Q; | 1288 | } ASC_RISC_SG_LIST_Q; |
1302 | 1289 | ||
1303 | #define ASC_EXE_SCSI_IO_MAX_IDLE_LOOP 0x1000000UL | 1290 | #define ASC_EXE_SCSI_IO_MAX_IDLE_LOOP 0x1000000UL |
@@ -1431,25 +1418,25 @@ typedef struct asc_risc_sg_list_q { | |||
1431 | #define SYN_ULTRA_XFER_NS_15 107 | 1418 | #define SYN_ULTRA_XFER_NS_15 107 |
1432 | 1419 | ||
1433 | typedef struct ext_msg { | 1420 | typedef struct ext_msg { |
1434 | uchar msg_type; | 1421 | uchar msg_type; |
1435 | uchar msg_len; | 1422 | uchar msg_len; |
1436 | uchar msg_req; | 1423 | uchar msg_req; |
1437 | union { | 1424 | union { |
1438 | struct { | 1425 | struct { |
1439 | uchar sdtr_xfer_period; | 1426 | uchar sdtr_xfer_period; |
1440 | uchar sdtr_req_ack_offset; | 1427 | uchar sdtr_req_ack_offset; |
1441 | } sdtr; | 1428 | } sdtr; |
1442 | struct { | 1429 | struct { |
1443 | uchar wdtr_width; | 1430 | uchar wdtr_width; |
1444 | } wdtr; | 1431 | } wdtr; |
1445 | struct { | 1432 | struct { |
1446 | uchar mdp_b3; | 1433 | uchar mdp_b3; |
1447 | uchar mdp_b2; | 1434 | uchar mdp_b2; |
1448 | uchar mdp_b1; | 1435 | uchar mdp_b1; |
1449 | uchar mdp_b0; | 1436 | uchar mdp_b0; |
1450 | } mdp; | 1437 | } mdp; |
1451 | } u_ext_msg; | 1438 | } u_ext_msg; |
1452 | uchar res; | 1439 | uchar res; |
1453 | } EXT_MSG; | 1440 | } EXT_MSG; |
1454 | 1441 | ||
1455 | #define xfer_period u_ext_msg.sdtr.sdtr_xfer_period | 1442 | #define xfer_period u_ext_msg.sdtr.sdtr_xfer_period |
@@ -1461,24 +1448,24 @@ typedef struct ext_msg { | |||
1461 | #define mdp_b0 u_ext_msg.mdp_b0 | 1448 | #define mdp_b0 u_ext_msg.mdp_b0 |
1462 | 1449 | ||
1463 | typedef struct asc_dvc_cfg { | 1450 | typedef struct asc_dvc_cfg { |
1464 | ASC_SCSI_BIT_ID_TYPE can_tagged_qng; | 1451 | ASC_SCSI_BIT_ID_TYPE can_tagged_qng; |
1465 | ASC_SCSI_BIT_ID_TYPE cmd_qng_enabled; | 1452 | ASC_SCSI_BIT_ID_TYPE cmd_qng_enabled; |
1466 | ASC_SCSI_BIT_ID_TYPE disc_enable; | 1453 | ASC_SCSI_BIT_ID_TYPE disc_enable; |
1467 | ASC_SCSI_BIT_ID_TYPE sdtr_enable; | 1454 | ASC_SCSI_BIT_ID_TYPE sdtr_enable; |
1468 | uchar chip_scsi_id; | 1455 | uchar chip_scsi_id; |
1469 | uchar isa_dma_speed; | 1456 | uchar isa_dma_speed; |
1470 | uchar isa_dma_channel; | 1457 | uchar isa_dma_channel; |
1471 | uchar chip_version; | 1458 | uchar chip_version; |
1472 | ushort lib_serial_no; | 1459 | ushort lib_serial_no; |
1473 | ushort lib_version; | 1460 | ushort lib_version; |
1474 | ushort mcode_date; | 1461 | ushort mcode_date; |
1475 | ushort mcode_version; | 1462 | ushort mcode_version; |
1476 | uchar max_tag_qng[ASC_MAX_TID + 1]; | 1463 | uchar max_tag_qng[ASC_MAX_TID + 1]; |
1477 | uchar *overrun_buf; | 1464 | uchar *overrun_buf; |
1478 | uchar sdtr_period_offset[ASC_MAX_TID + 1]; | 1465 | uchar sdtr_period_offset[ASC_MAX_TID + 1]; |
1479 | ushort pci_slot_info; | 1466 | ushort pci_slot_info; |
1480 | uchar adapter_info[6]; | 1467 | uchar adapter_info[6]; |
1481 | struct device *dev; | 1468 | struct device *dev; |
1482 | } ASC_DVC_CFG; | 1469 | } ASC_DVC_CFG; |
1483 | 1470 | ||
1484 | #define ASC_DEF_DVC_CNTL 0xFFFF | 1471 | #define ASC_DEF_DVC_CNTL 0xFFFF |
@@ -1501,64 +1488,64 @@ typedef struct asc_dvc_cfg { | |||
1501 | #define ASC_MIN_TAGGED_CMD 7 | 1488 | #define ASC_MIN_TAGGED_CMD 7 |
1502 | #define ASC_MAX_SCSI_RESET_WAIT 30 | 1489 | #define ASC_MAX_SCSI_RESET_WAIT 30 |
1503 | 1490 | ||
1504 | struct asc_dvc_var; /* Forward Declaration. */ | 1491 | struct asc_dvc_var; /* Forward Declaration. */ |
1505 | 1492 | ||
1506 | typedef void (* ASC_ISR_CALLBACK)(struct asc_dvc_var *, ASC_QDONE_INFO *); | 1493 | typedef void (*ASC_ISR_CALLBACK) (struct asc_dvc_var *, ASC_QDONE_INFO *); |
1507 | typedef int (* ASC_EXE_CALLBACK)(struct asc_dvc_var *, ASC_SCSI_Q *); | 1494 | typedef int (*ASC_EXE_CALLBACK) (struct asc_dvc_var *, ASC_SCSI_Q *); |
1508 | 1495 | ||
1509 | typedef struct asc_dvc_var { | 1496 | typedef struct asc_dvc_var { |
1510 | PortAddr iop_base; | 1497 | PortAddr iop_base; |
1511 | ushort err_code; | 1498 | ushort err_code; |
1512 | ushort dvc_cntl; | 1499 | ushort dvc_cntl; |
1513 | ushort bug_fix_cntl; | 1500 | ushort bug_fix_cntl; |
1514 | ushort bus_type; | 1501 | ushort bus_type; |
1515 | ASC_ISR_CALLBACK isr_callback; | 1502 | ASC_ISR_CALLBACK isr_callback; |
1516 | ASC_EXE_CALLBACK exe_callback; | 1503 | ASC_EXE_CALLBACK exe_callback; |
1517 | ASC_SCSI_BIT_ID_TYPE init_sdtr; | 1504 | ASC_SCSI_BIT_ID_TYPE init_sdtr; |
1518 | ASC_SCSI_BIT_ID_TYPE sdtr_done; | 1505 | ASC_SCSI_BIT_ID_TYPE sdtr_done; |
1519 | ASC_SCSI_BIT_ID_TYPE use_tagged_qng; | 1506 | ASC_SCSI_BIT_ID_TYPE use_tagged_qng; |
1520 | ASC_SCSI_BIT_ID_TYPE unit_not_ready; | 1507 | ASC_SCSI_BIT_ID_TYPE unit_not_ready; |
1521 | ASC_SCSI_BIT_ID_TYPE queue_full_or_busy; | 1508 | ASC_SCSI_BIT_ID_TYPE queue_full_or_busy; |
1522 | ASC_SCSI_BIT_ID_TYPE start_motor; | 1509 | ASC_SCSI_BIT_ID_TYPE start_motor; |
1523 | uchar scsi_reset_wait; | 1510 | uchar scsi_reset_wait; |
1524 | uchar chip_no; | 1511 | uchar chip_no; |
1525 | char is_in_int; | 1512 | char is_in_int; |
1526 | uchar max_total_qng; | 1513 | uchar max_total_qng; |
1527 | uchar cur_total_qng; | 1514 | uchar cur_total_qng; |
1528 | uchar in_critical_cnt; | 1515 | uchar in_critical_cnt; |
1529 | uchar irq_no; | 1516 | uchar irq_no; |
1530 | uchar last_q_shortage; | 1517 | uchar last_q_shortage; |
1531 | ushort init_state; | 1518 | ushort init_state; |
1532 | uchar cur_dvc_qng[ASC_MAX_TID + 1]; | 1519 | uchar cur_dvc_qng[ASC_MAX_TID + 1]; |
1533 | uchar max_dvc_qng[ASC_MAX_TID + 1]; | 1520 | uchar max_dvc_qng[ASC_MAX_TID + 1]; |
1534 | ASC_SCSI_Q *scsiq_busy_head[ASC_MAX_TID + 1]; | 1521 | ASC_SCSI_Q *scsiq_busy_head[ASC_MAX_TID + 1]; |
1535 | ASC_SCSI_Q *scsiq_busy_tail[ASC_MAX_TID + 1]; | 1522 | ASC_SCSI_Q *scsiq_busy_tail[ASC_MAX_TID + 1]; |
1536 | uchar sdtr_period_tbl[ASC_MAX_SYN_XFER_NO]; | 1523 | uchar sdtr_period_tbl[ASC_MAX_SYN_XFER_NO]; |
1537 | ASC_DVC_CFG *cfg; | 1524 | ASC_DVC_CFG *cfg; |
1538 | ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer_always; | 1525 | ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer_always; |
1539 | char redo_scam; | 1526 | char redo_scam; |
1540 | ushort res2; | 1527 | ushort res2; |
1541 | uchar dos_int13_table[ASC_MAX_TID + 1]; | 1528 | uchar dos_int13_table[ASC_MAX_TID + 1]; |
1542 | ASC_DCNT max_dma_count; | 1529 | ASC_DCNT max_dma_count; |
1543 | ASC_SCSI_BIT_ID_TYPE no_scam; | 1530 | ASC_SCSI_BIT_ID_TYPE no_scam; |
1544 | ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer; | 1531 | ASC_SCSI_BIT_ID_TYPE pci_fix_asyn_xfer; |
1545 | uchar max_sdtr_index; | 1532 | uchar max_sdtr_index; |
1546 | uchar host_init_sdtr_index; | 1533 | uchar host_init_sdtr_index; |
1547 | struct asc_board *drv_ptr; | 1534 | struct asc_board *drv_ptr; |
1548 | ASC_DCNT uc_break; | 1535 | ASC_DCNT uc_break; |
1549 | } ASC_DVC_VAR; | 1536 | } ASC_DVC_VAR; |
1550 | 1537 | ||
1551 | typedef struct asc_dvc_inq_info { | 1538 | typedef struct asc_dvc_inq_info { |
1552 | uchar type[ASC_MAX_TID + 1][ASC_MAX_LUN + 1]; | 1539 | uchar type[ASC_MAX_TID + 1][ASC_MAX_LUN + 1]; |
1553 | } ASC_DVC_INQ_INFO; | 1540 | } ASC_DVC_INQ_INFO; |
1554 | 1541 | ||
1555 | typedef struct asc_cap_info { | 1542 | typedef struct asc_cap_info { |
1556 | ASC_DCNT lba; | 1543 | ASC_DCNT lba; |
1557 | ASC_DCNT blk_size; | 1544 | ASC_DCNT blk_size; |
1558 | } ASC_CAP_INFO; | 1545 | } ASC_CAP_INFO; |
1559 | 1546 | ||
1560 | typedef struct asc_cap_info_array { | 1547 | typedef struct asc_cap_info_array { |
1561 | ASC_CAP_INFO cap_info[ASC_MAX_TID + 1][ASC_MAX_LUN + 1]; | 1548 | ASC_CAP_INFO cap_info[ASC_MAX_TID + 1][ASC_MAX_LUN + 1]; |
1562 | } ASC_CAP_INFO_ARRAY; | 1549 | } ASC_CAP_INFO_ARRAY; |
1563 | 1550 | ||
1564 | #define ASC_MCNTL_NO_SEL_TIMEOUT (ushort)0x0001 | 1551 | #define ASC_MCNTL_NO_SEL_TIMEOUT (ushort)0x0001 |
@@ -1603,23 +1590,23 @@ typedef struct asc_cap_info_array { | |||
1603 | ((cfg)->id_speed = ((cfg)->id_speed & 0x0f) | ((spd) & 0x0f) << 4) | 1590 | ((cfg)->id_speed = ((cfg)->id_speed & 0x0f) | ((spd) & 0x0f) << 4) |
1604 | 1591 | ||
1605 | typedef struct asceep_config { | 1592 | typedef struct asceep_config { |
1606 | ushort cfg_lsw; | 1593 | ushort cfg_lsw; |
1607 | ushort cfg_msw; | 1594 | ushort cfg_msw; |
1608 | uchar init_sdtr; | 1595 | uchar init_sdtr; |
1609 | uchar disc_enable; | 1596 | uchar disc_enable; |
1610 | uchar use_cmd_qng; | 1597 | uchar use_cmd_qng; |
1611 | uchar start_motor; | 1598 | uchar start_motor; |
1612 | uchar max_total_qng; | 1599 | uchar max_total_qng; |
1613 | uchar max_tag_qng; | 1600 | uchar max_tag_qng; |
1614 | uchar bios_scan; | 1601 | uchar bios_scan; |
1615 | uchar power_up_wait; | 1602 | uchar power_up_wait; |
1616 | uchar no_scam; | 1603 | uchar no_scam; |
1617 | uchar id_speed; /* low order 4 bits is chip scsi id */ | 1604 | uchar id_speed; /* low order 4 bits is chip scsi id */ |
1618 | /* high order 4 bits is isa dma speed */ | 1605 | /* high order 4 bits is isa dma speed */ |
1619 | uchar dos_int13_table[ASC_MAX_TID + 1]; | 1606 | uchar dos_int13_table[ASC_MAX_TID + 1]; |
1620 | uchar adapter_info[6]; | 1607 | uchar adapter_info[6]; |
1621 | ushort cntl; | 1608 | ushort cntl; |
1622 | ushort chksum; | 1609 | ushort chksum; |
1623 | } ASCEEP_CONFIG; | 1610 | } ASCEEP_CONFIG; |
1624 | 1611 | ||
1625 | #define ASC_PCI_CFG_LSW_SCSI_PARITY 0x0800 | 1612 | #define ASC_PCI_CFG_LSW_SCSI_PARITY 0x0800 |
@@ -1827,8 +1814,8 @@ typedef struct asceep_config { | |||
1827 | #define ASC_MC_SAVE_DATA_WSIZE 0x40 | 1814 | #define ASC_MC_SAVE_DATA_WSIZE 0x40 |
1828 | 1815 | ||
1829 | typedef struct asc_mc_saved { | 1816 | typedef struct asc_mc_saved { |
1830 | ushort data[ASC_MC_SAVE_DATA_WSIZE]; | 1817 | ushort data[ASC_MC_SAVE_DATA_WSIZE]; |
1831 | ushort code[ASC_MC_SAVE_CODE_WSIZE]; | 1818 | ushort code[ASC_MC_SAVE_CODE_WSIZE]; |
1832 | } ASC_MC_SAVED; | 1819 | } ASC_MC_SAVED; |
1833 | 1820 | ||
1834 | #define AscGetQDoneInProgress(port) AscReadLramByte((port), ASCV_Q_DONE_IN_PROGRESS_B) | 1821 | #define AscGetQDoneInProgress(port) AscReadLramByte((port), ASCV_Q_DONE_IN_PROGRESS_B) |
@@ -1900,120 +1887,113 @@ typedef struct asc_mc_saved { | |||
1900 | #define AscReadChipDvcID(port) (uchar)inp((port)+IOP_REG_ID) | 1887 | #define AscReadChipDvcID(port) (uchar)inp((port)+IOP_REG_ID) |
1901 | #define AscWriteChipDvcID(port, data) outp((port)+IOP_REG_ID, data) | 1888 | #define AscWriteChipDvcID(port, data) outp((port)+IOP_REG_ID, data) |
1902 | 1889 | ||
1903 | STATIC int AscWriteEEPCmdReg(PortAddr iop_base, uchar cmd_reg); | 1890 | static int AscWriteEEPCmdReg(PortAddr iop_base, uchar cmd_reg); |
1904 | STATIC int AscWriteEEPDataReg(PortAddr iop_base, ushort data_reg); | 1891 | static int AscWriteEEPDataReg(PortAddr iop_base, ushort data_reg); |
1905 | STATIC void AscWaitEEPRead(void); | 1892 | static void AscWaitEEPRead(void); |
1906 | STATIC void AscWaitEEPWrite(void); | 1893 | static void AscWaitEEPWrite(void); |
1907 | STATIC ushort AscReadEEPWord(PortAddr, uchar); | 1894 | static ushort AscReadEEPWord(PortAddr, uchar); |
1908 | STATIC ushort AscWriteEEPWord(PortAddr, uchar, ushort); | 1895 | static ushort AscWriteEEPWord(PortAddr, uchar, ushort); |
1909 | STATIC ushort AscGetEEPConfig(PortAddr, ASCEEP_CONFIG *, ushort); | 1896 | static ushort AscGetEEPConfig(PortAddr, ASCEEP_CONFIG *, ushort); |
1910 | STATIC int AscSetEEPConfigOnce(PortAddr, ASCEEP_CONFIG *, ushort); | 1897 | static int AscSetEEPConfigOnce(PortAddr, ASCEEP_CONFIG *, ushort); |
1911 | STATIC int AscSetEEPConfig(PortAddr, ASCEEP_CONFIG *, ushort); | 1898 | static int AscSetEEPConfig(PortAddr, ASCEEP_CONFIG *, ushort); |
1912 | STATIC int AscStartChip(PortAddr); | 1899 | static int AscStartChip(PortAddr); |
1913 | STATIC int AscStopChip(PortAddr); | 1900 | static int AscStopChip(PortAddr); |
1914 | STATIC void AscSetChipIH(PortAddr, ushort); | 1901 | static void AscSetChipIH(PortAddr, ushort); |
1915 | STATIC int AscIsChipHalted(PortAddr); | 1902 | static int AscIsChipHalted(PortAddr); |
1916 | STATIC void AscAckInterrupt(PortAddr); | 1903 | static void AscAckInterrupt(PortAddr); |
1917 | STATIC void AscDisableInterrupt(PortAddr); | 1904 | static void AscDisableInterrupt(PortAddr); |
1918 | STATIC void AscEnableInterrupt(PortAddr); | 1905 | static void AscEnableInterrupt(PortAddr); |
1919 | STATIC void AscSetBank(PortAddr, uchar); | 1906 | static void AscSetBank(PortAddr, uchar); |
1920 | STATIC int AscResetChipAndScsiBus(ASC_DVC_VAR *); | 1907 | static int AscResetChipAndScsiBus(ASC_DVC_VAR *); |
1921 | #ifdef CONFIG_ISA | 1908 | #ifdef CONFIG_ISA |
1922 | STATIC ushort AscGetIsaDmaChannel(PortAddr); | 1909 | static ushort AscGetIsaDmaChannel(PortAddr); |
1923 | STATIC ushort AscSetIsaDmaChannel(PortAddr, ushort); | 1910 | static ushort AscSetIsaDmaChannel(PortAddr, ushort); |
1924 | STATIC uchar AscSetIsaDmaSpeed(PortAddr, uchar); | 1911 | static uchar AscSetIsaDmaSpeed(PortAddr, uchar); |
1925 | STATIC uchar AscGetIsaDmaSpeed(PortAddr); | 1912 | static uchar AscGetIsaDmaSpeed(PortAddr); |
1926 | #endif /* CONFIG_ISA */ | 1913 | #endif /* CONFIG_ISA */ |
1927 | STATIC uchar AscReadLramByte(PortAddr, ushort); | 1914 | static uchar AscReadLramByte(PortAddr, ushort); |
1928 | STATIC ushort AscReadLramWord(PortAddr, ushort); | 1915 | static ushort AscReadLramWord(PortAddr, ushort); |
1929 | #if CC_VERY_LONG_SG_LIST | 1916 | #if CC_VERY_LONG_SG_LIST |
1930 | STATIC ASC_DCNT AscReadLramDWord(PortAddr, ushort); | 1917 | static ASC_DCNT AscReadLramDWord(PortAddr, ushort); |
1931 | #endif /* CC_VERY_LONG_SG_LIST */ | 1918 | #endif /* CC_VERY_LONG_SG_LIST */ |
1932 | STATIC void AscWriteLramWord(PortAddr, ushort, ushort); | 1919 | static void AscWriteLramWord(PortAddr, ushort, ushort); |
1933 | STATIC void AscWriteLramByte(PortAddr, ushort, uchar); | 1920 | static void AscWriteLramByte(PortAddr, ushort, uchar); |
1934 | STATIC ASC_DCNT AscMemSumLramWord(PortAddr, ushort, int); | 1921 | static ASC_DCNT AscMemSumLramWord(PortAddr, ushort, int); |
1935 | STATIC void AscMemWordSetLram(PortAddr, ushort, ushort, int); | 1922 | static void AscMemWordSetLram(PortAddr, ushort, ushort, int); |
1936 | STATIC void AscMemWordCopyPtrToLram(PortAddr, ushort, uchar *, int); | 1923 | static void AscMemWordCopyPtrToLram(PortAddr, ushort, uchar *, int); |
1937 | STATIC void AscMemDWordCopyPtrToLram(PortAddr, ushort, uchar *, int); | 1924 | static void AscMemDWordCopyPtrToLram(PortAddr, ushort, uchar *, int); |
1938 | STATIC void AscMemWordCopyPtrFromLram(PortAddr, ushort, uchar *, int); | 1925 | static void AscMemWordCopyPtrFromLram(PortAddr, ushort, uchar *, int); |
1939 | STATIC ushort AscInitAscDvcVar(ASC_DVC_VAR *); | 1926 | static ushort AscInitAscDvcVar(ASC_DVC_VAR *); |
1940 | STATIC ushort AscInitFromEEP(ASC_DVC_VAR *); | 1927 | static ushort AscInitFromEEP(ASC_DVC_VAR *); |
1941 | STATIC ushort AscInitFromAscDvcVar(ASC_DVC_VAR *); | 1928 | static ushort AscInitFromAscDvcVar(ASC_DVC_VAR *); |
1942 | STATIC ushort AscInitMicroCodeVar(ASC_DVC_VAR *); | 1929 | static ushort AscInitMicroCodeVar(ASC_DVC_VAR *); |
1943 | STATIC int AscTestExternalLram(ASC_DVC_VAR *); | 1930 | static int AscTestExternalLram(ASC_DVC_VAR *); |
1944 | STATIC uchar AscMsgOutSDTR(ASC_DVC_VAR *, uchar, uchar); | 1931 | static uchar AscMsgOutSDTR(ASC_DVC_VAR *, uchar, uchar); |
1945 | STATIC uchar AscCalSDTRData(ASC_DVC_VAR *, uchar, uchar); | 1932 | static uchar AscCalSDTRData(ASC_DVC_VAR *, uchar, uchar); |
1946 | STATIC void AscSetChipSDTR(PortAddr, uchar, uchar); | 1933 | static void AscSetChipSDTR(PortAddr, uchar, uchar); |
1947 | STATIC uchar AscGetSynPeriodIndex(ASC_DVC_VAR *, uchar); | 1934 | static uchar AscGetSynPeriodIndex(ASC_DVC_VAR *, uchar); |
1948 | STATIC uchar AscAllocFreeQueue(PortAddr, uchar); | 1935 | static uchar AscAllocFreeQueue(PortAddr, uchar); |
1949 | STATIC uchar AscAllocMultipleFreeQueue(PortAddr, uchar, uchar); | 1936 | static uchar AscAllocMultipleFreeQueue(PortAddr, uchar, uchar); |
1950 | STATIC int AscHostReqRiscHalt(PortAddr); | 1937 | static int AscHostReqRiscHalt(PortAddr); |
1951 | STATIC int AscStopQueueExe(PortAddr); | 1938 | static int AscStopQueueExe(PortAddr); |
1952 | STATIC int AscSendScsiQueue(ASC_DVC_VAR *, | 1939 | static int AscSendScsiQueue(ASC_DVC_VAR *, |
1953 | ASC_SCSI_Q * scsiq, | 1940 | ASC_SCSI_Q *scsiq, uchar n_q_required); |
1954 | uchar n_q_required); | 1941 | static int AscPutReadyQueue(ASC_DVC_VAR *, ASC_SCSI_Q *, uchar); |
1955 | STATIC int AscPutReadyQueue(ASC_DVC_VAR *, | 1942 | static int AscPutReadySgListQueue(ASC_DVC_VAR *, ASC_SCSI_Q *, uchar); |
1956 | ASC_SCSI_Q *, uchar); | 1943 | static int AscSetChipSynRegAtID(PortAddr, uchar, uchar); |
1957 | STATIC int AscPutReadySgListQueue(ASC_DVC_VAR *, | 1944 | static int AscSetRunChipSynRegAtID(PortAddr, uchar, uchar); |
1958 | ASC_SCSI_Q *, uchar); | 1945 | static ushort AscInitLram(ASC_DVC_VAR *); |
1959 | STATIC int AscSetChipSynRegAtID(PortAddr, uchar, uchar); | 1946 | static ushort AscInitQLinkVar(ASC_DVC_VAR *); |
1960 | STATIC int AscSetRunChipSynRegAtID(PortAddr, uchar, uchar); | 1947 | static int AscSetLibErrorCode(ASC_DVC_VAR *, ushort); |
1961 | STATIC ushort AscInitLram(ASC_DVC_VAR *); | 1948 | static int AscIsrChipHalted(ASC_DVC_VAR *); |
1962 | STATIC ushort AscInitQLinkVar(ASC_DVC_VAR *); | 1949 | static uchar _AscCopyLramScsiDoneQ(PortAddr, ushort, |
1963 | STATIC int AscSetLibErrorCode(ASC_DVC_VAR *, ushort); | 1950 | ASC_QDONE_INFO *, ASC_DCNT); |
1964 | STATIC int AscIsrChipHalted(ASC_DVC_VAR *); | 1951 | static int AscIsrQDone(ASC_DVC_VAR *); |
1965 | STATIC uchar _AscCopyLramScsiDoneQ(PortAddr, ushort, | 1952 | static int AscCompareString(uchar *, uchar *, int); |
1966 | ASC_QDONE_INFO *, ASC_DCNT); | ||
1967 | STATIC int AscIsrQDone(ASC_DVC_VAR *); | ||
1968 | STATIC int AscCompareString(uchar *, uchar *, int); | ||
1969 | #ifdef CONFIG_ISA | 1953 | #ifdef CONFIG_ISA |
1970 | STATIC ushort AscGetEisaChipCfg(PortAddr); | 1954 | static ushort AscGetEisaChipCfg(PortAddr); |
1971 | STATIC ASC_DCNT AscGetEisaProductID(PortAddr); | 1955 | static ASC_DCNT AscGetEisaProductID(PortAddr); |
1972 | STATIC PortAddr AscSearchIOPortAddrEISA(PortAddr); | 1956 | static PortAddr AscSearchIOPortAddrEISA(PortAddr); |
1973 | STATIC PortAddr AscSearchIOPortAddr11(PortAddr); | 1957 | static PortAddr AscSearchIOPortAddr11(PortAddr); |
1974 | STATIC PortAddr AscSearchIOPortAddr(PortAddr, ushort); | 1958 | static PortAddr AscSearchIOPortAddr(PortAddr, ushort); |
1975 | STATIC void AscSetISAPNPWaitForKey(void); | 1959 | static void AscSetISAPNPWaitForKey(void); |
1976 | #endif /* CONFIG_ISA */ | 1960 | #endif /* CONFIG_ISA */ |
1977 | STATIC uchar AscGetChipScsiCtrl(PortAddr); | 1961 | static uchar AscGetChipScsiCtrl(PortAddr); |
1978 | STATIC uchar AscSetChipScsiID(PortAddr, uchar); | 1962 | static uchar AscSetChipScsiID(PortAddr, uchar); |
1979 | STATIC uchar AscGetChipVersion(PortAddr, ushort); | 1963 | static uchar AscGetChipVersion(PortAddr, ushort); |
1980 | STATIC ushort AscGetChipBusType(PortAddr); | 1964 | static ushort AscGetChipBusType(PortAddr); |
1981 | STATIC ASC_DCNT AscLoadMicroCode(PortAddr, ushort, uchar *, ushort); | 1965 | static ASC_DCNT AscLoadMicroCode(PortAddr, ushort, uchar *, ushort); |
1982 | STATIC int AscFindSignature(PortAddr); | 1966 | static int AscFindSignature(PortAddr); |
1983 | STATIC void AscToggleIRQAct(PortAddr); | 1967 | static void AscToggleIRQAct(PortAddr); |
1984 | STATIC uchar AscGetChipIRQ(PortAddr, ushort); | 1968 | static uchar AscGetChipIRQ(PortAddr, ushort); |
1985 | STATIC uchar AscSetChipIRQ(PortAddr, uchar, ushort); | 1969 | static uchar AscSetChipIRQ(PortAddr, uchar, ushort); |
1986 | STATIC ushort AscGetChipBiosAddress(PortAddr, ushort); | 1970 | static ushort AscGetChipBiosAddress(PortAddr, ushort); |
1987 | STATIC inline ulong DvcEnterCritical(void); | 1971 | static inline ulong DvcEnterCritical(void); |
1988 | STATIC inline void DvcLeaveCritical(ulong); | 1972 | static inline void DvcLeaveCritical(ulong); |
1989 | #ifdef CONFIG_PCI | 1973 | #ifdef CONFIG_PCI |
1990 | STATIC uchar DvcReadPCIConfigByte(ASC_DVC_VAR *, ushort); | 1974 | static uchar DvcReadPCIConfigByte(ASC_DVC_VAR *, ushort); |
1991 | STATIC void DvcWritePCIConfigByte(ASC_DVC_VAR *, | 1975 | static void DvcWritePCIConfigByte(ASC_DVC_VAR *, ushort, uchar); |
1992 | ushort, uchar); | ||
1993 | #endif /* CONFIG_PCI */ | 1976 | #endif /* CONFIG_PCI */ |
1994 | STATIC ushort AscGetChipBiosAddress(PortAddr, ushort); | 1977 | static ushort AscGetChipBiosAddress(PortAddr, ushort); |
1995 | STATIC void DvcSleepMilliSecond(ASC_DCNT); | 1978 | static void DvcSleepMilliSecond(ASC_DCNT); |
1996 | STATIC void DvcDelayNanoSecond(ASC_DVC_VAR *, ASC_DCNT); | 1979 | static void DvcDelayNanoSecond(ASC_DVC_VAR *, ASC_DCNT); |
1997 | STATIC void DvcPutScsiQ(PortAddr, ushort, uchar *, int); | 1980 | static void DvcPutScsiQ(PortAddr, ushort, uchar *, int); |
1998 | STATIC void DvcGetQinfo(PortAddr, ushort, uchar *, int); | 1981 | static void DvcGetQinfo(PortAddr, ushort, uchar *, int); |
1999 | STATIC ushort AscInitGetConfig(ASC_DVC_VAR *); | 1982 | static ushort AscInitGetConfig(ASC_DVC_VAR *); |
2000 | STATIC ushort AscInitSetConfig(ASC_DVC_VAR *); | 1983 | static ushort AscInitSetConfig(ASC_DVC_VAR *); |
2001 | STATIC ushort AscInitAsc1000Driver(ASC_DVC_VAR *); | 1984 | static ushort AscInitAsc1000Driver(ASC_DVC_VAR *); |
2002 | STATIC void AscAsyncFix(ASC_DVC_VAR *, uchar, | 1985 | static void AscAsyncFix(ASC_DVC_VAR *, uchar, ASC_SCSI_INQUIRY *); |
2003 | ASC_SCSI_INQUIRY *); | 1986 | static int AscTagQueuingSafe(ASC_SCSI_INQUIRY *); |
2004 | STATIC int AscTagQueuingSafe(ASC_SCSI_INQUIRY *); | 1987 | static void AscInquiryHandling(ASC_DVC_VAR *, uchar, ASC_SCSI_INQUIRY *); |
2005 | STATIC void AscInquiryHandling(ASC_DVC_VAR *, | 1988 | static int AscExeScsiQueue(ASC_DVC_VAR *, ASC_SCSI_Q *); |
2006 | uchar, ASC_SCSI_INQUIRY *); | 1989 | static int AscISR(ASC_DVC_VAR *); |
2007 | STATIC int AscExeScsiQueue(ASC_DVC_VAR *, ASC_SCSI_Q *); | 1990 | static uint AscGetNumOfFreeQueue(ASC_DVC_VAR *, uchar, uchar); |
2008 | STATIC int AscISR(ASC_DVC_VAR *); | 1991 | static int AscSgListToQueue(int); |
2009 | STATIC uint AscGetNumOfFreeQueue(ASC_DVC_VAR *, uchar, | ||
2010 | uchar); | ||
2011 | STATIC int AscSgListToQueue(int); | ||
2012 | #ifdef CONFIG_ISA | 1992 | #ifdef CONFIG_ISA |
2013 | STATIC void AscEnableIsaDma(uchar); | 1993 | static void AscEnableIsaDma(uchar); |
2014 | #endif /* CONFIG_ISA */ | 1994 | #endif /* CONFIG_ISA */ |
2015 | STATIC ASC_DCNT AscGetMaxDmaCount(ushort); | 1995 | static ASC_DCNT AscGetMaxDmaCount(ushort); |
2016 | static const char *advansys_info(struct Scsi_Host *shp); | 1996 | static const char *advansys_info(struct Scsi_Host *shost); |
2017 | 1997 | ||
2018 | /* | 1998 | /* |
2019 | * --- Adv Library Constants and Macros | 1999 | * --- Adv Library Constants and Macros |
@@ -2035,10 +2015,10 @@ static const char *advansys_info(struct Scsi_Host *shp); | |||
2035 | * are all consistent at 8, 16, and 32 bits respectively. Pointers | 2015 | * are all consistent at 8, 16, and 32 bits respectively. Pointers |
2036 | * and long types are 64 bits on Alpha and UltraSPARC. | 2016 | * and long types are 64 bits on Alpha and UltraSPARC. |
2037 | */ | 2017 | */ |
2038 | #define ADV_PADDR __u32 /* Physical address data type. */ | 2018 | #define ADV_PADDR __u32 /* Physical address data type. */ |
2039 | #define ADV_VADDR __u32 /* Virtual address data type. */ | 2019 | #define ADV_VADDR __u32 /* Virtual address data type. */ |
2040 | #define ADV_DCNT __u32 /* Unsigned Data count type. */ | 2020 | #define ADV_DCNT __u32 /* Unsigned Data count type. */ |
2041 | #define ADV_SDCNT __s32 /* Signed Data count type. */ | 2021 | #define ADV_SDCNT __s32 /* Signed Data count type. */ |
2042 | 2022 | ||
2043 | /* | 2023 | /* |
2044 | * These macros are used to convert a virtual address to a | 2024 | * These macros are used to convert a virtual address to a |
@@ -2051,7 +2031,7 @@ static const char *advansys_info(struct Scsi_Host *shp); | |||
2051 | #define ADV_VADDR_TO_U32 virt_to_bus | 2031 | #define ADV_VADDR_TO_U32 virt_to_bus |
2052 | #define ADV_U32_TO_VADDR bus_to_virt | 2032 | #define ADV_U32_TO_VADDR bus_to_virt |
2053 | 2033 | ||
2054 | #define AdvPortAddr void __iomem * /* Virtual memory address size */ | 2034 | #define AdvPortAddr void __iomem * /* Virtual memory address size */ |
2055 | 2035 | ||
2056 | /* | 2036 | /* |
2057 | * Define Adv Library required memory access macros. | 2037 | * Define Adv Library required memory access macros. |
@@ -2103,20 +2083,20 @@ static const char *advansys_info(struct Scsi_Host *shp); | |||
2103 | 2083 | ||
2104 | #define ADV_EEP_DVC_CFG_BEGIN (0x00) | 2084 | #define ADV_EEP_DVC_CFG_BEGIN (0x00) |
2105 | #define ADV_EEP_DVC_CFG_END (0x15) | 2085 | #define ADV_EEP_DVC_CFG_END (0x15) |
2106 | #define ADV_EEP_DVC_CTL_BEGIN (0x16) /* location of OEM name */ | 2086 | #define ADV_EEP_DVC_CTL_BEGIN (0x16) /* location of OEM name */ |
2107 | #define ADV_EEP_MAX_WORD_ADDR (0x1E) | 2087 | #define ADV_EEP_MAX_WORD_ADDR (0x1E) |
2108 | 2088 | ||
2109 | #define ADV_EEP_DELAY_MS 100 | 2089 | #define ADV_EEP_DELAY_MS 100 |
2110 | 2090 | ||
2111 | #define ADV_EEPROM_BIG_ENDIAN 0x8000 /* EEPROM Bit 15 */ | 2091 | #define ADV_EEPROM_BIG_ENDIAN 0x8000 /* EEPROM Bit 15 */ |
2112 | #define ADV_EEPROM_BIOS_ENABLE 0x4000 /* EEPROM Bit 14 */ | 2092 | #define ADV_EEPROM_BIOS_ENABLE 0x4000 /* EEPROM Bit 14 */ |
2113 | /* | 2093 | /* |
2114 | * For the ASC3550 Bit 13 is Termination Polarity control bit. | 2094 | * For the ASC3550 Bit 13 is Termination Polarity control bit. |
2115 | * For later ICs Bit 13 controls whether the CIS (Card Information | 2095 | * For later ICs Bit 13 controls whether the CIS (Card Information |
2116 | * Service Section) is loaded from EEPROM. | 2096 | * Service Section) is loaded from EEPROM. |
2117 | */ | 2097 | */ |
2118 | #define ADV_EEPROM_TERM_POL 0x2000 /* EEPROM Bit 13 */ | 2098 | #define ADV_EEPROM_TERM_POL 0x2000 /* EEPROM Bit 13 */ |
2119 | #define ADV_EEPROM_CIS_LD 0x2000 /* EEPROM Bit 13 */ | 2099 | #define ADV_EEPROM_CIS_LD 0x2000 /* EEPROM Bit 13 */ |
2120 | /* | 2100 | /* |
2121 | * ASC38C1600 Bit 11 | 2101 | * ASC38C1600 Bit 11 |
2122 | * | 2102 | * |
@@ -2128,280 +2108,277 @@ static const char *advansys_info(struct Scsi_Host *shp); | |||
2128 | * INT B in the PCI Configuration Space Int Pin field. If it is 1, then | 2108 | * INT B in the PCI Configuration Space Int Pin field. If it is 1, then |
2129 | * Function 1 will specify INT A. | 2109 | * Function 1 will specify INT A. |
2130 | */ | 2110 | */ |
2131 | #define ADV_EEPROM_INTAB 0x0800 /* EEPROM Bit 11 */ | 2111 | #define ADV_EEPROM_INTAB 0x0800 /* EEPROM Bit 11 */ |
2132 | 2112 | ||
2133 | typedef struct adveep_3550_config | 2113 | typedef struct adveep_3550_config { |
2134 | { | 2114 | /* Word Offset, Description */ |
2135 | /* Word Offset, Description */ | 2115 | |
2136 | 2116 | ushort cfg_lsw; /* 00 power up initialization */ | |
2137 | ushort cfg_lsw; /* 00 power up initialization */ | 2117 | /* bit 13 set - Term Polarity Control */ |
2138 | /* bit 13 set - Term Polarity Control */ | 2118 | /* bit 14 set - BIOS Enable */ |
2139 | /* bit 14 set - BIOS Enable */ | 2119 | /* bit 15 set - Big Endian Mode */ |
2140 | /* bit 15 set - Big Endian Mode */ | 2120 | ushort cfg_msw; /* 01 unused */ |
2141 | ushort cfg_msw; /* 01 unused */ | 2121 | ushort disc_enable; /* 02 disconnect enable */ |
2142 | ushort disc_enable; /* 02 disconnect enable */ | 2122 | ushort wdtr_able; /* 03 Wide DTR able */ |
2143 | ushort wdtr_able; /* 03 Wide DTR able */ | 2123 | ushort sdtr_able; /* 04 Synchronous DTR able */ |
2144 | ushort sdtr_able; /* 04 Synchronous DTR able */ | 2124 | ushort start_motor; /* 05 send start up motor */ |
2145 | ushort start_motor; /* 05 send start up motor */ | 2125 | ushort tagqng_able; /* 06 tag queuing able */ |
2146 | ushort tagqng_able; /* 06 tag queuing able */ | 2126 | ushort bios_scan; /* 07 BIOS device control */ |
2147 | ushort bios_scan; /* 07 BIOS device control */ | 2127 | ushort scam_tolerant; /* 08 no scam */ |
2148 | ushort scam_tolerant; /* 08 no scam */ | 2128 | |
2149 | 2129 | uchar adapter_scsi_id; /* 09 Host Adapter ID */ | |
2150 | uchar adapter_scsi_id; /* 09 Host Adapter ID */ | 2130 | uchar bios_boot_delay; /* power up wait */ |
2151 | uchar bios_boot_delay; /* power up wait */ | 2131 | |
2152 | 2132 | uchar scsi_reset_delay; /* 10 reset delay */ | |
2153 | uchar scsi_reset_delay; /* 10 reset delay */ | 2133 | uchar bios_id_lun; /* first boot device scsi id & lun */ |
2154 | uchar bios_id_lun; /* first boot device scsi id & lun */ | 2134 | /* high nibble is lun */ |
2155 | /* high nibble is lun */ | 2135 | /* low nibble is scsi id */ |
2156 | /* low nibble is scsi id */ | 2136 | |
2157 | 2137 | uchar termination; /* 11 0 - automatic */ | |
2158 | uchar termination; /* 11 0 - automatic */ | 2138 | /* 1 - low off / high off */ |
2159 | /* 1 - low off / high off */ | 2139 | /* 2 - low off / high on */ |
2160 | /* 2 - low off / high on */ | 2140 | /* 3 - low on / high on */ |
2161 | /* 3 - low on / high on */ | 2141 | /* There is no low on / high off */ |
2162 | /* There is no low on / high off */ | 2142 | |
2163 | 2143 | uchar reserved1; /* reserved byte (not used) */ | |
2164 | uchar reserved1; /* reserved byte (not used) */ | 2144 | |
2165 | 2145 | ushort bios_ctrl; /* 12 BIOS control bits */ | |
2166 | ushort bios_ctrl; /* 12 BIOS control bits */ | 2146 | /* bit 0 BIOS don't act as initiator. */ |
2167 | /* bit 0 BIOS don't act as initiator. */ | 2147 | /* bit 1 BIOS > 1 GB support */ |
2168 | /* bit 1 BIOS > 1 GB support */ | 2148 | /* bit 2 BIOS > 2 Disk Support */ |
2169 | /* bit 2 BIOS > 2 Disk Support */ | 2149 | /* bit 3 BIOS don't support removables */ |
2170 | /* bit 3 BIOS don't support removables */ | 2150 | /* bit 4 BIOS support bootable CD */ |
2171 | /* bit 4 BIOS support bootable CD */ | 2151 | /* bit 5 BIOS scan enabled */ |
2172 | /* bit 5 BIOS scan enabled */ | 2152 | /* bit 6 BIOS support multiple LUNs */ |
2173 | /* bit 6 BIOS support multiple LUNs */ | 2153 | /* bit 7 BIOS display of message */ |
2174 | /* bit 7 BIOS display of message */ | 2154 | /* bit 8 SCAM disabled */ |
2175 | /* bit 8 SCAM disabled */ | 2155 | /* bit 9 Reset SCSI bus during init. */ |
2176 | /* bit 9 Reset SCSI bus during init. */ | 2156 | /* bit 10 */ |
2177 | /* bit 10 */ | 2157 | /* bit 11 No verbose initialization. */ |
2178 | /* bit 11 No verbose initialization. */ | 2158 | /* bit 12 SCSI parity enabled */ |
2179 | /* bit 12 SCSI parity enabled */ | 2159 | /* bit 13 */ |
2180 | /* bit 13 */ | 2160 | /* bit 14 */ |
2181 | /* bit 14 */ | 2161 | /* bit 15 */ |
2182 | /* bit 15 */ | 2162 | ushort ultra_able; /* 13 ULTRA speed able */ |
2183 | ushort ultra_able; /* 13 ULTRA speed able */ | 2163 | ushort reserved2; /* 14 reserved */ |
2184 | ushort reserved2; /* 14 reserved */ | 2164 | uchar max_host_qng; /* 15 maximum host queuing */ |
2185 | uchar max_host_qng; /* 15 maximum host queuing */ | 2165 | uchar max_dvc_qng; /* maximum per device queuing */ |
2186 | uchar max_dvc_qng; /* maximum per device queuing */ | 2166 | ushort dvc_cntl; /* 16 control bit for driver */ |
2187 | ushort dvc_cntl; /* 16 control bit for driver */ | 2167 | ushort bug_fix; /* 17 control bit for bug fix */ |
2188 | ushort bug_fix; /* 17 control bit for bug fix */ | 2168 | ushort serial_number_word1; /* 18 Board serial number word 1 */ |
2189 | ushort serial_number_word1; /* 18 Board serial number word 1 */ | 2169 | ushort serial_number_word2; /* 19 Board serial number word 2 */ |
2190 | ushort serial_number_word2; /* 19 Board serial number word 2 */ | 2170 | ushort serial_number_word3; /* 20 Board serial number word 3 */ |
2191 | ushort serial_number_word3; /* 20 Board serial number word 3 */ | 2171 | ushort check_sum; /* 21 EEP check sum */ |
2192 | ushort check_sum; /* 21 EEP check sum */ | 2172 | uchar oem_name[16]; /* 22 OEM name */ |
2193 | uchar oem_name[16]; /* 22 OEM name */ | 2173 | ushort dvc_err_code; /* 30 last device driver error code */ |
2194 | ushort dvc_err_code; /* 30 last device driver error code */ | 2174 | ushort adv_err_code; /* 31 last uc and Adv Lib error code */ |
2195 | ushort adv_err_code; /* 31 last uc and Adv Lib error code */ | 2175 | ushort adv_err_addr; /* 32 last uc error address */ |
2196 | ushort adv_err_addr; /* 32 last uc error address */ | 2176 | ushort saved_dvc_err_code; /* 33 saved last dev. driver error code */ |
2197 | ushort saved_dvc_err_code; /* 33 saved last dev. driver error code */ | 2177 | ushort saved_adv_err_code; /* 34 saved last uc and Adv Lib error code */ |
2198 | ushort saved_adv_err_code; /* 34 saved last uc and Adv Lib error code */ | 2178 | ushort saved_adv_err_addr; /* 35 saved last uc error address */ |
2199 | ushort saved_adv_err_addr; /* 35 saved last uc error address */ | 2179 | ushort num_of_err; /* 36 number of error */ |
2200 | ushort num_of_err; /* 36 number of error */ | ||
2201 | } ADVEEP_3550_CONFIG; | 2180 | } ADVEEP_3550_CONFIG; |
2202 | 2181 | ||
2203 | typedef struct adveep_38C0800_config | 2182 | typedef struct adveep_38C0800_config { |
2204 | { | 2183 | /* Word Offset, Description */ |
2205 | /* Word Offset, Description */ | 2184 | |
2206 | 2185 | ushort cfg_lsw; /* 00 power up initialization */ | |
2207 | ushort cfg_lsw; /* 00 power up initialization */ | 2186 | /* bit 13 set - Load CIS */ |
2208 | /* bit 13 set - Load CIS */ | 2187 | /* bit 14 set - BIOS Enable */ |
2209 | /* bit 14 set - BIOS Enable */ | 2188 | /* bit 15 set - Big Endian Mode */ |
2210 | /* bit 15 set - Big Endian Mode */ | 2189 | ushort cfg_msw; /* 01 unused */ |
2211 | ushort cfg_msw; /* 01 unused */ | 2190 | ushort disc_enable; /* 02 disconnect enable */ |
2212 | ushort disc_enable; /* 02 disconnect enable */ | 2191 | ushort wdtr_able; /* 03 Wide DTR able */ |
2213 | ushort wdtr_able; /* 03 Wide DTR able */ | 2192 | ushort sdtr_speed1; /* 04 SDTR Speed TID 0-3 */ |
2214 | ushort sdtr_speed1; /* 04 SDTR Speed TID 0-3 */ | 2193 | ushort start_motor; /* 05 send start up motor */ |
2215 | ushort start_motor; /* 05 send start up motor */ | 2194 | ushort tagqng_able; /* 06 tag queuing able */ |
2216 | ushort tagqng_able; /* 06 tag queuing able */ | 2195 | ushort bios_scan; /* 07 BIOS device control */ |
2217 | ushort bios_scan; /* 07 BIOS device control */ | 2196 | ushort scam_tolerant; /* 08 no scam */ |
2218 | ushort scam_tolerant; /* 08 no scam */ | 2197 | |
2219 | 2198 | uchar adapter_scsi_id; /* 09 Host Adapter ID */ | |
2220 | uchar adapter_scsi_id; /* 09 Host Adapter ID */ | 2199 | uchar bios_boot_delay; /* power up wait */ |
2221 | uchar bios_boot_delay; /* power up wait */ | 2200 | |
2222 | 2201 | uchar scsi_reset_delay; /* 10 reset delay */ | |
2223 | uchar scsi_reset_delay; /* 10 reset delay */ | 2202 | uchar bios_id_lun; /* first boot device scsi id & lun */ |
2224 | uchar bios_id_lun; /* first boot device scsi id & lun */ | 2203 | /* high nibble is lun */ |
2225 | /* high nibble is lun */ | 2204 | /* low nibble is scsi id */ |
2226 | /* low nibble is scsi id */ | 2205 | |
2227 | 2206 | uchar termination_se; /* 11 0 - automatic */ | |
2228 | uchar termination_se; /* 11 0 - automatic */ | 2207 | /* 1 - low off / high off */ |
2229 | /* 1 - low off / high off */ | 2208 | /* 2 - low off / high on */ |
2230 | /* 2 - low off / high on */ | 2209 | /* 3 - low on / high on */ |
2231 | /* 3 - low on / high on */ | 2210 | /* There is no low on / high off */ |
2232 | /* There is no low on / high off */ | 2211 | |
2233 | 2212 | uchar termination_lvd; /* 11 0 - automatic */ | |
2234 | uchar termination_lvd; /* 11 0 - automatic */ | 2213 | /* 1 - low off / high off */ |
2235 | /* 1 - low off / high off */ | 2214 | /* 2 - low off / high on */ |
2236 | /* 2 - low off / high on */ | 2215 | /* 3 - low on / high on */ |
2237 | /* 3 - low on / high on */ | 2216 | /* There is no low on / high off */ |
2238 | /* There is no low on / high off */ | 2217 | |
2239 | 2218 | ushort bios_ctrl; /* 12 BIOS control bits */ | |
2240 | ushort bios_ctrl; /* 12 BIOS control bits */ | 2219 | /* bit 0 BIOS don't act as initiator. */ |
2241 | /* bit 0 BIOS don't act as initiator. */ | 2220 | /* bit 1 BIOS > 1 GB support */ |
2242 | /* bit 1 BIOS > 1 GB support */ | 2221 | /* bit 2 BIOS > 2 Disk Support */ |
2243 | /* bit 2 BIOS > 2 Disk Support */ | 2222 | /* bit 3 BIOS don't support removables */ |
2244 | /* bit 3 BIOS don't support removables */ | 2223 | /* bit 4 BIOS support bootable CD */ |
2245 | /* bit 4 BIOS support bootable CD */ | 2224 | /* bit 5 BIOS scan enabled */ |
2246 | /* bit 5 BIOS scan enabled */ | 2225 | /* bit 6 BIOS support multiple LUNs */ |
2247 | /* bit 6 BIOS support multiple LUNs */ | 2226 | /* bit 7 BIOS display of message */ |
2248 | /* bit 7 BIOS display of message */ | 2227 | /* bit 8 SCAM disabled */ |
2249 | /* bit 8 SCAM disabled */ | 2228 | /* bit 9 Reset SCSI bus during init. */ |
2250 | /* bit 9 Reset SCSI bus during init. */ | 2229 | /* bit 10 */ |
2251 | /* bit 10 */ | 2230 | /* bit 11 No verbose initialization. */ |
2252 | /* bit 11 No verbose initialization. */ | 2231 | /* bit 12 SCSI parity enabled */ |
2253 | /* bit 12 SCSI parity enabled */ | 2232 | /* bit 13 */ |
2254 | /* bit 13 */ | 2233 | /* bit 14 */ |
2255 | /* bit 14 */ | 2234 | /* bit 15 */ |
2256 | /* bit 15 */ | 2235 | ushort sdtr_speed2; /* 13 SDTR speed TID 4-7 */ |
2257 | ushort sdtr_speed2; /* 13 SDTR speed TID 4-7 */ | 2236 | ushort sdtr_speed3; /* 14 SDTR speed TID 8-11 */ |
2258 | ushort sdtr_speed3; /* 14 SDTR speed TID 8-11 */ | 2237 | uchar max_host_qng; /* 15 maximum host queueing */ |
2259 | uchar max_host_qng; /* 15 maximum host queueing */ | 2238 | uchar max_dvc_qng; /* maximum per device queuing */ |
2260 | uchar max_dvc_qng; /* maximum per device queuing */ | 2239 | ushort dvc_cntl; /* 16 control bit for driver */ |
2261 | ushort dvc_cntl; /* 16 control bit for driver */ | 2240 | ushort sdtr_speed4; /* 17 SDTR speed 4 TID 12-15 */ |
2262 | ushort sdtr_speed4; /* 17 SDTR speed 4 TID 12-15 */ | 2241 | ushort serial_number_word1; /* 18 Board serial number word 1 */ |
2263 | ushort serial_number_word1; /* 18 Board serial number word 1 */ | 2242 | ushort serial_number_word2; /* 19 Board serial number word 2 */ |
2264 | ushort serial_number_word2; /* 19 Board serial number word 2 */ | 2243 | ushort serial_number_word3; /* 20 Board serial number word 3 */ |
2265 | ushort serial_number_word3; /* 20 Board serial number word 3 */ | 2244 | ushort check_sum; /* 21 EEP check sum */ |
2266 | ushort check_sum; /* 21 EEP check sum */ | 2245 | uchar oem_name[16]; /* 22 OEM name */ |
2267 | uchar oem_name[16]; /* 22 OEM name */ | 2246 | ushort dvc_err_code; /* 30 last device driver error code */ |
2268 | ushort dvc_err_code; /* 30 last device driver error code */ | 2247 | ushort adv_err_code; /* 31 last uc and Adv Lib error code */ |
2269 | ushort adv_err_code; /* 31 last uc and Adv Lib error code */ | 2248 | ushort adv_err_addr; /* 32 last uc error address */ |
2270 | ushort adv_err_addr; /* 32 last uc error address */ | 2249 | ushort saved_dvc_err_code; /* 33 saved last dev. driver error code */ |
2271 | ushort saved_dvc_err_code; /* 33 saved last dev. driver error code */ | 2250 | ushort saved_adv_err_code; /* 34 saved last uc and Adv Lib error code */ |
2272 | ushort saved_adv_err_code; /* 34 saved last uc and Adv Lib error code */ | 2251 | ushort saved_adv_err_addr; /* 35 saved last uc error address */ |
2273 | ushort saved_adv_err_addr; /* 35 saved last uc error address */ | 2252 | ushort reserved36; /* 36 reserved */ |
2274 | ushort reserved36; /* 36 reserved */ | 2253 | ushort reserved37; /* 37 reserved */ |
2275 | ushort reserved37; /* 37 reserved */ | 2254 | ushort reserved38; /* 38 reserved */ |
2276 | ushort reserved38; /* 38 reserved */ | 2255 | ushort reserved39; /* 39 reserved */ |
2277 | ushort reserved39; /* 39 reserved */ | 2256 | ushort reserved40; /* 40 reserved */ |
2278 | ushort reserved40; /* 40 reserved */ | 2257 | ushort reserved41; /* 41 reserved */ |
2279 | ushort reserved41; /* 41 reserved */ | 2258 | ushort reserved42; /* 42 reserved */ |
2280 | ushort reserved42; /* 42 reserved */ | 2259 | ushort reserved43; /* 43 reserved */ |
2281 | ushort reserved43; /* 43 reserved */ | 2260 | ushort reserved44; /* 44 reserved */ |
2282 | ushort reserved44; /* 44 reserved */ | 2261 | ushort reserved45; /* 45 reserved */ |
2283 | ushort reserved45; /* 45 reserved */ | 2262 | ushort reserved46; /* 46 reserved */ |
2284 | ushort reserved46; /* 46 reserved */ | 2263 | ushort reserved47; /* 47 reserved */ |
2285 | ushort reserved47; /* 47 reserved */ | 2264 | ushort reserved48; /* 48 reserved */ |
2286 | ushort reserved48; /* 48 reserved */ | 2265 | ushort reserved49; /* 49 reserved */ |
2287 | ushort reserved49; /* 49 reserved */ | 2266 | ushort reserved50; /* 50 reserved */ |
2288 | ushort reserved50; /* 50 reserved */ | 2267 | ushort reserved51; /* 51 reserved */ |
2289 | ushort reserved51; /* 51 reserved */ | 2268 | ushort reserved52; /* 52 reserved */ |
2290 | ushort reserved52; /* 52 reserved */ | 2269 | ushort reserved53; /* 53 reserved */ |
2291 | ushort reserved53; /* 53 reserved */ | 2270 | ushort reserved54; /* 54 reserved */ |
2292 | ushort reserved54; /* 54 reserved */ | 2271 | ushort reserved55; /* 55 reserved */ |
2293 | ushort reserved55; /* 55 reserved */ | 2272 | ushort cisptr_lsw; /* 56 CIS PTR LSW */ |
2294 | ushort cisptr_lsw; /* 56 CIS PTR LSW */ | 2273 | ushort cisprt_msw; /* 57 CIS PTR MSW */ |
2295 | ushort cisprt_msw; /* 57 CIS PTR MSW */ | 2274 | ushort subsysvid; /* 58 SubSystem Vendor ID */ |
2296 | ushort subsysvid; /* 58 SubSystem Vendor ID */ | 2275 | ushort subsysid; /* 59 SubSystem ID */ |
2297 | ushort subsysid; /* 59 SubSystem ID */ | 2276 | ushort reserved60; /* 60 reserved */ |
2298 | ushort reserved60; /* 60 reserved */ | 2277 | ushort reserved61; /* 61 reserved */ |
2299 | ushort reserved61; /* 61 reserved */ | 2278 | ushort reserved62; /* 62 reserved */ |
2300 | ushort reserved62; /* 62 reserved */ | 2279 | ushort reserved63; /* 63 reserved */ |
2301 | ushort reserved63; /* 63 reserved */ | ||
2302 | } ADVEEP_38C0800_CONFIG; | 2280 | } ADVEEP_38C0800_CONFIG; |
2303 | 2281 | ||
2304 | typedef struct adveep_38C1600_config | 2282 | typedef struct adveep_38C1600_config { |
2305 | { | 2283 | /* Word Offset, Description */ |
2306 | /* Word Offset, Description */ | 2284 | |
2307 | 2285 | ushort cfg_lsw; /* 00 power up initialization */ | |
2308 | ushort cfg_lsw; /* 00 power up initialization */ | 2286 | /* bit 11 set - Func. 0 INTB, Func. 1 INTA */ |
2309 | /* bit 11 set - Func. 0 INTB, Func. 1 INTA */ | 2287 | /* clear - Func. 0 INTA, Func. 1 INTB */ |
2310 | /* clear - Func. 0 INTA, Func. 1 INTB */ | 2288 | /* bit 13 set - Load CIS */ |
2311 | /* bit 13 set - Load CIS */ | 2289 | /* bit 14 set - BIOS Enable */ |
2312 | /* bit 14 set - BIOS Enable */ | 2290 | /* bit 15 set - Big Endian Mode */ |
2313 | /* bit 15 set - Big Endian Mode */ | 2291 | ushort cfg_msw; /* 01 unused */ |
2314 | ushort cfg_msw; /* 01 unused */ | 2292 | ushort disc_enable; /* 02 disconnect enable */ |
2315 | ushort disc_enable; /* 02 disconnect enable */ | 2293 | ushort wdtr_able; /* 03 Wide DTR able */ |
2316 | ushort wdtr_able; /* 03 Wide DTR able */ | 2294 | ushort sdtr_speed1; /* 04 SDTR Speed TID 0-3 */ |
2317 | ushort sdtr_speed1; /* 04 SDTR Speed TID 0-3 */ | 2295 | ushort start_motor; /* 05 send start up motor */ |
2318 | ushort start_motor; /* 05 send start up motor */ | 2296 | ushort tagqng_able; /* 06 tag queuing able */ |
2319 | ushort tagqng_able; /* 06 tag queuing able */ | 2297 | ushort bios_scan; /* 07 BIOS device control */ |
2320 | ushort bios_scan; /* 07 BIOS device control */ | 2298 | ushort scam_tolerant; /* 08 no scam */ |
2321 | ushort scam_tolerant; /* 08 no scam */ | 2299 | |
2322 | 2300 | uchar adapter_scsi_id; /* 09 Host Adapter ID */ | |
2323 | uchar adapter_scsi_id; /* 09 Host Adapter ID */ | 2301 | uchar bios_boot_delay; /* power up wait */ |
2324 | uchar bios_boot_delay; /* power up wait */ | 2302 | |
2325 | 2303 | uchar scsi_reset_delay; /* 10 reset delay */ | |
2326 | uchar scsi_reset_delay; /* 10 reset delay */ | 2304 | uchar bios_id_lun; /* first boot device scsi id & lun */ |
2327 | uchar bios_id_lun; /* first boot device scsi id & lun */ | 2305 | /* high nibble is lun */ |
2328 | /* high nibble is lun */ | 2306 | /* low nibble is scsi id */ |
2329 | /* low nibble is scsi id */ | 2307 | |
2330 | 2308 | uchar termination_se; /* 11 0 - automatic */ | |
2331 | uchar termination_se; /* 11 0 - automatic */ | 2309 | /* 1 - low off / high off */ |
2332 | /* 1 - low off / high off */ | 2310 | /* 2 - low off / high on */ |
2333 | /* 2 - low off / high on */ | 2311 | /* 3 - low on / high on */ |
2334 | /* 3 - low on / high on */ | 2312 | /* There is no low on / high off */ |
2335 | /* There is no low on / high off */ | 2313 | |
2336 | 2314 | uchar termination_lvd; /* 11 0 - automatic */ | |
2337 | uchar termination_lvd; /* 11 0 - automatic */ | 2315 | /* 1 - low off / high off */ |
2338 | /* 1 - low off / high off */ | 2316 | /* 2 - low off / high on */ |
2339 | /* 2 - low off / high on */ | 2317 | /* 3 - low on / high on */ |
2340 | /* 3 - low on / high on */ | 2318 | /* There is no low on / high off */ |
2341 | /* There is no low on / high off */ | 2319 | |
2342 | 2320 | ushort bios_ctrl; /* 12 BIOS control bits */ | |
2343 | ushort bios_ctrl; /* 12 BIOS control bits */ | 2321 | /* bit 0 BIOS don't act as initiator. */ |
2344 | /* bit 0 BIOS don't act as initiator. */ | 2322 | /* bit 1 BIOS > 1 GB support */ |
2345 | /* bit 1 BIOS > 1 GB support */ | 2323 | /* bit 2 BIOS > 2 Disk Support */ |
2346 | /* bit 2 BIOS > 2 Disk Support */ | 2324 | /* bit 3 BIOS don't support removables */ |
2347 | /* bit 3 BIOS don't support removables */ | 2325 | /* bit 4 BIOS support bootable CD */ |
2348 | /* bit 4 BIOS support bootable CD */ | 2326 | /* bit 5 BIOS scan enabled */ |
2349 | /* bit 5 BIOS scan enabled */ | 2327 | /* bit 6 BIOS support multiple LUNs */ |
2350 | /* bit 6 BIOS support multiple LUNs */ | 2328 | /* bit 7 BIOS display of message */ |
2351 | /* bit 7 BIOS display of message */ | 2329 | /* bit 8 SCAM disabled */ |
2352 | /* bit 8 SCAM disabled */ | 2330 | /* bit 9 Reset SCSI bus during init. */ |
2353 | /* bit 9 Reset SCSI bus during init. */ | 2331 | /* bit 10 Basic Integrity Checking disabled */ |
2354 | /* bit 10 Basic Integrity Checking disabled */ | 2332 | /* bit 11 No verbose initialization. */ |
2355 | /* bit 11 No verbose initialization. */ | 2333 | /* bit 12 SCSI parity enabled */ |
2356 | /* bit 12 SCSI parity enabled */ | 2334 | /* bit 13 AIPP (Asyn. Info. Ph. Prot.) dis. */ |
2357 | /* bit 13 AIPP (Asyn. Info. Ph. Prot.) dis. */ | 2335 | /* bit 14 */ |
2358 | /* bit 14 */ | 2336 | /* bit 15 */ |
2359 | /* bit 15 */ | 2337 | ushort sdtr_speed2; /* 13 SDTR speed TID 4-7 */ |
2360 | ushort sdtr_speed2; /* 13 SDTR speed TID 4-7 */ | 2338 | ushort sdtr_speed3; /* 14 SDTR speed TID 8-11 */ |
2361 | ushort sdtr_speed3; /* 14 SDTR speed TID 8-11 */ | 2339 | uchar max_host_qng; /* 15 maximum host queueing */ |
2362 | uchar max_host_qng; /* 15 maximum host queueing */ | 2340 | uchar max_dvc_qng; /* maximum per device queuing */ |
2363 | uchar max_dvc_qng; /* maximum per device queuing */ | 2341 | ushort dvc_cntl; /* 16 control bit for driver */ |
2364 | ushort dvc_cntl; /* 16 control bit for driver */ | 2342 | ushort sdtr_speed4; /* 17 SDTR speed 4 TID 12-15 */ |
2365 | ushort sdtr_speed4; /* 17 SDTR speed 4 TID 12-15 */ | 2343 | ushort serial_number_word1; /* 18 Board serial number word 1 */ |
2366 | ushort serial_number_word1; /* 18 Board serial number word 1 */ | 2344 | ushort serial_number_word2; /* 19 Board serial number word 2 */ |
2367 | ushort serial_number_word2; /* 19 Board serial number word 2 */ | 2345 | ushort serial_number_word3; /* 20 Board serial number word 3 */ |
2368 | ushort serial_number_word3; /* 20 Board serial number word 3 */ | 2346 | ushort check_sum; /* 21 EEP check sum */ |
2369 | ushort check_sum; /* 21 EEP check sum */ | 2347 | uchar oem_name[16]; /* 22 OEM name */ |
2370 | uchar oem_name[16]; /* 22 OEM name */ | 2348 | ushort dvc_err_code; /* 30 last device driver error code */ |
2371 | ushort dvc_err_code; /* 30 last device driver error code */ | 2349 | ushort adv_err_code; /* 31 last uc and Adv Lib error code */ |
2372 | ushort adv_err_code; /* 31 last uc and Adv Lib error code */ | 2350 | ushort adv_err_addr; /* 32 last uc error address */ |
2373 | ushort adv_err_addr; /* 32 last uc error address */ | 2351 | ushort saved_dvc_err_code; /* 33 saved last dev. driver error code */ |
2374 | ushort saved_dvc_err_code; /* 33 saved last dev. driver error code */ | 2352 | ushort saved_adv_err_code; /* 34 saved last uc and Adv Lib error code */ |
2375 | ushort saved_adv_err_code; /* 34 saved last uc and Adv Lib error code */ | 2353 | ushort saved_adv_err_addr; /* 35 saved last uc error address */ |
2376 | ushort saved_adv_err_addr; /* 35 saved last uc error address */ | 2354 | ushort reserved36; /* 36 reserved */ |
2377 | ushort reserved36; /* 36 reserved */ | 2355 | ushort reserved37; /* 37 reserved */ |
2378 | ushort reserved37; /* 37 reserved */ | 2356 | ushort reserved38; /* 38 reserved */ |
2379 | ushort reserved38; /* 38 reserved */ | 2357 | ushort reserved39; /* 39 reserved */ |
2380 | ushort reserved39; /* 39 reserved */ | 2358 | ushort reserved40; /* 40 reserved */ |
2381 | ushort reserved40; /* 40 reserved */ | 2359 | ushort reserved41; /* 41 reserved */ |
2382 | ushort reserved41; /* 41 reserved */ | 2360 | ushort reserved42; /* 42 reserved */ |
2383 | ushort reserved42; /* 42 reserved */ | 2361 | ushort reserved43; /* 43 reserved */ |
2384 | ushort reserved43; /* 43 reserved */ | 2362 | ushort reserved44; /* 44 reserved */ |
2385 | ushort reserved44; /* 44 reserved */ | 2363 | ushort reserved45; /* 45 reserved */ |
2386 | ushort reserved45; /* 45 reserved */ | 2364 | ushort reserved46; /* 46 reserved */ |
2387 | ushort reserved46; /* 46 reserved */ | 2365 | ushort reserved47; /* 47 reserved */ |
2388 | ushort reserved47; /* 47 reserved */ | 2366 | ushort reserved48; /* 48 reserved */ |
2389 | ushort reserved48; /* 48 reserved */ | 2367 | ushort reserved49; /* 49 reserved */ |
2390 | ushort reserved49; /* 49 reserved */ | 2368 | ushort reserved50; /* 50 reserved */ |
2391 | ushort reserved50; /* 50 reserved */ | 2369 | ushort reserved51; /* 51 reserved */ |
2392 | ushort reserved51; /* 51 reserved */ | 2370 | ushort reserved52; /* 52 reserved */ |
2393 | ushort reserved52; /* 52 reserved */ | 2371 | ushort reserved53; /* 53 reserved */ |
2394 | ushort reserved53; /* 53 reserved */ | 2372 | ushort reserved54; /* 54 reserved */ |
2395 | ushort reserved54; /* 54 reserved */ | 2373 | ushort reserved55; /* 55 reserved */ |
2396 | ushort reserved55; /* 55 reserved */ | 2374 | ushort cisptr_lsw; /* 56 CIS PTR LSW */ |
2397 | ushort cisptr_lsw; /* 56 CIS PTR LSW */ | 2375 | ushort cisprt_msw; /* 57 CIS PTR MSW */ |
2398 | ushort cisprt_msw; /* 57 CIS PTR MSW */ | 2376 | ushort subsysvid; /* 58 SubSystem Vendor ID */ |
2399 | ushort subsysvid; /* 58 SubSystem Vendor ID */ | 2377 | ushort subsysid; /* 59 SubSystem ID */ |
2400 | ushort subsysid; /* 59 SubSystem ID */ | 2378 | ushort reserved60; /* 60 reserved */ |
2401 | ushort reserved60; /* 60 reserved */ | 2379 | ushort reserved61; /* 61 reserved */ |
2402 | ushort reserved61; /* 61 reserved */ | 2380 | ushort reserved62; /* 62 reserved */ |
2403 | ushort reserved62; /* 62 reserved */ | 2381 | ushort reserved63; /* 63 reserved */ |
2404 | ushort reserved63; /* 63 reserved */ | ||
2405 | } ADVEEP_38C1600_CONFIG; | 2382 | } ADVEEP_38C1600_CONFIG; |
2406 | 2383 | ||
2407 | /* | 2384 | /* |
@@ -2427,11 +2404,11 @@ typedef struct adveep_38C1600_config | |||
2427 | #define BIOS_CTRL_SCSI_PARITY 0x1000 | 2404 | #define BIOS_CTRL_SCSI_PARITY 0x1000 |
2428 | #define BIOS_CTRL_AIPP_DIS 0x2000 | 2405 | #define BIOS_CTRL_AIPP_DIS 0x2000 |
2429 | 2406 | ||
2430 | #define ADV_3550_MEMSIZE 0x2000 /* 8 KB Internal Memory */ | 2407 | #define ADV_3550_MEMSIZE 0x2000 /* 8 KB Internal Memory */ |
2431 | #define ADV_3550_IOLEN 0x40 /* I/O Port Range in bytes */ | 2408 | #define ADV_3550_IOLEN 0x40 /* I/O Port Range in bytes */ |
2432 | 2409 | ||
2433 | #define ADV_38C0800_MEMSIZE 0x4000 /* 16 KB Internal Memory */ | 2410 | #define ADV_38C0800_MEMSIZE 0x4000 /* 16 KB Internal Memory */ |
2434 | #define ADV_38C0800_IOLEN 0x100 /* I/O Port Range in bytes */ | 2411 | #define ADV_38C0800_IOLEN 0x100 /* I/O Port Range in bytes */ |
2435 | 2412 | ||
2436 | /* | 2413 | /* |
2437 | * XXX - Since ASC38C1600 Rev.3 has a local RAM failure issue, there is | 2414 | * XXX - Since ASC38C1600 Rev.3 has a local RAM failure issue, there is |
@@ -2440,9 +2417,9 @@ typedef struct adveep_38C1600_config | |||
2440 | * | 2417 | * |
2441 | * #define ADV_38C1600_MEMSIZE 0x8000L * 32 KB Internal Memory * | 2418 | * #define ADV_38C1600_MEMSIZE 0x8000L * 32 KB Internal Memory * |
2442 | */ | 2419 | */ |
2443 | #define ADV_38C1600_MEMSIZE 0x4000 /* 16 KB Internal Memory */ | 2420 | #define ADV_38C1600_MEMSIZE 0x4000 /* 16 KB Internal Memory */ |
2444 | #define ADV_38C1600_IOLEN 0x100 /* I/O Port Range 256 bytes */ | 2421 | #define ADV_38C1600_IOLEN 0x100 /* I/O Port Range 256 bytes */ |
2445 | #define ADV_38C1600_MEMLEN 0x1000 /* Memory Range 4KB bytes */ | 2422 | #define ADV_38C1600_MEMLEN 0x1000 /* Memory Range 4KB bytes */ |
2446 | 2423 | ||
2447 | /* | 2424 | /* |
2448 | * Byte I/O register address from base of 'iop_base'. | 2425 | * Byte I/O register address from base of 'iop_base'. |
@@ -2515,39 +2492,39 @@ typedef struct adveep_38C1600_config | |||
2515 | /* | 2492 | /* |
2516 | * Word I/O register address from base of 'iop_base'. | 2493 | * Word I/O register address from base of 'iop_base'. |
2517 | */ | 2494 | */ |
2518 | #define IOPW_CHIP_ID_0 0x00 /* CID0 */ | 2495 | #define IOPW_CHIP_ID_0 0x00 /* CID0 */ |
2519 | #define IOPW_CTRL_REG 0x02 /* CC */ | 2496 | #define IOPW_CTRL_REG 0x02 /* CC */ |
2520 | #define IOPW_RAM_ADDR 0x04 /* LA */ | 2497 | #define IOPW_RAM_ADDR 0x04 /* LA */ |
2521 | #define IOPW_RAM_DATA 0x06 /* LD */ | 2498 | #define IOPW_RAM_DATA 0x06 /* LD */ |
2522 | #define IOPW_RES_ADDR_08 0x08 | 2499 | #define IOPW_RES_ADDR_08 0x08 |
2523 | #define IOPW_RISC_CSR 0x0A /* CSR */ | 2500 | #define IOPW_RISC_CSR 0x0A /* CSR */ |
2524 | #define IOPW_SCSI_CFG0 0x0C /* CFG0 */ | 2501 | #define IOPW_SCSI_CFG0 0x0C /* CFG0 */ |
2525 | #define IOPW_SCSI_CFG1 0x0E /* CFG1 */ | 2502 | #define IOPW_SCSI_CFG1 0x0E /* CFG1 */ |
2526 | #define IOPW_RES_ADDR_10 0x10 | 2503 | #define IOPW_RES_ADDR_10 0x10 |
2527 | #define IOPW_SEL_MASK 0x12 /* SM */ | 2504 | #define IOPW_SEL_MASK 0x12 /* SM */ |
2528 | #define IOPW_RES_ADDR_14 0x14 | 2505 | #define IOPW_RES_ADDR_14 0x14 |
2529 | #define IOPW_FLASH_ADDR 0x16 /* FA */ | 2506 | #define IOPW_FLASH_ADDR 0x16 /* FA */ |
2530 | #define IOPW_RES_ADDR_18 0x18 | 2507 | #define IOPW_RES_ADDR_18 0x18 |
2531 | #define IOPW_EE_CMD 0x1A /* EC */ | 2508 | #define IOPW_EE_CMD 0x1A /* EC */ |
2532 | #define IOPW_EE_DATA 0x1C /* ED */ | 2509 | #define IOPW_EE_DATA 0x1C /* ED */ |
2533 | #define IOPW_SFIFO_CNT 0x1E /* SFC */ | 2510 | #define IOPW_SFIFO_CNT 0x1E /* SFC */ |
2534 | #define IOPW_RES_ADDR_20 0x20 | 2511 | #define IOPW_RES_ADDR_20 0x20 |
2535 | #define IOPW_Q_BASE 0x22 /* QB */ | 2512 | #define IOPW_Q_BASE 0x22 /* QB */ |
2536 | #define IOPW_QP 0x24 /* QP */ | 2513 | #define IOPW_QP 0x24 /* QP */ |
2537 | #define IOPW_IX 0x26 /* IX */ | 2514 | #define IOPW_IX 0x26 /* IX */ |
2538 | #define IOPW_SP 0x28 /* SP */ | 2515 | #define IOPW_SP 0x28 /* SP */ |
2539 | #define IOPW_PC 0x2A /* PC */ | 2516 | #define IOPW_PC 0x2A /* PC */ |
2540 | #define IOPW_RES_ADDR_2C 0x2C | 2517 | #define IOPW_RES_ADDR_2C 0x2C |
2541 | #define IOPW_RES_ADDR_2E 0x2E | 2518 | #define IOPW_RES_ADDR_2E 0x2E |
2542 | #define IOPW_SCSI_DATA 0x30 /* SD */ | 2519 | #define IOPW_SCSI_DATA 0x30 /* SD */ |
2543 | #define IOPW_SCSI_DATA_HSHK 0x32 /* SDH */ | 2520 | #define IOPW_SCSI_DATA_HSHK 0x32 /* SDH */ |
2544 | #define IOPW_SCSI_CTRL 0x34 /* SC */ | 2521 | #define IOPW_SCSI_CTRL 0x34 /* SC */ |
2545 | #define IOPW_HSHK_CFG 0x36 /* HCFG */ | 2522 | #define IOPW_HSHK_CFG 0x36 /* HCFG */ |
2546 | #define IOPW_SXFR_STATUS 0x36 /* SXS */ | 2523 | #define IOPW_SXFR_STATUS 0x36 /* SXS */ |
2547 | #define IOPW_SXFR_CNTL 0x38 /* SXL */ | 2524 | #define IOPW_SXFR_CNTL 0x38 /* SXL */ |
2548 | #define IOPW_SXFR_CNTH 0x3A /* SXH */ | 2525 | #define IOPW_SXFR_CNTH 0x3A /* SXH */ |
2549 | #define IOPW_RES_ADDR_3C 0x3C | 2526 | #define IOPW_RES_ADDR_3C 0x3C |
2550 | #define IOPW_RFIFO_DATA 0x3E /* RFD */ | 2527 | #define IOPW_RFIFO_DATA 0x3E /* RFD */ |
2551 | 2528 | ||
2552 | /* | 2529 | /* |
2553 | * Doubleword I/O register address from base of 'iop_base'. | 2530 | * Doubleword I/O register address from base of 'iop_base'. |
@@ -2621,36 +2598,36 @@ typedef struct adveep_38C1600_config | |||
2621 | /* | 2598 | /* |
2622 | * SCSI_CFG0 Register bit definitions | 2599 | * SCSI_CFG0 Register bit definitions |
2623 | */ | 2600 | */ |
2624 | #define TIMER_MODEAB 0xC000 /* Watchdog, Second, and Select. Timer Ctrl. */ | 2601 | #define TIMER_MODEAB 0xC000 /* Watchdog, Second, and Select. Timer Ctrl. */ |
2625 | #define PARITY_EN 0x2000 /* Enable SCSI Parity Error detection */ | 2602 | #define PARITY_EN 0x2000 /* Enable SCSI Parity Error detection */ |
2626 | #define EVEN_PARITY 0x1000 /* Select Even Parity */ | 2603 | #define EVEN_PARITY 0x1000 /* Select Even Parity */ |
2627 | #define WD_LONG 0x0800 /* Watchdog Interval, 1: 57 min, 0: 13 sec */ | 2604 | #define WD_LONG 0x0800 /* Watchdog Interval, 1: 57 min, 0: 13 sec */ |
2628 | #define QUEUE_128 0x0400 /* Queue Size, 1: 128 byte, 0: 64 byte */ | 2605 | #define QUEUE_128 0x0400 /* Queue Size, 1: 128 byte, 0: 64 byte */ |
2629 | #define PRIM_MODE 0x0100 /* Primitive SCSI mode */ | 2606 | #define PRIM_MODE 0x0100 /* Primitive SCSI mode */ |
2630 | #define SCAM_EN 0x0080 /* Enable SCAM selection */ | 2607 | #define SCAM_EN 0x0080 /* Enable SCAM selection */ |
2631 | #define SEL_TMO_LONG 0x0040 /* Sel/Resel Timeout, 1: 400 ms, 0: 1.6 ms */ | 2608 | #define SEL_TMO_LONG 0x0040 /* Sel/Resel Timeout, 1: 400 ms, 0: 1.6 ms */ |
2632 | #define CFRM_ID 0x0020 /* SCAM id sel. confirm., 1: fast, 0: 6.4 ms */ | 2609 | #define CFRM_ID 0x0020 /* SCAM id sel. confirm., 1: fast, 0: 6.4 ms */ |
2633 | #define OUR_ID_EN 0x0010 /* Enable OUR_ID bits */ | 2610 | #define OUR_ID_EN 0x0010 /* Enable OUR_ID bits */ |
2634 | #define OUR_ID 0x000F /* SCSI ID */ | 2611 | #define OUR_ID 0x000F /* SCSI ID */ |
2635 | 2612 | ||
2636 | /* | 2613 | /* |
2637 | * SCSI_CFG1 Register bit definitions | 2614 | * SCSI_CFG1 Register bit definitions |
2638 | */ | 2615 | */ |
2639 | #define BIG_ENDIAN 0x8000 /* Enable Big Endian Mode MIO:15, EEP:15 */ | 2616 | #define BIG_ENDIAN 0x8000 /* Enable Big Endian Mode MIO:15, EEP:15 */ |
2640 | #define TERM_POL 0x2000 /* Terminator Polarity Ctrl. MIO:13, EEP:13 */ | 2617 | #define TERM_POL 0x2000 /* Terminator Polarity Ctrl. MIO:13, EEP:13 */ |
2641 | #define SLEW_RATE 0x1000 /* SCSI output buffer slew rate */ | 2618 | #define SLEW_RATE 0x1000 /* SCSI output buffer slew rate */ |
2642 | #define FILTER_SEL 0x0C00 /* Filter Period Selection */ | 2619 | #define FILTER_SEL 0x0C00 /* Filter Period Selection */ |
2643 | #define FLTR_DISABLE 0x0000 /* Input Filtering Disabled */ | 2620 | #define FLTR_DISABLE 0x0000 /* Input Filtering Disabled */ |
2644 | #define FLTR_11_TO_20NS 0x0800 /* Input Filtering 11ns to 20ns */ | 2621 | #define FLTR_11_TO_20NS 0x0800 /* Input Filtering 11ns to 20ns */ |
2645 | #define FLTR_21_TO_39NS 0x0C00 /* Input Filtering 21ns to 39ns */ | 2622 | #define FLTR_21_TO_39NS 0x0C00 /* Input Filtering 21ns to 39ns */ |
2646 | #define ACTIVE_DBL 0x0200 /* Disable Active Negation */ | 2623 | #define ACTIVE_DBL 0x0200 /* Disable Active Negation */ |
2647 | #define DIFF_MODE 0x0100 /* SCSI differential Mode (Read-Only) */ | 2624 | #define DIFF_MODE 0x0100 /* SCSI differential Mode (Read-Only) */ |
2648 | #define DIFF_SENSE 0x0080 /* 1: No SE cables, 0: SE cable (Read-Only) */ | 2625 | #define DIFF_SENSE 0x0080 /* 1: No SE cables, 0: SE cable (Read-Only) */ |
2649 | #define TERM_CTL_SEL 0x0040 /* Enable TERM_CTL_H and TERM_CTL_L */ | 2626 | #define TERM_CTL_SEL 0x0040 /* Enable TERM_CTL_H and TERM_CTL_L */ |
2650 | #define TERM_CTL 0x0030 /* External SCSI Termination Bits */ | 2627 | #define TERM_CTL 0x0030 /* External SCSI Termination Bits */ |
2651 | #define TERM_CTL_H 0x0020 /* Enable External SCSI Upper Termination */ | 2628 | #define TERM_CTL_H 0x0020 /* Enable External SCSI Upper Termination */ |
2652 | #define TERM_CTL_L 0x0010 /* Enable External SCSI Lower Termination */ | 2629 | #define TERM_CTL_L 0x0010 /* Enable External SCSI Lower Termination */ |
2653 | #define CABLE_DETECT 0x000F /* External SCSI Cable Connection Status */ | 2630 | #define CABLE_DETECT 0x000F /* External SCSI Cable Connection Status */ |
2654 | 2631 | ||
2655 | /* | 2632 | /* |
2656 | * Addendum for ASC-38C0800 Chip | 2633 | * Addendum for ASC-38C0800 Chip |
@@ -2663,24 +2640,23 @@ typedef struct adveep_38C1600_config | |||
2663 | * Also each ASC-38C1600 function or channel uses only cable bits [5:4] | 2640 | * Also each ASC-38C1600 function or channel uses only cable bits [5:4] |
2664 | * and [1:0]. Bits [14], [7:6], [3:2] are unused. | 2641 | * and [1:0]. Bits [14], [7:6], [3:2] are unused. |
2665 | */ | 2642 | */ |
2666 | #define DIS_TERM_DRV 0x4000 /* 1: Read c_det[3:0], 0: cannot read */ | 2643 | #define DIS_TERM_DRV 0x4000 /* 1: Read c_det[3:0], 0: cannot read */ |
2667 | #define HVD_LVD_SE 0x1C00 /* Device Detect Bits */ | 2644 | #define HVD_LVD_SE 0x1C00 /* Device Detect Bits */ |
2668 | #define HVD 0x1000 /* HVD Device Detect */ | 2645 | #define HVD 0x1000 /* HVD Device Detect */ |
2669 | #define LVD 0x0800 /* LVD Device Detect */ | 2646 | #define LVD 0x0800 /* LVD Device Detect */ |
2670 | #define SE 0x0400 /* SE Device Detect */ | 2647 | #define SE 0x0400 /* SE Device Detect */ |
2671 | #define TERM_LVD 0x00C0 /* LVD Termination Bits */ | 2648 | #define TERM_LVD 0x00C0 /* LVD Termination Bits */ |
2672 | #define TERM_LVD_HI 0x0080 /* Enable LVD Upper Termination */ | 2649 | #define TERM_LVD_HI 0x0080 /* Enable LVD Upper Termination */ |
2673 | #define TERM_LVD_LO 0x0040 /* Enable LVD Lower Termination */ | 2650 | #define TERM_LVD_LO 0x0040 /* Enable LVD Lower Termination */ |
2674 | #define TERM_SE 0x0030 /* SE Termination Bits */ | 2651 | #define TERM_SE 0x0030 /* SE Termination Bits */ |
2675 | #define TERM_SE_HI 0x0020 /* Enable SE Upper Termination */ | 2652 | #define TERM_SE_HI 0x0020 /* Enable SE Upper Termination */ |
2676 | #define TERM_SE_LO 0x0010 /* Enable SE Lower Termination */ | 2653 | #define TERM_SE_LO 0x0010 /* Enable SE Lower Termination */ |
2677 | #define C_DET_LVD 0x000C /* LVD Cable Detect Bits */ | 2654 | #define C_DET_LVD 0x000C /* LVD Cable Detect Bits */ |
2678 | #define C_DET3 0x0008 /* Cable Detect for LVD External Wide */ | 2655 | #define C_DET3 0x0008 /* Cable Detect for LVD External Wide */ |
2679 | #define C_DET2 0x0004 /* Cable Detect for LVD Internal Wide */ | 2656 | #define C_DET2 0x0004 /* Cable Detect for LVD Internal Wide */ |
2680 | #define C_DET_SE 0x0003 /* SE Cable Detect Bits */ | 2657 | #define C_DET_SE 0x0003 /* SE Cable Detect Bits */ |
2681 | #define C_DET1 0x0002 /* Cable Detect for SE Internal Wide */ | 2658 | #define C_DET1 0x0002 /* Cable Detect for SE Internal Wide */ |
2682 | #define C_DET0 0x0001 /* Cable Detect for SE Internal Narrow */ | 2659 | #define C_DET0 0x0001 /* Cable Detect for SE Internal Narrow */ |
2683 | |||
2684 | 2660 | ||
2685 | #define CABLE_ILLEGAL_A 0x7 | 2661 | #define CABLE_ILLEGAL_A 0x7 |
2686 | /* x 0 0 0 | on on | Illegal (all 3 connectors are used) */ | 2662 | /* x 0 0 0 | on on | Illegal (all 3 connectors are used) */ |
@@ -2691,39 +2667,39 @@ typedef struct adveep_38C1600_config | |||
2691 | /* | 2667 | /* |
2692 | * MEM_CFG Register bit definitions | 2668 | * MEM_CFG Register bit definitions |
2693 | */ | 2669 | */ |
2694 | #define BIOS_EN 0x40 /* BIOS Enable MIO:14,EEP:14 */ | 2670 | #define BIOS_EN 0x40 /* BIOS Enable MIO:14,EEP:14 */ |
2695 | #define FAST_EE_CLK 0x20 /* Diagnostic Bit */ | 2671 | #define FAST_EE_CLK 0x20 /* Diagnostic Bit */ |
2696 | #define RAM_SZ 0x1C /* Specify size of RAM to RISC */ | 2672 | #define RAM_SZ 0x1C /* Specify size of RAM to RISC */ |
2697 | #define RAM_SZ_2KB 0x00 /* 2 KB */ | 2673 | #define RAM_SZ_2KB 0x00 /* 2 KB */ |
2698 | #define RAM_SZ_4KB 0x04 /* 4 KB */ | 2674 | #define RAM_SZ_4KB 0x04 /* 4 KB */ |
2699 | #define RAM_SZ_8KB 0x08 /* 8 KB */ | 2675 | #define RAM_SZ_8KB 0x08 /* 8 KB */ |
2700 | #define RAM_SZ_16KB 0x0C /* 16 KB */ | 2676 | #define RAM_SZ_16KB 0x0C /* 16 KB */ |
2701 | #define RAM_SZ_32KB 0x10 /* 32 KB */ | 2677 | #define RAM_SZ_32KB 0x10 /* 32 KB */ |
2702 | #define RAM_SZ_64KB 0x14 /* 64 KB */ | 2678 | #define RAM_SZ_64KB 0x14 /* 64 KB */ |
2703 | 2679 | ||
2704 | /* | 2680 | /* |
2705 | * DMA_CFG0 Register bit definitions | 2681 | * DMA_CFG0 Register bit definitions |
2706 | * | 2682 | * |
2707 | * This register is only accessible to the host. | 2683 | * This register is only accessible to the host. |
2708 | */ | 2684 | */ |
2709 | #define BC_THRESH_ENB 0x80 /* PCI DMA Start Conditions */ | 2685 | #define BC_THRESH_ENB 0x80 /* PCI DMA Start Conditions */ |
2710 | #define FIFO_THRESH 0x70 /* PCI DMA FIFO Threshold */ | 2686 | #define FIFO_THRESH 0x70 /* PCI DMA FIFO Threshold */ |
2711 | #define FIFO_THRESH_16B 0x00 /* 16 bytes */ | 2687 | #define FIFO_THRESH_16B 0x00 /* 16 bytes */ |
2712 | #define FIFO_THRESH_32B 0x20 /* 32 bytes */ | 2688 | #define FIFO_THRESH_32B 0x20 /* 32 bytes */ |
2713 | #define FIFO_THRESH_48B 0x30 /* 48 bytes */ | 2689 | #define FIFO_THRESH_48B 0x30 /* 48 bytes */ |
2714 | #define FIFO_THRESH_64B 0x40 /* 64 bytes */ | 2690 | #define FIFO_THRESH_64B 0x40 /* 64 bytes */ |
2715 | #define FIFO_THRESH_80B 0x50 /* 80 bytes (default) */ | 2691 | #define FIFO_THRESH_80B 0x50 /* 80 bytes (default) */ |
2716 | #define FIFO_THRESH_96B 0x60 /* 96 bytes */ | 2692 | #define FIFO_THRESH_96B 0x60 /* 96 bytes */ |
2717 | #define FIFO_THRESH_112B 0x70 /* 112 bytes */ | 2693 | #define FIFO_THRESH_112B 0x70 /* 112 bytes */ |
2718 | #define START_CTL 0x0C /* DMA start conditions */ | 2694 | #define START_CTL 0x0C /* DMA start conditions */ |
2719 | #define START_CTL_TH 0x00 /* Wait threshold level (default) */ | 2695 | #define START_CTL_TH 0x00 /* Wait threshold level (default) */ |
2720 | #define START_CTL_ID 0x04 /* Wait SDMA/SBUS idle */ | 2696 | #define START_CTL_ID 0x04 /* Wait SDMA/SBUS idle */ |
2721 | #define START_CTL_THID 0x08 /* Wait threshold and SDMA/SBUS idle */ | 2697 | #define START_CTL_THID 0x08 /* Wait threshold and SDMA/SBUS idle */ |
2722 | #define START_CTL_EMFU 0x0C /* Wait SDMA FIFO empty/full */ | 2698 | #define START_CTL_EMFU 0x0C /* Wait SDMA FIFO empty/full */ |
2723 | #define READ_CMD 0x03 /* Memory Read Method */ | 2699 | #define READ_CMD 0x03 /* Memory Read Method */ |
2724 | #define READ_CMD_MR 0x00 /* Memory Read */ | 2700 | #define READ_CMD_MR 0x00 /* Memory Read */ |
2725 | #define READ_CMD_MRL 0x02 /* Memory Read Long */ | 2701 | #define READ_CMD_MRL 0x02 /* Memory Read Long */ |
2726 | #define READ_CMD_MRM 0x03 /* Memory Read Multiple (default) */ | 2702 | #define READ_CMD_MRM 0x03 /* Memory Read Multiple (default) */ |
2727 | 2703 | ||
2728 | /* | 2704 | /* |
2729 | * ASC-38C0800 RAM BIST Register bit definitions | 2705 | * ASC-38C0800 RAM BIST Register bit definitions |
@@ -2747,7 +2723,7 @@ typedef struct adveep_38C1600_config | |||
2747 | * IOPB_PCI_INT_CFG Bit Field Definitions | 2723 | * IOPB_PCI_INT_CFG Bit Field Definitions |
2748 | */ | 2724 | */ |
2749 | 2725 | ||
2750 | #define INTAB_LD 0x80 /* Value loaded from EEPROM Bit 11. */ | 2726 | #define INTAB_LD 0x80 /* Value loaded from EEPROM Bit 11. */ |
2751 | 2727 | ||
2752 | /* | 2728 | /* |
2753 | * Bit 1 can be set to change the interrupt for the Function to operate in | 2729 | * Bit 1 can be set to change the interrupt for the Function to operate in |
@@ -2780,53 +2756,52 @@ typedef struct adveep_38C1600_config | |||
2780 | #define ADV_BUSY 0 | 2756 | #define ADV_BUSY 0 |
2781 | #define ADV_ERROR (-1) | 2757 | #define ADV_ERROR (-1) |
2782 | 2758 | ||
2783 | |||
2784 | /* | 2759 | /* |
2785 | * ADV_DVC_VAR 'warn_code' values | 2760 | * ADV_DVC_VAR 'warn_code' values |
2786 | */ | 2761 | */ |
2787 | #define ASC_WARN_BUSRESET_ERROR 0x0001 /* SCSI Bus Reset error */ | 2762 | #define ASC_WARN_BUSRESET_ERROR 0x0001 /* SCSI Bus Reset error */ |
2788 | #define ASC_WARN_EEPROM_CHKSUM 0x0002 /* EEP check sum error */ | 2763 | #define ASC_WARN_EEPROM_CHKSUM 0x0002 /* EEP check sum error */ |
2789 | #define ASC_WARN_EEPROM_TERMINATION 0x0004 /* EEP termination bad field */ | 2764 | #define ASC_WARN_EEPROM_TERMINATION 0x0004 /* EEP termination bad field */ |
2790 | #define ASC_WARN_SET_PCI_CONFIG_SPACE 0x0080 /* PCI config space set error */ | 2765 | #define ASC_WARN_SET_PCI_CONFIG_SPACE 0x0080 /* PCI config space set error */ |
2791 | #define ASC_WARN_ERROR 0xFFFF /* ADV_ERROR return */ | 2766 | #define ASC_WARN_ERROR 0xFFFF /* ADV_ERROR return */ |
2792 | 2767 | ||
2793 | #define ADV_MAX_TID 15 /* max. target identifier */ | 2768 | #define ADV_MAX_TID 15 /* max. target identifier */ |
2794 | #define ADV_MAX_LUN 7 /* max. logical unit number */ | 2769 | #define ADV_MAX_LUN 7 /* max. logical unit number */ |
2795 | 2770 | ||
2796 | /* | 2771 | /* |
2797 | * Error code values are set in ADV_DVC_VAR 'err_code'. | 2772 | * Error code values are set in ADV_DVC_VAR 'err_code'. |
2798 | */ | 2773 | */ |
2799 | #define ASC_IERR_WRITE_EEPROM 0x0001 /* write EEPROM error */ | 2774 | #define ASC_IERR_WRITE_EEPROM 0x0001 /* write EEPROM error */ |
2800 | #define ASC_IERR_MCODE_CHKSUM 0x0002 /* micro code check sum error */ | 2775 | #define ASC_IERR_MCODE_CHKSUM 0x0002 /* micro code check sum error */ |
2801 | #define ASC_IERR_NO_CARRIER 0x0004 /* No more carrier memory. */ | 2776 | #define ASC_IERR_NO_CARRIER 0x0004 /* No more carrier memory. */ |
2802 | #define ASC_IERR_START_STOP_CHIP 0x0008 /* start/stop chip failed */ | 2777 | #define ASC_IERR_START_STOP_CHIP 0x0008 /* start/stop chip failed */ |
2803 | #define ASC_IERR_CHIP_VERSION 0x0040 /* wrong chip version */ | 2778 | #define ASC_IERR_CHIP_VERSION 0x0040 /* wrong chip version */ |
2804 | #define ASC_IERR_SET_SCSI_ID 0x0080 /* set SCSI ID failed */ | 2779 | #define ASC_IERR_SET_SCSI_ID 0x0080 /* set SCSI ID failed */ |
2805 | #define ASC_IERR_HVD_DEVICE 0x0100 /* HVD attached to LVD connector. */ | 2780 | #define ASC_IERR_HVD_DEVICE 0x0100 /* HVD attached to LVD connector. */ |
2806 | #define ASC_IERR_BAD_SIGNATURE 0x0200 /* signature not found */ | 2781 | #define ASC_IERR_BAD_SIGNATURE 0x0200 /* signature not found */ |
2807 | #define ASC_IERR_ILLEGAL_CONNECTION 0x0400 /* Illegal cable connection */ | 2782 | #define ASC_IERR_ILLEGAL_CONNECTION 0x0400 /* Illegal cable connection */ |
2808 | #define ASC_IERR_SINGLE_END_DEVICE 0x0800 /* Single-end used w/differential */ | 2783 | #define ASC_IERR_SINGLE_END_DEVICE 0x0800 /* Single-end used w/differential */ |
2809 | #define ASC_IERR_REVERSED_CABLE 0x1000 /* Narrow flat cable reversed */ | 2784 | #define ASC_IERR_REVERSED_CABLE 0x1000 /* Narrow flat cable reversed */ |
2810 | #define ASC_IERR_BIST_PRE_TEST 0x2000 /* BIST pre-test error */ | 2785 | #define ASC_IERR_BIST_PRE_TEST 0x2000 /* BIST pre-test error */ |
2811 | #define ASC_IERR_BIST_RAM_TEST 0x4000 /* BIST RAM test error */ | 2786 | #define ASC_IERR_BIST_RAM_TEST 0x4000 /* BIST RAM test error */ |
2812 | #define ASC_IERR_BAD_CHIPTYPE 0x8000 /* Invalid 'chip_type' setting. */ | 2787 | #define ASC_IERR_BAD_CHIPTYPE 0x8000 /* Invalid 'chip_type' setting. */ |
2813 | 2788 | ||
2814 | /* | 2789 | /* |
2815 | * Fixed locations of microcode operating variables. | 2790 | * Fixed locations of microcode operating variables. |
2816 | */ | 2791 | */ |
2817 | #define ASC_MC_CODE_BEGIN_ADDR 0x0028 /* microcode start address */ | 2792 | #define ASC_MC_CODE_BEGIN_ADDR 0x0028 /* microcode start address */ |
2818 | #define ASC_MC_CODE_END_ADDR 0x002A /* microcode end address */ | 2793 | #define ASC_MC_CODE_END_ADDR 0x002A /* microcode end address */ |
2819 | #define ASC_MC_CODE_CHK_SUM 0x002C /* microcode code checksum */ | 2794 | #define ASC_MC_CODE_CHK_SUM 0x002C /* microcode code checksum */ |
2820 | #define ASC_MC_VERSION_DATE 0x0038 /* microcode version */ | 2795 | #define ASC_MC_VERSION_DATE 0x0038 /* microcode version */ |
2821 | #define ASC_MC_VERSION_NUM 0x003A /* microcode number */ | 2796 | #define ASC_MC_VERSION_NUM 0x003A /* microcode number */ |
2822 | #define ASC_MC_BIOSMEM 0x0040 /* BIOS RISC Memory Start */ | 2797 | #define ASC_MC_BIOSMEM 0x0040 /* BIOS RISC Memory Start */ |
2823 | #define ASC_MC_BIOSLEN 0x0050 /* BIOS RISC Memory Length */ | 2798 | #define ASC_MC_BIOSLEN 0x0050 /* BIOS RISC Memory Length */ |
2824 | #define ASC_MC_BIOS_SIGNATURE 0x0058 /* BIOS Signature 0x55AA */ | 2799 | #define ASC_MC_BIOS_SIGNATURE 0x0058 /* BIOS Signature 0x55AA */ |
2825 | #define ASC_MC_BIOS_VERSION 0x005A /* BIOS Version (2 bytes) */ | 2800 | #define ASC_MC_BIOS_VERSION 0x005A /* BIOS Version (2 bytes) */ |
2826 | #define ASC_MC_SDTR_SPEED1 0x0090 /* SDTR Speed for TID 0-3 */ | 2801 | #define ASC_MC_SDTR_SPEED1 0x0090 /* SDTR Speed for TID 0-3 */ |
2827 | #define ASC_MC_SDTR_SPEED2 0x0092 /* SDTR Speed for TID 4-7 */ | 2802 | #define ASC_MC_SDTR_SPEED2 0x0092 /* SDTR Speed for TID 4-7 */ |
2828 | #define ASC_MC_SDTR_SPEED3 0x0094 /* SDTR Speed for TID 8-11 */ | 2803 | #define ASC_MC_SDTR_SPEED3 0x0094 /* SDTR Speed for TID 8-11 */ |
2829 | #define ASC_MC_SDTR_SPEED4 0x0096 /* SDTR Speed for TID 12-15 */ | 2804 | #define ASC_MC_SDTR_SPEED4 0x0096 /* SDTR Speed for TID 12-15 */ |
2830 | #define ASC_MC_CHIP_TYPE 0x009A | 2805 | #define ASC_MC_CHIP_TYPE 0x009A |
2831 | #define ASC_MC_INTRB_CODE 0x009B | 2806 | #define ASC_MC_INTRB_CODE 0x009B |
2832 | #define ASC_MC_WDTR_ABLE 0x009C | 2807 | #define ASC_MC_WDTR_ABLE 0x009C |
@@ -2844,9 +2819,9 @@ typedef struct adveep_38C1600_config | |||
2844 | #define ASC_MC_NUMBER_OF_QUEUED_CMD 0x00C0 | 2819 | #define ASC_MC_NUMBER_OF_QUEUED_CMD 0x00C0 |
2845 | #define ASC_MC_NUMBER_OF_MAX_CMD 0x00D0 | 2820 | #define ASC_MC_NUMBER_OF_MAX_CMD 0x00D0 |
2846 | #define ASC_MC_DEVICE_HSHK_CFG_TABLE 0x0100 | 2821 | #define ASC_MC_DEVICE_HSHK_CFG_TABLE 0x0100 |
2847 | #define ASC_MC_CONTROL_FLAG 0x0122 /* Microcode control flag. */ | 2822 | #define ASC_MC_CONTROL_FLAG 0x0122 /* Microcode control flag. */ |
2848 | #define ASC_MC_WDTR_DONE 0x0124 | 2823 | #define ASC_MC_WDTR_DONE 0x0124 |
2849 | #define ASC_MC_CAM_MODE_MASK 0x015E /* CAM mode TID bitmask. */ | 2824 | #define ASC_MC_CAM_MODE_MASK 0x015E /* CAM mode TID bitmask. */ |
2850 | #define ASC_MC_ICQ 0x0160 | 2825 | #define ASC_MC_ICQ 0x0160 |
2851 | #define ASC_MC_IRQ 0x0164 | 2826 | #define ASC_MC_IRQ 0x0164 |
2852 | #define ASC_MC_PPR_ABLE 0x017A | 2827 | #define ASC_MC_PPR_ABLE 0x017A |
@@ -2865,8 +2840,8 @@ typedef struct adveep_38C1600_config | |||
2865 | * Flags set by the Adv Library in RISC variable 'control_flag' (0x122) | 2840 | * Flags set by the Adv Library in RISC variable 'control_flag' (0x122) |
2866 | * and handled by the microcode. | 2841 | * and handled by the microcode. |
2867 | */ | 2842 | */ |
2868 | #define CONTROL_FLAG_IGNORE_PERR 0x0001 /* Ignore DMA Parity Errors */ | 2843 | #define CONTROL_FLAG_IGNORE_PERR 0x0001 /* Ignore DMA Parity Errors */ |
2869 | #define CONTROL_FLAG_ENABLE_AIPP 0x0002 /* Enabled AIPP checking. */ | 2844 | #define CONTROL_FLAG_ENABLE_AIPP 0x0002 /* Enabled AIPP checking. */ |
2870 | 2845 | ||
2871 | /* | 2846 | /* |
2872 | * ASC_MC_DEVICE_HSHK_CFG_TABLE microcode table or HSHK_CFG register format | 2847 | * ASC_MC_DEVICE_HSHK_CFG_TABLE microcode table or HSHK_CFG register format |
@@ -2875,45 +2850,44 @@ typedef struct adveep_38C1600_config | |||
2875 | #define HSHK_CFG_RATE 0x0F00 | 2850 | #define HSHK_CFG_RATE 0x0F00 |
2876 | #define HSHK_CFG_OFFSET 0x001F | 2851 | #define HSHK_CFG_OFFSET 0x001F |
2877 | 2852 | ||
2878 | #define ASC_DEF_MAX_HOST_QNG 0xFD /* Max. number of host commands (253) */ | 2853 | #define ASC_DEF_MAX_HOST_QNG 0xFD /* Max. number of host commands (253) */ |
2879 | #define ASC_DEF_MIN_HOST_QNG 0x10 /* Min. number of host commands (16) */ | 2854 | #define ASC_DEF_MIN_HOST_QNG 0x10 /* Min. number of host commands (16) */ |
2880 | #define ASC_DEF_MAX_DVC_QNG 0x3F /* Max. number commands per device (63) */ | 2855 | #define ASC_DEF_MAX_DVC_QNG 0x3F /* Max. number commands per device (63) */ |
2881 | #define ASC_DEF_MIN_DVC_QNG 0x04 /* Min. number commands per device (4) */ | 2856 | #define ASC_DEF_MIN_DVC_QNG 0x04 /* Min. number commands per device (4) */ |
2882 | 2857 | ||
2883 | #define ASC_QC_DATA_CHECK 0x01 /* Require ASC_QC_DATA_OUT set or clear. */ | 2858 | #define ASC_QC_DATA_CHECK 0x01 /* Require ASC_QC_DATA_OUT set or clear. */ |
2884 | #define ASC_QC_DATA_OUT 0x02 /* Data out DMA transfer. */ | 2859 | #define ASC_QC_DATA_OUT 0x02 /* Data out DMA transfer. */ |
2885 | #define ASC_QC_START_MOTOR 0x04 /* Send auto-start motor before request. */ | 2860 | #define ASC_QC_START_MOTOR 0x04 /* Send auto-start motor before request. */ |
2886 | #define ASC_QC_NO_OVERRUN 0x08 /* Don't report overrun. */ | 2861 | #define ASC_QC_NO_OVERRUN 0x08 /* Don't report overrun. */ |
2887 | #define ASC_QC_FREEZE_TIDQ 0x10 /* Freeze TID queue after request. XXX TBD */ | 2862 | #define ASC_QC_FREEZE_TIDQ 0x10 /* Freeze TID queue after request. XXX TBD */ |
2888 | 2863 | ||
2889 | #define ASC_QSC_NO_DISC 0x01 /* Don't allow disconnect for request. */ | 2864 | #define ASC_QSC_NO_DISC 0x01 /* Don't allow disconnect for request. */ |
2890 | #define ASC_QSC_NO_TAGMSG 0x02 /* Don't allow tag queuing for request. */ | 2865 | #define ASC_QSC_NO_TAGMSG 0x02 /* Don't allow tag queuing for request. */ |
2891 | #define ASC_QSC_NO_SYNC 0x04 /* Don't use Synch. transfer on request. */ | 2866 | #define ASC_QSC_NO_SYNC 0x04 /* Don't use Synch. transfer on request. */ |
2892 | #define ASC_QSC_NO_WIDE 0x08 /* Don't use Wide transfer on request. */ | 2867 | #define ASC_QSC_NO_WIDE 0x08 /* Don't use Wide transfer on request. */ |
2893 | #define ASC_QSC_REDO_DTR 0x10 /* Renegotiate WDTR/SDTR before request. */ | 2868 | #define ASC_QSC_REDO_DTR 0x10 /* Renegotiate WDTR/SDTR before request. */ |
2894 | /* | 2869 | /* |
2895 | * Note: If a Tag Message is to be sent and neither ASC_QSC_HEAD_TAG or | 2870 | * Note: If a Tag Message is to be sent and neither ASC_QSC_HEAD_TAG or |
2896 | * ASC_QSC_ORDERED_TAG is set, then a Simple Tag Message (0x20) is used. | 2871 | * ASC_QSC_ORDERED_TAG is set, then a Simple Tag Message (0x20) is used. |
2897 | */ | 2872 | */ |
2898 | #define ASC_QSC_HEAD_TAG 0x40 /* Use Head Tag Message (0x21). */ | 2873 | #define ASC_QSC_HEAD_TAG 0x40 /* Use Head Tag Message (0x21). */ |
2899 | #define ASC_QSC_ORDERED_TAG 0x80 /* Use Ordered Tag Message (0x22). */ | 2874 | #define ASC_QSC_ORDERED_TAG 0x80 /* Use Ordered Tag Message (0x22). */ |
2900 | 2875 | ||
2901 | /* | 2876 | /* |
2902 | * All fields here are accessed by the board microcode and need to be | 2877 | * All fields here are accessed by the board microcode and need to be |
2903 | * little-endian. | 2878 | * little-endian. |
2904 | */ | 2879 | */ |
2905 | typedef struct adv_carr_t | 2880 | typedef struct adv_carr_t { |
2906 | { | 2881 | ADV_VADDR carr_va; /* Carrier Virtual Address */ |
2907 | ADV_VADDR carr_va; /* Carrier Virtual Address */ | 2882 | ADV_PADDR carr_pa; /* Carrier Physical Address */ |
2908 | ADV_PADDR carr_pa; /* Carrier Physical Address */ | 2883 | ADV_VADDR areq_vpa; /* ASC_SCSI_REQ_Q Virtual or Physical Address */ |
2909 | ADV_VADDR areq_vpa; /* ASC_SCSI_REQ_Q Virtual or Physical Address */ | 2884 | /* |
2910 | /* | 2885 | * next_vpa [31:4] Carrier Virtual or Physical Next Pointer |
2911 | * next_vpa [31:4] Carrier Virtual or Physical Next Pointer | 2886 | * |
2912 | * | 2887 | * next_vpa [3:1] Reserved Bits |
2913 | * next_vpa [3:1] Reserved Bits | 2888 | * next_vpa [0] Done Flag set in Response Queue. |
2914 | * next_vpa [0] Done Flag set in Response Queue. | 2889 | */ |
2915 | */ | 2890 | ADV_VADDR next_vpa; |
2916 | ADV_VADDR next_vpa; | ||
2917 | } ADV_CARR_T; | 2891 | } ADV_CARR_T; |
2918 | 2892 | ||
2919 | /* | 2893 | /* |
@@ -2940,13 +2914,13 @@ typedef struct adv_carr_t | |||
2940 | * The Adv Library should limit use to the lower nibble (4 bits) of | 2914 | * The Adv Library should limit use to the lower nibble (4 bits) of |
2941 | * a_flag. Drivers are free to use the upper nibble (4 bits) of a_flag. | 2915 | * a_flag. Drivers are free to use the upper nibble (4 bits) of a_flag. |
2942 | */ | 2916 | */ |
2943 | #define ADV_POLL_REQUEST 0x01 /* poll for request completion */ | 2917 | #define ADV_POLL_REQUEST 0x01 /* poll for request completion */ |
2944 | #define ADV_SCSIQ_DONE 0x02 /* request done */ | 2918 | #define ADV_SCSIQ_DONE 0x02 /* request done */ |
2945 | #define ADV_DONT_RETRY 0x08 /* don't do retry */ | 2919 | #define ADV_DONT_RETRY 0x08 /* don't do retry */ |
2946 | 2920 | ||
2947 | #define ADV_CHIP_ASC3550 0x01 /* Ultra-Wide IC */ | 2921 | #define ADV_CHIP_ASC3550 0x01 /* Ultra-Wide IC */ |
2948 | #define ADV_CHIP_ASC38C0800 0x02 /* Ultra2-Wide/LVD IC */ | 2922 | #define ADV_CHIP_ASC38C0800 0x02 /* Ultra2-Wide/LVD IC */ |
2949 | #define ADV_CHIP_ASC38C1600 0x03 /* Ultra3-Wide/LVD2 IC */ | 2923 | #define ADV_CHIP_ASC38C1600 0x03 /* Ultra3-Wide/LVD2 IC */ |
2950 | 2924 | ||
2951 | /* | 2925 | /* |
2952 | * Adapter temporary configuration structure | 2926 | * Adapter temporary configuration structure |
@@ -2960,30 +2934,30 @@ typedef struct adv_carr_t | |||
2960 | * value of the field is never reset. | 2934 | * value of the field is never reset. |
2961 | */ | 2935 | */ |
2962 | typedef struct adv_dvc_cfg { | 2936 | typedef struct adv_dvc_cfg { |
2963 | ushort disc_enable; /* enable disconnection */ | 2937 | ushort disc_enable; /* enable disconnection */ |
2964 | uchar chip_version; /* chip version */ | 2938 | uchar chip_version; /* chip version */ |
2965 | uchar termination; /* Term. Ctrl. bits 6-5 of SCSI_CFG1 register */ | 2939 | uchar termination; /* Term. Ctrl. bits 6-5 of SCSI_CFG1 register */ |
2966 | ushort lib_version; /* Adv Library version number */ | 2940 | ushort lib_version; /* Adv Library version number */ |
2967 | ushort control_flag; /* Microcode Control Flag */ | 2941 | ushort control_flag; /* Microcode Control Flag */ |
2968 | ushort mcode_date; /* Microcode date */ | 2942 | ushort mcode_date; /* Microcode date */ |
2969 | ushort mcode_version; /* Microcode version */ | 2943 | ushort mcode_version; /* Microcode version */ |
2970 | ushort pci_slot_info; /* high byte device/function number */ | 2944 | ushort pci_slot_info; /* high byte device/function number */ |
2971 | /* bits 7-3 device num., bits 2-0 function num. */ | 2945 | /* bits 7-3 device num., bits 2-0 function num. */ |
2972 | /* low byte bus num. */ | 2946 | /* low byte bus num. */ |
2973 | ushort serial1; /* EEPROM serial number word 1 */ | 2947 | ushort serial1; /* EEPROM serial number word 1 */ |
2974 | ushort serial2; /* EEPROM serial number word 2 */ | 2948 | ushort serial2; /* EEPROM serial number word 2 */ |
2975 | ushort serial3; /* EEPROM serial number word 3 */ | 2949 | ushort serial3; /* EEPROM serial number word 3 */ |
2976 | struct device *dev; /* pointer to the pci dev structure for this board */ | 2950 | struct device *dev; /* pointer to the pci dev structure for this board */ |
2977 | } ADV_DVC_CFG; | 2951 | } ADV_DVC_CFG; |
2978 | 2952 | ||
2979 | struct adv_dvc_var; | 2953 | struct adv_dvc_var; |
2980 | struct adv_scsi_req_q; | 2954 | struct adv_scsi_req_q; |
2981 | 2955 | ||
2982 | typedef void (* ADV_ISR_CALLBACK) | 2956 | typedef void (*ADV_ISR_CALLBACK) |
2983 | (struct adv_dvc_var *, struct adv_scsi_req_q *); | 2957 | (struct adv_dvc_var *, struct adv_scsi_req_q *); |
2984 | 2958 | ||
2985 | typedef void (* ADV_ASYNC_CALLBACK) | 2959 | typedef void (*ADV_ASYNC_CALLBACK) |
2986 | (struct adv_dvc_var *, uchar); | 2960 | (struct adv_dvc_var *, uchar); |
2987 | 2961 | ||
2988 | /* | 2962 | /* |
2989 | * Adapter operation variable structure. | 2963 | * Adapter operation variable structure. |
@@ -2998,55 +2972,55 @@ typedef void (* ADV_ASYNC_CALLBACK) | |||
2998 | * of the feature, the field is cleared. | 2972 | * of the feature, the field is cleared. |
2999 | */ | 2973 | */ |
3000 | typedef struct adv_dvc_var { | 2974 | typedef struct adv_dvc_var { |
3001 | AdvPortAddr iop_base; /* I/O port address */ | 2975 | AdvPortAddr iop_base; /* I/O port address */ |
3002 | ushort err_code; /* fatal error code */ | 2976 | ushort err_code; /* fatal error code */ |
3003 | ushort bios_ctrl; /* BIOS control word, EEPROM word 12 */ | 2977 | ushort bios_ctrl; /* BIOS control word, EEPROM word 12 */ |
3004 | ADV_ISR_CALLBACK isr_callback; | 2978 | ADV_ISR_CALLBACK isr_callback; |
3005 | ADV_ASYNC_CALLBACK async_callback; | 2979 | ADV_ASYNC_CALLBACK async_callback; |
3006 | ushort wdtr_able; /* try WDTR for a device */ | 2980 | ushort wdtr_able; /* try WDTR for a device */ |
3007 | ushort sdtr_able; /* try SDTR for a device */ | 2981 | ushort sdtr_able; /* try SDTR for a device */ |
3008 | ushort ultra_able; /* try SDTR Ultra speed for a device */ | 2982 | ushort ultra_able; /* try SDTR Ultra speed for a device */ |
3009 | ushort sdtr_speed1; /* EEPROM SDTR Speed for TID 0-3 */ | 2983 | ushort sdtr_speed1; /* EEPROM SDTR Speed for TID 0-3 */ |
3010 | ushort sdtr_speed2; /* EEPROM SDTR Speed for TID 4-7 */ | 2984 | ushort sdtr_speed2; /* EEPROM SDTR Speed for TID 4-7 */ |
3011 | ushort sdtr_speed3; /* EEPROM SDTR Speed for TID 8-11 */ | 2985 | ushort sdtr_speed3; /* EEPROM SDTR Speed for TID 8-11 */ |
3012 | ushort sdtr_speed4; /* EEPROM SDTR Speed for TID 12-15 */ | 2986 | ushort sdtr_speed4; /* EEPROM SDTR Speed for TID 12-15 */ |
3013 | ushort tagqng_able; /* try tagged queuing with a device */ | 2987 | ushort tagqng_able; /* try tagged queuing with a device */ |
3014 | ushort ppr_able; /* PPR message capable per TID bitmask. */ | 2988 | ushort ppr_able; /* PPR message capable per TID bitmask. */ |
3015 | uchar max_dvc_qng; /* maximum number of tagged commands per device */ | 2989 | uchar max_dvc_qng; /* maximum number of tagged commands per device */ |
3016 | ushort start_motor; /* start motor command allowed */ | 2990 | ushort start_motor; /* start motor command allowed */ |
3017 | uchar scsi_reset_wait; /* delay in seconds after scsi bus reset */ | 2991 | uchar scsi_reset_wait; /* delay in seconds after scsi bus reset */ |
3018 | uchar chip_no; /* should be assigned by caller */ | 2992 | uchar chip_no; /* should be assigned by caller */ |
3019 | uchar max_host_qng; /* maximum number of Q'ed command allowed */ | 2993 | uchar max_host_qng; /* maximum number of Q'ed command allowed */ |
3020 | uchar irq_no; /* IRQ number */ | 2994 | uchar irq_no; /* IRQ number */ |
3021 | ushort no_scam; /* scam_tolerant of EEPROM */ | 2995 | ushort no_scam; /* scam_tolerant of EEPROM */ |
3022 | struct asc_board *drv_ptr; /* driver pointer to private structure */ | 2996 | struct asc_board *drv_ptr; /* driver pointer to private structure */ |
3023 | uchar chip_scsi_id; /* chip SCSI target ID */ | 2997 | uchar chip_scsi_id; /* chip SCSI target ID */ |
3024 | uchar chip_type; | 2998 | uchar chip_type; |
3025 | uchar bist_err_code; | 2999 | uchar bist_err_code; |
3026 | ADV_CARR_T *carrier_buf; | 3000 | ADV_CARR_T *carrier_buf; |
3027 | ADV_CARR_T *carr_freelist; /* Carrier free list. */ | 3001 | ADV_CARR_T *carr_freelist; /* Carrier free list. */ |
3028 | ADV_CARR_T *icq_sp; /* Initiator command queue stopper pointer. */ | 3002 | ADV_CARR_T *icq_sp; /* Initiator command queue stopper pointer. */ |
3029 | ADV_CARR_T *irq_sp; /* Initiator response queue stopper pointer. */ | 3003 | ADV_CARR_T *irq_sp; /* Initiator response queue stopper pointer. */ |
3030 | ushort carr_pending_cnt; /* Count of pending carriers. */ | 3004 | ushort carr_pending_cnt; /* Count of pending carriers. */ |
3031 | /* | 3005 | /* |
3032 | * Note: The following fields will not be used after initialization. The | 3006 | * Note: The following fields will not be used after initialization. The |
3033 | * driver may discard the buffer after initialization is done. | 3007 | * driver may discard the buffer after initialization is done. |
3034 | */ | 3008 | */ |
3035 | ADV_DVC_CFG *cfg; /* temporary configuration structure */ | 3009 | ADV_DVC_CFG *cfg; /* temporary configuration structure */ |
3036 | } ADV_DVC_VAR; | 3010 | } ADV_DVC_VAR; |
3037 | 3011 | ||
3038 | #define NO_OF_SG_PER_BLOCK 15 | 3012 | #define NO_OF_SG_PER_BLOCK 15 |
3039 | 3013 | ||
3040 | typedef struct asc_sg_block { | 3014 | typedef struct asc_sg_block { |
3041 | uchar reserved1; | 3015 | uchar reserved1; |
3042 | uchar reserved2; | 3016 | uchar reserved2; |
3043 | uchar reserved3; | 3017 | uchar reserved3; |
3044 | uchar sg_cnt; /* Valid entries in block. */ | 3018 | uchar sg_cnt; /* Valid entries in block. */ |
3045 | ADV_PADDR sg_ptr; /* Pointer to next sg block. */ | 3019 | ADV_PADDR sg_ptr; /* Pointer to next sg block. */ |
3046 | struct { | 3020 | struct { |
3047 | ADV_PADDR sg_addr; /* SG element address. */ | 3021 | ADV_PADDR sg_addr; /* SG element address. */ |
3048 | ADV_DCNT sg_count; /* SG element count. */ | 3022 | ADV_DCNT sg_count; /* SG element count. */ |
3049 | } sg_list[NO_OF_SG_PER_BLOCK]; | 3023 | } sg_list[NO_OF_SG_PER_BLOCK]; |
3050 | } ADV_SG_BLOCK; | 3024 | } ADV_SG_BLOCK; |
3051 | 3025 | ||
3052 | /* | 3026 | /* |
@@ -3061,37 +3035,37 @@ typedef struct asc_sg_block { | |||
3061 | * order. | 3035 | * order. |
3062 | */ | 3036 | */ |
3063 | typedef struct adv_scsi_req_q { | 3037 | typedef struct adv_scsi_req_q { |
3064 | uchar cntl; /* Ucode flags and state (ASC_MC_QC_*). */ | 3038 | uchar cntl; /* Ucode flags and state (ASC_MC_QC_*). */ |
3065 | uchar target_cmd; | 3039 | uchar target_cmd; |
3066 | uchar target_id; /* Device target identifier. */ | 3040 | uchar target_id; /* Device target identifier. */ |
3067 | uchar target_lun; /* Device target logical unit number. */ | 3041 | uchar target_lun; /* Device target logical unit number. */ |
3068 | ADV_PADDR data_addr; /* Data buffer physical address. */ | 3042 | ADV_PADDR data_addr; /* Data buffer physical address. */ |
3069 | ADV_DCNT data_cnt; /* Data count. Ucode sets to residual. */ | 3043 | ADV_DCNT data_cnt; /* Data count. Ucode sets to residual. */ |
3070 | ADV_PADDR sense_addr; | 3044 | ADV_PADDR sense_addr; |
3071 | ADV_PADDR carr_pa; | 3045 | ADV_PADDR carr_pa; |
3072 | uchar mflag; | 3046 | uchar mflag; |
3073 | uchar sense_len; | 3047 | uchar sense_len; |
3074 | uchar cdb_len; /* SCSI CDB length. Must <= 16 bytes. */ | 3048 | uchar cdb_len; /* SCSI CDB length. Must <= 16 bytes. */ |
3075 | uchar scsi_cntl; | 3049 | uchar scsi_cntl; |
3076 | uchar done_status; /* Completion status. */ | 3050 | uchar done_status; /* Completion status. */ |
3077 | uchar scsi_status; /* SCSI status byte. */ | 3051 | uchar scsi_status; /* SCSI status byte. */ |
3078 | uchar host_status; /* Ucode host status. */ | 3052 | uchar host_status; /* Ucode host status. */ |
3079 | uchar sg_working_ix; | 3053 | uchar sg_working_ix; |
3080 | uchar cdb[12]; /* SCSI CDB bytes 0-11. */ | 3054 | uchar cdb[12]; /* SCSI CDB bytes 0-11. */ |
3081 | ADV_PADDR sg_real_addr; /* SG list physical address. */ | 3055 | ADV_PADDR sg_real_addr; /* SG list physical address. */ |
3082 | ADV_PADDR scsiq_rptr; | 3056 | ADV_PADDR scsiq_rptr; |
3083 | uchar cdb16[4]; /* SCSI CDB bytes 12-15. */ | 3057 | uchar cdb16[4]; /* SCSI CDB bytes 12-15. */ |
3084 | ADV_VADDR scsiq_ptr; | 3058 | ADV_VADDR scsiq_ptr; |
3085 | ADV_VADDR carr_va; | 3059 | ADV_VADDR carr_va; |
3086 | /* | 3060 | /* |
3087 | * End of microcode structure - 60 bytes. The rest of the structure | 3061 | * End of microcode structure - 60 bytes. The rest of the structure |
3088 | * is used by the Adv Library and ignored by the microcode. | 3062 | * is used by the Adv Library and ignored by the microcode. |
3089 | */ | 3063 | */ |
3090 | ADV_VADDR srb_ptr; | 3064 | ADV_VADDR srb_ptr; |
3091 | ADV_SG_BLOCK *sg_list_ptr; /* SG list virtual address. */ | 3065 | ADV_SG_BLOCK *sg_list_ptr; /* SG list virtual address. */ |
3092 | char *vdata_addr; /* Data buffer virtual address. */ | 3066 | char *vdata_addr; /* Data buffer virtual address. */ |
3093 | uchar a_flag; | 3067 | uchar a_flag; |
3094 | uchar pad[2]; /* Pad out to a word boundary. */ | 3068 | uchar pad[2]; /* Pad out to a word boundary. */ |
3095 | } ADV_SCSI_REQ_Q; | 3069 | } ADV_SCSI_REQ_Q; |
3096 | 3070 | ||
3097 | /* | 3071 | /* |
@@ -3103,8 +3077,8 @@ typedef struct adv_scsi_req_q { | |||
3103 | #define IDLE_CMD_SEND_INT 0x0004 | 3077 | #define IDLE_CMD_SEND_INT 0x0004 |
3104 | #define IDLE_CMD_ABORT 0x0008 | 3078 | #define IDLE_CMD_ABORT 0x0008 |
3105 | #define IDLE_CMD_DEVICE_RESET 0x0010 | 3079 | #define IDLE_CMD_DEVICE_RESET 0x0010 |
3106 | #define IDLE_CMD_SCSI_RESET_START 0x0020 /* Assert SCSI Bus Reset */ | 3080 | #define IDLE_CMD_SCSI_RESET_START 0x0020 /* Assert SCSI Bus Reset */ |
3107 | #define IDLE_CMD_SCSI_RESET_END 0x0040 /* Deassert SCSI Bus Reset */ | 3081 | #define IDLE_CMD_SCSI_RESET_END 0x0040 /* Deassert SCSI Bus Reset */ |
3108 | #define IDLE_CMD_SCSIREQ 0x0080 | 3082 | #define IDLE_CMD_SCSIREQ 0x0080 |
3109 | 3083 | ||
3110 | #define IDLE_CMD_STATUS_SUCCESS 0x0001 | 3084 | #define IDLE_CMD_STATUS_SUCCESS 0x0001 |
@@ -3118,60 +3092,59 @@ typedef struct adv_scsi_req_q { | |||
3118 | /* | 3092 | /* |
3119 | * Wait loop time out values. | 3093 | * Wait loop time out values. |
3120 | */ | 3094 | */ |
3121 | #define SCSI_WAIT_10_SEC 10UL /* 10 seconds */ | 3095 | #define SCSI_WAIT_10_SEC 10UL /* 10 seconds */ |
3122 | #define SCSI_WAIT_100_MSEC 100UL /* 100 milliseconds */ | 3096 | #define SCSI_WAIT_100_MSEC 100UL /* 100 milliseconds */ |
3123 | #define SCSI_US_PER_MSEC 1000 /* microseconds per millisecond */ | 3097 | #define SCSI_US_PER_MSEC 1000 /* microseconds per millisecond */ |
3124 | #define SCSI_MS_PER_SEC 1000UL /* milliseconds per second */ | 3098 | #define SCSI_MS_PER_SEC 1000UL /* milliseconds per second */ |
3125 | #define SCSI_MAX_RETRY 10 /* retry count */ | 3099 | #define SCSI_MAX_RETRY 10 /* retry count */ |
3126 | |||
3127 | #define ADV_ASYNC_RDMA_FAILURE 0x01 /* Fatal RDMA failure. */ | ||
3128 | #define ADV_ASYNC_SCSI_BUS_RESET_DET 0x02 /* Detected SCSI Bus Reset. */ | ||
3129 | #define ADV_ASYNC_CARRIER_READY_FAILURE 0x03 /* Carrier Ready failure. */ | ||
3130 | #define ADV_RDMA_IN_CARR_AND_Q_INVALID 0x04 /* RDMAed-in data invalid. */ | ||
3131 | 3100 | ||
3101 | #define ADV_ASYNC_RDMA_FAILURE 0x01 /* Fatal RDMA failure. */ | ||
3102 | #define ADV_ASYNC_SCSI_BUS_RESET_DET 0x02 /* Detected SCSI Bus Reset. */ | ||
3103 | #define ADV_ASYNC_CARRIER_READY_FAILURE 0x03 /* Carrier Ready failure. */ | ||
3104 | #define ADV_RDMA_IN_CARR_AND_Q_INVALID 0x04 /* RDMAed-in data invalid. */ | ||
3132 | 3105 | ||
3133 | #define ADV_HOST_SCSI_BUS_RESET 0x80 /* Host Initiated SCSI Bus Reset. */ | 3106 | #define ADV_HOST_SCSI_BUS_RESET 0x80 /* Host Initiated SCSI Bus Reset. */ |
3134 | 3107 | ||
3135 | /* | 3108 | /* |
3136 | * Device drivers must define the following functions. | 3109 | * Device drivers must define the following functions. |
3137 | */ | 3110 | */ |
3138 | STATIC inline ulong DvcEnterCritical(void); | 3111 | static inline ulong DvcEnterCritical(void); |
3139 | STATIC inline void DvcLeaveCritical(ulong); | 3112 | static inline void DvcLeaveCritical(ulong); |
3140 | STATIC void DvcSleepMilliSecond(ADV_DCNT); | 3113 | static void DvcSleepMilliSecond(ADV_DCNT); |
3141 | STATIC uchar DvcAdvReadPCIConfigByte(ADV_DVC_VAR *, ushort); | 3114 | static uchar DvcAdvReadPCIConfigByte(ADV_DVC_VAR *, ushort); |
3142 | STATIC void DvcAdvWritePCIConfigByte(ADV_DVC_VAR *, ushort, uchar); | 3115 | static void DvcAdvWritePCIConfigByte(ADV_DVC_VAR *, ushort, uchar); |
3143 | STATIC ADV_PADDR DvcGetPhyAddr(ADV_DVC_VAR *, ADV_SCSI_REQ_Q *, | 3116 | static ADV_PADDR DvcGetPhyAddr(ADV_DVC_VAR *, ADV_SCSI_REQ_Q *, |
3144 | uchar *, ASC_SDCNT *, int); | 3117 | uchar *, ASC_SDCNT *, int); |
3145 | STATIC void DvcDelayMicroSecond(ADV_DVC_VAR *, ushort); | 3118 | static void DvcDelayMicroSecond(ADV_DVC_VAR *, ushort); |
3146 | 3119 | ||
3147 | /* | 3120 | /* |
3148 | * Adv Library functions available to drivers. | 3121 | * Adv Library functions available to drivers. |
3149 | */ | 3122 | */ |
3150 | STATIC int AdvExeScsiQueue(ADV_DVC_VAR *, ADV_SCSI_REQ_Q *); | 3123 | static int AdvExeScsiQueue(ADV_DVC_VAR *, ADV_SCSI_REQ_Q *); |
3151 | STATIC int AdvISR(ADV_DVC_VAR *); | 3124 | static int AdvISR(ADV_DVC_VAR *); |
3152 | STATIC int AdvInitGetConfig(ADV_DVC_VAR *); | 3125 | static int AdvInitGetConfig(ADV_DVC_VAR *); |
3153 | STATIC int AdvInitAsc3550Driver(ADV_DVC_VAR *); | 3126 | static int AdvInitAsc3550Driver(ADV_DVC_VAR *); |
3154 | STATIC int AdvInitAsc38C0800Driver(ADV_DVC_VAR *); | 3127 | static int AdvInitAsc38C0800Driver(ADV_DVC_VAR *); |
3155 | STATIC int AdvInitAsc38C1600Driver(ADV_DVC_VAR *); | 3128 | static int AdvInitAsc38C1600Driver(ADV_DVC_VAR *); |
3156 | STATIC int AdvResetChipAndSB(ADV_DVC_VAR *); | 3129 | static int AdvResetChipAndSB(ADV_DVC_VAR *); |
3157 | STATIC int AdvResetSB(ADV_DVC_VAR *asc_dvc); | 3130 | static int AdvResetSB(ADV_DVC_VAR *asc_dvc); |
3158 | 3131 | ||
3159 | /* | 3132 | /* |
3160 | * Internal Adv Library functions. | 3133 | * Internal Adv Library functions. |
3161 | */ | 3134 | */ |
3162 | STATIC int AdvSendIdleCmd(ADV_DVC_VAR *, ushort, ADV_DCNT); | 3135 | static int AdvSendIdleCmd(ADV_DVC_VAR *, ushort, ADV_DCNT); |
3163 | STATIC void AdvInquiryHandling(ADV_DVC_VAR *, ADV_SCSI_REQ_Q *); | 3136 | static void AdvInquiryHandling(ADV_DVC_VAR *, ADV_SCSI_REQ_Q *); |
3164 | STATIC int AdvInitFrom3550EEP(ADV_DVC_VAR *); | 3137 | static int AdvInitFrom3550EEP(ADV_DVC_VAR *); |
3165 | STATIC int AdvInitFrom38C0800EEP(ADV_DVC_VAR *); | 3138 | static int AdvInitFrom38C0800EEP(ADV_DVC_VAR *); |
3166 | STATIC int AdvInitFrom38C1600EEP(ADV_DVC_VAR *); | 3139 | static int AdvInitFrom38C1600EEP(ADV_DVC_VAR *); |
3167 | STATIC ushort AdvGet3550EEPConfig(AdvPortAddr, ADVEEP_3550_CONFIG *); | 3140 | static ushort AdvGet3550EEPConfig(AdvPortAddr, ADVEEP_3550_CONFIG *); |
3168 | STATIC void AdvSet3550EEPConfig(AdvPortAddr, ADVEEP_3550_CONFIG *); | 3141 | static void AdvSet3550EEPConfig(AdvPortAddr, ADVEEP_3550_CONFIG *); |
3169 | STATIC ushort AdvGet38C0800EEPConfig(AdvPortAddr, ADVEEP_38C0800_CONFIG *); | 3142 | static ushort AdvGet38C0800EEPConfig(AdvPortAddr, ADVEEP_38C0800_CONFIG *); |
3170 | STATIC void AdvSet38C0800EEPConfig(AdvPortAddr, ADVEEP_38C0800_CONFIG *); | 3143 | static void AdvSet38C0800EEPConfig(AdvPortAddr, ADVEEP_38C0800_CONFIG *); |
3171 | STATIC ushort AdvGet38C1600EEPConfig(AdvPortAddr, ADVEEP_38C1600_CONFIG *); | 3144 | static ushort AdvGet38C1600EEPConfig(AdvPortAddr, ADVEEP_38C1600_CONFIG *); |
3172 | STATIC void AdvSet38C1600EEPConfig(AdvPortAddr, ADVEEP_38C1600_CONFIG *); | 3145 | static void AdvSet38C1600EEPConfig(AdvPortAddr, ADVEEP_38C1600_CONFIG *); |
3173 | STATIC void AdvWaitEEPCmd(AdvPortAddr); | 3146 | static void AdvWaitEEPCmd(AdvPortAddr); |
3174 | STATIC ushort AdvReadEEPWord(AdvPortAddr, int); | 3147 | static ushort AdvReadEEPWord(AdvPortAddr, int); |
3175 | 3148 | ||
3176 | /* | 3149 | /* |
3177 | * PCI Bus Definitions | 3150 | * PCI Bus Definitions |
@@ -3241,7 +3214,6 @@ do { \ | |||
3241 | #define AdvWriteWordAutoIncLram(iop_base, word) \ | 3214 | #define AdvWriteWordAutoIncLram(iop_base, word) \ |
3242 | (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, (word))) | 3215 | (ADV_MEM_WRITEW((iop_base) + IOPW_RAM_DATA, (word))) |
3243 | 3216 | ||
3244 | |||
3245 | /* | 3217 | /* |
3246 | * Define macro to check for Condor signature. | 3218 | * Define macro to check for Condor signature. |
3247 | * | 3219 | * |
@@ -3313,7 +3285,7 @@ do { \ | |||
3313 | * ASC_SCSI_REQ_Q 'done_status' and 'host_status' return values. | 3285 | * ASC_SCSI_REQ_Q 'done_status' and 'host_status' return values. |
3314 | */ | 3286 | */ |
3315 | 3287 | ||
3316 | #define QD_NO_STATUS 0x00 /* Request not completed yet. */ | 3288 | #define QD_NO_STATUS 0x00 /* Request not completed yet. */ |
3317 | #define QD_NO_ERROR 0x01 | 3289 | #define QD_NO_ERROR 0x01 |
3318 | #define QD_ABORTED_BY_HOST 0x02 | 3290 | #define QD_ABORTED_BY_HOST 0x02 |
3319 | #define QD_WITH_ERROR 0x04 | 3291 | #define QD_WITH_ERROR 0x04 |
@@ -3323,30 +3295,29 @@ do { \ | |||
3323 | #define QHSTA_M_DATA_OVER_RUN 0x12 | 3295 | #define QHSTA_M_DATA_OVER_RUN 0x12 |
3324 | #define QHSTA_M_UNEXPECTED_BUS_FREE 0x13 | 3296 | #define QHSTA_M_UNEXPECTED_BUS_FREE 0x13 |
3325 | #define QHSTA_M_QUEUE_ABORTED 0x15 | 3297 | #define QHSTA_M_QUEUE_ABORTED 0x15 |
3326 | #define QHSTA_M_SXFR_SDMA_ERR 0x16 /* SXFR_STATUS SCSI DMA Error */ | 3298 | #define QHSTA_M_SXFR_SDMA_ERR 0x16 /* SXFR_STATUS SCSI DMA Error */ |
3327 | #define QHSTA_M_SXFR_SXFR_PERR 0x17 /* SXFR_STATUS SCSI Bus Parity Error */ | 3299 | #define QHSTA_M_SXFR_SXFR_PERR 0x17 /* SXFR_STATUS SCSI Bus Parity Error */ |
3328 | #define QHSTA_M_RDMA_PERR 0x18 /* RISC PCI DMA parity error */ | 3300 | #define QHSTA_M_RDMA_PERR 0x18 /* RISC PCI DMA parity error */ |
3329 | #define QHSTA_M_SXFR_OFF_UFLW 0x19 /* SXFR_STATUS Offset Underflow */ | 3301 | #define QHSTA_M_SXFR_OFF_UFLW 0x19 /* SXFR_STATUS Offset Underflow */ |
3330 | #define QHSTA_M_SXFR_OFF_OFLW 0x20 /* SXFR_STATUS Offset Overflow */ | 3302 | #define QHSTA_M_SXFR_OFF_OFLW 0x20 /* SXFR_STATUS Offset Overflow */ |
3331 | #define QHSTA_M_SXFR_WD_TMO 0x21 /* SXFR_STATUS Watchdog Timeout */ | 3303 | #define QHSTA_M_SXFR_WD_TMO 0x21 /* SXFR_STATUS Watchdog Timeout */ |
3332 | #define QHSTA_M_SXFR_DESELECTED 0x22 /* SXFR_STATUS Deselected */ | 3304 | #define QHSTA_M_SXFR_DESELECTED 0x22 /* SXFR_STATUS Deselected */ |
3333 | /* Note: QHSTA_M_SXFR_XFR_OFLW is identical to QHSTA_M_DATA_OVER_RUN. */ | 3305 | /* Note: QHSTA_M_SXFR_XFR_OFLW is identical to QHSTA_M_DATA_OVER_RUN. */ |
3334 | #define QHSTA_M_SXFR_XFR_OFLW 0x12 /* SXFR_STATUS Transfer Overflow */ | 3306 | #define QHSTA_M_SXFR_XFR_OFLW 0x12 /* SXFR_STATUS Transfer Overflow */ |
3335 | #define QHSTA_M_SXFR_XFR_PH_ERR 0x24 /* SXFR_STATUS Transfer Phase Error */ | 3307 | #define QHSTA_M_SXFR_XFR_PH_ERR 0x24 /* SXFR_STATUS Transfer Phase Error */ |
3336 | #define QHSTA_M_SXFR_UNKNOWN_ERROR 0x25 /* SXFR_STATUS Unknown Error */ | 3308 | #define QHSTA_M_SXFR_UNKNOWN_ERROR 0x25 /* SXFR_STATUS Unknown Error */ |
3337 | #define QHSTA_M_SCSI_BUS_RESET 0x30 /* Request aborted from SBR */ | 3309 | #define QHSTA_M_SCSI_BUS_RESET 0x30 /* Request aborted from SBR */ |
3338 | #define QHSTA_M_SCSI_BUS_RESET_UNSOL 0x31 /* Request aborted from unsol. SBR */ | 3310 | #define QHSTA_M_SCSI_BUS_RESET_UNSOL 0x31 /* Request aborted from unsol. SBR */ |
3339 | #define QHSTA_M_BUS_DEVICE_RESET 0x32 /* Request aborted from BDR */ | 3311 | #define QHSTA_M_BUS_DEVICE_RESET 0x32 /* Request aborted from BDR */ |
3340 | #define QHSTA_M_DIRECTION_ERR 0x35 /* Data Phase mismatch */ | 3312 | #define QHSTA_M_DIRECTION_ERR 0x35 /* Data Phase mismatch */ |
3341 | #define QHSTA_M_DIRECTION_ERR_HUNG 0x36 /* Data Phase mismatch and bus hang */ | 3313 | #define QHSTA_M_DIRECTION_ERR_HUNG 0x36 /* Data Phase mismatch and bus hang */ |
3342 | #define QHSTA_M_WTM_TIMEOUT 0x41 | 3314 | #define QHSTA_M_WTM_TIMEOUT 0x41 |
3343 | #define QHSTA_M_BAD_CMPL_STATUS_IN 0x42 | 3315 | #define QHSTA_M_BAD_CMPL_STATUS_IN 0x42 |
3344 | #define QHSTA_M_NO_AUTO_REQ_SENSE 0x43 | 3316 | #define QHSTA_M_NO_AUTO_REQ_SENSE 0x43 |
3345 | #define QHSTA_M_AUTO_REQ_SENSE_FAIL 0x44 | 3317 | #define QHSTA_M_AUTO_REQ_SENSE_FAIL 0x44 |
3346 | #define QHSTA_M_INVALID_DEVICE 0x45 /* Bad target ID */ | 3318 | #define QHSTA_M_INVALID_DEVICE 0x45 /* Bad target ID */ |
3347 | #define QHSTA_M_FROZEN_TIDQ 0x46 /* TID Queue frozen. */ | 3319 | #define QHSTA_M_FROZEN_TIDQ 0x46 /* TID Queue frozen. */ |
3348 | #define QHSTA_M_SGBACKUP_ERROR 0x47 /* Scatter-Gather backup error */ | 3320 | #define QHSTA_M_SGBACKUP_ERROR 0x47 /* Scatter-Gather backup error */ |
3349 | |||
3350 | 3321 | ||
3351 | /* | 3322 | /* |
3352 | * Default EEPROM Configuration structure defined in a_init.c. | 3323 | * Default EEPROM Configuration structure defined in a_init.c. |
@@ -3358,12 +3329,12 @@ static ADVEEP_38C1600_CONFIG Default_38C1600_EEPROM_Config; | |||
3358 | /* | 3329 | /* |
3359 | * DvcGetPhyAddr() flag arguments | 3330 | * DvcGetPhyAddr() flag arguments |
3360 | */ | 3331 | */ |
3361 | #define ADV_IS_SCSIQ_FLAG 0x01 /* 'addr' is ASC_SCSI_REQ_Q pointer */ | 3332 | #define ADV_IS_SCSIQ_FLAG 0x01 /* 'addr' is ASC_SCSI_REQ_Q pointer */ |
3362 | #define ADV_ASCGETSGLIST_VADDR 0x02 /* 'addr' is AscGetSGList() virtual addr */ | 3333 | #define ADV_ASCGETSGLIST_VADDR 0x02 /* 'addr' is AscGetSGList() virtual addr */ |
3363 | #define ADV_IS_SENSE_FLAG 0x04 /* 'addr' is sense virtual pointer */ | 3334 | #define ADV_IS_SENSE_FLAG 0x04 /* 'addr' is sense virtual pointer */ |
3364 | #define ADV_IS_DATA_FLAG 0x08 /* 'addr' is data virtual pointer */ | 3335 | #define ADV_IS_DATA_FLAG 0x08 /* 'addr' is data virtual pointer */ |
3365 | #define ADV_IS_SGLIST_FLAG 0x10 /* 'addr' is sglist virtual pointer */ | 3336 | #define ADV_IS_SGLIST_FLAG 0x10 /* 'addr' is sglist virtual pointer */ |
3366 | #define ADV_IS_CARRIER_FLAG 0x20 /* 'addr' is ADV_CARR_T pointer */ | 3337 | #define ADV_IS_CARRIER_FLAG 0x20 /* 'addr' is ADV_CARR_T pointer */ |
3367 | 3338 | ||
3368 | /* Return the address that is aligned at the next doubleword >= to 'addr'. */ | 3339 | /* Return the address that is aligned at the next doubleword >= to 'addr'. */ |
3369 | #define ADV_8BALIGN(addr) (((ulong) (addr) + 0x7) & ~0x7) | 3340 | #define ADV_8BALIGN(addr) (((ulong) (addr) + 0x7) & ~0x7) |
@@ -3413,43 +3384,42 @@ static ADVEEP_38C1600_CONFIG Default_38C1600_EEPROM_Config; | |||
3413 | #define ADV_INQ_CLOCKING(inq) (((inq)->info & 0x0c) >> 2) | 3384 | #define ADV_INQ_CLOCKING(inq) (((inq)->info & 0x0c) >> 2) |
3414 | 3385 | ||
3415 | typedef struct { | 3386 | typedef struct { |
3416 | uchar periph; /* peripheral device type [0:4] */ | 3387 | uchar periph; /* peripheral device type [0:4] */ |
3417 | /* peripheral qualifier [5:7] */ | 3388 | /* peripheral qualifier [5:7] */ |
3418 | uchar devtype; /* device type modifier (for SCSI I) [0:6] */ | 3389 | uchar devtype; /* device type modifier (for SCSI I) [0:6] */ |
3419 | /* RMB - removable medium bit [7] */ | 3390 | /* RMB - removable medium bit [7] */ |
3420 | uchar ver; /* ANSI approved version [0:2] */ | 3391 | uchar ver; /* ANSI approved version [0:2] */ |
3421 | /* ECMA version [3:5] */ | 3392 | /* ECMA version [3:5] */ |
3422 | /* ISO version [6:7] */ | 3393 | /* ISO version [6:7] */ |
3423 | uchar byte3; /* response data format [0:3] */ | 3394 | uchar byte3; /* response data format [0:3] */ |
3424 | /* 0 SCSI 1 */ | 3395 | /* 0 SCSI 1 */ |
3425 | /* 1 CCS */ | 3396 | /* 1 CCS */ |
3426 | /* 2 SCSI-2 */ | 3397 | /* 2 SCSI-2 */ |
3427 | /* 3-F reserved */ | 3398 | /* 3-F reserved */ |
3428 | /* reserved [4:5] */ | 3399 | /* reserved [4:5] */ |
3429 | /* terminate I/O process bit (see 5.6.22) [6] */ | 3400 | /* terminate I/O process bit (see 5.6.22) [6] */ |
3430 | /* asynch. event notification (processor) [7] */ | 3401 | /* asynch. event notification (processor) [7] */ |
3431 | uchar add_len; /* additional length */ | 3402 | uchar add_len; /* additional length */ |
3432 | uchar res1; /* reserved */ | 3403 | uchar res1; /* reserved */ |
3433 | uchar res2; /* reserved */ | 3404 | uchar res2; /* reserved */ |
3434 | uchar flags; /* soft reset implemented [0] */ | 3405 | uchar flags; /* soft reset implemented [0] */ |
3435 | /* command queuing [1] */ | 3406 | /* command queuing [1] */ |
3436 | /* reserved [2] */ | 3407 | /* reserved [2] */ |
3437 | /* linked command for this logical unit [3] */ | 3408 | /* linked command for this logical unit [3] */ |
3438 | /* synchronous data transfer [4] */ | 3409 | /* synchronous data transfer [4] */ |
3439 | /* wide bus 16 bit data transfer [5] */ | 3410 | /* wide bus 16 bit data transfer [5] */ |
3440 | /* wide bus 32 bit data transfer [6] */ | 3411 | /* wide bus 32 bit data transfer [6] */ |
3441 | /* relative addressing mode [7] */ | 3412 | /* relative addressing mode [7] */ |
3442 | uchar vendor_id[8]; /* vendor identification */ | 3413 | uchar vendor_id[8]; /* vendor identification */ |
3443 | uchar product_id[16]; /* product identification */ | 3414 | uchar product_id[16]; /* product identification */ |
3444 | uchar product_rev_level[4]; /* product revision level */ | 3415 | uchar product_rev_level[4]; /* product revision level */ |
3445 | uchar vendor_specific[20]; /* vendor specific */ | 3416 | uchar vendor_specific[20]; /* vendor specific */ |
3446 | uchar info; /* information unit supported [0] */ | 3417 | uchar info; /* information unit supported [0] */ |
3447 | /* quick arbitrate supported [1] */ | 3418 | /* quick arbitrate supported [1] */ |
3448 | /* clocking field [2:3] */ | 3419 | /* clocking field [2:3] */ |
3449 | /* reserved [4:7] */ | 3420 | /* reserved [4:7] */ |
3450 | uchar res3; /* reserved */ | 3421 | uchar res3; /* reserved */ |
3451 | } ADV_SCSI_INQUIRY; /* 58 bytes */ | 3422 | } ADV_SCSI_INQUIRY; /* 58 bytes */ |
3452 | |||
3453 | 3423 | ||
3454 | /* | 3424 | /* |
3455 | * --- Driver Constants and Macros | 3425 | * --- Driver Constants and Macros |
@@ -3464,15 +3434,15 @@ typedef struct { | |||
3464 | 3434 | ||
3465 | /* asc_board_t flags */ | 3435 | /* asc_board_t flags */ |
3466 | #define ASC_HOST_IN_RESET 0x01 | 3436 | #define ASC_HOST_IN_RESET 0x01 |
3467 | #define ASC_IS_WIDE_BOARD 0x04 /* AdvanSys Wide Board */ | 3437 | #define ASC_IS_WIDE_BOARD 0x04 /* AdvanSys Wide Board */ |
3468 | #define ASC_SELECT_QUEUE_DEPTHS 0x08 | 3438 | #define ASC_SELECT_QUEUE_DEPTHS 0x08 |
3469 | 3439 | ||
3470 | #define ASC_NARROW_BOARD(boardp) (((boardp)->flags & ASC_IS_WIDE_BOARD) == 0) | 3440 | #define ASC_NARROW_BOARD(boardp) (((boardp)->flags & ASC_IS_WIDE_BOARD) == 0) |
3471 | #define ASC_WIDE_BOARD(boardp) ((boardp)->flags & ASC_IS_WIDE_BOARD) | 3441 | #define ASC_WIDE_BOARD(boardp) ((boardp)->flags & ASC_IS_WIDE_BOARD) |
3472 | 3442 | ||
3473 | #define NO_ISA_DMA 0xff /* No ISA DMA Channel Used */ | 3443 | #define NO_ISA_DMA 0xff /* No ISA DMA Channel Used */ |
3474 | 3444 | ||
3475 | #define ASC_INFO_SIZE 128 /* advansys_info() line size */ | 3445 | #define ASC_INFO_SIZE 128 /* advansys_info() line size */ |
3476 | 3446 | ||
3477 | #ifdef CONFIG_PROC_FS | 3447 | #ifdef CONFIG_PROC_FS |
3478 | /* /proc/scsi/advansys/[0...] related definitions */ | 3448 | /* /proc/scsi/advansys/[0...] related definitions */ |
@@ -3514,7 +3484,7 @@ typedef struct { | |||
3514 | * REQPTIME(reqp) - reqp's time stamp value | 3484 | * REQPTIME(reqp) - reqp's time stamp value |
3515 | * REQTIMESTAMP() - system time stamp value | 3485 | * REQTIMESTAMP() - system time stamp value |
3516 | */ | 3486 | */ |
3517 | typedef struct scsi_cmnd REQ, *REQP; | 3487 | typedef struct scsi_cmnd REQ, *REQP; |
3518 | #define REQPNEXT(reqp) ((REQP) ((reqp)->host_scribble)) | 3488 | #define REQPNEXT(reqp) ((REQP) ((reqp)->host_scribble)) |
3519 | #define REQPNEXTP(reqp) ((REQP *) &((reqp)->host_scribble)) | 3489 | #define REQPNEXTP(reqp) ((REQP *) &((reqp)->host_scribble)) |
3520 | #define REQPTID(reqp) ((reqp)->device->id) | 3490 | #define REQPTID(reqp) ((reqp)->device->id) |
@@ -3564,17 +3534,17 @@ typedef struct scsi_cmnd REQ, *REQP; | |||
3564 | #define PCI_MAX_SLOT 0x1F | 3534 | #define PCI_MAX_SLOT 0x1F |
3565 | #define PCI_MAX_BUS 0xFF | 3535 | #define PCI_MAX_BUS 0xFF |
3566 | #define PCI_IOADDRESS_MASK 0xFFFE | 3536 | #define PCI_IOADDRESS_MASK 0xFFFE |
3567 | #define ASC_PCI_DEVICE_ID_CNT 6 /* PCI Device ID count. */ | 3537 | #define ASC_PCI_DEVICE_ID_CNT 6 /* PCI Device ID count. */ |
3568 | 3538 | ||
3569 | #ifndef ADVANSYS_STATS | 3539 | #ifndef ADVANSYS_STATS |
3570 | #define ASC_STATS(shp, counter) | 3540 | #define ASC_STATS(shost, counter) |
3571 | #define ASC_STATS_ADD(shp, counter, count) | 3541 | #define ASC_STATS_ADD(shost, counter, count) |
3572 | #else /* ADVANSYS_STATS */ | 3542 | #else /* ADVANSYS_STATS */ |
3573 | #define ASC_STATS(shp, counter) \ | 3543 | #define ASC_STATS(shost, counter) \ |
3574 | (ASC_BOARDP(shp)->asc_stats.counter++) | 3544 | (ASC_BOARDP(shost)->asc_stats.counter++) |
3575 | 3545 | ||
3576 | #define ASC_STATS_ADD(shp, counter, count) \ | 3546 | #define ASC_STATS_ADD(shost, counter, count) \ |
3577 | (ASC_BOARDP(shp)->asc_stats.counter += (count)) | 3547 | (ASC_BOARDP(shost)->asc_stats.counter += (count)) |
3578 | #endif /* ADVANSYS_STATS */ | 3548 | #endif /* ADVANSYS_STATS */ |
3579 | 3549 | ||
3580 | #define ASC_CEILING(val, unit) (((val) + ((unit) - 1))/(unit)) | 3550 | #define ASC_CEILING(val, unit) (((val) + ((unit) - 1))/(unit)) |
@@ -3617,7 +3587,6 @@ typedef struct scsi_cmnd REQ, *REQP; | |||
3617 | printk((s), (a1), (a2), (a3), (a4)); \ | 3587 | printk((s), (a1), (a2), (a3), (a4)); \ |
3618 | } | 3588 | } |
3619 | 3589 | ||
3620 | |||
3621 | #ifndef ADVANSYS_DEBUG | 3590 | #ifndef ADVANSYS_DEBUG |
3622 | 3591 | ||
3623 | #define ASC_DBG(lvl, s) | 3592 | #define ASC_DBG(lvl, s) |
@@ -3746,7 +3715,6 @@ typedef struct scsi_cmnd REQ, *REQP; | |||
3746 | 3715 | ||
3747 | #endif /* ADVANSYS_ASSERT */ | 3716 | #endif /* ADVANSYS_ASSERT */ |
3748 | 3717 | ||
3749 | |||
3750 | /* | 3718 | /* |
3751 | * --- Driver Structures | 3719 | * --- Driver Structures |
3752 | */ | 3720 | */ |
@@ -3755,27 +3723,27 @@ typedef struct scsi_cmnd REQ, *REQP; | |||
3755 | 3723 | ||
3756 | /* Per board statistics structure */ | 3724 | /* Per board statistics structure */ |
3757 | struct asc_stats { | 3725 | struct asc_stats { |
3758 | /* Driver Entrypoint Statistics */ | 3726 | /* Driver Entrypoint Statistics */ |
3759 | ADV_DCNT queuecommand; /* # calls to advansys_queuecommand() */ | 3727 | ADV_DCNT queuecommand; /* # calls to advansys_queuecommand() */ |
3760 | ADV_DCNT reset; /* # calls to advansys_eh_bus_reset() */ | 3728 | ADV_DCNT reset; /* # calls to advansys_eh_bus_reset() */ |
3761 | ADV_DCNT biosparam; /* # calls to advansys_biosparam() */ | 3729 | ADV_DCNT biosparam; /* # calls to advansys_biosparam() */ |
3762 | ADV_DCNT interrupt; /* # advansys_interrupt() calls */ | 3730 | ADV_DCNT interrupt; /* # advansys_interrupt() calls */ |
3763 | ADV_DCNT callback; /* # calls to asc/adv_isr_callback() */ | 3731 | ADV_DCNT callback; /* # calls to asc/adv_isr_callback() */ |
3764 | ADV_DCNT done; /* # calls to request's scsi_done function */ | 3732 | ADV_DCNT done; /* # calls to request's scsi_done function */ |
3765 | ADV_DCNT build_error; /* # asc/adv_build_req() ASC_ERROR returns. */ | 3733 | ADV_DCNT build_error; /* # asc/adv_build_req() ASC_ERROR returns. */ |
3766 | ADV_DCNT adv_build_noreq; /* # adv_build_req() adv_req_t alloc. fail. */ | 3734 | ADV_DCNT adv_build_noreq; /* # adv_build_req() adv_req_t alloc. fail. */ |
3767 | ADV_DCNT adv_build_nosg; /* # adv_build_req() adv_sgblk_t alloc. fail. */ | 3735 | ADV_DCNT adv_build_nosg; /* # adv_build_req() adv_sgblk_t alloc. fail. */ |
3768 | /* AscExeScsiQueue()/AdvExeScsiQueue() Statistics */ | 3736 | /* AscExeScsiQueue()/AdvExeScsiQueue() Statistics */ |
3769 | ADV_DCNT exe_noerror; /* # ASC_NOERROR returns. */ | 3737 | ADV_DCNT exe_noerror; /* # ASC_NOERROR returns. */ |
3770 | ADV_DCNT exe_busy; /* # ASC_BUSY returns. */ | 3738 | ADV_DCNT exe_busy; /* # ASC_BUSY returns. */ |
3771 | ADV_DCNT exe_error; /* # ASC_ERROR returns. */ | 3739 | ADV_DCNT exe_error; /* # ASC_ERROR returns. */ |
3772 | ADV_DCNT exe_unknown; /* # unknown returns. */ | 3740 | ADV_DCNT exe_unknown; /* # unknown returns. */ |
3773 | /* Data Transfer Statistics */ | 3741 | /* Data Transfer Statistics */ |
3774 | ADV_DCNT cont_cnt; /* # non-scatter-gather I/O requests received */ | 3742 | ADV_DCNT cont_cnt; /* # non-scatter-gather I/O requests received */ |
3775 | ADV_DCNT cont_xfer; /* # contiguous transfer 512-bytes */ | 3743 | ADV_DCNT cont_xfer; /* # contiguous transfer 512-bytes */ |
3776 | ADV_DCNT sg_cnt; /* # scatter-gather I/O requests received */ | 3744 | ADV_DCNT sg_cnt; /* # scatter-gather I/O requests received */ |
3777 | ADV_DCNT sg_elem; /* # scatter-gather elements */ | 3745 | ADV_DCNT sg_elem; /* # scatter-gather elements */ |
3778 | ADV_DCNT sg_xfer; /* # scatter-gather transfer 512-bytes */ | 3746 | ADV_DCNT sg_xfer; /* # scatter-gather transfer 512-bytes */ |
3779 | }; | 3747 | }; |
3780 | #endif /* ADVANSYS_STATS */ | 3748 | #endif /* ADVANSYS_STATS */ |
3781 | 3749 | ||
@@ -3783,17 +3751,17 @@ struct asc_stats { | |||
3783 | * Request queuing structure | 3751 | * Request queuing structure |
3784 | */ | 3752 | */ |
3785 | typedef struct asc_queue { | 3753 | typedef struct asc_queue { |
3786 | ADV_SCSI_BIT_ID_TYPE q_tidmask; /* queue mask */ | 3754 | ADV_SCSI_BIT_ID_TYPE q_tidmask; /* queue mask */ |
3787 | REQP q_first[ADV_MAX_TID+1]; /* first queued request */ | 3755 | REQP q_first[ADV_MAX_TID + 1]; /* first queued request */ |
3788 | REQP q_last[ADV_MAX_TID+1]; /* last queued request */ | 3756 | REQP q_last[ADV_MAX_TID + 1]; /* last queued request */ |
3789 | #ifdef ADVANSYS_STATS | 3757 | #ifdef ADVANSYS_STATS |
3790 | short q_cur_cnt[ADV_MAX_TID+1]; /* current queue count */ | 3758 | short q_cur_cnt[ADV_MAX_TID + 1]; /* current queue count */ |
3791 | short q_max_cnt[ADV_MAX_TID+1]; /* maximum queue count */ | 3759 | short q_max_cnt[ADV_MAX_TID + 1]; /* maximum queue count */ |
3792 | ADV_DCNT q_tot_cnt[ADV_MAX_TID+1]; /* total enqueue count */ | 3760 | ADV_DCNT q_tot_cnt[ADV_MAX_TID + 1]; /* total enqueue count */ |
3793 | ADV_DCNT q_tot_tim[ADV_MAX_TID+1]; /* total time queued */ | 3761 | ADV_DCNT q_tot_tim[ADV_MAX_TID + 1]; /* total time queued */ |
3794 | ushort q_max_tim[ADV_MAX_TID+1]; /* maximum time queued */ | 3762 | ushort q_max_tim[ADV_MAX_TID + 1]; /* maximum time queued */ |
3795 | ushort q_min_tim[ADV_MAX_TID+1]; /* minimum time queued */ | 3763 | ushort q_min_tim[ADV_MAX_TID + 1]; /* minimum time queued */ |
3796 | #endif /* ADVANSYS_STATS */ | 3764 | #endif /* ADVANSYS_STATS */ |
3797 | } asc_queue_t; | 3765 | } asc_queue_t; |
3798 | 3766 | ||
3799 | /* | 3767 | /* |
@@ -3814,17 +3782,17 @@ typedef struct asc_queue { | |||
3814 | * Both structures must be 32 byte aligned. | 3782 | * Both structures must be 32 byte aligned. |
3815 | */ | 3783 | */ |
3816 | typedef struct adv_sgblk { | 3784 | typedef struct adv_sgblk { |
3817 | ADV_SG_BLOCK sg_block; /* Sgblock structure. */ | 3785 | ADV_SG_BLOCK sg_block; /* Sgblock structure. */ |
3818 | uchar align[32]; /* Sgblock structure padding. */ | 3786 | uchar align[32]; /* Sgblock structure padding. */ |
3819 | struct adv_sgblk *next_sgblkp; /* Next scatter-gather structure. */ | 3787 | struct adv_sgblk *next_sgblkp; /* Next scatter-gather structure. */ |
3820 | } adv_sgblk_t; | 3788 | } adv_sgblk_t; |
3821 | 3789 | ||
3822 | typedef struct adv_req { | 3790 | typedef struct adv_req { |
3823 | ADV_SCSI_REQ_Q scsi_req_q; /* Adv Library request structure. */ | 3791 | ADV_SCSI_REQ_Q scsi_req_q; /* Adv Library request structure. */ |
3824 | uchar align[32]; /* Request structure padding. */ | 3792 | uchar align[32]; /* Request structure padding. */ |
3825 | struct scsi_cmnd *cmndp; /* Mid-Level SCSI command pointer. */ | 3793 | struct scsi_cmnd *cmndp; /* Mid-Level SCSI command pointer. */ |
3826 | adv_sgblk_t *sgblkp; /* Adv Library scatter-gather pointer. */ | 3794 | adv_sgblk_t *sgblkp; /* Adv Library scatter-gather pointer. */ |
3827 | struct adv_req *next_reqp; /* Next Request Structure. */ | 3795 | struct adv_req *next_reqp; /* Next Request Structure. */ |
3828 | } adv_req_t; | 3796 | } adv_req_t; |
3829 | 3797 | ||
3830 | /* | 3798 | /* |
@@ -3835,113 +3803,109 @@ typedef struct adv_req { | |||
3835 | * field. It is guaranteed to be allocated from DMA-able memory. | 3803 | * field. It is guaranteed to be allocated from DMA-able memory. |
3836 | */ | 3804 | */ |
3837 | typedef struct asc_board { | 3805 | typedef struct asc_board { |
3838 | int id; /* Board Id */ | 3806 | int id; /* Board Id */ |
3839 | uint flags; /* Board flags */ | 3807 | uint flags; /* Board flags */ |
3840 | union { | 3808 | union { |
3841 | ASC_DVC_VAR asc_dvc_var; /* Narrow board */ | 3809 | ASC_DVC_VAR asc_dvc_var; /* Narrow board */ |
3842 | ADV_DVC_VAR adv_dvc_var; /* Wide board */ | 3810 | ADV_DVC_VAR adv_dvc_var; /* Wide board */ |
3843 | } dvc_var; | 3811 | } dvc_var; |
3844 | union { | 3812 | union { |
3845 | ASC_DVC_CFG asc_dvc_cfg; /* Narrow board */ | 3813 | ASC_DVC_CFG asc_dvc_cfg; /* Narrow board */ |
3846 | ADV_DVC_CFG adv_dvc_cfg; /* Wide board */ | 3814 | ADV_DVC_CFG adv_dvc_cfg; /* Wide board */ |
3847 | } dvc_cfg; | 3815 | } dvc_cfg; |
3848 | ushort asc_n_io_port; /* Number I/O ports. */ | 3816 | ushort asc_n_io_port; /* Number I/O ports. */ |
3849 | asc_queue_t active; /* Active command queue */ | 3817 | asc_queue_t active; /* Active command queue */ |
3850 | asc_queue_t waiting; /* Waiting command queue */ | 3818 | asc_queue_t waiting; /* Waiting command queue */ |
3851 | asc_queue_t done; /* Done command queue */ | 3819 | asc_queue_t done; /* Done command queue */ |
3852 | ADV_SCSI_BIT_ID_TYPE init_tidmask; /* Target init./valid mask */ | 3820 | ADV_SCSI_BIT_ID_TYPE init_tidmask; /* Target init./valid mask */ |
3853 | struct scsi_device *device[ADV_MAX_TID+1]; /* Mid-Level Scsi Device */ | 3821 | struct scsi_device *device[ADV_MAX_TID + 1]; /* Mid-Level Scsi Device */ |
3854 | ushort reqcnt[ADV_MAX_TID+1]; /* Starvation request count */ | 3822 | ushort reqcnt[ADV_MAX_TID + 1]; /* Starvation request count */ |
3855 | ADV_SCSI_BIT_ID_TYPE queue_full; /* Queue full mask */ | 3823 | ADV_SCSI_BIT_ID_TYPE queue_full; /* Queue full mask */ |
3856 | ushort queue_full_cnt[ADV_MAX_TID+1]; /* Queue full count */ | 3824 | ushort queue_full_cnt[ADV_MAX_TID + 1]; /* Queue full count */ |
3857 | union { | 3825 | union { |
3858 | ASCEEP_CONFIG asc_eep; /* Narrow EEPROM config. */ | 3826 | ASCEEP_CONFIG asc_eep; /* Narrow EEPROM config. */ |
3859 | ADVEEP_3550_CONFIG adv_3550_eep; /* 3550 EEPROM config. */ | 3827 | ADVEEP_3550_CONFIG adv_3550_eep; /* 3550 EEPROM config. */ |
3860 | ADVEEP_38C0800_CONFIG adv_38C0800_eep; /* 38C0800 EEPROM config. */ | 3828 | ADVEEP_38C0800_CONFIG adv_38C0800_eep; /* 38C0800 EEPROM config. */ |
3861 | ADVEEP_38C1600_CONFIG adv_38C1600_eep; /* 38C1600 EEPROM config. */ | 3829 | ADVEEP_38C1600_CONFIG adv_38C1600_eep; /* 38C1600 EEPROM config. */ |
3862 | } eep_config; | 3830 | } eep_config; |
3863 | ulong last_reset; /* Saved last reset time */ | 3831 | ulong last_reset; /* Saved last reset time */ |
3864 | spinlock_t lock; /* Board spinlock */ | 3832 | spinlock_t lock; /* Board spinlock */ |
3865 | #ifdef CONFIG_PROC_FS | 3833 | #ifdef CONFIG_PROC_FS |
3866 | /* /proc/scsi/advansys/[0...] */ | 3834 | /* /proc/scsi/advansys/[0...] */ |
3867 | char *prtbuf; /* /proc print buffer */ | 3835 | char *prtbuf; /* /proc print buffer */ |
3868 | #endif /* CONFIG_PROC_FS */ | 3836 | #endif /* CONFIG_PROC_FS */ |
3869 | #ifdef ADVANSYS_STATS | 3837 | #ifdef ADVANSYS_STATS |
3870 | struct asc_stats asc_stats; /* Board statistics */ | 3838 | struct asc_stats asc_stats; /* Board statistics */ |
3871 | #endif /* ADVANSYS_STATS */ | 3839 | #endif /* ADVANSYS_STATS */ |
3872 | /* | 3840 | /* |
3873 | * The following fields are used only for Narrow Boards. | 3841 | * The following fields are used only for Narrow Boards. |
3874 | */ | 3842 | */ |
3875 | /* The following three structures must be in DMA-able memory. */ | 3843 | /* The following three structures must be in DMA-able memory. */ |
3876 | ASC_SCSI_REQ_Q scsireqq; | 3844 | ASC_SCSI_REQ_Q scsireqq; |
3877 | ASC_CAP_INFO cap_info; | 3845 | ASC_CAP_INFO cap_info; |
3878 | ASC_SCSI_INQUIRY inquiry; | 3846 | ASC_SCSI_INQUIRY inquiry; |
3879 | uchar sdtr_data[ASC_MAX_TID+1]; /* SDTR information */ | 3847 | uchar sdtr_data[ASC_MAX_TID + 1]; /* SDTR information */ |
3880 | /* | 3848 | /* |
3881 | * The following fields are used only for Wide Boards. | 3849 | * The following fields are used only for Wide Boards. |
3882 | */ | 3850 | */ |
3883 | void __iomem *ioremap_addr; /* I/O Memory remap address. */ | 3851 | void __iomem *ioremap_addr; /* I/O Memory remap address. */ |
3884 | ushort ioport; /* I/O Port address. */ | 3852 | ushort ioport; /* I/O Port address. */ |
3885 | ADV_CARR_T *orig_carrp; /* ADV_CARR_T memory block. */ | 3853 | ADV_CARR_T *orig_carrp; /* ADV_CARR_T memory block. */ |
3886 | adv_req_t *orig_reqp; /* adv_req_t memory block. */ | 3854 | adv_req_t *orig_reqp; /* adv_req_t memory block. */ |
3887 | adv_req_t *adv_reqp; /* Request structures. */ | 3855 | adv_req_t *adv_reqp; /* Request structures. */ |
3888 | adv_sgblk_t *adv_sgblkp; /* Scatter-gather structures. */ | 3856 | adv_sgblk_t *adv_sgblkp; /* Scatter-gather structures. */ |
3889 | ushort bios_signature; /* BIOS Signature. */ | 3857 | ushort bios_signature; /* BIOS Signature. */ |
3890 | ushort bios_version; /* BIOS Version. */ | 3858 | ushort bios_version; /* BIOS Version. */ |
3891 | ushort bios_codeseg; /* BIOS Code Segment. */ | 3859 | ushort bios_codeseg; /* BIOS Code Segment. */ |
3892 | ushort bios_codelen; /* BIOS Code Segment Length. */ | 3860 | ushort bios_codelen; /* BIOS Code Segment Length. */ |
3893 | } asc_board_t; | 3861 | } asc_board_t; |
3894 | 3862 | ||
3895 | /* | 3863 | /* |
3896 | * PCI configuration structures | 3864 | * PCI configuration structures |
3897 | */ | 3865 | */ |
3898 | typedef struct _PCI_DATA_ | 3866 | typedef struct _PCI_DATA_ { |
3899 | { | 3867 | uchar type; |
3900 | uchar type; | 3868 | uchar bus; |
3901 | uchar bus; | 3869 | uchar slot; |
3902 | uchar slot; | 3870 | uchar func; |
3903 | uchar func; | 3871 | uchar offset; |
3904 | uchar offset; | ||
3905 | } PCI_DATA; | 3872 | } PCI_DATA; |
3906 | 3873 | ||
3907 | typedef struct _PCI_DEVICE_ | 3874 | typedef struct _PCI_DEVICE_ { |
3908 | { | 3875 | ushort vendorID; |
3909 | ushort vendorID; | 3876 | ushort deviceID; |
3910 | ushort deviceID; | 3877 | ushort slotNumber; |
3911 | ushort slotNumber; | 3878 | ushort slotFound; |
3912 | ushort slotFound; | 3879 | uchar busNumber; |
3913 | uchar busNumber; | 3880 | uchar maxBusNumber; |
3914 | uchar maxBusNumber; | 3881 | uchar devFunc; |
3915 | uchar devFunc; | 3882 | ushort startSlot; |
3916 | ushort startSlot; | 3883 | ushort endSlot; |
3917 | ushort endSlot; | 3884 | uchar bridge; |
3918 | uchar bridge; | 3885 | uchar type; |
3919 | uchar type; | ||
3920 | } PCI_DEVICE; | 3886 | } PCI_DEVICE; |
3921 | 3887 | ||
3922 | typedef struct _PCI_CONFIG_SPACE_ | 3888 | typedef struct _PCI_CONFIG_SPACE_ { |
3923 | { | 3889 | ushort vendorID; |
3924 | ushort vendorID; | 3890 | ushort deviceID; |
3925 | ushort deviceID; | 3891 | ushort command; |
3926 | ushort command; | 3892 | ushort status; |
3927 | ushort status; | 3893 | uchar revision; |
3928 | uchar revision; | 3894 | uchar classCode[3]; |
3929 | uchar classCode[3]; | 3895 | uchar cacheSize; |
3930 | uchar cacheSize; | 3896 | uchar latencyTimer; |
3931 | uchar latencyTimer; | 3897 | uchar headerType; |
3932 | uchar headerType; | 3898 | uchar bist; |
3933 | uchar bist; | 3899 | ADV_PADDR baseAddress[6]; |
3934 | ADV_PADDR baseAddress[6]; | 3900 | ushort reserved[4]; |
3935 | ushort reserved[4]; | 3901 | ADV_PADDR optionRomAddr; |
3936 | ADV_PADDR optionRomAddr; | 3902 | ushort reserved2[4]; |
3937 | ushort reserved2[4]; | 3903 | uchar irqLine; |
3938 | uchar irqLine; | 3904 | uchar irqPin; |
3939 | uchar irqPin; | 3905 | uchar minGnt; |
3940 | uchar minGnt; | 3906 | uchar maxLatency; |
3941 | uchar maxLatency; | ||
3942 | } PCI_CONFIG_SPACE; | 3907 | } PCI_CONFIG_SPACE; |
3943 | 3908 | ||
3944 | |||
3945 | /* | 3909 | /* |
3946 | * --- Driver Data | 3910 | * --- Driver Data |
3947 | */ | 3911 | */ |
@@ -3949,44 +3913,42 @@ typedef struct _PCI_CONFIG_SPACE_ | |||
3949 | /* Note: All driver global data should be initialized. */ | 3913 | /* Note: All driver global data should be initialized. */ |
3950 | 3914 | ||
3951 | /* Number of boards detected in system. */ | 3915 | /* Number of boards detected in system. */ |
3952 | STATIC int asc_board_count = 0; | 3916 | static int asc_board_count = 0; |
3953 | STATIC struct Scsi_Host *asc_host[ASC_NUM_BOARD_SUPPORTED] = { NULL }; | 3917 | static struct Scsi_Host *asc_host[ASC_NUM_BOARD_SUPPORTED] = { NULL }; |
3954 | 3918 | ||
3955 | /* Overrun buffer used by all narrow boards. */ | 3919 | /* Overrun buffer used by all narrow boards. */ |
3956 | STATIC uchar overrun_buf[ASC_OVERRUN_BSIZE] = { 0 }; | 3920 | static uchar overrun_buf[ASC_OVERRUN_BSIZE] = { 0 }; |
3957 | 3921 | ||
3958 | /* | 3922 | /* |
3959 | * Global structures required to issue a command. | 3923 | * Global structures required to issue a command. |
3960 | */ | 3924 | */ |
3961 | STATIC ASC_SCSI_Q asc_scsi_q = { { 0 } }; | 3925 | static ASC_SCSI_Q asc_scsi_q = { {0} }; |
3962 | STATIC ASC_SG_HEAD asc_sg_head = { 0 }; | 3926 | static ASC_SG_HEAD asc_sg_head = { 0 }; |
3963 | 3927 | ||
3964 | /* List of supported bus types. */ | 3928 | /* List of supported bus types. */ |
3965 | STATIC ushort asc_bus[ASC_NUM_BUS] __initdata = { | 3929 | static ushort asc_bus[ASC_NUM_BUS] __initdata = { |
3966 | ASC_IS_ISA, | 3930 | ASC_IS_ISA, |
3967 | ASC_IS_VL, | 3931 | ASC_IS_VL, |
3968 | ASC_IS_EISA, | 3932 | ASC_IS_EISA, |
3969 | ASC_IS_PCI, | 3933 | ASC_IS_PCI, |
3970 | }; | 3934 | }; |
3971 | 3935 | ||
3972 | STATIC int asc_iopflag = ASC_FALSE; | 3936 | static int asc_iopflag = ASC_FALSE; |
3973 | STATIC int asc_ioport[ASC_NUM_IOPORT_PROBE] = { 0, 0, 0, 0 }; | 3937 | static int asc_ioport[ASC_NUM_IOPORT_PROBE] = { 0, 0, 0, 0 }; |
3974 | 3938 | ||
3975 | #ifdef ADVANSYS_DEBUG | 3939 | #ifdef ADVANSYS_DEBUG |
3976 | STATIC char * | 3940 | static char *asc_bus_name[ASC_NUM_BUS] = { |
3977 | asc_bus_name[ASC_NUM_BUS] = { | 3941 | "ASC_IS_ISA", |
3978 | "ASC_IS_ISA", | 3942 | "ASC_IS_VL", |
3979 | "ASC_IS_VL", | 3943 | "ASC_IS_EISA", |
3980 | "ASC_IS_EISA", | 3944 | "ASC_IS_PCI", |
3981 | "ASC_IS_PCI", | ||
3982 | }; | 3945 | }; |
3983 | 3946 | ||
3984 | STATIC int asc_dbglvl = 3; | 3947 | static int asc_dbglvl = 3; |
3985 | #endif /* ADVANSYS_DEBUG */ | 3948 | #endif /* ADVANSYS_DEBUG */ |
3986 | 3949 | ||
3987 | /* Declaration for Asc Library internal data referenced by driver. */ | 3950 | /* Declaration for Asc Library internal data referenced by driver. */ |
3988 | STATIC PortAddr _asc_def_iop_base[]; | 3951 | static PortAddr _asc_def_iop_base[]; |
3989 | |||
3990 | 3952 | ||
3991 | /* | 3953 | /* |
3992 | * --- Driver Function Prototypes | 3954 | * --- Driver Function Prototypes |
@@ -3994,62 +3956,61 @@ STATIC PortAddr _asc_def_iop_base[]; | |||
3994 | * advansys.h contains function prototypes for functions global to Linux. | 3956 | * advansys.h contains function prototypes for functions global to Linux. |
3995 | */ | 3957 | */ |
3996 | 3958 | ||
3997 | STATIC irqreturn_t advansys_interrupt(int, void *); | 3959 | static irqreturn_t advansys_interrupt(int, void *); |
3998 | STATIC int advansys_slave_configure(struct scsi_device *); | 3960 | static int advansys_slave_configure(struct scsi_device *); |
3999 | STATIC void asc_scsi_done_list(struct scsi_cmnd *); | 3961 | static void asc_scsi_done_list(struct scsi_cmnd *); |
4000 | STATIC int asc_execute_scsi_cmnd(struct scsi_cmnd *); | 3962 | static int asc_execute_scsi_cmnd(struct scsi_cmnd *); |
4001 | STATIC int asc_build_req(asc_board_t *, struct scsi_cmnd *); | 3963 | static int asc_build_req(asc_board_t *, struct scsi_cmnd *); |
4002 | STATIC int adv_build_req(asc_board_t *, struct scsi_cmnd *, ADV_SCSI_REQ_Q **); | 3964 | static int adv_build_req(asc_board_t *, struct scsi_cmnd *, ADV_SCSI_REQ_Q **); |
4003 | STATIC int adv_get_sglist(asc_board_t *, adv_req_t *, struct scsi_cmnd *, int); | 3965 | static int adv_get_sglist(asc_board_t *, adv_req_t *, struct scsi_cmnd *, int); |
4004 | STATIC void asc_isr_callback(ASC_DVC_VAR *, ASC_QDONE_INFO *); | 3966 | static void asc_isr_callback(ASC_DVC_VAR *, ASC_QDONE_INFO *); |
4005 | STATIC void adv_isr_callback(ADV_DVC_VAR *, ADV_SCSI_REQ_Q *); | 3967 | static void adv_isr_callback(ADV_DVC_VAR *, ADV_SCSI_REQ_Q *); |
4006 | STATIC void adv_async_callback(ADV_DVC_VAR *, uchar); | 3968 | static void adv_async_callback(ADV_DVC_VAR *, uchar); |
4007 | STATIC void asc_enqueue(asc_queue_t *, REQP, int); | 3969 | static void asc_enqueue(asc_queue_t *, REQP, int); |
4008 | STATIC REQP asc_dequeue(asc_queue_t *, int); | 3970 | static REQP asc_dequeue(asc_queue_t *, int); |
4009 | STATIC REQP asc_dequeue_list(asc_queue_t *, REQP *, int); | 3971 | static REQP asc_dequeue_list(asc_queue_t *, REQP *, int); |
4010 | STATIC int asc_rmqueue(asc_queue_t *, REQP); | 3972 | static int asc_rmqueue(asc_queue_t *, REQP); |
4011 | STATIC void asc_execute_queue(asc_queue_t *); | 3973 | static void asc_execute_queue(asc_queue_t *); |
4012 | #ifdef CONFIG_PROC_FS | 3974 | #ifdef CONFIG_PROC_FS |
4013 | STATIC int asc_proc_copy(off_t, off_t, char *, int , char *, int); | 3975 | static int asc_proc_copy(off_t, off_t, char *, int, char *, int); |
4014 | STATIC int asc_prt_board_devices(struct Scsi_Host *, char *, int); | 3976 | static int asc_prt_board_devices(struct Scsi_Host *, char *, int); |
4015 | STATIC int asc_prt_adv_bios(struct Scsi_Host *, char *, int); | 3977 | static int asc_prt_adv_bios(struct Scsi_Host *, char *, int); |
4016 | STATIC int asc_get_eeprom_string(ushort *serialnum, uchar *cp); | 3978 | static int asc_get_eeprom_string(ushort *serialnum, uchar *cp); |
4017 | STATIC int asc_prt_asc_board_eeprom(struct Scsi_Host *, char *, int); | 3979 | static int asc_prt_asc_board_eeprom(struct Scsi_Host *, char *, int); |
4018 | STATIC int asc_prt_adv_board_eeprom(struct Scsi_Host *, char *, int); | 3980 | static int asc_prt_adv_board_eeprom(struct Scsi_Host *, char *, int); |
4019 | STATIC int asc_prt_driver_conf(struct Scsi_Host *, char *, int); | 3981 | static int asc_prt_driver_conf(struct Scsi_Host *, char *, int); |
4020 | STATIC int asc_prt_asc_board_info(struct Scsi_Host *, char *, int); | 3982 | static int asc_prt_asc_board_info(struct Scsi_Host *, char *, int); |
4021 | STATIC int asc_prt_adv_board_info(struct Scsi_Host *, char *, int); | 3983 | static int asc_prt_adv_board_info(struct Scsi_Host *, char *, int); |
4022 | STATIC int asc_prt_line(char *, int, char *fmt, ...); | 3984 | static int asc_prt_line(char *, int, char *fmt, ...); |
4023 | #endif /* CONFIG_PROC_FS */ | 3985 | #endif /* CONFIG_PROC_FS */ |
4024 | 3986 | ||
4025 | /* Declaration for Asc Library internal functions referenced by driver. */ | 3987 | /* Declaration for Asc Library internal functions referenced by driver. */ |
4026 | STATIC int AscFindSignature(PortAddr); | 3988 | static int AscFindSignature(PortAddr); |
4027 | STATIC ushort AscGetEEPConfig(PortAddr, ASCEEP_CONFIG *, ushort); | 3989 | static ushort AscGetEEPConfig(PortAddr, ASCEEP_CONFIG *, ushort); |
4028 | 3990 | ||
4029 | /* Statistics function prototypes. */ | 3991 | /* Statistics function prototypes. */ |
4030 | #ifdef ADVANSYS_STATS | 3992 | #ifdef ADVANSYS_STATS |
4031 | #ifdef CONFIG_PROC_FS | 3993 | #ifdef CONFIG_PROC_FS |
4032 | STATIC int asc_prt_board_stats(struct Scsi_Host *, char *, int); | 3994 | static int asc_prt_board_stats(struct Scsi_Host *, char *, int); |
4033 | STATIC int asc_prt_target_stats(struct Scsi_Host *, int, char *, int); | 3995 | static int asc_prt_target_stats(struct Scsi_Host *, int, char *, int); |
4034 | #endif /* CONFIG_PROC_FS */ | 3996 | #endif /* CONFIG_PROC_FS */ |
4035 | #endif /* ADVANSYS_STATS */ | 3997 | #endif /* ADVANSYS_STATS */ |
4036 | 3998 | ||
4037 | /* Debug function prototypes. */ | 3999 | /* Debug function prototypes. */ |
4038 | #ifdef ADVANSYS_DEBUG | 4000 | #ifdef ADVANSYS_DEBUG |
4039 | STATIC void asc_prt_scsi_host(struct Scsi_Host *); | 4001 | static void asc_prt_scsi_host(struct Scsi_Host *); |
4040 | STATIC void asc_prt_scsi_cmnd(struct scsi_cmnd *); | 4002 | static void asc_prt_scsi_cmnd(struct scsi_cmnd *); |
4041 | STATIC void asc_prt_asc_dvc_cfg(ASC_DVC_CFG *); | 4003 | static void asc_prt_asc_dvc_cfg(ASC_DVC_CFG *); |
4042 | STATIC void asc_prt_asc_dvc_var(ASC_DVC_VAR *); | 4004 | static void asc_prt_asc_dvc_var(ASC_DVC_VAR *); |
4043 | STATIC void asc_prt_asc_scsi_q(ASC_SCSI_Q *); | 4005 | static void asc_prt_asc_scsi_q(ASC_SCSI_Q *); |
4044 | STATIC void asc_prt_asc_qdone_info(ASC_QDONE_INFO *); | 4006 | static void asc_prt_asc_qdone_info(ASC_QDONE_INFO *); |
4045 | STATIC void asc_prt_adv_dvc_cfg(ADV_DVC_CFG *); | 4007 | static void asc_prt_adv_dvc_cfg(ADV_DVC_CFG *); |
4046 | STATIC void asc_prt_adv_dvc_var(ADV_DVC_VAR *); | 4008 | static void asc_prt_adv_dvc_var(ADV_DVC_VAR *); |
4047 | STATIC void asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q *); | 4009 | static void asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q *); |
4048 | STATIC void asc_prt_adv_sgblock(int, ADV_SG_BLOCK *); | 4010 | static void asc_prt_adv_sgblock(int, ADV_SG_BLOCK *); |
4049 | STATIC void asc_prt_hex(char *f, uchar *, int); | 4011 | static void asc_prt_hex(char *f, uchar *, int); |
4050 | #endif /* ADVANSYS_DEBUG */ | 4012 | #endif /* ADVANSYS_DEBUG */ |
4051 | 4013 | ||
4052 | |||
4053 | #ifdef CONFIG_PROC_FS | 4014 | #ifdef CONFIG_PROC_FS |
4054 | /* | 4015 | /* |
4055 | * advansys_proc_info() - /proc/scsi/advansys/[0-(ASC_NUM_BOARD_SUPPORTED-1)] | 4016 | * advansys_proc_info() - /proc/scsi/advansys/[0-(ASC_NUM_BOARD_SUPPORTED-1)] |
@@ -4073,1389 +4034,210 @@ STATIC void asc_prt_hex(char *f, uchar *, int); | |||
4073 | */ | 4034 | */ |
4074 | static int | 4035 | static int |
4075 | advansys_proc_info(struct Scsi_Host *shost, char *buffer, char **start, | 4036 | advansys_proc_info(struct Scsi_Host *shost, char *buffer, char **start, |
4076 | off_t offset, int length, int inout) | 4037 | off_t offset, int length, int inout) |
4077 | { | 4038 | { |
4078 | struct Scsi_Host *shp; | 4039 | struct Scsi_Host *shp; |
4079 | asc_board_t *boardp; | 4040 | asc_board_t *boardp; |
4080 | int i; | 4041 | int i; |
4081 | char *cp; | 4042 | char *cp; |
4082 | int cplen; | 4043 | int cplen; |
4083 | int cnt; | 4044 | int cnt; |
4084 | int totcnt; | 4045 | int totcnt; |
4085 | int leftlen; | 4046 | int leftlen; |
4086 | char *curbuf; | 4047 | char *curbuf; |
4087 | off_t advoffset; | 4048 | off_t advoffset; |
4088 | #ifdef ADVANSYS_STATS | 4049 | #ifdef ADVANSYS_STATS |
4089 | int tgt_id; | 4050 | int tgt_id; |
4090 | #endif /* ADVANSYS_STATS */ | 4051 | #endif /* ADVANSYS_STATS */ |
4091 | 4052 | ||
4092 | ASC_DBG(1, "advansys_proc_info: begin\n"); | 4053 | ASC_DBG(1, "advansys_proc_info: begin\n"); |
4093 | |||
4094 | /* | ||
4095 | * User write not supported. | ||
4096 | */ | ||
4097 | if (inout == TRUE) { | ||
4098 | return(-ENOSYS); | ||
4099 | } | ||
4100 | 4054 | ||
4101 | /* | 4055 | /* |
4102 | * User read of /proc/scsi/advansys/[0...] file. | 4056 | * User write not supported. |
4103 | */ | 4057 | */ |
4104 | 4058 | if (inout == TRUE) { | |
4105 | /* Find the specified board. */ | 4059 | return (-ENOSYS); |
4106 | for (i = 0; i < asc_board_count; i++) { | 4060 | } |
4107 | if (asc_host[i]->host_no == shost->host_no) { | ||
4108 | break; | ||
4109 | } | ||
4110 | } | ||
4111 | if (i == asc_board_count) { | ||
4112 | return(-ENOENT); | ||
4113 | } | ||
4114 | |||
4115 | shp = asc_host[i]; | ||
4116 | boardp = ASC_BOARDP(shp); | ||
4117 | |||
4118 | /* Copy read data starting at the beginning of the buffer. */ | ||
4119 | *start = buffer; | ||
4120 | curbuf = buffer; | ||
4121 | advoffset = 0; | ||
4122 | totcnt = 0; | ||
4123 | leftlen = length; | ||
4124 | |||
4125 | /* | ||
4126 | * Get board configuration information. | ||
4127 | * | ||
4128 | * advansys_info() returns the board string from its own static buffer. | ||
4129 | */ | ||
4130 | cp = (char *) advansys_info(shp); | ||
4131 | strcat(cp, "\n"); | ||
4132 | cplen = strlen(cp); | ||
4133 | /* Copy board information. */ | ||
4134 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4135 | totcnt += cnt; | ||
4136 | leftlen -= cnt; | ||
4137 | if (leftlen == 0) { | ||
4138 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4139 | return totcnt; | ||
4140 | } | ||
4141 | advoffset += cplen; | ||
4142 | curbuf += cnt; | ||
4143 | 4061 | ||
4144 | /* | 4062 | /* |
4145 | * Display Wide Board BIOS Information. | 4063 | * User read of /proc/scsi/advansys/[0...] file. |
4146 | */ | 4064 | */ |
4147 | if (ASC_WIDE_BOARD(boardp)) { | ||
4148 | cp = boardp->prtbuf; | ||
4149 | cplen = asc_prt_adv_bios(shp, cp, ASC_PRTBUF_SIZE); | ||
4150 | ASC_ASSERT(cplen < ASC_PRTBUF_SIZE); | ||
4151 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4152 | totcnt += cnt; | ||
4153 | leftlen -= cnt; | ||
4154 | if (leftlen == 0) { | ||
4155 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4156 | return totcnt; | ||
4157 | } | ||
4158 | advoffset += cplen; | ||
4159 | curbuf += cnt; | ||
4160 | } | ||
4161 | 4065 | ||
4162 | /* | 4066 | /* Find the specified board. */ |
4163 | * Display driver information for each device attached to the board. | 4067 | for (i = 0; i < asc_board_count; i++) { |
4164 | */ | 4068 | if (asc_host[i]->host_no == shost->host_no) { |
4165 | cp = boardp->prtbuf; | 4069 | break; |
4166 | cplen = asc_prt_board_devices(shp, cp, ASC_PRTBUF_SIZE); | 4070 | } |
4167 | ASC_ASSERT(cplen < ASC_PRTBUF_SIZE); | 4071 | } |
4168 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | 4072 | if (i == asc_board_count) { |
4169 | totcnt += cnt; | 4073 | return (-ENOENT); |
4170 | leftlen -= cnt; | 4074 | } |
4171 | if (leftlen == 0) { | ||
4172 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4173 | return totcnt; | ||
4174 | } | ||
4175 | advoffset += cplen; | ||
4176 | curbuf += cnt; | ||
4177 | 4075 | ||
4178 | /* | 4076 | shp = asc_host[i]; |
4179 | * Display EEPROM configuration for the board. | 4077 | boardp = ASC_BOARDP(shp); |
4180 | */ | 4078 | |
4181 | cp = boardp->prtbuf; | 4079 | /* Copy read data starting at the beginning of the buffer. */ |
4182 | if (ASC_NARROW_BOARD(boardp)) { | 4080 | *start = buffer; |
4183 | cplen = asc_prt_asc_board_eeprom(shp, cp, ASC_PRTBUF_SIZE); | 4081 | curbuf = buffer; |
4184 | } else { | 4082 | advoffset = 0; |
4185 | cplen = asc_prt_adv_board_eeprom(shp, cp, ASC_PRTBUF_SIZE); | 4083 | totcnt = 0; |
4186 | } | 4084 | leftlen = length; |
4187 | ASC_ASSERT(cplen < ASC_PRTBUF_SIZE); | 4085 | |
4188 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | 4086 | /* |
4189 | totcnt += cnt; | 4087 | * Get board configuration information. |
4190 | leftlen -= cnt; | 4088 | * |
4191 | if (leftlen == 0) { | 4089 | * advansys_info() returns the board string from its own static buffer. |
4192 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | 4090 | */ |
4193 | return totcnt; | 4091 | cp = (char *)advansys_info(shp); |
4194 | } | 4092 | strcat(cp, "\n"); |
4195 | advoffset += cplen; | 4093 | cplen = strlen(cp); |
4196 | curbuf += cnt; | 4094 | /* Copy board information. */ |
4095 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4096 | totcnt += cnt; | ||
4097 | leftlen -= cnt; | ||
4098 | if (leftlen == 0) { | ||
4099 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4100 | return totcnt; | ||
4101 | } | ||
4102 | advoffset += cplen; | ||
4103 | curbuf += cnt; | ||
4104 | |||
4105 | /* | ||
4106 | * Display Wide Board BIOS Information. | ||
4107 | */ | ||
4108 | if (ASC_WIDE_BOARD(boardp)) { | ||
4109 | cp = boardp->prtbuf; | ||
4110 | cplen = asc_prt_adv_bios(shp, cp, ASC_PRTBUF_SIZE); | ||
4111 | ASC_ASSERT(cplen < ASC_PRTBUF_SIZE); | ||
4112 | cnt = | ||
4113 | asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, | ||
4114 | cplen); | ||
4115 | totcnt += cnt; | ||
4116 | leftlen -= cnt; | ||
4117 | if (leftlen == 0) { | ||
4118 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4119 | return totcnt; | ||
4120 | } | ||
4121 | advoffset += cplen; | ||
4122 | curbuf += cnt; | ||
4123 | } | ||
4197 | 4124 | ||
4198 | /* | 4125 | /* |
4199 | * Display driver configuration and information for the board. | 4126 | * Display driver information for each device attached to the board. |
4200 | */ | 4127 | */ |
4201 | cp = boardp->prtbuf; | 4128 | cp = boardp->prtbuf; |
4202 | cplen = asc_prt_driver_conf(shp, cp, ASC_PRTBUF_SIZE); | 4129 | cplen = asc_prt_board_devices(shp, cp, ASC_PRTBUF_SIZE); |
4203 | ASC_ASSERT(cplen < ASC_PRTBUF_SIZE); | 4130 | ASC_ASSERT(cplen < ASC_PRTBUF_SIZE); |
4204 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | 4131 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); |
4205 | totcnt += cnt; | 4132 | totcnt += cnt; |
4206 | leftlen -= cnt; | 4133 | leftlen -= cnt; |
4207 | if (leftlen == 0) { | 4134 | if (leftlen == 0) { |
4208 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | 4135 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); |
4209 | return totcnt; | 4136 | return totcnt; |
4210 | } | 4137 | } |
4211 | advoffset += cplen; | 4138 | advoffset += cplen; |
4212 | curbuf += cnt; | 4139 | curbuf += cnt; |
4140 | |||
4141 | /* | ||
4142 | * Display EEPROM configuration for the board. | ||
4143 | */ | ||
4144 | cp = boardp->prtbuf; | ||
4145 | if (ASC_NARROW_BOARD(boardp)) { | ||
4146 | cplen = asc_prt_asc_board_eeprom(shp, cp, ASC_PRTBUF_SIZE); | ||
4147 | } else { | ||
4148 | cplen = asc_prt_adv_board_eeprom(shp, cp, ASC_PRTBUF_SIZE); | ||
4149 | } | ||
4150 | ASC_ASSERT(cplen < ASC_PRTBUF_SIZE); | ||
4151 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4152 | totcnt += cnt; | ||
4153 | leftlen -= cnt; | ||
4154 | if (leftlen == 0) { | ||
4155 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4156 | return totcnt; | ||
4157 | } | ||
4158 | advoffset += cplen; | ||
4159 | curbuf += cnt; | ||
4160 | |||
4161 | /* | ||
4162 | * Display driver configuration and information for the board. | ||
4163 | */ | ||
4164 | cp = boardp->prtbuf; | ||
4165 | cplen = asc_prt_driver_conf(shp, cp, ASC_PRTBUF_SIZE); | ||
4166 | ASC_ASSERT(cplen < ASC_PRTBUF_SIZE); | ||
4167 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | ||
4168 | totcnt += cnt; | ||
4169 | leftlen -= cnt; | ||
4170 | if (leftlen == 0) { | ||
4171 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4172 | return totcnt; | ||
4173 | } | ||
4174 | advoffset += cplen; | ||
4175 | curbuf += cnt; | ||
4213 | 4176 | ||
4214 | #ifdef ADVANSYS_STATS | 4177 | #ifdef ADVANSYS_STATS |
4215 | /* | 4178 | /* |
4216 | * Display driver statistics for the board. | 4179 | * Display driver statistics for the board. |
4217 | */ | 4180 | */ |
4218 | cp = boardp->prtbuf; | 4181 | cp = boardp->prtbuf; |
4219 | cplen = asc_prt_board_stats(shp, cp, ASC_PRTBUF_SIZE); | 4182 | cplen = asc_prt_board_stats(shp, cp, ASC_PRTBUF_SIZE); |
4220 | ASC_ASSERT(cplen <= ASC_PRTBUF_SIZE); | 4183 | ASC_ASSERT(cplen <= ASC_PRTBUF_SIZE); |
4221 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | 4184 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); |
4222 | totcnt += cnt; | 4185 | totcnt += cnt; |
4223 | leftlen -= cnt; | 4186 | leftlen -= cnt; |
4224 | if (leftlen == 0) { | 4187 | if (leftlen == 0) { |
4225 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | 4188 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); |
4226 | return totcnt; | 4189 | return totcnt; |
4227 | } | 4190 | } |
4228 | advoffset += cplen; | 4191 | advoffset += cplen; |
4229 | curbuf += cnt; | 4192 | curbuf += cnt; |
4230 | 4193 | ||
4231 | /* | 4194 | /* |
4232 | * Display driver statistics for each target. | 4195 | * Display driver statistics for each target. |
4233 | */ | 4196 | */ |
4234 | for (tgt_id = 0; tgt_id <= ADV_MAX_TID; tgt_id++) { | 4197 | for (tgt_id = 0; tgt_id <= ADV_MAX_TID; tgt_id++) { |
4235 | cp = boardp->prtbuf; | 4198 | cp = boardp->prtbuf; |
4236 | cplen = asc_prt_target_stats(shp, tgt_id, cp, ASC_PRTBUF_SIZE); | 4199 | cplen = asc_prt_target_stats(shp, tgt_id, cp, ASC_PRTBUF_SIZE); |
4237 | ASC_ASSERT(cplen <= ASC_PRTBUF_SIZE); | 4200 | ASC_ASSERT(cplen <= ASC_PRTBUF_SIZE); |
4238 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | 4201 | cnt = |
4239 | totcnt += cnt; | 4202 | asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, |
4240 | leftlen -= cnt; | 4203 | cplen); |
4241 | if (leftlen == 0) { | 4204 | totcnt += cnt; |
4242 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | 4205 | leftlen -= cnt; |
4243 | return totcnt; | 4206 | if (leftlen == 0) { |
4244 | } | 4207 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); |
4245 | advoffset += cplen; | 4208 | return totcnt; |
4246 | curbuf += cnt; | 4209 | } |
4247 | } | 4210 | advoffset += cplen; |
4211 | curbuf += cnt; | ||
4212 | } | ||
4248 | #endif /* ADVANSYS_STATS */ | 4213 | #endif /* ADVANSYS_STATS */ |
4249 | 4214 | ||
4250 | /* | 4215 | /* |
4251 | * Display Asc Library dynamic configuration information | 4216 | * Display Asc Library dynamic configuration information |
4252 | * for the board. | 4217 | * for the board. |
4253 | */ | 4218 | */ |
4254 | cp = boardp->prtbuf; | 4219 | cp = boardp->prtbuf; |
4255 | if (ASC_NARROW_BOARD(boardp)) { | 4220 | if (ASC_NARROW_BOARD(boardp)) { |
4256 | cplen = asc_prt_asc_board_info(shp, cp, ASC_PRTBUF_SIZE); | 4221 | cplen = asc_prt_asc_board_info(shp, cp, ASC_PRTBUF_SIZE); |
4257 | } else { | 4222 | } else { |
4258 | cplen = asc_prt_adv_board_info(shp, cp, ASC_PRTBUF_SIZE); | 4223 | cplen = asc_prt_adv_board_info(shp, cp, ASC_PRTBUF_SIZE); |
4259 | } | 4224 | } |
4260 | ASC_ASSERT(cplen < ASC_PRTBUF_SIZE); | 4225 | ASC_ASSERT(cplen < ASC_PRTBUF_SIZE); |
4261 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); | 4226 | cnt = asc_proc_copy(advoffset, offset, curbuf, leftlen, cp, cplen); |
4262 | totcnt += cnt; | 4227 | totcnt += cnt; |
4263 | leftlen -= cnt; | 4228 | leftlen -= cnt; |
4264 | if (leftlen == 0) { | 4229 | if (leftlen == 0) { |
4265 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | 4230 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); |
4266 | return totcnt; | 4231 | return totcnt; |
4267 | } | 4232 | } |
4268 | advoffset += cplen; | 4233 | advoffset += cplen; |
4269 | curbuf += cnt; | 4234 | curbuf += cnt; |
4270 | |||
4271 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); | ||
4272 | |||
4273 | return totcnt; | ||
4274 | } | ||
4275 | #endif /* CONFIG_PROC_FS */ | ||
4276 | |||
4277 | /* | ||
4278 | * advansys_detect() | ||
4279 | * | ||
4280 | * Detect function for AdvanSys adapters. | ||
4281 | * | ||
4282 | * Argument is a pointer to the host driver's scsi_hosts entry. | ||
4283 | * | ||
4284 | * Return number of adapters found. | ||
4285 | * | ||
4286 | * Note: Because this function is called during system initialization | ||
4287 | * it must not call SCSI mid-level functions including scsi_malloc() | ||
4288 | * and scsi_free(). | ||
4289 | */ | ||
4290 | static int __init | ||
4291 | advansys_detect(struct scsi_host_template *tpnt) | ||
4292 | { | ||
4293 | static int detect_called = ASC_FALSE; | ||
4294 | int iop; | ||
4295 | int bus; | ||
4296 | struct Scsi_Host *shp = NULL; | ||
4297 | asc_board_t *boardp = NULL; | ||
4298 | ASC_DVC_VAR *asc_dvc_varp = NULL; | ||
4299 | ADV_DVC_VAR *adv_dvc_varp = NULL; | ||
4300 | adv_sgblk_t *sgp = NULL; | ||
4301 | int ioport = 0; | ||
4302 | int share_irq = FALSE; | ||
4303 | int iolen = 0; | ||
4304 | struct device *dev = NULL; | ||
4305 | #ifdef CONFIG_PCI | ||
4306 | int pci_init_search = 0; | ||
4307 | struct pci_dev *pci_devicep[ASC_NUM_BOARD_SUPPORTED]; | ||
4308 | int pci_card_cnt_max = 0; | ||
4309 | int pci_card_cnt = 0; | ||
4310 | struct pci_dev *pci_devp = NULL; | ||
4311 | int pci_device_id_cnt = 0; | ||
4312 | unsigned int pci_device_id[ASC_PCI_DEVICE_ID_CNT] = { | ||
4313 | PCI_DEVICE_ID_ASP_1200A, | ||
4314 | PCI_DEVICE_ID_ASP_ABP940, | ||
4315 | PCI_DEVICE_ID_ASP_ABP940U, | ||
4316 | PCI_DEVICE_ID_ASP_ABP940UW, | ||
4317 | PCI_DEVICE_ID_38C0800_REV1, | ||
4318 | PCI_DEVICE_ID_38C1600_REV1 | ||
4319 | }; | ||
4320 | ADV_PADDR pci_memory_address; | ||
4321 | #endif /* CONFIG_PCI */ | ||
4322 | int warn_code, err_code; | ||
4323 | int ret; | ||
4324 | |||
4325 | if (detect_called == ASC_FALSE) { | ||
4326 | detect_called = ASC_TRUE; | ||
4327 | } else { | ||
4328 | printk("AdvanSys SCSI: advansys_detect() multiple calls ignored\n"); | ||
4329 | return 0; | ||
4330 | } | ||
4331 | |||
4332 | ASC_DBG(1, "advansys_detect: begin\n"); | ||
4333 | |||
4334 | asc_board_count = 0; | ||
4335 | |||
4336 | /* | ||
4337 | * If I/O port probing has been modified, then verify and | ||
4338 | * clean-up the 'asc_ioport' list. | ||
4339 | */ | ||
4340 | if (asc_iopflag == ASC_TRUE) { | ||
4341 | for (ioport = 0; ioport < ASC_NUM_IOPORT_PROBE; ioport++) { | ||
4342 | ASC_DBG2(1, "advansys_detect: asc_ioport[%d] 0x%x\n", | ||
4343 | ioport, asc_ioport[ioport]); | ||
4344 | if (asc_ioport[ioport] != 0) { | ||
4345 | for (iop = 0; iop < ASC_IOADR_TABLE_MAX_IX; iop++) { | ||
4346 | if (_asc_def_iop_base[iop] == asc_ioport[ioport]) { | ||
4347 | break; | ||
4348 | } | ||
4349 | } | ||
4350 | if (iop == ASC_IOADR_TABLE_MAX_IX) { | ||
4351 | printk( | ||
4352 | "AdvanSys SCSI: specified I/O Port 0x%X is invalid\n", | ||
4353 | asc_ioport[ioport]); | ||
4354 | asc_ioport[ioport] = 0; | ||
4355 | } | ||
4356 | } | ||
4357 | } | ||
4358 | ioport = 0; | ||
4359 | } | ||
4360 | |||
4361 | for (bus = 0; bus < ASC_NUM_BUS; bus++) { | ||
4362 | |||
4363 | ASC_DBG2(1, "advansys_detect: bus search type %d (%s)\n", | ||
4364 | bus, asc_bus_name[bus]); | ||
4365 | iop = 0; | ||
4366 | |||
4367 | while (asc_board_count < ASC_NUM_BOARD_SUPPORTED) { | ||
4368 | |||
4369 | ASC_DBG1(2, "advansys_detect: asc_board_count %d\n", | ||
4370 | asc_board_count); | ||
4371 | |||
4372 | switch (asc_bus[bus]) { | ||
4373 | case ASC_IS_ISA: | ||
4374 | case ASC_IS_VL: | ||
4375 | #ifdef CONFIG_ISA | ||
4376 | if (asc_iopflag == ASC_FALSE) { | ||
4377 | iop = AscSearchIOPortAddr(iop, asc_bus[bus]); | ||
4378 | } else { | ||
4379 | /* | ||
4380 | * ISA and VL I/O port scanning has either been | ||
4381 | * eliminated or limited to selected ports on | ||
4382 | * the LILO command line, /etc/lilo.conf, or | ||
4383 | * by setting variables when the module was loaded. | ||
4384 | */ | ||
4385 | ASC_DBG(1, "advansys_detect: I/O port scanning modified\n"); | ||
4386 | ioport_try_again: | ||
4387 | iop = 0; | ||
4388 | for (; ioport < ASC_NUM_IOPORT_PROBE; ioport++) { | ||
4389 | if ((iop = asc_ioport[ioport]) != 0) { | ||
4390 | break; | ||
4391 | } | ||
4392 | } | ||
4393 | if (iop) { | ||
4394 | ASC_DBG1(1, | ||
4395 | "advansys_detect: probing I/O port 0x%x...\n", | ||
4396 | iop); | ||
4397 | if (!request_region(iop, ASC_IOADR_GAP, "advansys")){ | ||
4398 | printk( | ||
4399 | "AdvanSys SCSI: specified I/O Port 0x%X is busy\n", iop); | ||
4400 | /* Don't try this I/O port twice. */ | ||
4401 | asc_ioport[ioport] = 0; | ||
4402 | goto ioport_try_again; | ||
4403 | } else if (AscFindSignature(iop) == ASC_FALSE) { | ||
4404 | printk( | ||
4405 | "AdvanSys SCSI: specified I/O Port 0x%X has no adapter\n", iop); | ||
4406 | /* Don't try this I/O port twice. */ | ||
4407 | release_region(iop, ASC_IOADR_GAP); | ||
4408 | asc_ioport[ioport] = 0; | ||
4409 | goto ioport_try_again; | ||
4410 | } else { | ||
4411 | /* | ||
4412 | * If this isn't an ISA board, then it must be | ||
4413 | * a VL board. If currently looking an ISA | ||
4414 | * board is being looked for then try for | ||
4415 | * another ISA board in 'asc_ioport'. | ||
4416 | */ | ||
4417 | if (asc_bus[bus] == ASC_IS_ISA && | ||
4418 | (AscGetChipVersion(iop, ASC_IS_ISA) & | ||
4419 | ASC_CHIP_VER_ISA_BIT) == 0) { | ||
4420 | /* | ||
4421 | * Don't clear 'asc_ioport[ioport]'. Try | ||
4422 | * this board again for VL. Increment | ||
4423 | * 'ioport' past this board. | ||
4424 | */ | ||
4425 | ioport++; | ||
4426 | release_region(iop, ASC_IOADR_GAP); | ||
4427 | goto ioport_try_again; | ||
4428 | } | ||
4429 | } | ||
4430 | /* | ||
4431 | * This board appears good, don't try the I/O port | ||
4432 | * again by clearing its value. Increment 'ioport' | ||
4433 | * for the next iteration. | ||
4434 | */ | ||
4435 | asc_ioport[ioport++] = 0; | ||
4436 | } | ||
4437 | } | ||
4438 | #endif /* CONFIG_ISA */ | ||
4439 | break; | ||
4440 | |||
4441 | case ASC_IS_EISA: | ||
4442 | #ifdef CONFIG_ISA | ||
4443 | iop = AscSearchIOPortAddr(iop, asc_bus[bus]); | ||
4444 | #endif /* CONFIG_ISA */ | ||
4445 | break; | ||
4446 | |||
4447 | case ASC_IS_PCI: | ||
4448 | #ifdef CONFIG_PCI | ||
4449 | if (pci_init_search == 0) { | ||
4450 | int i, j; | ||
4451 | |||
4452 | pci_init_search = 1; | ||
4453 | |||
4454 | /* Find all PCI cards. */ | ||
4455 | while (pci_device_id_cnt < ASC_PCI_DEVICE_ID_CNT) { | ||
4456 | if ((pci_devp = pci_find_device(PCI_VENDOR_ID_ASP, | ||
4457 | pci_device_id[pci_device_id_cnt], pci_devp)) == | ||
4458 | NULL) { | ||
4459 | pci_device_id_cnt++; | ||
4460 | } else { | ||
4461 | if (pci_enable_device(pci_devp) == 0) { | ||
4462 | pci_devicep[pci_card_cnt_max++] = pci_devp; | ||
4463 | } | ||
4464 | } | ||
4465 | } | ||
4466 | |||
4467 | /* | ||
4468 | * Sort PCI cards in ascending order by PCI Bus, Slot, | ||
4469 | * and Device Number. | ||
4470 | */ | ||
4471 | for (i = 0; i < pci_card_cnt_max - 1; i++) | ||
4472 | { | ||
4473 | for (j = i + 1; j < pci_card_cnt_max; j++) { | ||
4474 | if ((pci_devicep[j]->bus->number < | ||
4475 | pci_devicep[i]->bus->number) || | ||
4476 | ((pci_devicep[j]->bus->number == | ||
4477 | pci_devicep[i]->bus->number) && | ||
4478 | (pci_devicep[j]->devfn < | ||
4479 | pci_devicep[i]->devfn))) { | ||
4480 | pci_devp = pci_devicep[i]; | ||
4481 | pci_devicep[i] = pci_devicep[j]; | ||
4482 | pci_devicep[j] = pci_devp; | ||
4483 | } | ||
4484 | } | ||
4485 | } | ||
4486 | |||
4487 | pci_card_cnt = 0; | ||
4488 | } else { | ||
4489 | pci_card_cnt++; | ||
4490 | } | ||
4491 | |||
4492 | if (pci_card_cnt == pci_card_cnt_max) { | ||
4493 | iop = 0; | ||
4494 | } else { | ||
4495 | pci_devp = pci_devicep[pci_card_cnt]; | ||
4496 | |||
4497 | ASC_DBG2(2, | ||
4498 | "advansys_detect: devfn %d, bus number %d\n", | ||
4499 | pci_devp->devfn, pci_devp->bus->number); | ||
4500 | iop = pci_resource_start(pci_devp, 0); | ||
4501 | ASC_DBG2(1, | ||
4502 | "advansys_detect: vendorID %X, deviceID %X\n", | ||
4503 | pci_devp->vendor, pci_devp->device); | ||
4504 | ASC_DBG2(2, "advansys_detect: iop %X, irqLine %d\n", | ||
4505 | iop, pci_devp->irq); | ||
4506 | } | ||
4507 | if(pci_devp) | ||
4508 | dev = &pci_devp->dev; | ||
4509 | |||
4510 | #endif /* CONFIG_PCI */ | ||
4511 | break; | ||
4512 | |||
4513 | default: | ||
4514 | ASC_PRINT1("advansys_detect: unknown bus type: %d\n", | ||
4515 | asc_bus[bus]); | ||
4516 | break; | ||
4517 | } | ||
4518 | ASC_DBG1(1, "advansys_detect: iop 0x%x\n", iop); | ||
4519 | |||
4520 | /* | ||
4521 | * Adapter not found, try next bus type. | ||
4522 | */ | ||
4523 | if (iop == 0) { | ||
4524 | break; | ||
4525 | } | ||
4526 | |||
4527 | /* | ||
4528 | * Adapter found. | ||
4529 | * | ||
4530 | * Register the adapter, get its configuration, and | ||
4531 | * initialize it. | ||
4532 | */ | ||
4533 | ASC_DBG(2, "advansys_detect: scsi_register()\n"); | ||
4534 | shp = scsi_register(tpnt, sizeof(asc_board_t)); | ||
4535 | |||
4536 | if (shp == NULL) { | ||
4537 | continue; | ||
4538 | } | ||
4539 | |||
4540 | /* Save a pointer to the Scsi_Host of each board found. */ | ||
4541 | asc_host[asc_board_count++] = shp; | ||
4542 | |||
4543 | /* Initialize private per board data */ | ||
4544 | boardp = ASC_BOARDP(shp); | ||
4545 | memset(boardp, 0, sizeof(asc_board_t)); | ||
4546 | boardp->id = asc_board_count - 1; | ||
4547 | |||
4548 | /* Initialize spinlock. */ | ||
4549 | spin_lock_init(&boardp->lock); | ||
4550 | |||
4551 | /* | ||
4552 | * Handle both narrow and wide boards. | ||
4553 | * | ||
4554 | * If a Wide board was detected, set the board structure | ||
4555 | * wide board flag. Set-up the board structure based on | ||
4556 | * the board type. | ||
4557 | */ | ||
4558 | #ifdef CONFIG_PCI | ||
4559 | if (asc_bus[bus] == ASC_IS_PCI && | ||
4560 | (pci_devp->device == PCI_DEVICE_ID_ASP_ABP940UW || | ||
4561 | pci_devp->device == PCI_DEVICE_ID_38C0800_REV1 || | ||
4562 | pci_devp->device == PCI_DEVICE_ID_38C1600_REV1)) | ||
4563 | { | ||
4564 | boardp->flags |= ASC_IS_WIDE_BOARD; | ||
4565 | } | ||
4566 | #endif /* CONFIG_PCI */ | ||
4567 | |||
4568 | if (ASC_NARROW_BOARD(boardp)) { | ||
4569 | ASC_DBG(1, "advansys_detect: narrow board\n"); | ||
4570 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; | ||
4571 | asc_dvc_varp->bus_type = asc_bus[bus]; | ||
4572 | asc_dvc_varp->drv_ptr = boardp; | ||
4573 | asc_dvc_varp->cfg = &boardp->dvc_cfg.asc_dvc_cfg; | ||
4574 | asc_dvc_varp->cfg->overrun_buf = &overrun_buf[0]; | ||
4575 | asc_dvc_varp->iop_base = iop; | ||
4576 | asc_dvc_varp->isr_callback = asc_isr_callback; | ||
4577 | } else { | ||
4578 | ASC_DBG(1, "advansys_detect: wide board\n"); | ||
4579 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; | ||
4580 | adv_dvc_varp->drv_ptr = boardp; | ||
4581 | adv_dvc_varp->cfg = &boardp->dvc_cfg.adv_dvc_cfg; | ||
4582 | adv_dvc_varp->isr_callback = adv_isr_callback; | ||
4583 | adv_dvc_varp->async_callback = adv_async_callback; | ||
4584 | #ifdef CONFIG_PCI | ||
4585 | if (pci_devp->device == PCI_DEVICE_ID_ASP_ABP940UW) | ||
4586 | { | ||
4587 | ASC_DBG(1, "advansys_detect: ASC-3550\n"); | ||
4588 | adv_dvc_varp->chip_type = ADV_CHIP_ASC3550; | ||
4589 | } else if (pci_devp->device == PCI_DEVICE_ID_38C0800_REV1) | ||
4590 | { | ||
4591 | ASC_DBG(1, "advansys_detect: ASC-38C0800\n"); | ||
4592 | adv_dvc_varp->chip_type = ADV_CHIP_ASC38C0800; | ||
4593 | } else | ||
4594 | { | ||
4595 | ASC_DBG(1, "advansys_detect: ASC-38C1600\n"); | ||
4596 | adv_dvc_varp->chip_type = ADV_CHIP_ASC38C1600; | ||
4597 | } | ||
4598 | #endif /* CONFIG_PCI */ | ||
4599 | |||
4600 | /* | ||
4601 | * Map the board's registers into virtual memory for | ||
4602 | * PCI slave access. Only memory accesses are used to | ||
4603 | * access the board's registers. | ||
4604 | * | ||
4605 | * Note: The PCI register base address is not always | ||
4606 | * page aligned, but the address passed to ioremap() | ||
4607 | * must be page aligned. It is guaranteed that the | ||
4608 | * PCI register base address will not cross a page | ||
4609 | * boundary. | ||
4610 | */ | ||
4611 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) | ||
4612 | { | ||
4613 | iolen = ADV_3550_IOLEN; | ||
4614 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) | ||
4615 | { | ||
4616 | iolen = ADV_38C0800_IOLEN; | ||
4617 | } else | ||
4618 | { | ||
4619 | iolen = ADV_38C1600_IOLEN; | ||
4620 | } | ||
4621 | #ifdef CONFIG_PCI | ||
4622 | pci_memory_address = pci_resource_start(pci_devp, 1); | ||
4623 | ASC_DBG1(1, "advansys_detect: pci_memory_address: 0x%lx\n", | ||
4624 | (ulong) pci_memory_address); | ||
4625 | if ((boardp->ioremap_addr = | ||
4626 | ioremap(pci_memory_address & PAGE_MASK, | ||
4627 | PAGE_SIZE)) == 0) { | ||
4628 | ASC_PRINT3( | ||
4629 | "advansys_detect: board %d: ioremap(%x, %d) returned NULL\n", | ||
4630 | boardp->id, pci_memory_address, iolen); | ||
4631 | scsi_unregister(shp); | ||
4632 | asc_board_count--; | ||
4633 | continue; | ||
4634 | } | ||
4635 | ASC_DBG1(1, "advansys_detect: ioremap_addr: 0x%lx\n", | ||
4636 | (ulong) boardp->ioremap_addr); | ||
4637 | adv_dvc_varp->iop_base = (AdvPortAddr) | ||
4638 | (boardp->ioremap_addr + | ||
4639 | (pci_memory_address - (pci_memory_address & PAGE_MASK))); | ||
4640 | ASC_DBG1(1, "advansys_detect: iop_base: 0x%lx\n", | ||
4641 | adv_dvc_varp->iop_base); | ||
4642 | #endif /* CONFIG_PCI */ | ||
4643 | |||
4644 | /* | ||
4645 | * Even though it isn't used to access wide boards, other | ||
4646 | * than for the debug line below, save I/O Port address so | ||
4647 | * that it can be reported. | ||
4648 | */ | ||
4649 | boardp->ioport = iop; | ||
4650 | |||
4651 | ASC_DBG2(1, | ||
4652 | "advansys_detect: iopb_chip_id_1 0x%x, iopw_chip_id_0 0x%x\n", | ||
4653 | (ushort) inp(iop + 1), (ushort) inpw(iop)); | ||
4654 | } | ||
4655 | |||
4656 | #ifdef CONFIG_PROC_FS | ||
4657 | /* | ||
4658 | * Allocate buffer for printing information from | ||
4659 | * /proc/scsi/advansys/[0...]. | ||
4660 | */ | ||
4661 | if ((boardp->prtbuf = | ||
4662 | kmalloc(ASC_PRTBUF_SIZE, GFP_ATOMIC)) == NULL) { | ||
4663 | ASC_PRINT3( | ||
4664 | "advansys_detect: board %d: kmalloc(%d, %d) returned NULL\n", | ||
4665 | boardp->id, ASC_PRTBUF_SIZE, GFP_ATOMIC); | ||
4666 | scsi_unregister(shp); | ||
4667 | asc_board_count--; | ||
4668 | continue; | ||
4669 | } | ||
4670 | #endif /* CONFIG_PROC_FS */ | ||
4671 | |||
4672 | if (ASC_NARROW_BOARD(boardp)) { | ||
4673 | asc_dvc_varp->cfg->dev = dev; | ||
4674 | /* | ||
4675 | * Set the board bus type and PCI IRQ before | ||
4676 | * calling AscInitGetConfig(). | ||
4677 | */ | ||
4678 | switch (asc_dvc_varp->bus_type) { | ||
4679 | #ifdef CONFIG_ISA | ||
4680 | case ASC_IS_ISA: | ||
4681 | shp->unchecked_isa_dma = TRUE; | ||
4682 | share_irq = FALSE; | ||
4683 | break; | ||
4684 | case ASC_IS_VL: | ||
4685 | shp->unchecked_isa_dma = FALSE; | ||
4686 | share_irq = FALSE; | ||
4687 | break; | ||
4688 | case ASC_IS_EISA: | ||
4689 | shp->unchecked_isa_dma = FALSE; | ||
4690 | share_irq = TRUE; | ||
4691 | break; | ||
4692 | #endif /* CONFIG_ISA */ | ||
4693 | #ifdef CONFIG_PCI | ||
4694 | case ASC_IS_PCI: | ||
4695 | shp->irq = asc_dvc_varp->irq_no = pci_devp->irq; | ||
4696 | asc_dvc_varp->cfg->pci_slot_info = | ||
4697 | ASC_PCI_MKID(pci_devp->bus->number, | ||
4698 | PCI_SLOT(pci_devp->devfn), | ||
4699 | PCI_FUNC(pci_devp->devfn)); | ||
4700 | shp->unchecked_isa_dma = FALSE; | ||
4701 | share_irq = TRUE; | ||
4702 | break; | ||
4703 | #endif /* CONFIG_PCI */ | ||
4704 | default: | ||
4705 | ASC_PRINT2( | ||
4706 | "advansys_detect: board %d: unknown adapter type: %d\n", | ||
4707 | boardp->id, asc_dvc_varp->bus_type); | ||
4708 | shp->unchecked_isa_dma = TRUE; | ||
4709 | share_irq = FALSE; | ||
4710 | break; | ||
4711 | } | ||
4712 | } else { | ||
4713 | adv_dvc_varp->cfg->dev = dev; | ||
4714 | /* | ||
4715 | * For Wide boards set PCI information before calling | ||
4716 | * AdvInitGetConfig(). | ||
4717 | */ | ||
4718 | #ifdef CONFIG_PCI | ||
4719 | shp->irq = adv_dvc_varp->irq_no = pci_devp->irq; | ||
4720 | adv_dvc_varp->cfg->pci_slot_info = | ||
4721 | ASC_PCI_MKID(pci_devp->bus->number, | ||
4722 | PCI_SLOT(pci_devp->devfn), | ||
4723 | PCI_FUNC(pci_devp->devfn)); | ||
4724 | shp->unchecked_isa_dma = FALSE; | ||
4725 | share_irq = TRUE; | ||
4726 | #endif /* CONFIG_PCI */ | ||
4727 | } | ||
4728 | |||
4729 | /* | ||
4730 | * Read the board configuration. | ||
4731 | */ | ||
4732 | if (ASC_NARROW_BOARD(boardp)) { | ||
4733 | /* | ||
4734 | * NOTE: AscInitGetConfig() may change the board's | ||
4735 | * bus_type value. The asc_bus[bus] value should no | ||
4736 | * longer be used. If the bus_type field must be | ||
4737 | * referenced only use the bit-wise AND operator "&". | ||
4738 | */ | ||
4739 | ASC_DBG(2, "advansys_detect: AscInitGetConfig()\n"); | ||
4740 | switch(ret = AscInitGetConfig(asc_dvc_varp)) { | ||
4741 | case 0: /* No error */ | ||
4742 | break; | ||
4743 | case ASC_WARN_IO_PORT_ROTATE: | ||
4744 | ASC_PRINT1( | ||
4745 | "AscInitGetConfig: board %d: I/O port address modified\n", | ||
4746 | boardp->id); | ||
4747 | break; | ||
4748 | case ASC_WARN_AUTO_CONFIG: | ||
4749 | ASC_PRINT1( | ||
4750 | "AscInitGetConfig: board %d: I/O port increment switch enabled\n", | ||
4751 | boardp->id); | ||
4752 | break; | ||
4753 | case ASC_WARN_EEPROM_CHKSUM: | ||
4754 | ASC_PRINT1( | ||
4755 | "AscInitGetConfig: board %d: EEPROM checksum error\n", | ||
4756 | boardp->id); | ||
4757 | break; | ||
4758 | case ASC_WARN_IRQ_MODIFIED: | ||
4759 | ASC_PRINT1( | ||
4760 | "AscInitGetConfig: board %d: IRQ modified\n", | ||
4761 | boardp->id); | ||
4762 | break; | ||
4763 | case ASC_WARN_CMD_QNG_CONFLICT: | ||
4764 | ASC_PRINT1( | ||
4765 | "AscInitGetConfig: board %d: tag queuing enabled w/o disconnects\n", | ||
4766 | boardp->id); | ||
4767 | break; | ||
4768 | default: | ||
4769 | ASC_PRINT2( | ||
4770 | "AscInitGetConfig: board %d: unknown warning: 0x%x\n", | ||
4771 | boardp->id, ret); | ||
4772 | break; | ||
4773 | } | ||
4774 | if ((err_code = asc_dvc_varp->err_code) != 0) { | ||
4775 | ASC_PRINT3( | ||
4776 | "AscInitGetConfig: board %d error: init_state 0x%x, err_code 0x%x\n", | ||
4777 | boardp->id, asc_dvc_varp->init_state, | ||
4778 | asc_dvc_varp->err_code); | ||
4779 | } | ||
4780 | } else { | ||
4781 | ASC_DBG(2, "advansys_detect: AdvInitGetConfig()\n"); | ||
4782 | if ((ret = AdvInitGetConfig(adv_dvc_varp)) != 0) { | ||
4783 | ASC_PRINT2("AdvInitGetConfig: board %d: warning: 0x%x\n", | ||
4784 | boardp->id, ret); | ||
4785 | } | ||
4786 | if ((err_code = adv_dvc_varp->err_code) != 0) { | ||
4787 | ASC_PRINT2( | ||
4788 | "AdvInitGetConfig: board %d error: err_code 0x%x\n", | ||
4789 | boardp->id, adv_dvc_varp->err_code); | ||
4790 | } | ||
4791 | } | ||
4792 | |||
4793 | if (err_code != 0) { | ||
4794 | #ifdef CONFIG_PROC_FS | ||
4795 | kfree(boardp->prtbuf); | ||
4796 | #endif /* CONFIG_PROC_FS */ | ||
4797 | scsi_unregister(shp); | ||
4798 | asc_board_count--; | ||
4799 | continue; | ||
4800 | } | ||
4801 | |||
4802 | /* | ||
4803 | * Save the EEPROM configuration so that it can be displayed | ||
4804 | * from /proc/scsi/advansys/[0...]. | ||
4805 | */ | ||
4806 | if (ASC_NARROW_BOARD(boardp)) { | ||
4807 | |||
4808 | ASCEEP_CONFIG *ep; | ||
4809 | |||
4810 | /* | ||
4811 | * Set the adapter's target id bit in the 'init_tidmask' field. | ||
4812 | */ | ||
4813 | boardp->init_tidmask |= | ||
4814 | ADV_TID_TO_TIDMASK(asc_dvc_varp->cfg->chip_scsi_id); | ||
4815 | |||
4816 | /* | ||
4817 | * Save EEPROM settings for the board. | ||
4818 | */ | ||
4819 | ep = &boardp->eep_config.asc_eep; | ||
4820 | |||
4821 | ep->init_sdtr = asc_dvc_varp->cfg->sdtr_enable; | ||
4822 | ep->disc_enable = asc_dvc_varp->cfg->disc_enable; | ||
4823 | ep->use_cmd_qng = asc_dvc_varp->cfg->cmd_qng_enabled; | ||
4824 | ASC_EEP_SET_DMA_SPD(ep, asc_dvc_varp->cfg->isa_dma_speed); | ||
4825 | ep->start_motor = asc_dvc_varp->start_motor; | ||
4826 | ep->cntl = asc_dvc_varp->dvc_cntl; | ||
4827 | ep->no_scam = asc_dvc_varp->no_scam; | ||
4828 | ep->max_total_qng = asc_dvc_varp->max_total_qng; | ||
4829 | ASC_EEP_SET_CHIP_ID(ep, asc_dvc_varp->cfg->chip_scsi_id); | ||
4830 | /* 'max_tag_qng' is set to the same value for every device. */ | ||
4831 | ep->max_tag_qng = asc_dvc_varp->cfg->max_tag_qng[0]; | ||
4832 | ep->adapter_info[0] = asc_dvc_varp->cfg->adapter_info[0]; | ||
4833 | ep->adapter_info[1] = asc_dvc_varp->cfg->adapter_info[1]; | ||
4834 | ep->adapter_info[2] = asc_dvc_varp->cfg->adapter_info[2]; | ||
4835 | ep->adapter_info[3] = asc_dvc_varp->cfg->adapter_info[3]; | ||
4836 | ep->adapter_info[4] = asc_dvc_varp->cfg->adapter_info[4]; | ||
4837 | ep->adapter_info[5] = asc_dvc_varp->cfg->adapter_info[5]; | ||
4838 | |||
4839 | /* | ||
4840 | * Modify board configuration. | ||
4841 | */ | ||
4842 | ASC_DBG(2, "advansys_detect: AscInitSetConfig()\n"); | ||
4843 | switch (ret = AscInitSetConfig(asc_dvc_varp)) { | ||
4844 | case 0: /* No error. */ | ||
4845 | break; | ||
4846 | case ASC_WARN_IO_PORT_ROTATE: | ||
4847 | ASC_PRINT1( | ||
4848 | "AscInitSetConfig: board %d: I/O port address modified\n", | ||
4849 | boardp->id); | ||
4850 | break; | ||
4851 | case ASC_WARN_AUTO_CONFIG: | ||
4852 | ASC_PRINT1( | ||
4853 | "AscInitSetConfig: board %d: I/O port increment switch enabled\n", | ||
4854 | boardp->id); | ||
4855 | break; | ||
4856 | case ASC_WARN_EEPROM_CHKSUM: | ||
4857 | ASC_PRINT1( | ||
4858 | "AscInitSetConfig: board %d: EEPROM checksum error\n", | ||
4859 | boardp->id); | ||
4860 | break; | ||
4861 | case ASC_WARN_IRQ_MODIFIED: | ||
4862 | ASC_PRINT1( | ||
4863 | "AscInitSetConfig: board %d: IRQ modified\n", | ||
4864 | boardp->id); | ||
4865 | break; | ||
4866 | case ASC_WARN_CMD_QNG_CONFLICT: | ||
4867 | ASC_PRINT1( | ||
4868 | "AscInitSetConfig: board %d: tag queuing w/o disconnects\n", | ||
4869 | boardp->id); | ||
4870 | break; | ||
4871 | default: | ||
4872 | ASC_PRINT2( | ||
4873 | "AscInitSetConfig: board %d: unknown warning: 0x%x\n", | ||
4874 | boardp->id, ret); | ||
4875 | break; | ||
4876 | } | ||
4877 | if (asc_dvc_varp->err_code != 0) { | ||
4878 | ASC_PRINT3( | ||
4879 | "AscInitSetConfig: board %d error: init_state 0x%x, err_code 0x%x\n", | ||
4880 | boardp->id, asc_dvc_varp->init_state, | ||
4881 | asc_dvc_varp->err_code); | ||
4882 | #ifdef CONFIG_PROC_FS | ||
4883 | kfree(boardp->prtbuf); | ||
4884 | #endif /* CONFIG_PROC_FS */ | ||
4885 | scsi_unregister(shp); | ||
4886 | asc_board_count--; | ||
4887 | continue; | ||
4888 | } | ||
4889 | |||
4890 | /* | ||
4891 | * Finish initializing the 'Scsi_Host' structure. | ||
4892 | */ | ||
4893 | /* AscInitSetConfig() will set the IRQ for non-PCI boards. */ | ||
4894 | if ((asc_dvc_varp->bus_type & ASC_IS_PCI) == 0) { | ||
4895 | shp->irq = asc_dvc_varp->irq_no; | ||
4896 | } | ||
4897 | } else { | ||
4898 | ADVEEP_3550_CONFIG *ep_3550; | ||
4899 | ADVEEP_38C0800_CONFIG *ep_38C0800; | ||
4900 | ADVEEP_38C1600_CONFIG *ep_38C1600; | ||
4901 | |||
4902 | /* | ||
4903 | * Save Wide EEP Configuration Information. | ||
4904 | */ | ||
4905 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) | ||
4906 | { | ||
4907 | ep_3550 = &boardp->eep_config.adv_3550_eep; | ||
4908 | |||
4909 | ep_3550->adapter_scsi_id = adv_dvc_varp->chip_scsi_id; | ||
4910 | ep_3550->max_host_qng = adv_dvc_varp->max_host_qng; | ||
4911 | ep_3550->max_dvc_qng = adv_dvc_varp->max_dvc_qng; | ||
4912 | ep_3550->termination = adv_dvc_varp->cfg->termination; | ||
4913 | ep_3550->disc_enable = adv_dvc_varp->cfg->disc_enable; | ||
4914 | ep_3550->bios_ctrl = adv_dvc_varp->bios_ctrl; | ||
4915 | ep_3550->wdtr_able = adv_dvc_varp->wdtr_able; | ||
4916 | ep_3550->sdtr_able = adv_dvc_varp->sdtr_able; | ||
4917 | ep_3550->ultra_able = adv_dvc_varp->ultra_able; | ||
4918 | ep_3550->tagqng_able = adv_dvc_varp->tagqng_able; | ||
4919 | ep_3550->start_motor = adv_dvc_varp->start_motor; | ||
4920 | ep_3550->scsi_reset_delay = adv_dvc_varp->scsi_reset_wait; | ||
4921 | ep_3550->serial_number_word1 = | ||
4922 | adv_dvc_varp->cfg->serial1; | ||
4923 | ep_3550->serial_number_word2 = | ||
4924 | adv_dvc_varp->cfg->serial2; | ||
4925 | ep_3550->serial_number_word3 = | ||
4926 | adv_dvc_varp->cfg->serial3; | ||
4927 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) | ||
4928 | { | ||
4929 | ep_38C0800 = &boardp->eep_config.adv_38C0800_eep; | ||
4930 | |||
4931 | ep_38C0800->adapter_scsi_id = adv_dvc_varp->chip_scsi_id; | ||
4932 | ep_38C0800->max_host_qng = adv_dvc_varp->max_host_qng; | ||
4933 | ep_38C0800->max_dvc_qng = adv_dvc_varp->max_dvc_qng; | ||
4934 | ep_38C0800->termination_lvd = | ||
4935 | adv_dvc_varp->cfg->termination; | ||
4936 | ep_38C0800->disc_enable = adv_dvc_varp->cfg->disc_enable; | ||
4937 | ep_38C0800->bios_ctrl = adv_dvc_varp->bios_ctrl; | ||
4938 | ep_38C0800->wdtr_able = adv_dvc_varp->wdtr_able; | ||
4939 | ep_38C0800->tagqng_able = adv_dvc_varp->tagqng_able; | ||
4940 | ep_38C0800->sdtr_speed1 = adv_dvc_varp->sdtr_speed1; | ||
4941 | ep_38C0800->sdtr_speed2 = adv_dvc_varp->sdtr_speed2; | ||
4942 | ep_38C0800->sdtr_speed3 = adv_dvc_varp->sdtr_speed3; | ||
4943 | ep_38C0800->sdtr_speed4 = adv_dvc_varp->sdtr_speed4; | ||
4944 | ep_38C0800->tagqng_able = adv_dvc_varp->tagqng_able; | ||
4945 | ep_38C0800->start_motor = adv_dvc_varp->start_motor; | ||
4946 | ep_38C0800->scsi_reset_delay = | ||
4947 | adv_dvc_varp->scsi_reset_wait; | ||
4948 | ep_38C0800->serial_number_word1 = | ||
4949 | adv_dvc_varp->cfg->serial1; | ||
4950 | ep_38C0800->serial_number_word2 = | ||
4951 | adv_dvc_varp->cfg->serial2; | ||
4952 | ep_38C0800->serial_number_word3 = | ||
4953 | adv_dvc_varp->cfg->serial3; | ||
4954 | } else | ||
4955 | { | ||
4956 | ep_38C1600 = &boardp->eep_config.adv_38C1600_eep; | ||
4957 | |||
4958 | ep_38C1600->adapter_scsi_id = adv_dvc_varp->chip_scsi_id; | ||
4959 | ep_38C1600->max_host_qng = adv_dvc_varp->max_host_qng; | ||
4960 | ep_38C1600->max_dvc_qng = adv_dvc_varp->max_dvc_qng; | ||
4961 | ep_38C1600->termination_lvd = | ||
4962 | adv_dvc_varp->cfg->termination; | ||
4963 | ep_38C1600->disc_enable = adv_dvc_varp->cfg->disc_enable; | ||
4964 | ep_38C1600->bios_ctrl = adv_dvc_varp->bios_ctrl; | ||
4965 | ep_38C1600->wdtr_able = adv_dvc_varp->wdtr_able; | ||
4966 | ep_38C1600->tagqng_able = adv_dvc_varp->tagqng_able; | ||
4967 | ep_38C1600->sdtr_speed1 = adv_dvc_varp->sdtr_speed1; | ||
4968 | ep_38C1600->sdtr_speed2 = adv_dvc_varp->sdtr_speed2; | ||
4969 | ep_38C1600->sdtr_speed3 = adv_dvc_varp->sdtr_speed3; | ||
4970 | ep_38C1600->sdtr_speed4 = adv_dvc_varp->sdtr_speed4; | ||
4971 | ep_38C1600->tagqng_able = adv_dvc_varp->tagqng_able; | ||
4972 | ep_38C1600->start_motor = adv_dvc_varp->start_motor; | ||
4973 | ep_38C1600->scsi_reset_delay = | ||
4974 | adv_dvc_varp->scsi_reset_wait; | ||
4975 | ep_38C1600->serial_number_word1 = | ||
4976 | adv_dvc_varp->cfg->serial1; | ||
4977 | ep_38C1600->serial_number_word2 = | ||
4978 | adv_dvc_varp->cfg->serial2; | ||
4979 | ep_38C1600->serial_number_word3 = | ||
4980 | adv_dvc_varp->cfg->serial3; | ||
4981 | } | ||
4982 | |||
4983 | /* | ||
4984 | * Set the adapter's target id bit in the 'init_tidmask' field. | ||
4985 | */ | ||
4986 | boardp->init_tidmask |= | ||
4987 | ADV_TID_TO_TIDMASK(adv_dvc_varp->chip_scsi_id); | ||
4988 | |||
4989 | /* | ||
4990 | * Finish initializing the 'Scsi_Host' structure. | ||
4991 | */ | ||
4992 | shp->irq = adv_dvc_varp->irq_no; | ||
4993 | } | ||
4994 | |||
4995 | /* | ||
4996 | * Channels are numbered beginning with 0. For AdvanSys one host | ||
4997 | * structure supports one channel. Multi-channel boards have a | ||
4998 | * separate host structure for each channel. | ||
4999 | */ | ||
5000 | shp->max_channel = 0; | ||
5001 | if (ASC_NARROW_BOARD(boardp)) { | ||
5002 | shp->max_id = ASC_MAX_TID + 1; | ||
5003 | shp->max_lun = ASC_MAX_LUN + 1; | ||
5004 | |||
5005 | shp->io_port = asc_dvc_varp->iop_base; | ||
5006 | boardp->asc_n_io_port = ASC_IOADR_GAP; | ||
5007 | shp->this_id = asc_dvc_varp->cfg->chip_scsi_id; | ||
5008 | |||
5009 | /* Set maximum number of queues the adapter can handle. */ | ||
5010 | shp->can_queue = asc_dvc_varp->max_total_qng; | ||
5011 | } else { | ||
5012 | shp->max_id = ADV_MAX_TID + 1; | ||
5013 | shp->max_lun = ADV_MAX_LUN + 1; | ||
5014 | |||
5015 | /* | ||
5016 | * Save the I/O Port address and length even though | ||
5017 | * I/O ports are not used to access Wide boards. | ||
5018 | * Instead the Wide boards are accessed with | ||
5019 | * PCI Memory Mapped I/O. | ||
5020 | */ | ||
5021 | shp->io_port = iop; | ||
5022 | boardp->asc_n_io_port = iolen; | ||
5023 | |||
5024 | shp->this_id = adv_dvc_varp->chip_scsi_id; | ||
5025 | |||
5026 | /* Set maximum number of queues the adapter can handle. */ | ||
5027 | shp->can_queue = adv_dvc_varp->max_host_qng; | ||
5028 | } | ||
5029 | |||
5030 | /* | ||
5031 | * 'n_io_port' currently is one byte. | ||
5032 | * | ||
5033 | * Set a value to 'n_io_port', but never referenced it because | ||
5034 | * it may be truncated. | ||
5035 | */ | ||
5036 | shp->n_io_port = boardp->asc_n_io_port <= 255 ? | ||
5037 | boardp->asc_n_io_port : 255; | ||
5038 | |||
5039 | /* | ||
5040 | * Following v1.3.89, 'cmd_per_lun' is no longer needed | ||
5041 | * and should be set to zero. | ||
5042 | * | ||
5043 | * But because of a bug introduced in v1.3.89 if the driver is | ||
5044 | * compiled as a module and 'cmd_per_lun' is zero, the Mid-Level | ||
5045 | * SCSI function 'allocate_device' will panic. To allow the driver | ||
5046 | * to work as a module in these kernels set 'cmd_per_lun' to 1. | ||
5047 | * | ||
5048 | * Note: This is wrong. cmd_per_lun should be set to the depth | ||
5049 | * you want on untagged devices always. | ||
5050 | #ifdef MODULE | ||
5051 | */ | ||
5052 | shp->cmd_per_lun = 1; | ||
5053 | /* #else | ||
5054 | shp->cmd_per_lun = 0; | ||
5055 | #endif */ | ||
5056 | |||
5057 | /* | ||
5058 | * Set the maximum number of scatter-gather elements the | ||
5059 | * adapter can handle. | ||
5060 | */ | ||
5061 | if (ASC_NARROW_BOARD(boardp)) { | ||
5062 | /* | ||
5063 | * Allow two commands with 'sg_tablesize' scatter-gather | ||
5064 | * elements to be executed simultaneously. This value is | ||
5065 | * the theoretical hardware limit. It may be decreased | ||
5066 | * below. | ||
5067 | */ | ||
5068 | shp->sg_tablesize = | ||
5069 | (((asc_dvc_varp->max_total_qng - 2) / 2) * | ||
5070 | ASC_SG_LIST_PER_Q) + 1; | ||
5071 | } else { | ||
5072 | shp->sg_tablesize = ADV_MAX_SG_LIST; | ||
5073 | } | ||
5074 | |||
5075 | /* | ||
5076 | * The value of 'sg_tablesize' can not exceed the SCSI | ||
5077 | * mid-level driver definition of SG_ALL. SG_ALL also | ||
5078 | * must not be exceeded, because it is used to define the | ||
5079 | * size of the scatter-gather table in 'struct asc_sg_head'. | ||
5080 | */ | ||
5081 | if (shp->sg_tablesize > SG_ALL) { | ||
5082 | shp->sg_tablesize = SG_ALL; | ||
5083 | } | ||
5084 | |||
5085 | ASC_DBG1(1, "advansys_detect: sg_tablesize: %d\n", | ||
5086 | shp->sg_tablesize); | ||
5087 | |||
5088 | /* BIOS start address. */ | ||
5089 | if (ASC_NARROW_BOARD(boardp)) { | ||
5090 | shp->base = | ||
5091 | ((ulong) AscGetChipBiosAddress( | ||
5092 | asc_dvc_varp->iop_base, | ||
5093 | asc_dvc_varp->bus_type)); | ||
5094 | } else { | ||
5095 | /* | ||
5096 | * Fill-in BIOS board variables. The Wide BIOS saves | ||
5097 | * information in LRAM that is used by the driver. | ||
5098 | */ | ||
5099 | AdvReadWordLram(adv_dvc_varp->iop_base, BIOS_SIGNATURE, | ||
5100 | boardp->bios_signature); | ||
5101 | AdvReadWordLram(adv_dvc_varp->iop_base, BIOS_VERSION, | ||
5102 | boardp->bios_version); | ||
5103 | AdvReadWordLram(adv_dvc_varp->iop_base, BIOS_CODESEG, | ||
5104 | boardp->bios_codeseg); | ||
5105 | AdvReadWordLram(adv_dvc_varp->iop_base, BIOS_CODELEN, | ||
5106 | boardp->bios_codelen); | ||
5107 | |||
5108 | ASC_DBG2(1, | ||
5109 | "advansys_detect: bios_signature 0x%x, bios_version 0x%x\n", | ||
5110 | boardp->bios_signature, boardp->bios_version); | ||
5111 | |||
5112 | ASC_DBG2(1, | ||
5113 | "advansys_detect: bios_codeseg 0x%x, bios_codelen 0x%x\n", | ||
5114 | boardp->bios_codeseg, boardp->bios_codelen); | ||
5115 | |||
5116 | /* | ||
5117 | * If the BIOS saved a valid signature, then fill in | ||
5118 | * the BIOS code segment base address. | ||
5119 | */ | ||
5120 | if (boardp->bios_signature == 0x55AA) { | ||
5121 | /* | ||
5122 | * Convert x86 realmode code segment to a linear | ||
5123 | * address by shifting left 4. | ||
5124 | */ | ||
5125 | shp->base = ((ulong) boardp->bios_codeseg << 4); | ||
5126 | } else { | ||
5127 | shp->base = 0; | ||
5128 | } | ||
5129 | } | ||
5130 | |||
5131 | /* | ||
5132 | * Register Board Resources - I/O Port, DMA, IRQ | ||
5133 | */ | ||
5134 | |||
5135 | /* | ||
5136 | * Register I/O port range. | ||
5137 | * | ||
5138 | * For Wide boards the I/O ports are not used to access | ||
5139 | * the board, but request the region anyway. | ||
5140 | * | ||
5141 | * 'shp->n_io_port' is not referenced, because it may be truncated. | ||
5142 | */ | ||
5143 | ASC_DBG2(2, | ||
5144 | "advansys_detect: request_region port 0x%lx, len 0x%x\n", | ||
5145 | (ulong) shp->io_port, boardp->asc_n_io_port); | ||
5146 | if (request_region(shp->io_port, boardp->asc_n_io_port, | ||
5147 | "advansys") == NULL) { | ||
5148 | ASC_PRINT3( | ||
5149 | "advansys_detect: board %d: request_region() failed, port 0x%lx, len 0x%x\n", | ||
5150 | boardp->id, (ulong) shp->io_port, boardp->asc_n_io_port); | ||
5151 | #ifdef CONFIG_PROC_FS | ||
5152 | kfree(boardp->prtbuf); | ||
5153 | #endif /* CONFIG_PROC_FS */ | ||
5154 | scsi_unregister(shp); | ||
5155 | asc_board_count--; | ||
5156 | continue; | ||
5157 | } | ||
5158 | |||
5159 | /* Register DMA Channel for Narrow boards. */ | ||
5160 | shp->dma_channel = NO_ISA_DMA; /* Default to no ISA DMA. */ | ||
5161 | #ifdef CONFIG_ISA | ||
5162 | if (ASC_NARROW_BOARD(boardp)) { | ||
5163 | /* Register DMA channel for ISA bus. */ | ||
5164 | if (asc_dvc_varp->bus_type & ASC_IS_ISA) { | ||
5165 | shp->dma_channel = asc_dvc_varp->cfg->isa_dma_channel; | ||
5166 | if ((ret = | ||
5167 | request_dma(shp->dma_channel, "advansys")) != 0) { | ||
5168 | ASC_PRINT3( | ||
5169 | "advansys_detect: board %d: request_dma() %d failed %d\n", | ||
5170 | boardp->id, shp->dma_channel, ret); | ||
5171 | release_region(shp->io_port, boardp->asc_n_io_port); | ||
5172 | #ifdef CONFIG_PROC_FS | ||
5173 | kfree(boardp->prtbuf); | ||
5174 | #endif /* CONFIG_PROC_FS */ | ||
5175 | scsi_unregister(shp); | ||
5176 | asc_board_count--; | ||
5177 | continue; | ||
5178 | } | ||
5179 | AscEnableIsaDma(shp->dma_channel); | ||
5180 | } | ||
5181 | } | ||
5182 | #endif /* CONFIG_ISA */ | ||
5183 | 4235 | ||
5184 | /* Register IRQ Number. */ | 4236 | ASC_DBG1(1, "advansys_proc_info: totcnt %d\n", totcnt); |
5185 | ASC_DBG1(2, "advansys_detect: request_irq() %d\n", shp->irq); | ||
5186 | /* | ||
5187 | * If request_irq() fails with the IRQF_DISABLED flag set, | ||
5188 | * then try again without the IRQF_DISABLED flag set. This | ||
5189 | * allows IRQ sharing to work even with other drivers that | ||
5190 | * do not set the IRQF_DISABLED flag. | ||
5191 | * | ||
5192 | * If IRQF_DISABLED is not set, then interrupts are enabled | ||
5193 | * before the driver interrupt function is called. | ||
5194 | */ | ||
5195 | if (((ret = request_irq(shp->irq, advansys_interrupt, | ||
5196 | IRQF_DISABLED | (share_irq == TRUE ? IRQF_SHARED : 0), | ||
5197 | "advansys", boardp)) != 0) && | ||
5198 | ((ret = request_irq(shp->irq, advansys_interrupt, | ||
5199 | (share_irq == TRUE ? IRQF_SHARED : 0), | ||
5200 | "advansys", boardp)) != 0)) | ||
5201 | { | ||
5202 | if (ret == -EBUSY) { | ||
5203 | ASC_PRINT2( | ||
5204 | "advansys_detect: board %d: request_irq(): IRQ 0x%x already in use.\n", | ||
5205 | boardp->id, shp->irq); | ||
5206 | } else if (ret == -EINVAL) { | ||
5207 | ASC_PRINT2( | ||
5208 | "advansys_detect: board %d: request_irq(): IRQ 0x%x not valid.\n", | ||
5209 | boardp->id, shp->irq); | ||
5210 | } else { | ||
5211 | ASC_PRINT3( | ||
5212 | "advansys_detect: board %d: request_irq(): IRQ 0x%x failed with %d\n", | ||
5213 | boardp->id, shp->irq, ret); | ||
5214 | } | ||
5215 | release_region(shp->io_port, boardp->asc_n_io_port); | ||
5216 | iounmap(boardp->ioremap_addr); | ||
5217 | if (shp->dma_channel != NO_ISA_DMA) { | ||
5218 | free_dma(shp->dma_channel); | ||
5219 | } | ||
5220 | #ifdef CONFIG_PROC_FS | ||
5221 | kfree(boardp->prtbuf); | ||
5222 | #endif /* CONFIG_PROC_FS */ | ||
5223 | scsi_unregister(shp); | ||
5224 | asc_board_count--; | ||
5225 | continue; | ||
5226 | } | ||
5227 | |||
5228 | /* | ||
5229 | * Initialize board RISC chip and enable interrupts. | ||
5230 | */ | ||
5231 | if (ASC_NARROW_BOARD(boardp)) { | ||
5232 | ASC_DBG(2, "advansys_detect: AscInitAsc1000Driver()\n"); | ||
5233 | warn_code = AscInitAsc1000Driver(asc_dvc_varp); | ||
5234 | err_code = asc_dvc_varp->err_code; | ||
5235 | |||
5236 | if (warn_code || err_code) { | ||
5237 | ASC_PRINT4( | ||
5238 | "advansys_detect: board %d error: init_state 0x%x, warn 0x%x, error 0x%x\n", | ||
5239 | boardp->id, asc_dvc_varp->init_state, | ||
5240 | warn_code, err_code); | ||
5241 | } | ||
5242 | } else { | ||
5243 | ADV_CARR_T *carrp; | ||
5244 | int req_cnt = 0; | ||
5245 | adv_req_t *reqp = NULL; | ||
5246 | int sg_cnt = 0; | ||
5247 | |||
5248 | /* | ||
5249 | * Allocate buffer carrier structures. The total size | ||
5250 | * is about 4 KB, so allocate all at once. | ||
5251 | */ | ||
5252 | carrp = | ||
5253 | (ADV_CARR_T *) kmalloc(ADV_CARRIER_BUFSIZE, GFP_ATOMIC); | ||
5254 | ASC_DBG1(1, "advansys_detect: carrp 0x%lx\n", (ulong) carrp); | ||
5255 | |||
5256 | if (carrp == NULL) { | ||
5257 | goto kmalloc_error; | ||
5258 | } | ||
5259 | |||
5260 | /* | ||
5261 | * Allocate up to 'max_host_qng' request structures for | ||
5262 | * the Wide board. The total size is about 16 KB, so | ||
5263 | * allocate all at once. If the allocation fails decrement | ||
5264 | * and try again. | ||
5265 | */ | ||
5266 | for (req_cnt = adv_dvc_varp->max_host_qng; | ||
5267 | req_cnt > 0; req_cnt--) { | ||
5268 | |||
5269 | reqp = (adv_req_t *) | ||
5270 | kmalloc(sizeof(adv_req_t) * req_cnt, GFP_ATOMIC); | ||
5271 | |||
5272 | ASC_DBG3(1, | ||
5273 | "advansys_detect: reqp 0x%lx, req_cnt %d, bytes %lu\n", | ||
5274 | (ulong) reqp, req_cnt, | ||
5275 | (ulong) sizeof(adv_req_t) * req_cnt); | ||
5276 | |||
5277 | if (reqp != NULL) { | ||
5278 | break; | ||
5279 | } | ||
5280 | } | ||
5281 | if (reqp == NULL) | ||
5282 | { | ||
5283 | goto kmalloc_error; | ||
5284 | } | ||
5285 | |||
5286 | /* | ||
5287 | * Allocate up to ADV_TOT_SG_BLOCK request structures for | ||
5288 | * the Wide board. Each structure is about 136 bytes. | ||
5289 | */ | ||
5290 | boardp->adv_sgblkp = NULL; | ||
5291 | for (sg_cnt = 0; sg_cnt < ADV_TOT_SG_BLOCK; sg_cnt++) { | ||
5292 | |||
5293 | sgp = (adv_sgblk_t *) | ||
5294 | kmalloc(sizeof(adv_sgblk_t), GFP_ATOMIC); | ||
5295 | |||
5296 | if (sgp == NULL) { | ||
5297 | break; | ||
5298 | } | ||
5299 | |||
5300 | sgp->next_sgblkp = boardp->adv_sgblkp; | ||
5301 | boardp->adv_sgblkp = sgp; | ||
5302 | |||
5303 | } | ||
5304 | ASC_DBG3(1, | ||
5305 | "advansys_detect: sg_cnt %d * %u = %u bytes\n", | ||
5306 | sg_cnt, sizeof(adv_sgblk_t), | ||
5307 | (unsigned) (sizeof(adv_sgblk_t) * sg_cnt)); | ||
5308 | |||
5309 | /* | ||
5310 | * If no request structures or scatter-gather structures could | ||
5311 | * be allocated, then return an error. Otherwise continue with | ||
5312 | * initialization. | ||
5313 | */ | ||
5314 | kmalloc_error: | ||
5315 | if (carrp == NULL) | ||
5316 | { | ||
5317 | ASC_PRINT1( | ||
5318 | "advansys_detect: board %d error: failed to kmalloc() carrier buffer.\n", | ||
5319 | boardp->id); | ||
5320 | err_code = ADV_ERROR; | ||
5321 | } else if (reqp == NULL) { | ||
5322 | kfree(carrp); | ||
5323 | ASC_PRINT1( | ||
5324 | "advansys_detect: board %d error: failed to kmalloc() adv_req_t buffer.\n", | ||
5325 | boardp->id); | ||
5326 | err_code = ADV_ERROR; | ||
5327 | } else if (boardp->adv_sgblkp == NULL) { | ||
5328 | kfree(carrp); | ||
5329 | kfree(reqp); | ||
5330 | ASC_PRINT1( | ||
5331 | "advansys_detect: board %d error: failed to kmalloc() adv_sgblk_t buffers.\n", | ||
5332 | boardp->id); | ||
5333 | err_code = ADV_ERROR; | ||
5334 | } else { | ||
5335 | |||
5336 | /* Save carrier buffer pointer. */ | ||
5337 | boardp->orig_carrp = carrp; | ||
5338 | |||
5339 | /* | ||
5340 | * Save original pointer for kfree() in case the | ||
5341 | * driver is built as a module and can be unloaded. | ||
5342 | */ | ||
5343 | boardp->orig_reqp = reqp; | ||
5344 | |||
5345 | adv_dvc_varp->carrier_buf = carrp; | ||
5346 | |||
5347 | /* | ||
5348 | * Point 'adv_reqp' to the request structures and | ||
5349 | * link them together. | ||
5350 | */ | ||
5351 | req_cnt--; | ||
5352 | reqp[req_cnt].next_reqp = NULL; | ||
5353 | for (; req_cnt > 0; req_cnt--) { | ||
5354 | reqp[req_cnt - 1].next_reqp = &reqp[req_cnt]; | ||
5355 | } | ||
5356 | boardp->adv_reqp = &reqp[0]; | ||
5357 | |||
5358 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) | ||
5359 | { | ||
5360 | ASC_DBG(2, | ||
5361 | "advansys_detect: AdvInitAsc3550Driver()\n"); | ||
5362 | warn_code = AdvInitAsc3550Driver(adv_dvc_varp); | ||
5363 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { | ||
5364 | ASC_DBG(2, | ||
5365 | "advansys_detect: AdvInitAsc38C0800Driver()\n"); | ||
5366 | warn_code = AdvInitAsc38C0800Driver(adv_dvc_varp); | ||
5367 | } else { | ||
5368 | ASC_DBG(2, | ||
5369 | "advansys_detect: AdvInitAsc38C1600Driver()\n"); | ||
5370 | warn_code = AdvInitAsc38C1600Driver(adv_dvc_varp); | ||
5371 | } | ||
5372 | err_code = adv_dvc_varp->err_code; | ||
5373 | |||
5374 | if (warn_code || err_code) { | ||
5375 | ASC_PRINT3( | ||
5376 | "advansys_detect: board %d error: warn 0x%x, error 0x%x\n", | ||
5377 | boardp->id, warn_code, err_code); | ||
5378 | } | ||
5379 | } | ||
5380 | } | ||
5381 | |||
5382 | if (err_code != 0) { | ||
5383 | release_region(shp->io_port, boardp->asc_n_io_port); | ||
5384 | if (ASC_WIDE_BOARD(boardp)) { | ||
5385 | iounmap(boardp->ioremap_addr); | ||
5386 | kfree(boardp->orig_carrp); | ||
5387 | boardp->orig_carrp = NULL; | ||
5388 | if (boardp->orig_reqp) { | ||
5389 | kfree(boardp->orig_reqp); | ||
5390 | boardp->orig_reqp = boardp->adv_reqp = NULL; | ||
5391 | } | ||
5392 | while ((sgp = boardp->adv_sgblkp) != NULL) | ||
5393 | { | ||
5394 | boardp->adv_sgblkp = sgp->next_sgblkp; | ||
5395 | kfree(sgp); | ||
5396 | } | ||
5397 | } | ||
5398 | if (shp->dma_channel != NO_ISA_DMA) { | ||
5399 | free_dma(shp->dma_channel); | ||
5400 | } | ||
5401 | #ifdef CONFIG_PROC_FS | ||
5402 | kfree(boardp->prtbuf); | ||
5403 | #endif /* CONFIG_PROC_FS */ | ||
5404 | free_irq(shp->irq, boardp); | ||
5405 | scsi_unregister(shp); | ||
5406 | asc_board_count--; | ||
5407 | continue; | ||
5408 | } | ||
5409 | ASC_DBG_PRT_SCSI_HOST(2, shp); | ||
5410 | } | ||
5411 | } | ||
5412 | 4237 | ||
5413 | ASC_DBG1(1, "advansys_detect: done: asc_board_count %d\n", asc_board_count); | 4238 | return totcnt; |
5414 | return asc_board_count; | ||
5415 | } | 4239 | } |
5416 | |||
5417 | /* | ||
5418 | * advansys_release() | ||
5419 | * | ||
5420 | * Release resources allocated for a single AdvanSys adapter. | ||
5421 | */ | ||
5422 | static int | ||
5423 | advansys_release(struct Scsi_Host *shp) | ||
5424 | { | ||
5425 | asc_board_t *boardp; | ||
5426 | |||
5427 | ASC_DBG(1, "advansys_release: begin\n"); | ||
5428 | boardp = ASC_BOARDP(shp); | ||
5429 | free_irq(shp->irq, boardp); | ||
5430 | if (shp->dma_channel != NO_ISA_DMA) { | ||
5431 | ASC_DBG(1, "advansys_release: free_dma()\n"); | ||
5432 | free_dma(shp->dma_channel); | ||
5433 | } | ||
5434 | release_region(shp->io_port, boardp->asc_n_io_port); | ||
5435 | if (ASC_WIDE_BOARD(boardp)) { | ||
5436 | adv_sgblk_t *sgp = NULL; | ||
5437 | |||
5438 | iounmap(boardp->ioremap_addr); | ||
5439 | kfree(boardp->orig_carrp); | ||
5440 | boardp->orig_carrp = NULL; | ||
5441 | if (boardp->orig_reqp) { | ||
5442 | kfree(boardp->orig_reqp); | ||
5443 | boardp->orig_reqp = boardp->adv_reqp = NULL; | ||
5444 | } | ||
5445 | while ((sgp = boardp->adv_sgblkp) != NULL) | ||
5446 | { | ||
5447 | boardp->adv_sgblkp = sgp->next_sgblkp; | ||
5448 | kfree(sgp); | ||
5449 | } | ||
5450 | } | ||
5451 | #ifdef CONFIG_PROC_FS | ||
5452 | ASC_ASSERT(boardp->prtbuf != NULL); | ||
5453 | kfree(boardp->prtbuf); | ||
5454 | #endif /* CONFIG_PROC_FS */ | 4240 | #endif /* CONFIG_PROC_FS */ |
5455 | scsi_unregister(shp); | ||
5456 | ASC_DBG(1, "advansys_release: end\n"); | ||
5457 | return 0; | ||
5458 | } | ||
5459 | 4241 | ||
5460 | /* | 4242 | /* |
5461 | * advansys_info() | 4243 | * advansys_info() |
@@ -5466,91 +4248,87 @@ advansys_release(struct Scsi_Host *shp) | |||
5466 | * Note: The information line should not exceed ASC_INFO_SIZE bytes, | 4248 | * Note: The information line should not exceed ASC_INFO_SIZE bytes, |
5467 | * otherwise the static 'info' array will be overrun. | 4249 | * otherwise the static 'info' array will be overrun. |
5468 | */ | 4250 | */ |
5469 | static const char * | 4251 | static const char *advansys_info(struct Scsi_Host *shost) |
5470 | advansys_info(struct Scsi_Host *shp) | ||
5471 | { | 4252 | { |
5472 | static char info[ASC_INFO_SIZE]; | 4253 | static char info[ASC_INFO_SIZE]; |
5473 | asc_board_t *boardp; | 4254 | asc_board_t *boardp; |
5474 | ASC_DVC_VAR *asc_dvc_varp; | 4255 | ASC_DVC_VAR *asc_dvc_varp; |
5475 | ADV_DVC_VAR *adv_dvc_varp; | 4256 | ADV_DVC_VAR *adv_dvc_varp; |
5476 | char *busname; | 4257 | char *busname; |
5477 | int iolen; | 4258 | int iolen; |
5478 | char *widename = NULL; | 4259 | char *widename = NULL; |
5479 | 4260 | ||
5480 | boardp = ASC_BOARDP(shp); | 4261 | boardp = ASC_BOARDP(shost); |
5481 | if (ASC_NARROW_BOARD(boardp)) { | 4262 | if (ASC_NARROW_BOARD(boardp)) { |
5482 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; | 4263 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; |
5483 | ASC_DBG(1, "advansys_info: begin\n"); | 4264 | ASC_DBG(1, "advansys_info: begin\n"); |
5484 | if (asc_dvc_varp->bus_type & ASC_IS_ISA) { | 4265 | if (asc_dvc_varp->bus_type & ASC_IS_ISA) { |
5485 | if ((asc_dvc_varp->bus_type & ASC_IS_ISAPNP) == ASC_IS_ISAPNP) { | 4266 | if ((asc_dvc_varp->bus_type & ASC_IS_ISAPNP) == |
5486 | busname = "ISA PnP"; | 4267 | ASC_IS_ISAPNP) { |
5487 | } else { | 4268 | busname = "ISA PnP"; |
5488 | busname = "ISA"; | 4269 | } else { |
5489 | } | 4270 | busname = "ISA"; |
5490 | /* Don't reference 'shp->n_io_port'; It may be truncated. */ | 4271 | } |
5491 | sprintf(info, | 4272 | /* Don't reference 'shost->n_io_port'; It may be truncated. */ |
5492 | "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X, DMA 0x%X", | 4273 | sprintf(info, |
5493 | ASC_VERSION, busname, | 4274 | "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X, DMA 0x%X", |
5494 | (ulong) shp->io_port, | 4275 | ASC_VERSION, busname, |
5495 | (ulong) shp->io_port + boardp->asc_n_io_port - 1, | 4276 | (ulong)shost->io_port, |
5496 | shp->irq, shp->dma_channel); | 4277 | (ulong)shost->io_port + boardp->asc_n_io_port - |
5497 | } else { | 4278 | 1, shost->irq, shost->dma_channel); |
5498 | if (asc_dvc_varp->bus_type & ASC_IS_VL) { | 4279 | } else { |
5499 | busname = "VL"; | 4280 | if (asc_dvc_varp->bus_type & ASC_IS_VL) { |
5500 | } else if (asc_dvc_varp->bus_type & ASC_IS_EISA) { | 4281 | busname = "VL"; |
5501 | busname = "EISA"; | 4282 | } else if (asc_dvc_varp->bus_type & ASC_IS_EISA) { |
5502 | } else if (asc_dvc_varp->bus_type & ASC_IS_PCI) { | 4283 | busname = "EISA"; |
5503 | if ((asc_dvc_varp->bus_type & ASC_IS_PCI_ULTRA) | 4284 | } else if (asc_dvc_varp->bus_type & ASC_IS_PCI) { |
5504 | == ASC_IS_PCI_ULTRA) { | 4285 | if ((asc_dvc_varp->bus_type & ASC_IS_PCI_ULTRA) |
5505 | busname = "PCI Ultra"; | 4286 | == ASC_IS_PCI_ULTRA) { |
5506 | } else { | 4287 | busname = "PCI Ultra"; |
5507 | busname = "PCI"; | 4288 | } else { |
5508 | } | 4289 | busname = "PCI"; |
5509 | } else { | 4290 | } |
5510 | busname = "?"; | 4291 | } else { |
5511 | ASC_PRINT2( "advansys_info: board %d: unknown bus type %d\n", | 4292 | busname = "?"; |
5512 | boardp->id, asc_dvc_varp->bus_type); | 4293 | ASC_PRINT2 |
5513 | } | 4294 | ("advansys_info: board %d: unknown bus type %d\n", |
5514 | /* Don't reference 'shp->n_io_port'; It may be truncated. */ | 4295 | boardp->id, asc_dvc_varp->bus_type); |
5515 | sprintf(info, | 4296 | } |
5516 | "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X", | 4297 | /* Don't reference 'shost->n_io_port'; It may be truncated. */ |
5517 | ASC_VERSION, busname, | 4298 | sprintf(info, |
5518 | (ulong) shp->io_port, | 4299 | "AdvanSys SCSI %s: %s: IO 0x%lX-0x%lX, IRQ 0x%X", |
5519 | (ulong) shp->io_port + boardp->asc_n_io_port - 1, | 4300 | ASC_VERSION, busname, |
5520 | shp->irq); | 4301 | (ulong)shost->io_port, |
5521 | } | 4302 | (ulong)shost->io_port + boardp->asc_n_io_port - |
5522 | } else { | 4303 | 1, shost->irq); |
5523 | /* | 4304 | } |
5524 | * Wide Adapter Information | 4305 | } else { |
5525 | * | 4306 | /* |
5526 | * Memory-mapped I/O is used instead of I/O space to access | 4307 | * Wide Adapter Information |
5527 | * the adapter, but display the I/O Port range. The Memory | 4308 | * |
5528 | * I/O address is displayed through the driver /proc file. | 4309 | * Memory-mapped I/O is used instead of I/O space to access |
5529 | */ | 4310 | * the adapter, but display the I/O Port range. The Memory |
5530 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; | 4311 | * I/O address is displayed through the driver /proc file. |
5531 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) | 4312 | */ |
5532 | { | 4313 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; |
5533 | iolen = ADV_3550_IOLEN; | 4314 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { |
5534 | widename = "Ultra-Wide"; | 4315 | iolen = ADV_3550_IOLEN; |
5535 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) | 4316 | widename = "Ultra-Wide"; |
5536 | { | 4317 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { |
5537 | iolen = ADV_38C0800_IOLEN; | 4318 | iolen = ADV_38C0800_IOLEN; |
5538 | widename = "Ultra2-Wide"; | 4319 | widename = "Ultra2-Wide"; |
5539 | } else | 4320 | } else { |
5540 | { | 4321 | iolen = ADV_38C1600_IOLEN; |
5541 | iolen = ADV_38C1600_IOLEN; | 4322 | widename = "Ultra3-Wide"; |
5542 | widename = "Ultra3-Wide"; | 4323 | } |
5543 | } | 4324 | sprintf(info, |
5544 | sprintf(info, "AdvanSys SCSI %s: PCI %s: PCIMEM 0x%lX-0x%lX, IRQ 0x%X", | 4325 | "AdvanSys SCSI %s: PCI %s: PCIMEM 0x%lX-0x%lX, IRQ 0x%X", |
5545 | ASC_VERSION, | 4326 | ASC_VERSION, widename, (ulong)adv_dvc_varp->iop_base, |
5546 | widename, | 4327 | (ulong)adv_dvc_varp->iop_base + iolen - 1, shost->irq); |
5547 | (ulong) adv_dvc_varp->iop_base, | 4328 | } |
5548 | (ulong) adv_dvc_varp->iop_base + iolen - 1, | 4329 | ASC_ASSERT(strlen(info) < ASC_INFO_SIZE); |
5549 | shp->irq); | 4330 | ASC_DBG(1, "advansys_info: end\n"); |
5550 | } | 4331 | return info; |
5551 | ASC_ASSERT(strlen(info) < ASC_INFO_SIZE); | ||
5552 | ASC_DBG(1, "advansys_info: end\n"); | ||
5553 | return info; | ||
5554 | } | 4332 | } |
5555 | 4333 | ||
5556 | /* | 4334 | /* |
@@ -5560,82 +4338,82 @@ advansys_info(struct Scsi_Host *shp) | |||
5560 | * in the 'scp' result field. | 4338 | * in the 'scp' result field. |
5561 | */ | 4339 | */ |
5562 | static int | 4340 | static int |
5563 | advansys_queuecommand(struct scsi_cmnd *scp, void (*done)(struct scsi_cmnd *)) | 4341 | advansys_queuecommand(struct scsi_cmnd *scp, void (*done) (struct scsi_cmnd *)) |
5564 | { | 4342 | { |
5565 | struct Scsi_Host *shp; | 4343 | struct Scsi_Host *shost; |
5566 | asc_board_t *boardp; | 4344 | asc_board_t *boardp; |
5567 | ulong flags; | 4345 | ulong flags; |
5568 | struct scsi_cmnd *done_scp; | 4346 | struct scsi_cmnd *done_scp; |
5569 | 4347 | ||
5570 | shp = scp->device->host; | 4348 | shost = scp->device->host; |
5571 | boardp = ASC_BOARDP(shp); | 4349 | boardp = ASC_BOARDP(shost); |
5572 | ASC_STATS(shp, queuecommand); | 4350 | ASC_STATS(shost, queuecommand); |
5573 | 4351 | ||
5574 | /* host_lock taken by mid-level prior to call but need to protect */ | 4352 | /* host_lock taken by mid-level prior to call but need to protect */ |
5575 | /* against own ISR */ | 4353 | /* against own ISR */ |
5576 | spin_lock_irqsave(&boardp->lock, flags); | 4354 | spin_lock_irqsave(&boardp->lock, flags); |
5577 | 4355 | ||
5578 | /* | 4356 | /* |
5579 | * Block new commands while handling a reset or abort request. | 4357 | * Block new commands while handling a reset or abort request. |
5580 | */ | 4358 | */ |
5581 | if (boardp->flags & ASC_HOST_IN_RESET) { | 4359 | if (boardp->flags & ASC_HOST_IN_RESET) { |
5582 | ASC_DBG1(1, | 4360 | ASC_DBG1(1, |
5583 | "advansys_queuecommand: scp 0x%lx blocked for reset request\n", | 4361 | "advansys_queuecommand: scp 0x%lx blocked for reset request\n", |
5584 | (ulong) scp); | 4362 | (ulong)scp); |
5585 | scp->result = HOST_BYTE(DID_RESET); | 4363 | scp->result = HOST_BYTE(DID_RESET); |
5586 | |||
5587 | /* | ||
5588 | * Add blocked requests to the board's 'done' queue. The queued | ||
5589 | * requests will be completed at the end of the abort or reset | ||
5590 | * handling. | ||
5591 | */ | ||
5592 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5593 | spin_unlock_irqrestore(&boardp->lock, flags); | ||
5594 | return 0; | ||
5595 | } | ||
5596 | 4364 | ||
5597 | /* | 4365 | /* |
5598 | * Attempt to execute any waiting commands for the board. | 4366 | * Add blocked requests to the board's 'done' queue. The queued |
5599 | */ | 4367 | * requests will be completed at the end of the abort or reset |
5600 | if (!ASC_QUEUE_EMPTY(&boardp->waiting)) { | 4368 | * handling. |
5601 | ASC_DBG(1, | 4369 | */ |
5602 | "advansys_queuecommand: before asc_execute_queue() waiting\n"); | 4370 | asc_enqueue(&boardp->done, scp, ASC_BACK); |
5603 | asc_execute_queue(&boardp->waiting); | 4371 | spin_unlock_irqrestore(&boardp->lock, flags); |
5604 | } | 4372 | return 0; |
4373 | } | ||
5605 | 4374 | ||
5606 | /* | 4375 | /* |
5607 | * Save the function pointer to Linux mid-level 'done' function | 4376 | * Attempt to execute any waiting commands for the board. |
5608 | * and attempt to execute the command. | 4377 | */ |
5609 | * | 4378 | if (!ASC_QUEUE_EMPTY(&boardp->waiting)) { |
5610 | * If ASC_NOERROR is returned the request has been added to the | 4379 | ASC_DBG(1, |
5611 | * board's 'active' queue and will be completed by the interrupt | 4380 | "advansys_queuecommand: before asc_execute_queue() waiting\n"); |
5612 | * handler. | 4381 | asc_execute_queue(&boardp->waiting); |
5613 | * | 4382 | } |
5614 | * If ASC_BUSY is returned add the request to the board's per | 4383 | |
5615 | * target waiting list. This is the first time the request has | 4384 | /* |
5616 | * been tried. Add it to the back of the waiting list. It will be | 4385 | * Save the function pointer to Linux mid-level 'done' function |
5617 | * retried later. | 4386 | * and attempt to execute the command. |
5618 | * | 4387 | * |
5619 | * If an error occurred, the request will have been placed on the | 4388 | * If ASC_NOERROR is returned the request has been added to the |
5620 | * board's 'done' queue and must be completed before returning. | 4389 | * board's 'active' queue and will be completed by the interrupt |
5621 | */ | 4390 | * handler. |
5622 | scp->scsi_done = done; | 4391 | * |
5623 | switch (asc_execute_scsi_cmnd(scp)) { | 4392 | * If ASC_BUSY is returned add the request to the board's per |
5624 | case ASC_NOERROR: | 4393 | * target waiting list. This is the first time the request has |
5625 | break; | 4394 | * been tried. Add it to the back of the waiting list. It will be |
5626 | case ASC_BUSY: | 4395 | * retried later. |
5627 | asc_enqueue(&boardp->waiting, scp, ASC_BACK); | 4396 | * |
5628 | break; | 4397 | * If an error occurred, the request will have been placed on the |
5629 | case ASC_ERROR: | 4398 | * board's 'done' queue and must be completed before returning. |
5630 | default: | 4399 | */ |
5631 | done_scp = asc_dequeue_list(&boardp->done, NULL, ASC_TID_ALL); | 4400 | scp->scsi_done = done; |
5632 | /* Interrupts could be enabled here. */ | 4401 | switch (asc_execute_scsi_cmnd(scp)) { |
5633 | asc_scsi_done_list(done_scp); | 4402 | case ASC_NOERROR: |
5634 | break; | 4403 | break; |
5635 | } | 4404 | case ASC_BUSY: |
5636 | spin_unlock_irqrestore(&boardp->lock, flags); | 4405 | asc_enqueue(&boardp->waiting, scp, ASC_BACK); |
4406 | break; | ||
4407 | case ASC_ERROR: | ||
4408 | default: | ||
4409 | done_scp = asc_dequeue_list(&boardp->done, NULL, ASC_TID_ALL); | ||
4410 | /* Interrupts could be enabled here. */ | ||
4411 | asc_scsi_done_list(done_scp); | ||
4412 | break; | ||
4413 | } | ||
4414 | spin_unlock_irqrestore(&boardp->lock, flags); | ||
5637 | 4415 | ||
5638 | return 0; | 4416 | return 0; |
5639 | } | 4417 | } |
5640 | 4418 | ||
5641 | /* | 4419 | /* |
@@ -5647,178 +4425,187 @@ advansys_queuecommand(struct scsi_cmnd *scp, void (*done)(struct scsi_cmnd *)) | |||
5647 | * sleeping is allowed and no locking other than for host structures is | 4425 | * sleeping is allowed and no locking other than for host structures is |
5648 | * required. Returns SUCCESS or FAILED. | 4426 | * required. Returns SUCCESS or FAILED. |
5649 | */ | 4427 | */ |
5650 | static int | 4428 | static int advansys_reset(struct scsi_cmnd *scp) |
5651 | advansys_reset(struct scsi_cmnd *scp) | ||
5652 | { | 4429 | { |
5653 | struct Scsi_Host *shp; | 4430 | struct Scsi_Host *shost; |
5654 | asc_board_t *boardp; | 4431 | asc_board_t *boardp; |
5655 | ASC_DVC_VAR *asc_dvc_varp; | 4432 | ASC_DVC_VAR *asc_dvc_varp; |
5656 | ADV_DVC_VAR *adv_dvc_varp; | 4433 | ADV_DVC_VAR *adv_dvc_varp; |
5657 | ulong flags; | 4434 | ulong flags; |
5658 | struct scsi_cmnd *done_scp = NULL, *last_scp = NULL; | 4435 | struct scsi_cmnd *done_scp = NULL, *last_scp = NULL; |
5659 | struct scsi_cmnd *tscp, *new_last_scp; | 4436 | struct scsi_cmnd *tscp, *new_last_scp; |
5660 | int status; | 4437 | int status; |
5661 | int ret = SUCCESS; | 4438 | int ret = SUCCESS; |
5662 | 4439 | ||
5663 | ASC_DBG1(1, "advansys_reset: 0x%lx\n", (ulong) scp); | 4440 | ASC_DBG1(1, "advansys_reset: 0x%lx\n", (ulong)scp); |
5664 | 4441 | ||
5665 | #ifdef ADVANSYS_STATS | 4442 | #ifdef ADVANSYS_STATS |
5666 | if (scp->device->host != NULL) { | 4443 | if (scp->device->host != NULL) { |
5667 | ASC_STATS(scp->device->host, reset); | 4444 | ASC_STATS(scp->device->host, reset); |
5668 | } | 4445 | } |
5669 | #endif /* ADVANSYS_STATS */ | 4446 | #endif /* ADVANSYS_STATS */ |
5670 | 4447 | ||
5671 | if ((shp = scp->device->host) == NULL) { | 4448 | if ((shost = scp->device->host) == NULL) { |
5672 | scp->result = HOST_BYTE(DID_ERROR); | 4449 | scp->result = HOST_BYTE(DID_ERROR); |
5673 | return FAILED; | 4450 | return FAILED; |
5674 | } | 4451 | } |
5675 | 4452 | ||
5676 | boardp = ASC_BOARDP(shp); | 4453 | boardp = ASC_BOARDP(shost); |
5677 | 4454 | ||
5678 | ASC_PRINT1("advansys_reset: board %d: SCSI bus reset started...\n", | 4455 | ASC_PRINT1("advansys_reset: board %d: SCSI bus reset started...\n", |
5679 | boardp->id); | 4456 | boardp->id); |
5680 | /* | 4457 | /* |
5681 | * Check for re-entrancy. | 4458 | * Check for re-entrancy. |
5682 | */ | 4459 | */ |
5683 | spin_lock_irqsave(&boardp->lock, flags); | ||
5684 | if (boardp->flags & ASC_HOST_IN_RESET) { | ||
5685 | spin_unlock_irqrestore(&boardp->lock, flags); | ||
5686 | return FAILED; | ||
5687 | } | ||
5688 | boardp->flags |= ASC_HOST_IN_RESET; | ||
5689 | spin_unlock_irqrestore(&boardp->lock, flags); | ||
5690 | |||
5691 | if (ASC_NARROW_BOARD(boardp)) { | ||
5692 | /* | ||
5693 | * Narrow Board | ||
5694 | */ | ||
5695 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; | ||
5696 | |||
5697 | /* | ||
5698 | * Reset the chip and SCSI bus. | ||
5699 | */ | ||
5700 | ASC_DBG(1, "advansys_reset: before AscInitAsc1000Driver()\n"); | ||
5701 | status = AscInitAsc1000Driver(asc_dvc_varp); | ||
5702 | |||
5703 | /* Refer to ASC_IERR_* defintions for meaning of 'err_code'. */ | ||
5704 | if (asc_dvc_varp->err_code) { | ||
5705 | ASC_PRINT2( | ||
5706 | "advansys_reset: board %d: SCSI bus reset error: 0x%x\n", | ||
5707 | boardp->id, asc_dvc_varp->err_code); | ||
5708 | ret = FAILED; | ||
5709 | } else if (status) { | ||
5710 | ASC_PRINT2( | ||
5711 | "advansys_reset: board %d: SCSI bus reset warning: 0x%x\n", | ||
5712 | boardp->id, status); | ||
5713 | } else { | ||
5714 | ASC_PRINT1( | ||
5715 | "advansys_reset: board %d: SCSI bus reset successful.\n", | ||
5716 | boardp->id); | ||
5717 | } | ||
5718 | |||
5719 | ASC_DBG(1, "advansys_reset: after AscInitAsc1000Driver()\n"); | ||
5720 | spin_lock_irqsave(&boardp->lock, flags); | 4460 | spin_lock_irqsave(&boardp->lock, flags); |
4461 | if (boardp->flags & ASC_HOST_IN_RESET) { | ||
4462 | spin_unlock_irqrestore(&boardp->lock, flags); | ||
4463 | return FAILED; | ||
4464 | } | ||
4465 | boardp->flags |= ASC_HOST_IN_RESET; | ||
4466 | spin_unlock_irqrestore(&boardp->lock, flags); | ||
5721 | 4467 | ||
5722 | } else { | 4468 | if (ASC_NARROW_BOARD(boardp)) { |
5723 | /* | 4469 | /* |
5724 | * Wide Board | 4470 | * Narrow Board |
5725 | * | 4471 | */ |
5726 | * If the suggest reset bus flags are set, then reset the bus. | 4472 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; |
5727 | * Otherwise only reset the device. | ||
5728 | */ | ||
5729 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; | ||
5730 | |||
5731 | /* | ||
5732 | * Reset the target's SCSI bus. | ||
5733 | */ | ||
5734 | ASC_DBG(1, "advansys_reset: before AdvResetChipAndSB()\n"); | ||
5735 | switch (AdvResetChipAndSB(adv_dvc_varp)) { | ||
5736 | case ASC_TRUE: | ||
5737 | ASC_PRINT1("advansys_reset: board %d: SCSI bus reset successful.\n", | ||
5738 | boardp->id); | ||
5739 | break; | ||
5740 | case ASC_FALSE: | ||
5741 | default: | ||
5742 | ASC_PRINT1("advansys_reset: board %d: SCSI bus reset error.\n", | ||
5743 | boardp->id); | ||
5744 | ret = FAILED; | ||
5745 | break; | ||
5746 | } | ||
5747 | spin_lock_irqsave(&boardp->lock, flags); | ||
5748 | (void) AdvISR(adv_dvc_varp); | ||
5749 | } | ||
5750 | /* Board lock is held. */ | ||
5751 | 4473 | ||
5752 | /* | 4474 | /* |
5753 | * Dequeue all board 'done' requests. A pointer to the last request | 4475 | * Reset the chip and SCSI bus. |
5754 | * is returned in 'last_scp'. | 4476 | */ |
5755 | */ | 4477 | ASC_DBG(1, "advansys_reset: before AscInitAsc1000Driver()\n"); |
5756 | done_scp = asc_dequeue_list(&boardp->done, &last_scp, ASC_TID_ALL); | 4478 | status = AscInitAsc1000Driver(asc_dvc_varp); |
4479 | |||
4480 | /* Refer to ASC_IERR_* defintions for meaning of 'err_code'. */ | ||
4481 | if (asc_dvc_varp->err_code) { | ||
4482 | ASC_PRINT2 | ||
4483 | ("advansys_reset: board %d: SCSI bus reset error: 0x%x\n", | ||
4484 | boardp->id, asc_dvc_varp->err_code); | ||
4485 | ret = FAILED; | ||
4486 | } else if (status) { | ||
4487 | ASC_PRINT2 | ||
4488 | ("advansys_reset: board %d: SCSI bus reset warning: 0x%x\n", | ||
4489 | boardp->id, status); | ||
4490 | } else { | ||
4491 | ASC_PRINT1 | ||
4492 | ("advansys_reset: board %d: SCSI bus reset successful.\n", | ||
4493 | boardp->id); | ||
4494 | } | ||
4495 | |||
4496 | ASC_DBG(1, "advansys_reset: after AscInitAsc1000Driver()\n"); | ||
4497 | spin_lock_irqsave(&boardp->lock, flags); | ||
5757 | 4498 | ||
5758 | /* | 4499 | } else { |
5759 | * Dequeue all board 'active' requests for all devices and set | 4500 | /* |
5760 | * the request status to DID_RESET. A pointer to the last request | 4501 | * Wide Board |
5761 | * is returned in 'last_scp'. | 4502 | * |
5762 | */ | 4503 | * If the suggest reset bus flags are set, then reset the bus. |
5763 | if (done_scp == NULL) { | 4504 | * Otherwise only reset the device. |
5764 | done_scp = asc_dequeue_list(&boardp->active, &last_scp, ASC_TID_ALL); | 4505 | */ |
5765 | for (tscp = done_scp; tscp; tscp = REQPNEXT(tscp)) { | 4506 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; |
5766 | tscp->result = HOST_BYTE(DID_RESET); | ||
5767 | } | ||
5768 | } else { | ||
5769 | /* Append to 'done_scp' at the end with 'last_scp'. */ | ||
5770 | ASC_ASSERT(last_scp != NULL); | ||
5771 | last_scp->host_scribble = (unsigned char *)asc_dequeue_list( | ||
5772 | &boardp->active, &new_last_scp, ASC_TID_ALL); | ||
5773 | if (new_last_scp != NULL) { | ||
5774 | ASC_ASSERT(REQPNEXT(last_scp) != NULL); | ||
5775 | for (tscp = REQPNEXT(last_scp); tscp; tscp = REQPNEXT(tscp)) { | ||
5776 | tscp->result = HOST_BYTE(DID_RESET); | ||
5777 | } | ||
5778 | last_scp = new_last_scp; | ||
5779 | } | ||
5780 | } | ||
5781 | 4507 | ||
5782 | /* | 4508 | /* |
5783 | * Dequeue all 'waiting' requests and set the request status | 4509 | * Reset the target's SCSI bus. |
5784 | * to DID_RESET. | 4510 | */ |
5785 | */ | 4511 | ASC_DBG(1, "advansys_reset: before AdvResetChipAndSB()\n"); |
5786 | if (done_scp == NULL) { | 4512 | switch (AdvResetChipAndSB(adv_dvc_varp)) { |
5787 | done_scp = asc_dequeue_list(&boardp->waiting, &last_scp, ASC_TID_ALL); | 4513 | case ASC_TRUE: |
5788 | for (tscp = done_scp; tscp; tscp = REQPNEXT(tscp)) { | 4514 | ASC_PRINT1 |
5789 | tscp->result = HOST_BYTE(DID_RESET); | 4515 | ("advansys_reset: board %d: SCSI bus reset successful.\n", |
5790 | } | 4516 | boardp->id); |
5791 | } else { | 4517 | break; |
5792 | /* Append to 'done_scp' at the end with 'last_scp'. */ | 4518 | case ASC_FALSE: |
5793 | ASC_ASSERT(last_scp != NULL); | 4519 | default: |
5794 | last_scp->host_scribble = (unsigned char *)asc_dequeue_list( | 4520 | ASC_PRINT1 |
5795 | &boardp->waiting, &new_last_scp, ASC_TID_ALL); | 4521 | ("advansys_reset: board %d: SCSI bus reset error.\n", |
5796 | if (new_last_scp != NULL) { | 4522 | boardp->id); |
5797 | ASC_ASSERT(REQPNEXT(last_scp) != NULL); | 4523 | ret = FAILED; |
5798 | for (tscp = REQPNEXT(last_scp); tscp; tscp = REQPNEXT(tscp)) { | 4524 | break; |
5799 | tscp->result = HOST_BYTE(DID_RESET); | 4525 | } |
5800 | } | 4526 | spin_lock_irqsave(&boardp->lock, flags); |
5801 | last_scp = new_last_scp; | 4527 | (void)AdvISR(adv_dvc_varp); |
5802 | } | 4528 | } |
5803 | } | 4529 | /* Board lock is held. */ |
4530 | |||
4531 | /* | ||
4532 | * Dequeue all board 'done' requests. A pointer to the last request | ||
4533 | * is returned in 'last_scp'. | ||
4534 | */ | ||
4535 | done_scp = asc_dequeue_list(&boardp->done, &last_scp, ASC_TID_ALL); | ||
4536 | |||
4537 | /* | ||
4538 | * Dequeue all board 'active' requests for all devices and set | ||
4539 | * the request status to DID_RESET. A pointer to the last request | ||
4540 | * is returned in 'last_scp'. | ||
4541 | */ | ||
4542 | if (done_scp == NULL) { | ||
4543 | done_scp = | ||
4544 | asc_dequeue_list(&boardp->active, &last_scp, ASC_TID_ALL); | ||
4545 | for (tscp = done_scp; tscp; tscp = REQPNEXT(tscp)) { | ||
4546 | tscp->result = HOST_BYTE(DID_RESET); | ||
4547 | } | ||
4548 | } else { | ||
4549 | /* Append to 'done_scp' at the end with 'last_scp'. */ | ||
4550 | ASC_ASSERT(last_scp != NULL); | ||
4551 | last_scp->host_scribble = | ||
4552 | (unsigned char *)asc_dequeue_list(&boardp->active, | ||
4553 | &new_last_scp, | ||
4554 | ASC_TID_ALL); | ||
4555 | if (new_last_scp != NULL) { | ||
4556 | ASC_ASSERT(REQPNEXT(last_scp) != NULL); | ||
4557 | for (tscp = REQPNEXT(last_scp); tscp; | ||
4558 | tscp = REQPNEXT(tscp)) { | ||
4559 | tscp->result = HOST_BYTE(DID_RESET); | ||
4560 | } | ||
4561 | last_scp = new_last_scp; | ||
4562 | } | ||
4563 | } | ||
5804 | 4564 | ||
5805 | /* Save the time of the most recently completed reset. */ | 4565 | /* |
5806 | boardp->last_reset = jiffies; | 4566 | * Dequeue all 'waiting' requests and set the request status |
4567 | * to DID_RESET. | ||
4568 | */ | ||
4569 | if (done_scp == NULL) { | ||
4570 | done_scp = | ||
4571 | asc_dequeue_list(&boardp->waiting, &last_scp, ASC_TID_ALL); | ||
4572 | for (tscp = done_scp; tscp; tscp = REQPNEXT(tscp)) { | ||
4573 | tscp->result = HOST_BYTE(DID_RESET); | ||
4574 | } | ||
4575 | } else { | ||
4576 | /* Append to 'done_scp' at the end with 'last_scp'. */ | ||
4577 | ASC_ASSERT(last_scp != NULL); | ||
4578 | last_scp->host_scribble = | ||
4579 | (unsigned char *)asc_dequeue_list(&boardp->waiting, | ||
4580 | &new_last_scp, | ||
4581 | ASC_TID_ALL); | ||
4582 | if (new_last_scp != NULL) { | ||
4583 | ASC_ASSERT(REQPNEXT(last_scp) != NULL); | ||
4584 | for (tscp = REQPNEXT(last_scp); tscp; | ||
4585 | tscp = REQPNEXT(tscp)) { | ||
4586 | tscp->result = HOST_BYTE(DID_RESET); | ||
4587 | } | ||
4588 | last_scp = new_last_scp; | ||
4589 | } | ||
4590 | } | ||
5807 | 4591 | ||
5808 | /* Clear reset flag. */ | 4592 | /* Save the time of the most recently completed reset. */ |
5809 | boardp->flags &= ~ASC_HOST_IN_RESET; | 4593 | boardp->last_reset = jiffies; |
5810 | spin_unlock_irqrestore(&boardp->lock, flags); | ||
5811 | 4594 | ||
5812 | /* | 4595 | /* Clear reset flag. */ |
5813 | * Complete all the 'done_scp' requests. | 4596 | boardp->flags &= ~ASC_HOST_IN_RESET; |
5814 | */ | 4597 | spin_unlock_irqrestore(&boardp->lock, flags); |
5815 | if (done_scp != NULL) { | ||
5816 | asc_scsi_done_list(done_scp); | ||
5817 | } | ||
5818 | 4598 | ||
5819 | ASC_DBG1(1, "advansys_reset: ret %d\n", ret); | 4599 | /* |
4600 | * Complete all the 'done_scp' requests. | ||
4601 | */ | ||
4602 | if (done_scp != NULL) { | ||
4603 | asc_scsi_done_list(done_scp); | ||
4604 | } | ||
5820 | 4605 | ||
5821 | return ret; | 4606 | ASC_DBG1(1, "advansys_reset: ret %d\n", ret); |
4607 | |||
4608 | return ret; | ||
5822 | } | 4609 | } |
5823 | 4610 | ||
5824 | /* | 4611 | /* |
@@ -5834,71 +4621,70 @@ advansys_reset(struct scsi_cmnd *scp) | |||
5834 | */ | 4621 | */ |
5835 | static int | 4622 | static int |
5836 | advansys_biosparam(struct scsi_device *sdev, struct block_device *bdev, | 4623 | advansys_biosparam(struct scsi_device *sdev, struct block_device *bdev, |
5837 | sector_t capacity, int ip[]) | 4624 | sector_t capacity, int ip[]) |
5838 | { | 4625 | { |
5839 | asc_board_t *boardp; | 4626 | asc_board_t *boardp; |
5840 | 4627 | ||
5841 | ASC_DBG(1, "advansys_biosparam: begin\n"); | 4628 | ASC_DBG(1, "advansys_biosparam: begin\n"); |
5842 | ASC_STATS(sdev->host, biosparam); | 4629 | ASC_STATS(sdev->host, biosparam); |
5843 | boardp = ASC_BOARDP(sdev->host); | 4630 | boardp = ASC_BOARDP(sdev->host); |
5844 | if (ASC_NARROW_BOARD(boardp)) { | 4631 | if (ASC_NARROW_BOARD(boardp)) { |
5845 | if ((boardp->dvc_var.asc_dvc_var.dvc_cntl & | 4632 | if ((boardp->dvc_var.asc_dvc_var.dvc_cntl & |
5846 | ASC_CNTL_BIOS_GT_1GB) && capacity > 0x200000) { | 4633 | ASC_CNTL_BIOS_GT_1GB) && capacity > 0x200000) { |
5847 | ip[0] = 255; | 4634 | ip[0] = 255; |
5848 | ip[1] = 63; | 4635 | ip[1] = 63; |
5849 | } else { | 4636 | } else { |
5850 | ip[0] = 64; | 4637 | ip[0] = 64; |
5851 | ip[1] = 32; | 4638 | ip[1] = 32; |
5852 | } | 4639 | } |
5853 | } else { | 4640 | } else { |
5854 | if ((boardp->dvc_var.adv_dvc_var.bios_ctrl & | 4641 | if ((boardp->dvc_var.adv_dvc_var.bios_ctrl & |
5855 | BIOS_CTRL_EXTENDED_XLAT) && capacity > 0x200000) { | 4642 | BIOS_CTRL_EXTENDED_XLAT) && capacity > 0x200000) { |
5856 | ip[0] = 255; | 4643 | ip[0] = 255; |
5857 | ip[1] = 63; | 4644 | ip[1] = 63; |
5858 | } else { | 4645 | } else { |
5859 | ip[0] = 64; | 4646 | ip[0] = 64; |
5860 | ip[1] = 32; | 4647 | ip[1] = 32; |
5861 | } | 4648 | } |
5862 | } | 4649 | } |
5863 | ip[2] = (unsigned long)capacity / (ip[0] * ip[1]); | 4650 | ip[2] = (unsigned long)capacity / (ip[0] * ip[1]); |
5864 | ASC_DBG(1, "advansys_biosparam: end\n"); | 4651 | ASC_DBG(1, "advansys_biosparam: end\n"); |
5865 | return 0; | 4652 | return 0; |
5866 | } | 4653 | } |
5867 | 4654 | ||
5868 | /* | 4655 | static int __init advansys_detect(struct scsi_host_template *tpnt); |
5869 | * --- Loadable Driver Support | 4656 | static int advansys_release(struct Scsi_Host *shp); |
5870 | */ | ||
5871 | 4657 | ||
5872 | static struct scsi_host_template driver_template = { | 4658 | static struct scsi_host_template driver_template = { |
5873 | .proc_name = "advansys", | 4659 | .proc_name = "advansys", |
5874 | #ifdef CONFIG_PROC_FS | 4660 | #ifdef CONFIG_PROC_FS |
5875 | .proc_info = advansys_proc_info, | 4661 | .proc_info = advansys_proc_info, |
5876 | #endif | 4662 | #endif |
5877 | .name = "advansys", | 4663 | .name = "advansys", |
5878 | .detect = advansys_detect, | 4664 | .detect = advansys_detect, |
5879 | .release = advansys_release, | 4665 | .release = advansys_release, |
5880 | .info = advansys_info, | 4666 | .info = advansys_info, |
5881 | .queuecommand = advansys_queuecommand, | 4667 | .queuecommand = advansys_queuecommand, |
5882 | .eh_bus_reset_handler = advansys_reset, | 4668 | .eh_bus_reset_handler = advansys_reset, |
5883 | .bios_param = advansys_biosparam, | 4669 | .bios_param = advansys_biosparam, |
5884 | .slave_configure = advansys_slave_configure, | 4670 | .slave_configure = advansys_slave_configure, |
5885 | /* | 4671 | /* |
5886 | * Because the driver may control an ISA adapter 'unchecked_isa_dma' | 4672 | * Because the driver may control an ISA adapter 'unchecked_isa_dma' |
5887 | * must be set. The flag will be cleared in advansys_detect for non-ISA | 4673 | * must be set. The flag will be cleared in advansys_detect for non-ISA |
5888 | * adapters. Refer to the comment in scsi_module.c for more information. | 4674 | * adapters. Refer to the comment in scsi_module.c for more information. |
5889 | */ | 4675 | */ |
5890 | .unchecked_isa_dma = 1, | 4676 | .unchecked_isa_dma = 1, |
5891 | /* | 4677 | /* |
5892 | * All adapters controlled by this driver are capable of large | 4678 | * All adapters controlled by this driver are capable of large |
5893 | * scatter-gather lists. According to the mid-level SCSI documentation | 4679 | * scatter-gather lists. According to the mid-level SCSI documentation |
5894 | * this obviates any performance gain provided by setting | 4680 | * this obviates any performance gain provided by setting |
5895 | * 'use_clustering'. But empirically while CPU utilization is increased | 4681 | * 'use_clustering'. But empirically while CPU utilization is increased |
5896 | * by enabling clustering, I/O throughput increases as well. | 4682 | * by enabling clustering, I/O throughput increases as well. |
5897 | */ | 4683 | */ |
5898 | .use_clustering = ENABLE_CLUSTERING, | 4684 | .use_clustering = ENABLE_CLUSTERING, |
5899 | }; | 4685 | }; |
5900 | #include "scsi_module.c" | ||
5901 | 4686 | ||
4687 | #include "scsi_module.c" | ||
5902 | 4688 | ||
5903 | /* | 4689 | /* |
5904 | * --- Miscellaneous Driver Functions | 4690 | * --- Miscellaneous Driver Functions |
@@ -5913,130 +4699,138 @@ static struct scsi_host_template driver_template = { | |||
5913 | * to the AdvanSys driver which is for a device sharing an interrupt with | 4699 | * to the AdvanSys driver which is for a device sharing an interrupt with |
5914 | * an AdvanSys adapter. | 4700 | * an AdvanSys adapter. |
5915 | */ | 4701 | */ |
5916 | STATIC irqreturn_t | 4702 | static irqreturn_t advansys_interrupt(int irq, void *dev_id) |
5917 | advansys_interrupt(int irq, void *dev_id) | ||
5918 | { | 4703 | { |
5919 | ulong flags; | 4704 | ulong flags; |
5920 | int i; | 4705 | int i; |
5921 | asc_board_t *boardp; | 4706 | asc_board_t *boardp; |
5922 | struct scsi_cmnd *done_scp = NULL, *last_scp = NULL; | 4707 | struct scsi_cmnd *done_scp = NULL, *last_scp = NULL; |
5923 | struct scsi_cmnd *new_last_scp; | 4708 | struct scsi_cmnd *new_last_scp; |
5924 | struct Scsi_Host *shp; | 4709 | struct Scsi_Host *shost; |
5925 | 4710 | ||
5926 | ASC_DBG(1, "advansys_interrupt: begin\n"); | 4711 | ASC_DBG(1, "advansys_interrupt: begin\n"); |
4712 | |||
4713 | /* | ||
4714 | * Check for interrupts on all boards. | ||
4715 | * AscISR() will call asc_isr_callback(). | ||
4716 | */ | ||
4717 | for (i = 0; i < asc_board_count; i++) { | ||
4718 | shost = asc_host[i]; | ||
4719 | boardp = ASC_BOARDP(shost); | ||
4720 | ASC_DBG2(2, "advansys_interrupt: i %d, boardp 0x%lx\n", | ||
4721 | i, (ulong)boardp); | ||
4722 | spin_lock_irqsave(&boardp->lock, flags); | ||
4723 | if (ASC_NARROW_BOARD(boardp)) { | ||
4724 | /* | ||
4725 | * Narrow Board | ||
4726 | */ | ||
4727 | if (AscIsIntPending(shost->io_port)) { | ||
4728 | ASC_STATS(shost, interrupt); | ||
4729 | ASC_DBG(1, | ||
4730 | "advansys_interrupt: before AscISR()\n"); | ||
4731 | AscISR(&boardp->dvc_var.asc_dvc_var); | ||
4732 | } | ||
4733 | } else { | ||
4734 | /* | ||
4735 | * Wide Board | ||
4736 | */ | ||
4737 | ASC_DBG(1, "advansys_interrupt: before AdvISR()\n"); | ||
4738 | if (AdvISR(&boardp->dvc_var.adv_dvc_var)) { | ||
4739 | ASC_STATS(shost, interrupt); | ||
4740 | } | ||
4741 | } | ||
5927 | 4742 | ||
5928 | /* | 4743 | /* |
5929 | * Check for interrupts on all boards. | 4744 | * Start waiting requests and create a list of completed requests. |
5930 | * AscISR() will call asc_isr_callback(). | 4745 | * |
5931 | */ | 4746 | * If a reset request is being performed for the board, the reset |
5932 | for (i = 0; i < asc_board_count; i++) { | 4747 | * handler will complete pending requests after it has completed. |
5933 | shp = asc_host[i]; | 4748 | */ |
5934 | boardp = ASC_BOARDP(shp); | 4749 | if ((boardp->flags & ASC_HOST_IN_RESET) == 0) { |
5935 | ASC_DBG2(2, "advansys_interrupt: i %d, boardp 0x%lx\n", | 4750 | ASC_DBG2(1, |
5936 | i, (ulong) boardp); | 4751 | "advansys_interrupt: done_scp 0x%lx, last_scp 0x%lx\n", |
5937 | spin_lock_irqsave(&boardp->lock, flags); | 4752 | (ulong)done_scp, (ulong)last_scp); |
5938 | if (ASC_NARROW_BOARD(boardp)) { | 4753 | |
5939 | /* | 4754 | /* Start any waiting commands for the board. */ |
5940 | * Narrow Board | 4755 | if (!ASC_QUEUE_EMPTY(&boardp->waiting)) { |
5941 | */ | 4756 | ASC_DBG(1, |
5942 | if (AscIsIntPending(shp->io_port)) { | 4757 | "advansys_interrupt: before asc_execute_queue()\n"); |
5943 | ASC_STATS(shp, interrupt); | 4758 | asc_execute_queue(&boardp->waiting); |
5944 | ASC_DBG(1, "advansys_interrupt: before AscISR()\n"); | 4759 | } |
5945 | AscISR(&boardp->dvc_var.asc_dvc_var); | 4760 | |
5946 | } | 4761 | /* |
5947 | } else { | 4762 | * Add to the list of requests that must be completed. |
5948 | /* | 4763 | * |
5949 | * Wide Board | 4764 | * 'done_scp' will always be NULL on the first iteration |
5950 | */ | 4765 | * of this loop. 'last_scp' is set at the same time as |
5951 | ASC_DBG(1, "advansys_interrupt: before AdvISR()\n"); | 4766 | * 'done_scp'. |
5952 | if (AdvISR(&boardp->dvc_var.adv_dvc_var)) { | 4767 | */ |
5953 | ASC_STATS(shp, interrupt); | 4768 | if (done_scp == NULL) { |
5954 | } | 4769 | done_scp = |
5955 | } | 4770 | asc_dequeue_list(&boardp->done, &last_scp, |
5956 | 4771 | ASC_TID_ALL); | |
5957 | /* | 4772 | } else { |
5958 | * Start waiting requests and create a list of completed requests. | 4773 | ASC_ASSERT(last_scp != NULL); |
5959 | * | 4774 | last_scp->host_scribble = |
5960 | * If a reset request is being performed for the board, the reset | 4775 | (unsigned char *)asc_dequeue_list(&boardp-> |
5961 | * handler will complete pending requests after it has completed. | 4776 | done, |
5962 | */ | 4777 | &new_last_scp, |
5963 | if ((boardp->flags & ASC_HOST_IN_RESET) == 0) { | 4778 | ASC_TID_ALL); |
5964 | ASC_DBG2(1, "advansys_interrupt: done_scp 0x%lx, last_scp 0x%lx\n", | 4779 | if (new_last_scp != NULL) { |
5965 | (ulong) done_scp, (ulong) last_scp); | 4780 | ASC_ASSERT(REQPNEXT(last_scp) != NULL); |
5966 | 4781 | last_scp = new_last_scp; | |
5967 | /* Start any waiting commands for the board. */ | 4782 | } |
5968 | if (!ASC_QUEUE_EMPTY(&boardp->waiting)) { | 4783 | } |
5969 | ASC_DBG(1, "advansys_interrupt: before asc_execute_queue()\n"); | 4784 | } |
5970 | asc_execute_queue(&boardp->waiting); | 4785 | spin_unlock_irqrestore(&boardp->lock, flags); |
5971 | } | 4786 | } |
5972 | |||
5973 | /* | ||
5974 | * Add to the list of requests that must be completed. | ||
5975 | * | ||
5976 | * 'done_scp' will always be NULL on the first iteration | ||
5977 | * of this loop. 'last_scp' is set at the same time as | ||
5978 | * 'done_scp'. | ||
5979 | */ | ||
5980 | if (done_scp == NULL) { | ||
5981 | done_scp = asc_dequeue_list(&boardp->done, &last_scp, | ||
5982 | ASC_TID_ALL); | ||
5983 | } else { | ||
5984 | ASC_ASSERT(last_scp != NULL); | ||
5985 | last_scp->host_scribble = (unsigned char *)asc_dequeue_list( | ||
5986 | &boardp->done, &new_last_scp, ASC_TID_ALL); | ||
5987 | if (new_last_scp != NULL) { | ||
5988 | ASC_ASSERT(REQPNEXT(last_scp) != NULL); | ||
5989 | last_scp = new_last_scp; | ||
5990 | } | ||
5991 | } | ||
5992 | } | ||
5993 | spin_unlock_irqrestore(&boardp->lock, flags); | ||
5994 | } | ||
5995 | 4787 | ||
5996 | /* | 4788 | /* |
5997 | * If interrupts were enabled on entry, then they | 4789 | * If interrupts were enabled on entry, then they |
5998 | * are now enabled here. | 4790 | * are now enabled here. |
5999 | * | 4791 | * |
6000 | * Complete all requests on the done list. | 4792 | * Complete all requests on the done list. |
6001 | */ | 4793 | */ |
6002 | 4794 | ||
6003 | asc_scsi_done_list(done_scp); | 4795 | asc_scsi_done_list(done_scp); |
6004 | 4796 | ||
6005 | ASC_DBG(1, "advansys_interrupt: end\n"); | 4797 | ASC_DBG(1, "advansys_interrupt: end\n"); |
6006 | return IRQ_HANDLED; | 4798 | return IRQ_HANDLED; |
6007 | } | 4799 | } |
6008 | 4800 | ||
6009 | /* | 4801 | /* |
6010 | * Set the number of commands to queue per device for the | 4802 | * Set the number of commands to queue per device for the |
6011 | * specified host adapter. | 4803 | * specified host adapter. |
6012 | */ | 4804 | */ |
6013 | STATIC int | 4805 | static int advansys_slave_configure(struct scsi_device *device) |
6014 | advansys_slave_configure(struct scsi_device *device) | ||
6015 | { | 4806 | { |
6016 | asc_board_t *boardp; | 4807 | asc_board_t *boardp; |
6017 | 4808 | ||
6018 | boardp = ASC_BOARDP(device->host); | 4809 | boardp = ASC_BOARDP(device->host); |
6019 | boardp->flags |= ASC_SELECT_QUEUE_DEPTHS; | 4810 | boardp->flags |= ASC_SELECT_QUEUE_DEPTHS; |
6020 | /* | 4811 | /* |
6021 | * Save a pointer to the device and set its initial/maximum | 4812 | * Save a pointer to the device and set its initial/maximum |
6022 | * queue depth. Only save the pointer for a lun0 dev though. | 4813 | * queue depth. Only save the pointer for a lun0 dev though. |
6023 | */ | 4814 | */ |
6024 | if(device->lun == 0) | 4815 | if (device->lun == 0) |
6025 | boardp->device[device->id] = device; | 4816 | boardp->device[device->id] = device; |
6026 | if(device->tagged_supported) { | 4817 | if (device->tagged_supported) { |
6027 | if (ASC_NARROW_BOARD(boardp)) { | 4818 | if (ASC_NARROW_BOARD(boardp)) { |
6028 | scsi_adjust_queue_depth(device, MSG_ORDERED_TAG, | 4819 | scsi_adjust_queue_depth(device, MSG_ORDERED_TAG, |
6029 | boardp->dvc_var.asc_dvc_var.max_dvc_qng[device->id]); | 4820 | boardp->dvc_var.asc_dvc_var. |
6030 | } else { | 4821 | max_dvc_qng[device->id]); |
6031 | scsi_adjust_queue_depth(device, MSG_ORDERED_TAG, | 4822 | } else { |
6032 | boardp->dvc_var.adv_dvc_var.max_dvc_qng); | 4823 | scsi_adjust_queue_depth(device, MSG_ORDERED_TAG, |
6033 | } | 4824 | boardp->dvc_var.adv_dvc_var. |
6034 | } else { | 4825 | max_dvc_qng); |
6035 | scsi_adjust_queue_depth(device, 0, device->host->cmd_per_lun); | 4826 | } |
6036 | } | 4827 | } else { |
6037 | ASC_DBG4(1, "advansys_slave_configure: device 0x%lx, boardp 0x%lx, id %d, depth %d\n", | 4828 | scsi_adjust_queue_depth(device, 0, device->host->cmd_per_lun); |
6038 | (ulong) device, (ulong) boardp, device->id, device->queue_depth); | 4829 | } |
6039 | return 0; | 4830 | ASC_DBG4(1, |
4831 | "advansys_slave_configure: device 0x%lx, boardp 0x%lx, id %d, depth %d\n", | ||
4832 | (ulong)device, (ulong)boardp, device->id, device->queue_depth); | ||
4833 | return 0; | ||
6040 | } | 4834 | } |
6041 | 4835 | ||
6042 | /* | 4836 | /* |
@@ -6045,43 +4839,44 @@ advansys_slave_configure(struct scsi_device *device) | |||
6045 | * | 4839 | * |
6046 | * Interrupts can be enabled on entry. | 4840 | * Interrupts can be enabled on entry. |
6047 | */ | 4841 | */ |
6048 | STATIC void | 4842 | static void asc_scsi_done_list(struct scsi_cmnd *scp) |
6049 | asc_scsi_done_list(struct scsi_cmnd *scp) | ||
6050 | { | 4843 | { |
6051 | struct scsi_cmnd *tscp; | 4844 | struct scsi_cmnd *tscp; |
6052 | 4845 | ||
6053 | ASC_DBG(2, "asc_scsi_done_list: begin\n"); | 4846 | ASC_DBG(2, "asc_scsi_done_list: begin\n"); |
6054 | while (scp != NULL) { | 4847 | while (scp != NULL) { |
6055 | asc_board_t *boardp; | 4848 | asc_board_t *boardp; |
6056 | struct device *dev; | 4849 | struct device *dev; |
6057 | 4850 | ||
6058 | ASC_DBG1(3, "asc_scsi_done_list: scp 0x%lx\n", (ulong) scp); | 4851 | ASC_DBG1(3, "asc_scsi_done_list: scp 0x%lx\n", (ulong)scp); |
6059 | tscp = REQPNEXT(scp); | 4852 | tscp = REQPNEXT(scp); |
6060 | scp->host_scribble = NULL; | 4853 | scp->host_scribble = NULL; |
6061 | 4854 | ||
6062 | boardp = ASC_BOARDP(scp->device->host); | 4855 | boardp = ASC_BOARDP(scp->device->host); |
6063 | 4856 | ||
6064 | if (ASC_NARROW_BOARD(boardp)) | 4857 | if (ASC_NARROW_BOARD(boardp)) |
6065 | dev = boardp->dvc_cfg.asc_dvc_cfg.dev; | 4858 | dev = boardp->dvc_cfg.asc_dvc_cfg.dev; |
6066 | else | 4859 | else |
6067 | dev = boardp->dvc_cfg.adv_dvc_cfg.dev; | 4860 | dev = boardp->dvc_cfg.adv_dvc_cfg.dev; |
6068 | 4861 | ||
6069 | if (scp->use_sg) | 4862 | if (scp->use_sg) |
6070 | dma_unmap_sg(dev, (struct scatterlist *)scp->request_buffer, | 4863 | dma_unmap_sg(dev, |
6071 | scp->use_sg, scp->sc_data_direction); | 4864 | (struct scatterlist *)scp->request_buffer, |
6072 | else if (scp->request_bufflen) | 4865 | scp->use_sg, scp->sc_data_direction); |
6073 | dma_unmap_single(dev, scp->SCp.dma_handle, | 4866 | else if (scp->request_bufflen) |
6074 | scp->request_bufflen, scp->sc_data_direction); | 4867 | dma_unmap_single(dev, scp->SCp.dma_handle, |
4868 | scp->request_bufflen, | ||
4869 | scp->sc_data_direction); | ||
6075 | 4870 | ||
6076 | ASC_STATS(scp->device->host, done); | 4871 | ASC_STATS(scp->device->host, done); |
6077 | ASC_ASSERT(scp->scsi_done != NULL); | 4872 | ASC_ASSERT(scp->scsi_done != NULL); |
6078 | 4873 | ||
6079 | scp->scsi_done(scp); | 4874 | scp->scsi_done(scp); |
6080 | 4875 | ||
6081 | scp = tscp; | 4876 | scp = tscp; |
6082 | } | 4877 | } |
6083 | ASC_DBG(2, "asc_scsi_done_list: done\n"); | 4878 | ASC_DBG(2, "asc_scsi_done_list: done\n"); |
6084 | return; | 4879 | return; |
6085 | } | 4880 | } |
6086 | 4881 | ||
6087 | /* | 4882 | /* |
@@ -6130,168 +4925,170 @@ asc_scsi_done_list(struct scsi_cmnd *scp) | |||
6130 | * If ASC_BUSY is returned the request will be enqueued by the | 4925 | * If ASC_BUSY is returned the request will be enqueued by the |
6131 | * caller on the target's waiting queue and re-tried later. | 4926 | * caller on the target's waiting queue and re-tried later. |
6132 | */ | 4927 | */ |
6133 | STATIC int | 4928 | static int asc_execute_scsi_cmnd(struct scsi_cmnd *scp) |
6134 | asc_execute_scsi_cmnd(struct scsi_cmnd *scp) | ||
6135 | { | 4929 | { |
6136 | asc_board_t *boardp; | 4930 | asc_board_t *boardp; |
6137 | ASC_DVC_VAR *asc_dvc_varp; | 4931 | ASC_DVC_VAR *asc_dvc_varp; |
6138 | ADV_DVC_VAR *adv_dvc_varp; | 4932 | ADV_DVC_VAR *adv_dvc_varp; |
6139 | ADV_SCSI_REQ_Q *adv_scsiqp; | 4933 | ADV_SCSI_REQ_Q *adv_scsiqp; |
6140 | struct scsi_device *device; | 4934 | struct scsi_device *device; |
6141 | int ret; | 4935 | int ret; |
6142 | 4936 | ||
6143 | ASC_DBG2(1, "asc_execute_scsi_cmnd: scp 0x%lx, done 0x%lx\n", | 4937 | ASC_DBG2(1, "asc_execute_scsi_cmnd: scp 0x%lx, done 0x%lx\n", |
6144 | (ulong) scp, (ulong) scp->scsi_done); | 4938 | (ulong)scp, (ulong)scp->scsi_done); |
6145 | 4939 | ||
6146 | boardp = ASC_BOARDP(scp->device->host); | 4940 | boardp = ASC_BOARDP(scp->device->host); |
6147 | device = boardp->device[scp->device->id]; | 4941 | device = boardp->device[scp->device->id]; |
6148 | 4942 | ||
6149 | if (ASC_NARROW_BOARD(boardp)) { | 4943 | if (ASC_NARROW_BOARD(boardp)) { |
6150 | /* | 4944 | /* |
6151 | * Build and execute Narrow Board request. | 4945 | * Build and execute Narrow Board request. |
6152 | */ | 4946 | */ |
6153 | 4947 | ||
6154 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; | 4948 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; |
6155 | 4949 | ||
6156 | /* | 4950 | /* |
6157 | * Build Asc Library request structure using the | 4951 | * Build Asc Library request structure using the |
6158 | * global structures 'asc_scsi_req' and 'asc_sg_head'. | 4952 | * global structures 'asc_scsi_req' and 'asc_sg_head'. |
6159 | * | 4953 | * |
6160 | * If an error is returned, then the request has been | 4954 | * If an error is returned, then the request has been |
6161 | * queued on the board done queue. It will be completed | 4955 | * queued on the board done queue. It will be completed |
6162 | * by the caller. | 4956 | * by the caller. |
6163 | * | 4957 | * |
6164 | * asc_build_req() can not return ASC_BUSY. | 4958 | * asc_build_req() can not return ASC_BUSY. |
6165 | */ | 4959 | */ |
6166 | if (asc_build_req(boardp, scp) == ASC_ERROR) { | 4960 | if (asc_build_req(boardp, scp) == ASC_ERROR) { |
6167 | ASC_STATS(scp->device->host, build_error); | 4961 | ASC_STATS(scp->device->host, build_error); |
6168 | return ASC_ERROR; | 4962 | return ASC_ERROR; |
6169 | } | 4963 | } |
6170 | |||
6171 | /* | ||
6172 | * Execute the command. If there is no error, add the command | ||
6173 | * to the active queue. | ||
6174 | */ | ||
6175 | switch (ret = AscExeScsiQueue(asc_dvc_varp, &asc_scsi_q)) { | ||
6176 | case ASC_NOERROR: | ||
6177 | ASC_STATS(scp->device->host, exe_noerror); | ||
6178 | /* | ||
6179 | * Increment monotonically increasing per device successful | ||
6180 | * request counter. Wrapping doesn't matter. | ||
6181 | */ | ||
6182 | boardp->reqcnt[scp->device->id]++; | ||
6183 | asc_enqueue(&boardp->active, scp, ASC_BACK); | ||
6184 | ASC_DBG(1, | ||
6185 | "asc_execute_scsi_cmnd: AscExeScsiQueue(), ASC_NOERROR\n"); | ||
6186 | break; | ||
6187 | case ASC_BUSY: | ||
6188 | /* | ||
6189 | * Caller will enqueue request on the target's waiting queue | ||
6190 | * and retry later. | ||
6191 | */ | ||
6192 | ASC_STATS(scp->device->host, exe_busy); | ||
6193 | break; | ||
6194 | case ASC_ERROR: | ||
6195 | ASC_PRINT2( | ||
6196 | "asc_execute_scsi_cmnd: board %d: AscExeScsiQueue() ASC_ERROR, err_code 0x%x\n", | ||
6197 | boardp->id, asc_dvc_varp->err_code); | ||
6198 | ASC_STATS(scp->device->host, exe_error); | ||
6199 | scp->result = HOST_BYTE(DID_ERROR); | ||
6200 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
6201 | break; | ||
6202 | default: | ||
6203 | ASC_PRINT2( | ||
6204 | "asc_execute_scsi_cmnd: board %d: AscExeScsiQueue() unknown, err_code 0x%x\n", | ||
6205 | boardp->id, asc_dvc_varp->err_code); | ||
6206 | ASC_STATS(scp->device->host, exe_unknown); | ||
6207 | scp->result = HOST_BYTE(DID_ERROR); | ||
6208 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
6209 | break; | ||
6210 | } | ||
6211 | } else { | ||
6212 | /* | ||
6213 | * Build and execute Wide Board request. | ||
6214 | */ | ||
6215 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; | ||
6216 | |||
6217 | /* | ||
6218 | * Build and get a pointer to an Adv Library request structure. | ||
6219 | * | ||
6220 | * If the request is successfully built then send it below, | ||
6221 | * otherwise return with an error. | ||
6222 | */ | ||
6223 | switch (adv_build_req(boardp, scp, &adv_scsiqp)) { | ||
6224 | case ASC_NOERROR: | ||
6225 | ASC_DBG(3, "asc_execute_scsi_cmnd: adv_build_req ASC_NOERROR\n"); | ||
6226 | break; | ||
6227 | case ASC_BUSY: | ||
6228 | ASC_DBG(1, "asc_execute_scsi_cmnd: adv_build_req ASC_BUSY\n"); | ||
6229 | /* | ||
6230 | * If busy is returned the request has not been enqueued. | ||
6231 | * It will be enqueued by the caller on the target's waiting | ||
6232 | * queue and retried later. | ||
6233 | * | ||
6234 | * The asc_stats fields 'adv_build_noreq' and 'adv_build_nosg' | ||
6235 | * count wide board busy conditions. They are updated in | ||
6236 | * adv_build_req and adv_get_sglist, respectively. | ||
6237 | */ | ||
6238 | return ASC_BUSY; | ||
6239 | case ASC_ERROR: | ||
6240 | /* | ||
6241 | * If an error is returned, then the request has been | ||
6242 | * queued on the board done queue. It will be completed | ||
6243 | * by the caller. | ||
6244 | */ | ||
6245 | default: | ||
6246 | ASC_DBG(1, "asc_execute_scsi_cmnd: adv_build_req ASC_ERROR\n"); | ||
6247 | ASC_STATS(scp->device->host, build_error); | ||
6248 | return ASC_ERROR; | ||
6249 | } | ||
6250 | |||
6251 | /* | ||
6252 | * Execute the command. If there is no error, add the command | ||
6253 | * to the active queue. | ||
6254 | */ | ||
6255 | switch (ret = AdvExeScsiQueue(adv_dvc_varp, adv_scsiqp)) { | ||
6256 | case ASC_NOERROR: | ||
6257 | ASC_STATS(scp->device->host, exe_noerror); | ||
6258 | /* | ||
6259 | * Increment monotonically increasing per device successful | ||
6260 | * request counter. Wrapping doesn't matter. | ||
6261 | */ | ||
6262 | boardp->reqcnt[scp->device->id]++; | ||
6263 | asc_enqueue(&boardp->active, scp, ASC_BACK); | ||
6264 | ASC_DBG(1, | ||
6265 | "asc_execute_scsi_cmnd: AdvExeScsiQueue(), ASC_NOERROR\n"); | ||
6266 | break; | ||
6267 | case ASC_BUSY: | ||
6268 | /* | ||
6269 | * Caller will enqueue request on the target's waiting queue | ||
6270 | * and retry later. | ||
6271 | */ | ||
6272 | ASC_STATS(scp->device->host, exe_busy); | ||
6273 | break; | ||
6274 | case ASC_ERROR: | ||
6275 | ASC_PRINT2( | ||
6276 | "asc_execute_scsi_cmnd: board %d: AdvExeScsiQueue() ASC_ERROR, err_code 0x%x\n", | ||
6277 | boardp->id, adv_dvc_varp->err_code); | ||
6278 | ASC_STATS(scp->device->host, exe_error); | ||
6279 | scp->result = HOST_BYTE(DID_ERROR); | ||
6280 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
6281 | break; | ||
6282 | default: | ||
6283 | ASC_PRINT2( | ||
6284 | "asc_execute_scsi_cmnd: board %d: AdvExeScsiQueue() unknown, err_code 0x%x\n", | ||
6285 | boardp->id, adv_dvc_varp->err_code); | ||
6286 | ASC_STATS(scp->device->host, exe_unknown); | ||
6287 | scp->result = HOST_BYTE(DID_ERROR); | ||
6288 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
6289 | break; | ||
6290 | } | ||
6291 | } | ||
6292 | 4964 | ||
6293 | ASC_DBG(1, "asc_execute_scsi_cmnd: end\n"); | 4965 | /* |
6294 | return ret; | 4966 | * Execute the command. If there is no error, add the command |
4967 | * to the active queue. | ||
4968 | */ | ||
4969 | switch (ret = AscExeScsiQueue(asc_dvc_varp, &asc_scsi_q)) { | ||
4970 | case ASC_NOERROR: | ||
4971 | ASC_STATS(scp->device->host, exe_noerror); | ||
4972 | /* | ||
4973 | * Increment monotonically increasing per device successful | ||
4974 | * request counter. Wrapping doesn't matter. | ||
4975 | */ | ||
4976 | boardp->reqcnt[scp->device->id]++; | ||
4977 | asc_enqueue(&boardp->active, scp, ASC_BACK); | ||
4978 | ASC_DBG(1, | ||
4979 | "asc_execute_scsi_cmnd: AscExeScsiQueue(), ASC_NOERROR\n"); | ||
4980 | break; | ||
4981 | case ASC_BUSY: | ||
4982 | /* | ||
4983 | * Caller will enqueue request on the target's waiting queue | ||
4984 | * and retry later. | ||
4985 | */ | ||
4986 | ASC_STATS(scp->device->host, exe_busy); | ||
4987 | break; | ||
4988 | case ASC_ERROR: | ||
4989 | ASC_PRINT2 | ||
4990 | ("asc_execute_scsi_cmnd: board %d: AscExeScsiQueue() ASC_ERROR, err_code 0x%x\n", | ||
4991 | boardp->id, asc_dvc_varp->err_code); | ||
4992 | ASC_STATS(scp->device->host, exe_error); | ||
4993 | scp->result = HOST_BYTE(DID_ERROR); | ||
4994 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
4995 | break; | ||
4996 | default: | ||
4997 | ASC_PRINT2 | ||
4998 | ("asc_execute_scsi_cmnd: board %d: AscExeScsiQueue() unknown, err_code 0x%x\n", | ||
4999 | boardp->id, asc_dvc_varp->err_code); | ||
5000 | ASC_STATS(scp->device->host, exe_unknown); | ||
5001 | scp->result = HOST_BYTE(DID_ERROR); | ||
5002 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5003 | break; | ||
5004 | } | ||
5005 | } else { | ||
5006 | /* | ||
5007 | * Build and execute Wide Board request. | ||
5008 | */ | ||
5009 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; | ||
5010 | |||
5011 | /* | ||
5012 | * Build and get a pointer to an Adv Library request structure. | ||
5013 | * | ||
5014 | * If the request is successfully built then send it below, | ||
5015 | * otherwise return with an error. | ||
5016 | */ | ||
5017 | switch (adv_build_req(boardp, scp, &adv_scsiqp)) { | ||
5018 | case ASC_NOERROR: | ||
5019 | ASC_DBG(3, | ||
5020 | "asc_execute_scsi_cmnd: adv_build_req ASC_NOERROR\n"); | ||
5021 | break; | ||
5022 | case ASC_BUSY: | ||
5023 | ASC_DBG(1, | ||
5024 | "asc_execute_scsi_cmnd: adv_build_req ASC_BUSY\n"); | ||
5025 | /* | ||
5026 | * If busy is returned the request has not been enqueued. | ||
5027 | * It will be enqueued by the caller on the target's waiting | ||
5028 | * queue and retried later. | ||
5029 | * | ||
5030 | * The asc_stats fields 'adv_build_noreq' and 'adv_build_nosg' | ||
5031 | * count wide board busy conditions. They are updated in | ||
5032 | * adv_build_req and adv_get_sglist, respectively. | ||
5033 | */ | ||
5034 | return ASC_BUSY; | ||
5035 | case ASC_ERROR: | ||
5036 | /* | ||
5037 | * If an error is returned, then the request has been | ||
5038 | * queued on the board done queue. It will be completed | ||
5039 | * by the caller. | ||
5040 | */ | ||
5041 | default: | ||
5042 | ASC_DBG(1, | ||
5043 | "asc_execute_scsi_cmnd: adv_build_req ASC_ERROR\n"); | ||
5044 | ASC_STATS(scp->device->host, build_error); | ||
5045 | return ASC_ERROR; | ||
5046 | } | ||
5047 | |||
5048 | /* | ||
5049 | * Execute the command. If there is no error, add the command | ||
5050 | * to the active queue. | ||
5051 | */ | ||
5052 | switch (ret = AdvExeScsiQueue(adv_dvc_varp, adv_scsiqp)) { | ||
5053 | case ASC_NOERROR: | ||
5054 | ASC_STATS(scp->device->host, exe_noerror); | ||
5055 | /* | ||
5056 | * Increment monotonically increasing per device successful | ||
5057 | * request counter. Wrapping doesn't matter. | ||
5058 | */ | ||
5059 | boardp->reqcnt[scp->device->id]++; | ||
5060 | asc_enqueue(&boardp->active, scp, ASC_BACK); | ||
5061 | ASC_DBG(1, | ||
5062 | "asc_execute_scsi_cmnd: AdvExeScsiQueue(), ASC_NOERROR\n"); | ||
5063 | break; | ||
5064 | case ASC_BUSY: | ||
5065 | /* | ||
5066 | * Caller will enqueue request on the target's waiting queue | ||
5067 | * and retry later. | ||
5068 | */ | ||
5069 | ASC_STATS(scp->device->host, exe_busy); | ||
5070 | break; | ||
5071 | case ASC_ERROR: | ||
5072 | ASC_PRINT2 | ||
5073 | ("asc_execute_scsi_cmnd: board %d: AdvExeScsiQueue() ASC_ERROR, err_code 0x%x\n", | ||
5074 | boardp->id, adv_dvc_varp->err_code); | ||
5075 | ASC_STATS(scp->device->host, exe_error); | ||
5076 | scp->result = HOST_BYTE(DID_ERROR); | ||
5077 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5078 | break; | ||
5079 | default: | ||
5080 | ASC_PRINT2 | ||
5081 | ("asc_execute_scsi_cmnd: board %d: AdvExeScsiQueue() unknown, err_code 0x%x\n", | ||
5082 | boardp->id, adv_dvc_varp->err_code); | ||
5083 | ASC_STATS(scp->device->host, exe_unknown); | ||
5084 | scp->result = HOST_BYTE(DID_ERROR); | ||
5085 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5086 | break; | ||
5087 | } | ||
5088 | } | ||
5089 | |||
5090 | ASC_DBG(1, "asc_execute_scsi_cmnd: end\n"); | ||
5091 | return ret; | ||
6295 | } | 5092 | } |
6296 | 5093 | ||
6297 | /* | 5094 | /* |
@@ -6303,131 +5100,140 @@ asc_execute_scsi_cmnd(struct scsi_cmnd *scp) | |||
6303 | * If an error occurs, then queue the request on the board done | 5100 | * If an error occurs, then queue the request on the board done |
6304 | * queue and return ASC_ERROR. | 5101 | * queue and return ASC_ERROR. |
6305 | */ | 5102 | */ |
6306 | STATIC int | 5103 | static int asc_build_req(asc_board_t *boardp, struct scsi_cmnd *scp) |
6307 | asc_build_req(asc_board_t *boardp, struct scsi_cmnd *scp) | ||
6308 | { | 5104 | { |
6309 | struct device *dev = boardp->dvc_cfg.asc_dvc_cfg.dev; | 5105 | struct device *dev = boardp->dvc_cfg.asc_dvc_cfg.dev; |
6310 | 5106 | ||
6311 | /* | 5107 | /* |
6312 | * Mutually exclusive access is required to 'asc_scsi_q' and | 5108 | * Mutually exclusive access is required to 'asc_scsi_q' and |
6313 | * 'asc_sg_head' until after the request is started. | 5109 | * 'asc_sg_head' until after the request is started. |
6314 | */ | 5110 | */ |
6315 | memset(&asc_scsi_q, 0, sizeof(ASC_SCSI_Q)); | 5111 | memset(&asc_scsi_q, 0, sizeof(ASC_SCSI_Q)); |
6316 | 5112 | ||
6317 | /* | 5113 | /* |
6318 | * Point the ASC_SCSI_Q to the 'struct scsi_cmnd'. | 5114 | * Point the ASC_SCSI_Q to the 'struct scsi_cmnd'. |
6319 | */ | 5115 | */ |
6320 | asc_scsi_q.q2.srb_ptr = ASC_VADDR_TO_U32(scp); | 5116 | asc_scsi_q.q2.srb_ptr = ASC_VADDR_TO_U32(scp); |
6321 | 5117 | ||
6322 | /* | 5118 | /* |
6323 | * Build the ASC_SCSI_Q request. | 5119 | * Build the ASC_SCSI_Q request. |
6324 | * | 5120 | * |
6325 | * For narrow boards a CDB length maximum of 12 bytes | 5121 | * For narrow boards a CDB length maximum of 12 bytes |
6326 | * is supported. | 5122 | * is supported. |
6327 | */ | 5123 | */ |
6328 | if (scp->cmd_len > ASC_MAX_CDB_LEN) { | 5124 | if (scp->cmd_len > ASC_MAX_CDB_LEN) { |
6329 | ASC_PRINT3( | 5125 | ASC_PRINT3 |
6330 | "asc_build_req: board %d: cmd_len %d > ASC_MAX_CDB_LEN %d\n", | 5126 | ("asc_build_req: board %d: cmd_len %d > ASC_MAX_CDB_LEN %d\n", |
6331 | boardp->id, scp->cmd_len, ASC_MAX_CDB_LEN); | 5127 | boardp->id, scp->cmd_len, ASC_MAX_CDB_LEN); |
6332 | scp->result = HOST_BYTE(DID_ERROR); | 5128 | scp->result = HOST_BYTE(DID_ERROR); |
6333 | asc_enqueue(&boardp->done, scp, ASC_BACK); | 5129 | asc_enqueue(&boardp->done, scp, ASC_BACK); |
6334 | return ASC_ERROR; | 5130 | return ASC_ERROR; |
6335 | } | 5131 | } |
6336 | asc_scsi_q.cdbptr = &scp->cmnd[0]; | 5132 | asc_scsi_q.cdbptr = &scp->cmnd[0]; |
6337 | asc_scsi_q.q2.cdb_len = scp->cmd_len; | 5133 | asc_scsi_q.q2.cdb_len = scp->cmd_len; |
6338 | asc_scsi_q.q1.target_id = ASC_TID_TO_TARGET_ID(scp->device->id); | 5134 | asc_scsi_q.q1.target_id = ASC_TID_TO_TARGET_ID(scp->device->id); |
6339 | asc_scsi_q.q1.target_lun = scp->device->lun; | 5135 | asc_scsi_q.q1.target_lun = scp->device->lun; |
6340 | asc_scsi_q.q2.target_ix = ASC_TIDLUN_TO_IX(scp->device->id, scp->device->lun); | 5136 | asc_scsi_q.q2.target_ix = |
6341 | asc_scsi_q.q1.sense_addr = cpu_to_le32(virt_to_bus(&scp->sense_buffer[0])); | 5137 | ASC_TIDLUN_TO_IX(scp->device->id, scp->device->lun); |
6342 | asc_scsi_q.q1.sense_len = sizeof(scp->sense_buffer); | 5138 | asc_scsi_q.q1.sense_addr = |
5139 | cpu_to_le32(virt_to_bus(&scp->sense_buffer[0])); | ||
5140 | asc_scsi_q.q1.sense_len = sizeof(scp->sense_buffer); | ||
5141 | |||
5142 | /* | ||
5143 | * If there are any outstanding requests for the current target, | ||
5144 | * then every 255th request send an ORDERED request. This heuristic | ||
5145 | * tries to retain the benefit of request sorting while preventing | ||
5146 | * request starvation. 255 is the max number of tags or pending commands | ||
5147 | * a device may have outstanding. | ||
5148 | * | ||
5149 | * The request count is incremented below for every successfully | ||
5150 | * started request. | ||
5151 | * | ||
5152 | */ | ||
5153 | if ((boardp->dvc_var.asc_dvc_var.cur_dvc_qng[scp->device->id] > 0) && | ||
5154 | (boardp->reqcnt[scp->device->id] % 255) == 0) { | ||
5155 | asc_scsi_q.q2.tag_code = MSG_ORDERED_TAG; | ||
5156 | } else { | ||
5157 | asc_scsi_q.q2.tag_code = MSG_SIMPLE_TAG; | ||
5158 | } | ||
6343 | 5159 | ||
6344 | /* | 5160 | /* |
6345 | * If there are any outstanding requests for the current target, | 5161 | * Build ASC_SCSI_Q for a contiguous buffer or a scatter-gather |
6346 | * then every 255th request send an ORDERED request. This heuristic | 5162 | * buffer command. |
6347 | * tries to retain the benefit of request sorting while preventing | 5163 | */ |
6348 | * request starvation. 255 is the max number of tags or pending commands | 5164 | if (scp->use_sg == 0) { |
6349 | * a device may have outstanding. | 5165 | /* |
6350 | * | 5166 | * CDB request of single contiguous buffer. |
6351 | * The request count is incremented below for every successfully | 5167 | */ |
6352 | * started request. | 5168 | ASC_STATS(scp->device->host, cont_cnt); |
6353 | * | 5169 | scp->SCp.dma_handle = scp->request_bufflen ? |
6354 | */ | 5170 | dma_map_single(dev, scp->request_buffer, |
6355 | if ((boardp->dvc_var.asc_dvc_var.cur_dvc_qng[scp->device->id] > 0) && | 5171 | scp->request_bufflen, |
6356 | (boardp->reqcnt[scp->device->id] % 255) == 0) { | 5172 | scp->sc_data_direction) : 0; |
6357 | asc_scsi_q.q2.tag_code = MSG_ORDERED_TAG; | 5173 | asc_scsi_q.q1.data_addr = cpu_to_le32(scp->SCp.dma_handle); |
6358 | } else { | 5174 | asc_scsi_q.q1.data_cnt = cpu_to_le32(scp->request_bufflen); |
6359 | asc_scsi_q.q2.tag_code = MSG_SIMPLE_TAG; | 5175 | ASC_STATS_ADD(scp->device->host, cont_xfer, |
6360 | } | 5176 | ASC_CEILING(scp->request_bufflen, 512)); |
5177 | asc_scsi_q.q1.sg_queue_cnt = 0; | ||
5178 | asc_scsi_q.sg_head = NULL; | ||
5179 | } else { | ||
5180 | /* | ||
5181 | * CDB scatter-gather request list. | ||
5182 | */ | ||
5183 | int sgcnt; | ||
5184 | int use_sg; | ||
5185 | struct scatterlist *slp; | ||
5186 | |||
5187 | slp = (struct scatterlist *)scp->request_buffer; | ||
5188 | use_sg = | ||
5189 | dma_map_sg(dev, slp, scp->use_sg, scp->sc_data_direction); | ||
5190 | |||
5191 | if (use_sg > scp->device->host->sg_tablesize) { | ||
5192 | ASC_PRINT3 | ||
5193 | ("asc_build_req: board %d: use_sg %d > sg_tablesize %d\n", | ||
5194 | boardp->id, use_sg, | ||
5195 | scp->device->host->sg_tablesize); | ||
5196 | dma_unmap_sg(dev, slp, scp->use_sg, | ||
5197 | scp->sc_data_direction); | ||
5198 | scp->result = HOST_BYTE(DID_ERROR); | ||
5199 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5200 | return ASC_ERROR; | ||
5201 | } | ||
5202 | |||
5203 | ASC_STATS(scp->device->host, sg_cnt); | ||
6361 | 5204 | ||
6362 | /* | 5205 | /* |
6363 | * Build ASC_SCSI_Q for a contiguous buffer or a scatter-gather | 5206 | * Use global ASC_SG_HEAD structure and set the ASC_SCSI_Q |
6364 | * buffer command. | 5207 | * structure to point to it. |
6365 | */ | 5208 | */ |
6366 | if (scp->use_sg == 0) { | 5209 | memset(&asc_sg_head, 0, sizeof(ASC_SG_HEAD)); |
6367 | /* | 5210 | |
6368 | * CDB request of single contiguous buffer. | 5211 | asc_scsi_q.q1.cntl |= QC_SG_HEAD; |
6369 | */ | 5212 | asc_scsi_q.sg_head = &asc_sg_head; |
6370 | ASC_STATS(scp->device->host, cont_cnt); | 5213 | asc_scsi_q.q1.data_cnt = 0; |
6371 | scp->SCp.dma_handle = scp->request_bufflen ? | 5214 | asc_scsi_q.q1.data_addr = 0; |
6372 | dma_map_single(dev, scp->request_buffer, | 5215 | /* This is a byte value, otherwise it would need to be swapped. */ |
6373 | scp->request_bufflen, scp->sc_data_direction) : 0; | 5216 | asc_sg_head.entry_cnt = asc_scsi_q.q1.sg_queue_cnt = use_sg; |
6374 | asc_scsi_q.q1.data_addr = cpu_to_le32(scp->SCp.dma_handle); | 5217 | ASC_STATS_ADD(scp->device->host, sg_elem, |
6375 | asc_scsi_q.q1.data_cnt = cpu_to_le32(scp->request_bufflen); | 5218 | asc_sg_head.entry_cnt); |
6376 | ASC_STATS_ADD(scp->device->host, cont_xfer, | ||
6377 | ASC_CEILING(scp->request_bufflen, 512)); | ||
6378 | asc_scsi_q.q1.sg_queue_cnt = 0; | ||
6379 | asc_scsi_q.sg_head = NULL; | ||
6380 | } else { | ||
6381 | /* | ||
6382 | * CDB scatter-gather request list. | ||
6383 | */ | ||
6384 | int sgcnt; | ||
6385 | int use_sg; | ||
6386 | struct scatterlist *slp; | ||
6387 | 5219 | ||
6388 | slp = (struct scatterlist *)scp->request_buffer; | 5220 | /* |
6389 | use_sg = dma_map_sg(dev, slp, scp->use_sg, scp->sc_data_direction); | 5221 | * Convert scatter-gather list into ASC_SG_HEAD list. |
6390 | 5222 | */ | |
6391 | if (use_sg > scp->device->host->sg_tablesize) { | 5223 | for (sgcnt = 0; sgcnt < use_sg; sgcnt++, slp++) { |
6392 | ASC_PRINT3( | 5224 | asc_sg_head.sg_list[sgcnt].addr = |
6393 | "asc_build_req: board %d: use_sg %d > sg_tablesize %d\n", | 5225 | cpu_to_le32(sg_dma_address(slp)); |
6394 | boardp->id, use_sg, scp->device->host->sg_tablesize); | 5226 | asc_sg_head.sg_list[sgcnt].bytes = |
6395 | dma_unmap_sg(dev, slp, scp->use_sg, scp->sc_data_direction); | 5227 | cpu_to_le32(sg_dma_len(slp)); |
6396 | scp->result = HOST_BYTE(DID_ERROR); | 5228 | ASC_STATS_ADD(scp->device->host, sg_xfer, |
6397 | asc_enqueue(&boardp->done, scp, ASC_BACK); | 5229 | ASC_CEILING(sg_dma_len(slp), 512)); |
6398 | return ASC_ERROR; | 5230 | } |
6399 | } | 5231 | } |
6400 | |||
6401 | ASC_STATS(scp->device->host, sg_cnt); | ||
6402 | |||
6403 | /* | ||
6404 | * Use global ASC_SG_HEAD structure and set the ASC_SCSI_Q | ||
6405 | * structure to point to it. | ||
6406 | */ | ||
6407 | memset(&asc_sg_head, 0, sizeof(ASC_SG_HEAD)); | ||
6408 | |||
6409 | asc_scsi_q.q1.cntl |= QC_SG_HEAD; | ||
6410 | asc_scsi_q.sg_head = &asc_sg_head; | ||
6411 | asc_scsi_q.q1.data_cnt = 0; | ||
6412 | asc_scsi_q.q1.data_addr = 0; | ||
6413 | /* This is a byte value, otherwise it would need to be swapped. */ | ||
6414 | asc_sg_head.entry_cnt = asc_scsi_q.q1.sg_queue_cnt = use_sg; | ||
6415 | ASC_STATS_ADD(scp->device->host, sg_elem, asc_sg_head.entry_cnt); | ||
6416 | |||
6417 | /* | ||
6418 | * Convert scatter-gather list into ASC_SG_HEAD list. | ||
6419 | */ | ||
6420 | for (sgcnt = 0; sgcnt < use_sg; sgcnt++, slp++) { | ||
6421 | asc_sg_head.sg_list[sgcnt].addr = cpu_to_le32(sg_dma_address(slp)); | ||
6422 | asc_sg_head.sg_list[sgcnt].bytes = cpu_to_le32(sg_dma_len(slp)); | ||
6423 | ASC_STATS_ADD(scp->device->host, sg_xfer, ASC_CEILING(sg_dma_len(slp), 512)); | ||
6424 | } | ||
6425 | } | ||
6426 | 5232 | ||
6427 | ASC_DBG_PRT_ASC_SCSI_Q(2, &asc_scsi_q); | 5233 | ASC_DBG_PRT_ASC_SCSI_Q(2, &asc_scsi_q); |
6428 | ASC_DBG_PRT_CDB(1, scp->cmnd, scp->cmd_len); | 5234 | ASC_DBG_PRT_CDB(1, scp->cmnd, scp->cmd_len); |
6429 | 5235 | ||
6430 | return ASC_NOERROR; | 5236 | return ASC_NOERROR; |
6431 | } | 5237 | } |
6432 | 5238 | ||
6433 | /* | 5239 | /* |
@@ -6440,162 +5246,168 @@ asc_build_req(asc_board_t *boardp, struct scsi_cmnd *scp) | |||
6440 | * microcode for DMA addresses or math operations are byte swapped | 5246 | * microcode for DMA addresses or math operations are byte swapped |
6441 | * to little-endian order. | 5247 | * to little-endian order. |
6442 | */ | 5248 | */ |
6443 | STATIC int | 5249 | static int |
6444 | adv_build_req(asc_board_t *boardp, struct scsi_cmnd *scp, | 5250 | adv_build_req(asc_board_t *boardp, struct scsi_cmnd *scp, |
6445 | ADV_SCSI_REQ_Q **adv_scsiqpp) | 5251 | ADV_SCSI_REQ_Q **adv_scsiqpp) |
6446 | { | 5252 | { |
6447 | adv_req_t *reqp; | 5253 | adv_req_t *reqp; |
6448 | ADV_SCSI_REQ_Q *scsiqp; | 5254 | ADV_SCSI_REQ_Q *scsiqp; |
6449 | int i; | 5255 | int i; |
6450 | int ret; | 5256 | int ret; |
6451 | struct device *dev = boardp->dvc_cfg.adv_dvc_cfg.dev; | 5257 | struct device *dev = boardp->dvc_cfg.adv_dvc_cfg.dev; |
6452 | 5258 | ||
6453 | /* | 5259 | /* |
6454 | * Allocate an adv_req_t structure from the board to execute | 5260 | * Allocate an adv_req_t structure from the board to execute |
6455 | * the command. | 5261 | * the command. |
6456 | */ | 5262 | */ |
6457 | if (boardp->adv_reqp == NULL) { | 5263 | if (boardp->adv_reqp == NULL) { |
6458 | ASC_DBG(1, "adv_build_req: no free adv_req_t\n"); | 5264 | ASC_DBG(1, "adv_build_req: no free adv_req_t\n"); |
6459 | ASC_STATS(scp->device->host, adv_build_noreq); | 5265 | ASC_STATS(scp->device->host, adv_build_noreq); |
6460 | return ASC_BUSY; | 5266 | return ASC_BUSY; |
6461 | } else { | 5267 | } else { |
6462 | reqp = boardp->adv_reqp; | 5268 | reqp = boardp->adv_reqp; |
6463 | boardp->adv_reqp = reqp->next_reqp; | 5269 | boardp->adv_reqp = reqp->next_reqp; |
6464 | reqp->next_reqp = NULL; | 5270 | reqp->next_reqp = NULL; |
6465 | } | 5271 | } |
6466 | |||
6467 | /* | ||
6468 | * Get 32-byte aligned ADV_SCSI_REQ_Q and ADV_SG_BLOCK pointers. | ||
6469 | */ | ||
6470 | scsiqp = (ADV_SCSI_REQ_Q *) ADV_32BALIGN(&reqp->scsi_req_q); | ||
6471 | |||
6472 | /* | ||
6473 | * Initialize the structure. | ||
6474 | */ | ||
6475 | scsiqp->cntl = scsiqp->scsi_cntl = scsiqp->done_status = 0; | ||
6476 | |||
6477 | /* | ||
6478 | * Set the ADV_SCSI_REQ_Q 'srb_ptr' to point to the adv_req_t structure. | ||
6479 | */ | ||
6480 | scsiqp->srb_ptr = ASC_VADDR_TO_U32(reqp); | ||
6481 | |||
6482 | /* | ||
6483 | * Set the adv_req_t 'cmndp' to point to the struct scsi_cmnd structure. | ||
6484 | */ | ||
6485 | reqp->cmndp = scp; | ||
6486 | 5272 | ||
6487 | /* | 5273 | /* |
6488 | * Build the ADV_SCSI_REQ_Q request. | 5274 | * Get 32-byte aligned ADV_SCSI_REQ_Q and ADV_SG_BLOCK pointers. |
6489 | */ | 5275 | */ |
5276 | scsiqp = (ADV_SCSI_REQ_Q *)ADV_32BALIGN(&reqp->scsi_req_q); | ||
5277 | |||
5278 | /* | ||
5279 | * Initialize the structure. | ||
5280 | */ | ||
5281 | scsiqp->cntl = scsiqp->scsi_cntl = scsiqp->done_status = 0; | ||
5282 | |||
5283 | /* | ||
5284 | * Set the ADV_SCSI_REQ_Q 'srb_ptr' to point to the adv_req_t structure. | ||
5285 | */ | ||
5286 | scsiqp->srb_ptr = ASC_VADDR_TO_U32(reqp); | ||
5287 | |||
5288 | /* | ||
5289 | * Set the adv_req_t 'cmndp' to point to the struct scsi_cmnd structure. | ||
5290 | */ | ||
5291 | reqp->cmndp = scp; | ||
5292 | |||
5293 | /* | ||
5294 | * Build the ADV_SCSI_REQ_Q request. | ||
5295 | */ | ||
5296 | |||
5297 | /* | ||
5298 | * Set CDB length and copy it to the request structure. | ||
5299 | * For wide boards a CDB length maximum of 16 bytes | ||
5300 | * is supported. | ||
5301 | */ | ||
5302 | if (scp->cmd_len > ADV_MAX_CDB_LEN) { | ||
5303 | ASC_PRINT3 | ||
5304 | ("adv_build_req: board %d: cmd_len %d > ADV_MAX_CDB_LEN %d\n", | ||
5305 | boardp->id, scp->cmd_len, ADV_MAX_CDB_LEN); | ||
5306 | scp->result = HOST_BYTE(DID_ERROR); | ||
5307 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5308 | return ASC_ERROR; | ||
5309 | } | ||
5310 | scsiqp->cdb_len = scp->cmd_len; | ||
5311 | /* Copy first 12 CDB bytes to cdb[]. */ | ||
5312 | for (i = 0; i < scp->cmd_len && i < 12; i++) { | ||
5313 | scsiqp->cdb[i] = scp->cmnd[i]; | ||
5314 | } | ||
5315 | /* Copy last 4 CDB bytes, if present, to cdb16[]. */ | ||
5316 | for (; i < scp->cmd_len; i++) { | ||
5317 | scsiqp->cdb16[i - 12] = scp->cmnd[i]; | ||
5318 | } | ||
6490 | 5319 | ||
6491 | /* | 5320 | scsiqp->target_id = scp->device->id; |
6492 | * Set CDB length and copy it to the request structure. | 5321 | scsiqp->target_lun = scp->device->lun; |
6493 | * For wide boards a CDB length maximum of 16 bytes | ||
6494 | * is supported. | ||
6495 | */ | ||
6496 | if (scp->cmd_len > ADV_MAX_CDB_LEN) { | ||
6497 | ASC_PRINT3( | ||
6498 | "adv_build_req: board %d: cmd_len %d > ADV_MAX_CDB_LEN %d\n", | ||
6499 | boardp->id, scp->cmd_len, ADV_MAX_CDB_LEN); | ||
6500 | scp->result = HOST_BYTE(DID_ERROR); | ||
6501 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
6502 | return ASC_ERROR; | ||
6503 | } | ||
6504 | scsiqp->cdb_len = scp->cmd_len; | ||
6505 | /* Copy first 12 CDB bytes to cdb[]. */ | ||
6506 | for (i = 0; i < scp->cmd_len && i < 12; i++) { | ||
6507 | scsiqp->cdb[i] = scp->cmnd[i]; | ||
6508 | } | ||
6509 | /* Copy last 4 CDB bytes, if present, to cdb16[]. */ | ||
6510 | for (; i < scp->cmd_len; i++) { | ||
6511 | scsiqp->cdb16[i - 12] = scp->cmnd[i]; | ||
6512 | } | ||
6513 | 5322 | ||
6514 | scsiqp->target_id = scp->device->id; | 5323 | scsiqp->sense_addr = cpu_to_le32(virt_to_bus(&scp->sense_buffer[0])); |
6515 | scsiqp->target_lun = scp->device->lun; | 5324 | scsiqp->sense_len = sizeof(scp->sense_buffer); |
6516 | 5325 | ||
6517 | scsiqp->sense_addr = cpu_to_le32(virt_to_bus(&scp->sense_buffer[0])); | 5326 | /* |
6518 | scsiqp->sense_len = sizeof(scp->sense_buffer); | 5327 | * Build ADV_SCSI_REQ_Q for a contiguous buffer or a scatter-gather |
5328 | * buffer command. | ||
5329 | */ | ||
6519 | 5330 | ||
6520 | /* | ||
6521 | * Build ADV_SCSI_REQ_Q for a contiguous buffer or a scatter-gather | ||
6522 | * buffer command. | ||
6523 | */ | ||
6524 | |||
6525 | scsiqp->data_cnt = cpu_to_le32(scp->request_bufflen); | ||
6526 | scsiqp->vdata_addr = scp->request_buffer; | ||
6527 | scsiqp->data_addr = cpu_to_le32(virt_to_bus(scp->request_buffer)); | ||
6528 | |||
6529 | if (scp->use_sg == 0) { | ||
6530 | /* | ||
6531 | * CDB request of single contiguous buffer. | ||
6532 | */ | ||
6533 | reqp->sgblkp = NULL; | ||
6534 | scsiqp->data_cnt = cpu_to_le32(scp->request_bufflen); | 5331 | scsiqp->data_cnt = cpu_to_le32(scp->request_bufflen); |
6535 | if (scp->request_bufflen) { | 5332 | scsiqp->vdata_addr = scp->request_buffer; |
6536 | scsiqp->vdata_addr = scp->request_buffer; | 5333 | scsiqp->data_addr = cpu_to_le32(virt_to_bus(scp->request_buffer)); |
6537 | scp->SCp.dma_handle = | ||
6538 | dma_map_single(dev, scp->request_buffer, | ||
6539 | scp->request_bufflen, scp->sc_data_direction); | ||
6540 | } else { | ||
6541 | scsiqp->vdata_addr = NULL; | ||
6542 | scp->SCp.dma_handle = 0; | ||
6543 | } | ||
6544 | scsiqp->data_addr = cpu_to_le32(scp->SCp.dma_handle); | ||
6545 | scsiqp->sg_list_ptr = NULL; | ||
6546 | scsiqp->sg_real_addr = 0; | ||
6547 | ASC_STATS(scp->device->host, cont_cnt); | ||
6548 | ASC_STATS_ADD(scp->device->host, cont_xfer, | ||
6549 | ASC_CEILING(scp->request_bufflen, 512)); | ||
6550 | } else { | ||
6551 | /* | ||
6552 | * CDB scatter-gather request list. | ||
6553 | */ | ||
6554 | struct scatterlist *slp; | ||
6555 | int use_sg; | ||
6556 | 5334 | ||
6557 | slp = (struct scatterlist *)scp->request_buffer; | 5335 | if (scp->use_sg == 0) { |
6558 | use_sg = dma_map_sg(dev, slp, scp->use_sg, scp->sc_data_direction); | 5336 | /* |
6559 | 5337 | * CDB request of single contiguous buffer. | |
6560 | if (use_sg > ADV_MAX_SG_LIST) { | 5338 | */ |
6561 | ASC_PRINT3( | 5339 | reqp->sgblkp = NULL; |
6562 | "adv_build_req: board %d: use_sg %d > ADV_MAX_SG_LIST %d\n", | 5340 | scsiqp->data_cnt = cpu_to_le32(scp->request_bufflen); |
6563 | boardp->id, use_sg, scp->device->host->sg_tablesize); | 5341 | if (scp->request_bufflen) { |
6564 | dma_unmap_sg(dev, slp, scp->use_sg, scp->sc_data_direction); | 5342 | scsiqp->vdata_addr = scp->request_buffer; |
6565 | scp->result = HOST_BYTE(DID_ERROR); | 5343 | scp->SCp.dma_handle = |
6566 | asc_enqueue(&boardp->done, scp, ASC_BACK); | 5344 | dma_map_single(dev, scp->request_buffer, |
6567 | 5345 | scp->request_bufflen, | |
6568 | /* | 5346 | scp->sc_data_direction); |
6569 | * Free the 'adv_req_t' structure by adding it back to the | 5347 | } else { |
6570 | * board free list. | 5348 | scsiqp->vdata_addr = NULL; |
6571 | */ | 5349 | scp->SCp.dma_handle = 0; |
6572 | reqp->next_reqp = boardp->adv_reqp; | 5350 | } |
6573 | boardp->adv_reqp = reqp; | 5351 | scsiqp->data_addr = cpu_to_le32(scp->SCp.dma_handle); |
6574 | 5352 | scsiqp->sg_list_ptr = NULL; | |
6575 | return ASC_ERROR; | 5353 | scsiqp->sg_real_addr = 0; |
6576 | } | 5354 | ASC_STATS(scp->device->host, cont_cnt); |
6577 | 5355 | ASC_STATS_ADD(scp->device->host, cont_xfer, | |
6578 | if ((ret = adv_get_sglist(boardp, reqp, scp, use_sg)) != ADV_SUCCESS) { | 5356 | ASC_CEILING(scp->request_bufflen, 512)); |
6579 | /* | 5357 | } else { |
6580 | * Free the adv_req_t structure by adding it back to the | 5358 | /* |
6581 | * board free list. | 5359 | * CDB scatter-gather request list. |
6582 | */ | 5360 | */ |
6583 | reqp->next_reqp = boardp->adv_reqp; | 5361 | struct scatterlist *slp; |
6584 | boardp->adv_reqp = reqp; | 5362 | int use_sg; |
6585 | 5363 | ||
6586 | return ret; | 5364 | slp = (struct scatterlist *)scp->request_buffer; |
6587 | } | 5365 | use_sg = |
6588 | 5366 | dma_map_sg(dev, slp, scp->use_sg, scp->sc_data_direction); | |
6589 | ASC_STATS(scp->device->host, sg_cnt); | 5367 | |
6590 | ASC_STATS_ADD(scp->device->host, sg_elem, use_sg); | 5368 | if (use_sg > ADV_MAX_SG_LIST) { |
6591 | } | 5369 | ASC_PRINT3 |
5370 | ("adv_build_req: board %d: use_sg %d > ADV_MAX_SG_LIST %d\n", | ||
5371 | boardp->id, use_sg, | ||
5372 | scp->device->host->sg_tablesize); | ||
5373 | dma_unmap_sg(dev, slp, scp->use_sg, | ||
5374 | scp->sc_data_direction); | ||
5375 | scp->result = HOST_BYTE(DID_ERROR); | ||
5376 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
5377 | |||
5378 | /* | ||
5379 | * Free the 'adv_req_t' structure by adding it back to the | ||
5380 | * board free list. | ||
5381 | */ | ||
5382 | reqp->next_reqp = boardp->adv_reqp; | ||
5383 | boardp->adv_reqp = reqp; | ||
5384 | |||
5385 | return ASC_ERROR; | ||
5386 | } | ||
5387 | |||
5388 | if ((ret = | ||
5389 | adv_get_sglist(boardp, reqp, scp, | ||
5390 | use_sg)) != ADV_SUCCESS) { | ||
5391 | /* | ||
5392 | * Free the adv_req_t structure by adding it back to the | ||
5393 | * board free list. | ||
5394 | */ | ||
5395 | reqp->next_reqp = boardp->adv_reqp; | ||
5396 | boardp->adv_reqp = reqp; | ||
5397 | |||
5398 | return ret; | ||
5399 | } | ||
5400 | |||
5401 | ASC_STATS(scp->device->host, sg_cnt); | ||
5402 | ASC_STATS_ADD(scp->device->host, sg_elem, use_sg); | ||
5403 | } | ||
6592 | 5404 | ||
6593 | ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp); | 5405 | ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp); |
6594 | ASC_DBG_PRT_CDB(1, scp->cmnd, scp->cmd_len); | 5406 | ASC_DBG_PRT_CDB(1, scp->cmnd, scp->cmd_len); |
6595 | 5407 | ||
6596 | *adv_scsiqpp = scsiqp; | 5408 | *adv_scsiqpp = scsiqp; |
6597 | 5409 | ||
6598 | return ASC_NOERROR; | 5410 | return ASC_NOERROR; |
6599 | } | 5411 | } |
6600 | 5412 | ||
6601 | /* | 5413 | /* |
@@ -6610,108 +5422,109 @@ adv_build_req(asc_board_t *boardp, struct scsi_cmnd *scp, | |||
6610 | * ADV_SUCCESS(1) - SG List successfully created | 5422 | * ADV_SUCCESS(1) - SG List successfully created |
6611 | * ADV_ERROR(-1) - SG List creation failed | 5423 | * ADV_ERROR(-1) - SG List creation failed |
6612 | */ | 5424 | */ |
6613 | STATIC int | 5425 | static int |
6614 | adv_get_sglist(asc_board_t *boardp, adv_req_t *reqp, struct scsi_cmnd *scp, int use_sg) | 5426 | adv_get_sglist(asc_board_t *boardp, adv_req_t *reqp, struct scsi_cmnd *scp, |
5427 | int use_sg) | ||
6615 | { | 5428 | { |
6616 | adv_sgblk_t *sgblkp; | 5429 | adv_sgblk_t *sgblkp; |
6617 | ADV_SCSI_REQ_Q *scsiqp; | 5430 | ADV_SCSI_REQ_Q *scsiqp; |
6618 | struct scatterlist *slp; | 5431 | struct scatterlist *slp; |
6619 | int sg_elem_cnt; | 5432 | int sg_elem_cnt; |
6620 | ADV_SG_BLOCK *sg_block, *prev_sg_block; | 5433 | ADV_SG_BLOCK *sg_block, *prev_sg_block; |
6621 | ADV_PADDR sg_block_paddr; | 5434 | ADV_PADDR sg_block_paddr; |
6622 | int i; | 5435 | int i; |
6623 | 5436 | ||
6624 | scsiqp = (ADV_SCSI_REQ_Q *) ADV_32BALIGN(&reqp->scsi_req_q); | 5437 | scsiqp = (ADV_SCSI_REQ_Q *)ADV_32BALIGN(&reqp->scsi_req_q); |
6625 | slp = (struct scatterlist *) scp->request_buffer; | 5438 | slp = (struct scatterlist *)scp->request_buffer; |
6626 | sg_elem_cnt = use_sg; | 5439 | sg_elem_cnt = use_sg; |
6627 | prev_sg_block = NULL; | 5440 | prev_sg_block = NULL; |
6628 | reqp->sgblkp = NULL; | 5441 | reqp->sgblkp = NULL; |
6629 | 5442 | ||
6630 | do | 5443 | do { |
6631 | { | 5444 | /* |
6632 | /* | 5445 | * Allocate a 'adv_sgblk_t' structure from the board free |
6633 | * Allocate a 'adv_sgblk_t' structure from the board free | 5446 | * list. One 'adv_sgblk_t' structure holds NO_OF_SG_PER_BLOCK |
6634 | * list. One 'adv_sgblk_t' structure holds NO_OF_SG_PER_BLOCK | 5447 | * (15) scatter-gather elements. |
6635 | * (15) scatter-gather elements. | 5448 | */ |
6636 | */ | 5449 | if ((sgblkp = boardp->adv_sgblkp) == NULL) { |
6637 | if ((sgblkp = boardp->adv_sgblkp) == NULL) { | 5450 | ASC_DBG(1, "adv_get_sglist: no free adv_sgblk_t\n"); |
6638 | ASC_DBG(1, "adv_get_sglist: no free adv_sgblk_t\n"); | 5451 | ASC_STATS(scp->device->host, adv_build_nosg); |
6639 | ASC_STATS(scp->device->host, adv_build_nosg); | 5452 | |
6640 | 5453 | /* | |
6641 | /* | 5454 | * Allocation failed. Free 'adv_sgblk_t' structures already |
6642 | * Allocation failed. Free 'adv_sgblk_t' structures already | 5455 | * allocated for the request. |
6643 | * allocated for the request. | 5456 | */ |
6644 | */ | 5457 | while ((sgblkp = reqp->sgblkp) != NULL) { |
6645 | while ((sgblkp = reqp->sgblkp) != NULL) | 5458 | /* Remove 'sgblkp' from the request list. */ |
6646 | { | 5459 | reqp->sgblkp = sgblkp->next_sgblkp; |
6647 | /* Remove 'sgblkp' from the request list. */ | 5460 | |
6648 | reqp->sgblkp = sgblkp->next_sgblkp; | 5461 | /* Add 'sgblkp' to the board free list. */ |
6649 | 5462 | sgblkp->next_sgblkp = boardp->adv_sgblkp; | |
6650 | /* Add 'sgblkp' to the board free list. */ | 5463 | boardp->adv_sgblkp = sgblkp; |
6651 | sgblkp->next_sgblkp = boardp->adv_sgblkp; | 5464 | } |
6652 | boardp->adv_sgblkp = sgblkp; | 5465 | return ASC_BUSY; |
6653 | } | 5466 | } else { |
6654 | return ASC_BUSY; | 5467 | /* Complete 'adv_sgblk_t' board allocation. */ |
6655 | } else { | 5468 | boardp->adv_sgblkp = sgblkp->next_sgblkp; |
6656 | /* Complete 'adv_sgblk_t' board allocation. */ | 5469 | sgblkp->next_sgblkp = NULL; |
6657 | boardp->adv_sgblkp = sgblkp->next_sgblkp; | 5470 | |
6658 | sgblkp->next_sgblkp = NULL; | 5471 | /* |
6659 | 5472 | * Get 8 byte aligned virtual and physical addresses for | |
6660 | /* | 5473 | * the allocated ADV_SG_BLOCK structure. |
6661 | * Get 8 byte aligned virtual and physical addresses for | 5474 | */ |
6662 | * the allocated ADV_SG_BLOCK structure. | 5475 | sg_block = |
6663 | */ | 5476 | (ADV_SG_BLOCK *)ADV_8BALIGN(&sgblkp->sg_block); |
6664 | sg_block = (ADV_SG_BLOCK *) ADV_8BALIGN(&sgblkp->sg_block); | 5477 | sg_block_paddr = virt_to_bus(sg_block); |
6665 | sg_block_paddr = virt_to_bus(sg_block); | 5478 | |
6666 | 5479 | /* | |
6667 | /* | 5480 | * Check if this is the first 'adv_sgblk_t' for the request. |
6668 | * Check if this is the first 'adv_sgblk_t' for the request. | 5481 | */ |
6669 | */ | 5482 | if (reqp->sgblkp == NULL) { |
6670 | if (reqp->sgblkp == NULL) | 5483 | /* Request's first scatter-gather block. */ |
6671 | { | 5484 | reqp->sgblkp = sgblkp; |
6672 | /* Request's first scatter-gather block. */ | 5485 | |
6673 | reqp->sgblkp = sgblkp; | 5486 | /* |
6674 | 5487 | * Set ADV_SCSI_REQ_T ADV_SG_BLOCK virtual and physical | |
6675 | /* | 5488 | * address pointers. |
6676 | * Set ADV_SCSI_REQ_T ADV_SG_BLOCK virtual and physical | 5489 | */ |
6677 | * address pointers. | 5490 | scsiqp->sg_list_ptr = sg_block; |
6678 | */ | 5491 | scsiqp->sg_real_addr = |
6679 | scsiqp->sg_list_ptr = sg_block; | 5492 | cpu_to_le32(sg_block_paddr); |
6680 | scsiqp->sg_real_addr = cpu_to_le32(sg_block_paddr); | 5493 | } else { |
6681 | } else | 5494 | /* Request's second or later scatter-gather block. */ |
6682 | { | 5495 | sgblkp->next_sgblkp = reqp->sgblkp; |
6683 | /* Request's second or later scatter-gather block. */ | 5496 | reqp->sgblkp = sgblkp; |
6684 | sgblkp->next_sgblkp = reqp->sgblkp; | 5497 | |
6685 | reqp->sgblkp = sgblkp; | 5498 | /* |
6686 | 5499 | * Point the previous ADV_SG_BLOCK structure to | |
6687 | /* | 5500 | * the newly allocated ADV_SG_BLOCK structure. |
6688 | * Point the previous ADV_SG_BLOCK structure to | 5501 | */ |
6689 | * the newly allocated ADV_SG_BLOCK structure. | 5502 | ASC_ASSERT(prev_sg_block != NULL); |
6690 | */ | 5503 | prev_sg_block->sg_ptr = |
6691 | ASC_ASSERT(prev_sg_block != NULL); | 5504 | cpu_to_le32(sg_block_paddr); |
6692 | prev_sg_block->sg_ptr = cpu_to_le32(sg_block_paddr); | 5505 | } |
6693 | } | 5506 | } |
6694 | } | 5507 | |
6695 | 5508 | for (i = 0; i < NO_OF_SG_PER_BLOCK; i++) { | |
6696 | for (i = 0; i < NO_OF_SG_PER_BLOCK; i++) | 5509 | sg_block->sg_list[i].sg_addr = |
6697 | { | 5510 | cpu_to_le32(sg_dma_address(slp)); |
6698 | sg_block->sg_list[i].sg_addr = cpu_to_le32(sg_dma_address(slp)); | 5511 | sg_block->sg_list[i].sg_count = |
6699 | sg_block->sg_list[i].sg_count = cpu_to_le32(sg_dma_len(slp)); | 5512 | cpu_to_le32(sg_dma_len(slp)); |
6700 | ASC_STATS_ADD(scp->device->host, sg_xfer, ASC_CEILING(sg_dma_len(slp), 512)); | 5513 | ASC_STATS_ADD(scp->device->host, sg_xfer, |
6701 | 5514 | ASC_CEILING(sg_dma_len(slp), 512)); | |
6702 | if (--sg_elem_cnt == 0) | 5515 | |
6703 | { /* Last ADV_SG_BLOCK and scatter-gather entry. */ | 5516 | if (--sg_elem_cnt == 0) { /* Last ADV_SG_BLOCK and scatter-gather entry. */ |
6704 | sg_block->sg_cnt = i + 1; | 5517 | sg_block->sg_cnt = i + 1; |
6705 | sg_block->sg_ptr = 0L; /* Last ADV_SG_BLOCK in list. */ | 5518 | sg_block->sg_ptr = 0L; /* Last ADV_SG_BLOCK in list. */ |
6706 | return ADV_SUCCESS; | 5519 | return ADV_SUCCESS; |
6707 | } | 5520 | } |
6708 | slp++; | 5521 | slp++; |
6709 | } | 5522 | } |
6710 | sg_block->sg_cnt = NO_OF_SG_PER_BLOCK; | 5523 | sg_block->sg_cnt = NO_OF_SG_PER_BLOCK; |
6711 | prev_sg_block = sg_block; | 5524 | prev_sg_block = sg_block; |
6712 | } | 5525 | } |
6713 | while (1); | 5526 | while (1); |
6714 | /* NOTREACHED */ | 5527 | /* NOTREACHED */ |
6715 | } | 5528 | } |
6716 | 5529 | ||
6717 | /* | 5530 | /* |
@@ -6719,165 +5532,171 @@ adv_get_sglist(asc_board_t *boardp, adv_req_t *reqp, struct scsi_cmnd *scp, int | |||
6719 | * | 5532 | * |
6720 | * Interrupt callback function for the Narrow SCSI Asc Library. | 5533 | * Interrupt callback function for the Narrow SCSI Asc Library. |
6721 | */ | 5534 | */ |
6722 | STATIC void | 5535 | static void asc_isr_callback(ASC_DVC_VAR *asc_dvc_varp, ASC_QDONE_INFO *qdonep) |
6723 | asc_isr_callback(ASC_DVC_VAR *asc_dvc_varp, ASC_QDONE_INFO *qdonep) | ||
6724 | { | 5536 | { |
6725 | asc_board_t *boardp; | 5537 | asc_board_t *boardp; |
6726 | struct scsi_cmnd *scp; | 5538 | struct scsi_cmnd *scp; |
6727 | struct Scsi_Host *shp; | 5539 | struct Scsi_Host *shost; |
6728 | int i; | 5540 | int i; |
6729 | 5541 | ||
6730 | ASC_DBG2(1, "asc_isr_callback: asc_dvc_varp 0x%lx, qdonep 0x%lx\n", | 5542 | ASC_DBG2(1, "asc_isr_callback: asc_dvc_varp 0x%lx, qdonep 0x%lx\n", |
6731 | (ulong) asc_dvc_varp, (ulong) qdonep); | 5543 | (ulong)asc_dvc_varp, (ulong)qdonep); |
6732 | ASC_DBG_PRT_ASC_QDONE_INFO(2, qdonep); | 5544 | ASC_DBG_PRT_ASC_QDONE_INFO(2, qdonep); |
5545 | |||
5546 | /* | ||
5547 | * Get the struct scsi_cmnd structure and Scsi_Host structure for the | ||
5548 | * command that has been completed. | ||
5549 | */ | ||
5550 | scp = (struct scsi_cmnd *)ASC_U32_TO_VADDR(qdonep->d2.srb_ptr); | ||
5551 | ASC_DBG1(1, "asc_isr_callback: scp 0x%lx\n", (ulong)scp); | ||
5552 | |||
5553 | if (scp == NULL) { | ||
5554 | ASC_PRINT("asc_isr_callback: scp is NULL\n"); | ||
5555 | return; | ||
5556 | } | ||
5557 | ASC_DBG_PRT_CDB(2, scp->cmnd, scp->cmd_len); | ||
5558 | |||
5559 | /* | ||
5560 | * If the request's host pointer is not valid, display a | ||
5561 | * message and return. | ||
5562 | */ | ||
5563 | shost = scp->device->host; | ||
5564 | for (i = 0; i < asc_board_count; i++) { | ||
5565 | if (asc_host[i] == shost) { | ||
5566 | break; | ||
5567 | } | ||
5568 | } | ||
5569 | if (i == asc_board_count) { | ||
5570 | ASC_PRINT2 | ||
5571 | ("asc_isr_callback: scp 0x%lx has bad host pointer, host 0x%lx\n", | ||
5572 | (ulong)scp, (ulong)shost); | ||
5573 | return; | ||
5574 | } | ||
6733 | 5575 | ||
6734 | /* | 5576 | ASC_STATS(shost, callback); |
6735 | * Get the struct scsi_cmnd structure and Scsi_Host structure for the | 5577 | ASC_DBG1(1, "asc_isr_callback: shost 0x%lx\n", (ulong)shost); |
6736 | * command that has been completed. | 5578 | |
6737 | */ | 5579 | /* |
6738 | scp = (struct scsi_cmnd *) ASC_U32_TO_VADDR(qdonep->d2.srb_ptr); | 5580 | * If the request isn't found on the active queue, it may |
6739 | ASC_DBG1(1, "asc_isr_callback: scp 0x%lx\n", (ulong) scp); | 5581 | * have been removed to handle a reset request. |
6740 | 5582 | * Display a message and return. | |
6741 | if (scp == NULL) { | 5583 | */ |
6742 | ASC_PRINT("asc_isr_callback: scp is NULL\n"); | 5584 | boardp = ASC_BOARDP(shost); |
6743 | return; | 5585 | ASC_ASSERT(asc_dvc_varp == &boardp->dvc_var.asc_dvc_var); |
6744 | } | 5586 | if (asc_rmqueue(&boardp->active, scp) == ASC_FALSE) { |
6745 | ASC_DBG_PRT_CDB(2, scp->cmnd, scp->cmd_len); | 5587 | ASC_PRINT2 |
5588 | ("asc_isr_callback: board %d: scp 0x%lx not on active queue\n", | ||
5589 | boardp->id, (ulong)scp); | ||
5590 | return; | ||
5591 | } | ||
6746 | 5592 | ||
6747 | /* | 5593 | /* |
6748 | * If the request's host pointer is not valid, display a | 5594 | * 'qdonep' contains the command's ending status. |
6749 | * message and return. | 5595 | */ |
6750 | */ | 5596 | switch (qdonep->d3.done_stat) { |
6751 | shp = scp->device->host; | 5597 | case QD_NO_ERROR: |
6752 | for (i = 0; i < asc_board_count; i++) { | 5598 | ASC_DBG(2, "asc_isr_callback: QD_NO_ERROR\n"); |
6753 | if (asc_host[i] == shp) { | 5599 | scp->result = 0; |
6754 | break; | ||
6755 | } | ||
6756 | } | ||
6757 | if (i == asc_board_count) { | ||
6758 | ASC_PRINT2( | ||
6759 | "asc_isr_callback: scp 0x%lx has bad host pointer, host 0x%lx\n", | ||
6760 | (ulong) scp, (ulong) shp); | ||
6761 | return; | ||
6762 | } | ||
6763 | 5600 | ||
6764 | ASC_STATS(shp, callback); | 5601 | /* |
6765 | ASC_DBG1(1, "asc_isr_callback: shp 0x%lx\n", (ulong) shp); | 5602 | * If an INQUIRY command completed successfully, then call |
5603 | * the AscInquiryHandling() function to set-up the device. | ||
5604 | */ | ||
5605 | if (scp->cmnd[0] == INQUIRY && scp->device->lun == 0 && | ||
5606 | (scp->request_bufflen - qdonep->remain_bytes) >= 8) { | ||
5607 | AscInquiryHandling(asc_dvc_varp, scp->device->id & 0x7, | ||
5608 | (ASC_SCSI_INQUIRY *)scp-> | ||
5609 | request_buffer); | ||
5610 | } | ||
6766 | 5611 | ||
6767 | /* | 5612 | /* |
6768 | * If the request isn't found on the active queue, it may | 5613 | * Check for an underrun condition. |
6769 | * have been removed to handle a reset request. | 5614 | * |
6770 | * Display a message and return. | 5615 | * If there was no error and an underrun condition, then |
6771 | */ | 5616 | * then return the number of underrun bytes. |
6772 | boardp = ASC_BOARDP(shp); | 5617 | */ |
6773 | ASC_ASSERT(asc_dvc_varp == &boardp->dvc_var.asc_dvc_var); | 5618 | if (scp->request_bufflen != 0 && qdonep->remain_bytes != 0 && |
6774 | if (asc_rmqueue(&boardp->active, scp) == ASC_FALSE) { | 5619 | qdonep->remain_bytes <= scp->request_bufflen) { |
6775 | ASC_PRINT2( | 5620 | ASC_DBG1(1, |
6776 | "asc_isr_callback: board %d: scp 0x%lx not on active queue\n", | 5621 | "asc_isr_callback: underrun condition %u bytes\n", |
6777 | boardp->id, (ulong) scp); | 5622 | (unsigned)qdonep->remain_bytes); |
6778 | return; | 5623 | scp->resid = qdonep->remain_bytes; |
6779 | } | 5624 | } |
5625 | break; | ||
5626 | |||
5627 | case QD_WITH_ERROR: | ||
5628 | ASC_DBG(2, "asc_isr_callback: QD_WITH_ERROR\n"); | ||
5629 | switch (qdonep->d3.host_stat) { | ||
5630 | case QHSTA_NO_ERROR: | ||
5631 | if (qdonep->d3.scsi_stat == SAM_STAT_CHECK_CONDITION) { | ||
5632 | ASC_DBG(2, | ||
5633 | "asc_isr_callback: SAM_STAT_CHECK_CONDITION\n"); | ||
5634 | ASC_DBG_PRT_SENSE(2, scp->sense_buffer, | ||
5635 | sizeof(scp->sense_buffer)); | ||
5636 | /* | ||
5637 | * Note: The 'status_byte()' macro used by target drivers | ||
5638 | * defined in scsi.h shifts the status byte returned by | ||
5639 | * host drivers right by 1 bit. This is why target drivers | ||
5640 | * also use right shifted status byte definitions. For | ||
5641 | * instance target drivers use CHECK_CONDITION, defined to | ||
5642 | * 0x1, instead of the SCSI defined check condition value | ||
5643 | * of 0x2. Host drivers are supposed to return the status | ||
5644 | * byte as it is defined by SCSI. | ||
5645 | */ | ||
5646 | scp->result = DRIVER_BYTE(DRIVER_SENSE) | | ||
5647 | STATUS_BYTE(qdonep->d3.scsi_stat); | ||
5648 | } else { | ||
5649 | scp->result = STATUS_BYTE(qdonep->d3.scsi_stat); | ||
5650 | } | ||
5651 | break; | ||
5652 | |||
5653 | default: | ||
5654 | /* QHSTA error occurred */ | ||
5655 | ASC_DBG1(1, "asc_isr_callback: host_stat 0x%x\n", | ||
5656 | qdonep->d3.host_stat); | ||
5657 | scp->result = HOST_BYTE(DID_BAD_TARGET); | ||
5658 | break; | ||
5659 | } | ||
5660 | break; | ||
5661 | |||
5662 | case QD_ABORTED_BY_HOST: | ||
5663 | ASC_DBG(1, "asc_isr_callback: QD_ABORTED_BY_HOST\n"); | ||
5664 | scp->result = | ||
5665 | HOST_BYTE(DID_ABORT) | MSG_BYTE(qdonep->d3. | ||
5666 | scsi_msg) | | ||
5667 | STATUS_BYTE(qdonep->d3.scsi_stat); | ||
5668 | break; | ||
5669 | |||
5670 | default: | ||
5671 | ASC_DBG1(1, "asc_isr_callback: done_stat 0x%x\n", | ||
5672 | qdonep->d3.done_stat); | ||
5673 | scp->result = | ||
5674 | HOST_BYTE(DID_ERROR) | MSG_BYTE(qdonep->d3. | ||
5675 | scsi_msg) | | ||
5676 | STATUS_BYTE(qdonep->d3.scsi_stat); | ||
5677 | break; | ||
5678 | } | ||
6780 | 5679 | ||
6781 | /* | 5680 | /* |
6782 | * 'qdonep' contains the command's ending status. | 5681 | * If the 'init_tidmask' bit isn't already set for the target and the |
6783 | */ | 5682 | * current request finished normally, then set the bit for the target |
6784 | switch (qdonep->d3.done_stat) { | 5683 | * to indicate that a device is present. |
6785 | case QD_NO_ERROR: | 5684 | */ |
6786 | ASC_DBG(2, "asc_isr_callback: QD_NO_ERROR\n"); | 5685 | if ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(scp->device->id)) == 0 && |
6787 | scp->result = 0; | 5686 | qdonep->d3.done_stat == QD_NO_ERROR && |
6788 | 5687 | qdonep->d3.host_stat == QHSTA_NO_ERROR) { | |
6789 | /* | 5688 | boardp->init_tidmask |= ADV_TID_TO_TIDMASK(scp->device->id); |
6790 | * If an INQUIRY command completed successfully, then call | 5689 | } |
6791 | * the AscInquiryHandling() function to set-up the device. | ||
6792 | */ | ||
6793 | if (scp->cmnd[0] == INQUIRY && scp->device->lun == 0 && | ||
6794 | (scp->request_bufflen - qdonep->remain_bytes) >= 8) | ||
6795 | { | ||
6796 | AscInquiryHandling(asc_dvc_varp, scp->device->id & 0x7, | ||
6797 | (ASC_SCSI_INQUIRY *) scp->request_buffer); | ||
6798 | } | ||
6799 | |||
6800 | /* | ||
6801 | * Check for an underrun condition. | ||
6802 | * | ||
6803 | * If there was no error and an underrun condition, then | ||
6804 | * then return the number of underrun bytes. | ||
6805 | */ | ||
6806 | if (scp->request_bufflen != 0 && qdonep->remain_bytes != 0 && | ||
6807 | qdonep->remain_bytes <= scp->request_bufflen) { | ||
6808 | ASC_DBG1(1, "asc_isr_callback: underrun condition %u bytes\n", | ||
6809 | (unsigned) qdonep->remain_bytes); | ||
6810 | scp->resid = qdonep->remain_bytes; | ||
6811 | } | ||
6812 | break; | ||
6813 | |||
6814 | case QD_WITH_ERROR: | ||
6815 | ASC_DBG(2, "asc_isr_callback: QD_WITH_ERROR\n"); | ||
6816 | switch (qdonep->d3.host_stat) { | ||
6817 | case QHSTA_NO_ERROR: | ||
6818 | if (qdonep->d3.scsi_stat == SAM_STAT_CHECK_CONDITION) { | ||
6819 | ASC_DBG(2, "asc_isr_callback: SAM_STAT_CHECK_CONDITION\n"); | ||
6820 | ASC_DBG_PRT_SENSE(2, scp->sense_buffer, | ||
6821 | sizeof(scp->sense_buffer)); | ||
6822 | /* | ||
6823 | * Note: The 'status_byte()' macro used by target drivers | ||
6824 | * defined in scsi.h shifts the status byte returned by | ||
6825 | * host drivers right by 1 bit. This is why target drivers | ||
6826 | * also use right shifted status byte definitions. For | ||
6827 | * instance target drivers use CHECK_CONDITION, defined to | ||
6828 | * 0x1, instead of the SCSI defined check condition value | ||
6829 | * of 0x2. Host drivers are supposed to return the status | ||
6830 | * byte as it is defined by SCSI. | ||
6831 | */ | ||
6832 | scp->result = DRIVER_BYTE(DRIVER_SENSE) | | ||
6833 | STATUS_BYTE(qdonep->d3.scsi_stat); | ||
6834 | } else { | ||
6835 | scp->result = STATUS_BYTE(qdonep->d3.scsi_stat); | ||
6836 | } | ||
6837 | break; | ||
6838 | |||
6839 | default: | ||
6840 | /* QHSTA error occurred */ | ||
6841 | ASC_DBG1(1, "asc_isr_callback: host_stat 0x%x\n", | ||
6842 | qdonep->d3.host_stat); | ||
6843 | scp->result = HOST_BYTE(DID_BAD_TARGET); | ||
6844 | break; | ||
6845 | } | ||
6846 | break; | ||
6847 | |||
6848 | case QD_ABORTED_BY_HOST: | ||
6849 | ASC_DBG(1, "asc_isr_callback: QD_ABORTED_BY_HOST\n"); | ||
6850 | scp->result = HOST_BYTE(DID_ABORT) | MSG_BYTE(qdonep->d3.scsi_msg) | | ||
6851 | STATUS_BYTE(qdonep->d3.scsi_stat); | ||
6852 | break; | ||
6853 | |||
6854 | default: | ||
6855 | ASC_DBG1(1, "asc_isr_callback: done_stat 0x%x\n", qdonep->d3.done_stat); | ||
6856 | scp->result = HOST_BYTE(DID_ERROR) | MSG_BYTE(qdonep->d3.scsi_msg) | | ||
6857 | STATUS_BYTE(qdonep->d3.scsi_stat); | ||
6858 | break; | ||
6859 | } | ||
6860 | 5690 | ||
6861 | /* | 5691 | /* |
6862 | * If the 'init_tidmask' bit isn't already set for the target and the | 5692 | * Because interrupts may be enabled by the 'struct scsi_cmnd' done |
6863 | * current request finished normally, then set the bit for the target | 5693 | * function, add the command to the end of the board's done queue. |
6864 | * to indicate that a device is present. | 5694 | * The done function for the command will be called from |
6865 | */ | 5695 | * advansys_interrupt(). |
6866 | if ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(scp->device->id)) == 0 && | 5696 | */ |
6867 | qdonep->d3.done_stat == QD_NO_ERROR && | 5697 | asc_enqueue(&boardp->done, scp, ASC_BACK); |
6868 | qdonep->d3.host_stat == QHSTA_NO_ERROR) { | ||
6869 | boardp->init_tidmask |= ADV_TID_TO_TIDMASK(scp->device->id); | ||
6870 | } | ||
6871 | 5698 | ||
6872 | /* | 5699 | return; |
6873 | * Because interrupts may be enabled by the 'struct scsi_cmnd' done | ||
6874 | * function, add the command to the end of the board's done queue. | ||
6875 | * The done function for the command will be called from | ||
6876 | * advansys_interrupt(). | ||
6877 | */ | ||
6878 | asc_enqueue(&boardp->done, scp, ASC_BACK); | ||
6879 | |||
6880 | return; | ||
6881 | } | 5700 | } |
6882 | 5701 | ||
6883 | /* | 5702 | /* |
@@ -6885,238 +5704,240 @@ asc_isr_callback(ASC_DVC_VAR *asc_dvc_varp, ASC_QDONE_INFO *qdonep) | |||
6885 | * | 5704 | * |
6886 | * Callback function for the Wide SCSI Adv Library. | 5705 | * Callback function for the Wide SCSI Adv Library. |
6887 | */ | 5706 | */ |
6888 | STATIC void | 5707 | static void adv_isr_callback(ADV_DVC_VAR *adv_dvc_varp, ADV_SCSI_REQ_Q *scsiqp) |
6889 | adv_isr_callback(ADV_DVC_VAR *adv_dvc_varp, ADV_SCSI_REQ_Q *scsiqp) | ||
6890 | { | 5708 | { |
6891 | asc_board_t *boardp; | 5709 | asc_board_t *boardp; |
6892 | adv_req_t *reqp; | 5710 | adv_req_t *reqp; |
6893 | adv_sgblk_t *sgblkp; | 5711 | adv_sgblk_t *sgblkp; |
6894 | struct scsi_cmnd *scp; | 5712 | struct scsi_cmnd *scp; |
6895 | struct Scsi_Host *shp; | 5713 | struct Scsi_Host *shost; |
6896 | int i; | 5714 | int i; |
6897 | ADV_DCNT resid_cnt; | 5715 | ADV_DCNT resid_cnt; |
6898 | 5716 | ||
6899 | 5717 | ASC_DBG2(1, "adv_isr_callback: adv_dvc_varp 0x%lx, scsiqp 0x%lx\n", | |
6900 | ASC_DBG2(1, "adv_isr_callback: adv_dvc_varp 0x%lx, scsiqp 0x%lx\n", | 5718 | (ulong)adv_dvc_varp, (ulong)scsiqp); |
6901 | (ulong) adv_dvc_varp, (ulong) scsiqp); | 5719 | ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp); |
6902 | ASC_DBG_PRT_ADV_SCSI_REQ_Q(2, scsiqp); | 5720 | |
6903 | 5721 | /* | |
6904 | /* | 5722 | * Get the adv_req_t structure for the command that has been |
6905 | * Get the adv_req_t structure for the command that has been | 5723 | * completed. The adv_req_t structure actually contains the |
6906 | * completed. The adv_req_t structure actually contains the | 5724 | * completed ADV_SCSI_REQ_Q structure. |
6907 | * completed ADV_SCSI_REQ_Q structure. | 5725 | */ |
6908 | */ | 5726 | reqp = (adv_req_t *)ADV_U32_TO_VADDR(scsiqp->srb_ptr); |
6909 | reqp = (adv_req_t *) ADV_U32_TO_VADDR(scsiqp->srb_ptr); | 5727 | ASC_DBG1(1, "adv_isr_callback: reqp 0x%lx\n", (ulong)reqp); |
6910 | ASC_DBG1(1, "adv_isr_callback: reqp 0x%lx\n", (ulong) reqp); | 5728 | if (reqp == NULL) { |
6911 | if (reqp == NULL) { | 5729 | ASC_PRINT("adv_isr_callback: reqp is NULL\n"); |
6912 | ASC_PRINT("adv_isr_callback: reqp is NULL\n"); | 5730 | return; |
6913 | return; | 5731 | } |
6914 | } | ||
6915 | |||
6916 | /* | ||
6917 | * Get the struct scsi_cmnd structure and Scsi_Host structure for the | ||
6918 | * command that has been completed. | ||
6919 | * | ||
6920 | * Note: The adv_req_t request structure and adv_sgblk_t structure, | ||
6921 | * if any, are dropped, because a board structure pointer can not be | ||
6922 | * determined. | ||
6923 | */ | ||
6924 | scp = reqp->cmndp; | ||
6925 | ASC_DBG1(1, "adv_isr_callback: scp 0x%lx\n", (ulong) scp); | ||
6926 | if (scp == NULL) { | ||
6927 | ASC_PRINT("adv_isr_callback: scp is NULL; adv_req_t dropped.\n"); | ||
6928 | return; | ||
6929 | } | ||
6930 | ASC_DBG_PRT_CDB(2, scp->cmnd, scp->cmd_len); | ||
6931 | |||
6932 | /* | ||
6933 | * If the request's host pointer is not valid, display a message | ||
6934 | * and return. | ||
6935 | */ | ||
6936 | shp = scp->device->host; | ||
6937 | for (i = 0; i < asc_board_count; i++) { | ||
6938 | if (asc_host[i] == shp) { | ||
6939 | break; | ||
6940 | } | ||
6941 | } | ||
6942 | /* | ||
6943 | * Note: If the host structure is not found, the adv_req_t request | ||
6944 | * structure and adv_sgblk_t structure, if any, is dropped. | ||
6945 | */ | ||
6946 | if (i == asc_board_count) { | ||
6947 | ASC_PRINT2( | ||
6948 | "adv_isr_callback: scp 0x%lx has bad host pointer, host 0x%lx\n", | ||
6949 | (ulong) scp, (ulong) shp); | ||
6950 | return; | ||
6951 | } | ||
6952 | 5732 | ||
6953 | ASC_STATS(shp, callback); | 5733 | /* |
6954 | ASC_DBG1(1, "adv_isr_callback: shp 0x%lx\n", (ulong) shp); | 5734 | * Get the struct scsi_cmnd structure and Scsi_Host structure for the |
5735 | * command that has been completed. | ||
5736 | * | ||
5737 | * Note: The adv_req_t request structure and adv_sgblk_t structure, | ||
5738 | * if any, are dropped, because a board structure pointer can not be | ||
5739 | * determined. | ||
5740 | */ | ||
5741 | scp = reqp->cmndp; | ||
5742 | ASC_DBG1(1, "adv_isr_callback: scp 0x%lx\n", (ulong)scp); | ||
5743 | if (scp == NULL) { | ||
5744 | ASC_PRINT | ||
5745 | ("adv_isr_callback: scp is NULL; adv_req_t dropped.\n"); | ||
5746 | return; | ||
5747 | } | ||
5748 | ASC_DBG_PRT_CDB(2, scp->cmnd, scp->cmd_len); | ||
5749 | |||
5750 | /* | ||
5751 | * If the request's host pointer is not valid, display a message | ||
5752 | * and return. | ||
5753 | */ | ||
5754 | shost = scp->device->host; | ||
5755 | for (i = 0; i < asc_board_count; i++) { | ||
5756 | if (asc_host[i] == shost) { | ||
5757 | break; | ||
5758 | } | ||
5759 | } | ||
5760 | /* | ||
5761 | * Note: If the host structure is not found, the adv_req_t request | ||
5762 | * structure and adv_sgblk_t structure, if any, is dropped. | ||
5763 | */ | ||
5764 | if (i == asc_board_count) { | ||
5765 | ASC_PRINT2 | ||
5766 | ("adv_isr_callback: scp 0x%lx has bad host pointer, host 0x%lx\n", | ||
5767 | (ulong)scp, (ulong)shost); | ||
5768 | return; | ||
5769 | } | ||
6955 | 5770 | ||
6956 | /* | 5771 | ASC_STATS(shost, callback); |
6957 | * If the request isn't found on the active queue, it may have been | 5772 | ASC_DBG1(1, "adv_isr_callback: shost 0x%lx\n", (ulong)shost); |
6958 | * removed to handle a reset request. Display a message and return. | 5773 | |
6959 | * | 5774 | /* |
6960 | * Note: Because the structure may still be in use don't attempt | 5775 | * If the request isn't found on the active queue, it may have been |
6961 | * to free the adv_req_t and adv_sgblk_t, if any, structures. | 5776 | * removed to handle a reset request. Display a message and return. |
6962 | */ | 5777 | * |
6963 | boardp = ASC_BOARDP(shp); | 5778 | * Note: Because the structure may still be in use don't attempt |
6964 | ASC_ASSERT(adv_dvc_varp == &boardp->dvc_var.adv_dvc_var); | 5779 | * to free the adv_req_t and adv_sgblk_t, if any, structures. |
6965 | if (asc_rmqueue(&boardp->active, scp) == ASC_FALSE) { | 5780 | */ |
6966 | ASC_PRINT2( | 5781 | boardp = ASC_BOARDP(shost); |
6967 | "adv_isr_callback: board %d: scp 0x%lx not on active queue\n", | 5782 | ASC_ASSERT(adv_dvc_varp == &boardp->dvc_var.adv_dvc_var); |
6968 | boardp->id, (ulong) scp); | 5783 | if (asc_rmqueue(&boardp->active, scp) == ASC_FALSE) { |
6969 | return; | 5784 | ASC_PRINT2 |
6970 | } | 5785 | ("adv_isr_callback: board %d: scp 0x%lx not on active queue\n", |
5786 | boardp->id, (ulong)scp); | ||
5787 | return; | ||
5788 | } | ||
6971 | 5789 | ||
6972 | /* | 5790 | /* |
6973 | * 'done_status' contains the command's ending status. | 5791 | * 'done_status' contains the command's ending status. |
6974 | */ | 5792 | */ |
6975 | switch (scsiqp->done_status) { | 5793 | switch (scsiqp->done_status) { |
6976 | case QD_NO_ERROR: | 5794 | case QD_NO_ERROR: |
6977 | ASC_DBG(2, "adv_isr_callback: QD_NO_ERROR\n"); | 5795 | ASC_DBG(2, "adv_isr_callback: QD_NO_ERROR\n"); |
6978 | scp->result = 0; | 5796 | scp->result = 0; |
6979 | |||
6980 | /* | ||
6981 | * Check for an underrun condition. | ||
6982 | * | ||
6983 | * If there was no error and an underrun condition, then | ||
6984 | * then return the number of underrun bytes. | ||
6985 | */ | ||
6986 | resid_cnt = le32_to_cpu(scsiqp->data_cnt); | ||
6987 | if (scp->request_bufflen != 0 && resid_cnt != 0 && | ||
6988 | resid_cnt <= scp->request_bufflen) { | ||
6989 | ASC_DBG1(1, "adv_isr_callback: underrun condition %lu bytes\n", | ||
6990 | (ulong) resid_cnt); | ||
6991 | scp->resid = resid_cnt; | ||
6992 | } | ||
6993 | break; | ||
6994 | |||
6995 | case QD_WITH_ERROR: | ||
6996 | ASC_DBG(2, "adv_isr_callback: QD_WITH_ERROR\n"); | ||
6997 | switch (scsiqp->host_status) { | ||
6998 | case QHSTA_NO_ERROR: | ||
6999 | if (scsiqp->scsi_status == SAM_STAT_CHECK_CONDITION) { | ||
7000 | ASC_DBG(2, "adv_isr_callback: SAM_STAT_CHECK_CONDITION\n"); | ||
7001 | ASC_DBG_PRT_SENSE(2, scp->sense_buffer, | ||
7002 | sizeof(scp->sense_buffer)); | ||
7003 | /* | ||
7004 | * Note: The 'status_byte()' macro used by target drivers | ||
7005 | * defined in scsi.h shifts the status byte returned by | ||
7006 | * host drivers right by 1 bit. This is why target drivers | ||
7007 | * also use right shifted status byte definitions. For | ||
7008 | * instance target drivers use CHECK_CONDITION, defined to | ||
7009 | * 0x1, instead of the SCSI defined check condition value | ||
7010 | * of 0x2. Host drivers are supposed to return the status | ||
7011 | * byte as it is defined by SCSI. | ||
7012 | */ | ||
7013 | scp->result = DRIVER_BYTE(DRIVER_SENSE) | | ||
7014 | STATUS_BYTE(scsiqp->scsi_status); | ||
7015 | } else { | ||
7016 | scp->result = STATUS_BYTE(scsiqp->scsi_status); | ||
7017 | } | ||
7018 | break; | ||
7019 | |||
7020 | default: | ||
7021 | /* Some other QHSTA error occurred. */ | ||
7022 | ASC_DBG1(1, "adv_isr_callback: host_status 0x%x\n", | ||
7023 | scsiqp->host_status); | ||
7024 | scp->result = HOST_BYTE(DID_BAD_TARGET); | ||
7025 | break; | ||
7026 | } | ||
7027 | break; | ||
7028 | |||
7029 | case QD_ABORTED_BY_HOST: | ||
7030 | ASC_DBG(1, "adv_isr_callback: QD_ABORTED_BY_HOST\n"); | ||
7031 | scp->result = HOST_BYTE(DID_ABORT) | STATUS_BYTE(scsiqp->scsi_status); | ||
7032 | break; | ||
7033 | |||
7034 | default: | ||
7035 | ASC_DBG1(1, "adv_isr_callback: done_status 0x%x\n", scsiqp->done_status); | ||
7036 | scp->result = HOST_BYTE(DID_ERROR) | STATUS_BYTE(scsiqp->scsi_status); | ||
7037 | break; | ||
7038 | } | ||
7039 | 5797 | ||
7040 | /* | 5798 | /* |
7041 | * If the 'init_tidmask' bit isn't already set for the target and the | 5799 | * Check for an underrun condition. |
7042 | * current request finished normally, then set the bit for the target | 5800 | * |
7043 | * to indicate that a device is present. | 5801 | * If there was no error and an underrun condition, then |
7044 | */ | 5802 | * then return the number of underrun bytes. |
7045 | if ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(scp->device->id)) == 0 && | 5803 | */ |
7046 | scsiqp->done_status == QD_NO_ERROR && | 5804 | resid_cnt = le32_to_cpu(scsiqp->data_cnt); |
7047 | scsiqp->host_status == QHSTA_NO_ERROR) { | 5805 | if (scp->request_bufflen != 0 && resid_cnt != 0 && |
7048 | boardp->init_tidmask |= ADV_TID_TO_TIDMASK(scp->device->id); | 5806 | resid_cnt <= scp->request_bufflen) { |
7049 | } | 5807 | ASC_DBG1(1, |
5808 | "adv_isr_callback: underrun condition %lu bytes\n", | ||
5809 | (ulong)resid_cnt); | ||
5810 | scp->resid = resid_cnt; | ||
5811 | } | ||
5812 | break; | ||
5813 | |||
5814 | case QD_WITH_ERROR: | ||
5815 | ASC_DBG(2, "adv_isr_callback: QD_WITH_ERROR\n"); | ||
5816 | switch (scsiqp->host_status) { | ||
5817 | case QHSTA_NO_ERROR: | ||
5818 | if (scsiqp->scsi_status == SAM_STAT_CHECK_CONDITION) { | ||
5819 | ASC_DBG(2, | ||
5820 | "adv_isr_callback: SAM_STAT_CHECK_CONDITION\n"); | ||
5821 | ASC_DBG_PRT_SENSE(2, scp->sense_buffer, | ||
5822 | sizeof(scp->sense_buffer)); | ||
5823 | /* | ||
5824 | * Note: The 'status_byte()' macro used by target drivers | ||
5825 | * defined in scsi.h shifts the status byte returned by | ||
5826 | * host drivers right by 1 bit. This is why target drivers | ||
5827 | * also use right shifted status byte definitions. For | ||
5828 | * instance target drivers use CHECK_CONDITION, defined to | ||
5829 | * 0x1, instead of the SCSI defined check condition value | ||
5830 | * of 0x2. Host drivers are supposed to return the status | ||
5831 | * byte as it is defined by SCSI. | ||
5832 | */ | ||
5833 | scp->result = DRIVER_BYTE(DRIVER_SENSE) | | ||
5834 | STATUS_BYTE(scsiqp->scsi_status); | ||
5835 | } else { | ||
5836 | scp->result = STATUS_BYTE(scsiqp->scsi_status); | ||
5837 | } | ||
5838 | break; | ||
5839 | |||
5840 | default: | ||
5841 | /* Some other QHSTA error occurred. */ | ||
5842 | ASC_DBG1(1, "adv_isr_callback: host_status 0x%x\n", | ||
5843 | scsiqp->host_status); | ||
5844 | scp->result = HOST_BYTE(DID_BAD_TARGET); | ||
5845 | break; | ||
5846 | } | ||
5847 | break; | ||
5848 | |||
5849 | case QD_ABORTED_BY_HOST: | ||
5850 | ASC_DBG(1, "adv_isr_callback: QD_ABORTED_BY_HOST\n"); | ||
5851 | scp->result = | ||
5852 | HOST_BYTE(DID_ABORT) | STATUS_BYTE(scsiqp->scsi_status); | ||
5853 | break; | ||
5854 | |||
5855 | default: | ||
5856 | ASC_DBG1(1, "adv_isr_callback: done_status 0x%x\n", | ||
5857 | scsiqp->done_status); | ||
5858 | scp->result = | ||
5859 | HOST_BYTE(DID_ERROR) | STATUS_BYTE(scsiqp->scsi_status); | ||
5860 | break; | ||
5861 | } | ||
7050 | 5862 | ||
7051 | /* | 5863 | /* |
7052 | * Because interrupts may be enabled by the 'struct scsi_cmnd' done | 5864 | * If the 'init_tidmask' bit isn't already set for the target and the |
7053 | * function, add the command to the end of the board's done queue. | 5865 | * current request finished normally, then set the bit for the target |
7054 | * The done function for the command will be called from | 5866 | * to indicate that a device is present. |
7055 | * advansys_interrupt(). | 5867 | */ |
7056 | */ | 5868 | if ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(scp->device->id)) == 0 && |
7057 | asc_enqueue(&boardp->done, scp, ASC_BACK); | 5869 | scsiqp->done_status == QD_NO_ERROR && |
5870 | scsiqp->host_status == QHSTA_NO_ERROR) { | ||
5871 | boardp->init_tidmask |= ADV_TID_TO_TIDMASK(scp->device->id); | ||
5872 | } | ||
7058 | 5873 | ||
7059 | /* | 5874 | /* |
7060 | * Free all 'adv_sgblk_t' structures allocated for the request. | 5875 | * Because interrupts may be enabled by the 'struct scsi_cmnd' done |
7061 | */ | 5876 | * function, add the command to the end of the board's done queue. |
7062 | while ((sgblkp = reqp->sgblkp) != NULL) | 5877 | * The done function for the command will be called from |
7063 | { | 5878 | * advansys_interrupt(). |
7064 | /* Remove 'sgblkp' from the request list. */ | 5879 | */ |
7065 | reqp->sgblkp = sgblkp->next_sgblkp; | 5880 | asc_enqueue(&boardp->done, scp, ASC_BACK); |
7066 | 5881 | ||
7067 | /* Add 'sgblkp' to the board free list. */ | 5882 | /* |
7068 | sgblkp->next_sgblkp = boardp->adv_sgblkp; | 5883 | * Free all 'adv_sgblk_t' structures allocated for the request. |
7069 | boardp->adv_sgblkp = sgblkp; | 5884 | */ |
7070 | } | 5885 | while ((sgblkp = reqp->sgblkp) != NULL) { |
5886 | /* Remove 'sgblkp' from the request list. */ | ||
5887 | reqp->sgblkp = sgblkp->next_sgblkp; | ||
5888 | |||
5889 | /* Add 'sgblkp' to the board free list. */ | ||
5890 | sgblkp->next_sgblkp = boardp->adv_sgblkp; | ||
5891 | boardp->adv_sgblkp = sgblkp; | ||
5892 | } | ||
7071 | 5893 | ||
7072 | /* | 5894 | /* |
7073 | * Free the adv_req_t structure used with the command by adding | 5895 | * Free the adv_req_t structure used with the command by adding |
7074 | * it back to the board free list. | 5896 | * it back to the board free list. |
7075 | */ | 5897 | */ |
7076 | reqp->next_reqp = boardp->adv_reqp; | 5898 | reqp->next_reqp = boardp->adv_reqp; |
7077 | boardp->adv_reqp = reqp; | 5899 | boardp->adv_reqp = reqp; |
7078 | 5900 | ||
7079 | ASC_DBG(1, "adv_isr_callback: done\n"); | 5901 | ASC_DBG(1, "adv_isr_callback: done\n"); |
7080 | 5902 | ||
7081 | return; | 5903 | return; |
7082 | } | 5904 | } |
7083 | 5905 | ||
7084 | /* | 5906 | /* |
7085 | * adv_async_callback() - Adv Library asynchronous event callback function. | 5907 | * adv_async_callback() - Adv Library asynchronous event callback function. |
7086 | */ | 5908 | */ |
7087 | STATIC void | 5909 | static void adv_async_callback(ADV_DVC_VAR *adv_dvc_varp, uchar code) |
7088 | adv_async_callback(ADV_DVC_VAR *adv_dvc_varp, uchar code) | ||
7089 | { | 5910 | { |
7090 | switch (code) | 5911 | switch (code) { |
7091 | { | 5912 | case ADV_ASYNC_SCSI_BUS_RESET_DET: |
7092 | case ADV_ASYNC_SCSI_BUS_RESET_DET: | 5913 | /* |
7093 | /* | 5914 | * The firmware detected a SCSI Bus reset. |
7094 | * The firmware detected a SCSI Bus reset. | 5915 | */ |
7095 | */ | 5916 | ASC_DBG(0, |
7096 | ASC_DBG(0, "adv_async_callback: ADV_ASYNC_SCSI_BUS_RESET_DET\n"); | 5917 | "adv_async_callback: ADV_ASYNC_SCSI_BUS_RESET_DET\n"); |
7097 | break; | 5918 | break; |
7098 | 5919 | ||
7099 | case ADV_ASYNC_RDMA_FAILURE: | 5920 | case ADV_ASYNC_RDMA_FAILURE: |
7100 | /* | 5921 | /* |
7101 | * Handle RDMA failure by resetting the SCSI Bus and | 5922 | * Handle RDMA failure by resetting the SCSI Bus and |
7102 | * possibly the chip if it is unresponsive. Log the error | 5923 | * possibly the chip if it is unresponsive. Log the error |
7103 | * with a unique code. | 5924 | * with a unique code. |
7104 | */ | 5925 | */ |
7105 | ASC_DBG(0, "adv_async_callback: ADV_ASYNC_RDMA_FAILURE\n"); | 5926 | ASC_DBG(0, "adv_async_callback: ADV_ASYNC_RDMA_FAILURE\n"); |
7106 | AdvResetChipAndSB(adv_dvc_varp); | 5927 | AdvResetChipAndSB(adv_dvc_varp); |
7107 | break; | 5928 | break; |
7108 | 5929 | ||
7109 | case ADV_HOST_SCSI_BUS_RESET: | 5930 | case ADV_HOST_SCSI_BUS_RESET: |
7110 | /* | 5931 | /* |
7111 | * Host generated SCSI bus reset occurred. | 5932 | * Host generated SCSI bus reset occurred. |
7112 | */ | 5933 | */ |
7113 | ASC_DBG(0, "adv_async_callback: ADV_HOST_SCSI_BUS_RESET\n"); | 5934 | ASC_DBG(0, "adv_async_callback: ADV_HOST_SCSI_BUS_RESET\n"); |
7114 | break; | 5935 | break; |
7115 | 5936 | ||
7116 | default: | 5937 | default: |
7117 | ASC_DBG1(0, "DvcAsyncCallBack: unknown code 0x%x\n", code); | 5938 | ASC_DBG1(0, "DvcAsyncCallBack: unknown code 0x%x\n", code); |
7118 | break; | 5939 | break; |
7119 | } | 5940 | } |
7120 | } | 5941 | } |
7121 | 5942 | ||
7122 | /* | 5943 | /* |
@@ -7127,50 +5948,50 @@ adv_async_callback(ADV_DVC_VAR *adv_dvc_varp, uchar code) | |||
7127 | * | 5948 | * |
7128 | * 'REQPNEXT(reqp)' returns reqp's next pointer. | 5949 | * 'REQPNEXT(reqp)' returns reqp's next pointer. |
7129 | */ | 5950 | */ |
7130 | STATIC void | 5951 | static void asc_enqueue(asc_queue_t *ascq, REQP reqp, int flag) |
7131 | asc_enqueue(asc_queue_t *ascq, REQP reqp, int flag) | ||
7132 | { | 5952 | { |
7133 | int tid; | 5953 | int tid; |
7134 | 5954 | ||
7135 | ASC_DBG3(3, "asc_enqueue: ascq 0x%lx, reqp 0x%lx, flag %d\n", | 5955 | ASC_DBG3(3, "asc_enqueue: ascq 0x%lx, reqp 0x%lx, flag %d\n", |
7136 | (ulong) ascq, (ulong) reqp, flag); | 5956 | (ulong)ascq, (ulong)reqp, flag); |
7137 | ASC_ASSERT(reqp != NULL); | 5957 | ASC_ASSERT(reqp != NULL); |
7138 | ASC_ASSERT(flag == ASC_FRONT || flag == ASC_BACK); | 5958 | ASC_ASSERT(flag == ASC_FRONT || flag == ASC_BACK); |
7139 | tid = REQPTID(reqp); | 5959 | tid = REQPTID(reqp); |
7140 | ASC_ASSERT(tid >= 0 && tid <= ADV_MAX_TID); | 5960 | ASC_ASSERT(tid >= 0 && tid <= ADV_MAX_TID); |
7141 | if (flag == ASC_FRONT) { | 5961 | if (flag == ASC_FRONT) { |
7142 | reqp->host_scribble = (unsigned char *)ascq->q_first[tid]; | 5962 | reqp->host_scribble = (unsigned char *)ascq->q_first[tid]; |
7143 | ascq->q_first[tid] = reqp; | 5963 | ascq->q_first[tid] = reqp; |
7144 | /* If the queue was empty, set the last pointer. */ | 5964 | /* If the queue was empty, set the last pointer. */ |
7145 | if (ascq->q_last[tid] == NULL) { | 5965 | if (ascq->q_last[tid] == NULL) { |
7146 | ascq->q_last[tid] = reqp; | 5966 | ascq->q_last[tid] = reqp; |
7147 | } | 5967 | } |
7148 | } else { /* ASC_BACK */ | 5968 | } else { /* ASC_BACK */ |
7149 | if (ascq->q_last[tid] != NULL) { | 5969 | if (ascq->q_last[tid] != NULL) { |
7150 | ascq->q_last[tid]->host_scribble = (unsigned char *)reqp; | 5970 | ascq->q_last[tid]->host_scribble = |
7151 | } | 5971 | (unsigned char *)reqp; |
7152 | ascq->q_last[tid] = reqp; | 5972 | } |
7153 | reqp->host_scribble = NULL; | 5973 | ascq->q_last[tid] = reqp; |
7154 | /* If the queue was empty, set the first pointer. */ | 5974 | reqp->host_scribble = NULL; |
7155 | if (ascq->q_first[tid] == NULL) { | 5975 | /* If the queue was empty, set the first pointer. */ |
7156 | ascq->q_first[tid] = reqp; | 5976 | if (ascq->q_first[tid] == NULL) { |
7157 | } | 5977 | ascq->q_first[tid] = reqp; |
7158 | } | 5978 | } |
7159 | /* The queue has at least one entry, set its bit. */ | 5979 | } |
7160 | ascq->q_tidmask |= ADV_TID_TO_TIDMASK(tid); | 5980 | /* The queue has at least one entry, set its bit. */ |
5981 | ascq->q_tidmask |= ADV_TID_TO_TIDMASK(tid); | ||
7161 | #ifdef ADVANSYS_STATS | 5982 | #ifdef ADVANSYS_STATS |
7162 | /* Maintain request queue statistics. */ | 5983 | /* Maintain request queue statistics. */ |
7163 | ascq->q_tot_cnt[tid]++; | 5984 | ascq->q_tot_cnt[tid]++; |
7164 | ascq->q_cur_cnt[tid]++; | 5985 | ascq->q_cur_cnt[tid]++; |
7165 | if (ascq->q_cur_cnt[tid] > ascq->q_max_cnt[tid]) { | 5986 | if (ascq->q_cur_cnt[tid] > ascq->q_max_cnt[tid]) { |
7166 | ascq->q_max_cnt[tid] = ascq->q_cur_cnt[tid]; | 5987 | ascq->q_max_cnt[tid] = ascq->q_cur_cnt[tid]; |
7167 | ASC_DBG2(2, "asc_enqueue: new q_max_cnt[%d] %d\n", | 5988 | ASC_DBG2(2, "asc_enqueue: new q_max_cnt[%d] %d\n", |
7168 | tid, ascq->q_max_cnt[tid]); | 5989 | tid, ascq->q_max_cnt[tid]); |
7169 | } | 5990 | } |
7170 | REQPTIME(reqp) = REQTIMESTAMP(); | 5991 | REQPTIME(reqp) = REQTIMESTAMP(); |
7171 | #endif /* ADVANSYS_STATS */ | 5992 | #endif /* ADVANSYS_STATS */ |
7172 | ASC_DBG1(3, "asc_enqueue: reqp 0x%lx\n", (ulong) reqp); | 5993 | ASC_DBG1(3, "asc_enqueue: reqp 0x%lx\n", (ulong)reqp); |
7173 | return; | 5994 | return; |
7174 | } | 5995 | } |
7175 | 5996 | ||
7176 | /* | 5997 | /* |
@@ -7180,31 +6001,30 @@ asc_enqueue(asc_queue_t *ascq, REQP reqp, int flag) | |||
7180 | * | 6001 | * |
7181 | * 'REQPNEXT(reqp)' returns reqp's next pointer. | 6002 | * 'REQPNEXT(reqp)' returns reqp's next pointer. |
7182 | */ | 6003 | */ |
7183 | STATIC REQP | 6004 | static REQP asc_dequeue(asc_queue_t *ascq, int tid) |
7184 | asc_dequeue(asc_queue_t *ascq, int tid) | ||
7185 | { | 6005 | { |
7186 | REQP reqp; | 6006 | REQP reqp; |
7187 | 6007 | ||
7188 | ASC_DBG2(3, "asc_dequeue: ascq 0x%lx, tid %d\n", (ulong) ascq, tid); | 6008 | ASC_DBG2(3, "asc_dequeue: ascq 0x%lx, tid %d\n", (ulong)ascq, tid); |
7189 | ASC_ASSERT(tid >= 0 && tid <= ADV_MAX_TID); | 6009 | ASC_ASSERT(tid >= 0 && tid <= ADV_MAX_TID); |
7190 | if ((reqp = ascq->q_first[tid]) != NULL) { | 6010 | if ((reqp = ascq->q_first[tid]) != NULL) { |
7191 | ASC_ASSERT(ascq->q_tidmask & ADV_TID_TO_TIDMASK(tid)); | 6011 | ASC_ASSERT(ascq->q_tidmask & ADV_TID_TO_TIDMASK(tid)); |
7192 | ascq->q_first[tid] = REQPNEXT(reqp); | 6012 | ascq->q_first[tid] = REQPNEXT(reqp); |
7193 | /* If the queue is empty, clear its bit and the last pointer. */ | 6013 | /* If the queue is empty, clear its bit and the last pointer. */ |
7194 | if (ascq->q_first[tid] == NULL) { | 6014 | if (ascq->q_first[tid] == NULL) { |
7195 | ascq->q_tidmask &= ~ADV_TID_TO_TIDMASK(tid); | 6015 | ascq->q_tidmask &= ~ADV_TID_TO_TIDMASK(tid); |
7196 | ASC_ASSERT(ascq->q_last[tid] == reqp); | 6016 | ASC_ASSERT(ascq->q_last[tid] == reqp); |
7197 | ascq->q_last[tid] = NULL; | 6017 | ascq->q_last[tid] = NULL; |
7198 | } | 6018 | } |
7199 | #ifdef ADVANSYS_STATS | 6019 | #ifdef ADVANSYS_STATS |
7200 | /* Maintain request queue statistics. */ | 6020 | /* Maintain request queue statistics. */ |
7201 | ascq->q_cur_cnt[tid]--; | 6021 | ascq->q_cur_cnt[tid]--; |
7202 | ASC_ASSERT(ascq->q_cur_cnt[tid] >= 0); | 6022 | ASC_ASSERT(ascq->q_cur_cnt[tid] >= 0); |
7203 | REQTIMESTAT("asc_dequeue", ascq, reqp, tid); | 6023 | REQTIMESTAT("asc_dequeue", ascq, reqp, tid); |
7204 | #endif /* ADVANSYS_STATS */ | 6024 | #endif /* ADVANSYS_STATS */ |
7205 | } | 6025 | } |
7206 | ASC_DBG1(3, "asc_dequeue: reqp 0x%lx\n", (ulong) reqp); | 6026 | ASC_DBG1(3, "asc_dequeue: reqp 0x%lx\n", (ulong)reqp); |
7207 | return reqp; | 6027 | return reqp; |
7208 | } | 6028 | } |
7209 | 6029 | ||
7210 | /* | 6030 | /* |
@@ -7227,74 +6047,76 @@ asc_dequeue(asc_queue_t *ascq, int tid) | |||
7227 | * Unfortunately collecting queuing time statistics adds overhead to | 6047 | * Unfortunately collecting queuing time statistics adds overhead to |
7228 | * the function that isn't inherent to the function's algorithm. | 6048 | * the function that isn't inherent to the function's algorithm. |
7229 | */ | 6049 | */ |
7230 | STATIC REQP | 6050 | static REQP asc_dequeue_list(asc_queue_t *ascq, REQP *lastpp, int tid) |
7231 | asc_dequeue_list(asc_queue_t *ascq, REQP *lastpp, int tid) | ||
7232 | { | 6051 | { |
7233 | REQP firstp, lastp; | 6052 | REQP firstp, lastp; |
7234 | int i; | 6053 | int i; |
7235 | 6054 | ||
7236 | ASC_DBG2(3, "asc_dequeue_list: ascq 0x%lx, tid %d\n", (ulong) ascq, tid); | 6055 | ASC_DBG2(3, "asc_dequeue_list: ascq 0x%lx, tid %d\n", (ulong)ascq, tid); |
7237 | ASC_ASSERT((tid == ASC_TID_ALL) || (tid >= 0 && tid <= ADV_MAX_TID)); | 6056 | ASC_ASSERT((tid == ASC_TID_ALL) || (tid >= 0 && tid <= ADV_MAX_TID)); |
7238 | 6057 | ||
7239 | /* | 6058 | /* |
7240 | * If 'tid' is not ASC_TID_ALL, return requests only for | 6059 | * If 'tid' is not ASC_TID_ALL, return requests only for |
7241 | * the specified 'tid'. If 'tid' is ASC_TID_ALL, return all | 6060 | * the specified 'tid'. If 'tid' is ASC_TID_ALL, return all |
7242 | * requests for all tids. | 6061 | * requests for all tids. |
7243 | */ | 6062 | */ |
7244 | if (tid != ASC_TID_ALL) { | 6063 | if (tid != ASC_TID_ALL) { |
7245 | /* Return all requests for the specified 'tid'. */ | 6064 | /* Return all requests for the specified 'tid'. */ |
7246 | if ((ascq->q_tidmask & ADV_TID_TO_TIDMASK(tid)) == 0) { | 6065 | if ((ascq->q_tidmask & ADV_TID_TO_TIDMASK(tid)) == 0) { |
7247 | /* List is empty; Set first and last return pointers to NULL. */ | 6066 | /* List is empty; Set first and last return pointers to NULL. */ |
7248 | firstp = lastp = NULL; | 6067 | firstp = lastp = NULL; |
7249 | } else { | 6068 | } else { |
7250 | firstp = ascq->q_first[tid]; | 6069 | firstp = ascq->q_first[tid]; |
7251 | lastp = ascq->q_last[tid]; | 6070 | lastp = ascq->q_last[tid]; |
7252 | ascq->q_first[tid] = ascq->q_last[tid] = NULL; | 6071 | ascq->q_first[tid] = ascq->q_last[tid] = NULL; |
7253 | ascq->q_tidmask &= ~ADV_TID_TO_TIDMASK(tid); | 6072 | ascq->q_tidmask &= ~ADV_TID_TO_TIDMASK(tid); |
7254 | #ifdef ADVANSYS_STATS | 6073 | #ifdef ADVANSYS_STATS |
7255 | { | 6074 | { |
7256 | REQP reqp; | 6075 | REQP reqp; |
7257 | ascq->q_cur_cnt[tid] = 0; | 6076 | ascq->q_cur_cnt[tid] = 0; |
7258 | for (reqp = firstp; reqp; reqp = REQPNEXT(reqp)) { | 6077 | for (reqp = firstp; reqp; reqp = REQPNEXT(reqp)) { |
7259 | REQTIMESTAT("asc_dequeue_list", ascq, reqp, tid); | 6078 | REQTIMESTAT("asc_dequeue_list", ascq, |
7260 | } | 6079 | reqp, tid); |
7261 | } | 6080 | } |
6081 | } | ||
7262 | #endif /* ADVANSYS_STATS */ | 6082 | #endif /* ADVANSYS_STATS */ |
7263 | } | 6083 | } |
7264 | } else { | 6084 | } else { |
7265 | /* Return all requests for all tids. */ | 6085 | /* Return all requests for all tids. */ |
7266 | firstp = lastp = NULL; | 6086 | firstp = lastp = NULL; |
7267 | for (i = 0; i <= ADV_MAX_TID; i++) { | 6087 | for (i = 0; i <= ADV_MAX_TID; i++) { |
7268 | if (ascq->q_tidmask & ADV_TID_TO_TIDMASK(i)) { | 6088 | if (ascq->q_tidmask & ADV_TID_TO_TIDMASK(i)) { |
7269 | if (firstp == NULL) { | 6089 | if (firstp == NULL) { |
7270 | firstp = ascq->q_first[i]; | 6090 | firstp = ascq->q_first[i]; |
7271 | lastp = ascq->q_last[i]; | 6091 | lastp = ascq->q_last[i]; |
7272 | } else { | 6092 | } else { |
7273 | ASC_ASSERT(lastp != NULL); | 6093 | ASC_ASSERT(lastp != NULL); |
7274 | lastp->host_scribble = (unsigned char *)ascq->q_first[i]; | 6094 | lastp->host_scribble = |
7275 | lastp = ascq->q_last[i]; | 6095 | (unsigned char *)ascq->q_first[i]; |
7276 | } | 6096 | lastp = ascq->q_last[i]; |
7277 | ascq->q_first[i] = ascq->q_last[i] = NULL; | 6097 | } |
7278 | ascq->q_tidmask &= ~ADV_TID_TO_TIDMASK(i); | 6098 | ascq->q_first[i] = ascq->q_last[i] = NULL; |
6099 | ascq->q_tidmask &= ~ADV_TID_TO_TIDMASK(i); | ||
7279 | #ifdef ADVANSYS_STATS | 6100 | #ifdef ADVANSYS_STATS |
7280 | ascq->q_cur_cnt[i] = 0; | 6101 | ascq->q_cur_cnt[i] = 0; |
7281 | #endif /* ADVANSYS_STATS */ | 6102 | #endif /* ADVANSYS_STATS */ |
7282 | } | 6103 | } |
7283 | } | 6104 | } |
7284 | #ifdef ADVANSYS_STATS | 6105 | #ifdef ADVANSYS_STATS |
7285 | { | 6106 | { |
7286 | REQP reqp; | 6107 | REQP reqp; |
7287 | for (reqp = firstp; reqp; reqp = REQPNEXT(reqp)) { | 6108 | for (reqp = firstp; reqp; reqp = REQPNEXT(reqp)) { |
7288 | REQTIMESTAT("asc_dequeue_list", ascq, reqp, reqp->device->id); | 6109 | REQTIMESTAT("asc_dequeue_list", ascq, reqp, |
7289 | } | 6110 | reqp->device->id); |
7290 | } | 6111 | } |
6112 | } | ||
7291 | #endif /* ADVANSYS_STATS */ | 6113 | #endif /* ADVANSYS_STATS */ |
7292 | } | 6114 | } |
7293 | if (lastpp) { | 6115 | if (lastpp) { |
7294 | *lastpp = lastp; | 6116 | *lastpp = lastp; |
7295 | } | 6117 | } |
7296 | ASC_DBG1(3, "asc_dequeue_list: firstp 0x%lx\n", (ulong) firstp); | 6118 | ASC_DBG1(3, "asc_dequeue_list: firstp 0x%lx\n", (ulong)firstp); |
7297 | return firstp; | 6119 | return firstp; |
7298 | } | 6120 | } |
7299 | 6121 | ||
7300 | /* | 6122 | /* |
@@ -7307,67 +6129,67 @@ asc_dequeue_list(asc_queue_t *ascq, REQP *lastpp, int tid) | |||
7307 | * Return ASC_TRUE if the command was found and removed, | 6129 | * Return ASC_TRUE if the command was found and removed, |
7308 | * otherwise return ASC_FALSE. | 6130 | * otherwise return ASC_FALSE. |
7309 | */ | 6131 | */ |
7310 | STATIC int | 6132 | static int asc_rmqueue(asc_queue_t *ascq, REQP reqp) |
7311 | asc_rmqueue(asc_queue_t *ascq, REQP reqp) | ||
7312 | { | 6133 | { |
7313 | REQP currp, prevp; | 6134 | REQP currp, prevp; |
7314 | int tid; | 6135 | int tid; |
7315 | int ret = ASC_FALSE; | 6136 | int ret = ASC_FALSE; |
7316 | 6137 | ||
7317 | ASC_DBG2(3, "asc_rmqueue: ascq 0x%lx, reqp 0x%lx\n", | 6138 | ASC_DBG2(3, "asc_rmqueue: ascq 0x%lx, reqp 0x%lx\n", |
7318 | (ulong) ascq, (ulong) reqp); | 6139 | (ulong)ascq, (ulong)reqp); |
7319 | ASC_ASSERT(reqp != NULL); | 6140 | ASC_ASSERT(reqp != NULL); |
7320 | 6141 | ||
7321 | tid = REQPTID(reqp); | 6142 | tid = REQPTID(reqp); |
7322 | ASC_ASSERT(tid >= 0 && tid <= ADV_MAX_TID); | 6143 | ASC_ASSERT(tid >= 0 && tid <= ADV_MAX_TID); |
7323 | 6144 | ||
7324 | /* | 6145 | /* |
7325 | * Handle the common case of 'reqp' being the first | 6146 | * Handle the common case of 'reqp' being the first |
7326 | * entry on the queue. | 6147 | * entry on the queue. |
7327 | */ | 6148 | */ |
7328 | if (reqp == ascq->q_first[tid]) { | 6149 | if (reqp == ascq->q_first[tid]) { |
7329 | ret = ASC_TRUE; | 6150 | ret = ASC_TRUE; |
7330 | ascq->q_first[tid] = REQPNEXT(reqp); | 6151 | ascq->q_first[tid] = REQPNEXT(reqp); |
7331 | /* If the queue is now empty, clear its bit and the last pointer. */ | 6152 | /* If the queue is now empty, clear its bit and the last pointer. */ |
7332 | if (ascq->q_first[tid] == NULL) { | 6153 | if (ascq->q_first[tid] == NULL) { |
7333 | ascq->q_tidmask &= ~ADV_TID_TO_TIDMASK(tid); | 6154 | ascq->q_tidmask &= ~ADV_TID_TO_TIDMASK(tid); |
7334 | ASC_ASSERT(ascq->q_last[tid] == reqp); | 6155 | ASC_ASSERT(ascq->q_last[tid] == reqp); |
7335 | ascq->q_last[tid] = NULL; | 6156 | ascq->q_last[tid] = NULL; |
7336 | } | 6157 | } |
7337 | } else if (ascq->q_first[tid] != NULL) { | 6158 | } else if (ascq->q_first[tid] != NULL) { |
7338 | ASC_ASSERT(ascq->q_last[tid] != NULL); | 6159 | ASC_ASSERT(ascq->q_last[tid] != NULL); |
7339 | /* | 6160 | /* |
7340 | * Because the case of 'reqp' being the first entry has been | 6161 | * Because the case of 'reqp' being the first entry has been |
7341 | * handled above and it is known the queue is not empty, if | 6162 | * handled above and it is known the queue is not empty, if |
7342 | * 'reqp' is found on the queue it is guaranteed the queue will | 6163 | * 'reqp' is found on the queue it is guaranteed the queue will |
7343 | * not become empty and that 'q_first[tid]' will not be changed. | 6164 | * not become empty and that 'q_first[tid]' will not be changed. |
7344 | * | 6165 | * |
7345 | * Set 'prevp' to the first entry, 'currp' to the second entry, | 6166 | * Set 'prevp' to the first entry, 'currp' to the second entry, |
7346 | * and search for 'reqp'. | 6167 | * and search for 'reqp'. |
7347 | */ | 6168 | */ |
7348 | for (prevp = ascq->q_first[tid], currp = REQPNEXT(prevp); | 6169 | for (prevp = ascq->q_first[tid], currp = REQPNEXT(prevp); |
7349 | currp; prevp = currp, currp = REQPNEXT(currp)) { | 6170 | currp; prevp = currp, currp = REQPNEXT(currp)) { |
7350 | if (currp == reqp) { | 6171 | if (currp == reqp) { |
7351 | ret = ASC_TRUE; | 6172 | ret = ASC_TRUE; |
7352 | prevp->host_scribble = (unsigned char *)REQPNEXT(currp); | 6173 | prevp->host_scribble = |
7353 | reqp->host_scribble = NULL; | 6174 | (unsigned char *)REQPNEXT(currp); |
7354 | if (ascq->q_last[tid] == reqp) { | 6175 | reqp->host_scribble = NULL; |
7355 | ascq->q_last[tid] = prevp; | 6176 | if (ascq->q_last[tid] == reqp) { |
7356 | } | 6177 | ascq->q_last[tid] = prevp; |
7357 | break; | 6178 | } |
7358 | } | 6179 | break; |
7359 | } | 6180 | } |
7360 | } | 6181 | } |
6182 | } | ||
7361 | #ifdef ADVANSYS_STATS | 6183 | #ifdef ADVANSYS_STATS |
7362 | /* Maintain request queue statistics. */ | 6184 | /* Maintain request queue statistics. */ |
7363 | if (ret == ASC_TRUE) { | 6185 | if (ret == ASC_TRUE) { |
7364 | ascq->q_cur_cnt[tid]--; | 6186 | ascq->q_cur_cnt[tid]--; |
7365 | REQTIMESTAT("asc_rmqueue", ascq, reqp, tid); | 6187 | REQTIMESTAT("asc_rmqueue", ascq, reqp, tid); |
7366 | } | 6188 | } |
7367 | ASC_ASSERT(ascq->q_cur_cnt[tid] >= 0); | 6189 | ASC_ASSERT(ascq->q_cur_cnt[tid] >= 0); |
7368 | #endif /* ADVANSYS_STATS */ | 6190 | #endif /* ADVANSYS_STATS */ |
7369 | ASC_DBG2(3, "asc_rmqueue: reqp 0x%lx, ret %d\n", (ulong) reqp, ret); | 6191 | ASC_DBG2(3, "asc_rmqueue: reqp 0x%lx, ret %d\n", (ulong)reqp, ret); |
7370 | return ret; | 6192 | return ret; |
7371 | } | 6193 | } |
7372 | 6194 | ||
7373 | /* | 6195 | /* |
@@ -7375,37 +6197,38 @@ asc_rmqueue(asc_queue_t *ascq, REQP reqp) | |||
7375 | * | 6197 | * |
7376 | * Calls asc_execute_scsi_cmnd() to execute a REQP/struct scsi_cmnd. | 6198 | * Calls asc_execute_scsi_cmnd() to execute a REQP/struct scsi_cmnd. |
7377 | */ | 6199 | */ |
7378 | STATIC void | 6200 | static void asc_execute_queue(asc_queue_t *ascq) |
7379 | asc_execute_queue(asc_queue_t *ascq) | ||
7380 | { | 6201 | { |
7381 | ADV_SCSI_BIT_ID_TYPE scan_tidmask; | 6202 | ADV_SCSI_BIT_ID_TYPE scan_tidmask; |
7382 | REQP reqp; | 6203 | REQP reqp; |
7383 | int i; | 6204 | int i; |
7384 | 6205 | ||
7385 | ASC_DBG1(1, "asc_execute_queue: ascq 0x%lx\n", (ulong) ascq); | 6206 | ASC_DBG1(1, "asc_execute_queue: ascq 0x%lx\n", (ulong)ascq); |
7386 | /* | 6207 | /* |
7387 | * Execute queued commands for devices attached to | 6208 | * Execute queued commands for devices attached to |
7388 | * the current board in round-robin fashion. | 6209 | * the current board in round-robin fashion. |
7389 | */ | 6210 | */ |
7390 | scan_tidmask = ascq->q_tidmask; | 6211 | scan_tidmask = ascq->q_tidmask; |
7391 | do { | 6212 | do { |
7392 | for (i = 0; i <= ADV_MAX_TID; i++) { | 6213 | for (i = 0; i <= ADV_MAX_TID; i++) { |
7393 | if (scan_tidmask & ADV_TID_TO_TIDMASK(i)) { | 6214 | if (scan_tidmask & ADV_TID_TO_TIDMASK(i)) { |
7394 | if ((reqp = asc_dequeue(ascq, i)) == NULL) { | 6215 | if ((reqp = asc_dequeue(ascq, i)) == NULL) { |
7395 | scan_tidmask &= ~ADV_TID_TO_TIDMASK(i); | 6216 | scan_tidmask &= ~ADV_TID_TO_TIDMASK(i); |
7396 | } else if (asc_execute_scsi_cmnd((struct scsi_cmnd *) reqp) | 6217 | } else |
7397 | == ASC_BUSY) { | 6218 | if (asc_execute_scsi_cmnd |
7398 | scan_tidmask &= ~ADV_TID_TO_TIDMASK(i); | 6219 | ((struct scsi_cmnd *)reqp) |
7399 | /* | 6220 | == ASC_BUSY) { |
7400 | * The request returned ASC_BUSY. Enqueue at the front of | 6221 | scan_tidmask &= ~ADV_TID_TO_TIDMASK(i); |
7401 | * target's waiting list to maintain correct ordering. | 6222 | /* |
7402 | */ | 6223 | * The request returned ASC_BUSY. Enqueue at the front of |
7403 | asc_enqueue(ascq, reqp, ASC_FRONT); | 6224 | * target's waiting list to maintain correct ordering. |
7404 | } | 6225 | */ |
7405 | } | 6226 | asc_enqueue(ascq, reqp, ASC_FRONT); |
7406 | } | 6227 | } |
7407 | } while (scan_tidmask); | 6228 | } |
7408 | return; | 6229 | } |
6230 | } while (scan_tidmask); | ||
6231 | return; | ||
7409 | } | 6232 | } |
7410 | 6233 | ||
7411 | #ifdef CONFIG_PROC_FS | 6234 | #ifdef CONFIG_PROC_FS |
@@ -7420,102 +6243,102 @@ asc_execute_queue(asc_queue_t *ascq) | |||
7420 | * Return the number of characters copied into 'cp'. No more than | 6243 | * Return the number of characters copied into 'cp'. No more than |
7421 | * 'cplen' characters will be copied to 'cp'. | 6244 | * 'cplen' characters will be copied to 'cp'. |
7422 | */ | 6245 | */ |
7423 | STATIC int | 6246 | static int asc_prt_board_devices(struct Scsi_Host *shost, char *cp, int cplen) |
7424 | asc_prt_board_devices(struct Scsi_Host *shp, char *cp, int cplen) | ||
7425 | { | 6247 | { |
7426 | asc_board_t *boardp; | 6248 | asc_board_t *boardp; |
7427 | int leftlen; | 6249 | int leftlen; |
7428 | int totlen; | 6250 | int totlen; |
7429 | int len; | 6251 | int len; |
7430 | int chip_scsi_id; | 6252 | int chip_scsi_id; |
7431 | int i; | 6253 | int i; |
7432 | 6254 | ||
7433 | boardp = ASC_BOARDP(shp); | 6255 | boardp = ASC_BOARDP(shost); |
7434 | leftlen = cplen; | 6256 | leftlen = cplen; |
7435 | totlen = len = 0; | 6257 | totlen = len = 0; |
7436 | 6258 | ||
7437 | len = asc_prt_line(cp, leftlen, | 6259 | len = asc_prt_line(cp, leftlen, |
7438 | "\nDevice Information for AdvanSys SCSI Host %d:\n", shp->host_no); | 6260 | "\nDevice Information for AdvanSys SCSI Host %d:\n", |
7439 | ASC_PRT_NEXT(); | 6261 | shost->host_no); |
7440 | 6262 | ASC_PRT_NEXT(); | |
7441 | if (ASC_NARROW_BOARD(boardp)) { | 6263 | |
7442 | chip_scsi_id = boardp->dvc_cfg.asc_dvc_cfg.chip_scsi_id; | 6264 | if (ASC_NARROW_BOARD(boardp)) { |
7443 | } else { | 6265 | chip_scsi_id = boardp->dvc_cfg.asc_dvc_cfg.chip_scsi_id; |
7444 | chip_scsi_id = boardp->dvc_var.adv_dvc_var.chip_scsi_id; | 6266 | } else { |
7445 | } | 6267 | chip_scsi_id = boardp->dvc_var.adv_dvc_var.chip_scsi_id; |
6268 | } | ||
7446 | 6269 | ||
7447 | len = asc_prt_line(cp, leftlen, "Target IDs Detected:"); | 6270 | len = asc_prt_line(cp, leftlen, "Target IDs Detected:"); |
7448 | ASC_PRT_NEXT(); | 6271 | ASC_PRT_NEXT(); |
7449 | for (i = 0; i <= ADV_MAX_TID; i++) { | 6272 | for (i = 0; i <= ADV_MAX_TID; i++) { |
7450 | if (boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) { | 6273 | if (boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) { |
7451 | len = asc_prt_line(cp, leftlen, " %X,", i); | 6274 | len = asc_prt_line(cp, leftlen, " %X,", i); |
7452 | ASC_PRT_NEXT(); | 6275 | ASC_PRT_NEXT(); |
7453 | } | 6276 | } |
7454 | } | 6277 | } |
7455 | len = asc_prt_line(cp, leftlen, " (%X=Host Adapter)\n", chip_scsi_id); | 6278 | len = asc_prt_line(cp, leftlen, " (%X=Host Adapter)\n", chip_scsi_id); |
7456 | ASC_PRT_NEXT(); | 6279 | ASC_PRT_NEXT(); |
7457 | 6280 | ||
7458 | return totlen; | 6281 | return totlen; |
7459 | } | 6282 | } |
7460 | 6283 | ||
7461 | /* | 6284 | /* |
7462 | * Display Wide Board BIOS Information. | 6285 | * Display Wide Board BIOS Information. |
7463 | */ | 6286 | */ |
7464 | STATIC int | 6287 | static int asc_prt_adv_bios(struct Scsi_Host *shost, char *cp, int cplen) |
7465 | asc_prt_adv_bios(struct Scsi_Host *shp, char *cp, int cplen) | ||
7466 | { | 6288 | { |
7467 | asc_board_t *boardp; | 6289 | asc_board_t *boardp; |
7468 | int leftlen; | 6290 | int leftlen; |
7469 | int totlen; | 6291 | int totlen; |
7470 | int len; | 6292 | int len; |
7471 | ushort major, minor, letter; | 6293 | ushort major, minor, letter; |
7472 | 6294 | ||
7473 | boardp = ASC_BOARDP(shp); | 6295 | boardp = ASC_BOARDP(shost); |
7474 | leftlen = cplen; | 6296 | leftlen = cplen; |
7475 | totlen = len = 0; | 6297 | totlen = len = 0; |
6298 | |||
6299 | len = asc_prt_line(cp, leftlen, "\nROM BIOS Version: "); | ||
6300 | ASC_PRT_NEXT(); | ||
6301 | |||
6302 | /* | ||
6303 | * If the BIOS saved a valid signature, then fill in | ||
6304 | * the BIOS code segment base address. | ||
6305 | */ | ||
6306 | if (boardp->bios_signature != 0x55AA) { | ||
6307 | len = asc_prt_line(cp, leftlen, "Disabled or Pre-3.1\n"); | ||
6308 | ASC_PRT_NEXT(); | ||
6309 | len = asc_prt_line(cp, leftlen, | ||
6310 | "BIOS either disabled or Pre-3.1. If it is pre-3.1, then a newer version\n"); | ||
6311 | ASC_PRT_NEXT(); | ||
6312 | len = asc_prt_line(cp, leftlen, | ||
6313 | "can be found at the ConnectCom FTP site: ftp://ftp.connectcom.net/pub\n"); | ||
6314 | ASC_PRT_NEXT(); | ||
6315 | } else { | ||
6316 | major = (boardp->bios_version >> 12) & 0xF; | ||
6317 | minor = (boardp->bios_version >> 8) & 0xF; | ||
6318 | letter = (boardp->bios_version & 0xFF); | ||
7476 | 6319 | ||
7477 | len = asc_prt_line(cp, leftlen, "\nROM BIOS Version: "); | 6320 | len = asc_prt_line(cp, leftlen, "%d.%d%c\n", |
7478 | ASC_PRT_NEXT(); | 6321 | major, minor, |
6322 | letter >= 26 ? '?' : letter + 'A'); | ||
6323 | ASC_PRT_NEXT(); | ||
7479 | 6324 | ||
7480 | /* | 6325 | /* |
7481 | * If the BIOS saved a valid signature, then fill in | 6326 | * Current available ROM BIOS release is 3.1I for UW |
7482 | * the BIOS code segment base address. | 6327 | * and 3.2I for U2W. This code doesn't differentiate |
7483 | */ | 6328 | * UW and U2W boards. |
7484 | if (boardp->bios_signature != 0x55AA) { | 6329 | */ |
7485 | len = asc_prt_line(cp, leftlen, "Disabled or Pre-3.1\n"); | 6330 | if (major < 3 || (major <= 3 && minor < 1) || |
7486 | ASC_PRT_NEXT(); | 6331 | (major <= 3 && minor <= 1 && letter < ('I' - 'A'))) { |
7487 | len = asc_prt_line(cp, leftlen, | 6332 | len = asc_prt_line(cp, leftlen, |
7488 | "BIOS either disabled or Pre-3.1. If it is pre-3.1, then a newer version\n"); | 6333 | "Newer version of ROM BIOS is available at the ConnectCom FTP site:\n"); |
7489 | ASC_PRT_NEXT(); | 6334 | ASC_PRT_NEXT(); |
7490 | len = asc_prt_line(cp, leftlen, | 6335 | len = asc_prt_line(cp, leftlen, |
7491 | "can be found at the ConnectCom FTP site: ftp://ftp.connectcom.net/pub\n"); | 6336 | "ftp://ftp.connectcom.net/pub\n"); |
7492 | ASC_PRT_NEXT(); | 6337 | ASC_PRT_NEXT(); |
7493 | } else { | 6338 | } |
7494 | major = (boardp->bios_version >> 12) & 0xF; | 6339 | } |
7495 | minor = (boardp->bios_version >> 8) & 0xF; | ||
7496 | letter = (boardp->bios_version & 0xFF); | ||
7497 | |||
7498 | len = asc_prt_line(cp, leftlen, "%d.%d%c\n", | ||
7499 | major, minor, letter >= 26 ? '?' : letter + 'A'); | ||
7500 | ASC_PRT_NEXT(); | ||
7501 | |||
7502 | /* | ||
7503 | * Current available ROM BIOS release is 3.1I for UW | ||
7504 | * and 3.2I for U2W. This code doesn't differentiate | ||
7505 | * UW and U2W boards. | ||
7506 | */ | ||
7507 | if (major < 3 || (major <= 3 && minor < 1) || | ||
7508 | (major <= 3 && minor <= 1 && letter < ('I'- 'A'))) { | ||
7509 | len = asc_prt_line(cp, leftlen, | ||
7510 | "Newer version of ROM BIOS is available at the ConnectCom FTP site:\n"); | ||
7511 | ASC_PRT_NEXT(); | ||
7512 | len = asc_prt_line(cp, leftlen, | ||
7513 | "ftp://ftp.connectcom.net/pub\n"); | ||
7514 | ASC_PRT_NEXT(); | ||
7515 | } | ||
7516 | } | ||
7517 | 6340 | ||
7518 | return totlen; | 6341 | return totlen; |
7519 | } | 6342 | } |
7520 | 6343 | ||
7521 | /* | 6344 | /* |
@@ -7541,80 +6364,79 @@ asc_prt_adv_bios(struct Scsi_Host *shp, char *cp, int cplen) | |||
7541 | * | 6364 | * |
7542 | * Returns ASC_TRUE if serial number found, otherwise returns ASC_FALSE. | 6365 | * Returns ASC_TRUE if serial number found, otherwise returns ASC_FALSE. |
7543 | */ | 6366 | */ |
7544 | STATIC int | 6367 | static int asc_get_eeprom_string(ushort *serialnum, uchar *cp) |
7545 | asc_get_eeprom_string(ushort *serialnum, uchar *cp) | ||
7546 | { | 6368 | { |
7547 | ushort w, num; | 6369 | ushort w, num; |
7548 | 6370 | ||
7549 | if ((serialnum[1] & 0xFE00) != ((ushort) 0xAA << 8)) { | 6371 | if ((serialnum[1] & 0xFE00) != ((ushort)0xAA << 8)) { |
7550 | return ASC_FALSE; | 6372 | return ASC_FALSE; |
7551 | } else { | 6373 | } else { |
7552 | /* | 6374 | /* |
7553 | * First word - 6 digits. | 6375 | * First word - 6 digits. |
7554 | */ | 6376 | */ |
7555 | w = serialnum[0]; | 6377 | w = serialnum[0]; |
7556 | 6378 | ||
7557 | /* Product type - 1st digit. */ | 6379 | /* Product type - 1st digit. */ |
7558 | if ((*cp = 'A' + ((w & 0xE000) >> 13)) == 'H') { | 6380 | if ((*cp = 'A' + ((w & 0xE000) >> 13)) == 'H') { |
7559 | /* Product type is P=Prototype */ | 6381 | /* Product type is P=Prototype */ |
7560 | *cp += 0x8; | 6382 | *cp += 0x8; |
7561 | } | 6383 | } |
7562 | cp++; | 6384 | cp++; |
7563 | 6385 | ||
7564 | /* Manufacturing location - 2nd digit. */ | 6386 | /* Manufacturing location - 2nd digit. */ |
7565 | *cp++ = 'A' + ((w & 0x1C00) >> 10); | 6387 | *cp++ = 'A' + ((w & 0x1C00) >> 10); |
7566 | 6388 | ||
7567 | /* Product ID - 3rd, 4th digits. */ | 6389 | /* Product ID - 3rd, 4th digits. */ |
7568 | num = w & 0x3FF; | 6390 | num = w & 0x3FF; |
7569 | *cp++ = '0' + (num / 100); | 6391 | *cp++ = '0' + (num / 100); |
7570 | num %= 100; | 6392 | num %= 100; |
7571 | *cp++ = '0' + (num / 10); | 6393 | *cp++ = '0' + (num / 10); |
7572 | 6394 | ||
7573 | /* Product revision - 5th digit. */ | 6395 | /* Product revision - 5th digit. */ |
7574 | *cp++ = 'A' + (num % 10); | 6396 | *cp++ = 'A' + (num % 10); |
7575 | 6397 | ||
7576 | /* | 6398 | /* |
7577 | * Second word | 6399 | * Second word |
7578 | */ | 6400 | */ |
7579 | w = serialnum[1]; | 6401 | w = serialnum[1]; |
7580 | 6402 | ||
7581 | /* | 6403 | /* |
7582 | * Year - 6th digit. | 6404 | * Year - 6th digit. |
7583 | * | 6405 | * |
7584 | * If bit 15 of third word is set, then the | 6406 | * If bit 15 of third word is set, then the |
7585 | * last digit of the year is greater than 7. | 6407 | * last digit of the year is greater than 7. |
7586 | */ | 6408 | */ |
7587 | if (serialnum[2] & 0x8000) { | 6409 | if (serialnum[2] & 0x8000) { |
7588 | *cp++ = '8' + ((w & 0x1C0) >> 6); | 6410 | *cp++ = '8' + ((w & 0x1C0) >> 6); |
7589 | } else { | 6411 | } else { |
7590 | *cp++ = '0' + ((w & 0x1C0) >> 6); | 6412 | *cp++ = '0' + ((w & 0x1C0) >> 6); |
7591 | } | 6413 | } |
7592 | 6414 | ||
7593 | /* Week of year - 7th, 8th digits. */ | 6415 | /* Week of year - 7th, 8th digits. */ |
7594 | num = w & 0x003F; | 6416 | num = w & 0x003F; |
7595 | *cp++ = '0' + num / 10; | 6417 | *cp++ = '0' + num / 10; |
7596 | num %= 10; | 6418 | num %= 10; |
7597 | *cp++ = '0' + num; | 6419 | *cp++ = '0' + num; |
7598 | 6420 | ||
7599 | /* | 6421 | /* |
7600 | * Third word | 6422 | * Third word |
7601 | */ | 6423 | */ |
7602 | w = serialnum[2] & 0x7FFF; | 6424 | w = serialnum[2] & 0x7FFF; |
7603 | 6425 | ||
7604 | /* Serial number - 9th digit. */ | 6426 | /* Serial number - 9th digit. */ |
7605 | *cp++ = 'A' + (w / 1000); | 6427 | *cp++ = 'A' + (w / 1000); |
7606 | 6428 | ||
7607 | /* 10th, 11th, 12th digits. */ | 6429 | /* 10th, 11th, 12th digits. */ |
7608 | num = w % 1000; | 6430 | num = w % 1000; |
7609 | *cp++ = '0' + num / 100; | 6431 | *cp++ = '0' + num / 100; |
7610 | num %= 100; | 6432 | num %= 100; |
7611 | *cp++ = '0' + num / 10; | 6433 | *cp++ = '0' + num / 10; |
7612 | num %= 10; | 6434 | num %= 10; |
7613 | *cp++ = '0' + num; | 6435 | *cp++ = '0' + num; |
7614 | 6436 | ||
7615 | *cp = '\0'; /* Null Terminate the string. */ | 6437 | *cp = '\0'; /* Null Terminate the string. */ |
7616 | return ASC_TRUE; | 6438 | return ASC_TRUE; |
7617 | } | 6439 | } |
7618 | } | 6440 | } |
7619 | 6441 | ||
7620 | /* | 6442 | /* |
@@ -7628,122 +6450,127 @@ asc_get_eeprom_string(ushort *serialnum, uchar *cp) | |||
7628 | * Return the number of characters copied into 'cp'. No more than | 6450 | * Return the number of characters copied into 'cp'. No more than |
7629 | * 'cplen' characters will be copied to 'cp'. | 6451 | * 'cplen' characters will be copied to 'cp'. |
7630 | */ | 6452 | */ |
7631 | STATIC int | 6453 | static int asc_prt_asc_board_eeprom(struct Scsi_Host *shost, char *cp, int cplen) |
7632 | asc_prt_asc_board_eeprom(struct Scsi_Host *shp, char *cp, int cplen) | ||
7633 | { | 6454 | { |
7634 | asc_board_t *boardp; | 6455 | asc_board_t *boardp; |
7635 | ASC_DVC_VAR *asc_dvc_varp; | 6456 | ASC_DVC_VAR *asc_dvc_varp; |
7636 | int leftlen; | 6457 | int leftlen; |
7637 | int totlen; | 6458 | int totlen; |
7638 | int len; | 6459 | int len; |
7639 | ASCEEP_CONFIG *ep; | 6460 | ASCEEP_CONFIG *ep; |
7640 | int i; | 6461 | int i; |
7641 | #ifdef CONFIG_ISA | 6462 | #ifdef CONFIG_ISA |
7642 | int isa_dma_speed[] = { 10, 8, 7, 6, 5, 4, 3, 2 }; | 6463 | int isa_dma_speed[] = { 10, 8, 7, 6, 5, 4, 3, 2 }; |
7643 | #endif /* CONFIG_ISA */ | 6464 | #endif /* CONFIG_ISA */ |
7644 | uchar serialstr[13]; | 6465 | uchar serialstr[13]; |
7645 | 6466 | ||
7646 | boardp = ASC_BOARDP(shp); | 6467 | boardp = ASC_BOARDP(shost); |
7647 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; | 6468 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; |
7648 | ep = &boardp->eep_config.asc_eep; | 6469 | ep = &boardp->eep_config.asc_eep; |
7649 | 6470 | ||
7650 | leftlen = cplen; | 6471 | leftlen = cplen; |
7651 | totlen = len = 0; | 6472 | totlen = len = 0; |
7652 | 6473 | ||
7653 | len = asc_prt_line(cp, leftlen, | 6474 | len = asc_prt_line(cp, leftlen, |
7654 | "\nEEPROM Settings for AdvanSys SCSI Host %d:\n", shp->host_no); | 6475 | "\nEEPROM Settings for AdvanSys SCSI Host %d:\n", |
7655 | ASC_PRT_NEXT(); | 6476 | shost->host_no); |
7656 | 6477 | ASC_PRT_NEXT(); | |
7657 | if (asc_get_eeprom_string((ushort *) &ep->adapter_info[0], serialstr) == | 6478 | |
7658 | ASC_TRUE) { | 6479 | if (asc_get_eeprom_string((ushort *)&ep->adapter_info[0], serialstr) |
7659 | len = asc_prt_line(cp, leftlen, " Serial Number: %s\n", serialstr); | 6480 | == ASC_TRUE) { |
7660 | ASC_PRT_NEXT(); | 6481 | len = |
7661 | } else { | 6482 | asc_prt_line(cp, leftlen, " Serial Number: %s\n", |
7662 | if (ep->adapter_info[5] == 0xBB) { | 6483 | serialstr); |
7663 | len = asc_prt_line(cp, leftlen, | 6484 | ASC_PRT_NEXT(); |
7664 | " Default Settings Used for EEPROM-less Adapter.\n"); | 6485 | } else { |
7665 | ASC_PRT_NEXT(); | 6486 | if (ep->adapter_info[5] == 0xBB) { |
7666 | } else { | 6487 | len = asc_prt_line(cp, leftlen, |
7667 | len = asc_prt_line(cp, leftlen, | 6488 | " Default Settings Used for EEPROM-less Adapter.\n"); |
7668 | " Serial Number Signature Not Present.\n"); | 6489 | ASC_PRT_NEXT(); |
7669 | ASC_PRT_NEXT(); | 6490 | } else { |
7670 | } | 6491 | len = asc_prt_line(cp, leftlen, |
7671 | } | 6492 | " Serial Number Signature Not Present.\n"); |
6493 | ASC_PRT_NEXT(); | ||
6494 | } | ||
6495 | } | ||
7672 | 6496 | ||
7673 | len = asc_prt_line(cp, leftlen, | 6497 | len = asc_prt_line(cp, leftlen, |
7674 | " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n", | 6498 | " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n", |
7675 | ASC_EEP_GET_CHIP_ID(ep), ep->max_total_qng, ep->max_tag_qng); | 6499 | ASC_EEP_GET_CHIP_ID(ep), ep->max_total_qng, |
7676 | ASC_PRT_NEXT(); | 6500 | ep->max_tag_qng); |
7677 | 6501 | ASC_PRT_NEXT(); | |
7678 | len = asc_prt_line(cp, leftlen, | 6502 | |
7679 | " cntl 0x%x, no_scam 0x%x\n", | 6503 | len = asc_prt_line(cp, leftlen, |
7680 | ep->cntl, ep->no_scam); | 6504 | " cntl 0x%x, no_scam 0x%x\n", ep->cntl, ep->no_scam); |
7681 | ASC_PRT_NEXT(); | 6505 | ASC_PRT_NEXT(); |
7682 | 6506 | ||
7683 | len = asc_prt_line(cp, leftlen, | 6507 | len = asc_prt_line(cp, leftlen, " Target ID: "); |
7684 | " Target ID: "); | 6508 | ASC_PRT_NEXT(); |
7685 | ASC_PRT_NEXT(); | 6509 | for (i = 0; i <= ASC_MAX_TID; i++) { |
7686 | for (i = 0; i <= ASC_MAX_TID; i++) { | 6510 | len = asc_prt_line(cp, leftlen, " %d", i); |
7687 | len = asc_prt_line(cp, leftlen, " %d", i); | 6511 | ASC_PRT_NEXT(); |
7688 | ASC_PRT_NEXT(); | 6512 | } |
7689 | } | 6513 | len = asc_prt_line(cp, leftlen, "\n"); |
7690 | len = asc_prt_line(cp, leftlen, "\n"); | 6514 | ASC_PRT_NEXT(); |
7691 | ASC_PRT_NEXT(); | 6515 | |
7692 | 6516 | len = asc_prt_line(cp, leftlen, " Disconnects: "); | |
7693 | len = asc_prt_line(cp, leftlen, | 6517 | ASC_PRT_NEXT(); |
7694 | " Disconnects: "); | 6518 | for (i = 0; i <= ASC_MAX_TID; i++) { |
7695 | ASC_PRT_NEXT(); | 6519 | len = asc_prt_line(cp, leftlen, " %c", |
7696 | for (i = 0; i <= ASC_MAX_TID; i++) { | 6520 | (ep-> |
7697 | len = asc_prt_line(cp, leftlen, " %c", | 6521 | disc_enable & ADV_TID_TO_TIDMASK(i)) ? 'Y' : |
7698 | (ep->disc_enable & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | 6522 | 'N'); |
7699 | ASC_PRT_NEXT(); | 6523 | ASC_PRT_NEXT(); |
7700 | } | 6524 | } |
7701 | len = asc_prt_line(cp, leftlen, "\n"); | 6525 | len = asc_prt_line(cp, leftlen, "\n"); |
7702 | ASC_PRT_NEXT(); | 6526 | ASC_PRT_NEXT(); |
7703 | 6527 | ||
7704 | len = asc_prt_line(cp, leftlen, | 6528 | len = asc_prt_line(cp, leftlen, " Command Queuing: "); |
7705 | " Command Queuing: "); | 6529 | ASC_PRT_NEXT(); |
7706 | ASC_PRT_NEXT(); | 6530 | for (i = 0; i <= ASC_MAX_TID; i++) { |
7707 | for (i = 0; i <= ASC_MAX_TID; i++) { | 6531 | len = asc_prt_line(cp, leftlen, " %c", |
7708 | len = asc_prt_line(cp, leftlen, " %c", | 6532 | (ep-> |
7709 | (ep->use_cmd_qng & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | 6533 | use_cmd_qng & ADV_TID_TO_TIDMASK(i)) ? 'Y' : |
7710 | ASC_PRT_NEXT(); | 6534 | 'N'); |
7711 | } | 6535 | ASC_PRT_NEXT(); |
7712 | len = asc_prt_line(cp, leftlen, "\n"); | 6536 | } |
7713 | ASC_PRT_NEXT(); | 6537 | len = asc_prt_line(cp, leftlen, "\n"); |
7714 | 6538 | ASC_PRT_NEXT(); | |
7715 | len = asc_prt_line(cp, leftlen, | 6539 | |
7716 | " Start Motor: "); | 6540 | len = asc_prt_line(cp, leftlen, " Start Motor: "); |
7717 | ASC_PRT_NEXT(); | 6541 | ASC_PRT_NEXT(); |
7718 | for (i = 0; i <= ASC_MAX_TID; i++) { | 6542 | for (i = 0; i <= ASC_MAX_TID; i++) { |
7719 | len = asc_prt_line(cp, leftlen, " %c", | 6543 | len = asc_prt_line(cp, leftlen, " %c", |
7720 | (ep->start_motor & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | 6544 | (ep-> |
7721 | ASC_PRT_NEXT(); | 6545 | start_motor & ADV_TID_TO_TIDMASK(i)) ? 'Y' : |
7722 | } | 6546 | 'N'); |
7723 | len = asc_prt_line(cp, leftlen, "\n"); | 6547 | ASC_PRT_NEXT(); |
7724 | ASC_PRT_NEXT(); | 6548 | } |
7725 | 6549 | len = asc_prt_line(cp, leftlen, "\n"); | |
7726 | len = asc_prt_line(cp, leftlen, | 6550 | ASC_PRT_NEXT(); |
7727 | " Synchronous Transfer:"); | 6551 | |
7728 | ASC_PRT_NEXT(); | 6552 | len = asc_prt_line(cp, leftlen, " Synchronous Transfer:"); |
7729 | for (i = 0; i <= ASC_MAX_TID; i++) { | 6553 | ASC_PRT_NEXT(); |
7730 | len = asc_prt_line(cp, leftlen, " %c", | 6554 | for (i = 0; i <= ASC_MAX_TID; i++) { |
7731 | (ep->init_sdtr & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | 6555 | len = asc_prt_line(cp, leftlen, " %c", |
7732 | ASC_PRT_NEXT(); | 6556 | (ep-> |
7733 | } | 6557 | init_sdtr & ADV_TID_TO_TIDMASK(i)) ? 'Y' : |
7734 | len = asc_prt_line(cp, leftlen, "\n"); | 6558 | 'N'); |
7735 | ASC_PRT_NEXT(); | 6559 | ASC_PRT_NEXT(); |
6560 | } | ||
6561 | len = asc_prt_line(cp, leftlen, "\n"); | ||
6562 | ASC_PRT_NEXT(); | ||
7736 | 6563 | ||
7737 | #ifdef CONFIG_ISA | 6564 | #ifdef CONFIG_ISA |
7738 | if (asc_dvc_varp->bus_type & ASC_IS_ISA) { | 6565 | if (asc_dvc_varp->bus_type & ASC_IS_ISA) { |
7739 | len = asc_prt_line(cp, leftlen, | 6566 | len = asc_prt_line(cp, leftlen, |
7740 | " Host ISA DMA speed: %d MB/S\n", | 6567 | " Host ISA DMA speed: %d MB/S\n", |
7741 | isa_dma_speed[ASC_EEP_GET_DMA_SPD(ep)]); | 6568 | isa_dma_speed[ASC_EEP_GET_DMA_SPD(ep)]); |
7742 | ASC_PRT_NEXT(); | 6569 | ASC_PRT_NEXT(); |
7743 | } | 6570 | } |
7744 | #endif /* CONFIG_ISA */ | 6571 | #endif /* CONFIG_ISA */ |
7745 | 6572 | ||
7746 | return totlen; | 6573 | return totlen; |
7747 | } | 6574 | } |
7748 | 6575 | ||
7749 | /* | 6576 | /* |
@@ -7757,300 +6584,282 @@ asc_prt_asc_board_eeprom(struct Scsi_Host *shp, char *cp, int cplen) | |||
7757 | * Return the number of characters copied into 'cp'. No more than | 6584 | * Return the number of characters copied into 'cp'. No more than |
7758 | * 'cplen' characters will be copied to 'cp'. | 6585 | * 'cplen' characters will be copied to 'cp'. |
7759 | */ | 6586 | */ |
7760 | STATIC int | 6587 | static int asc_prt_adv_board_eeprom(struct Scsi_Host *shost, char *cp, int cplen) |
7761 | asc_prt_adv_board_eeprom(struct Scsi_Host *shp, char *cp, int cplen) | ||
7762 | { | 6588 | { |
7763 | asc_board_t *boardp; | 6589 | asc_board_t *boardp; |
7764 | ADV_DVC_VAR *adv_dvc_varp; | 6590 | ADV_DVC_VAR *adv_dvc_varp; |
7765 | int leftlen; | 6591 | int leftlen; |
7766 | int totlen; | 6592 | int totlen; |
7767 | int len; | 6593 | int len; |
7768 | int i; | 6594 | int i; |
7769 | char *termstr; | 6595 | char *termstr; |
7770 | uchar serialstr[13]; | 6596 | uchar serialstr[13]; |
7771 | ADVEEP_3550_CONFIG *ep_3550 = NULL; | 6597 | ADVEEP_3550_CONFIG *ep_3550 = NULL; |
7772 | ADVEEP_38C0800_CONFIG *ep_38C0800 = NULL; | 6598 | ADVEEP_38C0800_CONFIG *ep_38C0800 = NULL; |
7773 | ADVEEP_38C1600_CONFIG *ep_38C1600 = NULL; | 6599 | ADVEEP_38C1600_CONFIG *ep_38C1600 = NULL; |
7774 | ushort word; | 6600 | ushort word; |
7775 | ushort *wordp; | 6601 | ushort *wordp; |
7776 | ushort sdtr_speed = 0; | 6602 | ushort sdtr_speed = 0; |
7777 | 6603 | ||
7778 | boardp = ASC_BOARDP(shp); | 6604 | boardp = ASC_BOARDP(shost); |
7779 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; | 6605 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; |
7780 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) | 6606 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { |
7781 | { | 6607 | ep_3550 = &boardp->eep_config.adv_3550_eep; |
7782 | ep_3550 = &boardp->eep_config.adv_3550_eep; | 6608 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { |
7783 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) | 6609 | ep_38C0800 = &boardp->eep_config.adv_38C0800_eep; |
7784 | { | 6610 | } else { |
7785 | ep_38C0800 = &boardp->eep_config.adv_38C0800_eep; | 6611 | ep_38C1600 = &boardp->eep_config.adv_38C1600_eep; |
7786 | } else | 6612 | } |
7787 | { | ||
7788 | ep_38C1600 = &boardp->eep_config.adv_38C1600_eep; | ||
7789 | } | ||
7790 | 6613 | ||
7791 | leftlen = cplen; | 6614 | leftlen = cplen; |
7792 | totlen = len = 0; | 6615 | totlen = len = 0; |
7793 | |||
7794 | len = asc_prt_line(cp, leftlen, | ||
7795 | "\nEEPROM Settings for AdvanSys SCSI Host %d:\n", shp->host_no); | ||
7796 | ASC_PRT_NEXT(); | ||
7797 | |||
7798 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) | ||
7799 | { | ||
7800 | wordp = &ep_3550->serial_number_word1; | ||
7801 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) | ||
7802 | { | ||
7803 | wordp = &ep_38C0800->serial_number_word1; | ||
7804 | } else | ||
7805 | { | ||
7806 | wordp = &ep_38C1600->serial_number_word1; | ||
7807 | } | ||
7808 | 6616 | ||
7809 | if (asc_get_eeprom_string(wordp, serialstr) == ASC_TRUE) { | 6617 | len = asc_prt_line(cp, leftlen, |
7810 | len = asc_prt_line(cp, leftlen, " Serial Number: %s\n", serialstr); | 6618 | "\nEEPROM Settings for AdvanSys SCSI Host %d:\n", |
7811 | ASC_PRT_NEXT(); | 6619 | shost->host_no); |
7812 | } else { | 6620 | ASC_PRT_NEXT(); |
7813 | len = asc_prt_line(cp, leftlen, | ||
7814 | " Serial Number Signature Not Present.\n"); | ||
7815 | ASC_PRT_NEXT(); | ||
7816 | } | ||
7817 | 6621 | ||
7818 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) | 6622 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { |
7819 | { | 6623 | wordp = &ep_3550->serial_number_word1; |
7820 | len = asc_prt_line(cp, leftlen, | 6624 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { |
7821 | " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n", | 6625 | wordp = &ep_38C0800->serial_number_word1; |
7822 | ep_3550->adapter_scsi_id, ep_3550->max_host_qng, | 6626 | } else { |
7823 | ep_3550->max_dvc_qng); | 6627 | wordp = &ep_38C1600->serial_number_word1; |
7824 | ASC_PRT_NEXT(); | 6628 | } |
7825 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) | ||
7826 | { | ||
7827 | len = asc_prt_line(cp, leftlen, | ||
7828 | " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n", | ||
7829 | ep_38C0800->adapter_scsi_id, ep_38C0800->max_host_qng, | ||
7830 | ep_38C0800->max_dvc_qng); | ||
7831 | ASC_PRT_NEXT(); | ||
7832 | } else | ||
7833 | { | ||
7834 | len = asc_prt_line(cp, leftlen, | ||
7835 | " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n", | ||
7836 | ep_38C1600->adapter_scsi_id, ep_38C1600->max_host_qng, | ||
7837 | ep_38C1600->max_dvc_qng); | ||
7838 | ASC_PRT_NEXT(); | ||
7839 | } | ||
7840 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) | ||
7841 | { | ||
7842 | word = ep_3550->termination; | ||
7843 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) | ||
7844 | { | ||
7845 | word = ep_38C0800->termination_lvd; | ||
7846 | } else | ||
7847 | { | ||
7848 | word = ep_38C1600->termination_lvd; | ||
7849 | } | ||
7850 | switch (word) { | ||
7851 | case 1: | ||
7852 | termstr = "Low Off/High Off"; | ||
7853 | break; | ||
7854 | case 2: | ||
7855 | termstr = "Low Off/High On"; | ||
7856 | break; | ||
7857 | case 3: | ||
7858 | termstr = "Low On/High On"; | ||
7859 | break; | ||
7860 | default: | ||
7861 | case 0: | ||
7862 | termstr = "Automatic"; | ||
7863 | break; | ||
7864 | } | ||
7865 | 6629 | ||
7866 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) | 6630 | if (asc_get_eeprom_string(wordp, serialstr) == ASC_TRUE) { |
7867 | { | 6631 | len = |
7868 | len = asc_prt_line(cp, leftlen, | 6632 | asc_prt_line(cp, leftlen, " Serial Number: %s\n", |
7869 | " termination: %u (%s), bios_ctrl: 0x%x\n", | 6633 | serialstr); |
7870 | ep_3550->termination, termstr, ep_3550->bios_ctrl); | 6634 | ASC_PRT_NEXT(); |
7871 | ASC_PRT_NEXT(); | 6635 | } else { |
7872 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) | 6636 | len = asc_prt_line(cp, leftlen, |
7873 | { | 6637 | " Serial Number Signature Not Present.\n"); |
7874 | len = asc_prt_line(cp, leftlen, | 6638 | ASC_PRT_NEXT(); |
7875 | " termination: %u (%s), bios_ctrl: 0x%x\n", | 6639 | } |
7876 | ep_38C0800->termination_lvd, termstr, ep_38C0800->bios_ctrl); | ||
7877 | ASC_PRT_NEXT(); | ||
7878 | } else | ||
7879 | { | ||
7880 | len = asc_prt_line(cp, leftlen, | ||
7881 | " termination: %u (%s), bios_ctrl: 0x%x\n", | ||
7882 | ep_38C1600->termination_lvd, termstr, ep_38C1600->bios_ctrl); | ||
7883 | ASC_PRT_NEXT(); | ||
7884 | } | ||
7885 | 6640 | ||
7886 | len = asc_prt_line(cp, leftlen, | 6641 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { |
7887 | " Target ID: "); | 6642 | len = asc_prt_line(cp, leftlen, |
7888 | ASC_PRT_NEXT(); | 6643 | " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n", |
7889 | for (i = 0; i <= ADV_MAX_TID; i++) { | 6644 | ep_3550->adapter_scsi_id, |
7890 | len = asc_prt_line(cp, leftlen, " %X", i); | 6645 | ep_3550->max_host_qng, ep_3550->max_dvc_qng); |
7891 | ASC_PRT_NEXT(); | 6646 | ASC_PRT_NEXT(); |
7892 | } | 6647 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { |
7893 | len = asc_prt_line(cp, leftlen, "\n"); | 6648 | len = asc_prt_line(cp, leftlen, |
7894 | ASC_PRT_NEXT(); | 6649 | " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n", |
7895 | 6650 | ep_38C0800->adapter_scsi_id, | |
7896 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) | 6651 | ep_38C0800->max_host_qng, |
7897 | { | 6652 | ep_38C0800->max_dvc_qng); |
7898 | word = ep_3550->disc_enable; | 6653 | ASC_PRT_NEXT(); |
7899 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) | 6654 | } else { |
7900 | { | 6655 | len = asc_prt_line(cp, leftlen, |
7901 | word = ep_38C0800->disc_enable; | 6656 | " Host SCSI ID: %u, Host Queue Size: %u, Device Queue Size: %u\n", |
7902 | } else | 6657 | ep_38C1600->adapter_scsi_id, |
7903 | { | 6658 | ep_38C1600->max_host_qng, |
7904 | word = ep_38C1600->disc_enable; | 6659 | ep_38C1600->max_dvc_qng); |
7905 | } | 6660 | ASC_PRT_NEXT(); |
7906 | len = asc_prt_line(cp, leftlen, | 6661 | } |
7907 | " Disconnects: "); | 6662 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { |
7908 | ASC_PRT_NEXT(); | 6663 | word = ep_3550->termination; |
7909 | for (i = 0; i <= ADV_MAX_TID; i++) { | 6664 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { |
7910 | len = asc_prt_line(cp, leftlen, " %c", | 6665 | word = ep_38C0800->termination_lvd; |
7911 | (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | 6666 | } else { |
7912 | ASC_PRT_NEXT(); | 6667 | word = ep_38C1600->termination_lvd; |
7913 | } | 6668 | } |
7914 | len = asc_prt_line(cp, leftlen, "\n"); | 6669 | switch (word) { |
7915 | ASC_PRT_NEXT(); | 6670 | case 1: |
7916 | 6671 | termstr = "Low Off/High Off"; | |
7917 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) | 6672 | break; |
7918 | { | 6673 | case 2: |
7919 | word = ep_3550->tagqng_able; | 6674 | termstr = "Low Off/High On"; |
7920 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) | 6675 | break; |
7921 | { | 6676 | case 3: |
7922 | word = ep_38C0800->tagqng_able; | 6677 | termstr = "Low On/High On"; |
7923 | } else | 6678 | break; |
7924 | { | 6679 | default: |
7925 | word = ep_38C1600->tagqng_able; | 6680 | case 0: |
7926 | } | 6681 | termstr = "Automatic"; |
7927 | len = asc_prt_line(cp, leftlen, | 6682 | break; |
7928 | " Command Queuing: "); | 6683 | } |
7929 | ASC_PRT_NEXT(); | ||
7930 | for (i = 0; i <= ADV_MAX_TID; i++) { | ||
7931 | len = asc_prt_line(cp, leftlen, " %c", | ||
7932 | (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | ||
7933 | ASC_PRT_NEXT(); | ||
7934 | } | ||
7935 | len = asc_prt_line(cp, leftlen, "\n"); | ||
7936 | ASC_PRT_NEXT(); | ||
7937 | |||
7938 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) | ||
7939 | { | ||
7940 | word = ep_3550->start_motor; | ||
7941 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) | ||
7942 | { | ||
7943 | word = ep_38C0800->start_motor; | ||
7944 | } else | ||
7945 | { | ||
7946 | word = ep_38C1600->start_motor; | ||
7947 | } | ||
7948 | len = asc_prt_line(cp, leftlen, | ||
7949 | " Start Motor: "); | ||
7950 | ASC_PRT_NEXT(); | ||
7951 | for (i = 0; i <= ADV_MAX_TID; i++) { | ||
7952 | len = asc_prt_line(cp, leftlen, " %c", | ||
7953 | (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | ||
7954 | ASC_PRT_NEXT(); | ||
7955 | } | ||
7956 | len = asc_prt_line(cp, leftlen, "\n"); | ||
7957 | ASC_PRT_NEXT(); | ||
7958 | |||
7959 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) | ||
7960 | { | ||
7961 | len = asc_prt_line(cp, leftlen, | ||
7962 | " Synchronous Transfer:"); | ||
7963 | ASC_PRT_NEXT(); | ||
7964 | for (i = 0; i <= ADV_MAX_TID; i++) { | ||
7965 | len = asc_prt_line(cp, leftlen, " %c", | ||
7966 | (ep_3550->sdtr_able & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | ||
7967 | ASC_PRT_NEXT(); | ||
7968 | } | ||
7969 | len = asc_prt_line(cp, leftlen, "\n"); | ||
7970 | ASC_PRT_NEXT(); | ||
7971 | } | ||
7972 | 6684 | ||
7973 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) | 6685 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { |
7974 | { | 6686 | len = asc_prt_line(cp, leftlen, |
7975 | len = asc_prt_line(cp, leftlen, | 6687 | " termination: %u (%s), bios_ctrl: 0x%x\n", |
7976 | " Ultra Transfer: "); | 6688 | ep_3550->termination, termstr, |
7977 | ASC_PRT_NEXT(); | 6689 | ep_3550->bios_ctrl); |
7978 | for (i = 0; i <= ADV_MAX_TID; i++) { | 6690 | ASC_PRT_NEXT(); |
7979 | len = asc_prt_line(cp, leftlen, " %c", | 6691 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { |
7980 | (ep_3550->ultra_able & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | 6692 | len = asc_prt_line(cp, leftlen, |
7981 | ASC_PRT_NEXT(); | 6693 | " termination: %u (%s), bios_ctrl: 0x%x\n", |
7982 | } | 6694 | ep_38C0800->termination_lvd, termstr, |
7983 | len = asc_prt_line(cp, leftlen, "\n"); | 6695 | ep_38C0800->bios_ctrl); |
7984 | ASC_PRT_NEXT(); | 6696 | ASC_PRT_NEXT(); |
7985 | } | 6697 | } else { |
6698 | len = asc_prt_line(cp, leftlen, | ||
6699 | " termination: %u (%s), bios_ctrl: 0x%x\n", | ||
6700 | ep_38C1600->termination_lvd, termstr, | ||
6701 | ep_38C1600->bios_ctrl); | ||
6702 | ASC_PRT_NEXT(); | ||
6703 | } | ||
7986 | 6704 | ||
7987 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) | 6705 | len = asc_prt_line(cp, leftlen, " Target ID: "); |
7988 | { | 6706 | ASC_PRT_NEXT(); |
7989 | word = ep_3550->wdtr_able; | 6707 | for (i = 0; i <= ADV_MAX_TID; i++) { |
7990 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) | 6708 | len = asc_prt_line(cp, leftlen, " %X", i); |
7991 | { | 6709 | ASC_PRT_NEXT(); |
7992 | word = ep_38C0800->wdtr_able; | 6710 | } |
7993 | } else | 6711 | len = asc_prt_line(cp, leftlen, "\n"); |
7994 | { | 6712 | ASC_PRT_NEXT(); |
7995 | word = ep_38C1600->wdtr_able; | 6713 | |
7996 | } | 6714 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { |
7997 | len = asc_prt_line(cp, leftlen, | 6715 | word = ep_3550->disc_enable; |
7998 | " Wide Transfer: "); | 6716 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { |
7999 | ASC_PRT_NEXT(); | 6717 | word = ep_38C0800->disc_enable; |
8000 | for (i = 0; i <= ADV_MAX_TID; i++) { | 6718 | } else { |
8001 | len = asc_prt_line(cp, leftlen, " %c", | 6719 | word = ep_38C1600->disc_enable; |
8002 | (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | 6720 | } |
8003 | ASC_PRT_NEXT(); | 6721 | len = asc_prt_line(cp, leftlen, " Disconnects: "); |
8004 | } | 6722 | ASC_PRT_NEXT(); |
8005 | len = asc_prt_line(cp, leftlen, "\n"); | 6723 | for (i = 0; i <= ADV_MAX_TID; i++) { |
8006 | ASC_PRT_NEXT(); | 6724 | len = asc_prt_line(cp, leftlen, " %c", |
8007 | 6725 | (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | |
8008 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800 || | 6726 | ASC_PRT_NEXT(); |
8009 | adv_dvc_varp->chip_type == ADV_CHIP_ASC38C1600) | 6727 | } |
8010 | { | 6728 | len = asc_prt_line(cp, leftlen, "\n"); |
8011 | len = asc_prt_line(cp, leftlen, | 6729 | ASC_PRT_NEXT(); |
8012 | " Synchronous Transfer Speed (Mhz):\n "); | 6730 | |
8013 | ASC_PRT_NEXT(); | 6731 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { |
8014 | for (i = 0; i <= ADV_MAX_TID; i++) { | 6732 | word = ep_3550->tagqng_able; |
8015 | char *speed_str; | 6733 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { |
8016 | 6734 | word = ep_38C0800->tagqng_able; | |
8017 | if (i == 0) | 6735 | } else { |
8018 | { | 6736 | word = ep_38C1600->tagqng_able; |
8019 | sdtr_speed = adv_dvc_varp->sdtr_speed1; | 6737 | } |
8020 | } else if (i == 4) | 6738 | len = asc_prt_line(cp, leftlen, " Command Queuing: "); |
8021 | { | 6739 | ASC_PRT_NEXT(); |
8022 | sdtr_speed = adv_dvc_varp->sdtr_speed2; | 6740 | for (i = 0; i <= ADV_MAX_TID; i++) { |
8023 | } else if (i == 8) | 6741 | len = asc_prt_line(cp, leftlen, " %c", |
8024 | { | 6742 | (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); |
8025 | sdtr_speed = adv_dvc_varp->sdtr_speed3; | 6743 | ASC_PRT_NEXT(); |
8026 | } else if (i == 12) | 6744 | } |
8027 | { | 6745 | len = asc_prt_line(cp, leftlen, "\n"); |
8028 | sdtr_speed = adv_dvc_varp->sdtr_speed4; | 6746 | ASC_PRT_NEXT(); |
8029 | } | 6747 | |
8030 | switch (sdtr_speed & ADV_MAX_TID) | 6748 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { |
8031 | { | 6749 | word = ep_3550->start_motor; |
8032 | case 0: speed_str = "Off"; break; | 6750 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { |
8033 | case 1: speed_str = " 5"; break; | 6751 | word = ep_38C0800->start_motor; |
8034 | case 2: speed_str = " 10"; break; | 6752 | } else { |
8035 | case 3: speed_str = " 20"; break; | 6753 | word = ep_38C1600->start_motor; |
8036 | case 4: speed_str = " 40"; break; | 6754 | } |
8037 | case 5: speed_str = " 80"; break; | 6755 | len = asc_prt_line(cp, leftlen, " Start Motor: "); |
8038 | default: speed_str = "Unk"; break; | 6756 | ASC_PRT_NEXT(); |
8039 | } | 6757 | for (i = 0; i <= ADV_MAX_TID; i++) { |
8040 | len = asc_prt_line(cp, leftlen, "%X:%s ", i, speed_str); | 6758 | len = asc_prt_line(cp, leftlen, " %c", |
8041 | ASC_PRT_NEXT(); | 6759 | (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); |
8042 | if (i == 7) | 6760 | ASC_PRT_NEXT(); |
8043 | { | 6761 | } |
8044 | len = asc_prt_line(cp, leftlen, "\n "); | 6762 | len = asc_prt_line(cp, leftlen, "\n"); |
8045 | ASC_PRT_NEXT(); | 6763 | ASC_PRT_NEXT(); |
8046 | } | 6764 | |
8047 | sdtr_speed >>= 4; | 6765 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { |
8048 | } | 6766 | len = asc_prt_line(cp, leftlen, " Synchronous Transfer:"); |
8049 | len = asc_prt_line(cp, leftlen, "\n"); | 6767 | ASC_PRT_NEXT(); |
8050 | ASC_PRT_NEXT(); | 6768 | for (i = 0; i <= ADV_MAX_TID; i++) { |
8051 | } | 6769 | len = asc_prt_line(cp, leftlen, " %c", |
6770 | (ep_3550-> | ||
6771 | sdtr_able & ADV_TID_TO_TIDMASK(i)) ? | ||
6772 | 'Y' : 'N'); | ||
6773 | ASC_PRT_NEXT(); | ||
6774 | } | ||
6775 | len = asc_prt_line(cp, leftlen, "\n"); | ||
6776 | ASC_PRT_NEXT(); | ||
6777 | } | ||
6778 | |||
6779 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { | ||
6780 | len = asc_prt_line(cp, leftlen, " Ultra Transfer: "); | ||
6781 | ASC_PRT_NEXT(); | ||
6782 | for (i = 0; i <= ADV_MAX_TID; i++) { | ||
6783 | len = asc_prt_line(cp, leftlen, " %c", | ||
6784 | (ep_3550-> | ||
6785 | ultra_able & ADV_TID_TO_TIDMASK(i)) | ||
6786 | ? 'Y' : 'N'); | ||
6787 | ASC_PRT_NEXT(); | ||
6788 | } | ||
6789 | len = asc_prt_line(cp, leftlen, "\n"); | ||
6790 | ASC_PRT_NEXT(); | ||
6791 | } | ||
6792 | |||
6793 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { | ||
6794 | word = ep_3550->wdtr_able; | ||
6795 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { | ||
6796 | word = ep_38C0800->wdtr_able; | ||
6797 | } else { | ||
6798 | word = ep_38C1600->wdtr_able; | ||
6799 | } | ||
6800 | len = asc_prt_line(cp, leftlen, " Wide Transfer: "); | ||
6801 | ASC_PRT_NEXT(); | ||
6802 | for (i = 0; i <= ADV_MAX_TID; i++) { | ||
6803 | len = asc_prt_line(cp, leftlen, " %c", | ||
6804 | (word & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | ||
6805 | ASC_PRT_NEXT(); | ||
6806 | } | ||
6807 | len = asc_prt_line(cp, leftlen, "\n"); | ||
6808 | ASC_PRT_NEXT(); | ||
6809 | |||
6810 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800 || | ||
6811 | adv_dvc_varp->chip_type == ADV_CHIP_ASC38C1600) { | ||
6812 | len = asc_prt_line(cp, leftlen, | ||
6813 | " Synchronous Transfer Speed (Mhz):\n "); | ||
6814 | ASC_PRT_NEXT(); | ||
6815 | for (i = 0; i <= ADV_MAX_TID; i++) { | ||
6816 | char *speed_str; | ||
6817 | |||
6818 | if (i == 0) { | ||
6819 | sdtr_speed = adv_dvc_varp->sdtr_speed1; | ||
6820 | } else if (i == 4) { | ||
6821 | sdtr_speed = adv_dvc_varp->sdtr_speed2; | ||
6822 | } else if (i == 8) { | ||
6823 | sdtr_speed = adv_dvc_varp->sdtr_speed3; | ||
6824 | } else if (i == 12) { | ||
6825 | sdtr_speed = adv_dvc_varp->sdtr_speed4; | ||
6826 | } | ||
6827 | switch (sdtr_speed & ADV_MAX_TID) { | ||
6828 | case 0: | ||
6829 | speed_str = "Off"; | ||
6830 | break; | ||
6831 | case 1: | ||
6832 | speed_str = " 5"; | ||
6833 | break; | ||
6834 | case 2: | ||
6835 | speed_str = " 10"; | ||
6836 | break; | ||
6837 | case 3: | ||
6838 | speed_str = " 20"; | ||
6839 | break; | ||
6840 | case 4: | ||
6841 | speed_str = " 40"; | ||
6842 | break; | ||
6843 | case 5: | ||
6844 | speed_str = " 80"; | ||
6845 | break; | ||
6846 | default: | ||
6847 | speed_str = "Unk"; | ||
6848 | break; | ||
6849 | } | ||
6850 | len = asc_prt_line(cp, leftlen, "%X:%s ", i, speed_str); | ||
6851 | ASC_PRT_NEXT(); | ||
6852 | if (i == 7) { | ||
6853 | len = asc_prt_line(cp, leftlen, "\n "); | ||
6854 | ASC_PRT_NEXT(); | ||
6855 | } | ||
6856 | sdtr_speed >>= 4; | ||
6857 | } | ||
6858 | len = asc_prt_line(cp, leftlen, "\n"); | ||
6859 | ASC_PRT_NEXT(); | ||
6860 | } | ||
8052 | 6861 | ||
8053 | return totlen; | 6862 | return totlen; |
8054 | } | 6863 | } |
8055 | 6864 | ||
8056 | /* | 6865 | /* |
@@ -8062,60 +6871,60 @@ asc_prt_adv_board_eeprom(struct Scsi_Host *shp, char *cp, int cplen) | |||
8062 | * Return the number of characters copied into 'cp'. No more than | 6871 | * Return the number of characters copied into 'cp'. No more than |
8063 | * 'cplen' characters will be copied to 'cp'. | 6872 | * 'cplen' characters will be copied to 'cp'. |
8064 | */ | 6873 | */ |
8065 | STATIC int | 6874 | static int asc_prt_driver_conf(struct Scsi_Host *shost, char *cp, int cplen) |
8066 | asc_prt_driver_conf(struct Scsi_Host *shp, char *cp, int cplen) | ||
8067 | { | 6875 | { |
8068 | asc_board_t *boardp; | 6876 | asc_board_t *boardp; |
8069 | int leftlen; | 6877 | int leftlen; |
8070 | int totlen; | 6878 | int totlen; |
8071 | int len; | 6879 | int len; |
8072 | int chip_scsi_id; | 6880 | int chip_scsi_id; |
8073 | 6881 | ||
8074 | boardp = ASC_BOARDP(shp); | 6882 | boardp = ASC_BOARDP(shost); |
8075 | 6883 | ||
8076 | leftlen = cplen; | 6884 | leftlen = cplen; |
8077 | totlen = len = 0; | 6885 | totlen = len = 0; |
8078 | 6886 | ||
8079 | len = asc_prt_line(cp, leftlen, | 6887 | len = asc_prt_line(cp, leftlen, |
8080 | "\nLinux Driver Configuration and Information for AdvanSys SCSI Host %d:\n", | 6888 | "\nLinux Driver Configuration and Information for AdvanSys SCSI Host %d:\n", |
8081 | shp->host_no); | 6889 | shost->host_no); |
8082 | ASC_PRT_NEXT(); | 6890 | ASC_PRT_NEXT(); |
8083 | 6891 | ||
8084 | len = asc_prt_line(cp, leftlen, | 6892 | len = asc_prt_line(cp, leftlen, |
8085 | " host_busy %u, last_reset %u, max_id %u, max_lun %u, max_channel %u\n", | 6893 | " host_busy %u, last_reset %u, max_id %u, max_lun %u, max_channel %u\n", |
8086 | shp->host_busy, shp->last_reset, shp->max_id, shp->max_lun, | 6894 | shost->host_busy, shost->last_reset, shost->max_id, |
8087 | shp->max_channel); | 6895 | shost->max_lun, shost->max_channel); |
8088 | ASC_PRT_NEXT(); | 6896 | ASC_PRT_NEXT(); |
8089 | 6897 | ||
8090 | len = asc_prt_line(cp, leftlen, | 6898 | len = asc_prt_line(cp, leftlen, |
8091 | " unique_id %d, can_queue %d, this_id %d, sg_tablesize %u, cmd_per_lun %u\n", | 6899 | " unique_id %d, can_queue %d, this_id %d, sg_tablesize %u, cmd_per_lun %u\n", |
8092 | shp->unique_id, shp->can_queue, shp->this_id, shp->sg_tablesize, | 6900 | shost->unique_id, shost->can_queue, shost->this_id, |
8093 | shp->cmd_per_lun); | 6901 | shost->sg_tablesize, shost->cmd_per_lun); |
8094 | ASC_PRT_NEXT(); | 6902 | ASC_PRT_NEXT(); |
8095 | 6903 | ||
8096 | len = asc_prt_line(cp, leftlen, | 6904 | len = asc_prt_line(cp, leftlen, |
8097 | " unchecked_isa_dma %d, use_clustering %d\n", | 6905 | " unchecked_isa_dma %d, use_clustering %d\n", |
8098 | shp->unchecked_isa_dma, shp->use_clustering); | 6906 | shost->unchecked_isa_dma, shost->use_clustering); |
8099 | ASC_PRT_NEXT(); | 6907 | ASC_PRT_NEXT(); |
8100 | 6908 | ||
8101 | len = asc_prt_line(cp, leftlen, | 6909 | len = asc_prt_line(cp, leftlen, |
8102 | " flags 0x%x, last_reset 0x%x, jiffies 0x%x, asc_n_io_port 0x%x\n", | 6910 | " flags 0x%x, last_reset 0x%x, jiffies 0x%x, asc_n_io_port 0x%x\n", |
8103 | boardp->flags, boardp->last_reset, jiffies, boardp->asc_n_io_port); | 6911 | boardp->flags, boardp->last_reset, jiffies, |
8104 | ASC_PRT_NEXT(); | 6912 | boardp->asc_n_io_port); |
8105 | 6913 | ASC_PRT_NEXT(); | |
8106 | /* 'shp->n_io_port' may be truncated because it is only one byte. */ | 6914 | |
8107 | len = asc_prt_line(cp, leftlen, | 6915 | /* 'shost->n_io_port' may be truncated because it is only one byte. */ |
8108 | " io_port 0x%x, n_io_port 0x%x\n", | 6916 | len = asc_prt_line(cp, leftlen, |
8109 | shp->io_port, shp->n_io_port); | 6917 | " io_port 0x%x, n_io_port 0x%x\n", |
8110 | ASC_PRT_NEXT(); | 6918 | shost->io_port, shost->n_io_port); |
8111 | 6919 | ASC_PRT_NEXT(); | |
8112 | if (ASC_NARROW_BOARD(boardp)) { | 6920 | |
8113 | chip_scsi_id = boardp->dvc_cfg.asc_dvc_cfg.chip_scsi_id; | 6921 | if (ASC_NARROW_BOARD(boardp)) { |
8114 | } else { | 6922 | chip_scsi_id = boardp->dvc_cfg.asc_dvc_cfg.chip_scsi_id; |
8115 | chip_scsi_id = boardp->dvc_var.adv_dvc_var.chip_scsi_id; | 6923 | } else { |
8116 | } | 6924 | chip_scsi_id = boardp->dvc_var.adv_dvc_var.chip_scsi_id; |
6925 | } | ||
8117 | 6926 | ||
8118 | return totlen; | 6927 | return totlen; |
8119 | } | 6928 | } |
8120 | 6929 | ||
8121 | /* | 6930 | /* |
@@ -8129,178 +6938,181 @@ asc_prt_driver_conf(struct Scsi_Host *shp, char *cp, int cplen) | |||
8129 | * Return the number of characters copied into 'cp'. No more than | 6938 | * Return the number of characters copied into 'cp'. No more than |
8130 | * 'cplen' characters will be copied to 'cp'. | 6939 | * 'cplen' characters will be copied to 'cp'. |
8131 | */ | 6940 | */ |
8132 | STATIC int | 6941 | static int asc_prt_asc_board_info(struct Scsi_Host *shost, char *cp, int cplen) |
8133 | asc_prt_asc_board_info(struct Scsi_Host *shp, char *cp, int cplen) | ||
8134 | { | 6942 | { |
8135 | asc_board_t *boardp; | 6943 | asc_board_t *boardp; |
8136 | int chip_scsi_id; | 6944 | int chip_scsi_id; |
8137 | int leftlen; | 6945 | int leftlen; |
8138 | int totlen; | 6946 | int totlen; |
8139 | int len; | 6947 | int len; |
8140 | ASC_DVC_VAR *v; | 6948 | ASC_DVC_VAR *v; |
8141 | ASC_DVC_CFG *c; | 6949 | ASC_DVC_CFG *c; |
8142 | int i; | 6950 | int i; |
8143 | int renegotiate = 0; | 6951 | int renegotiate = 0; |
8144 | 6952 | ||
8145 | boardp = ASC_BOARDP(shp); | 6953 | boardp = ASC_BOARDP(shost); |
8146 | v = &boardp->dvc_var.asc_dvc_var; | 6954 | v = &boardp->dvc_var.asc_dvc_var; |
8147 | c = &boardp->dvc_cfg.asc_dvc_cfg; | 6955 | c = &boardp->dvc_cfg.asc_dvc_cfg; |
8148 | chip_scsi_id = c->chip_scsi_id; | 6956 | chip_scsi_id = c->chip_scsi_id; |
8149 | 6957 | ||
8150 | leftlen = cplen; | 6958 | leftlen = cplen; |
8151 | totlen = len = 0; | 6959 | totlen = len = 0; |
8152 | 6960 | ||
8153 | len = asc_prt_line(cp, leftlen, | 6961 | len = asc_prt_line(cp, leftlen, |
8154 | "\nAsc Library Configuration and Statistics for AdvanSys SCSI Host %d:\n", | 6962 | "\nAsc Library Configuration and Statistics for AdvanSys SCSI Host %d:\n", |
8155 | shp->host_no); | 6963 | shost->host_no); |
8156 | ASC_PRT_NEXT(); | 6964 | ASC_PRT_NEXT(); |
8157 | 6965 | ||
8158 | len = asc_prt_line(cp, leftlen, | 6966 | len = asc_prt_line(cp, leftlen, |
8159 | " chip_version %u, lib_version 0x%x, lib_serial_no %u, mcode_date 0x%x\n", | 6967 | " chip_version %u, lib_version 0x%x, lib_serial_no %u, mcode_date 0x%x\n", |
8160 | c->chip_version, c->lib_version, c->lib_serial_no, c->mcode_date); | 6968 | c->chip_version, c->lib_version, c->lib_serial_no, |
8161 | ASC_PRT_NEXT(); | 6969 | c->mcode_date); |
8162 | 6970 | ASC_PRT_NEXT(); | |
8163 | len = asc_prt_line(cp, leftlen, | 6971 | |
8164 | " mcode_version 0x%x, err_code %u\n", | 6972 | len = asc_prt_line(cp, leftlen, |
8165 | c->mcode_version, v->err_code); | 6973 | " mcode_version 0x%x, err_code %u\n", |
8166 | ASC_PRT_NEXT(); | 6974 | c->mcode_version, v->err_code); |
8167 | 6975 | ASC_PRT_NEXT(); | |
8168 | /* Current number of commands waiting for the host. */ | 6976 | |
8169 | len = asc_prt_line(cp, leftlen, | 6977 | /* Current number of commands waiting for the host. */ |
8170 | " Total Command Pending: %d\n", v->cur_total_qng); | 6978 | len = asc_prt_line(cp, leftlen, |
8171 | ASC_PRT_NEXT(); | 6979 | " Total Command Pending: %d\n", v->cur_total_qng); |
8172 | 6980 | ASC_PRT_NEXT(); | |
8173 | len = asc_prt_line(cp, leftlen, | 6981 | |
8174 | " Command Queuing:"); | 6982 | len = asc_prt_line(cp, leftlen, " Command Queuing:"); |
8175 | ASC_PRT_NEXT(); | 6983 | ASC_PRT_NEXT(); |
8176 | for (i = 0; i <= ASC_MAX_TID; i++) { | 6984 | for (i = 0; i <= ASC_MAX_TID; i++) { |
8177 | if ((chip_scsi_id == i) || | 6985 | if ((chip_scsi_id == i) || |
8178 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { | 6986 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { |
8179 | continue; | 6987 | continue; |
8180 | } | 6988 | } |
8181 | len = asc_prt_line(cp, leftlen, " %X:%c", | 6989 | len = asc_prt_line(cp, leftlen, " %X:%c", |
8182 | i, (v->use_tagged_qng & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | 6990 | i, |
8183 | ASC_PRT_NEXT(); | 6991 | (v-> |
8184 | } | 6992 | use_tagged_qng & ADV_TID_TO_TIDMASK(i)) ? |
8185 | len = asc_prt_line(cp, leftlen, "\n"); | 6993 | 'Y' : 'N'); |
8186 | ASC_PRT_NEXT(); | 6994 | ASC_PRT_NEXT(); |
8187 | 6995 | } | |
8188 | /* Current number of commands waiting for a device. */ | 6996 | len = asc_prt_line(cp, leftlen, "\n"); |
8189 | len = asc_prt_line(cp, leftlen, | 6997 | ASC_PRT_NEXT(); |
8190 | " Command Queue Pending:"); | 6998 | |
8191 | ASC_PRT_NEXT(); | 6999 | /* Current number of commands waiting for a device. */ |
8192 | for (i = 0; i <= ASC_MAX_TID; i++) { | 7000 | len = asc_prt_line(cp, leftlen, " Command Queue Pending:"); |
8193 | if ((chip_scsi_id == i) || | 7001 | ASC_PRT_NEXT(); |
8194 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { | 7002 | for (i = 0; i <= ASC_MAX_TID; i++) { |
8195 | continue; | 7003 | if ((chip_scsi_id == i) || |
8196 | } | 7004 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { |
8197 | len = asc_prt_line(cp, leftlen, " %X:%u", i, v->cur_dvc_qng[i]); | 7005 | continue; |
8198 | ASC_PRT_NEXT(); | 7006 | } |
8199 | } | 7007 | len = asc_prt_line(cp, leftlen, " %X:%u", i, v->cur_dvc_qng[i]); |
8200 | len = asc_prt_line(cp, leftlen, "\n"); | 7008 | ASC_PRT_NEXT(); |
8201 | ASC_PRT_NEXT(); | 7009 | } |
8202 | 7010 | len = asc_prt_line(cp, leftlen, "\n"); | |
8203 | /* Current limit on number of commands that can be sent to a device. */ | 7011 | ASC_PRT_NEXT(); |
8204 | len = asc_prt_line(cp, leftlen, | 7012 | |
8205 | " Command Queue Limit:"); | 7013 | /* Current limit on number of commands that can be sent to a device. */ |
8206 | ASC_PRT_NEXT(); | 7014 | len = asc_prt_line(cp, leftlen, " Command Queue Limit:"); |
8207 | for (i = 0; i <= ASC_MAX_TID; i++) { | 7015 | ASC_PRT_NEXT(); |
8208 | if ((chip_scsi_id == i) || | 7016 | for (i = 0; i <= ASC_MAX_TID; i++) { |
8209 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { | 7017 | if ((chip_scsi_id == i) || |
8210 | continue; | 7018 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { |
8211 | } | 7019 | continue; |
8212 | len = asc_prt_line(cp, leftlen, " %X:%u", i, v->max_dvc_qng[i]); | 7020 | } |
8213 | ASC_PRT_NEXT(); | 7021 | len = asc_prt_line(cp, leftlen, " %X:%u", i, v->max_dvc_qng[i]); |
8214 | } | 7022 | ASC_PRT_NEXT(); |
8215 | len = asc_prt_line(cp, leftlen, "\n"); | 7023 | } |
8216 | ASC_PRT_NEXT(); | 7024 | len = asc_prt_line(cp, leftlen, "\n"); |
8217 | 7025 | ASC_PRT_NEXT(); | |
8218 | /* Indicate whether the device has returned queue full status. */ | 7026 | |
8219 | len = asc_prt_line(cp, leftlen, | 7027 | /* Indicate whether the device has returned queue full status. */ |
8220 | " Command Queue Full:"); | 7028 | len = asc_prt_line(cp, leftlen, " Command Queue Full:"); |
8221 | ASC_PRT_NEXT(); | 7029 | ASC_PRT_NEXT(); |
8222 | for (i = 0; i <= ASC_MAX_TID; i++) { | 7030 | for (i = 0; i <= ASC_MAX_TID; i++) { |
8223 | if ((chip_scsi_id == i) || | 7031 | if ((chip_scsi_id == i) || |
8224 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { | 7032 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { |
8225 | continue; | 7033 | continue; |
8226 | } | 7034 | } |
8227 | if (boardp->queue_full & ADV_TID_TO_TIDMASK(i)) { | 7035 | if (boardp->queue_full & ADV_TID_TO_TIDMASK(i)) { |
8228 | len = asc_prt_line(cp, leftlen, " %X:Y-%d", | 7036 | len = asc_prt_line(cp, leftlen, " %X:Y-%d", |
8229 | i, boardp->queue_full_cnt[i]); | 7037 | i, boardp->queue_full_cnt[i]); |
8230 | } else { | 7038 | } else { |
8231 | len = asc_prt_line(cp, leftlen, " %X:N", i); | 7039 | len = asc_prt_line(cp, leftlen, " %X:N", i); |
8232 | } | 7040 | } |
8233 | ASC_PRT_NEXT(); | 7041 | ASC_PRT_NEXT(); |
8234 | } | 7042 | } |
8235 | len = asc_prt_line(cp, leftlen, "\n"); | 7043 | len = asc_prt_line(cp, leftlen, "\n"); |
8236 | ASC_PRT_NEXT(); | 7044 | ASC_PRT_NEXT(); |
8237 | 7045 | ||
8238 | len = asc_prt_line(cp, leftlen, | 7046 | len = asc_prt_line(cp, leftlen, " Synchronous Transfer:"); |
8239 | " Synchronous Transfer:"); | 7047 | ASC_PRT_NEXT(); |
8240 | ASC_PRT_NEXT(); | 7048 | for (i = 0; i <= ASC_MAX_TID; i++) { |
8241 | for (i = 0; i <= ASC_MAX_TID; i++) { | 7049 | if ((chip_scsi_id == i) || |
8242 | if ((chip_scsi_id == i) || | 7050 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { |
8243 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { | 7051 | continue; |
8244 | continue; | 7052 | } |
8245 | } | 7053 | len = asc_prt_line(cp, leftlen, " %X:%c", |
8246 | len = asc_prt_line(cp, leftlen, " %X:%c", | 7054 | i, |
8247 | i, (v->sdtr_done & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | 7055 | (v-> |
8248 | ASC_PRT_NEXT(); | 7056 | sdtr_done & ADV_TID_TO_TIDMASK(i)) ? 'Y' : |
8249 | } | 7057 | 'N'); |
8250 | len = asc_prt_line(cp, leftlen, "\n"); | 7058 | ASC_PRT_NEXT(); |
8251 | ASC_PRT_NEXT(); | 7059 | } |
8252 | 7060 | len = asc_prt_line(cp, leftlen, "\n"); | |
8253 | for (i = 0; i <= ASC_MAX_TID; i++) { | 7061 | ASC_PRT_NEXT(); |
8254 | uchar syn_period_ix; | 7062 | |
8255 | 7063 | for (i = 0; i <= ASC_MAX_TID; i++) { | |
8256 | if ((chip_scsi_id == i) || | 7064 | uchar syn_period_ix; |
8257 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0) || | 7065 | |
8258 | ((v->init_sdtr & ADV_TID_TO_TIDMASK(i)) == 0)) { | 7066 | if ((chip_scsi_id == i) || |
8259 | continue; | 7067 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0) || |
8260 | } | 7068 | ((v->init_sdtr & ADV_TID_TO_TIDMASK(i)) == 0)) { |
8261 | 7069 | continue; | |
8262 | len = asc_prt_line(cp, leftlen, " %X:", i); | 7070 | } |
8263 | ASC_PRT_NEXT(); | 7071 | |
8264 | 7072 | len = asc_prt_line(cp, leftlen, " %X:", i); | |
8265 | if ((boardp->sdtr_data[i] & ASC_SYN_MAX_OFFSET) == 0) | 7073 | ASC_PRT_NEXT(); |
8266 | { | 7074 | |
8267 | len = asc_prt_line(cp, leftlen, " Asynchronous"); | 7075 | if ((boardp->sdtr_data[i] & ASC_SYN_MAX_OFFSET) == 0) { |
8268 | ASC_PRT_NEXT(); | 7076 | len = asc_prt_line(cp, leftlen, " Asynchronous"); |
8269 | } else | 7077 | ASC_PRT_NEXT(); |
8270 | { | 7078 | } else { |
8271 | syn_period_ix = | 7079 | syn_period_ix = |
8272 | (boardp->sdtr_data[i] >> 4) & (v->max_sdtr_index - 1); | 7080 | (boardp->sdtr_data[i] >> 4) & (v->max_sdtr_index - |
8273 | 7081 | 1); | |
8274 | len = asc_prt_line(cp, leftlen, | 7082 | |
8275 | " Transfer Period Factor: %d (%d.%d Mhz),", | 7083 | len = asc_prt_line(cp, leftlen, |
8276 | v->sdtr_period_tbl[syn_period_ix], | 7084 | " Transfer Period Factor: %d (%d.%d Mhz),", |
8277 | 250 / v->sdtr_period_tbl[syn_period_ix], | 7085 | v->sdtr_period_tbl[syn_period_ix], |
8278 | ASC_TENTHS(250, v->sdtr_period_tbl[syn_period_ix])); | 7086 | 250 / |
8279 | ASC_PRT_NEXT(); | 7087 | v->sdtr_period_tbl[syn_period_ix], |
8280 | 7088 | ASC_TENTHS(250, | |
8281 | len = asc_prt_line(cp, leftlen, " REQ/ACK Offset: %d", | 7089 | v-> |
8282 | boardp->sdtr_data[i] & ASC_SYN_MAX_OFFSET); | 7090 | sdtr_period_tbl |
8283 | ASC_PRT_NEXT(); | 7091 | [syn_period_ix])); |
8284 | } | 7092 | ASC_PRT_NEXT(); |
8285 | 7093 | ||
8286 | if ((v->sdtr_done & ADV_TID_TO_TIDMASK(i)) == 0) { | 7094 | len = asc_prt_line(cp, leftlen, " REQ/ACK Offset: %d", |
8287 | len = asc_prt_line(cp, leftlen, "*\n"); | 7095 | boardp-> |
8288 | renegotiate = 1; | 7096 | sdtr_data[i] & ASC_SYN_MAX_OFFSET); |
8289 | } else | 7097 | ASC_PRT_NEXT(); |
8290 | { | 7098 | } |
8291 | len = asc_prt_line(cp, leftlen, "\n"); | 7099 | |
8292 | } | 7100 | if ((v->sdtr_done & ADV_TID_TO_TIDMASK(i)) == 0) { |
8293 | ASC_PRT_NEXT(); | 7101 | len = asc_prt_line(cp, leftlen, "*\n"); |
8294 | } | 7102 | renegotiate = 1; |
7103 | } else { | ||
7104 | len = asc_prt_line(cp, leftlen, "\n"); | ||
7105 | } | ||
7106 | ASC_PRT_NEXT(); | ||
7107 | } | ||
8295 | 7108 | ||
8296 | if (renegotiate) | 7109 | if (renegotiate) { |
8297 | { | 7110 | len = asc_prt_line(cp, leftlen, |
8298 | len = asc_prt_line(cp, leftlen, | 7111 | " * = Re-negotiation pending before next command.\n"); |
8299 | " * = Re-negotiation pending before next command.\n"); | 7112 | ASC_PRT_NEXT(); |
8300 | ASC_PRT_NEXT(); | 7113 | } |
8301 | } | ||
8302 | 7114 | ||
8303 | return totlen; | 7115 | return totlen; |
8304 | } | 7116 | } |
8305 | 7117 | ||
8306 | /* | 7118 | /* |
@@ -8314,237 +7126,242 @@ asc_prt_asc_board_info(struct Scsi_Host *shp, char *cp, int cplen) | |||
8314 | * Return the number of characters copied into 'cp'. No more than | 7126 | * Return the number of characters copied into 'cp'. No more than |
8315 | * 'cplen' characters will be copied to 'cp'. | 7127 | * 'cplen' characters will be copied to 'cp'. |
8316 | */ | 7128 | */ |
8317 | STATIC int | 7129 | static int asc_prt_adv_board_info(struct Scsi_Host *shost, char *cp, int cplen) |
8318 | asc_prt_adv_board_info(struct Scsi_Host *shp, char *cp, int cplen) | ||
8319 | { | 7130 | { |
8320 | asc_board_t *boardp; | 7131 | asc_board_t *boardp; |
8321 | int leftlen; | 7132 | int leftlen; |
8322 | int totlen; | 7133 | int totlen; |
8323 | int len; | 7134 | int len; |
8324 | int i; | 7135 | int i; |
8325 | ADV_DVC_VAR *v; | 7136 | ADV_DVC_VAR *v; |
8326 | ADV_DVC_CFG *c; | 7137 | ADV_DVC_CFG *c; |
8327 | AdvPortAddr iop_base; | 7138 | AdvPortAddr iop_base; |
8328 | ushort chip_scsi_id; | 7139 | ushort chip_scsi_id; |
8329 | ushort lramword; | 7140 | ushort lramword; |
8330 | uchar lrambyte; | 7141 | uchar lrambyte; |
8331 | ushort tagqng_able; | 7142 | ushort tagqng_able; |
8332 | ushort sdtr_able, wdtr_able; | 7143 | ushort sdtr_able, wdtr_able; |
8333 | ushort wdtr_done, sdtr_done; | 7144 | ushort wdtr_done, sdtr_done; |
8334 | ushort period = 0; | 7145 | ushort period = 0; |
8335 | int renegotiate = 0; | 7146 | int renegotiate = 0; |
8336 | 7147 | ||
8337 | boardp = ASC_BOARDP(shp); | 7148 | boardp = ASC_BOARDP(shost); |
8338 | v = &boardp->dvc_var.adv_dvc_var; | 7149 | v = &boardp->dvc_var.adv_dvc_var; |
8339 | c = &boardp->dvc_cfg.adv_dvc_cfg; | 7150 | c = &boardp->dvc_cfg.adv_dvc_cfg; |
8340 | iop_base = v->iop_base; | 7151 | iop_base = v->iop_base; |
8341 | chip_scsi_id = v->chip_scsi_id; | 7152 | chip_scsi_id = v->chip_scsi_id; |
8342 | 7153 | ||
8343 | leftlen = cplen; | 7154 | leftlen = cplen; |
8344 | totlen = len = 0; | 7155 | totlen = len = 0; |
8345 | 7156 | ||
8346 | len = asc_prt_line(cp, leftlen, | 7157 | len = asc_prt_line(cp, leftlen, |
8347 | "\nAdv Library Configuration and Statistics for AdvanSys SCSI Host %d:\n", | 7158 | "\nAdv Library Configuration and Statistics for AdvanSys SCSI Host %d:\n", |
8348 | shp->host_no); | 7159 | shost->host_no); |
8349 | ASC_PRT_NEXT(); | 7160 | ASC_PRT_NEXT(); |
8350 | 7161 | ||
8351 | len = asc_prt_line(cp, leftlen, | 7162 | len = asc_prt_line(cp, leftlen, |
8352 | " iop_base 0x%lx, cable_detect: %X, err_code %u\n", | 7163 | " iop_base 0x%lx, cable_detect: %X, err_code %u\n", |
8353 | v->iop_base, | 7164 | v->iop_base, |
8354 | AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1) & CABLE_DETECT, | 7165 | AdvReadWordRegister(iop_base, |
8355 | v->err_code); | 7166 | IOPW_SCSI_CFG1) & CABLE_DETECT, |
8356 | ASC_PRT_NEXT(); | 7167 | v->err_code); |
8357 | 7168 | ASC_PRT_NEXT(); | |
8358 | len = asc_prt_line(cp, leftlen, | 7169 | |
8359 | " chip_version %u, lib_version 0x%x, mcode_date 0x%x, mcode_version 0x%x\n", | 7170 | len = asc_prt_line(cp, leftlen, |
8360 | c->chip_version, c->lib_version, c->mcode_date, c->mcode_version); | 7171 | " chip_version %u, lib_version 0x%x, mcode_date 0x%x, mcode_version 0x%x\n", |
8361 | ASC_PRT_NEXT(); | 7172 | c->chip_version, c->lib_version, c->mcode_date, |
8362 | 7173 | c->mcode_version); | |
8363 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | 7174 | ASC_PRT_NEXT(); |
8364 | len = asc_prt_line(cp, leftlen, | 7175 | |
8365 | " Queuing Enabled:"); | 7176 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); |
8366 | ASC_PRT_NEXT(); | 7177 | len = asc_prt_line(cp, leftlen, " Queuing Enabled:"); |
8367 | for (i = 0; i <= ADV_MAX_TID; i++) { | 7178 | ASC_PRT_NEXT(); |
8368 | if ((chip_scsi_id == i) || | 7179 | for (i = 0; i <= ADV_MAX_TID; i++) { |
8369 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { | 7180 | if ((chip_scsi_id == i) || |
8370 | continue; | 7181 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { |
8371 | } | 7182 | continue; |
8372 | 7183 | } | |
8373 | len = asc_prt_line(cp, leftlen, " %X:%c", | 7184 | |
8374 | i, (tagqng_able & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | 7185 | len = asc_prt_line(cp, leftlen, " %X:%c", |
8375 | ASC_PRT_NEXT(); | 7186 | i, |
8376 | } | 7187 | (tagqng_able & ADV_TID_TO_TIDMASK(i)) ? 'Y' : |
8377 | len = asc_prt_line(cp, leftlen, "\n"); | 7188 | 'N'); |
8378 | ASC_PRT_NEXT(); | 7189 | ASC_PRT_NEXT(); |
8379 | 7190 | } | |
8380 | len = asc_prt_line(cp, leftlen, | 7191 | len = asc_prt_line(cp, leftlen, "\n"); |
8381 | " Queue Limit:"); | 7192 | ASC_PRT_NEXT(); |
8382 | ASC_PRT_NEXT(); | 7193 | |
8383 | for (i = 0; i <= ADV_MAX_TID; i++) { | 7194 | len = asc_prt_line(cp, leftlen, " Queue Limit:"); |
8384 | if ((chip_scsi_id == i) || | 7195 | ASC_PRT_NEXT(); |
8385 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { | 7196 | for (i = 0; i <= ADV_MAX_TID; i++) { |
8386 | continue; | 7197 | if ((chip_scsi_id == i) || |
8387 | } | 7198 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { |
8388 | 7199 | continue; | |
8389 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + i, lrambyte); | 7200 | } |
8390 | 7201 | ||
8391 | len = asc_prt_line(cp, leftlen, " %X:%d", i, lrambyte); | 7202 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + i, |
8392 | ASC_PRT_NEXT(); | 7203 | lrambyte); |
8393 | } | 7204 | |
8394 | len = asc_prt_line(cp, leftlen, "\n"); | 7205 | len = asc_prt_line(cp, leftlen, " %X:%d", i, lrambyte); |
8395 | ASC_PRT_NEXT(); | 7206 | ASC_PRT_NEXT(); |
8396 | 7207 | } | |
8397 | len = asc_prt_line(cp, leftlen, | 7208 | len = asc_prt_line(cp, leftlen, "\n"); |
8398 | " Command Pending:"); | 7209 | ASC_PRT_NEXT(); |
8399 | ASC_PRT_NEXT(); | 7210 | |
8400 | for (i = 0; i <= ADV_MAX_TID; i++) { | 7211 | len = asc_prt_line(cp, leftlen, " Command Pending:"); |
8401 | if ((chip_scsi_id == i) || | 7212 | ASC_PRT_NEXT(); |
8402 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { | 7213 | for (i = 0; i <= ADV_MAX_TID; i++) { |
8403 | continue; | 7214 | if ((chip_scsi_id == i) || |
8404 | } | 7215 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { |
8405 | 7216 | continue; | |
8406 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_QUEUED_CMD + i, lrambyte); | 7217 | } |
8407 | 7218 | ||
8408 | len = asc_prt_line(cp, leftlen, " %X:%d", i, lrambyte); | 7219 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_QUEUED_CMD + i, |
8409 | ASC_PRT_NEXT(); | 7220 | lrambyte); |
8410 | } | 7221 | |
8411 | len = asc_prt_line(cp, leftlen, "\n"); | 7222 | len = asc_prt_line(cp, leftlen, " %X:%d", i, lrambyte); |
8412 | ASC_PRT_NEXT(); | 7223 | ASC_PRT_NEXT(); |
8413 | 7224 | } | |
8414 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | 7225 | len = asc_prt_line(cp, leftlen, "\n"); |
8415 | len = asc_prt_line(cp, leftlen, | 7226 | ASC_PRT_NEXT(); |
8416 | " Wide Enabled:"); | 7227 | |
8417 | ASC_PRT_NEXT(); | 7228 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); |
8418 | for (i = 0; i <= ADV_MAX_TID; i++) { | 7229 | len = asc_prt_line(cp, leftlen, " Wide Enabled:"); |
8419 | if ((chip_scsi_id == i) || | 7230 | ASC_PRT_NEXT(); |
8420 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { | 7231 | for (i = 0; i <= ADV_MAX_TID; i++) { |
8421 | continue; | 7232 | if ((chip_scsi_id == i) || |
8422 | } | 7233 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { |
8423 | 7234 | continue; | |
8424 | len = asc_prt_line(cp, leftlen, " %X:%c", | 7235 | } |
8425 | i, (wdtr_able & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | 7236 | |
8426 | ASC_PRT_NEXT(); | 7237 | len = asc_prt_line(cp, leftlen, " %X:%c", |
8427 | } | 7238 | i, |
8428 | len = asc_prt_line(cp, leftlen, "\n"); | 7239 | (wdtr_able & ADV_TID_TO_TIDMASK(i)) ? 'Y' : |
8429 | ASC_PRT_NEXT(); | 7240 | 'N'); |
8430 | 7241 | ASC_PRT_NEXT(); | |
8431 | AdvReadWordLram(iop_base, ASC_MC_WDTR_DONE, wdtr_done); | 7242 | } |
8432 | len = asc_prt_line(cp, leftlen, | 7243 | len = asc_prt_line(cp, leftlen, "\n"); |
8433 | " Transfer Bit Width:"); | 7244 | ASC_PRT_NEXT(); |
8434 | ASC_PRT_NEXT(); | 7245 | |
8435 | for (i = 0; i <= ADV_MAX_TID; i++) { | 7246 | AdvReadWordLram(iop_base, ASC_MC_WDTR_DONE, wdtr_done); |
8436 | if ((chip_scsi_id == i) || | 7247 | len = asc_prt_line(cp, leftlen, " Transfer Bit Width:"); |
8437 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { | 7248 | ASC_PRT_NEXT(); |
8438 | continue; | 7249 | for (i = 0; i <= ADV_MAX_TID; i++) { |
8439 | } | 7250 | if ((chip_scsi_id == i) || |
8440 | 7251 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { | |
8441 | AdvReadWordLram(iop_base, ASC_MC_DEVICE_HSHK_CFG_TABLE + (2 * i), | 7252 | continue; |
8442 | lramword); | 7253 | } |
8443 | 7254 | ||
8444 | len = asc_prt_line(cp, leftlen, " %X:%d", | 7255 | AdvReadWordLram(iop_base, |
8445 | i, (lramword & 0x8000) ? 16 : 8); | 7256 | ASC_MC_DEVICE_HSHK_CFG_TABLE + (2 * i), |
8446 | ASC_PRT_NEXT(); | 7257 | lramword); |
8447 | 7258 | ||
8448 | if ((wdtr_able & ADV_TID_TO_TIDMASK(i)) && | 7259 | len = asc_prt_line(cp, leftlen, " %X:%d", |
8449 | (wdtr_done & ADV_TID_TO_TIDMASK(i)) == 0) { | 7260 | i, (lramword & 0x8000) ? 16 : 8); |
8450 | len = asc_prt_line(cp, leftlen, "*"); | 7261 | ASC_PRT_NEXT(); |
8451 | ASC_PRT_NEXT(); | 7262 | |
8452 | renegotiate = 1; | 7263 | if ((wdtr_able & ADV_TID_TO_TIDMASK(i)) && |
8453 | } | 7264 | (wdtr_done & ADV_TID_TO_TIDMASK(i)) == 0) { |
8454 | } | 7265 | len = asc_prt_line(cp, leftlen, "*"); |
8455 | len = asc_prt_line(cp, leftlen, "\n"); | 7266 | ASC_PRT_NEXT(); |
8456 | ASC_PRT_NEXT(); | 7267 | renegotiate = 1; |
8457 | 7268 | } | |
8458 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | 7269 | } |
8459 | len = asc_prt_line(cp, leftlen, | 7270 | len = asc_prt_line(cp, leftlen, "\n"); |
8460 | " Synchronous Enabled:"); | 7271 | ASC_PRT_NEXT(); |
8461 | ASC_PRT_NEXT(); | 7272 | |
8462 | for (i = 0; i <= ADV_MAX_TID; i++) { | 7273 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); |
8463 | if ((chip_scsi_id == i) || | 7274 | len = asc_prt_line(cp, leftlen, " Synchronous Enabled:"); |
8464 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { | 7275 | ASC_PRT_NEXT(); |
8465 | continue; | 7276 | for (i = 0; i <= ADV_MAX_TID; i++) { |
8466 | } | 7277 | if ((chip_scsi_id == i) || |
8467 | 7278 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0)) { | |
8468 | len = asc_prt_line(cp, leftlen, " %X:%c", | 7279 | continue; |
8469 | i, (sdtr_able & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N'); | 7280 | } |
8470 | ASC_PRT_NEXT(); | 7281 | |
8471 | } | 7282 | len = asc_prt_line(cp, leftlen, " %X:%c", |
8472 | len = asc_prt_line(cp, leftlen, "\n"); | 7283 | i, |
8473 | ASC_PRT_NEXT(); | 7284 | (sdtr_able & ADV_TID_TO_TIDMASK(i)) ? 'Y' : |
8474 | 7285 | 'N'); | |
8475 | AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, sdtr_done); | 7286 | ASC_PRT_NEXT(); |
8476 | for (i = 0; i <= ADV_MAX_TID; i++) { | 7287 | } |
8477 | 7288 | len = asc_prt_line(cp, leftlen, "\n"); | |
8478 | AdvReadWordLram(iop_base, ASC_MC_DEVICE_HSHK_CFG_TABLE + (2 * i), | 7289 | ASC_PRT_NEXT(); |
8479 | lramword); | 7290 | |
8480 | lramword &= ~0x8000; | 7291 | AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, sdtr_done); |
8481 | 7292 | for (i = 0; i <= ADV_MAX_TID; i++) { | |
8482 | if ((chip_scsi_id == i) || | 7293 | |
8483 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0) || | 7294 | AdvReadWordLram(iop_base, |
8484 | ((sdtr_able & ADV_TID_TO_TIDMASK(i)) == 0)) { | 7295 | ASC_MC_DEVICE_HSHK_CFG_TABLE + (2 * i), |
8485 | continue; | 7296 | lramword); |
8486 | } | 7297 | lramword &= ~0x8000; |
8487 | 7298 | ||
8488 | len = asc_prt_line(cp, leftlen, " %X:", i); | 7299 | if ((chip_scsi_id == i) || |
8489 | ASC_PRT_NEXT(); | 7300 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(i)) == 0) || |
8490 | 7301 | ((sdtr_able & ADV_TID_TO_TIDMASK(i)) == 0)) { | |
8491 | if ((lramword & 0x1F) == 0) /* Check for REQ/ACK Offset 0. */ | 7302 | continue; |
8492 | { | 7303 | } |
8493 | len = asc_prt_line(cp, leftlen, " Asynchronous"); | 7304 | |
8494 | ASC_PRT_NEXT(); | 7305 | len = asc_prt_line(cp, leftlen, " %X:", i); |
8495 | } else | 7306 | ASC_PRT_NEXT(); |
8496 | { | 7307 | |
8497 | len = asc_prt_line(cp, leftlen, " Transfer Period Factor: "); | 7308 | if ((lramword & 0x1F) == 0) { /* Check for REQ/ACK Offset 0. */ |
8498 | ASC_PRT_NEXT(); | 7309 | len = asc_prt_line(cp, leftlen, " Asynchronous"); |
8499 | 7310 | ASC_PRT_NEXT(); | |
8500 | if ((lramword & 0x1F00) == 0x1100) /* 80 Mhz */ | 7311 | } else { |
8501 | { | 7312 | len = |
8502 | len = asc_prt_line(cp, leftlen, "9 (80.0 Mhz),"); | 7313 | asc_prt_line(cp, leftlen, |
8503 | ASC_PRT_NEXT(); | 7314 | " Transfer Period Factor: "); |
8504 | } else if ((lramword & 0x1F00) == 0x1000) /* 40 Mhz */ | 7315 | ASC_PRT_NEXT(); |
8505 | { | 7316 | |
8506 | len = asc_prt_line(cp, leftlen, "10 (40.0 Mhz),"); | 7317 | if ((lramword & 0x1F00) == 0x1100) { /* 80 Mhz */ |
8507 | ASC_PRT_NEXT(); | 7318 | len = |
8508 | } else /* 20 Mhz or below. */ | 7319 | asc_prt_line(cp, leftlen, "9 (80.0 Mhz),"); |
8509 | { | 7320 | ASC_PRT_NEXT(); |
8510 | period = (((lramword >> 8) * 25) + 50)/4; | 7321 | } else if ((lramword & 0x1F00) == 0x1000) { /* 40 Mhz */ |
8511 | 7322 | len = | |
8512 | if (period == 0) /* Should never happen. */ | 7323 | asc_prt_line(cp, leftlen, "10 (40.0 Mhz),"); |
8513 | { | 7324 | ASC_PRT_NEXT(); |
8514 | len = asc_prt_line(cp, leftlen, "%d (? Mhz), "); | 7325 | } else { /* 20 Mhz or below. */ |
8515 | ASC_PRT_NEXT(); | 7326 | |
8516 | } else | 7327 | period = (((lramword >> 8) * 25) + 50) / 4; |
8517 | { | 7328 | |
8518 | len = asc_prt_line(cp, leftlen, | 7329 | if (period == 0) { /* Should never happen. */ |
8519 | "%d (%d.%d Mhz),", | 7330 | len = |
8520 | period, 250/period, ASC_TENTHS(250, period)); | 7331 | asc_prt_line(cp, leftlen, |
8521 | ASC_PRT_NEXT(); | 7332 | "%d (? Mhz), "); |
8522 | } | 7333 | ASC_PRT_NEXT(); |
8523 | } | 7334 | } else { |
8524 | 7335 | len = asc_prt_line(cp, leftlen, | |
8525 | len = asc_prt_line(cp, leftlen, " REQ/ACK Offset: %d", | 7336 | "%d (%d.%d Mhz),", |
8526 | lramword & 0x1F); | 7337 | period, 250 / period, |
8527 | ASC_PRT_NEXT(); | 7338 | ASC_TENTHS(250, |
8528 | } | 7339 | period)); |
8529 | 7340 | ASC_PRT_NEXT(); | |
8530 | if ((sdtr_done & ADV_TID_TO_TIDMASK(i)) == 0) { | 7341 | } |
8531 | len = asc_prt_line(cp, leftlen, "*\n"); | 7342 | } |
8532 | renegotiate = 1; | 7343 | |
8533 | } else | 7344 | len = asc_prt_line(cp, leftlen, " REQ/ACK Offset: %d", |
8534 | { | 7345 | lramword & 0x1F); |
8535 | len = asc_prt_line(cp, leftlen, "\n"); | 7346 | ASC_PRT_NEXT(); |
8536 | } | 7347 | } |
8537 | ASC_PRT_NEXT(); | 7348 | |
8538 | } | 7349 | if ((sdtr_done & ADV_TID_TO_TIDMASK(i)) == 0) { |
7350 | len = asc_prt_line(cp, leftlen, "*\n"); | ||
7351 | renegotiate = 1; | ||
7352 | } else { | ||
7353 | len = asc_prt_line(cp, leftlen, "\n"); | ||
7354 | } | ||
7355 | ASC_PRT_NEXT(); | ||
7356 | } | ||
8539 | 7357 | ||
8540 | if (renegotiate) | 7358 | if (renegotiate) { |
8541 | { | 7359 | len = asc_prt_line(cp, leftlen, |
8542 | len = asc_prt_line(cp, leftlen, | 7360 | " * = Re-negotiation pending before next command.\n"); |
8543 | " * = Re-negotiation pending before next command.\n"); | 7361 | ASC_PRT_NEXT(); |
8544 | ASC_PRT_NEXT(); | 7362 | } |
8545 | } | ||
8546 | 7363 | ||
8547 | return totlen; | 7364 | return totlen; |
8548 | } | 7365 | } |
8549 | 7366 | ||
8550 | /* | 7367 | /* |
@@ -8553,30 +7370,30 @@ asc_prt_adv_board_info(struct Scsi_Host *shp, char *cp, int cplen) | |||
8553 | * Copy proc information to a read buffer taking into account the current | 7370 | * Copy proc information to a read buffer taking into account the current |
8554 | * read offset in the file and the remaining space in the read buffer. | 7371 | * read offset in the file and the remaining space in the read buffer. |
8555 | */ | 7372 | */ |
8556 | STATIC int | 7373 | static int |
8557 | asc_proc_copy(off_t advoffset, off_t offset, char *curbuf, int leftlen, | 7374 | asc_proc_copy(off_t advoffset, off_t offset, char *curbuf, int leftlen, |
8558 | char *cp, int cplen) | 7375 | char *cp, int cplen) |
8559 | { | 7376 | { |
8560 | int cnt = 0; | 7377 | int cnt = 0; |
8561 | 7378 | ||
8562 | ASC_DBG3(2, "asc_proc_copy: offset %d, advoffset %d, cplen %d\n", | 7379 | ASC_DBG3(2, "asc_proc_copy: offset %d, advoffset %d, cplen %d\n", |
8563 | (unsigned) offset, (unsigned) advoffset, cplen); | 7380 | (unsigned)offset, (unsigned)advoffset, cplen); |
8564 | if (offset <= advoffset) { | 7381 | if (offset <= advoffset) { |
8565 | /* Read offset below current offset, copy everything. */ | 7382 | /* Read offset below current offset, copy everything. */ |
8566 | cnt = min(cplen, leftlen); | 7383 | cnt = min(cplen, leftlen); |
8567 | ASC_DBG3(2, "asc_proc_copy: curbuf 0x%lx, cp 0x%lx, cnt %d\n", | 7384 | ASC_DBG3(2, "asc_proc_copy: curbuf 0x%lx, cp 0x%lx, cnt %d\n", |
8568 | (ulong) curbuf, (ulong) cp, cnt); | 7385 | (ulong)curbuf, (ulong)cp, cnt); |
8569 | memcpy(curbuf, cp, cnt); | 7386 | memcpy(curbuf, cp, cnt); |
8570 | } else if (offset < advoffset + cplen) { | 7387 | } else if (offset < advoffset + cplen) { |
8571 | /* Read offset within current range, partial copy. */ | 7388 | /* Read offset within current range, partial copy. */ |
8572 | cnt = (advoffset + cplen) - offset; | 7389 | cnt = (advoffset + cplen) - offset; |
8573 | cp = (cp + cplen) - cnt; | 7390 | cp = (cp + cplen) - cnt; |
8574 | cnt = min(cnt, leftlen); | 7391 | cnt = min(cnt, leftlen); |
8575 | ASC_DBG3(2, "asc_proc_copy: curbuf 0x%lx, cp 0x%lx, cnt %d\n", | 7392 | ASC_DBG3(2, "asc_proc_copy: curbuf 0x%lx, cp 0x%lx, cnt %d\n", |
8576 | (ulong) curbuf, (ulong) cp, cnt); | 7393 | (ulong)curbuf, (ulong)cp, cnt); |
8577 | memcpy(curbuf, cp, cnt); | 7394 | memcpy(curbuf, cp, cnt); |
8578 | } | 7395 | } |
8579 | return cnt; | 7396 | return cnt; |
8580 | } | 7397 | } |
8581 | 7398 | ||
8582 | /* | 7399 | /* |
@@ -8590,29 +7407,27 @@ asc_proc_copy(off_t advoffset, off_t offset, char *curbuf, int leftlen, | |||
8590 | * Note: If any single line is greater than ASC_PRTLINE_SIZE bytes the stack | 7407 | * Note: If any single line is greater than ASC_PRTLINE_SIZE bytes the stack |
8591 | * will be corrupted. 's[]' is defined to be ASC_PRTLINE_SIZE bytes. | 7408 | * will be corrupted. 's[]' is defined to be ASC_PRTLINE_SIZE bytes. |
8592 | */ | 7409 | */ |
8593 | STATIC int | 7410 | static int asc_prt_line(char *buf, int buflen, char *fmt, ...) |
8594 | asc_prt_line(char *buf, int buflen, char *fmt, ...) | ||
8595 | { | 7411 | { |
8596 | va_list args; | 7412 | va_list args; |
8597 | int ret; | 7413 | int ret; |
8598 | char s[ASC_PRTLINE_SIZE]; | 7414 | char s[ASC_PRTLINE_SIZE]; |
8599 | 7415 | ||
8600 | va_start(args, fmt); | 7416 | va_start(args, fmt); |
8601 | ret = vsprintf(s, fmt, args); | 7417 | ret = vsprintf(s, fmt, args); |
8602 | ASC_ASSERT(ret < ASC_PRTLINE_SIZE); | 7418 | ASC_ASSERT(ret < ASC_PRTLINE_SIZE); |
8603 | if (buf == NULL) { | 7419 | if (buf == NULL) { |
8604 | (void) printk(s); | 7420 | (void)printk(s); |
8605 | ret = 0; | 7421 | ret = 0; |
8606 | } else { | 7422 | } else { |
8607 | ret = min(buflen, ret); | 7423 | ret = min(buflen, ret); |
8608 | memcpy(buf, s, ret); | 7424 | memcpy(buf, s, ret); |
8609 | } | 7425 | } |
8610 | va_end(args); | 7426 | va_end(args); |
8611 | return ret; | 7427 | return ret; |
8612 | } | 7428 | } |
8613 | #endif /* CONFIG_PROC_FS */ | 7429 | #endif /* CONFIG_PROC_FS */ |
8614 | 7430 | ||
8615 | |||
8616 | /* | 7431 | /* |
8617 | * --- Functions Required by the Asc Library | 7432 | * --- Functions Required by the Asc Library |
8618 | */ | 7433 | */ |
@@ -8623,31 +7438,28 @@ asc_prt_line(char *buf, int buflen, char *fmt, ...) | |||
8623 | * from a timer interrupt, because this function may be | 7438 | * from a timer interrupt, because this function may be |
8624 | * called when interrupts are disabled. | 7439 | * called when interrupts are disabled. |
8625 | */ | 7440 | */ |
8626 | STATIC void | 7441 | static void DvcSleepMilliSecond(ADV_DCNT n) |
8627 | DvcSleepMilliSecond(ADV_DCNT n) | ||
8628 | { | 7442 | { |
8629 | ASC_DBG1(4, "DvcSleepMilliSecond: %lu\n", (ulong) n); | 7443 | ASC_DBG1(4, "DvcSleepMilliSecond: %lu\n", (ulong)n); |
8630 | mdelay(n); | 7444 | mdelay(n); |
8631 | } | 7445 | } |
8632 | 7446 | ||
8633 | /* | 7447 | /* |
8634 | * Currently and inline noop but leave as a placeholder. | 7448 | * Currently and inline noop but leave as a placeholder. |
8635 | * Leave DvcEnterCritical() as a noop placeholder. | 7449 | * Leave DvcEnterCritical() as a noop placeholder. |
8636 | */ | 7450 | */ |
8637 | STATIC inline ulong | 7451 | static inline ulong DvcEnterCritical(void) |
8638 | DvcEnterCritical(void) | ||
8639 | { | 7452 | { |
8640 | return 0; | 7453 | return 0; |
8641 | } | 7454 | } |
8642 | 7455 | ||
8643 | /* | 7456 | /* |
8644 | * Critical sections are all protected by the board spinlock. | 7457 | * Critical sections are all protected by the board spinlock. |
8645 | * Leave DvcLeaveCritical() as a noop placeholder. | 7458 | * Leave DvcLeaveCritical() as a noop placeholder. |
8646 | */ | 7459 | */ |
8647 | STATIC inline void | 7460 | static inline void DvcLeaveCritical(ulong flags) |
8648 | DvcLeaveCritical(ulong flags) | ||
8649 | { | 7461 | { |
8650 | return; | 7462 | return; |
8651 | } | 7463 | } |
8652 | 7464 | ||
8653 | /* | 7465 | /* |
@@ -8660,20 +7472,20 @@ DvcLeaveCritical(ulong flags) | |||
8660 | * Description: | 7472 | * Description: |
8661 | * Output an ASC_SCSI_Q structure to the chip | 7473 | * Output an ASC_SCSI_Q structure to the chip |
8662 | */ | 7474 | */ |
8663 | STATIC void | 7475 | static void |
8664 | DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words) | 7476 | DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words) |
8665 | { | 7477 | { |
8666 | int i; | 7478 | int i; |
8667 | 7479 | ||
8668 | ASC_DBG_PRT_HEX(2, "DvcPutScsiQ", outbuf, 2 * words); | 7480 | ASC_DBG_PRT_HEX(2, "DvcPutScsiQ", outbuf, 2 * words); |
8669 | AscSetChipLramAddr(iop_base, s_addr); | 7481 | AscSetChipLramAddr(iop_base, s_addr); |
8670 | for (i = 0; i < 2 * words; i += 2) { | 7482 | for (i = 0; i < 2 * words; i += 2) { |
8671 | if (i == 4 || i == 20) { | 7483 | if (i == 4 || i == 20) { |
8672 | continue; | 7484 | continue; |
8673 | } | 7485 | } |
8674 | outpw(iop_base + IOP_RAM_DATA, | 7486 | outpw(iop_base + IOP_RAM_DATA, |
8675 | ((ushort) outbuf[i + 1] << 8) | outbuf[i]); | 7487 | ((ushort)outbuf[i + 1] << 8) | outbuf[i]); |
8676 | } | 7488 | } |
8677 | } | 7489 | } |
8678 | 7490 | ||
8679 | /* | 7491 | /* |
@@ -8686,52 +7498,46 @@ DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words) | |||
8686 | * Description: | 7498 | * Description: |
8687 | * Input an ASC_QDONE_INFO structure from the chip | 7499 | * Input an ASC_QDONE_INFO structure from the chip |
8688 | */ | 7500 | */ |
8689 | STATIC void | 7501 | static void |
8690 | DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words) | 7502 | DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words) |
8691 | { | 7503 | { |
8692 | int i; | 7504 | int i; |
8693 | ushort word; | 7505 | ushort word; |
8694 | 7506 | ||
8695 | AscSetChipLramAddr(iop_base, s_addr); | 7507 | AscSetChipLramAddr(iop_base, s_addr); |
8696 | for (i = 0; i < 2 * words; i += 2) { | 7508 | for (i = 0; i < 2 * words; i += 2) { |
8697 | if (i == 10) { | 7509 | if (i == 10) { |
8698 | continue; | 7510 | continue; |
8699 | } | 7511 | } |
8700 | word = inpw(iop_base + IOP_RAM_DATA); | 7512 | word = inpw(iop_base + IOP_RAM_DATA); |
8701 | inbuf[i] = word & 0xff; | 7513 | inbuf[i] = word & 0xff; |
8702 | inbuf[i + 1] = (word >> 8) & 0xff; | 7514 | inbuf[i + 1] = (word >> 8) & 0xff; |
8703 | } | 7515 | } |
8704 | ASC_DBG_PRT_HEX(2, "DvcGetQinfo", inbuf, 2 * words); | 7516 | ASC_DBG_PRT_HEX(2, "DvcGetQinfo", inbuf, 2 * words); |
8705 | } | 7517 | } |
8706 | 7518 | ||
8707 | /* | 7519 | /* |
8708 | * Read a PCI configuration byte. | 7520 | * Read a PCI configuration byte. |
8709 | */ | 7521 | */ |
8710 | STATIC uchar __init | 7522 | static uchar __init DvcReadPCIConfigByte(ASC_DVC_VAR *asc_dvc, ushort offset) |
8711 | DvcReadPCIConfigByte( | ||
8712 | ASC_DVC_VAR *asc_dvc, | ||
8713 | ushort offset) | ||
8714 | { | 7523 | { |
8715 | #ifdef CONFIG_PCI | 7524 | #ifdef CONFIG_PCI |
8716 | uchar byte_data; | 7525 | uchar byte_data; |
8717 | pci_read_config_byte(to_pci_dev(asc_dvc->cfg->dev), offset, &byte_data); | 7526 | pci_read_config_byte(to_pci_dev(asc_dvc->cfg->dev), offset, &byte_data); |
8718 | return byte_data; | 7527 | return byte_data; |
8719 | #else /* !defined(CONFIG_PCI) */ | 7528 | #else /* !defined(CONFIG_PCI) */ |
8720 | return 0; | 7529 | return 0; |
8721 | #endif /* !defined(CONFIG_PCI) */ | 7530 | #endif /* !defined(CONFIG_PCI) */ |
8722 | } | 7531 | } |
8723 | 7532 | ||
8724 | /* | 7533 | /* |
8725 | * Write a PCI configuration byte. | 7534 | * Write a PCI configuration byte. |
8726 | */ | 7535 | */ |
8727 | STATIC void __init | 7536 | static void __init |
8728 | DvcWritePCIConfigByte( | 7537 | DvcWritePCIConfigByte(ASC_DVC_VAR *asc_dvc, ushort offset, uchar byte_data) |
8729 | ASC_DVC_VAR *asc_dvc, | ||
8730 | ushort offset, | ||
8731 | uchar byte_data) | ||
8732 | { | 7538 | { |
8733 | #ifdef CONFIG_PCI | 7539 | #ifdef CONFIG_PCI |
8734 | pci_write_config_byte(to_pci_dev(asc_dvc->cfg->dev), offset, byte_data); | 7540 | pci_write_config_byte(to_pci_dev(asc_dvc->cfg->dev), offset, byte_data); |
8735 | #endif /* CONFIG_PCI */ | 7541 | #endif /* CONFIG_PCI */ |
8736 | } | 7542 | } |
8737 | 7543 | ||
@@ -8739,51 +7545,43 @@ DvcWritePCIConfigByte( | |||
8739 | * Return the BIOS address of the adapter at the specified | 7545 | * Return the BIOS address of the adapter at the specified |
8740 | * I/O port and with the specified bus type. | 7546 | * I/O port and with the specified bus type. |
8741 | */ | 7547 | */ |
8742 | STATIC ushort __init | 7548 | static ushort __init AscGetChipBiosAddress(PortAddr iop_base, ushort bus_type) |
8743 | AscGetChipBiosAddress( | ||
8744 | PortAddr iop_base, | ||
8745 | ushort bus_type) | ||
8746 | { | 7549 | { |
8747 | ushort cfg_lsw; | 7550 | ushort cfg_lsw; |
8748 | ushort bios_addr; | 7551 | ushort bios_addr; |
8749 | 7552 | ||
8750 | /* | 7553 | /* |
8751 | * The PCI BIOS is re-located by the motherboard BIOS. Because | 7554 | * The PCI BIOS is re-located by the motherboard BIOS. Because |
8752 | * of this the driver can not determine where a PCI BIOS is | 7555 | * of this the driver can not determine where a PCI BIOS is |
8753 | * loaded and executes. | 7556 | * loaded and executes. |
8754 | */ | 7557 | */ |
8755 | if (bus_type & ASC_IS_PCI) | 7558 | if (bus_type & ASC_IS_PCI) { |
8756 | { | 7559 | return (0); |
8757 | return(0); | 7560 | } |
8758 | } | ||
8759 | |||
8760 | #ifdef CONFIG_ISA | 7561 | #ifdef CONFIG_ISA |
8761 | if((bus_type & ASC_IS_EISA) != 0) | 7562 | if ((bus_type & ASC_IS_EISA) != 0) { |
8762 | { | 7563 | cfg_lsw = AscGetEisaChipCfg(iop_base); |
8763 | cfg_lsw = AscGetEisaChipCfg(iop_base); | 7564 | cfg_lsw &= 0x000F; |
8764 | cfg_lsw &= 0x000F; | 7565 | bios_addr = (ushort)(ASC_BIOS_MIN_ADDR + |
8765 | bios_addr = (ushort)(ASC_BIOS_MIN_ADDR + | 7566 | (cfg_lsw * ASC_BIOS_BANK_SIZE)); |
8766 | (cfg_lsw * ASC_BIOS_BANK_SIZE)); | 7567 | return (bios_addr); |
8767 | return(bios_addr); | 7568 | } /* if */ |
8768 | }/* if */ | ||
8769 | #endif /* CONFIG_ISA */ | 7569 | #endif /* CONFIG_ISA */ |
8770 | 7570 | ||
8771 | cfg_lsw = AscGetChipCfgLsw(iop_base); | 7571 | cfg_lsw = AscGetChipCfgLsw(iop_base); |
8772 | 7572 | ||
8773 | /* | 7573 | /* |
8774 | * ISA PnP uses the top bit as the 32K BIOS flag | 7574 | * ISA PnP uses the top bit as the 32K BIOS flag |
8775 | */ | 7575 | */ |
8776 | if (bus_type == ASC_IS_ISAPNP) | 7576 | if (bus_type == ASC_IS_ISAPNP) { |
8777 | { | 7577 | cfg_lsw &= 0x7FFF; |
8778 | cfg_lsw &= 0x7FFF; | 7578 | } |
8779 | }/* if */ | 7579 | /* if */ |
8780 | 7580 | bios_addr = (ushort)(((cfg_lsw >> 12) * ASC_BIOS_BANK_SIZE) + | |
8781 | bios_addr = (ushort)(((cfg_lsw >> 12) * ASC_BIOS_BANK_SIZE) + | 7581 | ASC_BIOS_MIN_ADDR); |
8782 | ASC_BIOS_MIN_ADDR); | 7582 | return (bios_addr); |
8783 | return(bios_addr); | ||
8784 | } | 7583 | } |
8785 | 7584 | ||
8786 | |||
8787 | /* | 7585 | /* |
8788 | * --- Functions Required by the Adv Library | 7586 | * --- Functions Required by the Adv Library |
8789 | */ | 7587 | */ |
@@ -8801,49 +7599,44 @@ AscGetChipBiosAddress( | |||
8801 | */ | 7599 | */ |
8802 | ADV_PADDR | 7600 | ADV_PADDR |
8803 | DvcGetPhyAddr(ADV_DVC_VAR *asc_dvc, ADV_SCSI_REQ_Q *scsiq, | 7601 | DvcGetPhyAddr(ADV_DVC_VAR *asc_dvc, ADV_SCSI_REQ_Q *scsiq, |
8804 | uchar *vaddr, ADV_SDCNT *lenp, int flag) | 7602 | uchar *vaddr, ADV_SDCNT *lenp, int flag) |
8805 | { | 7603 | { |
8806 | ADV_PADDR paddr; | 7604 | ADV_PADDR paddr; |
8807 | 7605 | ||
8808 | paddr = virt_to_bus(vaddr); | 7606 | paddr = virt_to_bus(vaddr); |
8809 | 7607 | ||
8810 | ASC_DBG4(4, | 7608 | ASC_DBG4(4, |
8811 | "DvcGetPhyAddr: vaddr 0x%lx, lenp 0x%lx *lenp %lu, paddr 0x%lx\n", | 7609 | "DvcGetPhyAddr: vaddr 0x%lx, lenp 0x%lx *lenp %lu, paddr 0x%lx\n", |
8812 | (ulong) vaddr, (ulong) lenp, (ulong) *((ulong *) lenp), (ulong) paddr); | 7610 | (ulong)vaddr, (ulong)lenp, (ulong)*((ulong *)lenp), |
7611 | (ulong)paddr); | ||
8813 | 7612 | ||
8814 | return paddr; | 7613 | return paddr; |
8815 | } | 7614 | } |
8816 | 7615 | ||
8817 | /* | 7616 | /* |
8818 | * Read a PCI configuration byte. | 7617 | * Read a PCI configuration byte. |
8819 | */ | 7618 | */ |
8820 | STATIC uchar __init | 7619 | static uchar __init DvcAdvReadPCIConfigByte(ADV_DVC_VAR *asc_dvc, ushort offset) |
8821 | DvcAdvReadPCIConfigByte( | ||
8822 | ADV_DVC_VAR *asc_dvc, | ||
8823 | ushort offset) | ||
8824 | { | 7620 | { |
8825 | #ifdef CONFIG_PCI | 7621 | #ifdef CONFIG_PCI |
8826 | uchar byte_data; | 7622 | uchar byte_data; |
8827 | pci_read_config_byte(to_pci_dev(asc_dvc->cfg->dev), offset, &byte_data); | 7623 | pci_read_config_byte(to_pci_dev(asc_dvc->cfg->dev), offset, &byte_data); |
8828 | return byte_data; | 7624 | return byte_data; |
8829 | #else /* CONFIG_PCI */ | 7625 | #else /* CONFIG_PCI */ |
8830 | return 0; | 7626 | return 0; |
8831 | #endif /* CONFIG_PCI */ | 7627 | #endif /* CONFIG_PCI */ |
8832 | } | 7628 | } |
8833 | 7629 | ||
8834 | /* | 7630 | /* |
8835 | * Write a PCI configuration byte. | 7631 | * Write a PCI configuration byte. |
8836 | */ | 7632 | */ |
8837 | STATIC void __init | 7633 | static void __init |
8838 | DvcAdvWritePCIConfigByte( | 7634 | DvcAdvWritePCIConfigByte(ADV_DVC_VAR *asc_dvc, ushort offset, uchar byte_data) |
8839 | ADV_DVC_VAR *asc_dvc, | ||
8840 | ushort offset, | ||
8841 | uchar byte_data) | ||
8842 | { | 7635 | { |
8843 | #ifdef CONFIG_PCI | 7636 | #ifdef CONFIG_PCI |
8844 | pci_write_config_byte(to_pci_dev(asc_dvc->cfg->dev), offset, byte_data); | 7637 | pci_write_config_byte(to_pci_dev(asc_dvc->cfg->dev), offset, byte_data); |
8845 | #else /* CONFIG_PCI */ | 7638 | #else /* CONFIG_PCI */ |
8846 | return; | 7639 | return; |
8847 | #endif /* CONFIG_PCI */ | 7640 | #endif /* CONFIG_PCI */ |
8848 | } | 7641 | } |
8849 | 7642 | ||
@@ -8862,97 +7655,98 @@ DvcAdvWritePCIConfigByte( | |||
8862 | * Return the number of characters copied into 'cp'. No more than | 7655 | * Return the number of characters copied into 'cp'. No more than |
8863 | * 'cplen' characters will be copied to 'cp'. | 7656 | * 'cplen' characters will be copied to 'cp'. |
8864 | */ | 7657 | */ |
8865 | STATIC int | 7658 | static int asc_prt_board_stats(struct Scsi_Host *shost, char *cp, int cplen) |
8866 | asc_prt_board_stats(struct Scsi_Host *shp, char *cp, int cplen) | ||
8867 | { | 7659 | { |
8868 | int leftlen; | 7660 | int leftlen; |
8869 | int totlen; | 7661 | int totlen; |
8870 | int len; | 7662 | int len; |
8871 | struct asc_stats *s; | 7663 | struct asc_stats *s; |
8872 | asc_board_t *boardp; | 7664 | asc_board_t *boardp; |
8873 | |||
8874 | leftlen = cplen; | ||
8875 | totlen = len = 0; | ||
8876 | |||
8877 | boardp = ASC_BOARDP(shp); | ||
8878 | s = &boardp->asc_stats; | ||
8879 | |||
8880 | len = asc_prt_line(cp, leftlen, | ||
8881 | "\nLinux Driver Statistics for AdvanSys SCSI Host %d:\n", shp->host_no); | ||
8882 | ASC_PRT_NEXT(); | ||
8883 | |||
8884 | len = asc_prt_line(cp, leftlen, | ||
8885 | " queuecommand %lu, reset %lu, biosparam %lu, interrupt %lu\n", | ||
8886 | s->queuecommand, s->reset, s->biosparam, s->interrupt); | ||
8887 | ASC_PRT_NEXT(); | ||
8888 | |||
8889 | len = asc_prt_line(cp, leftlen, | ||
8890 | " callback %lu, done %lu, build_error %lu, build_noreq %lu, build_nosg %lu\n", | ||
8891 | s->callback, s->done, s->build_error, s->adv_build_noreq, | ||
8892 | s->adv_build_nosg); | ||
8893 | ASC_PRT_NEXT(); | ||
8894 | |||
8895 | len = asc_prt_line(cp, leftlen, | ||
8896 | " exe_noerror %lu, exe_busy %lu, exe_error %lu, exe_unknown %lu\n", | ||
8897 | s->exe_noerror, s->exe_busy, s->exe_error, s->exe_unknown); | ||
8898 | ASC_PRT_NEXT(); | ||
8899 | |||
8900 | /* | ||
8901 | * Display data transfer statistics. | ||
8902 | */ | ||
8903 | if (s->cont_cnt > 0) { | ||
8904 | len = asc_prt_line(cp, leftlen, " cont_cnt %lu, ", s->cont_cnt); | ||
8905 | ASC_PRT_NEXT(); | ||
8906 | |||
8907 | len = asc_prt_line(cp, leftlen, "cont_xfer %lu.%01lu kb ", | ||
8908 | s->cont_xfer/2, | ||
8909 | ASC_TENTHS(s->cont_xfer, 2)); | ||
8910 | ASC_PRT_NEXT(); | ||
8911 | |||
8912 | /* Contiguous transfer average size */ | ||
8913 | len = asc_prt_line(cp, leftlen, "avg_xfer %lu.%01lu kb\n", | ||
8914 | (s->cont_xfer/2)/s->cont_cnt, | ||
8915 | ASC_TENTHS((s->cont_xfer/2), s->cont_cnt)); | ||
8916 | ASC_PRT_NEXT(); | ||
8917 | } | ||
8918 | 7665 | ||
8919 | if (s->sg_cnt > 0) { | 7666 | leftlen = cplen; |
7667 | totlen = len = 0; | ||
7668 | |||
7669 | boardp = ASC_BOARDP(shost); | ||
7670 | s = &boardp->asc_stats; | ||
7671 | |||
7672 | len = asc_prt_line(cp, leftlen, | ||
7673 | "\nLinux Driver Statistics for AdvanSys SCSI Host %d:\n", | ||
7674 | shost->host_no); | ||
7675 | ASC_PRT_NEXT(); | ||
7676 | |||
7677 | len = asc_prt_line(cp, leftlen, | ||
7678 | " queuecommand %lu, reset %lu, biosparam %lu, interrupt %lu\n", | ||
7679 | s->queuecommand, s->reset, s->biosparam, | ||
7680 | s->interrupt); | ||
7681 | ASC_PRT_NEXT(); | ||
7682 | |||
7683 | len = asc_prt_line(cp, leftlen, | ||
7684 | " callback %lu, done %lu, build_error %lu, build_noreq %lu, build_nosg %lu\n", | ||
7685 | s->callback, s->done, s->build_error, | ||
7686 | s->adv_build_noreq, s->adv_build_nosg); | ||
7687 | ASC_PRT_NEXT(); | ||
7688 | |||
7689 | len = asc_prt_line(cp, leftlen, | ||
7690 | " exe_noerror %lu, exe_busy %lu, exe_error %lu, exe_unknown %lu\n", | ||
7691 | s->exe_noerror, s->exe_busy, s->exe_error, | ||
7692 | s->exe_unknown); | ||
7693 | ASC_PRT_NEXT(); | ||
7694 | |||
7695 | /* | ||
7696 | * Display data transfer statistics. | ||
7697 | */ | ||
7698 | if (s->cont_cnt > 0) { | ||
7699 | len = asc_prt_line(cp, leftlen, " cont_cnt %lu, ", s->cont_cnt); | ||
7700 | ASC_PRT_NEXT(); | ||
7701 | |||
7702 | len = asc_prt_line(cp, leftlen, "cont_xfer %lu.%01lu kb ", | ||
7703 | s->cont_xfer / 2, | ||
7704 | ASC_TENTHS(s->cont_xfer, 2)); | ||
7705 | ASC_PRT_NEXT(); | ||
7706 | |||
7707 | /* Contiguous transfer average size */ | ||
7708 | len = asc_prt_line(cp, leftlen, "avg_xfer %lu.%01lu kb\n", | ||
7709 | (s->cont_xfer / 2) / s->cont_cnt, | ||
7710 | ASC_TENTHS((s->cont_xfer / 2), s->cont_cnt)); | ||
7711 | ASC_PRT_NEXT(); | ||
7712 | } | ||
8920 | 7713 | ||
8921 | len = asc_prt_line(cp, leftlen, " sg_cnt %lu, sg_elem %lu, ", | 7714 | if (s->sg_cnt > 0) { |
8922 | s->sg_cnt, s->sg_elem); | ||
8923 | ASC_PRT_NEXT(); | ||
8924 | 7715 | ||
8925 | len = asc_prt_line(cp, leftlen, "sg_xfer %lu.%01lu kb\n", | 7716 | len = asc_prt_line(cp, leftlen, " sg_cnt %lu, sg_elem %lu, ", |
8926 | s->sg_xfer/2, | 7717 | s->sg_cnt, s->sg_elem); |
8927 | ASC_TENTHS(s->sg_xfer, 2)); | 7718 | ASC_PRT_NEXT(); |
8928 | ASC_PRT_NEXT(); | ||
8929 | 7719 | ||
8930 | /* Scatter gather transfer statistics */ | 7720 | len = asc_prt_line(cp, leftlen, "sg_xfer %lu.%01lu kb\n", |
8931 | len = asc_prt_line(cp, leftlen, " avg_num_elem %lu.%01lu, ", | 7721 | s->sg_xfer / 2, ASC_TENTHS(s->sg_xfer, 2)); |
8932 | s->sg_elem/s->sg_cnt, | 7722 | ASC_PRT_NEXT(); |
8933 | ASC_TENTHS(s->sg_elem, s->sg_cnt)); | ||
8934 | ASC_PRT_NEXT(); | ||
8935 | 7723 | ||
8936 | len = asc_prt_line(cp, leftlen, "avg_elem_size %lu.%01lu kb, ", | 7724 | /* Scatter gather transfer statistics */ |
8937 | (s->sg_xfer/2)/s->sg_elem, | 7725 | len = asc_prt_line(cp, leftlen, " avg_num_elem %lu.%01lu, ", |
8938 | ASC_TENTHS((s->sg_xfer/2), s->sg_elem)); | 7726 | s->sg_elem / s->sg_cnt, |
8939 | ASC_PRT_NEXT(); | 7727 | ASC_TENTHS(s->sg_elem, s->sg_cnt)); |
7728 | ASC_PRT_NEXT(); | ||
8940 | 7729 | ||
8941 | len = asc_prt_line(cp, leftlen, "avg_xfer_size %lu.%01lu kb\n", | 7730 | len = asc_prt_line(cp, leftlen, "avg_elem_size %lu.%01lu kb, ", |
8942 | (s->sg_xfer/2)/s->sg_cnt, | 7731 | (s->sg_xfer / 2) / s->sg_elem, |
8943 | ASC_TENTHS((s->sg_xfer/2), s->sg_cnt)); | 7732 | ASC_TENTHS((s->sg_xfer / 2), s->sg_elem)); |
8944 | ASC_PRT_NEXT(); | 7733 | ASC_PRT_NEXT(); |
8945 | } | ||
8946 | 7734 | ||
8947 | /* | 7735 | len = asc_prt_line(cp, leftlen, "avg_xfer_size %lu.%01lu kb\n", |
8948 | * Display request queuing statistics. | 7736 | (s->sg_xfer / 2) / s->sg_cnt, |
8949 | */ | 7737 | ASC_TENTHS((s->sg_xfer / 2), s->sg_cnt)); |
8950 | len = asc_prt_line(cp, leftlen, | 7738 | ASC_PRT_NEXT(); |
8951 | " Active and Waiting Request Queues (Time Unit: %d HZ):\n", HZ); | 7739 | } |
8952 | ASC_PRT_NEXT(); | ||
8953 | 7740 | ||
7741 | /* | ||
7742 | * Display request queuing statistics. | ||
7743 | */ | ||
7744 | len = asc_prt_line(cp, leftlen, | ||
7745 | " Active and Waiting Request Queues (Time Unit: %d HZ):\n", | ||
7746 | HZ); | ||
7747 | ASC_PRT_NEXT(); | ||
8954 | 7748 | ||
8955 | return totlen; | 7749 | return totlen; |
8956 | } | 7750 | } |
8957 | 7751 | ||
8958 | /* | 7752 | /* |
@@ -8967,70 +7761,89 @@ asc_prt_board_stats(struct Scsi_Host *shp, char *cp, int cplen) | |||
8967 | * Return the number of characters copied into 'cp'. No more than | 7761 | * Return the number of characters copied into 'cp'. No more than |
8968 | * 'cplen' characters will be copied to 'cp'. | 7762 | * 'cplen' characters will be copied to 'cp'. |
8969 | */ | 7763 | */ |
8970 | STATIC int | 7764 | static int |
8971 | asc_prt_target_stats(struct Scsi_Host *shp, int tgt_id, char *cp, int cplen) | 7765 | asc_prt_target_stats(struct Scsi_Host *shost, int tgt_id, char *cp, int cplen) |
8972 | { | 7766 | { |
8973 | int leftlen; | 7767 | int leftlen; |
8974 | int totlen; | 7768 | int totlen; |
8975 | int len; | 7769 | int len; |
8976 | struct asc_stats *s; | 7770 | struct asc_stats *s; |
8977 | ushort chip_scsi_id; | 7771 | ushort chip_scsi_id; |
8978 | asc_board_t *boardp; | 7772 | asc_board_t *boardp; |
8979 | asc_queue_t *active; | 7773 | asc_queue_t *active; |
8980 | asc_queue_t *waiting; | 7774 | asc_queue_t *waiting; |
8981 | |||
8982 | leftlen = cplen; | ||
8983 | totlen = len = 0; | ||
8984 | |||
8985 | boardp = ASC_BOARDP(shp); | ||
8986 | s = &boardp->asc_stats; | ||
8987 | |||
8988 | active = &ASC_BOARDP(shp)->active; | ||
8989 | waiting = &ASC_BOARDP(shp)->waiting; | ||
8990 | |||
8991 | if (ASC_NARROW_BOARD(boardp)) { | ||
8992 | chip_scsi_id = boardp->dvc_cfg.asc_dvc_cfg.chip_scsi_id; | ||
8993 | } else { | ||
8994 | chip_scsi_id = boardp->dvc_var.adv_dvc_var.chip_scsi_id; | ||
8995 | } | ||
8996 | 7775 | ||
8997 | if ((chip_scsi_id == tgt_id) || | 7776 | leftlen = cplen; |
8998 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(tgt_id)) == 0)) { | 7777 | totlen = len = 0; |
8999 | return 0; | 7778 | |
9000 | } | 7779 | boardp = ASC_BOARDP(shost); |
7780 | s = &boardp->asc_stats; | ||
7781 | |||
7782 | active = &ASC_BOARDP(shost)->active; | ||
7783 | waiting = &ASC_BOARDP(shost)->waiting; | ||
7784 | |||
7785 | if (ASC_NARROW_BOARD(boardp)) { | ||
7786 | chip_scsi_id = boardp->dvc_cfg.asc_dvc_cfg.chip_scsi_id; | ||
7787 | } else { | ||
7788 | chip_scsi_id = boardp->dvc_var.adv_dvc_var.chip_scsi_id; | ||
7789 | } | ||
7790 | |||
7791 | if ((chip_scsi_id == tgt_id) || | ||
7792 | ((boardp->init_tidmask & ADV_TID_TO_TIDMASK(tgt_id)) == 0)) { | ||
7793 | return 0; | ||
7794 | } | ||
9001 | 7795 | ||
9002 | do { | 7796 | do { |
9003 | if (active->q_tot_cnt[tgt_id] > 0 || waiting->q_tot_cnt[tgt_id] > 0) { | 7797 | if (active->q_tot_cnt[tgt_id] > 0 |
9004 | len = asc_prt_line(cp, leftlen, " target %d\n", tgt_id); | 7798 | || waiting->q_tot_cnt[tgt_id] > 0) { |
9005 | ASC_PRT_NEXT(); | 7799 | len = asc_prt_line(cp, leftlen, " target %d\n", tgt_id); |
9006 | 7800 | ASC_PRT_NEXT(); | |
9007 | len = asc_prt_line(cp, leftlen, | 7801 | |
9008 | " active: cnt [cur %d, max %d, tot %u], time [min %d, max %d, avg %lu.%01lu]\n", | 7802 | len = asc_prt_line(cp, leftlen, |
9009 | active->q_cur_cnt[tgt_id], active->q_max_cnt[tgt_id], | 7803 | " active: cnt [cur %d, max %d, tot %u], time [min %d, max %d, avg %lu.%01lu]\n", |
9010 | active->q_tot_cnt[tgt_id], | 7804 | active->q_cur_cnt[tgt_id], |
9011 | active->q_min_tim[tgt_id], active->q_max_tim[tgt_id], | 7805 | active->q_max_cnt[tgt_id], |
9012 | (active->q_tot_cnt[tgt_id] == 0) ? 0 : | 7806 | active->q_tot_cnt[tgt_id], |
9013 | (active->q_tot_tim[tgt_id]/active->q_tot_cnt[tgt_id]), | 7807 | active->q_min_tim[tgt_id], |
9014 | (active->q_tot_cnt[tgt_id] == 0) ? 0 : | 7808 | active->q_max_tim[tgt_id], |
9015 | ASC_TENTHS(active->q_tot_tim[tgt_id], | 7809 | (active->q_tot_cnt[tgt_id] == |
9016 | active->q_tot_cnt[tgt_id])); | 7810 | 0) ? 0 : (active-> |
9017 | ASC_PRT_NEXT(); | 7811 | q_tot_tim[tgt_id] / |
9018 | 7812 | active-> | |
9019 | len = asc_prt_line(cp, leftlen, | 7813 | q_tot_cnt[tgt_id]), |
9020 | " waiting: cnt [cur %d, max %d, tot %u], time [min %u, max %u, avg %lu.%01lu]\n", | 7814 | (active->q_tot_cnt[tgt_id] == |
9021 | waiting->q_cur_cnt[tgt_id], waiting->q_max_cnt[tgt_id], | 7815 | 0) ? 0 : ASC_TENTHS(active-> |
9022 | waiting->q_tot_cnt[tgt_id], | 7816 | q_tot_tim |
9023 | waiting->q_min_tim[tgt_id], waiting->q_max_tim[tgt_id], | 7817 | [tgt_id], |
9024 | (waiting->q_tot_cnt[tgt_id] == 0) ? 0 : | 7818 | active-> |
9025 | (waiting->q_tot_tim[tgt_id]/waiting->q_tot_cnt[tgt_id]), | 7819 | q_tot_cnt |
9026 | (waiting->q_tot_cnt[tgt_id] == 0) ? 0 : | 7820 | [tgt_id])); |
9027 | ASC_TENTHS(waiting->q_tot_tim[tgt_id], | 7821 | ASC_PRT_NEXT(); |
9028 | waiting->q_tot_cnt[tgt_id])); | 7822 | |
9029 | ASC_PRT_NEXT(); | 7823 | len = asc_prt_line(cp, leftlen, |
9030 | } | 7824 | " waiting: cnt [cur %d, max %d, tot %u], time [min %u, max %u, avg %lu.%01lu]\n", |
9031 | } while (0); | 7825 | waiting->q_cur_cnt[tgt_id], |
9032 | 7826 | waiting->q_max_cnt[tgt_id], | |
9033 | return totlen; | 7827 | waiting->q_tot_cnt[tgt_id], |
7828 | waiting->q_min_tim[tgt_id], | ||
7829 | waiting->q_max_tim[tgt_id], | ||
7830 | (waiting->q_tot_cnt[tgt_id] == | ||
7831 | 0) ? 0 : (waiting-> | ||
7832 | q_tot_tim[tgt_id] / | ||
7833 | waiting-> | ||
7834 | q_tot_cnt[tgt_id]), | ||
7835 | (waiting->q_tot_cnt[tgt_id] == | ||
7836 | 0) ? 0 : ASC_TENTHS(waiting-> | ||
7837 | q_tot_tim | ||
7838 | [tgt_id], | ||
7839 | waiting-> | ||
7840 | q_tot_cnt | ||
7841 | [tgt_id])); | ||
7842 | ASC_PRT_NEXT(); | ||
7843 | } | ||
7844 | } while (0); | ||
7845 | |||
7846 | return totlen; | ||
9034 | } | 7847 | } |
9035 | #endif /* CONFIG_PROC_FS */ | 7848 | #endif /* CONFIG_PROC_FS */ |
9036 | #endif /* ADVANSYS_STATS */ | 7849 | #endif /* ADVANSYS_STATS */ |
@@ -9039,207 +7852,181 @@ asc_prt_target_stats(struct Scsi_Host *shp, int tgt_id, char *cp, int cplen) | |||
9039 | /* | 7852 | /* |
9040 | * asc_prt_scsi_host() | 7853 | * asc_prt_scsi_host() |
9041 | */ | 7854 | */ |
9042 | STATIC void | 7855 | static void asc_prt_scsi_host(struct Scsi_Host *s) |
9043 | asc_prt_scsi_host(struct Scsi_Host *s) | ||
9044 | { | 7856 | { |
9045 | asc_board_t *boardp; | 7857 | asc_board_t *boardp; |
9046 | 7858 | ||
9047 | boardp = ASC_BOARDP(s); | 7859 | boardp = ASC_BOARDP(s); |
9048 | 7860 | ||
9049 | printk("Scsi_Host at addr 0x%lx\n", (ulong) s); | 7861 | printk("Scsi_Host at addr 0x%lx\n", (ulong)s); |
9050 | printk( | 7862 | printk(" host_busy %u, host_no %d, last_reset %d,\n", |
9051 | " host_busy %u, host_no %d, last_reset %d,\n", | 7863 | s->host_busy, s->host_no, (unsigned)s->last_reset); |
9052 | s->host_busy, s->host_no, | 7864 | |
9053 | (unsigned) s->last_reset); | 7865 | printk(" base 0x%lx, io_port 0x%lx, n_io_port %u, irq 0x%x,\n", |
9054 | 7866 | (ulong)s->base, (ulong)s->io_port, s->n_io_port, s->irq); | |
9055 | printk( | 7867 | |
9056 | " base 0x%lx, io_port 0x%lx, n_io_port %u, irq 0x%x,\n", | 7868 | printk(" dma_channel %d, this_id %d, can_queue %d,\n", |
9057 | (ulong) s->base, (ulong) s->io_port, s->n_io_port, s->irq); | 7869 | s->dma_channel, s->this_id, s->can_queue); |
9058 | 7870 | ||
9059 | printk( | 7871 | printk(" cmd_per_lun %d, sg_tablesize %d, unchecked_isa_dma %d\n", |
9060 | " dma_channel %d, this_id %d, can_queue %d,\n", | 7872 | s->cmd_per_lun, s->sg_tablesize, s->unchecked_isa_dma); |
9061 | s->dma_channel, s->this_id, s->can_queue); | 7873 | |
9062 | 7874 | if (ASC_NARROW_BOARD(boardp)) { | |
9063 | printk( | 7875 | asc_prt_asc_dvc_var(&ASC_BOARDP(s)->dvc_var.asc_dvc_var); |
9064 | " cmd_per_lun %d, sg_tablesize %d, unchecked_isa_dma %d\n", | 7876 | asc_prt_asc_dvc_cfg(&ASC_BOARDP(s)->dvc_cfg.asc_dvc_cfg); |
9065 | s->cmd_per_lun, s->sg_tablesize, s->unchecked_isa_dma); | 7877 | } else { |
9066 | 7878 | asc_prt_adv_dvc_var(&ASC_BOARDP(s)->dvc_var.adv_dvc_var); | |
9067 | if (ASC_NARROW_BOARD(boardp)) { | 7879 | asc_prt_adv_dvc_cfg(&ASC_BOARDP(s)->dvc_cfg.adv_dvc_cfg); |
9068 | asc_prt_asc_dvc_var(&ASC_BOARDP(s)->dvc_var.asc_dvc_var); | 7880 | } |
9069 | asc_prt_asc_dvc_cfg(&ASC_BOARDP(s)->dvc_cfg.asc_dvc_cfg); | ||
9070 | } else { | ||
9071 | asc_prt_adv_dvc_var(&ASC_BOARDP(s)->dvc_var.adv_dvc_var); | ||
9072 | asc_prt_adv_dvc_cfg(&ASC_BOARDP(s)->dvc_cfg.adv_dvc_cfg); | ||
9073 | } | ||
9074 | } | 7881 | } |
9075 | 7882 | ||
9076 | /* | 7883 | /* |
9077 | * asc_prt_scsi_cmnd() | 7884 | * asc_prt_scsi_cmnd() |
9078 | */ | 7885 | */ |
9079 | STATIC void | 7886 | static void asc_prt_scsi_cmnd(struct scsi_cmnd *s) |
9080 | asc_prt_scsi_cmnd(struct scsi_cmnd *s) | ||
9081 | { | 7887 | { |
9082 | printk("struct scsi_cmnd at addr 0x%lx\n", (ulong) s); | 7888 | printk("struct scsi_cmnd at addr 0x%lx\n", (ulong)s); |
9083 | 7889 | ||
9084 | printk( | 7890 | printk(" host 0x%lx, device 0x%lx, target %u, lun %u, channel %u,\n", |
9085 | " host 0x%lx, device 0x%lx, target %u, lun %u, channel %u,\n", | 7891 | (ulong)s->device->host, (ulong)s->device, s->device->id, |
9086 | (ulong) s->device->host, (ulong) s->device, s->device->id, s->device->lun, | 7892 | s->device->lun, s->device->channel); |
9087 | s->device->channel); | ||
9088 | 7893 | ||
9089 | asc_prt_hex(" CDB", s->cmnd, s->cmd_len); | 7894 | asc_prt_hex(" CDB", s->cmnd, s->cmd_len); |
9090 | 7895 | ||
9091 | printk ( | 7896 | printk("sc_data_direction %u, resid %d\n", |
9092 | "sc_data_direction %u, resid %d\n", | 7897 | s->sc_data_direction, s->resid); |
9093 | s->sc_data_direction, s->resid); | ||
9094 | 7898 | ||
9095 | printk( | 7899 | printk(" use_sg %u, sglist_len %u\n", s->use_sg, s->sglist_len); |
9096 | " use_sg %u, sglist_len %u\n", | ||
9097 | s->use_sg, s->sglist_len); | ||
9098 | 7900 | ||
9099 | printk( | 7901 | printk(" serial_number 0x%x, retries %d, allowed %d\n", |
9100 | " serial_number 0x%x, retries %d, allowed %d\n", | 7902 | (unsigned)s->serial_number, s->retries, s->allowed); |
9101 | (unsigned) s->serial_number, s->retries, s->allowed); | ||
9102 | 7903 | ||
9103 | printk( | 7904 | printk(" timeout_per_command %d\n", s->timeout_per_command); |
9104 | " timeout_per_command %d\n", | ||
9105 | s->timeout_per_command); | ||
9106 | 7905 | ||
9107 | printk( | 7906 | printk |
9108 | " scsi_done 0x%lx, done 0x%lx, host_scribble 0x%lx, result 0x%x\n", | 7907 | (" scsi_done 0x%lx, done 0x%lx, host_scribble 0x%lx, result 0x%x\n", |
9109 | (ulong) s->scsi_done, (ulong) s->done, | 7908 | (ulong)s->scsi_done, (ulong)s->done, (ulong)s->host_scribble, |
9110 | (ulong) s->host_scribble, s->result); | 7909 | s->result); |
9111 | 7910 | ||
9112 | printk( | 7911 | printk(" tag %u, pid %u\n", (unsigned)s->tag, (unsigned)s->pid); |
9113 | " tag %u, pid %u\n", | ||
9114 | (unsigned) s->tag, (unsigned) s->pid); | ||
9115 | } | 7912 | } |
9116 | 7913 | ||
9117 | /* | 7914 | /* |
9118 | * asc_prt_asc_dvc_var() | 7915 | * asc_prt_asc_dvc_var() |
9119 | */ | 7916 | */ |
9120 | STATIC void | 7917 | static void asc_prt_asc_dvc_var(ASC_DVC_VAR *h) |
9121 | asc_prt_asc_dvc_var(ASC_DVC_VAR *h) | ||
9122 | { | 7918 | { |
9123 | printk("ASC_DVC_VAR at addr 0x%lx\n", (ulong) h); | 7919 | printk("ASC_DVC_VAR at addr 0x%lx\n", (ulong)h); |
9124 | 7920 | ||
9125 | printk( | 7921 | printk |
9126 | " iop_base 0x%x, err_code 0x%x, dvc_cntl 0x%x, bug_fix_cntl %d,\n", | 7922 | (" iop_base 0x%x, err_code 0x%x, dvc_cntl 0x%x, bug_fix_cntl %d,\n", |
9127 | h->iop_base, h->err_code, h->dvc_cntl, h->bug_fix_cntl); | 7923 | h->iop_base, h->err_code, h->dvc_cntl, h->bug_fix_cntl); |
9128 | 7924 | ||
9129 | printk( | 7925 | printk |
9130 | " bus_type %d, isr_callback 0x%lx, exe_callback 0x%lx, init_sdtr 0x%x,\n", | 7926 | (" bus_type %d, isr_callback 0x%lx, exe_callback 0x%lx, init_sdtr 0x%x,\n", |
9131 | h->bus_type, (ulong) h->isr_callback, (ulong) h->exe_callback, | 7927 | h->bus_type, (ulong)h->isr_callback, (ulong)h->exe_callback, |
9132 | (unsigned) h->init_sdtr); | 7928 | (unsigned)h->init_sdtr); |
9133 | 7929 | ||
9134 | printk( | 7930 | printk |
9135 | " sdtr_done 0x%x, use_tagged_qng 0x%x, unit_not_ready 0x%x, chip_no 0x%x,\n", | 7931 | (" sdtr_done 0x%x, use_tagged_qng 0x%x, unit_not_ready 0x%x, chip_no 0x%x,\n", |
9136 | (unsigned) h->sdtr_done, (unsigned) h->use_tagged_qng, | 7932 | (unsigned)h->sdtr_done, (unsigned)h->use_tagged_qng, |
9137 | (unsigned) h->unit_not_ready, (unsigned) h->chip_no); | 7933 | (unsigned)h->unit_not_ready, (unsigned)h->chip_no); |
9138 | 7934 | ||
9139 | printk( | 7935 | printk |
9140 | " queue_full_or_busy 0x%x, start_motor 0x%x, scsi_reset_wait %u,\n", | 7936 | (" queue_full_or_busy 0x%x, start_motor 0x%x, scsi_reset_wait %u,\n", |
9141 | (unsigned) h->queue_full_or_busy, (unsigned) h->start_motor, | 7937 | (unsigned)h->queue_full_or_busy, (unsigned)h->start_motor, |
9142 | (unsigned) h->scsi_reset_wait); | 7938 | (unsigned)h->scsi_reset_wait); |
9143 | 7939 | ||
9144 | printk( | 7940 | printk |
9145 | " is_in_int %u, max_total_qng %u, cur_total_qng %u, in_critical_cnt %u,\n", | 7941 | (" is_in_int %u, max_total_qng %u, cur_total_qng %u, in_critical_cnt %u,\n", |
9146 | (unsigned) h->is_in_int, (unsigned) h->max_total_qng, | 7942 | (unsigned)h->is_in_int, (unsigned)h->max_total_qng, |
9147 | (unsigned) h->cur_total_qng, (unsigned) h->in_critical_cnt); | 7943 | (unsigned)h->cur_total_qng, (unsigned)h->in_critical_cnt); |
9148 | 7944 | ||
9149 | printk( | 7945 | printk |
9150 | " last_q_shortage %u, init_state 0x%x, no_scam 0x%x, pci_fix_asyn_xfer 0x%x,\n", | 7946 | (" last_q_shortage %u, init_state 0x%x, no_scam 0x%x, pci_fix_asyn_xfer 0x%x,\n", |
9151 | (unsigned) h->last_q_shortage, (unsigned) h->init_state, | 7947 | (unsigned)h->last_q_shortage, (unsigned)h->init_state, |
9152 | (unsigned) h->no_scam, (unsigned) h->pci_fix_asyn_xfer); | 7948 | (unsigned)h->no_scam, (unsigned)h->pci_fix_asyn_xfer); |
9153 | 7949 | ||
9154 | printk( | 7950 | printk(" cfg 0x%lx, irq_no 0x%x\n", (ulong)h->cfg, (unsigned)h->irq_no); |
9155 | " cfg 0x%lx, irq_no 0x%x\n", | ||
9156 | (ulong) h->cfg, (unsigned) h->irq_no); | ||
9157 | } | 7951 | } |
9158 | 7952 | ||
9159 | /* | 7953 | /* |
9160 | * asc_prt_asc_dvc_cfg() | 7954 | * asc_prt_asc_dvc_cfg() |
9161 | */ | 7955 | */ |
9162 | STATIC void | 7956 | static void asc_prt_asc_dvc_cfg(ASC_DVC_CFG *h) |
9163 | asc_prt_asc_dvc_cfg(ASC_DVC_CFG *h) | ||
9164 | { | 7957 | { |
9165 | printk("ASC_DVC_CFG at addr 0x%lx\n", (ulong) h); | 7958 | printk("ASC_DVC_CFG at addr 0x%lx\n", (ulong)h); |
9166 | 7959 | ||
9167 | printk( | 7960 | printk(" can_tagged_qng 0x%x, cmd_qng_enabled 0x%x,\n", |
9168 | " can_tagged_qng 0x%x, cmd_qng_enabled 0x%x,\n", | 7961 | h->can_tagged_qng, h->cmd_qng_enabled); |
9169 | h->can_tagged_qng, h->cmd_qng_enabled); | 7962 | printk(" disc_enable 0x%x, sdtr_enable 0x%x,\n", |
9170 | printk( | 7963 | h->disc_enable, h->sdtr_enable); |
9171 | " disc_enable 0x%x, sdtr_enable 0x%x,\n", | 7964 | |
9172 | h->disc_enable, h->sdtr_enable); | 7965 | printk |
9173 | 7966 | (" chip_scsi_id %d, isa_dma_speed %d, isa_dma_channel %d, chip_version %d,\n", | |
9174 | printk( | 7967 | h->chip_scsi_id, h->isa_dma_speed, h->isa_dma_channel, |
9175 | " chip_scsi_id %d, isa_dma_speed %d, isa_dma_channel %d, chip_version %d,\n", | 7968 | h->chip_version); |
9176 | h->chip_scsi_id, h->isa_dma_speed, h->isa_dma_channel, | 7969 | |
9177 | h->chip_version); | 7970 | printk |
9178 | 7971 | (" pci_device_id %d, lib_serial_no %u, lib_version %u, mcode_date 0x%x,\n", | |
9179 | printk( | 7972 | to_pci_dev(h->dev)->device, h->lib_serial_no, h->lib_version, |
9180 | " pci_device_id %d, lib_serial_no %u, lib_version %u, mcode_date 0x%x,\n", | 7973 | h->mcode_date); |
9181 | to_pci_dev(h->dev)->device, h->lib_serial_no, h->lib_version, | 7974 | |
9182 | h->mcode_date); | 7975 | printk(" mcode_version %d, overrun_buf 0x%lx\n", |
9183 | 7976 | h->mcode_version, (ulong)h->overrun_buf); | |
9184 | printk( | ||
9185 | " mcode_version %d, overrun_buf 0x%lx\n", | ||
9186 | h->mcode_version, (ulong) h->overrun_buf); | ||
9187 | } | 7977 | } |
9188 | 7978 | ||
9189 | /* | 7979 | /* |
9190 | * asc_prt_asc_scsi_q() | 7980 | * asc_prt_asc_scsi_q() |
9191 | */ | 7981 | */ |
9192 | STATIC void | 7982 | static void asc_prt_asc_scsi_q(ASC_SCSI_Q *q) |
9193 | asc_prt_asc_scsi_q(ASC_SCSI_Q *q) | ||
9194 | { | 7983 | { |
9195 | ASC_SG_HEAD *sgp; | 7984 | ASC_SG_HEAD *sgp; |
9196 | int i; | 7985 | int i; |
9197 | 7986 | ||
9198 | printk("ASC_SCSI_Q at addr 0x%lx\n", (ulong) q); | 7987 | printk("ASC_SCSI_Q at addr 0x%lx\n", (ulong)q); |
9199 | 7988 | ||
9200 | printk( | 7989 | printk |
9201 | " target_ix 0x%x, target_lun %u, srb_ptr 0x%lx, tag_code 0x%x,\n", | 7990 | (" target_ix 0x%x, target_lun %u, srb_ptr 0x%lx, tag_code 0x%x,\n", |
9202 | q->q2.target_ix, q->q1.target_lun, | 7991 | q->q2.target_ix, q->q1.target_lun, (ulong)q->q2.srb_ptr, |
9203 | (ulong) q->q2.srb_ptr, q->q2.tag_code); | 7992 | q->q2.tag_code); |
9204 | 7993 | ||
9205 | printk( | 7994 | printk |
9206 | " data_addr 0x%lx, data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n", | 7995 | (" data_addr 0x%lx, data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n", |
9207 | (ulong) le32_to_cpu(q->q1.data_addr), | 7996 | (ulong)le32_to_cpu(q->q1.data_addr), |
9208 | (ulong) le32_to_cpu(q->q1.data_cnt), | 7997 | (ulong)le32_to_cpu(q->q1.data_cnt), |
9209 | (ulong) le32_to_cpu(q->q1.sense_addr), q->q1.sense_len); | 7998 | (ulong)le32_to_cpu(q->q1.sense_addr), q->q1.sense_len); |
9210 | 7999 | ||
9211 | printk( | 8000 | printk(" cdbptr 0x%lx, cdb_len %u, sg_head 0x%lx, sg_queue_cnt %u\n", |
9212 | " cdbptr 0x%lx, cdb_len %u, sg_head 0x%lx, sg_queue_cnt %u\n", | 8001 | (ulong)q->cdbptr, q->q2.cdb_len, |
9213 | (ulong) q->cdbptr, q->q2.cdb_len, | 8002 | (ulong)q->sg_head, q->q1.sg_queue_cnt); |
9214 | (ulong) q->sg_head, q->q1.sg_queue_cnt); | 8003 | |
9215 | 8004 | if (q->sg_head) { | |
9216 | if (q->sg_head) { | 8005 | sgp = q->sg_head; |
9217 | sgp = q->sg_head; | 8006 | printk("ASC_SG_HEAD at addr 0x%lx\n", (ulong)sgp); |
9218 | printk("ASC_SG_HEAD at addr 0x%lx\n", (ulong) sgp); | 8007 | printk(" entry_cnt %u, queue_cnt %u\n", sgp->entry_cnt, |
9219 | printk(" entry_cnt %u, queue_cnt %u\n", sgp->entry_cnt, sgp->queue_cnt); | 8008 | sgp->queue_cnt); |
9220 | for (i = 0; i < sgp->entry_cnt; i++) { | 8009 | for (i = 0; i < sgp->entry_cnt; i++) { |
9221 | printk(" [%u]: addr 0x%lx, bytes %lu\n", | 8010 | printk(" [%u]: addr 0x%lx, bytes %lu\n", |
9222 | i, (ulong) le32_to_cpu(sgp->sg_list[i].addr), | 8011 | i, (ulong)le32_to_cpu(sgp->sg_list[i].addr), |
9223 | (ulong) le32_to_cpu(sgp->sg_list[i].bytes)); | 8012 | (ulong)le32_to_cpu(sgp->sg_list[i].bytes)); |
9224 | } | 8013 | } |
9225 | 8014 | ||
9226 | } | 8015 | } |
9227 | } | 8016 | } |
9228 | 8017 | ||
9229 | /* | 8018 | /* |
9230 | * asc_prt_asc_qdone_info() | 8019 | * asc_prt_asc_qdone_info() |
9231 | */ | 8020 | */ |
9232 | STATIC void | 8021 | static void asc_prt_asc_qdone_info(ASC_QDONE_INFO *q) |
9233 | asc_prt_asc_qdone_info(ASC_QDONE_INFO *q) | ||
9234 | { | 8022 | { |
9235 | printk("ASC_QDONE_INFO at addr 0x%lx\n", (ulong) q); | 8023 | printk("ASC_QDONE_INFO at addr 0x%lx\n", (ulong)q); |
9236 | printk( | 8024 | printk(" srb_ptr 0x%lx, target_ix %u, cdb_len %u, tag_code %u,\n", |
9237 | " srb_ptr 0x%lx, target_ix %u, cdb_len %u, tag_code %u,\n", | 8025 | (ulong)q->d2.srb_ptr, q->d2.target_ix, q->d2.cdb_len, |
9238 | (ulong) q->d2.srb_ptr, q->d2.target_ix, q->d2.cdb_len, | 8026 | q->d2.tag_code); |
9239 | q->d2.tag_code); | 8027 | printk |
9240 | printk( | 8028 | (" done_stat 0x%x, host_stat 0x%x, scsi_stat 0x%x, scsi_msg 0x%x\n", |
9241 | " done_stat 0x%x, host_stat 0x%x, scsi_stat 0x%x, scsi_msg 0x%x\n", | 8029 | q->d3.done_stat, q->d3.host_stat, q->d3.scsi_stat, q->d3.scsi_msg); |
9242 | q->d3.done_stat, q->d3.host_stat, q->d3.scsi_stat, q->d3.scsi_msg); | ||
9243 | } | 8030 | } |
9244 | 8031 | ||
9245 | /* | 8032 | /* |
@@ -9247,41 +8034,33 @@ asc_prt_asc_qdone_info(ASC_QDONE_INFO *q) | |||
9247 | * | 8034 | * |
9248 | * Display an ADV_DVC_VAR structure. | 8035 | * Display an ADV_DVC_VAR structure. |
9249 | */ | 8036 | */ |
9250 | STATIC void | 8037 | static void asc_prt_adv_dvc_var(ADV_DVC_VAR *h) |
9251 | asc_prt_adv_dvc_var(ADV_DVC_VAR *h) | ||
9252 | { | 8038 | { |
9253 | printk(" ADV_DVC_VAR at addr 0x%lx\n", (ulong) h); | 8039 | printk(" ADV_DVC_VAR at addr 0x%lx\n", (ulong)h); |
9254 | 8040 | ||
9255 | printk( | 8041 | printk(" iop_base 0x%lx, err_code 0x%x, ultra_able 0x%x\n", |
9256 | " iop_base 0x%lx, err_code 0x%x, ultra_able 0x%x\n", | 8042 | (ulong)h->iop_base, h->err_code, (unsigned)h->ultra_able); |
9257 | (ulong) h->iop_base, h->err_code, (unsigned) h->ultra_able); | 8043 | |
9258 | 8044 | printk(" isr_callback 0x%lx, sdtr_able 0x%x, wdtr_able 0x%x\n", | |
9259 | printk( | 8045 | (ulong)h->isr_callback, (unsigned)h->sdtr_able, |
9260 | " isr_callback 0x%lx, sdtr_able 0x%x, wdtr_able 0x%x\n", | 8046 | (unsigned)h->wdtr_able); |
9261 | (ulong) h->isr_callback, (unsigned) h->sdtr_able, | 8047 | |
9262 | (unsigned) h->wdtr_able); | 8048 | printk(" start_motor 0x%x, scsi_reset_wait 0x%x, irq_no 0x%x,\n", |
9263 | 8049 | (unsigned)h->start_motor, | |
9264 | printk( | 8050 | (unsigned)h->scsi_reset_wait, (unsigned)h->irq_no); |
9265 | " start_motor 0x%x, scsi_reset_wait 0x%x, irq_no 0x%x,\n", | 8051 | |
9266 | (unsigned) h->start_motor, | 8052 | printk(" max_host_qng %u, max_dvc_qng %u, carr_freelist 0x%lxn\n", |
9267 | (unsigned) h->scsi_reset_wait, (unsigned) h->irq_no); | 8053 | (unsigned)h->max_host_qng, (unsigned)h->max_dvc_qng, |
9268 | 8054 | (ulong)h->carr_freelist); | |
9269 | printk( | 8055 | |
9270 | " max_host_qng %u, max_dvc_qng %u, carr_freelist 0x%lxn\n", | 8056 | printk(" icq_sp 0x%lx, irq_sp 0x%lx\n", |
9271 | (unsigned) h->max_host_qng, (unsigned) h->max_dvc_qng, | 8057 | (ulong)h->icq_sp, (ulong)h->irq_sp); |
9272 | (ulong) h->carr_freelist); | 8058 | |
9273 | 8059 | printk(" no_scam 0x%x, tagqng_able 0x%x\n", | |
9274 | printk( | 8060 | (unsigned)h->no_scam, (unsigned)h->tagqng_able); |
9275 | " icq_sp 0x%lx, irq_sp 0x%lx\n", | 8061 | |
9276 | (ulong) h->icq_sp, (ulong) h->irq_sp); | 8062 | printk(" chip_scsi_id 0x%x, cfg 0x%lx\n", |
9277 | 8063 | (unsigned)h->chip_scsi_id, (ulong)h->cfg); | |
9278 | printk( | ||
9279 | " no_scam 0x%x, tagqng_able 0x%x\n", | ||
9280 | (unsigned) h->no_scam, (unsigned) h->tagqng_able); | ||
9281 | |||
9282 | printk( | ||
9283 | " chip_scsi_id 0x%x, cfg 0x%lx\n", | ||
9284 | (unsigned) h->chip_scsi_id, (ulong) h->cfg); | ||
9285 | } | 8064 | } |
9286 | 8065 | ||
9287 | /* | 8066 | /* |
@@ -9289,26 +8068,21 @@ asc_prt_adv_dvc_var(ADV_DVC_VAR *h) | |||
9289 | * | 8068 | * |
9290 | * Display an ADV_DVC_CFG structure. | 8069 | * Display an ADV_DVC_CFG structure. |
9291 | */ | 8070 | */ |
9292 | STATIC void | 8071 | static void asc_prt_adv_dvc_cfg(ADV_DVC_CFG *h) |
9293 | asc_prt_adv_dvc_cfg(ADV_DVC_CFG *h) | ||
9294 | { | 8072 | { |
9295 | printk(" ADV_DVC_CFG at addr 0x%lx\n", (ulong) h); | 8073 | printk(" ADV_DVC_CFG at addr 0x%lx\n", (ulong)h); |
9296 | 8074 | ||
9297 | printk( | 8075 | printk(" disc_enable 0x%x, termination 0x%x\n", |
9298 | " disc_enable 0x%x, termination 0x%x\n", | 8076 | h->disc_enable, h->termination); |
9299 | h->disc_enable, h->termination); | ||
9300 | 8077 | ||
9301 | printk( | 8078 | printk(" chip_version 0x%x, mcode_date 0x%x\n", |
9302 | " chip_version 0x%x, mcode_date 0x%x\n", | 8079 | h->chip_version, h->mcode_date); |
9303 | h->chip_version, h->mcode_date); | ||
9304 | 8080 | ||
9305 | printk( | 8081 | printk(" mcode_version 0x%x, pci_device_id 0x%x, lib_version %u\n", |
9306 | " mcode_version 0x%x, pci_device_id 0x%x, lib_version %u\n", | 8082 | h->mcode_version, to_pci_dev(h->dev)->device, h->lib_version); |
9307 | h->mcode_version, to_pci_dev(h->dev)->device, h->lib_version); | ||
9308 | 8083 | ||
9309 | printk( | 8084 | printk(" control_flag 0x%x, pci_slot_info 0x%x\n", |
9310 | " control_flag 0x%x, pci_slot_info 0x%x\n", | 8085 | h->control_flag, h->pci_slot_info); |
9311 | h->control_flag, h->pci_slot_info); | ||
9312 | } | 8086 | } |
9313 | 8087 | ||
9314 | /* | 8088 | /* |
@@ -9316,60 +8090,54 @@ asc_prt_adv_dvc_cfg(ADV_DVC_CFG *h) | |||
9316 | * | 8090 | * |
9317 | * Display an ADV_SCSI_REQ_Q structure. | 8091 | * Display an ADV_SCSI_REQ_Q structure. |
9318 | */ | 8092 | */ |
9319 | STATIC void | 8093 | static void asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q *q) |
9320 | asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q *q) | ||
9321 | { | 8094 | { |
9322 | int sg_blk_cnt; | 8095 | int sg_blk_cnt; |
9323 | struct asc_sg_block *sg_ptr; | 8096 | struct asc_sg_block *sg_ptr; |
9324 | 8097 | ||
9325 | printk("ADV_SCSI_REQ_Q at addr 0x%lx\n", (ulong) q); | 8098 | printk("ADV_SCSI_REQ_Q at addr 0x%lx\n", (ulong)q); |
9326 | 8099 | ||
9327 | printk( | 8100 | printk(" target_id %u, target_lun %u, srb_ptr 0x%lx, a_flag 0x%x\n", |
9328 | " target_id %u, target_lun %u, srb_ptr 0x%lx, a_flag 0x%x\n", | 8101 | q->target_id, q->target_lun, (ulong)q->srb_ptr, q->a_flag); |
9329 | q->target_id, q->target_lun, (ulong) q->srb_ptr, q->a_flag); | 8102 | |
9330 | 8103 | printk(" cntl 0x%x, data_addr 0x%lx, vdata_addr 0x%lx\n", | |
9331 | printk(" cntl 0x%x, data_addr 0x%lx, vdata_addr 0x%lx\n", | 8104 | q->cntl, (ulong)le32_to_cpu(q->data_addr), (ulong)q->vdata_addr); |
9332 | q->cntl, (ulong) le32_to_cpu(q->data_addr), (ulong) q->vdata_addr); | 8105 | |
9333 | 8106 | printk(" data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n", | |
9334 | printk( | 8107 | (ulong)le32_to_cpu(q->data_cnt), |
9335 | " data_cnt %lu, sense_addr 0x%lx, sense_len %u,\n", | 8108 | (ulong)le32_to_cpu(q->sense_addr), q->sense_len); |
9336 | (ulong) le32_to_cpu(q->data_cnt), | 8109 | |
9337 | (ulong) le32_to_cpu(q->sense_addr), q->sense_len); | 8110 | printk |
9338 | 8111 | (" cdb_len %u, done_status 0x%x, host_status 0x%x, scsi_status 0x%x\n", | |
9339 | printk( | 8112 | q->cdb_len, q->done_status, q->host_status, q->scsi_status); |
9340 | " cdb_len %u, done_status 0x%x, host_status 0x%x, scsi_status 0x%x\n", | 8113 | |
9341 | q->cdb_len, q->done_status, q->host_status, q->scsi_status); | 8114 | printk(" sg_working_ix 0x%x, target_cmd %u\n", |
9342 | 8115 | q->sg_working_ix, q->target_cmd); | |
9343 | printk( | 8116 | |
9344 | " sg_working_ix 0x%x, target_cmd %u\n", | 8117 | printk(" scsiq_rptr 0x%lx, sg_real_addr 0x%lx, sg_list_ptr 0x%lx\n", |
9345 | q->sg_working_ix, q->target_cmd); | 8118 | (ulong)le32_to_cpu(q->scsiq_rptr), |
9346 | 8119 | (ulong)le32_to_cpu(q->sg_real_addr), (ulong)q->sg_list_ptr); | |
9347 | printk( | 8120 | |
9348 | " scsiq_rptr 0x%lx, sg_real_addr 0x%lx, sg_list_ptr 0x%lx\n", | 8121 | /* Display the request's ADV_SG_BLOCK structures. */ |
9349 | (ulong) le32_to_cpu(q->scsiq_rptr), | 8122 | if (q->sg_list_ptr != NULL) { |
9350 | (ulong) le32_to_cpu(q->sg_real_addr), (ulong) q->sg_list_ptr); | 8123 | sg_blk_cnt = 0; |
9351 | 8124 | while (1) { | |
9352 | /* Display the request's ADV_SG_BLOCK structures. */ | 8125 | /* |
9353 | if (q->sg_list_ptr != NULL) | 8126 | * 'sg_ptr' is a physical address. Convert it to a virtual |
9354 | { | 8127 | * address by indexing 'sg_blk_cnt' into the virtual address |
9355 | sg_blk_cnt = 0; | 8128 | * array 'sg_list_ptr'. |
9356 | while (1) { | 8129 | * |
9357 | /* | 8130 | * XXX - Assumes all SG physical blocks are virtually contiguous. |
9358 | * 'sg_ptr' is a physical address. Convert it to a virtual | 8131 | */ |
9359 | * address by indexing 'sg_blk_cnt' into the virtual address | 8132 | sg_ptr = |
9360 | * array 'sg_list_ptr'. | 8133 | &(((ADV_SG_BLOCK *)(q->sg_list_ptr))[sg_blk_cnt]); |
9361 | * | 8134 | asc_prt_adv_sgblock(sg_blk_cnt, sg_ptr); |
9362 | * XXX - Assumes all SG physical blocks are virtually contiguous. | 8135 | if (sg_ptr->sg_ptr == 0) { |
9363 | */ | 8136 | break; |
9364 | sg_ptr = &(((ADV_SG_BLOCK *) (q->sg_list_ptr))[sg_blk_cnt]); | 8137 | } |
9365 | asc_prt_adv_sgblock(sg_blk_cnt, sg_ptr); | 8138 | sg_blk_cnt++; |
9366 | if (sg_ptr->sg_ptr == 0) | 8139 | } |
9367 | { | 8140 | } |
9368 | break; | ||
9369 | } | ||
9370 | sg_blk_cnt++; | ||
9371 | } | ||
9372 | } | ||
9373 | } | 8141 | } |
9374 | 8142 | ||
9375 | /* | 8143 | /* |
@@ -9377,24 +8145,23 @@ asc_prt_adv_scsi_req_q(ADV_SCSI_REQ_Q *q) | |||
9377 | * | 8145 | * |
9378 | * Display an ADV_SG_BLOCK structure. | 8146 | * Display an ADV_SG_BLOCK structure. |
9379 | */ | 8147 | */ |
9380 | STATIC void | 8148 | static void asc_prt_adv_sgblock(int sgblockno, ADV_SG_BLOCK *b) |
9381 | asc_prt_adv_sgblock(int sgblockno, ADV_SG_BLOCK *b) | ||
9382 | { | 8149 | { |
9383 | int i; | 8150 | int i; |
9384 | 8151 | ||
9385 | printk(" ASC_SG_BLOCK at addr 0x%lx (sgblockno %d)\n", | 8152 | printk(" ASC_SG_BLOCK at addr 0x%lx (sgblockno %d)\n", |
9386 | (ulong) b, sgblockno); | 8153 | (ulong)b, sgblockno); |
9387 | printk(" sg_cnt %u, sg_ptr 0x%lx\n", | 8154 | printk(" sg_cnt %u, sg_ptr 0x%lx\n", |
9388 | b->sg_cnt, (ulong) le32_to_cpu(b->sg_ptr)); | 8155 | b->sg_cnt, (ulong)le32_to_cpu(b->sg_ptr)); |
9389 | ASC_ASSERT(b->sg_cnt <= NO_OF_SG_PER_BLOCK); | 8156 | ASC_ASSERT(b->sg_cnt <= NO_OF_SG_PER_BLOCK); |
9390 | if (b->sg_ptr != 0) | 8157 | if (b->sg_ptr != 0) { |
9391 | { | 8158 | ASC_ASSERT(b->sg_cnt == NO_OF_SG_PER_BLOCK); |
9392 | ASC_ASSERT(b->sg_cnt == NO_OF_SG_PER_BLOCK); | 8159 | } |
9393 | } | 8160 | for (i = 0; i < b->sg_cnt; i++) { |
9394 | for (i = 0; i < b->sg_cnt; i++) { | 8161 | printk(" [%u]: sg_addr 0x%lx, sg_count 0x%lx\n", |
9395 | printk(" [%u]: sg_addr 0x%lx, sg_count 0x%lx\n", | 8162 | i, (ulong)b->sg_list[i].sg_addr, |
9396 | i, (ulong) b->sg_list[i].sg_addr, (ulong) b->sg_list[i].sg_count); | 8163 | (ulong)b->sg_list[i].sg_count); |
9397 | } | 8164 | } |
9398 | } | 8165 | } |
9399 | 8166 | ||
9400 | /* | 8167 | /* |
@@ -9403,55 +8170,55 @@ asc_prt_adv_sgblock(int sgblockno, ADV_SG_BLOCK *b) | |||
9403 | * Print hexadecimal output in 4 byte groupings 32 bytes | 8170 | * Print hexadecimal output in 4 byte groupings 32 bytes |
9404 | * or 8 double-words per line. | 8171 | * or 8 double-words per line. |
9405 | */ | 8172 | */ |
9406 | STATIC void | 8173 | static void asc_prt_hex(char *f, uchar *s, int l) |
9407 | asc_prt_hex(char *f, uchar *s, int l) | ||
9408 | { | 8174 | { |
9409 | int i; | 8175 | int i; |
9410 | int j; | 8176 | int j; |
9411 | int k; | 8177 | int k; |
9412 | int m; | 8178 | int m; |
9413 | 8179 | ||
9414 | printk("%s: (%d bytes)\n", f, l); | 8180 | printk("%s: (%d bytes)\n", f, l); |
9415 | 8181 | ||
9416 | for (i = 0; i < l; i += 32) { | 8182 | for (i = 0; i < l; i += 32) { |
9417 | 8183 | ||
9418 | /* Display a maximum of 8 double-words per line. */ | 8184 | /* Display a maximum of 8 double-words per line. */ |
9419 | if ((k = (l - i) / 4) >= 8) { | 8185 | if ((k = (l - i) / 4) >= 8) { |
9420 | k = 8; | 8186 | k = 8; |
9421 | m = 0; | 8187 | m = 0; |
9422 | } else { | 8188 | } else { |
9423 | m = (l - i) % 4; | 8189 | m = (l - i) % 4; |
9424 | } | 8190 | } |
9425 | 8191 | ||
9426 | for (j = 0; j < k; j++) { | 8192 | for (j = 0; j < k; j++) { |
9427 | printk(" %2.2X%2.2X%2.2X%2.2X", | 8193 | printk(" %2.2X%2.2X%2.2X%2.2X", |
9428 | (unsigned) s[i+(j*4)], (unsigned) s[i+(j*4)+1], | 8194 | (unsigned)s[i + (j * 4)], |
9429 | (unsigned) s[i+(j*4)+2], (unsigned) s[i+(j*4)+3]); | 8195 | (unsigned)s[i + (j * 4) + 1], |
9430 | } | 8196 | (unsigned)s[i + (j * 4) + 2], |
9431 | 8197 | (unsigned)s[i + (j * 4) + 3]); | |
9432 | switch (m) { | 8198 | } |
9433 | case 0: | 8199 | |
9434 | default: | 8200 | switch (m) { |
9435 | break; | 8201 | case 0: |
9436 | case 1: | 8202 | default: |
9437 | printk(" %2.2X", | 8203 | break; |
9438 | (unsigned) s[i+(j*4)]); | 8204 | case 1: |
9439 | break; | 8205 | printk(" %2.2X", (unsigned)s[i + (j * 4)]); |
9440 | case 2: | 8206 | break; |
9441 | printk(" %2.2X%2.2X", | 8207 | case 2: |
9442 | (unsigned) s[i+(j*4)], | 8208 | printk(" %2.2X%2.2X", |
9443 | (unsigned) s[i+(j*4)+1]); | 8209 | (unsigned)s[i + (j * 4)], |
9444 | break; | 8210 | (unsigned)s[i + (j * 4) + 1]); |
9445 | case 3: | 8211 | break; |
9446 | printk(" %2.2X%2.2X%2.2X", | 8212 | case 3: |
9447 | (unsigned) s[i+(j*4)+1], | 8213 | printk(" %2.2X%2.2X%2.2X", |
9448 | (unsigned) s[i+(j*4)+2], | 8214 | (unsigned)s[i + (j * 4) + 1], |
9449 | (unsigned) s[i+(j*4)+3]); | 8215 | (unsigned)s[i + (j * 4) + 2], |
9450 | break; | 8216 | (unsigned)s[i + (j * 4) + 3]); |
9451 | } | 8217 | break; |
9452 | 8218 | } | |
9453 | printk("\n"); | 8219 | |
9454 | } | 8220 | printk("\n"); |
8221 | } | ||
9455 | } | 8222 | } |
9456 | #endif /* ADVANSYS_DEBUG */ | 8223 | #endif /* ADVANSYS_DEBUG */ |
9457 | 8224 | ||
@@ -9459,3380 +8226,3400 @@ asc_prt_hex(char *f, uchar *s, int l) | |||
9459 | * --- Asc Library Functions | 8226 | * --- Asc Library Functions |
9460 | */ | 8227 | */ |
9461 | 8228 | ||
9462 | STATIC ushort __init | 8229 | static ushort __init AscGetEisaChipCfg(PortAddr iop_base) |
9463 | AscGetEisaChipCfg( | ||
9464 | PortAddr iop_base) | ||
9465 | { | 8230 | { |
9466 | PortAddr eisa_cfg_iop; | 8231 | PortAddr eisa_cfg_iop; |
9467 | 8232 | ||
9468 | eisa_cfg_iop = (PortAddr) ASC_GET_EISA_SLOT(iop_base) | | 8233 | eisa_cfg_iop = (PortAddr) ASC_GET_EISA_SLOT(iop_base) | |
9469 | (PortAddr) (ASC_EISA_CFG_IOP_MASK); | 8234 | (PortAddr) (ASC_EISA_CFG_IOP_MASK); |
9470 | return (inpw(eisa_cfg_iop)); | 8235 | return (inpw(eisa_cfg_iop)); |
9471 | } | 8236 | } |
9472 | 8237 | ||
9473 | STATIC uchar __init | 8238 | static uchar __init AscSetChipScsiID(PortAddr iop_base, uchar new_host_id) |
9474 | AscSetChipScsiID( | ||
9475 | PortAddr iop_base, | ||
9476 | uchar new_host_id | ||
9477 | ) | ||
9478 | { | 8239 | { |
9479 | ushort cfg_lsw; | 8240 | ushort cfg_lsw; |
9480 | 8241 | ||
9481 | if (AscGetChipScsiID(iop_base) == new_host_id) { | 8242 | if (AscGetChipScsiID(iop_base) == new_host_id) { |
9482 | return (new_host_id); | 8243 | return (new_host_id); |
9483 | } | 8244 | } |
9484 | cfg_lsw = AscGetChipCfgLsw(iop_base); | 8245 | cfg_lsw = AscGetChipCfgLsw(iop_base); |
9485 | cfg_lsw &= 0xF8FF; | 8246 | cfg_lsw &= 0xF8FF; |
9486 | cfg_lsw |= (ushort) ((new_host_id & ASC_MAX_TID) << 8); | 8247 | cfg_lsw |= (ushort)((new_host_id & ASC_MAX_TID) << 8); |
9487 | AscSetChipCfgLsw(iop_base, cfg_lsw); | 8248 | AscSetChipCfgLsw(iop_base, cfg_lsw); |
9488 | return (AscGetChipScsiID(iop_base)); | 8249 | return (AscGetChipScsiID(iop_base)); |
9489 | } | 8250 | } |
9490 | 8251 | ||
9491 | STATIC uchar __init | 8252 | static uchar __init AscGetChipScsiCtrl(PortAddr iop_base) |
9492 | AscGetChipScsiCtrl( | ||
9493 | PortAddr iop_base) | ||
9494 | { | 8253 | { |
9495 | uchar sc; | 8254 | uchar sc; |
9496 | 8255 | ||
9497 | AscSetBank(iop_base, 1); | 8256 | AscSetBank(iop_base, 1); |
9498 | sc = inp(iop_base + IOP_REG_SC); | 8257 | sc = inp(iop_base + IOP_REG_SC); |
9499 | AscSetBank(iop_base, 0); | 8258 | AscSetBank(iop_base, 0); |
9500 | return (sc); | 8259 | return (sc); |
9501 | } | 8260 | } |
9502 | 8261 | ||
9503 | STATIC uchar __init | 8262 | static uchar __init AscGetChipVersion(PortAddr iop_base, ushort bus_type) |
9504 | AscGetChipVersion( | ||
9505 | PortAddr iop_base, | ||
9506 | ushort bus_type | ||
9507 | ) | ||
9508 | { | 8263 | { |
9509 | if ((bus_type & ASC_IS_EISA) != 0) { | 8264 | if ((bus_type & ASC_IS_EISA) != 0) { |
9510 | PortAddr eisa_iop; | 8265 | PortAddr eisa_iop; |
9511 | uchar revision; | 8266 | uchar revision; |
9512 | eisa_iop = (PortAddr) ASC_GET_EISA_SLOT(iop_base) | | 8267 | eisa_iop = (PortAddr) ASC_GET_EISA_SLOT(iop_base) | |
9513 | (PortAddr) ASC_EISA_REV_IOP_MASK; | 8268 | (PortAddr) ASC_EISA_REV_IOP_MASK; |
9514 | revision = inp(eisa_iop); | 8269 | revision = inp(eisa_iop); |
9515 | return ((uchar) ((ASC_CHIP_MIN_VER_EISA - 1) + revision)); | 8270 | return ((uchar)((ASC_CHIP_MIN_VER_EISA - 1) + revision)); |
9516 | } | 8271 | } |
9517 | return (AscGetChipVerNo(iop_base)); | 8272 | return (AscGetChipVerNo(iop_base)); |
9518 | } | 8273 | } |
9519 | 8274 | ||
9520 | STATIC ushort __init | 8275 | static ushort __init AscGetChipBusType(PortAddr iop_base) |
9521 | AscGetChipBusType( | ||
9522 | PortAddr iop_base) | ||
9523 | { | 8276 | { |
9524 | ushort chip_ver; | 8277 | ushort chip_ver; |
9525 | 8278 | ||
9526 | chip_ver = AscGetChipVerNo(iop_base); | 8279 | chip_ver = AscGetChipVerNo(iop_base); |
9527 | if ( | 8280 | if ((chip_ver >= ASC_CHIP_MIN_VER_VL) |
9528 | (chip_ver >= ASC_CHIP_MIN_VER_VL) | 8281 | && (chip_ver <= ASC_CHIP_MAX_VER_VL) |
9529 | && (chip_ver <= ASC_CHIP_MAX_VER_VL) | 8282 | ) { |
9530 | ) { | 8283 | if (((iop_base & 0x0C30) == 0x0C30) |
9531 | if ( | 8284 | || ((iop_base & 0x0C50) == 0x0C50) |
9532 | ((iop_base & 0x0C30) == 0x0C30) | 8285 | ) { |
9533 | || ((iop_base & 0x0C50) == 0x0C50) | 8286 | return (ASC_IS_EISA); |
9534 | ) { | 8287 | } |
9535 | return (ASC_IS_EISA); | 8288 | return (ASC_IS_VL); |
9536 | } | 8289 | } |
9537 | return (ASC_IS_VL); | 8290 | if ((chip_ver >= ASC_CHIP_MIN_VER_ISA) && |
9538 | } | 8291 | (chip_ver <= ASC_CHIP_MAX_VER_ISA)) { |
9539 | if ((chip_ver >= ASC_CHIP_MIN_VER_ISA) && | 8292 | if (chip_ver >= ASC_CHIP_MIN_VER_ISA_PNP) { |
9540 | (chip_ver <= ASC_CHIP_MAX_VER_ISA)) { | 8293 | return (ASC_IS_ISAPNP); |
9541 | if (chip_ver >= ASC_CHIP_MIN_VER_ISA_PNP) { | 8294 | } |
9542 | return (ASC_IS_ISAPNP); | 8295 | return (ASC_IS_ISA); |
9543 | } | 8296 | } else if ((chip_ver >= ASC_CHIP_MIN_VER_PCI) && |
9544 | return (ASC_IS_ISA); | 8297 | (chip_ver <= ASC_CHIP_MAX_VER_PCI)) { |
9545 | } else if ((chip_ver >= ASC_CHIP_MIN_VER_PCI) && | 8298 | return (ASC_IS_PCI); |
9546 | (chip_ver <= ASC_CHIP_MAX_VER_PCI)) { | 8299 | } |
9547 | return (ASC_IS_PCI); | 8300 | return (0); |
9548 | } | ||
9549 | return (0); | ||
9550 | } | 8301 | } |
9551 | 8302 | ||
9552 | STATIC ASC_DCNT | 8303 | static ASC_DCNT |
9553 | AscLoadMicroCode( | 8304 | AscLoadMicroCode(PortAddr iop_base, |
9554 | PortAddr iop_base, | 8305 | ushort s_addr, uchar *mcode_buf, ushort mcode_size) |
9555 | ushort s_addr, | ||
9556 | uchar *mcode_buf, | ||
9557 | ushort mcode_size | ||
9558 | ) | ||
9559 | { | 8306 | { |
9560 | ASC_DCNT chksum; | 8307 | ASC_DCNT chksum; |
9561 | ushort mcode_word_size; | 8308 | ushort mcode_word_size; |
9562 | ushort mcode_chksum; | 8309 | ushort mcode_chksum; |
9563 | 8310 | ||
9564 | /* Write the microcode buffer starting at LRAM address 0. */ | 8311 | /* Write the microcode buffer starting at LRAM address 0. */ |
9565 | mcode_word_size = (ushort) (mcode_size >> 1); | 8312 | mcode_word_size = (ushort)(mcode_size >> 1); |
9566 | AscMemWordSetLram(iop_base, s_addr, 0, mcode_word_size); | 8313 | AscMemWordSetLram(iop_base, s_addr, 0, mcode_word_size); |
9567 | AscMemWordCopyPtrToLram(iop_base, s_addr, mcode_buf, mcode_word_size); | 8314 | AscMemWordCopyPtrToLram(iop_base, s_addr, mcode_buf, mcode_word_size); |
9568 | 8315 | ||
9569 | chksum = AscMemSumLramWord(iop_base, s_addr, mcode_word_size); | 8316 | chksum = AscMemSumLramWord(iop_base, s_addr, mcode_word_size); |
9570 | ASC_DBG1(1, "AscLoadMicroCode: chksum 0x%lx\n", (ulong) chksum); | 8317 | ASC_DBG1(1, "AscLoadMicroCode: chksum 0x%lx\n", (ulong)chksum); |
9571 | mcode_chksum = (ushort) AscMemSumLramWord(iop_base, | 8318 | mcode_chksum = (ushort)AscMemSumLramWord(iop_base, |
9572 | (ushort) ASC_CODE_SEC_BEG, | 8319 | (ushort)ASC_CODE_SEC_BEG, |
9573 | (ushort) ((mcode_size - s_addr - (ushort) ASC_CODE_SEC_BEG) / 2)); | 8320 | (ushort)((mcode_size - |
9574 | ASC_DBG1(1, "AscLoadMicroCode: mcode_chksum 0x%lx\n", | 8321 | s_addr - (ushort) |
9575 | (ulong) mcode_chksum); | 8322 | ASC_CODE_SEC_BEG) / |
9576 | AscWriteLramWord(iop_base, ASCV_MCODE_CHKSUM_W, mcode_chksum); | 8323 | 2)); |
9577 | AscWriteLramWord(iop_base, ASCV_MCODE_SIZE_W, mcode_size); | 8324 | ASC_DBG1(1, "AscLoadMicroCode: mcode_chksum 0x%lx\n", |
9578 | return (chksum); | 8325 | (ulong)mcode_chksum); |
8326 | AscWriteLramWord(iop_base, ASCV_MCODE_CHKSUM_W, mcode_chksum); | ||
8327 | AscWriteLramWord(iop_base, ASCV_MCODE_SIZE_W, mcode_size); | ||
8328 | return (chksum); | ||
9579 | } | 8329 | } |
9580 | 8330 | ||
9581 | STATIC int | 8331 | static int AscFindSignature(PortAddr iop_base) |
9582 | AscFindSignature( | ||
9583 | PortAddr iop_base | ||
9584 | ) | ||
9585 | { | 8332 | { |
9586 | ushort sig_word; | 8333 | ushort sig_word; |
9587 | 8334 | ||
9588 | ASC_DBG2(1, "AscFindSignature: AscGetChipSignatureByte(0x%x) 0x%x\n", | 8335 | ASC_DBG2(1, "AscFindSignature: AscGetChipSignatureByte(0x%x) 0x%x\n", |
9589 | iop_base, AscGetChipSignatureByte(iop_base)); | 8336 | iop_base, AscGetChipSignatureByte(iop_base)); |
9590 | if (AscGetChipSignatureByte(iop_base) == (uchar) ASC_1000_ID1B) { | 8337 | if (AscGetChipSignatureByte(iop_base) == (uchar)ASC_1000_ID1B) { |
9591 | ASC_DBG2(1, "AscFindSignature: AscGetChipSignatureWord(0x%x) 0x%x\n", | 8338 | ASC_DBG2(1, |
9592 | iop_base, AscGetChipSignatureWord(iop_base)); | 8339 | "AscFindSignature: AscGetChipSignatureWord(0x%x) 0x%x\n", |
9593 | sig_word = AscGetChipSignatureWord(iop_base); | 8340 | iop_base, AscGetChipSignatureWord(iop_base)); |
9594 | if ((sig_word == (ushort) ASC_1000_ID0W) || | 8341 | sig_word = AscGetChipSignatureWord(iop_base); |
9595 | (sig_word == (ushort) ASC_1000_ID0W_FIX)) { | 8342 | if ((sig_word == (ushort)ASC_1000_ID0W) || |
9596 | return (1); | 8343 | (sig_word == (ushort)ASC_1000_ID0W_FIX)) { |
9597 | } | 8344 | return (1); |
9598 | } | 8345 | } |
9599 | return (0); | 8346 | } |
8347 | return (0); | ||
9600 | } | 8348 | } |
9601 | 8349 | ||
9602 | STATIC PortAddr _asc_def_iop_base[ASC_IOADR_TABLE_MAX_IX] __initdata = | 8350 | static PortAddr _asc_def_iop_base[ASC_IOADR_TABLE_MAX_IX] __initdata = { |
9603 | { | 8351 | 0x100, ASC_IOADR_1, 0x120, ASC_IOADR_2, 0x140, ASC_IOADR_3, ASC_IOADR_4, |
9604 | 0x100, ASC_IOADR_1, 0x120, ASC_IOADR_2, 0x140, ASC_IOADR_3, ASC_IOADR_4, | 8352 | ASC_IOADR_5, ASC_IOADR_6, ASC_IOADR_7, ASC_IOADR_8 |
9605 | ASC_IOADR_5, ASC_IOADR_6, ASC_IOADR_7, ASC_IOADR_8 | ||
9606 | }; | 8353 | }; |
9607 | 8354 | ||
9608 | #ifdef CONFIG_ISA | 8355 | #ifdef CONFIG_ISA |
9609 | STATIC uchar _isa_pnp_inited __initdata = 0; | 8356 | static uchar _isa_pnp_inited __initdata = 0; |
9610 | 8357 | ||
9611 | STATIC PortAddr __init | 8358 | static PortAddr __init AscSearchIOPortAddr(PortAddr iop_beg, ushort bus_type) |
9612 | AscSearchIOPortAddr( | ||
9613 | PortAddr iop_beg, | ||
9614 | ushort bus_type) | ||
9615 | { | 8359 | { |
9616 | if (bus_type & ASC_IS_VL) { | 8360 | if (bus_type & ASC_IS_VL) { |
9617 | while ((iop_beg = AscSearchIOPortAddr11(iop_beg)) != 0) { | 8361 | while ((iop_beg = AscSearchIOPortAddr11(iop_beg)) != 0) { |
9618 | if (AscGetChipVersion(iop_beg, bus_type) <= ASC_CHIP_MAX_VER_VL) { | 8362 | if (AscGetChipVersion(iop_beg, bus_type) <= |
9619 | return (iop_beg); | 8363 | ASC_CHIP_MAX_VER_VL) { |
9620 | } | 8364 | return (iop_beg); |
9621 | } | 8365 | } |
9622 | return (0); | 8366 | } |
9623 | } | 8367 | return (0); |
9624 | if (bus_type & ASC_IS_ISA) { | 8368 | } |
9625 | if (_isa_pnp_inited == 0) { | 8369 | if (bus_type & ASC_IS_ISA) { |
9626 | AscSetISAPNPWaitForKey(); | 8370 | if (_isa_pnp_inited == 0) { |
9627 | _isa_pnp_inited++; | 8371 | AscSetISAPNPWaitForKey(); |
9628 | } | 8372 | _isa_pnp_inited++; |
9629 | while ((iop_beg = AscSearchIOPortAddr11(iop_beg)) != 0) { | 8373 | } |
9630 | if ((AscGetChipVersion(iop_beg, bus_type) & ASC_CHIP_VER_ISA_BIT) != 0) { | 8374 | while ((iop_beg = AscSearchIOPortAddr11(iop_beg)) != 0) { |
9631 | return (iop_beg); | 8375 | if ((AscGetChipVersion(iop_beg, bus_type) & |
9632 | } | 8376 | ASC_CHIP_VER_ISA_BIT) != 0) { |
9633 | } | 8377 | return (iop_beg); |
9634 | return (0); | 8378 | } |
9635 | } | 8379 | } |
9636 | if (bus_type & ASC_IS_EISA) { | 8380 | return (0); |
9637 | if ((iop_beg = AscSearchIOPortAddrEISA(iop_beg)) != 0) { | 8381 | } |
9638 | return (iop_beg); | 8382 | if (bus_type & ASC_IS_EISA) { |
9639 | } | 8383 | if ((iop_beg = AscSearchIOPortAddrEISA(iop_beg)) != 0) { |
9640 | return (0); | 8384 | return (iop_beg); |
9641 | } | 8385 | } |
9642 | return (0); | 8386 | return (0); |
8387 | } | ||
8388 | return (0); | ||
9643 | } | 8389 | } |
9644 | 8390 | ||
9645 | STATIC PortAddr __init | 8391 | static PortAddr __init AscSearchIOPortAddr11(PortAddr s_addr) |
9646 | AscSearchIOPortAddr11( | ||
9647 | PortAddr s_addr | ||
9648 | ) | ||
9649 | { | 8392 | { |
9650 | int i; | 8393 | int i; |
9651 | PortAddr iop_base; | 8394 | PortAddr iop_base; |
9652 | 8395 | ||
9653 | for (i = 0; i < ASC_IOADR_TABLE_MAX_IX; i++) { | 8396 | for (i = 0; i < ASC_IOADR_TABLE_MAX_IX; i++) { |
9654 | if (_asc_def_iop_base[i] > s_addr) { | 8397 | if (_asc_def_iop_base[i] > s_addr) { |
9655 | break; | 8398 | break; |
9656 | } | 8399 | } |
9657 | } | 8400 | } |
9658 | for (; i < ASC_IOADR_TABLE_MAX_IX; i++) { | 8401 | for (; i < ASC_IOADR_TABLE_MAX_IX; i++) { |
9659 | iop_base = _asc_def_iop_base[i]; | 8402 | iop_base = _asc_def_iop_base[i]; |
9660 | if (!request_region(iop_base, ASC_IOADR_GAP, "advansys")){ | 8403 | if (!request_region(iop_base, ASC_IOADR_GAP, "advansys")) { |
9661 | ASC_DBG1(1, | 8404 | ASC_DBG1(1, |
9662 | "AscSearchIOPortAddr11: check_region() failed I/O port 0x%x\n", | 8405 | "AscSearchIOPortAddr11: check_region() failed I/O port 0x%x\n", |
9663 | iop_base); | 8406 | iop_base); |
9664 | continue; | 8407 | continue; |
9665 | } | 8408 | } |
9666 | ASC_DBG1(1, "AscSearchIOPortAddr11: probing I/O port 0x%x\n", iop_base); | 8409 | ASC_DBG1(1, "AscSearchIOPortAddr11: probing I/O port 0x%x\n", |
9667 | release_region(iop_base, ASC_IOADR_GAP); | 8410 | iop_base); |
9668 | if (AscFindSignature(iop_base)) { | 8411 | release_region(iop_base, ASC_IOADR_GAP); |
9669 | return (iop_base); | 8412 | if (AscFindSignature(iop_base)) { |
9670 | } | 8413 | return (iop_base); |
9671 | } | 8414 | } |
9672 | return (0); | 8415 | } |
8416 | return (0); | ||
9673 | } | 8417 | } |
9674 | 8418 | ||
9675 | STATIC void __init | 8419 | static void __init AscSetISAPNPWaitForKey(void) |
9676 | AscSetISAPNPWaitForKey(void) | ||
9677 | { | 8420 | { |
9678 | outp(ASC_ISA_PNP_PORT_ADDR, 0x02); | 8421 | outp(ASC_ISA_PNP_PORT_ADDR, 0x02); |
9679 | outp(ASC_ISA_PNP_PORT_WRITE, 0x02); | 8422 | outp(ASC_ISA_PNP_PORT_WRITE, 0x02); |
9680 | return; | 8423 | return; |
9681 | } | 8424 | } |
9682 | #endif /* CONFIG_ISA */ | 8425 | #endif /* CONFIG_ISA */ |
9683 | 8426 | ||
9684 | STATIC void __init | 8427 | static void __init AscToggleIRQAct(PortAddr iop_base) |
9685 | AscToggleIRQAct( | ||
9686 | PortAddr iop_base | ||
9687 | ) | ||
9688 | { | 8428 | { |
9689 | AscSetChipStatus(iop_base, CIW_IRQ_ACT); | 8429 | AscSetChipStatus(iop_base, CIW_IRQ_ACT); |
9690 | AscSetChipStatus(iop_base, 0); | 8430 | AscSetChipStatus(iop_base, 0); |
9691 | return; | 8431 | return; |
9692 | } | 8432 | } |
9693 | 8433 | ||
9694 | STATIC uchar __init | 8434 | static uchar __init AscGetChipIRQ(PortAddr iop_base, ushort bus_type) |
9695 | AscGetChipIRQ( | ||
9696 | PortAddr iop_base, | ||
9697 | ushort bus_type) | ||
9698 | { | 8435 | { |
9699 | ushort cfg_lsw; | 8436 | ushort cfg_lsw; |
9700 | uchar chip_irq; | 8437 | uchar chip_irq; |
9701 | 8438 | ||
9702 | if ((bus_type & ASC_IS_EISA) != 0) { | 8439 | if ((bus_type & ASC_IS_EISA) != 0) { |
9703 | cfg_lsw = AscGetEisaChipCfg(iop_base); | 8440 | cfg_lsw = AscGetEisaChipCfg(iop_base); |
9704 | chip_irq = (uchar) (((cfg_lsw >> 8) & 0x07) + 10); | 8441 | chip_irq = (uchar)(((cfg_lsw >> 8) & 0x07) + 10); |
9705 | if ((chip_irq == 13) || (chip_irq > 15)) { | 8442 | if ((chip_irq == 13) || (chip_irq > 15)) { |
9706 | return (0); | 8443 | return (0); |
9707 | } | 8444 | } |
9708 | return (chip_irq); | 8445 | return (chip_irq); |
9709 | } | 8446 | } |
9710 | if ((bus_type & ASC_IS_VL) != 0) { | 8447 | if ((bus_type & ASC_IS_VL) != 0) { |
9711 | cfg_lsw = AscGetChipCfgLsw(iop_base); | 8448 | cfg_lsw = AscGetChipCfgLsw(iop_base); |
9712 | chip_irq = (uchar) (((cfg_lsw >> 2) & 0x07)); | 8449 | chip_irq = (uchar)(((cfg_lsw >> 2) & 0x07)); |
9713 | if ((chip_irq == 0) || | 8450 | if ((chip_irq == 0) || (chip_irq == 4) || (chip_irq == 7)) { |
9714 | (chip_irq == 4) || | 8451 | return (0); |
9715 | (chip_irq == 7)) { | 8452 | } |
9716 | return (0); | 8453 | return ((uchar)(chip_irq + (ASC_MIN_IRQ_NO - 1))); |
9717 | } | 8454 | } |
9718 | return ((uchar) (chip_irq + (ASC_MIN_IRQ_NO - 1))); | 8455 | cfg_lsw = AscGetChipCfgLsw(iop_base); |
9719 | } | 8456 | chip_irq = (uchar)(((cfg_lsw >> 2) & 0x03)); |
9720 | cfg_lsw = AscGetChipCfgLsw(iop_base); | 8457 | if (chip_irq == 3) |
9721 | chip_irq = (uchar) (((cfg_lsw >> 2) & 0x03)); | 8458 | chip_irq += (uchar)2; |
9722 | if (chip_irq == 3) | 8459 | return ((uchar)(chip_irq + ASC_MIN_IRQ_NO)); |
9723 | chip_irq += (uchar) 2; | ||
9724 | return ((uchar) (chip_irq + ASC_MIN_IRQ_NO)); | ||
9725 | } | 8460 | } |
9726 | 8461 | ||
9727 | STATIC uchar __init | 8462 | static uchar __init |
9728 | AscSetChipIRQ( | 8463 | AscSetChipIRQ(PortAddr iop_base, uchar irq_no, ushort bus_type) |
9729 | PortAddr iop_base, | ||
9730 | uchar irq_no, | ||
9731 | ushort bus_type) | ||
9732 | { | 8464 | { |
9733 | ushort cfg_lsw; | 8465 | ushort cfg_lsw; |
9734 | 8466 | ||
9735 | if ((bus_type & ASC_IS_VL) != 0) { | 8467 | if ((bus_type & ASC_IS_VL) != 0) { |
9736 | if (irq_no != 0) { | 8468 | if (irq_no != 0) { |
9737 | if ((irq_no < ASC_MIN_IRQ_NO) || (irq_no > ASC_MAX_IRQ_NO)) { | 8469 | if ((irq_no < ASC_MIN_IRQ_NO) |
9738 | irq_no = 0; | 8470 | || (irq_no > ASC_MAX_IRQ_NO)) { |
9739 | } else { | 8471 | irq_no = 0; |
9740 | irq_no -= (uchar) ((ASC_MIN_IRQ_NO - 1)); | 8472 | } else { |
9741 | } | 8473 | irq_no -= (uchar)((ASC_MIN_IRQ_NO - 1)); |
9742 | } | 8474 | } |
9743 | cfg_lsw = (ushort) (AscGetChipCfgLsw(iop_base) & 0xFFE3); | 8475 | } |
9744 | cfg_lsw |= (ushort) 0x0010; | 8476 | cfg_lsw = (ushort)(AscGetChipCfgLsw(iop_base) & 0xFFE3); |
9745 | AscSetChipCfgLsw(iop_base, cfg_lsw); | 8477 | cfg_lsw |= (ushort)0x0010; |
9746 | AscToggleIRQAct(iop_base); | 8478 | AscSetChipCfgLsw(iop_base, cfg_lsw); |
9747 | cfg_lsw = (ushort) (AscGetChipCfgLsw(iop_base) & 0xFFE0); | 8479 | AscToggleIRQAct(iop_base); |
9748 | cfg_lsw |= (ushort) ((irq_no & 0x07) << 2); | 8480 | cfg_lsw = (ushort)(AscGetChipCfgLsw(iop_base) & 0xFFE0); |
9749 | AscSetChipCfgLsw(iop_base, cfg_lsw); | 8481 | cfg_lsw |= (ushort)((irq_no & 0x07) << 2); |
9750 | AscToggleIRQAct(iop_base); | 8482 | AscSetChipCfgLsw(iop_base, cfg_lsw); |
9751 | return (AscGetChipIRQ(iop_base, bus_type)); | 8483 | AscToggleIRQAct(iop_base); |
9752 | } | 8484 | return (AscGetChipIRQ(iop_base, bus_type)); |
9753 | if ((bus_type & (ASC_IS_ISA)) != 0) { | 8485 | } |
9754 | if (irq_no == 15) | 8486 | if ((bus_type & (ASC_IS_ISA)) != 0) { |
9755 | irq_no -= (uchar) 2; | 8487 | if (irq_no == 15) |
9756 | irq_no -= (uchar) ASC_MIN_IRQ_NO; | 8488 | irq_no -= (uchar)2; |
9757 | cfg_lsw = (ushort) (AscGetChipCfgLsw(iop_base) & 0xFFF3); | 8489 | irq_no -= (uchar)ASC_MIN_IRQ_NO; |
9758 | cfg_lsw |= (ushort) ((irq_no & 0x03) << 2); | 8490 | cfg_lsw = (ushort)(AscGetChipCfgLsw(iop_base) & 0xFFF3); |
9759 | AscSetChipCfgLsw(iop_base, cfg_lsw); | 8491 | cfg_lsw |= (ushort)((irq_no & 0x03) << 2); |
9760 | return (AscGetChipIRQ(iop_base, bus_type)); | 8492 | AscSetChipCfgLsw(iop_base, cfg_lsw); |
9761 | } | 8493 | return (AscGetChipIRQ(iop_base, bus_type)); |
9762 | return (0); | 8494 | } |
8495 | return (0); | ||
9763 | } | 8496 | } |
9764 | 8497 | ||
9765 | #ifdef CONFIG_ISA | 8498 | #ifdef CONFIG_ISA |
9766 | STATIC void __init | 8499 | static void __init AscEnableIsaDma(uchar dma_channel) |
9767 | AscEnableIsaDma( | ||
9768 | uchar dma_channel) | ||
9769 | { | 8500 | { |
9770 | if (dma_channel < 4) { | 8501 | if (dma_channel < 4) { |
9771 | outp(0x000B, (ushort) (0xC0 | dma_channel)); | 8502 | outp(0x000B, (ushort)(0xC0 | dma_channel)); |
9772 | outp(0x000A, dma_channel); | 8503 | outp(0x000A, dma_channel); |
9773 | } else if (dma_channel < 8) { | 8504 | } else if (dma_channel < 8) { |
9774 | outp(0x00D6, (ushort) (0xC0 | (dma_channel - 4))); | 8505 | outp(0x00D6, (ushort)(0xC0 | (dma_channel - 4))); |
9775 | outp(0x00D4, (ushort) (dma_channel - 4)); | 8506 | outp(0x00D4, (ushort)(dma_channel - 4)); |
9776 | } | 8507 | } |
9777 | return; | 8508 | return; |
9778 | } | 8509 | } |
9779 | #endif /* CONFIG_ISA */ | 8510 | #endif /* CONFIG_ISA */ |
9780 | 8511 | ||
9781 | STATIC int | 8512 | static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) |
9782 | AscIsrChipHalted( | ||
9783 | ASC_DVC_VAR *asc_dvc | ||
9784 | ) | ||
9785 | { | 8513 | { |
9786 | EXT_MSG ext_msg; | 8514 | EXT_MSG ext_msg; |
9787 | EXT_MSG out_msg; | 8515 | EXT_MSG out_msg; |
9788 | ushort halt_q_addr; | 8516 | ushort halt_q_addr; |
9789 | int sdtr_accept; | 8517 | int sdtr_accept; |
9790 | ushort int_halt_code; | 8518 | ushort int_halt_code; |
9791 | ASC_SCSI_BIT_ID_TYPE scsi_busy; | 8519 | ASC_SCSI_BIT_ID_TYPE scsi_busy; |
9792 | ASC_SCSI_BIT_ID_TYPE target_id; | 8520 | ASC_SCSI_BIT_ID_TYPE target_id; |
9793 | PortAddr iop_base; | 8521 | PortAddr iop_base; |
9794 | uchar tag_code; | 8522 | uchar tag_code; |
9795 | uchar q_status; | 8523 | uchar q_status; |
9796 | uchar halt_qp; | 8524 | uchar halt_qp; |
9797 | uchar sdtr_data; | 8525 | uchar sdtr_data; |
9798 | uchar target_ix; | 8526 | uchar target_ix; |
9799 | uchar q_cntl, tid_no; | 8527 | uchar q_cntl, tid_no; |
9800 | uchar cur_dvc_qng; | 8528 | uchar cur_dvc_qng; |
9801 | uchar asyn_sdtr; | 8529 | uchar asyn_sdtr; |
9802 | uchar scsi_status; | 8530 | uchar scsi_status; |
9803 | asc_board_t *boardp; | 8531 | asc_board_t *boardp; |
9804 | 8532 | ||
9805 | ASC_ASSERT(asc_dvc->drv_ptr != NULL); | 8533 | ASC_ASSERT(asc_dvc->drv_ptr != NULL); |
9806 | boardp = asc_dvc->drv_ptr; | 8534 | boardp = asc_dvc->drv_ptr; |
9807 | 8535 | ||
9808 | iop_base = asc_dvc->iop_base; | 8536 | iop_base = asc_dvc->iop_base; |
9809 | int_halt_code = AscReadLramWord(iop_base, ASCV_HALTCODE_W); | 8537 | int_halt_code = AscReadLramWord(iop_base, ASCV_HALTCODE_W); |
9810 | 8538 | ||
9811 | halt_qp = AscReadLramByte(iop_base, ASCV_CURCDB_B); | 8539 | halt_qp = AscReadLramByte(iop_base, ASCV_CURCDB_B); |
9812 | halt_q_addr = ASC_QNO_TO_QADDR(halt_qp); | 8540 | halt_q_addr = ASC_QNO_TO_QADDR(halt_qp); |
9813 | target_ix = AscReadLramByte(iop_base, | 8541 | target_ix = AscReadLramByte(iop_base, |
9814 | (ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_TARGET_IX)); | 8542 | (ushort)(halt_q_addr + |
9815 | q_cntl = AscReadLramByte(iop_base, | 8543 | (ushort)ASC_SCSIQ_B_TARGET_IX)); |
9816 | (ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_CNTL)); | 8544 | q_cntl = |
9817 | tid_no = ASC_TIX_TO_TID(target_ix); | 8545 | AscReadLramByte(iop_base, |
9818 | target_id = (uchar) ASC_TID_TO_TARGET_ID(tid_no); | 8546 | (ushort)(halt_q_addr + (ushort)ASC_SCSIQ_B_CNTL)); |
9819 | if (asc_dvc->pci_fix_asyn_xfer & target_id) { | 8547 | tid_no = ASC_TIX_TO_TID(target_ix); |
9820 | asyn_sdtr = ASYN_SDTR_DATA_FIX_PCI_REV_AB; | 8548 | target_id = (uchar)ASC_TID_TO_TARGET_ID(tid_no); |
9821 | } else { | 8549 | if (asc_dvc->pci_fix_asyn_xfer & target_id) { |
9822 | asyn_sdtr = 0; | 8550 | asyn_sdtr = ASYN_SDTR_DATA_FIX_PCI_REV_AB; |
9823 | } | 8551 | } else { |
9824 | if (int_halt_code == ASC_HALT_DISABLE_ASYN_USE_SYN_FIX) { | 8552 | asyn_sdtr = 0; |
9825 | if (asc_dvc->pci_fix_asyn_xfer & target_id) { | 8553 | } |
9826 | AscSetChipSDTR(iop_base, 0, tid_no); | 8554 | if (int_halt_code == ASC_HALT_DISABLE_ASYN_USE_SYN_FIX) { |
9827 | boardp->sdtr_data[tid_no] = 0; | 8555 | if (asc_dvc->pci_fix_asyn_xfer & target_id) { |
9828 | } | 8556 | AscSetChipSDTR(iop_base, 0, tid_no); |
9829 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | 8557 | boardp->sdtr_data[tid_no] = 0; |
9830 | return (0); | 8558 | } |
9831 | } else if (int_halt_code == ASC_HALT_ENABLE_ASYN_USE_SYN_FIX) { | 8559 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); |
9832 | if (asc_dvc->pci_fix_asyn_xfer & target_id) { | 8560 | return (0); |
9833 | AscSetChipSDTR(iop_base, asyn_sdtr, tid_no); | 8561 | } else if (int_halt_code == ASC_HALT_ENABLE_ASYN_USE_SYN_FIX) { |
9834 | boardp->sdtr_data[tid_no] = asyn_sdtr; | 8562 | if (asc_dvc->pci_fix_asyn_xfer & target_id) { |
9835 | } | 8563 | AscSetChipSDTR(iop_base, asyn_sdtr, tid_no); |
9836 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | 8564 | boardp->sdtr_data[tid_no] = asyn_sdtr; |
9837 | return (0); | 8565 | } |
9838 | } else if (int_halt_code == ASC_HALT_EXTMSG_IN) { | 8566 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); |
9839 | 8567 | return (0); | |
9840 | AscMemWordCopyPtrFromLram(iop_base, | 8568 | } else if (int_halt_code == ASC_HALT_EXTMSG_IN) { |
9841 | ASCV_MSGIN_BEG, | 8569 | |
9842 | (uchar *) &ext_msg, | 8570 | AscMemWordCopyPtrFromLram(iop_base, |
9843 | sizeof(EXT_MSG) >> 1); | 8571 | ASCV_MSGIN_BEG, |
9844 | 8572 | (uchar *)&ext_msg, | |
9845 | if (ext_msg.msg_type == MS_EXTEND && | 8573 | sizeof(EXT_MSG) >> 1); |
9846 | ext_msg.msg_req == MS_SDTR_CODE && | 8574 | |
9847 | ext_msg.msg_len == MS_SDTR_LEN) { | 8575 | if (ext_msg.msg_type == MS_EXTEND && |
9848 | sdtr_accept = TRUE; | 8576 | ext_msg.msg_req == MS_SDTR_CODE && |
9849 | if ((ext_msg.req_ack_offset > ASC_SYN_MAX_OFFSET)) { | 8577 | ext_msg.msg_len == MS_SDTR_LEN) { |
9850 | 8578 | sdtr_accept = TRUE; | |
9851 | sdtr_accept = FALSE; | 8579 | if ((ext_msg.req_ack_offset > ASC_SYN_MAX_OFFSET)) { |
9852 | ext_msg.req_ack_offset = ASC_SYN_MAX_OFFSET; | 8580 | |
9853 | } | 8581 | sdtr_accept = FALSE; |
9854 | if ((ext_msg.xfer_period < | 8582 | ext_msg.req_ack_offset = ASC_SYN_MAX_OFFSET; |
9855 | asc_dvc->sdtr_period_tbl[asc_dvc->host_init_sdtr_index]) || | 8583 | } |
9856 | (ext_msg.xfer_period > | 8584 | if ((ext_msg.xfer_period < |
9857 | asc_dvc->sdtr_period_tbl[asc_dvc->max_sdtr_index])) { | 8585 | asc_dvc->sdtr_period_tbl[asc_dvc-> |
9858 | sdtr_accept = FALSE; | 8586 | host_init_sdtr_index]) |
9859 | ext_msg.xfer_period = | 8587 | || (ext_msg.xfer_period > |
9860 | asc_dvc->sdtr_period_tbl[asc_dvc->host_init_sdtr_index]; | 8588 | asc_dvc->sdtr_period_tbl[asc_dvc-> |
9861 | } | 8589 | max_sdtr_index])) { |
9862 | if (sdtr_accept) { | 8590 | sdtr_accept = FALSE; |
9863 | sdtr_data = AscCalSDTRData(asc_dvc, ext_msg.xfer_period, | 8591 | ext_msg.xfer_period = |
9864 | ext_msg.req_ack_offset); | 8592 | asc_dvc->sdtr_period_tbl[asc_dvc-> |
9865 | if ((sdtr_data == 0xFF)) { | 8593 | host_init_sdtr_index]; |
9866 | 8594 | } | |
9867 | q_cntl |= QC_MSG_OUT; | 8595 | if (sdtr_accept) { |
9868 | asc_dvc->init_sdtr &= ~target_id; | 8596 | sdtr_data = |
9869 | asc_dvc->sdtr_done &= ~target_id; | 8597 | AscCalSDTRData(asc_dvc, ext_msg.xfer_period, |
9870 | AscSetChipSDTR(iop_base, asyn_sdtr, tid_no); | 8598 | ext_msg.req_ack_offset); |
9871 | boardp->sdtr_data[tid_no] = asyn_sdtr; | 8599 | if ((sdtr_data == 0xFF)) { |
9872 | } | 8600 | |
9873 | } | 8601 | q_cntl |= QC_MSG_OUT; |
9874 | if (ext_msg.req_ack_offset == 0) { | 8602 | asc_dvc->init_sdtr &= ~target_id; |
9875 | 8603 | asc_dvc->sdtr_done &= ~target_id; | |
9876 | q_cntl &= ~QC_MSG_OUT; | 8604 | AscSetChipSDTR(iop_base, asyn_sdtr, |
9877 | asc_dvc->init_sdtr &= ~target_id; | 8605 | tid_no); |
9878 | asc_dvc->sdtr_done &= ~target_id; | 8606 | boardp->sdtr_data[tid_no] = asyn_sdtr; |
9879 | AscSetChipSDTR(iop_base, asyn_sdtr, tid_no); | 8607 | } |
9880 | } else { | 8608 | } |
9881 | if (sdtr_accept && (q_cntl & QC_MSG_OUT)) { | 8609 | if (ext_msg.req_ack_offset == 0) { |
9882 | 8610 | ||
9883 | q_cntl &= ~QC_MSG_OUT; | 8611 | q_cntl &= ~QC_MSG_OUT; |
9884 | asc_dvc->sdtr_done |= target_id; | 8612 | asc_dvc->init_sdtr &= ~target_id; |
9885 | asc_dvc->init_sdtr |= target_id; | 8613 | asc_dvc->sdtr_done &= ~target_id; |
9886 | asc_dvc->pci_fix_asyn_xfer &= ~target_id; | 8614 | AscSetChipSDTR(iop_base, asyn_sdtr, tid_no); |
9887 | sdtr_data = AscCalSDTRData(asc_dvc, ext_msg.xfer_period, | 8615 | } else { |
9888 | ext_msg.req_ack_offset); | 8616 | if (sdtr_accept && (q_cntl & QC_MSG_OUT)) { |
9889 | AscSetChipSDTR(iop_base, sdtr_data, tid_no); | 8617 | |
9890 | boardp->sdtr_data[tid_no] = sdtr_data; | 8618 | q_cntl &= ~QC_MSG_OUT; |
9891 | } else { | 8619 | asc_dvc->sdtr_done |= target_id; |
9892 | 8620 | asc_dvc->init_sdtr |= target_id; | |
9893 | q_cntl |= QC_MSG_OUT; | 8621 | asc_dvc->pci_fix_asyn_xfer &= |
9894 | AscMsgOutSDTR(asc_dvc, | 8622 | ~target_id; |
9895 | ext_msg.xfer_period, | 8623 | sdtr_data = |
9896 | ext_msg.req_ack_offset); | 8624 | AscCalSDTRData(asc_dvc, |
9897 | asc_dvc->pci_fix_asyn_xfer &= ~target_id; | 8625 | ext_msg.xfer_period, |
9898 | sdtr_data = AscCalSDTRData(asc_dvc, ext_msg.xfer_period, | 8626 | ext_msg. |
9899 | ext_msg.req_ack_offset); | 8627 | req_ack_offset); |
9900 | AscSetChipSDTR(iop_base, sdtr_data, tid_no); | 8628 | AscSetChipSDTR(iop_base, sdtr_data, |
9901 | boardp->sdtr_data[tid_no] = sdtr_data; | 8629 | tid_no); |
9902 | asc_dvc->sdtr_done |= target_id; | 8630 | boardp->sdtr_data[tid_no] = sdtr_data; |
9903 | asc_dvc->init_sdtr |= target_id; | 8631 | } else { |
9904 | } | 8632 | |
9905 | } | 8633 | q_cntl |= QC_MSG_OUT; |
9906 | 8634 | AscMsgOutSDTR(asc_dvc, | |
9907 | AscWriteLramByte(iop_base, | 8635 | ext_msg.xfer_period, |
9908 | (ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_CNTL), | 8636 | ext_msg.req_ack_offset); |
9909 | q_cntl); | 8637 | asc_dvc->pci_fix_asyn_xfer &= |
9910 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | 8638 | ~target_id; |
9911 | return (0); | 8639 | sdtr_data = |
9912 | } else if (ext_msg.msg_type == MS_EXTEND && | 8640 | AscCalSDTRData(asc_dvc, |
9913 | ext_msg.msg_req == MS_WDTR_CODE && | 8641 | ext_msg.xfer_period, |
9914 | ext_msg.msg_len == MS_WDTR_LEN) { | 8642 | ext_msg. |
9915 | 8643 | req_ack_offset); | |
9916 | ext_msg.wdtr_width = 0; | 8644 | AscSetChipSDTR(iop_base, sdtr_data, |
9917 | AscMemWordCopyPtrToLram(iop_base, | 8645 | tid_no); |
9918 | ASCV_MSGOUT_BEG, | 8646 | boardp->sdtr_data[tid_no] = sdtr_data; |
9919 | (uchar *) &ext_msg, | 8647 | asc_dvc->sdtr_done |= target_id; |
9920 | sizeof(EXT_MSG) >> 1); | 8648 | asc_dvc->init_sdtr |= target_id; |
9921 | q_cntl |= QC_MSG_OUT; | 8649 | } |
9922 | AscWriteLramByte(iop_base, | 8650 | } |
9923 | (ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_CNTL), | 8651 | |
9924 | q_cntl); | 8652 | AscWriteLramByte(iop_base, |
9925 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | 8653 | (ushort)(halt_q_addr + |
9926 | return (0); | 8654 | (ushort)ASC_SCSIQ_B_CNTL), |
9927 | } else { | 8655 | q_cntl); |
9928 | 8656 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | |
9929 | ext_msg.msg_type = MESSAGE_REJECT; | 8657 | return (0); |
9930 | AscMemWordCopyPtrToLram(iop_base, | 8658 | } else if (ext_msg.msg_type == MS_EXTEND && |
9931 | ASCV_MSGOUT_BEG, | 8659 | ext_msg.msg_req == MS_WDTR_CODE && |
9932 | (uchar *) &ext_msg, | 8660 | ext_msg.msg_len == MS_WDTR_LEN) { |
9933 | sizeof(EXT_MSG) >> 1); | 8661 | |
9934 | q_cntl |= QC_MSG_OUT; | 8662 | ext_msg.wdtr_width = 0; |
9935 | AscWriteLramByte(iop_base, | 8663 | AscMemWordCopyPtrToLram(iop_base, |
9936 | (ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_CNTL), | 8664 | ASCV_MSGOUT_BEG, |
9937 | q_cntl); | 8665 | (uchar *)&ext_msg, |
9938 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | 8666 | sizeof(EXT_MSG) >> 1); |
9939 | return (0); | 8667 | q_cntl |= QC_MSG_OUT; |
9940 | } | 8668 | AscWriteLramByte(iop_base, |
9941 | } else if (int_halt_code == ASC_HALT_CHK_CONDITION) { | 8669 | (ushort)(halt_q_addr + |
9942 | 8670 | (ushort)ASC_SCSIQ_B_CNTL), | |
9943 | q_cntl |= QC_REQ_SENSE; | 8671 | q_cntl); |
9944 | 8672 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | |
9945 | if ((asc_dvc->init_sdtr & target_id) != 0) { | 8673 | return (0); |
9946 | 8674 | } else { | |
9947 | asc_dvc->sdtr_done &= ~target_id; | 8675 | |
9948 | 8676 | ext_msg.msg_type = MESSAGE_REJECT; | |
9949 | sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no); | 8677 | AscMemWordCopyPtrToLram(iop_base, |
9950 | q_cntl |= QC_MSG_OUT; | 8678 | ASCV_MSGOUT_BEG, |
9951 | AscMsgOutSDTR(asc_dvc, | 8679 | (uchar *)&ext_msg, |
9952 | asc_dvc->sdtr_period_tbl[(sdtr_data >> 4) & | 8680 | sizeof(EXT_MSG) >> 1); |
9953 | (uchar) (asc_dvc->max_sdtr_index - 1)], | 8681 | q_cntl |= QC_MSG_OUT; |
9954 | (uchar) (sdtr_data & (uchar) ASC_SYN_MAX_OFFSET)); | 8682 | AscWriteLramByte(iop_base, |
9955 | } | 8683 | (ushort)(halt_q_addr + |
9956 | 8684 | (ushort)ASC_SCSIQ_B_CNTL), | |
9957 | AscWriteLramByte(iop_base, | 8685 | q_cntl); |
9958 | (ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_CNTL), | 8686 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); |
9959 | q_cntl); | 8687 | return (0); |
9960 | 8688 | } | |
9961 | tag_code = AscReadLramByte(iop_base, | 8689 | } else if (int_halt_code == ASC_HALT_CHK_CONDITION) { |
9962 | (ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_TAG_CODE)); | 8690 | |
9963 | tag_code &= 0xDC; | 8691 | q_cntl |= QC_REQ_SENSE; |
9964 | if ( | 8692 | |
9965 | (asc_dvc->pci_fix_asyn_xfer & target_id) | 8693 | if ((asc_dvc->init_sdtr & target_id) != 0) { |
9966 | && !(asc_dvc->pci_fix_asyn_xfer_always & target_id) | 8694 | |
9967 | ) { | 8695 | asc_dvc->sdtr_done &= ~target_id; |
9968 | 8696 | ||
9969 | tag_code |= (ASC_TAG_FLAG_DISABLE_DISCONNECT | 8697 | sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no); |
9970 | | ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX); | 8698 | q_cntl |= QC_MSG_OUT; |
9971 | 8699 | AscMsgOutSDTR(asc_dvc, | |
9972 | } | 8700 | asc_dvc-> |
9973 | AscWriteLramByte(iop_base, | 8701 | sdtr_period_tbl[(sdtr_data >> 4) & |
9974 | (ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_TAG_CODE), | 8702 | (uchar)(asc_dvc-> |
9975 | tag_code); | 8703 | max_sdtr_index - |
9976 | 8704 | 1)], | |
9977 | q_status = AscReadLramByte(iop_base, | 8705 | (uchar)(sdtr_data & (uchar) |
9978 | (ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_STATUS)); | 8706 | ASC_SYN_MAX_OFFSET)); |
9979 | q_status |= (QS_READY | QS_BUSY); | 8707 | } |
9980 | AscWriteLramByte(iop_base, | 8708 | |
9981 | (ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_STATUS), | 8709 | AscWriteLramByte(iop_base, |
9982 | q_status); | 8710 | (ushort)(halt_q_addr + |
9983 | 8711 | (ushort)ASC_SCSIQ_B_CNTL), q_cntl); | |
9984 | scsi_busy = AscReadLramByte(iop_base, | 8712 | |
9985 | (ushort) ASCV_SCSIBUSY_B); | 8713 | tag_code = AscReadLramByte(iop_base, |
9986 | scsi_busy &= ~target_id; | 8714 | (ushort)(halt_q_addr + (ushort) |
9987 | AscWriteLramByte(iop_base, (ushort) ASCV_SCSIBUSY_B, scsi_busy); | 8715 | ASC_SCSIQ_B_TAG_CODE)); |
9988 | 8716 | tag_code &= 0xDC; | |
9989 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | 8717 | if ((asc_dvc->pci_fix_asyn_xfer & target_id) |
9990 | return (0); | 8718 | && !(asc_dvc->pci_fix_asyn_xfer_always & target_id) |
9991 | } else if (int_halt_code == ASC_HALT_SDTR_REJECTED) { | 8719 | ) { |
9992 | 8720 | ||
9993 | AscMemWordCopyPtrFromLram(iop_base, | 8721 | tag_code |= (ASC_TAG_FLAG_DISABLE_DISCONNECT |
9994 | ASCV_MSGOUT_BEG, | 8722 | | ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX); |
9995 | (uchar *) &out_msg, | 8723 | |
9996 | sizeof(EXT_MSG) >> 1); | 8724 | } |
9997 | 8725 | AscWriteLramByte(iop_base, | |
9998 | if ((out_msg.msg_type == MS_EXTEND) && | 8726 | (ushort)(halt_q_addr + |
9999 | (out_msg.msg_len == MS_SDTR_LEN) && | 8727 | (ushort)ASC_SCSIQ_B_TAG_CODE), |
10000 | (out_msg.msg_req == MS_SDTR_CODE)) { | 8728 | tag_code); |
10001 | 8729 | ||
10002 | asc_dvc->init_sdtr &= ~target_id; | 8730 | q_status = AscReadLramByte(iop_base, |
10003 | asc_dvc->sdtr_done &= ~target_id; | 8731 | (ushort)(halt_q_addr + (ushort) |
10004 | AscSetChipSDTR(iop_base, asyn_sdtr, tid_no); | 8732 | ASC_SCSIQ_B_STATUS)); |
10005 | boardp->sdtr_data[tid_no] = asyn_sdtr; | 8733 | q_status |= (QS_READY | QS_BUSY); |
10006 | } | 8734 | AscWriteLramByte(iop_base, |
10007 | q_cntl &= ~QC_MSG_OUT; | 8735 | (ushort)(halt_q_addr + |
10008 | AscWriteLramByte(iop_base, | 8736 | (ushort)ASC_SCSIQ_B_STATUS), |
10009 | (ushort) (halt_q_addr + (ushort) ASC_SCSIQ_B_CNTL), | 8737 | q_status); |
10010 | q_cntl); | 8738 | |
10011 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | 8739 | scsi_busy = AscReadLramByte(iop_base, (ushort)ASCV_SCSIBUSY_B); |
10012 | return (0); | 8740 | scsi_busy &= ~target_id; |
10013 | } else if (int_halt_code == ASC_HALT_SS_QUEUE_FULL) { | 8741 | AscWriteLramByte(iop_base, (ushort)ASCV_SCSIBUSY_B, scsi_busy); |
10014 | 8742 | ||
10015 | scsi_status = AscReadLramByte(iop_base, | 8743 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); |
10016 | (ushort) ((ushort) halt_q_addr + (ushort) ASC_SCSIQ_SCSI_STATUS)); | 8744 | return (0); |
10017 | cur_dvc_qng = AscReadLramByte(iop_base, | 8745 | } else if (int_halt_code == ASC_HALT_SDTR_REJECTED) { |
10018 | (ushort) ((ushort) ASC_QADR_BEG + (ushort) target_ix)); | 8746 | |
10019 | if ((cur_dvc_qng > 0) && | 8747 | AscMemWordCopyPtrFromLram(iop_base, |
10020 | (asc_dvc->cur_dvc_qng[tid_no] > 0)) { | 8748 | ASCV_MSGOUT_BEG, |
10021 | 8749 | (uchar *)&out_msg, | |
10022 | scsi_busy = AscReadLramByte(iop_base, | 8750 | sizeof(EXT_MSG) >> 1); |
10023 | (ushort) ASCV_SCSIBUSY_B); | 8751 | |
10024 | scsi_busy |= target_id; | 8752 | if ((out_msg.msg_type == MS_EXTEND) && |
10025 | AscWriteLramByte(iop_base, | 8753 | (out_msg.msg_len == MS_SDTR_LEN) && |
10026 | (ushort) ASCV_SCSIBUSY_B, scsi_busy); | 8754 | (out_msg.msg_req == MS_SDTR_CODE)) { |
10027 | asc_dvc->queue_full_or_busy |= target_id; | 8755 | |
10028 | 8756 | asc_dvc->init_sdtr &= ~target_id; | |
10029 | if (scsi_status == SAM_STAT_TASK_SET_FULL) { | 8757 | asc_dvc->sdtr_done &= ~target_id; |
10030 | if (cur_dvc_qng > ASC_MIN_TAGGED_CMD) { | 8758 | AscSetChipSDTR(iop_base, asyn_sdtr, tid_no); |
10031 | cur_dvc_qng -= 1; | 8759 | boardp->sdtr_data[tid_no] = asyn_sdtr; |
10032 | asc_dvc->max_dvc_qng[tid_no] = cur_dvc_qng; | 8760 | } |
10033 | 8761 | q_cntl &= ~QC_MSG_OUT; | |
10034 | AscWriteLramByte(iop_base, | 8762 | AscWriteLramByte(iop_base, |
10035 | (ushort) ((ushort) ASCV_MAX_DVC_QNG_BEG + | 8763 | (ushort)(halt_q_addr + |
10036 | (ushort) tid_no), | 8764 | (ushort)ASC_SCSIQ_B_CNTL), q_cntl); |
10037 | cur_dvc_qng); | 8765 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); |
10038 | 8766 | return (0); | |
10039 | /* | 8767 | } else if (int_halt_code == ASC_HALT_SS_QUEUE_FULL) { |
10040 | * Set the device queue depth to the number of | 8768 | |
10041 | * active requests when the QUEUE FULL condition | 8769 | scsi_status = AscReadLramByte(iop_base, |
10042 | * was encountered. | 8770 | (ushort)((ushort)halt_q_addr + |
10043 | */ | 8771 | (ushort) |
10044 | boardp->queue_full |= target_id; | 8772 | ASC_SCSIQ_SCSI_STATUS)); |
10045 | boardp->queue_full_cnt[tid_no] = cur_dvc_qng; | 8773 | cur_dvc_qng = |
10046 | } | 8774 | AscReadLramByte(iop_base, |
10047 | } | 8775 | (ushort)((ushort)ASC_QADR_BEG + |
10048 | } | 8776 | (ushort)target_ix)); |
10049 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | 8777 | if ((cur_dvc_qng > 0) && (asc_dvc->cur_dvc_qng[tid_no] > 0)) { |
10050 | return (0); | 8778 | |
10051 | } | 8779 | scsi_busy = AscReadLramByte(iop_base, |
8780 | (ushort)ASCV_SCSIBUSY_B); | ||
8781 | scsi_busy |= target_id; | ||
8782 | AscWriteLramByte(iop_base, | ||
8783 | (ushort)ASCV_SCSIBUSY_B, scsi_busy); | ||
8784 | asc_dvc->queue_full_or_busy |= target_id; | ||
8785 | |||
8786 | if (scsi_status == SAM_STAT_TASK_SET_FULL) { | ||
8787 | if (cur_dvc_qng > ASC_MIN_TAGGED_CMD) { | ||
8788 | cur_dvc_qng -= 1; | ||
8789 | asc_dvc->max_dvc_qng[tid_no] = | ||
8790 | cur_dvc_qng; | ||
8791 | |||
8792 | AscWriteLramByte(iop_base, | ||
8793 | (ushort)((ushort) | ||
8794 | ASCV_MAX_DVC_QNG_BEG | ||
8795 | + (ushort) | ||
8796 | tid_no), | ||
8797 | cur_dvc_qng); | ||
8798 | |||
8799 | /* | ||
8800 | * Set the device queue depth to the number of | ||
8801 | * active requests when the QUEUE FULL condition | ||
8802 | * was encountered. | ||
8803 | */ | ||
8804 | boardp->queue_full |= target_id; | ||
8805 | boardp->queue_full_cnt[tid_no] = | ||
8806 | cur_dvc_qng; | ||
8807 | } | ||
8808 | } | ||
8809 | } | ||
8810 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | ||
8811 | return (0); | ||
8812 | } | ||
10052 | #if CC_VERY_LONG_SG_LIST | 8813 | #if CC_VERY_LONG_SG_LIST |
10053 | else if (int_halt_code == ASC_HALT_HOST_COPY_SG_LIST_TO_RISC) | 8814 | else if (int_halt_code == ASC_HALT_HOST_COPY_SG_LIST_TO_RISC) { |
10054 | { | 8815 | uchar q_no; |
10055 | uchar q_no; | 8816 | ushort q_addr; |
10056 | ushort q_addr; | 8817 | uchar sg_wk_q_no; |
10057 | uchar sg_wk_q_no; | 8818 | uchar first_sg_wk_q_no; |
10058 | uchar first_sg_wk_q_no; | 8819 | ASC_SCSI_Q *scsiq; /* Ptr to driver request. */ |
10059 | ASC_SCSI_Q *scsiq; /* Ptr to driver request. */ | 8820 | ASC_SG_HEAD *sg_head; /* Ptr to driver SG request. */ |
10060 | ASC_SG_HEAD *sg_head; /* Ptr to driver SG request. */ | 8821 | ASC_SG_LIST_Q scsi_sg_q; /* Structure written to queue. */ |
10061 | ASC_SG_LIST_Q scsi_sg_q; /* Structure written to queue. */ | 8822 | ushort sg_list_dwords; |
10062 | ushort sg_list_dwords; | 8823 | ushort sg_entry_cnt; |
10063 | ushort sg_entry_cnt; | 8824 | uchar next_qp; |
10064 | uchar next_qp; | 8825 | int i; |
10065 | int i; | 8826 | |
10066 | 8827 | q_no = AscReadLramByte(iop_base, (ushort)ASCV_REQ_SG_LIST_QP); | |
10067 | q_no = AscReadLramByte(iop_base, (ushort) ASCV_REQ_SG_LIST_QP); | 8828 | if (q_no == ASC_QLINK_END) { |
10068 | if (q_no == ASC_QLINK_END) | 8829 | return (0); |
10069 | { | 8830 | } |
10070 | return(0); | 8831 | |
10071 | } | 8832 | q_addr = ASC_QNO_TO_QADDR(q_no); |
10072 | 8833 | ||
10073 | q_addr = ASC_QNO_TO_QADDR(q_no); | 8834 | /* |
10074 | 8835 | * Convert the request's SRB pointer to a host ASC_SCSI_REQ | |
10075 | /* | 8836 | * structure pointer using a macro provided by the driver. |
10076 | * Convert the request's SRB pointer to a host ASC_SCSI_REQ | 8837 | * The ASC_SCSI_REQ pointer provides a pointer to the |
10077 | * structure pointer using a macro provided by the driver. | 8838 | * host ASC_SG_HEAD structure. |
10078 | * The ASC_SCSI_REQ pointer provides a pointer to the | 8839 | */ |
10079 | * host ASC_SG_HEAD structure. | 8840 | /* Read request's SRB pointer. */ |
10080 | */ | 8841 | scsiq = (ASC_SCSI_Q *) |
10081 | /* Read request's SRB pointer. */ | 8842 | ASC_SRB2SCSIQ(ASC_U32_TO_VADDR(AscReadLramDWord(iop_base, |
10082 | scsiq = (ASC_SCSI_Q *) | 8843 | (ushort) |
10083 | ASC_SRB2SCSIQ( | 8844 | (q_addr + |
10084 | ASC_U32_TO_VADDR(AscReadLramDWord(iop_base, | 8845 | ASC_SCSIQ_D_SRBPTR)))); |
10085 | (ushort) (q_addr + ASC_SCSIQ_D_SRBPTR)))); | 8846 | |
10086 | 8847 | /* | |
10087 | /* | 8848 | * Get request's first and working SG queue. |
10088 | * Get request's first and working SG queue. | 8849 | */ |
10089 | */ | 8850 | sg_wk_q_no = AscReadLramByte(iop_base, |
10090 | sg_wk_q_no = AscReadLramByte(iop_base, | 8851 | (ushort)(q_addr + |
10091 | (ushort) (q_addr + ASC_SCSIQ_B_SG_WK_QP)); | 8852 | ASC_SCSIQ_B_SG_WK_QP)); |
10092 | 8853 | ||
10093 | first_sg_wk_q_no = AscReadLramByte(iop_base, | 8854 | first_sg_wk_q_no = AscReadLramByte(iop_base, |
10094 | (ushort) (q_addr + ASC_SCSIQ_B_FIRST_SG_WK_QP)); | 8855 | (ushort)(q_addr + |
10095 | 8856 | ASC_SCSIQ_B_FIRST_SG_WK_QP)); | |
10096 | /* | 8857 | |
10097 | * Reset request's working SG queue back to the | 8858 | /* |
10098 | * first SG queue. | 8859 | * Reset request's working SG queue back to the |
10099 | */ | 8860 | * first SG queue. |
10100 | AscWriteLramByte(iop_base, | 8861 | */ |
10101 | (ushort) (q_addr + (ushort) ASC_SCSIQ_B_SG_WK_QP), | 8862 | AscWriteLramByte(iop_base, |
10102 | first_sg_wk_q_no); | 8863 | (ushort)(q_addr + |
10103 | 8864 | (ushort)ASC_SCSIQ_B_SG_WK_QP), | |
10104 | sg_head = scsiq->sg_head; | 8865 | first_sg_wk_q_no); |
10105 | 8866 | ||
10106 | /* | 8867 | sg_head = scsiq->sg_head; |
10107 | * Set sg_entry_cnt to the number of SG elements | 8868 | |
10108 | * that will be completed on this interrupt. | 8869 | /* |
10109 | * | 8870 | * Set sg_entry_cnt to the number of SG elements |
10110 | * Note: The allocated SG queues contain ASC_MAX_SG_LIST - 1 | 8871 | * that will be completed on this interrupt. |
10111 | * SG elements. The data_cnt and data_addr fields which | 8872 | * |
10112 | * add 1 to the SG element capacity are not used when | 8873 | * Note: The allocated SG queues contain ASC_MAX_SG_LIST - 1 |
10113 | * restarting SG handling after a halt. | 8874 | * SG elements. The data_cnt and data_addr fields which |
10114 | */ | 8875 | * add 1 to the SG element capacity are not used when |
10115 | if (scsiq->remain_sg_entry_cnt > (ASC_MAX_SG_LIST - 1)) | 8876 | * restarting SG handling after a halt. |
10116 | { | 8877 | */ |
10117 | sg_entry_cnt = ASC_MAX_SG_LIST - 1; | 8878 | if (scsiq->remain_sg_entry_cnt > (ASC_MAX_SG_LIST - 1)) { |
10118 | 8879 | sg_entry_cnt = ASC_MAX_SG_LIST - 1; | |
10119 | /* | 8880 | |
10120 | * Keep track of remaining number of SG elements that will | 8881 | /* |
10121 | * need to be handled on the next interrupt. | 8882 | * Keep track of remaining number of SG elements that will |
10122 | */ | 8883 | * need to be handled on the next interrupt. |
10123 | scsiq->remain_sg_entry_cnt -= (ASC_MAX_SG_LIST - 1); | 8884 | */ |
10124 | } else | 8885 | scsiq->remain_sg_entry_cnt -= (ASC_MAX_SG_LIST - 1); |
10125 | { | 8886 | } else { |
10126 | sg_entry_cnt = scsiq->remain_sg_entry_cnt; | 8887 | sg_entry_cnt = scsiq->remain_sg_entry_cnt; |
10127 | scsiq->remain_sg_entry_cnt = 0; | 8888 | scsiq->remain_sg_entry_cnt = 0; |
10128 | } | 8889 | } |
10129 | 8890 | ||
10130 | /* | 8891 | /* |
10131 | * Copy SG elements into the list of allocated SG queues. | 8892 | * Copy SG elements into the list of allocated SG queues. |
10132 | * | 8893 | * |
10133 | * Last index completed is saved in scsiq->next_sg_index. | 8894 | * Last index completed is saved in scsiq->next_sg_index. |
10134 | */ | 8895 | */ |
10135 | next_qp = first_sg_wk_q_no; | 8896 | next_qp = first_sg_wk_q_no; |
10136 | q_addr = ASC_QNO_TO_QADDR(next_qp); | 8897 | q_addr = ASC_QNO_TO_QADDR(next_qp); |
10137 | scsi_sg_q.sg_head_qp = q_no; | 8898 | scsi_sg_q.sg_head_qp = q_no; |
10138 | scsi_sg_q.cntl = QCSG_SG_XFER_LIST; | 8899 | scsi_sg_q.cntl = QCSG_SG_XFER_LIST; |
10139 | for( i = 0; i < sg_head->queue_cnt; i++) | 8900 | for (i = 0; i < sg_head->queue_cnt; i++) { |
10140 | { | 8901 | scsi_sg_q.seq_no = i + 1; |
10141 | scsi_sg_q.seq_no = i + 1; | 8902 | if (sg_entry_cnt > ASC_SG_LIST_PER_Q) { |
10142 | if (sg_entry_cnt > ASC_SG_LIST_PER_Q) | 8903 | sg_list_dwords = (uchar)(ASC_SG_LIST_PER_Q * 2); |
10143 | { | 8904 | sg_entry_cnt -= ASC_SG_LIST_PER_Q; |
10144 | sg_list_dwords = (uchar) (ASC_SG_LIST_PER_Q * 2); | 8905 | /* |
10145 | sg_entry_cnt -= ASC_SG_LIST_PER_Q; | 8906 | * After very first SG queue RISC FW uses next |
10146 | /* | 8907 | * SG queue first element then checks sg_list_cnt |
10147 | * After very first SG queue RISC FW uses next | 8908 | * against zero and then decrements, so set |
10148 | * SG queue first element then checks sg_list_cnt | 8909 | * sg_list_cnt 1 less than number of SG elements |
10149 | * against zero and then decrements, so set | 8910 | * in each SG queue. |
10150 | * sg_list_cnt 1 less than number of SG elements | 8911 | */ |
10151 | * in each SG queue. | 8912 | scsi_sg_q.sg_list_cnt = ASC_SG_LIST_PER_Q - 1; |
10152 | */ | 8913 | scsi_sg_q.sg_cur_list_cnt = |
10153 | scsi_sg_q.sg_list_cnt = ASC_SG_LIST_PER_Q - 1; | 8914 | ASC_SG_LIST_PER_Q - 1; |
10154 | scsi_sg_q.sg_cur_list_cnt = ASC_SG_LIST_PER_Q - 1; | 8915 | } else { |
10155 | } else { | 8916 | /* |
10156 | /* | 8917 | * This is the last SG queue in the list of |
10157 | * This is the last SG queue in the list of | 8918 | * allocated SG queues. If there are more |
10158 | * allocated SG queues. If there are more | 8919 | * SG elements than will fit in the allocated |
10159 | * SG elements than will fit in the allocated | 8920 | * queues, then set the QCSG_SG_XFER_MORE flag. |
10160 | * queues, then set the QCSG_SG_XFER_MORE flag. | 8921 | */ |
10161 | */ | 8922 | if (scsiq->remain_sg_entry_cnt != 0) { |
10162 | if (scsiq->remain_sg_entry_cnt != 0) | 8923 | scsi_sg_q.cntl |= QCSG_SG_XFER_MORE; |
10163 | { | 8924 | } else { |
10164 | scsi_sg_q.cntl |= QCSG_SG_XFER_MORE; | 8925 | scsi_sg_q.cntl |= QCSG_SG_XFER_END; |
10165 | } else | 8926 | } |
10166 | { | 8927 | /* equals sg_entry_cnt * 2 */ |
10167 | scsi_sg_q.cntl |= QCSG_SG_XFER_END; | 8928 | sg_list_dwords = sg_entry_cnt << 1; |
10168 | } | 8929 | scsi_sg_q.sg_list_cnt = sg_entry_cnt - 1; |
10169 | /* equals sg_entry_cnt * 2 */ | 8930 | scsi_sg_q.sg_cur_list_cnt = sg_entry_cnt - 1; |
10170 | sg_list_dwords = sg_entry_cnt << 1; | 8931 | sg_entry_cnt = 0; |
10171 | scsi_sg_q.sg_list_cnt = sg_entry_cnt - 1; | 8932 | } |
10172 | scsi_sg_q.sg_cur_list_cnt = sg_entry_cnt - 1; | 8933 | |
10173 | sg_entry_cnt = 0; | 8934 | scsi_sg_q.q_no = next_qp; |
10174 | } | 8935 | AscMemWordCopyPtrToLram(iop_base, |
10175 | 8936 | q_addr + ASC_SCSIQ_SGHD_CPY_BEG, | |
10176 | scsi_sg_q.q_no = next_qp; | 8937 | (uchar *)&scsi_sg_q, |
10177 | AscMemWordCopyPtrToLram(iop_base, | 8938 | sizeof(ASC_SG_LIST_Q) >> 1); |
10178 | q_addr + ASC_SCSIQ_SGHD_CPY_BEG, | 8939 | |
10179 | (uchar *) &scsi_sg_q, | 8940 | AscMemDWordCopyPtrToLram(iop_base, |
10180 | sizeof(ASC_SG_LIST_Q) >> 1); | 8941 | q_addr + ASC_SGQ_LIST_BEG, |
10181 | 8942 | (uchar *)&sg_head-> | |
10182 | AscMemDWordCopyPtrToLram(iop_base, | 8943 | sg_list[scsiq->next_sg_index], |
10183 | q_addr + ASC_SGQ_LIST_BEG, | 8944 | sg_list_dwords); |
10184 | (uchar *) &sg_head->sg_list[scsiq->next_sg_index], | 8945 | |
10185 | sg_list_dwords); | 8946 | scsiq->next_sg_index += ASC_SG_LIST_PER_Q; |
10186 | 8947 | ||
10187 | scsiq->next_sg_index += ASC_SG_LIST_PER_Q; | 8948 | /* |
10188 | 8949 | * If the just completed SG queue contained the | |
10189 | /* | 8950 | * last SG element, then no more SG queues need |
10190 | * If the just completed SG queue contained the | 8951 | * to be written. |
10191 | * last SG element, then no more SG queues need | 8952 | */ |
10192 | * to be written. | 8953 | if (scsi_sg_q.cntl & QCSG_SG_XFER_END) { |
10193 | */ | 8954 | break; |
10194 | if (scsi_sg_q.cntl & QCSG_SG_XFER_END) | 8955 | } |
10195 | { | 8956 | |
10196 | break; | 8957 | next_qp = AscReadLramByte(iop_base, |
10197 | } | 8958 | (ushort)(q_addr + |
10198 | 8959 | ASC_SCSIQ_B_FWD)); | |
10199 | next_qp = AscReadLramByte( iop_base, | 8960 | q_addr = ASC_QNO_TO_QADDR(next_qp); |
10200 | ( ushort )( q_addr+ASC_SCSIQ_B_FWD ) ); | 8961 | } |
10201 | q_addr = ASC_QNO_TO_QADDR( next_qp ); | 8962 | |
10202 | } | 8963 | /* |
10203 | 8964 | * Clear the halt condition so the RISC will be restarted | |
10204 | /* | 8965 | * after the return. |
10205 | * Clear the halt condition so the RISC will be restarted | 8966 | */ |
10206 | * after the return. | 8967 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); |
10207 | */ | 8968 | return (0); |
10208 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | 8969 | } |
10209 | return(0); | ||
10210 | } | ||
10211 | #endif /* CC_VERY_LONG_SG_LIST */ | 8970 | #endif /* CC_VERY_LONG_SG_LIST */ |
10212 | return (0); | 8971 | return (0); |
10213 | } | 8972 | } |
10214 | 8973 | ||
10215 | STATIC uchar | 8974 | static uchar |
10216 | _AscCopyLramScsiDoneQ( | 8975 | _AscCopyLramScsiDoneQ(PortAddr iop_base, |
10217 | PortAddr iop_base, | 8976 | ushort q_addr, |
10218 | ushort q_addr, | 8977 | ASC_QDONE_INFO *scsiq, ASC_DCNT max_dma_count) |
10219 | ASC_QDONE_INFO * scsiq, | ||
10220 | ASC_DCNT max_dma_count | ||
10221 | ) | ||
10222 | { | 8978 | { |
10223 | ushort _val; | 8979 | ushort _val; |
10224 | uchar sg_queue_cnt; | 8980 | uchar sg_queue_cnt; |
10225 | 8981 | ||
10226 | DvcGetQinfo(iop_base, | 8982 | DvcGetQinfo(iop_base, |
10227 | q_addr + ASC_SCSIQ_DONE_INFO_BEG, | 8983 | q_addr + ASC_SCSIQ_DONE_INFO_BEG, |
10228 | (uchar *) scsiq, | 8984 | (uchar *)scsiq, |
10229 | (sizeof (ASC_SCSIQ_2) + sizeof (ASC_SCSIQ_3)) / 2); | 8985 | (sizeof(ASC_SCSIQ_2) + sizeof(ASC_SCSIQ_3)) / 2); |
10230 | 8986 | ||
10231 | _val = AscReadLramWord(iop_base, | 8987 | _val = AscReadLramWord(iop_base, |
10232 | (ushort) (q_addr + (ushort) ASC_SCSIQ_B_STATUS)); | 8988 | (ushort)(q_addr + (ushort)ASC_SCSIQ_B_STATUS)); |
10233 | scsiq->q_status = (uchar) _val; | 8989 | scsiq->q_status = (uchar)_val; |
10234 | scsiq->q_no = (uchar) (_val >> 8); | 8990 | scsiq->q_no = (uchar)(_val >> 8); |
10235 | _val = AscReadLramWord(iop_base, | 8991 | _val = AscReadLramWord(iop_base, |
10236 | (ushort) (q_addr + (ushort) ASC_SCSIQ_B_CNTL)); | 8992 | (ushort)(q_addr + (ushort)ASC_SCSIQ_B_CNTL)); |
10237 | scsiq->cntl = (uchar) _val; | 8993 | scsiq->cntl = (uchar)_val; |
10238 | sg_queue_cnt = (uchar) (_val >> 8); | 8994 | sg_queue_cnt = (uchar)(_val >> 8); |
10239 | _val = AscReadLramWord(iop_base, | 8995 | _val = AscReadLramWord(iop_base, |
10240 | (ushort) (q_addr + (ushort) ASC_SCSIQ_B_SENSE_LEN)); | 8996 | (ushort)(q_addr + |
10241 | scsiq->sense_len = (uchar) _val; | 8997 | (ushort)ASC_SCSIQ_B_SENSE_LEN)); |
10242 | scsiq->extra_bytes = (uchar) (_val >> 8); | 8998 | scsiq->sense_len = (uchar)_val; |
10243 | 8999 | scsiq->extra_bytes = (uchar)(_val >> 8); | |
10244 | /* | 9000 | |
10245 | * Read high word of remain bytes from alternate location. | 9001 | /* |
10246 | */ | 9002 | * Read high word of remain bytes from alternate location. |
10247 | scsiq->remain_bytes = (((ADV_DCNT) AscReadLramWord( iop_base, | 9003 | */ |
10248 | (ushort) (q_addr+ (ushort) ASC_SCSIQ_W_ALT_DC1))) << 16); | 9004 | scsiq->remain_bytes = (((ADV_DCNT)AscReadLramWord(iop_base, |
10249 | /* | 9005 | (ushort)(q_addr + |
10250 | * Read low word of remain bytes from original location. | 9006 | (ushort) |
10251 | */ | 9007 | ASC_SCSIQ_W_ALT_DC1))) |
10252 | scsiq->remain_bytes += AscReadLramWord(iop_base, | 9008 | << 16); |
10253 | (ushort) (q_addr+ (ushort) ASC_SCSIQ_DW_REMAIN_XFER_CNT)); | 9009 | /* |
10254 | 9010 | * Read low word of remain bytes from original location. | |
10255 | scsiq->remain_bytes &= max_dma_count; | 9011 | */ |
10256 | return (sg_queue_cnt); | 9012 | scsiq->remain_bytes += AscReadLramWord(iop_base, |
9013 | (ushort)(q_addr + (ushort) | ||
9014 | ASC_SCSIQ_DW_REMAIN_XFER_CNT)); | ||
9015 | |||
9016 | scsiq->remain_bytes &= max_dma_count; | ||
9017 | return (sg_queue_cnt); | ||
10257 | } | 9018 | } |
10258 | 9019 | ||
10259 | STATIC int | 9020 | static int AscIsrQDone(ASC_DVC_VAR *asc_dvc) |
10260 | AscIsrQDone( | ||
10261 | ASC_DVC_VAR *asc_dvc | ||
10262 | ) | ||
10263 | { | 9021 | { |
10264 | uchar next_qp; | 9022 | uchar next_qp; |
10265 | uchar n_q_used; | 9023 | uchar n_q_used; |
10266 | uchar sg_list_qp; | 9024 | uchar sg_list_qp; |
10267 | uchar sg_queue_cnt; | 9025 | uchar sg_queue_cnt; |
10268 | uchar q_cnt; | 9026 | uchar q_cnt; |
10269 | uchar done_q_tail; | 9027 | uchar done_q_tail; |
10270 | uchar tid_no; | 9028 | uchar tid_no; |
10271 | ASC_SCSI_BIT_ID_TYPE scsi_busy; | 9029 | ASC_SCSI_BIT_ID_TYPE scsi_busy; |
10272 | ASC_SCSI_BIT_ID_TYPE target_id; | 9030 | ASC_SCSI_BIT_ID_TYPE target_id; |
10273 | PortAddr iop_base; | 9031 | PortAddr iop_base; |
10274 | ushort q_addr; | 9032 | ushort q_addr; |
10275 | ushort sg_q_addr; | 9033 | ushort sg_q_addr; |
10276 | uchar cur_target_qng; | 9034 | uchar cur_target_qng; |
10277 | ASC_QDONE_INFO scsiq_buf; | 9035 | ASC_QDONE_INFO scsiq_buf; |
10278 | ASC_QDONE_INFO *scsiq; | 9036 | ASC_QDONE_INFO *scsiq; |
10279 | int false_overrun; | 9037 | int false_overrun; |
10280 | ASC_ISR_CALLBACK asc_isr_callback; | 9038 | ASC_ISR_CALLBACK asc_isr_callback; |
10281 | 9039 | ||
10282 | iop_base = asc_dvc->iop_base; | 9040 | iop_base = asc_dvc->iop_base; |
10283 | asc_isr_callback = asc_dvc->isr_callback; | 9041 | asc_isr_callback = asc_dvc->isr_callback; |
10284 | n_q_used = 1; | 9042 | n_q_used = 1; |
10285 | scsiq = (ASC_QDONE_INFO *) & scsiq_buf; | 9043 | scsiq = (ASC_QDONE_INFO *)&scsiq_buf; |
10286 | done_q_tail = (uchar) AscGetVarDoneQTail(iop_base); | 9044 | done_q_tail = (uchar)AscGetVarDoneQTail(iop_base); |
10287 | q_addr = ASC_QNO_TO_QADDR(done_q_tail); | 9045 | q_addr = ASC_QNO_TO_QADDR(done_q_tail); |
10288 | next_qp = AscReadLramByte(iop_base, | 9046 | next_qp = AscReadLramByte(iop_base, |
10289 | (ushort) (q_addr + (ushort) ASC_SCSIQ_B_FWD)); | 9047 | (ushort)(q_addr + (ushort)ASC_SCSIQ_B_FWD)); |
10290 | if (next_qp != ASC_QLINK_END) { | 9048 | if (next_qp != ASC_QLINK_END) { |
10291 | AscPutVarDoneQTail(iop_base, next_qp); | 9049 | AscPutVarDoneQTail(iop_base, next_qp); |
10292 | q_addr = ASC_QNO_TO_QADDR(next_qp); | 9050 | q_addr = ASC_QNO_TO_QADDR(next_qp); |
10293 | sg_queue_cnt = _AscCopyLramScsiDoneQ(iop_base, q_addr, scsiq, | 9051 | sg_queue_cnt = _AscCopyLramScsiDoneQ(iop_base, q_addr, scsiq, |
10294 | asc_dvc->max_dma_count); | 9052 | asc_dvc->max_dma_count); |
10295 | AscWriteLramByte(iop_base, | 9053 | AscWriteLramByte(iop_base, |
10296 | (ushort) (q_addr + (ushort) ASC_SCSIQ_B_STATUS), | 9054 | (ushort)(q_addr + |
10297 | (uchar) (scsiq->q_status & (uchar) ~ (QS_READY | QS_ABORTED))); | 9055 | (ushort)ASC_SCSIQ_B_STATUS), |
10298 | tid_no = ASC_TIX_TO_TID(scsiq->d2.target_ix); | 9056 | (uchar)(scsiq-> |
10299 | target_id = ASC_TIX_TO_TARGET_ID(scsiq->d2.target_ix); | 9057 | q_status & (uchar)~(QS_READY | |
10300 | if ((scsiq->cntl & QC_SG_HEAD) != 0) { | 9058 | QS_ABORTED))); |
10301 | sg_q_addr = q_addr; | 9059 | tid_no = ASC_TIX_TO_TID(scsiq->d2.target_ix); |
10302 | sg_list_qp = next_qp; | 9060 | target_id = ASC_TIX_TO_TARGET_ID(scsiq->d2.target_ix); |
10303 | for (q_cnt = 0; q_cnt < sg_queue_cnt; q_cnt++) { | 9061 | if ((scsiq->cntl & QC_SG_HEAD) != 0) { |
10304 | sg_list_qp = AscReadLramByte(iop_base, | 9062 | sg_q_addr = q_addr; |
10305 | (ushort) (sg_q_addr + (ushort) ASC_SCSIQ_B_FWD)); | 9063 | sg_list_qp = next_qp; |
10306 | sg_q_addr = ASC_QNO_TO_QADDR(sg_list_qp); | 9064 | for (q_cnt = 0; q_cnt < sg_queue_cnt; q_cnt++) { |
10307 | if (sg_list_qp == ASC_QLINK_END) { | 9065 | sg_list_qp = AscReadLramByte(iop_base, |
10308 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_SG_Q_LINKS); | 9066 | (ushort)(sg_q_addr |
10309 | scsiq->d3.done_stat = QD_WITH_ERROR; | 9067 | + (ushort) |
10310 | scsiq->d3.host_stat = QHSTA_D_QDONE_SG_LIST_CORRUPTED; | 9068 | ASC_SCSIQ_B_FWD)); |
10311 | goto FATAL_ERR_QDONE; | 9069 | sg_q_addr = ASC_QNO_TO_QADDR(sg_list_qp); |
10312 | } | 9070 | if (sg_list_qp == ASC_QLINK_END) { |
10313 | AscWriteLramByte(iop_base, | 9071 | AscSetLibErrorCode(asc_dvc, |
10314 | (ushort) (sg_q_addr + (ushort) ASC_SCSIQ_B_STATUS), | 9072 | ASCQ_ERR_SG_Q_LINKS); |
10315 | QS_FREE); | 9073 | scsiq->d3.done_stat = QD_WITH_ERROR; |
10316 | } | 9074 | scsiq->d3.host_stat = |
10317 | n_q_used = sg_queue_cnt + 1; | 9075 | QHSTA_D_QDONE_SG_LIST_CORRUPTED; |
10318 | AscPutVarDoneQTail(iop_base, sg_list_qp); | 9076 | goto FATAL_ERR_QDONE; |
10319 | } | 9077 | } |
10320 | if (asc_dvc->queue_full_or_busy & target_id) { | 9078 | AscWriteLramByte(iop_base, |
10321 | cur_target_qng = AscReadLramByte(iop_base, | 9079 | (ushort)(sg_q_addr + (ushort) |
10322 | (ushort) ((ushort) ASC_QADR_BEG + (ushort) scsiq->d2.target_ix)); | 9080 | ASC_SCSIQ_B_STATUS), |
10323 | if (cur_target_qng < asc_dvc->max_dvc_qng[tid_no]) { | 9081 | QS_FREE); |
10324 | scsi_busy = AscReadLramByte(iop_base, | 9082 | } |
10325 | (ushort) ASCV_SCSIBUSY_B); | 9083 | n_q_used = sg_queue_cnt + 1; |
10326 | scsi_busy &= ~target_id; | 9084 | AscPutVarDoneQTail(iop_base, sg_list_qp); |
10327 | AscWriteLramByte(iop_base, | 9085 | } |
10328 | (ushort) ASCV_SCSIBUSY_B, scsi_busy); | 9086 | if (asc_dvc->queue_full_or_busy & target_id) { |
10329 | asc_dvc->queue_full_or_busy &= ~target_id; | 9087 | cur_target_qng = AscReadLramByte(iop_base, |
10330 | } | 9088 | (ushort)((ushort) |
10331 | } | 9089 | ASC_QADR_BEG |
10332 | if (asc_dvc->cur_total_qng >= n_q_used) { | 9090 | + (ushort) |
10333 | asc_dvc->cur_total_qng -= n_q_used; | 9091 | scsiq->d2. |
10334 | if (asc_dvc->cur_dvc_qng[tid_no] != 0) { | 9092 | target_ix)); |
10335 | asc_dvc->cur_dvc_qng[tid_no]--; | 9093 | if (cur_target_qng < asc_dvc->max_dvc_qng[tid_no]) { |
10336 | } | 9094 | scsi_busy = AscReadLramByte(iop_base, (ushort) |
10337 | } else { | 9095 | ASCV_SCSIBUSY_B); |
10338 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_CUR_QNG); | 9096 | scsi_busy &= ~target_id; |
10339 | scsiq->d3.done_stat = QD_WITH_ERROR; | 9097 | AscWriteLramByte(iop_base, |
10340 | goto FATAL_ERR_QDONE; | 9098 | (ushort)ASCV_SCSIBUSY_B, |
10341 | } | 9099 | scsi_busy); |
10342 | if ((scsiq->d2.srb_ptr == 0UL) || | 9100 | asc_dvc->queue_full_or_busy &= ~target_id; |
10343 | ((scsiq->q_status & QS_ABORTED) != 0)) { | 9101 | } |
10344 | return (0x11); | 9102 | } |
10345 | } else if (scsiq->q_status == QS_DONE) { | 9103 | if (asc_dvc->cur_total_qng >= n_q_used) { |
10346 | false_overrun = FALSE; | 9104 | asc_dvc->cur_total_qng -= n_q_used; |
10347 | if (scsiq->extra_bytes != 0) { | 9105 | if (asc_dvc->cur_dvc_qng[tid_no] != 0) { |
10348 | scsiq->remain_bytes += (ADV_DCNT) scsiq->extra_bytes; | 9106 | asc_dvc->cur_dvc_qng[tid_no]--; |
10349 | } | 9107 | } |
10350 | if (scsiq->d3.done_stat == QD_WITH_ERROR) { | 9108 | } else { |
10351 | if (scsiq->d3.host_stat == QHSTA_M_DATA_OVER_RUN) { | 9109 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_CUR_QNG); |
10352 | if ((scsiq->cntl & (QC_DATA_IN | QC_DATA_OUT)) == 0) { | 9110 | scsiq->d3.done_stat = QD_WITH_ERROR; |
10353 | scsiq->d3.done_stat = QD_NO_ERROR; | 9111 | goto FATAL_ERR_QDONE; |
10354 | scsiq->d3.host_stat = QHSTA_NO_ERROR; | 9112 | } |
10355 | } else if (false_overrun) { | 9113 | if ((scsiq->d2.srb_ptr == 0UL) || |
10356 | scsiq->d3.done_stat = QD_NO_ERROR; | 9114 | ((scsiq->q_status & QS_ABORTED) != 0)) { |
10357 | scsiq->d3.host_stat = QHSTA_NO_ERROR; | 9115 | return (0x11); |
10358 | } | 9116 | } else if (scsiq->q_status == QS_DONE) { |
10359 | } else if (scsiq->d3.host_stat == | 9117 | false_overrun = FALSE; |
10360 | QHSTA_M_HUNG_REQ_SCSI_BUS_RESET) { | 9118 | if (scsiq->extra_bytes != 0) { |
10361 | AscStopChip(iop_base); | 9119 | scsiq->remain_bytes += |
10362 | AscSetChipControl(iop_base, | 9120 | (ADV_DCNT)scsiq->extra_bytes; |
10363 | (uchar) (CC_SCSI_RESET | CC_HALT)); | 9121 | } |
10364 | DvcDelayNanoSecond(asc_dvc, 60000); | 9122 | if (scsiq->d3.done_stat == QD_WITH_ERROR) { |
10365 | AscSetChipControl(iop_base, CC_HALT); | 9123 | if (scsiq->d3.host_stat == |
10366 | AscSetChipStatus(iop_base, CIW_CLR_SCSI_RESET_INT); | 9124 | QHSTA_M_DATA_OVER_RUN) { |
10367 | AscSetChipStatus(iop_base, 0); | 9125 | if ((scsiq-> |
10368 | AscSetChipControl(iop_base, 0); | 9126 | cntl & (QC_DATA_IN | QC_DATA_OUT)) |
10369 | } | 9127 | == 0) { |
10370 | } | 9128 | scsiq->d3.done_stat = |
10371 | if ((scsiq->cntl & QC_NO_CALLBACK) == 0) { | 9129 | QD_NO_ERROR; |
10372 | (*asc_isr_callback) (asc_dvc, scsiq); | 9130 | scsiq->d3.host_stat = |
10373 | } else { | 9131 | QHSTA_NO_ERROR; |
10374 | if ((AscReadLramByte(iop_base, | 9132 | } else if (false_overrun) { |
10375 | (ushort) (q_addr + (ushort) ASC_SCSIQ_CDB_BEG)) == | 9133 | scsiq->d3.done_stat = |
10376 | START_STOP)) { | 9134 | QD_NO_ERROR; |
10377 | asc_dvc->unit_not_ready &= ~target_id; | 9135 | scsiq->d3.host_stat = |
10378 | if (scsiq->d3.done_stat != QD_NO_ERROR) { | 9136 | QHSTA_NO_ERROR; |
10379 | asc_dvc->start_motor &= ~target_id; | 9137 | } |
10380 | } | 9138 | } else if (scsiq->d3.host_stat == |
10381 | } | 9139 | QHSTA_M_HUNG_REQ_SCSI_BUS_RESET) { |
10382 | } | 9140 | AscStopChip(iop_base); |
10383 | return (1); | 9141 | AscSetChipControl(iop_base, |
10384 | } else { | 9142 | (uchar)(CC_SCSI_RESET |
10385 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_Q_STATUS); | 9143 | | CC_HALT)); |
10386 | FATAL_ERR_QDONE: | 9144 | DvcDelayNanoSecond(asc_dvc, 60000); |
10387 | if ((scsiq->cntl & QC_NO_CALLBACK) == 0) { | 9145 | AscSetChipControl(iop_base, CC_HALT); |
10388 | (*asc_isr_callback) (asc_dvc, scsiq); | 9146 | AscSetChipStatus(iop_base, |
10389 | } | 9147 | CIW_CLR_SCSI_RESET_INT); |
10390 | return (0x80); | 9148 | AscSetChipStatus(iop_base, 0); |
10391 | } | 9149 | AscSetChipControl(iop_base, 0); |
10392 | } | 9150 | } |
10393 | return (0); | 9151 | } |
9152 | if ((scsiq->cntl & QC_NO_CALLBACK) == 0) { | ||
9153 | (*asc_isr_callback) (asc_dvc, scsiq); | ||
9154 | } else { | ||
9155 | if ((AscReadLramByte(iop_base, | ||
9156 | (ushort)(q_addr + (ushort) | ||
9157 | ASC_SCSIQ_CDB_BEG)) | ||
9158 | == START_STOP)) { | ||
9159 | asc_dvc->unit_not_ready &= ~target_id; | ||
9160 | if (scsiq->d3.done_stat != QD_NO_ERROR) { | ||
9161 | asc_dvc->start_motor &= | ||
9162 | ~target_id; | ||
9163 | } | ||
9164 | } | ||
9165 | } | ||
9166 | return (1); | ||
9167 | } else { | ||
9168 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_Q_STATUS); | ||
9169 | FATAL_ERR_QDONE: | ||
9170 | if ((scsiq->cntl & QC_NO_CALLBACK) == 0) { | ||
9171 | (*asc_isr_callback) (asc_dvc, scsiq); | ||
9172 | } | ||
9173 | return (0x80); | ||
9174 | } | ||
9175 | } | ||
9176 | return (0); | ||
10394 | } | 9177 | } |
10395 | 9178 | ||
10396 | STATIC int | 9179 | static int AscISR(ASC_DVC_VAR *asc_dvc) |
10397 | AscISR( | ||
10398 | ASC_DVC_VAR *asc_dvc | ||
10399 | ) | ||
10400 | { | 9180 | { |
10401 | ASC_CS_TYPE chipstat; | 9181 | ASC_CS_TYPE chipstat; |
10402 | PortAddr iop_base; | 9182 | PortAddr iop_base; |
10403 | ushort saved_ram_addr; | 9183 | ushort saved_ram_addr; |
10404 | uchar ctrl_reg; | 9184 | uchar ctrl_reg; |
10405 | uchar saved_ctrl_reg; | 9185 | uchar saved_ctrl_reg; |
10406 | int int_pending; | 9186 | int int_pending; |
10407 | int status; | 9187 | int status; |
10408 | uchar host_flag; | 9188 | uchar host_flag; |
10409 | 9189 | ||
10410 | iop_base = asc_dvc->iop_base; | 9190 | iop_base = asc_dvc->iop_base; |
10411 | int_pending = FALSE; | 9191 | int_pending = FALSE; |
10412 | 9192 | ||
10413 | if (AscIsIntPending(iop_base) == 0) | 9193 | if (AscIsIntPending(iop_base) == 0) { |
10414 | { | 9194 | return int_pending; |
10415 | return int_pending; | 9195 | } |
10416 | } | ||
10417 | 9196 | ||
10418 | if (((asc_dvc->init_state & ASC_INIT_STATE_END_LOAD_MC) == 0) | 9197 | if (((asc_dvc->init_state & ASC_INIT_STATE_END_LOAD_MC) == 0) |
10419 | || (asc_dvc->isr_callback == 0) | 9198 | || (asc_dvc->isr_callback == 0) |
10420 | ) { | 9199 | ) { |
10421 | return (ERR); | 9200 | return (ERR); |
10422 | } | 9201 | } |
10423 | if (asc_dvc->in_critical_cnt != 0) { | 9202 | if (asc_dvc->in_critical_cnt != 0) { |
10424 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_ISR_ON_CRITICAL); | 9203 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_ISR_ON_CRITICAL); |
10425 | return (ERR); | 9204 | return (ERR); |
10426 | } | 9205 | } |
10427 | if (asc_dvc->is_in_int) { | 9206 | if (asc_dvc->is_in_int) { |
10428 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_ISR_RE_ENTRY); | 9207 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_ISR_RE_ENTRY); |
10429 | return (ERR); | 9208 | return (ERR); |
10430 | } | 9209 | } |
10431 | asc_dvc->is_in_int = TRUE; | 9210 | asc_dvc->is_in_int = TRUE; |
10432 | ctrl_reg = AscGetChipControl(iop_base); | 9211 | ctrl_reg = AscGetChipControl(iop_base); |
10433 | saved_ctrl_reg = ctrl_reg & (~(CC_SCSI_RESET | CC_CHIP_RESET | | 9212 | saved_ctrl_reg = ctrl_reg & (~(CC_SCSI_RESET | CC_CHIP_RESET | |
10434 | CC_SINGLE_STEP | CC_DIAG | CC_TEST)); | 9213 | CC_SINGLE_STEP | CC_DIAG | CC_TEST)); |
10435 | chipstat = AscGetChipStatus(iop_base); | 9214 | chipstat = AscGetChipStatus(iop_base); |
10436 | if (chipstat & CSW_SCSI_RESET_LATCH) { | 9215 | if (chipstat & CSW_SCSI_RESET_LATCH) { |
10437 | if (!(asc_dvc->bus_type & (ASC_IS_VL | ASC_IS_EISA))) { | 9216 | if (!(asc_dvc->bus_type & (ASC_IS_VL | ASC_IS_EISA))) { |
10438 | int i = 10; | 9217 | int i = 10; |
10439 | int_pending = TRUE; | 9218 | int_pending = TRUE; |
10440 | asc_dvc->sdtr_done = 0; | 9219 | asc_dvc->sdtr_done = 0; |
10441 | saved_ctrl_reg &= (uchar) (~CC_HALT); | 9220 | saved_ctrl_reg &= (uchar)(~CC_HALT); |
10442 | while ((AscGetChipStatus(iop_base) & CSW_SCSI_RESET_ACTIVE) && | 9221 | while ((AscGetChipStatus(iop_base) & |
10443 | (i-- > 0)) | 9222 | CSW_SCSI_RESET_ACTIVE) && (i-- > 0)) { |
10444 | { | 9223 | DvcSleepMilliSecond(100); |
10445 | DvcSleepMilliSecond(100); | 9224 | } |
10446 | } | 9225 | AscSetChipControl(iop_base, (CC_CHIP_RESET | CC_HALT)); |
10447 | AscSetChipControl(iop_base, (CC_CHIP_RESET | CC_HALT)); | 9226 | AscSetChipControl(iop_base, CC_HALT); |
10448 | AscSetChipControl(iop_base, CC_HALT); | 9227 | AscSetChipStatus(iop_base, CIW_CLR_SCSI_RESET_INT); |
10449 | AscSetChipStatus(iop_base, CIW_CLR_SCSI_RESET_INT); | 9228 | AscSetChipStatus(iop_base, 0); |
10450 | AscSetChipStatus(iop_base, 0); | 9229 | chipstat = AscGetChipStatus(iop_base); |
10451 | chipstat = AscGetChipStatus(iop_base); | 9230 | } |
10452 | } | 9231 | } |
10453 | } | 9232 | saved_ram_addr = AscGetChipLramAddr(iop_base); |
10454 | saved_ram_addr = AscGetChipLramAddr(iop_base); | 9233 | host_flag = AscReadLramByte(iop_base, |
10455 | host_flag = AscReadLramByte(iop_base, | 9234 | ASCV_HOST_FLAG_B) & |
10456 | ASCV_HOST_FLAG_B) & (uchar) (~ASC_HOST_FLAG_IN_ISR); | 9235 | (uchar)(~ASC_HOST_FLAG_IN_ISR); |
10457 | AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, | 9236 | AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, |
10458 | (uchar) (host_flag | (uchar) ASC_HOST_FLAG_IN_ISR)); | 9237 | (uchar)(host_flag | (uchar)ASC_HOST_FLAG_IN_ISR)); |
10459 | if ((chipstat & CSW_INT_PENDING) | 9238 | if ((chipstat & CSW_INT_PENDING) |
10460 | || (int_pending) | 9239 | || (int_pending) |
10461 | ) { | 9240 | ) { |
10462 | AscAckInterrupt(iop_base); | 9241 | AscAckInterrupt(iop_base); |
10463 | int_pending = TRUE; | 9242 | int_pending = TRUE; |
10464 | if ((chipstat & CSW_HALTED) && | 9243 | if ((chipstat & CSW_HALTED) && (ctrl_reg & CC_SINGLE_STEP)) { |
10465 | (ctrl_reg & CC_SINGLE_STEP)) { | 9244 | if (AscIsrChipHalted(asc_dvc) == ERR) { |
10466 | if (AscIsrChipHalted(asc_dvc) == ERR) { | 9245 | goto ISR_REPORT_QDONE_FATAL_ERROR; |
10467 | goto ISR_REPORT_QDONE_FATAL_ERROR; | 9246 | } else { |
10468 | } else { | 9247 | saved_ctrl_reg &= (uchar)(~CC_HALT); |
10469 | saved_ctrl_reg &= (uchar) (~CC_HALT); | 9248 | } |
10470 | } | 9249 | } else { |
10471 | } else { | 9250 | ISR_REPORT_QDONE_FATAL_ERROR: |
10472 | ISR_REPORT_QDONE_FATAL_ERROR: | 9251 | if ((asc_dvc->dvc_cntl & ASC_CNTL_INT_MULTI_Q) != 0) { |
10473 | if ((asc_dvc->dvc_cntl & ASC_CNTL_INT_MULTI_Q) != 0) { | 9252 | while (((status = |
10474 | while (((status = AscIsrQDone(asc_dvc)) & 0x01) != 0) { | 9253 | AscIsrQDone(asc_dvc)) & 0x01) != 0) { |
10475 | } | 9254 | } |
10476 | } else { | 9255 | } else { |
10477 | do { | 9256 | do { |
10478 | if ((status = AscIsrQDone(asc_dvc)) == 1) { | 9257 | if ((status = |
10479 | break; | 9258 | AscIsrQDone(asc_dvc)) == 1) { |
10480 | } | 9259 | break; |
10481 | } while (status == 0x11); | 9260 | } |
10482 | } | 9261 | } while (status == 0x11); |
10483 | if ((status & 0x80) != 0) | 9262 | } |
10484 | int_pending = ERR; | 9263 | if ((status & 0x80) != 0) |
10485 | } | 9264 | int_pending = ERR; |
10486 | } | 9265 | } |
10487 | AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, host_flag); | 9266 | } |
10488 | AscSetChipLramAddr(iop_base, saved_ram_addr); | 9267 | AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, host_flag); |
10489 | AscSetChipControl(iop_base, saved_ctrl_reg); | 9268 | AscSetChipLramAddr(iop_base, saved_ram_addr); |
10490 | asc_dvc->is_in_int = FALSE; | 9269 | AscSetChipControl(iop_base, saved_ctrl_reg); |
10491 | return (int_pending); | 9270 | asc_dvc->is_in_int = FALSE; |
9271 | return (int_pending); | ||
10492 | } | 9272 | } |
10493 | 9273 | ||
10494 | /* Microcode buffer is kept after initialization for error recovery. */ | 9274 | /* Microcode buffer is kept after initialization for error recovery. */ |
10495 | STATIC uchar _asc_mcode_buf[] = | 9275 | static uchar _asc_mcode_buf[] = { |
10496 | { | 9276 | 0x01, 0x03, 0x01, 0x19, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
10497 | 0x01, 0x03, 0x01, 0x19, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 9277 | 0x00, 0x00, 0x00, 0x00, |
10498 | 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 9278 | 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x00, 0x00, 0x00, 0x00, |
10499 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 9279 | 0x00, 0x00, 0x00, 0x00, |
10500 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 9280 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
10501 | 0x00, 0x00, 0x00, 0x00, 0xC3, 0x12, 0x0D, 0x05, 0x01, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, | 9281 | 0x00, 0x00, 0x00, 0x00, |
10502 | 0x00, 0x00, 0x00, 0x00, 0xFF, 0x80, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 9282 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
10503 | 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, | 9283 | 0x00, 0x00, 0x00, 0x00, |
10504 | 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x88, 0x00, 0x00, 0x00, 0x00, | 9284 | 0x00, 0x00, 0x00, 0x00, 0xC3, 0x12, 0x0D, 0x05, 0x01, 0x00, 0x00, 0x00, |
10505 | 0x80, 0x73, 0x48, 0x04, 0x36, 0x00, 0x00, 0xA2, 0xC2, 0x00, 0x80, 0x73, 0x03, 0x23, 0x36, 0x40, | 9285 | 0x00, 0xFF, 0x00, 0x00, |
10506 | 0xB6, 0x00, 0x36, 0x00, 0x05, 0xD6, 0x0C, 0xD2, 0x12, 0xDA, 0x00, 0xA2, 0xC2, 0x00, 0x92, 0x80, | 9286 | 0x00, 0x00, 0x00, 0x00, 0xFF, 0x80, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, |
10507 | 0x1E, 0x98, 0x50, 0x00, 0xF5, 0x00, 0x48, 0x98, 0xDF, 0x23, 0x36, 0x60, 0xB6, 0x00, 0x92, 0x80, | 9287 | 0x00, 0x00, 0x00, 0x00, |
10508 | 0x4F, 0x00, 0xF5, 0x00, 0x48, 0x98, 0xEF, 0x23, 0x36, 0x60, 0xB6, 0x00, 0x92, 0x80, 0x80, 0x62, | 9288 | 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0xFF, |
10509 | 0x92, 0x80, 0x00, 0x46, 0x15, 0xEE, 0x13, 0xEA, 0x02, 0x01, 0x09, 0xD8, 0xCD, 0x04, 0x4D, 0x00, | 9289 | 0x00, 0x00, 0x00, 0x00, |
10510 | 0x00, 0xA3, 0xD6, 0x00, 0xA6, 0x97, 0x7F, 0x23, 0x04, 0x61, 0x84, 0x01, 0xE6, 0x84, 0xD2, 0xC1, | 9290 | 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x88, |
10511 | 0x80, 0x73, 0xCD, 0x04, 0x4D, 0x00, 0x00, 0xA3, 0xDA, 0x01, 0xA6, 0x97, 0xC6, 0x81, 0xC2, 0x88, | 9291 | 0x00, 0x00, 0x00, 0x00, |
10512 | 0x80, 0x73, 0x80, 0x77, 0x00, 0x01, 0x01, 0xA1, 0xFE, 0x00, 0x4F, 0x00, 0x84, 0x97, 0x07, 0xA6, | 9292 | 0x80, 0x73, 0x48, 0x04, 0x36, 0x00, 0x00, 0xA2, 0xC2, 0x00, 0x80, 0x73, |
10513 | 0x08, 0x01, 0x00, 0x33, 0x03, 0x00, 0xC2, 0x88, 0x03, 0x03, 0x01, 0xDE, 0xC2, 0x88, 0xCE, 0x00, | 9293 | 0x03, 0x23, 0x36, 0x40, |
10514 | 0x69, 0x60, 0xCE, 0x00, 0x02, 0x03, 0x4A, 0x60, 0x00, 0xA2, 0x78, 0x01, 0x80, 0x63, 0x07, 0xA6, | 9294 | 0xB6, 0x00, 0x36, 0x00, 0x05, 0xD6, 0x0C, 0xD2, 0x12, 0xDA, 0x00, 0xA2, |
10515 | 0x24, 0x01, 0x78, 0x81, 0x03, 0x03, 0x80, 0x63, 0xE2, 0x00, 0x07, 0xA6, 0x34, 0x01, 0x00, 0x33, | 9295 | 0xC2, 0x00, 0x92, 0x80, |
10516 | 0x04, 0x00, 0xC2, 0x88, 0x03, 0x07, 0x02, 0x01, 0x04, 0xCA, 0x0D, 0x23, 0x68, 0x98, 0x4D, 0x04, | 9296 | 0x1E, 0x98, 0x50, 0x00, 0xF5, 0x00, 0x48, 0x98, 0xDF, 0x23, 0x36, 0x60, |
10517 | 0x04, 0x85, 0x05, 0xD8, 0x0D, 0x23, 0x68, 0x98, 0xCD, 0x04, 0x15, 0x23, 0xF8, 0x88, 0xFB, 0x23, | 9297 | 0xB6, 0x00, 0x92, 0x80, |
10518 | 0x02, 0x61, 0x82, 0x01, 0x80, 0x63, 0x02, 0x03, 0x06, 0xA3, 0x62, 0x01, 0x00, 0x33, 0x0A, 0x00, | 9298 | 0x4F, 0x00, 0xF5, 0x00, 0x48, 0x98, 0xEF, 0x23, 0x36, 0x60, 0xB6, 0x00, |
10519 | 0xC2, 0x88, 0x4E, 0x00, 0x07, 0xA3, 0x6E, 0x01, 0x00, 0x33, 0x0B, 0x00, 0xC2, 0x88, 0xCD, 0x04, | 9299 | 0x92, 0x80, 0x80, 0x62, |
10520 | 0x36, 0x2D, 0x00, 0x33, 0x1A, 0x00, 0xC2, 0x88, 0x50, 0x04, 0x88, 0x81, 0x06, 0xAB, 0x82, 0x01, | 9300 | 0x92, 0x80, 0x00, 0x46, 0x15, 0xEE, 0x13, 0xEA, 0x02, 0x01, 0x09, 0xD8, |
10521 | 0x88, 0x81, 0x4E, 0x00, 0x07, 0xA3, 0x92, 0x01, 0x50, 0x00, 0x00, 0xA3, 0x3C, 0x01, 0x00, 0x05, | 9301 | 0xCD, 0x04, 0x4D, 0x00, |
10522 | 0x7C, 0x81, 0x46, 0x97, 0x02, 0x01, 0x05, 0xC6, 0x04, 0x23, 0xA0, 0x01, 0x15, 0x23, 0xA1, 0x01, | 9302 | 0x00, 0xA3, 0xD6, 0x00, 0xA6, 0x97, 0x7F, 0x23, 0x04, 0x61, 0x84, 0x01, |
10523 | 0xBE, 0x81, 0xFD, 0x23, 0x02, 0x61, 0x82, 0x01, 0x0A, 0xDA, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA0, | 9303 | 0xE6, 0x84, 0xD2, 0xC1, |
10524 | 0xB4, 0x01, 0x80, 0x63, 0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33, 0x1B, 0x00, 0xC2, 0x88, 0x06, 0x23, | 9304 | 0x80, 0x73, 0xCD, 0x04, 0x4D, 0x00, 0x00, 0xA3, 0xDA, 0x01, 0xA6, 0x97, |
10525 | 0x68, 0x98, 0xCD, 0x04, 0xE6, 0x84, 0x06, 0x01, 0x00, 0xA2, 0xD4, 0x01, 0x57, 0x60, 0x00, 0xA0, | 9305 | 0xC6, 0x81, 0xC2, 0x88, |
10526 | 0xDA, 0x01, 0xE6, 0x84, 0x80, 0x23, 0xA0, 0x01, 0xE6, 0x84, 0x80, 0x73, 0x4B, 0x00, 0x06, 0x61, | 9306 | 0x80, 0x73, 0x80, 0x77, 0x00, 0x01, 0x01, 0xA1, 0xFE, 0x00, 0x4F, 0x00, |
10527 | 0x00, 0xA2, 0x00, 0x02, 0x04, 0x01, 0x0C, 0xDE, 0x02, 0x01, 0x03, 0xCC, 0x4F, 0x00, 0x84, 0x97, | 9307 | 0x84, 0x97, 0x07, 0xA6, |
10528 | 0xFC, 0x81, 0x08, 0x23, 0x02, 0x41, 0x82, 0x01, 0x4F, 0x00, 0x62, 0x97, 0x48, 0x04, 0x84, 0x80, | 9308 | 0x08, 0x01, 0x00, 0x33, 0x03, 0x00, 0xC2, 0x88, 0x03, 0x03, 0x01, 0xDE, |
10529 | 0xF0, 0x97, 0x00, 0x46, 0x56, 0x00, 0x03, 0xC0, 0x01, 0x23, 0xE8, 0x00, 0x81, 0x73, 0x06, 0x29, | 9309 | 0xC2, 0x88, 0xCE, 0x00, |
10530 | 0x03, 0x42, 0x06, 0xE2, 0x03, 0xEE, 0x6B, 0xEB, 0x11, 0x23, 0xF8, 0x88, 0x04, 0x98, 0xF0, 0x80, | 9310 | 0x69, 0x60, 0xCE, 0x00, 0x02, 0x03, 0x4A, 0x60, 0x00, 0xA2, 0x78, 0x01, |
10531 | 0x80, 0x73, 0x80, 0x77, 0x07, 0xA4, 0x2A, 0x02, 0x7C, 0x95, 0x06, 0xA6, 0x34, 0x02, 0x03, 0xA6, | 9311 | 0x80, 0x63, 0x07, 0xA6, |
10532 | 0x4C, 0x04, 0x46, 0x82, 0x04, 0x01, 0x03, 0xD8, 0xB4, 0x98, 0x6A, 0x96, 0x46, 0x82, 0xFE, 0x95, | 9312 | 0x24, 0x01, 0x78, 0x81, 0x03, 0x03, 0x80, 0x63, 0xE2, 0x00, 0x07, 0xA6, |
10533 | 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0xB6, 0x2D, 0x02, 0xA6, 0x6C, 0x02, 0x07, 0xA6, 0x5A, 0x02, | 9313 | 0x34, 0x01, 0x00, 0x33, |
10534 | 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x62, 0x02, 0xC2, 0x88, 0x7C, 0x95, 0x48, 0x82, 0x60, 0x96, | 9314 | 0x04, 0x00, 0xC2, 0x88, 0x03, 0x07, 0x02, 0x01, 0x04, 0xCA, 0x0D, 0x23, |
10535 | 0x48, 0x82, 0x04, 0x23, 0xA0, 0x01, 0x14, 0x23, 0xA1, 0x01, 0x3C, 0x84, 0x04, 0x01, 0x0C, 0xDC, | 9315 | 0x68, 0x98, 0x4D, 0x04, |
10536 | 0xE0, 0x23, 0x25, 0x61, 0xEF, 0x00, 0x14, 0x01, 0x4F, 0x04, 0xA8, 0x01, 0x6F, 0x00, 0xA5, 0x01, | 9316 | 0x04, 0x85, 0x05, 0xD8, 0x0D, 0x23, 0x68, 0x98, 0xCD, 0x04, 0x15, 0x23, |
10537 | 0x03, 0x23, 0xA4, 0x01, 0x06, 0x23, 0x9C, 0x01, 0x24, 0x2B, 0x1C, 0x01, 0x02, 0xA6, 0xAA, 0x02, | 9317 | 0xF8, 0x88, 0xFB, 0x23, |
10538 | 0x07, 0xA6, 0x5A, 0x02, 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x20, 0x04, 0x01, 0xA6, 0xB4, 0x02, | 9318 | 0x02, 0x61, 0x82, 0x01, 0x80, 0x63, 0x02, 0x03, 0x06, 0xA3, 0x62, 0x01, |
10539 | 0x00, 0xA6, 0xB4, 0x02, 0x00, 0x33, 0x12, 0x00, 0xC2, 0x88, 0x00, 0x0E, 0x80, 0x63, 0x00, 0x43, | 9319 | 0x00, 0x33, 0x0A, 0x00, |
10540 | 0x00, 0xA0, 0x8C, 0x02, 0x4D, 0x04, 0x04, 0x01, 0x0B, 0xDC, 0xE7, 0x23, 0x04, 0x61, 0x84, 0x01, | 9320 | 0xC2, 0x88, 0x4E, 0x00, 0x07, 0xA3, 0x6E, 0x01, 0x00, 0x33, 0x0B, 0x00, |
10541 | 0x10, 0x31, 0x12, 0x35, 0x14, 0x01, 0xEC, 0x00, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, 0xEA, 0x82, | 9321 | 0xC2, 0x88, 0xCD, 0x04, |
10542 | 0x18, 0x23, 0x04, 0x61, 0x18, 0xA0, 0xE2, 0x02, 0x04, 0x01, 0xA2, 0xC8, 0x00, 0x33, 0x1F, 0x00, | 9322 | 0x36, 0x2D, 0x00, 0x33, 0x1A, 0x00, 0xC2, 0x88, 0x50, 0x04, 0x88, 0x81, |
10543 | 0xC2, 0x88, 0x08, 0x31, 0x0A, 0x35, 0x0C, 0x39, 0x0E, 0x3D, 0x7E, 0x98, 0xB6, 0x2D, 0x01, 0xA6, | 9323 | 0x06, 0xAB, 0x82, 0x01, |
10544 | 0x14, 0x03, 0x00, 0xA6, 0x14, 0x03, 0x07, 0xA6, 0x0C, 0x03, 0x06, 0xA6, 0x10, 0x03, 0x03, 0xA6, | 9324 | 0x88, 0x81, 0x4E, 0x00, 0x07, 0xA3, 0x92, 0x01, 0x50, 0x00, 0x00, 0xA3, |
10545 | 0x20, 0x04, 0x02, 0xA6, 0x6C, 0x02, 0x00, 0x33, 0x33, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0xEE, 0x82, | 9325 | 0x3C, 0x01, 0x00, 0x05, |
10546 | 0x60, 0x96, 0xEE, 0x82, 0x82, 0x98, 0x80, 0x42, 0x7E, 0x98, 0x64, 0xE4, 0x04, 0x01, 0x2D, 0xC8, | 9326 | 0x7C, 0x81, 0x46, 0x97, 0x02, 0x01, 0x05, 0xC6, 0x04, 0x23, 0xA0, 0x01, |
10547 | 0x31, 0x05, 0x07, 0x01, 0x00, 0xA2, 0x54, 0x03, 0x00, 0x43, 0x87, 0x01, 0x05, 0x05, 0x86, 0x98, | 9327 | 0x15, 0x23, 0xA1, 0x01, |
10548 | 0x7E, 0x98, 0x00, 0xA6, 0x16, 0x03, 0x07, 0xA6, 0x4C, 0x03, 0x03, 0xA6, 0x3C, 0x04, 0x06, 0xA6, | 9328 | 0xBE, 0x81, 0xFD, 0x23, 0x02, 0x61, 0x82, 0x01, 0x0A, 0xDA, 0x4A, 0x00, |
10549 | 0x50, 0x03, 0x01, 0xA6, 0x16, 0x03, 0x00, 0x33, 0x25, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0x32, 0x83, | 9329 | 0x06, 0x61, 0x00, 0xA0, |
10550 | 0x60, 0x96, 0x32, 0x83, 0x04, 0x01, 0x10, 0xCE, 0x07, 0xC8, 0x05, 0x05, 0xEB, 0x04, 0x00, 0x33, | 9330 | 0xB4, 0x01, 0x80, 0x63, 0xCD, 0x04, 0x36, 0x2D, 0x00, 0x33, 0x1B, 0x00, |
10551 | 0x00, 0x20, 0xC0, 0x20, 0x81, 0x62, 0x72, 0x83, 0x00, 0x01, 0x05, 0x05, 0xFF, 0xA2, 0x7A, 0x03, | 9331 | 0xC2, 0x88, 0x06, 0x23, |
10552 | 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x2E, 0x83, 0x05, 0x05, 0x15, 0x01, 0x00, 0xA2, 0x9A, 0x03, | 9332 | 0x68, 0x98, 0xCD, 0x04, 0xE6, 0x84, 0x06, 0x01, 0x00, 0xA2, 0xD4, 0x01, |
10553 | 0xEC, 0x00, 0x6E, 0x00, 0x95, 0x01, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, 0x01, 0xA6, 0x96, 0x03, | 9333 | 0x57, 0x60, 0x00, 0xA0, |
10554 | 0x00, 0xA6, 0x96, 0x03, 0x10, 0x84, 0x80, 0x42, 0x7E, 0x98, 0x01, 0xA6, 0xA4, 0x03, 0x00, 0xA6, | 9334 | 0xDA, 0x01, 0xE6, 0x84, 0x80, 0x23, 0xA0, 0x01, 0xE6, 0x84, 0x80, 0x73, |
10555 | 0xBC, 0x03, 0x10, 0x84, 0xA8, 0x98, 0x80, 0x42, 0x01, 0xA6, 0xA4, 0x03, 0x07, 0xA6, 0xB2, 0x03, | 9335 | 0x4B, 0x00, 0x06, 0x61, |
10556 | 0xD4, 0x83, 0x7C, 0x95, 0xA8, 0x83, 0x00, 0x33, 0x2F, 0x00, 0xC2, 0x88, 0xA8, 0x98, 0x80, 0x42, | 9336 | 0x00, 0xA2, 0x00, 0x02, 0x04, 0x01, 0x0C, 0xDE, 0x02, 0x01, 0x03, 0xCC, |
10557 | 0x00, 0xA6, 0xBC, 0x03, 0x07, 0xA6, 0xCA, 0x03, 0xD4, 0x83, 0x7C, 0x95, 0xC0, 0x83, 0x00, 0x33, | 9337 | 0x4F, 0x00, 0x84, 0x97, |
10558 | 0x26, 0x00, 0xC2, 0x88, 0x38, 0x2B, 0x80, 0x32, 0x80, 0x36, 0x04, 0x23, 0xA0, 0x01, 0x12, 0x23, | 9338 | 0xFC, 0x81, 0x08, 0x23, 0x02, 0x41, 0x82, 0x01, 0x4F, 0x00, 0x62, 0x97, |
10559 | 0xA1, 0x01, 0x10, 0x84, 0x07, 0xF0, 0x06, 0xA4, 0xF4, 0x03, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23, | 9339 | 0x48, 0x04, 0x84, 0x80, |
10560 | 0x83, 0x03, 0x80, 0x63, 0x03, 0xA6, 0x0E, 0x04, 0x07, 0xA6, 0x06, 0x04, 0x06, 0xA6, 0x0A, 0x04, | 9340 | 0xF0, 0x97, 0x00, 0x46, 0x56, 0x00, 0x03, 0xC0, 0x01, 0x23, 0xE8, 0x00, |
10561 | 0x00, 0x33, 0x17, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0xF4, 0x83, 0x60, 0x96, 0xF4, 0x83, 0x20, 0x84, | 9341 | 0x81, 0x73, 0x06, 0x29, |
10562 | 0x07, 0xF0, 0x06, 0xA4, 0x20, 0x04, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23, 0x83, 0x03, 0x80, 0x63, | 9342 | 0x03, 0x42, 0x06, 0xE2, 0x03, 0xEE, 0x6B, 0xEB, 0x11, 0x23, 0xF8, 0x88, |
10563 | 0xB6, 0x2D, 0x03, 0xA6, 0x3C, 0x04, 0x07, 0xA6, 0x34, 0x04, 0x06, 0xA6, 0x38, 0x04, 0x00, 0x33, | 9343 | 0x04, 0x98, 0xF0, 0x80, |
10564 | 0x30, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0x20, 0x84, 0x60, 0x96, 0x20, 0x84, 0x1D, 0x01, 0x06, 0xCC, | 9344 | 0x80, 0x73, 0x80, 0x77, 0x07, 0xA4, 0x2A, 0x02, 0x7C, 0x95, 0x06, 0xA6, |
10565 | 0x00, 0x33, 0x00, 0x84, 0xC0, 0x20, 0x00, 0x23, 0xEA, 0x00, 0x81, 0x62, 0xA2, 0x0D, 0x80, 0x63, | 9345 | 0x34, 0x02, 0x03, 0xA6, |
10566 | 0x07, 0xA6, 0x5A, 0x04, 0x00, 0x33, 0x18, 0x00, 0xC2, 0x88, 0x03, 0x03, 0x80, 0x63, 0xA3, 0x01, | 9346 | 0x4C, 0x04, 0x46, 0x82, 0x04, 0x01, 0x03, 0xD8, 0xB4, 0x98, 0x6A, 0x96, |
10567 | 0x07, 0xA4, 0x64, 0x04, 0x23, 0x01, 0x00, 0xA2, 0x86, 0x04, 0x0A, 0xA0, 0x76, 0x04, 0xE0, 0x00, | 9347 | 0x46, 0x82, 0xFE, 0x95, |
10568 | 0x00, 0x33, 0x1D, 0x00, 0xC2, 0x88, 0x0B, 0xA0, 0x82, 0x04, 0xE0, 0x00, 0x00, 0x33, 0x1E, 0x00, | 9348 | 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0xB6, 0x2D, 0x02, 0xA6, 0x6C, 0x02, |
10569 | 0xC2, 0x88, 0x42, 0x23, 0xF8, 0x88, 0x00, 0x23, 0x22, 0xA3, 0xE6, 0x04, 0x08, 0x23, 0x22, 0xA3, | 9349 | 0x07, 0xA6, 0x5A, 0x02, |
10570 | 0xA2, 0x04, 0x28, 0x23, 0x22, 0xA3, 0xAE, 0x04, 0x02, 0x23, 0x22, 0xA3, 0xC4, 0x04, 0x42, 0x23, | 9350 | 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x62, 0x02, 0xC2, 0x88, 0x7C, 0x95, |
10571 | 0xF8, 0x88, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA0, 0xAE, 0x04, 0x45, 0x23, 0xF8, 0x88, 0x04, 0x98, | 9351 | 0x48, 0x82, 0x60, 0x96, |
10572 | 0x00, 0xA2, 0xC0, 0x04, 0xB4, 0x98, 0x00, 0x33, 0x00, 0x82, 0xC0, 0x20, 0x81, 0x62, 0xE8, 0x81, | 9352 | 0x48, 0x82, 0x04, 0x23, 0xA0, 0x01, 0x14, 0x23, 0xA1, 0x01, 0x3C, 0x84, |
10573 | 0x47, 0x23, 0xF8, 0x88, 0x04, 0x01, 0x0B, 0xDE, 0x04, 0x98, 0xB4, 0x98, 0x00, 0x33, 0x00, 0x81, | 9353 | 0x04, 0x01, 0x0C, 0xDC, |
10574 | 0xC0, 0x20, 0x81, 0x62, 0x14, 0x01, 0x00, 0xA0, 0x00, 0x02, 0x43, 0x23, 0xF8, 0x88, 0x04, 0x23, | 9354 | 0xE0, 0x23, 0x25, 0x61, 0xEF, 0x00, 0x14, 0x01, 0x4F, 0x04, 0xA8, 0x01, |
10575 | 0xA0, 0x01, 0x44, 0x23, 0xA1, 0x01, 0x80, 0x73, 0x4D, 0x00, 0x03, 0xA3, 0xF4, 0x04, 0x00, 0x33, | 9355 | 0x6F, 0x00, 0xA5, 0x01, |
10576 | 0x27, 0x00, 0xC2, 0x88, 0x04, 0x01, 0x04, 0xDC, 0x02, 0x23, 0xA2, 0x01, 0x04, 0x23, 0xA0, 0x01, | 9356 | 0x03, 0x23, 0xA4, 0x01, 0x06, 0x23, 0x9C, 0x01, 0x24, 0x2B, 0x1C, 0x01, |
10577 | 0x04, 0x98, 0x26, 0x95, 0x4B, 0x00, 0xF6, 0x00, 0x4F, 0x04, 0x4F, 0x00, 0x00, 0xA3, 0x22, 0x05, | 9357 | 0x02, 0xA6, 0xAA, 0x02, |
10578 | 0x00, 0x05, 0x76, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x1C, 0x05, 0x0A, 0x85, 0x46, 0x97, 0xCD, 0x04, | 9358 | 0x07, 0xA6, 0x5A, 0x02, 0x06, 0xA6, 0x5E, 0x02, 0x03, 0xA6, 0x20, 0x04, |
10579 | 0x24, 0x85, 0x48, 0x04, 0x84, 0x80, 0x02, 0x01, 0x03, 0xDA, 0x80, 0x23, 0x82, 0x01, 0x34, 0x85, | 9359 | 0x01, 0xA6, 0xB4, 0x02, |
10580 | 0x02, 0x23, 0xA0, 0x01, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x40, 0x05, 0x1D, 0x01, 0x04, 0xD6, | 9360 | 0x00, 0xA6, 0xB4, 0x02, 0x00, 0x33, 0x12, 0x00, 0xC2, 0x88, 0x00, 0x0E, |
10581 | 0xFF, 0x23, 0x86, 0x41, 0x4B, 0x60, 0xCB, 0x00, 0xFF, 0x23, 0x80, 0x01, 0x49, 0x00, 0x81, 0x01, | 9361 | 0x80, 0x63, 0x00, 0x43, |
10582 | 0x04, 0x01, 0x02, 0xC8, 0x30, 0x01, 0x80, 0x01, 0xF7, 0x04, 0x03, 0x01, 0x49, 0x04, 0x80, 0x01, | 9362 | 0x00, 0xA0, 0x8C, 0x02, 0x4D, 0x04, 0x04, 0x01, 0x0B, 0xDC, 0xE7, 0x23, |
10583 | 0xC9, 0x00, 0x00, 0x05, 0x00, 0x01, 0xFF, 0xA0, 0x60, 0x05, 0x77, 0x04, 0x01, 0x23, 0xEA, 0x00, | 9363 | 0x04, 0x61, 0x84, 0x01, |
10584 | 0x5D, 0x00, 0xFE, 0xC7, 0x00, 0x62, 0x00, 0x23, 0xEA, 0x00, 0x00, 0x63, 0x07, 0xA4, 0xF8, 0x05, | 9364 | 0x10, 0x31, 0x12, 0x35, 0x14, 0x01, 0xEC, 0x00, 0x6C, 0x38, 0x00, 0x3F, |
10585 | 0x03, 0x03, 0x02, 0xA0, 0x8E, 0x05, 0xF4, 0x85, 0x00, 0x33, 0x2D, 0x00, 0xC2, 0x88, 0x04, 0xA0, | 9365 | 0x00, 0x00, 0xEA, 0x82, |
10586 | 0xB8, 0x05, 0x80, 0x63, 0x00, 0x23, 0xDF, 0x00, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0xA4, 0x05, | 9366 | 0x18, 0x23, 0x04, 0x61, 0x18, 0xA0, 0xE2, 0x02, 0x04, 0x01, 0xA2, 0xC8, |
10587 | 0x1D, 0x01, 0x06, 0xD6, 0x02, 0x23, 0x02, 0x41, 0x82, 0x01, 0x50, 0x00, 0x62, 0x97, 0x04, 0x85, | 9367 | 0x00, 0x33, 0x1F, 0x00, |
10588 | 0x04, 0x23, 0x02, 0x41, 0x82, 0x01, 0x04, 0x85, 0x08, 0xA0, 0xBE, 0x05, 0xF4, 0x85, 0x03, 0xA0, | 9368 | 0xC2, 0x88, 0x08, 0x31, 0x0A, 0x35, 0x0C, 0x39, 0x0E, 0x3D, 0x7E, 0x98, |
10589 | 0xC4, 0x05, 0xF4, 0x85, 0x01, 0xA0, 0xCE, 0x05, 0x88, 0x00, 0x80, 0x63, 0xCC, 0x86, 0x07, 0xA0, | 9369 | 0xB6, 0x2D, 0x01, 0xA6, |
10590 | 0xEE, 0x05, 0x5F, 0x00, 0x00, 0x2B, 0xDF, 0x08, 0x00, 0xA2, 0xE6, 0x05, 0x80, 0x67, 0x80, 0x63, | 9370 | 0x14, 0x03, 0x00, 0xA6, 0x14, 0x03, 0x07, 0xA6, 0x0C, 0x03, 0x06, 0xA6, |
10591 | 0x01, 0xA2, 0x7A, 0x06, 0x7C, 0x85, 0x06, 0x23, 0x68, 0x98, 0x48, 0x23, 0xF8, 0x88, 0x07, 0x23, | 9371 | 0x10, 0x03, 0x03, 0xA6, |
10592 | 0x80, 0x00, 0x06, 0x87, 0x80, 0x63, 0x7C, 0x85, 0x00, 0x23, 0xDF, 0x00, 0x00, 0x63, 0x4A, 0x00, | 9372 | 0x20, 0x04, 0x02, 0xA6, 0x6C, 0x02, 0x00, 0x33, 0x33, 0x00, 0xC2, 0x88, |
10593 | 0x06, 0x61, 0x00, 0xA2, 0x36, 0x06, 0x1D, 0x01, 0x16, 0xD4, 0xC0, 0x23, 0x07, 0x41, 0x83, 0x03, | 9373 | 0x7C, 0x95, 0xEE, 0x82, |
10594 | 0x80, 0x63, 0x06, 0xA6, 0x1C, 0x06, 0x00, 0x33, 0x37, 0x00, 0xC2, 0x88, 0x1D, 0x01, 0x01, 0xD6, | 9374 | 0x60, 0x96, 0xEE, 0x82, 0x82, 0x98, 0x80, 0x42, 0x7E, 0x98, 0x64, 0xE4, |
10595 | 0x20, 0x23, 0x63, 0x60, 0x83, 0x03, 0x80, 0x63, 0x02, 0x23, 0xDF, 0x00, 0x07, 0xA6, 0x7C, 0x05, | 9375 | 0x04, 0x01, 0x2D, 0xC8, |
10596 | 0xEF, 0x04, 0x6F, 0x00, 0x00, 0x63, 0x4B, 0x00, 0x06, 0x41, 0xCB, 0x00, 0x52, 0x00, 0x06, 0x61, | 9376 | 0x31, 0x05, 0x07, 0x01, 0x00, 0xA2, 0x54, 0x03, 0x00, 0x43, 0x87, 0x01, |
10597 | 0x00, 0xA2, 0x4E, 0x06, 0x1D, 0x01, 0x03, 0xCA, 0xC0, 0x23, 0x07, 0x41, 0x00, 0x63, 0x1D, 0x01, | 9377 | 0x05, 0x05, 0x86, 0x98, |
10598 | 0x04, 0xCC, 0x00, 0x33, 0x00, 0x83, 0xC0, 0x20, 0x81, 0x62, 0x80, 0x23, 0x07, 0x41, 0x00, 0x63, | 9378 | 0x7E, 0x98, 0x00, 0xA6, 0x16, 0x03, 0x07, 0xA6, 0x4C, 0x03, 0x03, 0xA6, |
10599 | 0x80, 0x67, 0x08, 0x23, 0x83, 0x03, 0x80, 0x63, 0x00, 0x63, 0x01, 0x23, 0xDF, 0x00, 0x06, 0xA6, | 9379 | 0x3C, 0x04, 0x06, 0xA6, |
10600 | 0x84, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67, 0x80, 0x63, 0x00, 0x33, 0x00, 0x40, 0xC0, 0x20, | 9380 | 0x50, 0x03, 0x01, 0xA6, 0x16, 0x03, 0x00, 0x33, 0x25, 0x00, 0xC2, 0x88, |
10601 | 0x81, 0x62, 0x00, 0x63, 0x00, 0x00, 0xFE, 0x95, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, 0x94, 0x06, | 9381 | 0x7C, 0x95, 0x32, 0x83, |
10602 | 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x00, 0x01, 0xA0, 0x14, 0x07, 0x00, 0x2B, 0x40, 0x0E, 0x80, 0x63, | 9382 | 0x60, 0x96, 0x32, 0x83, 0x04, 0x01, 0x10, 0xCE, 0x07, 0xC8, 0x05, 0x05, |
10603 | 0x01, 0x00, 0x06, 0xA6, 0xAA, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x40, 0x0E, 0x80, 0x63, 0x00, 0x43, | 9383 | 0xEB, 0x04, 0x00, 0x33, |
10604 | 0x00, 0xA0, 0xA2, 0x06, 0x06, 0xA6, 0xBC, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67, 0x40, 0x0E, | 9384 | 0x00, 0x20, 0xC0, 0x20, 0x81, 0x62, 0x72, 0x83, 0x00, 0x01, 0x05, 0x05, |
10605 | 0x80, 0x63, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x23, 0xDF, 0x00, 0x00, 0x63, 0x07, 0xA6, 0xD6, 0x06, | 9385 | 0xFF, 0xA2, 0x7A, 0x03, |
10606 | 0x00, 0x33, 0x2A, 0x00, 0xC2, 0x88, 0x03, 0x03, 0x80, 0x63, 0x89, 0x00, 0x0A, 0x2B, 0x07, 0xA6, | 9386 | 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x2E, 0x83, 0x05, 0x05, 0x15, 0x01, |
10607 | 0xE8, 0x06, 0x00, 0x33, 0x29, 0x00, 0xC2, 0x88, 0x00, 0x43, 0x00, 0xA2, 0xF4, 0x06, 0xC0, 0x0E, | 9387 | 0x00, 0xA2, 0x9A, 0x03, |
10608 | 0x80, 0x63, 0xDE, 0x86, 0xC0, 0x0E, 0x00, 0x33, 0x00, 0x80, 0xC0, 0x20, 0x81, 0x62, 0x04, 0x01, | 9388 | 0xEC, 0x00, 0x6E, 0x00, 0x95, 0x01, 0x6C, 0x38, 0x00, 0x3F, 0x00, 0x00, |
10609 | 0x02, 0xDA, 0x80, 0x63, 0x7C, 0x85, 0x80, 0x7B, 0x80, 0x63, 0x06, 0xA6, 0x8C, 0x06, 0x00, 0x33, | 9389 | 0x01, 0xA6, 0x96, 0x03, |
10610 | 0x2C, 0x00, 0xC2, 0x88, 0x0C, 0xA2, 0x2E, 0x07, 0xFE, 0x95, 0x83, 0x03, 0x80, 0x63, 0x06, 0xA6, | 9390 | 0x00, 0xA6, 0x96, 0x03, 0x10, 0x84, 0x80, 0x42, 0x7E, 0x98, 0x01, 0xA6, |
10611 | 0x2C, 0x07, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x33, 0x3D, 0x00, 0xC2, 0x88, 0x00, 0x00, 0x80, 0x67, | 9391 | 0xA4, 0x03, 0x00, 0xA6, |
10612 | 0x83, 0x03, 0x80, 0x63, 0x0C, 0xA0, 0x44, 0x07, 0x07, 0xA6, 0x7C, 0x05, 0xBF, 0x23, 0x04, 0x61, | 9392 | 0xBC, 0x03, 0x10, 0x84, 0xA8, 0x98, 0x80, 0x42, 0x01, 0xA6, 0xA4, 0x03, |
10613 | 0x84, 0x01, 0xE6, 0x84, 0x00, 0x63, 0xF0, 0x04, 0x01, 0x01, 0xF1, 0x00, 0x00, 0x01, 0xF2, 0x00, | 9393 | 0x07, 0xA6, 0xB2, 0x03, |
10614 | 0x01, 0x05, 0x80, 0x01, 0x72, 0x04, 0x71, 0x00, 0x81, 0x01, 0x70, 0x04, 0x80, 0x05, 0x81, 0x05, | 9394 | 0xD4, 0x83, 0x7C, 0x95, 0xA8, 0x83, 0x00, 0x33, 0x2F, 0x00, 0xC2, 0x88, |
10615 | 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x01, 0x01, 0xF1, 0x00, 0x70, 0x00, 0x81, 0x01, | 9395 | 0xA8, 0x98, 0x80, 0x42, |
10616 | 0x70, 0x04, 0x71, 0x00, 0x81, 0x01, 0x72, 0x00, 0x80, 0x01, 0x71, 0x04, 0x70, 0x00, 0x80, 0x01, | 9396 | 0x00, 0xA6, 0xBC, 0x03, 0x07, 0xA6, 0xCA, 0x03, 0xD4, 0x83, 0x7C, 0x95, |
10617 | 0x70, 0x04, 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x00, 0x01, 0xF1, 0x00, 0x70, 0x00, | 9397 | 0xC0, 0x83, 0x00, 0x33, |
10618 | 0x80, 0x01, 0x70, 0x04, 0x71, 0x00, 0x80, 0x01, 0x72, 0x00, 0x81, 0x01, 0x71, 0x04, 0x70, 0x00, | 9398 | 0x26, 0x00, 0xC2, 0x88, 0x38, 0x2B, 0x80, 0x32, 0x80, 0x36, 0x04, 0x23, |
10619 | 0x81, 0x01, 0x70, 0x04, 0x00, 0x63, 0x00, 0x23, 0xB3, 0x01, 0x83, 0x05, 0xA3, 0x01, 0xA2, 0x01, | 9399 | 0xA0, 0x01, 0x12, 0x23, |
10620 | 0xA1, 0x01, 0x01, 0x23, 0xA0, 0x01, 0x00, 0x01, 0xC8, 0x00, 0x03, 0xA1, 0xC4, 0x07, 0x00, 0x33, | 9400 | 0xA1, 0x01, 0x10, 0x84, 0x07, 0xF0, 0x06, 0xA4, 0xF4, 0x03, 0x80, 0x6B, |
10621 | 0x07, 0x00, 0xC2, 0x88, 0x80, 0x05, 0x81, 0x05, 0x04, 0x01, 0x11, 0xC8, 0x48, 0x00, 0xB0, 0x01, | 9401 | 0x80, 0x67, 0x05, 0x23, |
10622 | 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x05, 0x01, 0x48, 0x04, 0x00, 0x43, 0x00, 0xA2, 0xE4, 0x07, | 9402 | 0x83, 0x03, 0x80, 0x63, 0x03, 0xA6, 0x0E, 0x04, 0x07, 0xA6, 0x06, 0x04, |
10623 | 0x00, 0x05, 0xDA, 0x87, 0x00, 0x01, 0xC8, 0x00, 0xFF, 0x23, 0x80, 0x01, 0x05, 0x05, 0x00, 0x63, | 9403 | 0x06, 0xA6, 0x0A, 0x04, |
10624 | 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00, 0x02, 0x80, 0x43, 0x76, 0x08, 0x80, 0x02, | 9404 | 0x00, 0x33, 0x17, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0xF4, 0x83, 0x60, 0x96, |
10625 | 0x77, 0x04, 0x00, 0x63, 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00, 0x02, 0x00, 0xA0, | 9405 | 0xF4, 0x83, 0x20, 0x84, |
10626 | 0x14, 0x08, 0x16, 0x88, 0x00, 0x43, 0x76, 0x08, 0x80, 0x02, 0x77, 0x04, 0x00, 0x63, 0xF3, 0x04, | 9406 | 0x07, 0xF0, 0x06, 0xA4, 0x20, 0x04, 0x80, 0x6B, 0x80, 0x67, 0x05, 0x23, |
10627 | 0x00, 0x23, 0xF4, 0x00, 0x74, 0x00, 0x80, 0x43, 0xF4, 0x00, 0xCF, 0x40, 0x00, 0xA2, 0x44, 0x08, | 9407 | 0x83, 0x03, 0x80, 0x63, |
10628 | 0x74, 0x04, 0x02, 0x01, 0xF7, 0xC9, 0xF6, 0xD9, 0x00, 0x01, 0x01, 0xA1, 0x24, 0x08, 0x04, 0x98, | 9408 | 0xB6, 0x2D, 0x03, 0xA6, 0x3C, 0x04, 0x07, 0xA6, 0x34, 0x04, 0x06, 0xA6, |
10629 | 0x26, 0x95, 0x24, 0x88, 0x73, 0x04, 0x00, 0x63, 0xF3, 0x04, 0x75, 0x04, 0x5A, 0x88, 0x02, 0x01, | 9409 | 0x38, 0x04, 0x00, 0x33, |
10630 | 0x04, 0xD8, 0x46, 0x97, 0x04, 0x98, 0x26, 0x95, 0x4A, 0x88, 0x75, 0x00, 0x00, 0xA3, 0x64, 0x08, | 9410 | 0x30, 0x00, 0xC2, 0x88, 0x7C, 0x95, 0x20, 0x84, 0x60, 0x96, 0x20, 0x84, |
10631 | 0x00, 0x05, 0x4E, 0x88, 0x73, 0x04, 0x00, 0x63, 0x80, 0x7B, 0x80, 0x63, 0x06, 0xA6, 0x76, 0x08, | 9411 | 0x1D, 0x01, 0x06, 0xCC, |
10632 | 0x00, 0x33, 0x3E, 0x00, 0xC2, 0x88, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, 0x00, 0x63, 0x38, 0x2B, | 9412 | 0x00, 0x33, 0x00, 0x84, 0xC0, 0x20, 0x00, 0x23, 0xEA, 0x00, 0x81, 0x62, |
10633 | 0x9C, 0x88, 0x38, 0x2B, 0x92, 0x88, 0x32, 0x09, 0x31, 0x05, 0x92, 0x98, 0x05, 0x05, 0xB2, 0x09, | 9413 | 0xA2, 0x0D, 0x80, 0x63, |
10634 | 0x00, 0x63, 0x00, 0x32, 0x00, 0x36, 0x00, 0x3A, 0x00, 0x3E, 0x00, 0x63, 0x80, 0x32, 0x80, 0x36, | 9414 | 0x07, 0xA6, 0x5A, 0x04, 0x00, 0x33, 0x18, 0x00, 0xC2, 0x88, 0x03, 0x03, |
10635 | 0x80, 0x3A, 0x80, 0x3E, 0xB4, 0x3D, 0x00, 0x63, 0x38, 0x2B, 0x40, 0x32, 0x40, 0x36, 0x40, 0x3A, | 9415 | 0x80, 0x63, 0xA3, 0x01, |
10636 | 0x40, 0x3E, 0x00, 0x63, 0x5A, 0x20, 0xC9, 0x40, 0x00, 0xA0, 0xB4, 0x08, 0x5D, 0x00, 0xFE, 0xC3, | 9416 | 0x07, 0xA4, 0x64, 0x04, 0x23, 0x01, 0x00, 0xA2, 0x86, 0x04, 0x0A, 0xA0, |
10637 | 0x00, 0x63, 0x80, 0x73, 0xE6, 0x20, 0x02, 0x23, 0xE8, 0x00, 0x82, 0x73, 0xFF, 0xFD, 0x80, 0x73, | 9417 | 0x76, 0x04, 0xE0, 0x00, |
10638 | 0x13, 0x23, 0xF8, 0x88, 0x66, 0x20, 0xC0, 0x20, 0x04, 0x23, 0xA0, 0x01, 0xA1, 0x23, 0xA1, 0x01, | 9418 | 0x00, 0x33, 0x1D, 0x00, 0xC2, 0x88, 0x0B, 0xA0, 0x82, 0x04, 0xE0, 0x00, |
10639 | 0x81, 0x62, 0xE2, 0x88, 0x80, 0x73, 0x80, 0x77, 0x68, 0x00, 0x00, 0xA2, 0x80, 0x00, 0x03, 0xC2, | 9419 | 0x00, 0x33, 0x1E, 0x00, |
10640 | 0xF1, 0xC7, 0x41, 0x23, 0xF8, 0x88, 0x11, 0x23, 0xA1, 0x01, 0x04, 0x23, 0xA0, 0x01, 0xE6, 0x84, | 9420 | 0xC2, 0x88, 0x42, 0x23, 0xF8, 0x88, 0x00, 0x23, 0x22, 0xA3, 0xE6, 0x04, |
9421 | 0x08, 0x23, 0x22, 0xA3, | ||
9422 | 0xA2, 0x04, 0x28, 0x23, 0x22, 0xA3, 0xAE, 0x04, 0x02, 0x23, 0x22, 0xA3, | ||
9423 | 0xC4, 0x04, 0x42, 0x23, | ||
9424 | 0xF8, 0x88, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA0, 0xAE, 0x04, 0x45, 0x23, | ||
9425 | 0xF8, 0x88, 0x04, 0x98, | ||
9426 | 0x00, 0xA2, 0xC0, 0x04, 0xB4, 0x98, 0x00, 0x33, 0x00, 0x82, 0xC0, 0x20, | ||
9427 | 0x81, 0x62, 0xE8, 0x81, | ||
9428 | 0x47, 0x23, 0xF8, 0x88, 0x04, 0x01, 0x0B, 0xDE, 0x04, 0x98, 0xB4, 0x98, | ||
9429 | 0x00, 0x33, 0x00, 0x81, | ||
9430 | 0xC0, 0x20, 0x81, 0x62, 0x14, 0x01, 0x00, 0xA0, 0x00, 0x02, 0x43, 0x23, | ||
9431 | 0xF8, 0x88, 0x04, 0x23, | ||
9432 | 0xA0, 0x01, 0x44, 0x23, 0xA1, 0x01, 0x80, 0x73, 0x4D, 0x00, 0x03, 0xA3, | ||
9433 | 0xF4, 0x04, 0x00, 0x33, | ||
9434 | 0x27, 0x00, 0xC2, 0x88, 0x04, 0x01, 0x04, 0xDC, 0x02, 0x23, 0xA2, 0x01, | ||
9435 | 0x04, 0x23, 0xA0, 0x01, | ||
9436 | 0x04, 0x98, 0x26, 0x95, 0x4B, 0x00, 0xF6, 0x00, 0x4F, 0x04, 0x4F, 0x00, | ||
9437 | 0x00, 0xA3, 0x22, 0x05, | ||
9438 | 0x00, 0x05, 0x76, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x1C, 0x05, 0x0A, 0x85, | ||
9439 | 0x46, 0x97, 0xCD, 0x04, | ||
9440 | 0x24, 0x85, 0x48, 0x04, 0x84, 0x80, 0x02, 0x01, 0x03, 0xDA, 0x80, 0x23, | ||
9441 | 0x82, 0x01, 0x34, 0x85, | ||
9442 | 0x02, 0x23, 0xA0, 0x01, 0x4A, 0x00, 0x06, 0x61, 0x00, 0xA2, 0x40, 0x05, | ||
9443 | 0x1D, 0x01, 0x04, 0xD6, | ||
9444 | 0xFF, 0x23, 0x86, 0x41, 0x4B, 0x60, 0xCB, 0x00, 0xFF, 0x23, 0x80, 0x01, | ||
9445 | 0x49, 0x00, 0x81, 0x01, | ||
9446 | 0x04, 0x01, 0x02, 0xC8, 0x30, 0x01, 0x80, 0x01, 0xF7, 0x04, 0x03, 0x01, | ||
9447 | 0x49, 0x04, 0x80, 0x01, | ||
9448 | 0xC9, 0x00, 0x00, 0x05, 0x00, 0x01, 0xFF, 0xA0, 0x60, 0x05, 0x77, 0x04, | ||
9449 | 0x01, 0x23, 0xEA, 0x00, | ||
9450 | 0x5D, 0x00, 0xFE, 0xC7, 0x00, 0x62, 0x00, 0x23, 0xEA, 0x00, 0x00, 0x63, | ||
9451 | 0x07, 0xA4, 0xF8, 0x05, | ||
9452 | 0x03, 0x03, 0x02, 0xA0, 0x8E, 0x05, 0xF4, 0x85, 0x00, 0x33, 0x2D, 0x00, | ||
9453 | 0xC2, 0x88, 0x04, 0xA0, | ||
9454 | 0xB8, 0x05, 0x80, 0x63, 0x00, 0x23, 0xDF, 0x00, 0x4A, 0x00, 0x06, 0x61, | ||
9455 | 0x00, 0xA2, 0xA4, 0x05, | ||
9456 | 0x1D, 0x01, 0x06, 0xD6, 0x02, 0x23, 0x02, 0x41, 0x82, 0x01, 0x50, 0x00, | ||
9457 | 0x62, 0x97, 0x04, 0x85, | ||
9458 | 0x04, 0x23, 0x02, 0x41, 0x82, 0x01, 0x04, 0x85, 0x08, 0xA0, 0xBE, 0x05, | ||
9459 | 0xF4, 0x85, 0x03, 0xA0, | ||
9460 | 0xC4, 0x05, 0xF4, 0x85, 0x01, 0xA0, 0xCE, 0x05, 0x88, 0x00, 0x80, 0x63, | ||
9461 | 0xCC, 0x86, 0x07, 0xA0, | ||
9462 | 0xEE, 0x05, 0x5F, 0x00, 0x00, 0x2B, 0xDF, 0x08, 0x00, 0xA2, 0xE6, 0x05, | ||
9463 | 0x80, 0x67, 0x80, 0x63, | ||
9464 | 0x01, 0xA2, 0x7A, 0x06, 0x7C, 0x85, 0x06, 0x23, 0x68, 0x98, 0x48, 0x23, | ||
9465 | 0xF8, 0x88, 0x07, 0x23, | ||
9466 | 0x80, 0x00, 0x06, 0x87, 0x80, 0x63, 0x7C, 0x85, 0x00, 0x23, 0xDF, 0x00, | ||
9467 | 0x00, 0x63, 0x4A, 0x00, | ||
9468 | 0x06, 0x61, 0x00, 0xA2, 0x36, 0x06, 0x1D, 0x01, 0x16, 0xD4, 0xC0, 0x23, | ||
9469 | 0x07, 0x41, 0x83, 0x03, | ||
9470 | 0x80, 0x63, 0x06, 0xA6, 0x1C, 0x06, 0x00, 0x33, 0x37, 0x00, 0xC2, 0x88, | ||
9471 | 0x1D, 0x01, 0x01, 0xD6, | ||
9472 | 0x20, 0x23, 0x63, 0x60, 0x83, 0x03, 0x80, 0x63, 0x02, 0x23, 0xDF, 0x00, | ||
9473 | 0x07, 0xA6, 0x7C, 0x05, | ||
9474 | 0xEF, 0x04, 0x6F, 0x00, 0x00, 0x63, 0x4B, 0x00, 0x06, 0x41, 0xCB, 0x00, | ||
9475 | 0x52, 0x00, 0x06, 0x61, | ||
9476 | 0x00, 0xA2, 0x4E, 0x06, 0x1D, 0x01, 0x03, 0xCA, 0xC0, 0x23, 0x07, 0x41, | ||
9477 | 0x00, 0x63, 0x1D, 0x01, | ||
9478 | 0x04, 0xCC, 0x00, 0x33, 0x00, 0x83, 0xC0, 0x20, 0x81, 0x62, 0x80, 0x23, | ||
9479 | 0x07, 0x41, 0x00, 0x63, | ||
9480 | 0x80, 0x67, 0x08, 0x23, 0x83, 0x03, 0x80, 0x63, 0x00, 0x63, 0x01, 0x23, | ||
9481 | 0xDF, 0x00, 0x06, 0xA6, | ||
9482 | 0x84, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x80, 0x67, 0x80, 0x63, 0x00, 0x33, | ||
9483 | 0x00, 0x40, 0xC0, 0x20, | ||
9484 | 0x81, 0x62, 0x00, 0x63, 0x00, 0x00, 0xFE, 0x95, 0x83, 0x03, 0x80, 0x63, | ||
9485 | 0x06, 0xA6, 0x94, 0x06, | ||
9486 | 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x00, 0x01, 0xA0, 0x14, 0x07, 0x00, 0x2B, | ||
9487 | 0x40, 0x0E, 0x80, 0x63, | ||
9488 | 0x01, 0x00, 0x06, 0xA6, 0xAA, 0x06, 0x07, 0xA6, 0x7C, 0x05, 0x40, 0x0E, | ||
9489 | 0x80, 0x63, 0x00, 0x43, | ||
9490 | 0x00, 0xA0, 0xA2, 0x06, 0x06, 0xA6, 0xBC, 0x06, 0x07, 0xA6, 0x7C, 0x05, | ||
9491 | 0x80, 0x67, 0x40, 0x0E, | ||
9492 | 0x80, 0x63, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x23, 0xDF, 0x00, 0x00, 0x63, | ||
9493 | 0x07, 0xA6, 0xD6, 0x06, | ||
9494 | 0x00, 0x33, 0x2A, 0x00, 0xC2, 0x88, 0x03, 0x03, 0x80, 0x63, 0x89, 0x00, | ||
9495 | 0x0A, 0x2B, 0x07, 0xA6, | ||
9496 | 0xE8, 0x06, 0x00, 0x33, 0x29, 0x00, 0xC2, 0x88, 0x00, 0x43, 0x00, 0xA2, | ||
9497 | 0xF4, 0x06, 0xC0, 0x0E, | ||
9498 | 0x80, 0x63, 0xDE, 0x86, 0xC0, 0x0E, 0x00, 0x33, 0x00, 0x80, 0xC0, 0x20, | ||
9499 | 0x81, 0x62, 0x04, 0x01, | ||
9500 | 0x02, 0xDA, 0x80, 0x63, 0x7C, 0x85, 0x80, 0x7B, 0x80, 0x63, 0x06, 0xA6, | ||
9501 | 0x8C, 0x06, 0x00, 0x33, | ||
9502 | 0x2C, 0x00, 0xC2, 0x88, 0x0C, 0xA2, 0x2E, 0x07, 0xFE, 0x95, 0x83, 0x03, | ||
9503 | 0x80, 0x63, 0x06, 0xA6, | ||
9504 | 0x2C, 0x07, 0x07, 0xA6, 0x7C, 0x05, 0x00, 0x33, 0x3D, 0x00, 0xC2, 0x88, | ||
9505 | 0x00, 0x00, 0x80, 0x67, | ||
9506 | 0x83, 0x03, 0x80, 0x63, 0x0C, 0xA0, 0x44, 0x07, 0x07, 0xA6, 0x7C, 0x05, | ||
9507 | 0xBF, 0x23, 0x04, 0x61, | ||
9508 | 0x84, 0x01, 0xE6, 0x84, 0x00, 0x63, 0xF0, 0x04, 0x01, 0x01, 0xF1, 0x00, | ||
9509 | 0x00, 0x01, 0xF2, 0x00, | ||
9510 | 0x01, 0x05, 0x80, 0x01, 0x72, 0x04, 0x71, 0x00, 0x81, 0x01, 0x70, 0x04, | ||
9511 | 0x80, 0x05, 0x81, 0x05, | ||
9512 | 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x01, 0x01, 0xF1, 0x00, | ||
9513 | 0x70, 0x00, 0x81, 0x01, | ||
9514 | 0x70, 0x04, 0x71, 0x00, 0x81, 0x01, 0x72, 0x00, 0x80, 0x01, 0x71, 0x04, | ||
9515 | 0x70, 0x00, 0x80, 0x01, | ||
9516 | 0x70, 0x04, 0x00, 0x63, 0xF0, 0x04, 0xF2, 0x00, 0x72, 0x04, 0x00, 0x01, | ||
9517 | 0xF1, 0x00, 0x70, 0x00, | ||
9518 | 0x80, 0x01, 0x70, 0x04, 0x71, 0x00, 0x80, 0x01, 0x72, 0x00, 0x81, 0x01, | ||
9519 | 0x71, 0x04, 0x70, 0x00, | ||
9520 | 0x81, 0x01, 0x70, 0x04, 0x00, 0x63, 0x00, 0x23, 0xB3, 0x01, 0x83, 0x05, | ||
9521 | 0xA3, 0x01, 0xA2, 0x01, | ||
9522 | 0xA1, 0x01, 0x01, 0x23, 0xA0, 0x01, 0x00, 0x01, 0xC8, 0x00, 0x03, 0xA1, | ||
9523 | 0xC4, 0x07, 0x00, 0x33, | ||
9524 | 0x07, 0x00, 0xC2, 0x88, 0x80, 0x05, 0x81, 0x05, 0x04, 0x01, 0x11, 0xC8, | ||
9525 | 0x48, 0x00, 0xB0, 0x01, | ||
9526 | 0xB1, 0x01, 0x08, 0x23, 0xB2, 0x01, 0x05, 0x01, 0x48, 0x04, 0x00, 0x43, | ||
9527 | 0x00, 0xA2, 0xE4, 0x07, | ||
9528 | 0x00, 0x05, 0xDA, 0x87, 0x00, 0x01, 0xC8, 0x00, 0xFF, 0x23, 0x80, 0x01, | ||
9529 | 0x05, 0x05, 0x00, 0x63, | ||
9530 | 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, 0x00, 0x02, 0x80, 0x43, | ||
9531 | 0x76, 0x08, 0x80, 0x02, | ||
9532 | 0x77, 0x04, 0x00, 0x63, 0xF7, 0x04, 0x1A, 0x09, 0xF6, 0x08, 0x6E, 0x04, | ||
9533 | 0x00, 0x02, 0x00, 0xA0, | ||
9534 | 0x14, 0x08, 0x16, 0x88, 0x00, 0x43, 0x76, 0x08, 0x80, 0x02, 0x77, 0x04, | ||
9535 | 0x00, 0x63, 0xF3, 0x04, | ||
9536 | 0x00, 0x23, 0xF4, 0x00, 0x74, 0x00, 0x80, 0x43, 0xF4, 0x00, 0xCF, 0x40, | ||
9537 | 0x00, 0xA2, 0x44, 0x08, | ||
9538 | 0x74, 0x04, 0x02, 0x01, 0xF7, 0xC9, 0xF6, 0xD9, 0x00, 0x01, 0x01, 0xA1, | ||
9539 | 0x24, 0x08, 0x04, 0x98, | ||
9540 | 0x26, 0x95, 0x24, 0x88, 0x73, 0x04, 0x00, 0x63, 0xF3, 0x04, 0x75, 0x04, | ||
9541 | 0x5A, 0x88, 0x02, 0x01, | ||
9542 | 0x04, 0xD8, 0x46, 0x97, 0x04, 0x98, 0x26, 0x95, 0x4A, 0x88, 0x75, 0x00, | ||
9543 | 0x00, 0xA3, 0x64, 0x08, | ||
9544 | 0x00, 0x05, 0x4E, 0x88, 0x73, 0x04, 0x00, 0x63, 0x80, 0x7B, 0x80, 0x63, | ||
9545 | 0x06, 0xA6, 0x76, 0x08, | ||
9546 | 0x00, 0x33, 0x3E, 0x00, 0xC2, 0x88, 0x80, 0x67, 0x83, 0x03, 0x80, 0x63, | ||
9547 | 0x00, 0x63, 0x38, 0x2B, | ||
9548 | 0x9C, 0x88, 0x38, 0x2B, 0x92, 0x88, 0x32, 0x09, 0x31, 0x05, 0x92, 0x98, | ||
9549 | 0x05, 0x05, 0xB2, 0x09, | ||
9550 | 0x00, 0x63, 0x00, 0x32, 0x00, 0x36, 0x00, 0x3A, 0x00, 0x3E, 0x00, 0x63, | ||
9551 | 0x80, 0x32, 0x80, 0x36, | ||
9552 | 0x80, 0x3A, 0x80, 0x3E, 0xB4, 0x3D, 0x00, 0x63, 0x38, 0x2B, 0x40, 0x32, | ||
9553 | 0x40, 0x36, 0x40, 0x3A, | ||
9554 | 0x40, 0x3E, 0x00, 0x63, 0x5A, 0x20, 0xC9, 0x40, 0x00, 0xA0, 0xB4, 0x08, | ||
9555 | 0x5D, 0x00, 0xFE, 0xC3, | ||
9556 | 0x00, 0x63, 0x80, 0x73, 0xE6, 0x20, 0x02, 0x23, 0xE8, 0x00, 0x82, 0x73, | ||
9557 | 0xFF, 0xFD, 0x80, 0x73, | ||
9558 | 0x13, 0x23, 0xF8, 0x88, 0x66, 0x20, 0xC0, 0x20, 0x04, 0x23, 0xA0, 0x01, | ||
9559 | 0xA1, 0x23, 0xA1, 0x01, | ||
9560 | 0x81, 0x62, 0xE2, 0x88, 0x80, 0x73, 0x80, 0x77, 0x68, 0x00, 0x00, 0xA2, | ||
9561 | 0x80, 0x00, 0x03, 0xC2, | ||
9562 | 0xF1, 0xC7, 0x41, 0x23, 0xF8, 0x88, 0x11, 0x23, 0xA1, 0x01, 0x04, 0x23, | ||
9563 | 0xA0, 0x01, 0xE6, 0x84, | ||
10641 | }; | 9564 | }; |
10642 | 9565 | ||
10643 | STATIC ushort _asc_mcode_size = sizeof(_asc_mcode_buf); | 9566 | static ushort _asc_mcode_size = sizeof(_asc_mcode_buf); |
10644 | STATIC ADV_DCNT _asc_mcode_chksum = 0x012C453FUL; | 9567 | static ADV_DCNT _asc_mcode_chksum = 0x012C453FUL; |
10645 | 9568 | ||
10646 | #define ASC_SYN_OFFSET_ONE_DISABLE_LIST 16 | 9569 | #define ASC_SYN_OFFSET_ONE_DISABLE_LIST 16 |
10647 | STATIC uchar _syn_offset_one_disable_cmd[ASC_SYN_OFFSET_ONE_DISABLE_LIST] = | 9570 | static uchar _syn_offset_one_disable_cmd[ASC_SYN_OFFSET_ONE_DISABLE_LIST] = { |
10648 | { | 9571 | INQUIRY, |
10649 | INQUIRY, | 9572 | REQUEST_SENSE, |
10650 | REQUEST_SENSE, | 9573 | READ_CAPACITY, |
10651 | READ_CAPACITY, | 9574 | READ_TOC, |
10652 | READ_TOC, | 9575 | MODE_SELECT, |
10653 | MODE_SELECT, | 9576 | MODE_SENSE, |
10654 | MODE_SENSE, | 9577 | MODE_SELECT_10, |
10655 | MODE_SELECT_10, | 9578 | MODE_SENSE_10, |
10656 | MODE_SENSE_10, | 9579 | 0xFF, |
10657 | 0xFF, | 9580 | 0xFF, |
10658 | 0xFF, | 9581 | 0xFF, |
10659 | 0xFF, | 9582 | 0xFF, |
10660 | 0xFF, | 9583 | 0xFF, |
10661 | 0xFF, | 9584 | 0xFF, |
10662 | 0xFF, | 9585 | 0xFF, |
10663 | 0xFF, | 9586 | 0xFF |
10664 | 0xFF | ||
10665 | }; | 9587 | }; |
10666 | 9588 | ||
10667 | STATIC int | 9589 | static int AscExeScsiQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq) |
10668 | AscExeScsiQueue( | ||
10669 | ASC_DVC_VAR *asc_dvc, | ||
10670 | ASC_SCSI_Q *scsiq | ||
10671 | ) | ||
10672 | { | 9590 | { |
10673 | PortAddr iop_base; | 9591 | PortAddr iop_base; |
10674 | ulong last_int_level; | 9592 | ulong last_int_level; |
10675 | int sta; | 9593 | int sta; |
10676 | int n_q_required; | 9594 | int n_q_required; |
10677 | int disable_syn_offset_one_fix; | 9595 | int disable_syn_offset_one_fix; |
10678 | int i; | 9596 | int i; |
10679 | ASC_PADDR addr; | 9597 | ASC_PADDR addr; |
10680 | ASC_EXE_CALLBACK asc_exe_callback; | 9598 | ASC_EXE_CALLBACK asc_exe_callback; |
10681 | ushort sg_entry_cnt = 0; | 9599 | ushort sg_entry_cnt = 0; |
10682 | ushort sg_entry_cnt_minus_one = 0; | 9600 | ushort sg_entry_cnt_minus_one = 0; |
10683 | uchar target_ix; | 9601 | uchar target_ix; |
10684 | uchar tid_no; | 9602 | uchar tid_no; |
10685 | uchar sdtr_data; | 9603 | uchar sdtr_data; |
10686 | uchar extra_bytes; | 9604 | uchar extra_bytes; |
10687 | uchar scsi_cmd; | 9605 | uchar scsi_cmd; |
10688 | uchar disable_cmd; | 9606 | uchar disable_cmd; |
10689 | ASC_SG_HEAD *sg_head; | 9607 | ASC_SG_HEAD *sg_head; |
10690 | ASC_DCNT data_cnt; | 9608 | ASC_DCNT data_cnt; |
10691 | 9609 | ||
10692 | iop_base = asc_dvc->iop_base; | 9610 | iop_base = asc_dvc->iop_base; |
10693 | sg_head = scsiq->sg_head; | 9611 | sg_head = scsiq->sg_head; |
10694 | asc_exe_callback = asc_dvc->exe_callback; | 9612 | asc_exe_callback = asc_dvc->exe_callback; |
10695 | if (asc_dvc->err_code != 0) | 9613 | if (asc_dvc->err_code != 0) |
10696 | return (ERR); | 9614 | return (ERR); |
10697 | if (scsiq == (ASC_SCSI_Q *) 0L) { | 9615 | if (scsiq == (ASC_SCSI_Q *)0L) { |
10698 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_SCSIQ_NULL_PTR); | 9616 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_SCSIQ_NULL_PTR); |
10699 | return (ERR); | 9617 | return (ERR); |
10700 | } | 9618 | } |
10701 | scsiq->q1.q_no = 0; | 9619 | scsiq->q1.q_no = 0; |
10702 | if ((scsiq->q2.tag_code & ASC_TAG_FLAG_EXTRA_BYTES) == 0) { | 9620 | if ((scsiq->q2.tag_code & ASC_TAG_FLAG_EXTRA_BYTES) == 0) { |
10703 | scsiq->q1.extra_bytes = 0; | 9621 | scsiq->q1.extra_bytes = 0; |
10704 | } | 9622 | } |
10705 | sta = 0; | 9623 | sta = 0; |
10706 | target_ix = scsiq->q2.target_ix; | 9624 | target_ix = scsiq->q2.target_ix; |
10707 | tid_no = ASC_TIX_TO_TID(target_ix); | 9625 | tid_no = ASC_TIX_TO_TID(target_ix); |
10708 | n_q_required = 1; | 9626 | n_q_required = 1; |
10709 | if (scsiq->cdbptr[0] == REQUEST_SENSE) { | 9627 | if (scsiq->cdbptr[0] == REQUEST_SENSE) { |
10710 | if ((asc_dvc->init_sdtr & scsiq->q1.target_id) != 0) { | 9628 | if ((asc_dvc->init_sdtr & scsiq->q1.target_id) != 0) { |
10711 | asc_dvc->sdtr_done &= ~scsiq->q1.target_id; | 9629 | asc_dvc->sdtr_done &= ~scsiq->q1.target_id; |
10712 | sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no); | 9630 | sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no); |
10713 | AscMsgOutSDTR(asc_dvc, | 9631 | AscMsgOutSDTR(asc_dvc, |
10714 | asc_dvc->sdtr_period_tbl[(sdtr_data >> 4) & | 9632 | asc_dvc-> |
10715 | (uchar) (asc_dvc->max_sdtr_index - 1)], | 9633 | sdtr_period_tbl[(sdtr_data >> 4) & |
10716 | (uchar) (sdtr_data & (uchar) ASC_SYN_MAX_OFFSET)); | 9634 | (uchar)(asc_dvc-> |
10717 | scsiq->q1.cntl |= (QC_MSG_OUT | QC_URGENT); | 9635 | max_sdtr_index - |
10718 | } | 9636 | 1)], |
10719 | } | 9637 | (uchar)(sdtr_data & (uchar) |
10720 | last_int_level = DvcEnterCritical(); | 9638 | ASC_SYN_MAX_OFFSET)); |
10721 | if (asc_dvc->in_critical_cnt != 0) { | 9639 | scsiq->q1.cntl |= (QC_MSG_OUT | QC_URGENT); |
10722 | DvcLeaveCritical(last_int_level); | 9640 | } |
10723 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_CRITICAL_RE_ENTRY); | 9641 | } |
10724 | return (ERR); | 9642 | last_int_level = DvcEnterCritical(); |
10725 | } | 9643 | if (asc_dvc->in_critical_cnt != 0) { |
10726 | asc_dvc->in_critical_cnt++; | 9644 | DvcLeaveCritical(last_int_level); |
10727 | if ((scsiq->q1.cntl & QC_SG_HEAD) != 0) { | 9645 | AscSetLibErrorCode(asc_dvc, ASCQ_ERR_CRITICAL_RE_ENTRY); |
10728 | if ((sg_entry_cnt = sg_head->entry_cnt) == 0) { | 9646 | return (ERR); |
10729 | asc_dvc->in_critical_cnt--; | 9647 | } |
10730 | DvcLeaveCritical(last_int_level); | 9648 | asc_dvc->in_critical_cnt++; |
10731 | return (ERR); | 9649 | if ((scsiq->q1.cntl & QC_SG_HEAD) != 0) { |
10732 | } | 9650 | if ((sg_entry_cnt = sg_head->entry_cnt) == 0) { |
9651 | asc_dvc->in_critical_cnt--; | ||
9652 | DvcLeaveCritical(last_int_level); | ||
9653 | return (ERR); | ||
9654 | } | ||
10733 | #if !CC_VERY_LONG_SG_LIST | 9655 | #if !CC_VERY_LONG_SG_LIST |
10734 | if (sg_entry_cnt > ASC_MAX_SG_LIST) | 9656 | if (sg_entry_cnt > ASC_MAX_SG_LIST) { |
10735 | { | 9657 | asc_dvc->in_critical_cnt--; |
10736 | asc_dvc->in_critical_cnt--; | 9658 | DvcLeaveCritical(last_int_level); |
10737 | DvcLeaveCritical(last_int_level); | 9659 | return (ERR); |
10738 | return(ERR); | 9660 | } |
10739 | } | ||
10740 | #endif /* !CC_VERY_LONG_SG_LIST */ | 9661 | #endif /* !CC_VERY_LONG_SG_LIST */ |
10741 | if (sg_entry_cnt == 1) { | 9662 | if (sg_entry_cnt == 1) { |
10742 | scsiq->q1.data_addr = (ADV_PADDR) sg_head->sg_list[0].addr; | 9663 | scsiq->q1.data_addr = |
10743 | scsiq->q1.data_cnt = (ADV_DCNT) sg_head->sg_list[0].bytes; | 9664 | (ADV_PADDR)sg_head->sg_list[0].addr; |
10744 | scsiq->q1.cntl &= ~(QC_SG_HEAD | QC_SG_SWAP_QUEUE); | 9665 | scsiq->q1.data_cnt = |
10745 | } | 9666 | (ADV_DCNT)sg_head->sg_list[0].bytes; |
10746 | sg_entry_cnt_minus_one = sg_entry_cnt - 1; | 9667 | scsiq->q1.cntl &= ~(QC_SG_HEAD | QC_SG_SWAP_QUEUE); |
10747 | } | 9668 | } |
10748 | scsi_cmd = scsiq->cdbptr[0]; | 9669 | sg_entry_cnt_minus_one = sg_entry_cnt - 1; |
10749 | disable_syn_offset_one_fix = FALSE; | 9670 | } |
10750 | if ((asc_dvc->pci_fix_asyn_xfer & scsiq->q1.target_id) && | 9671 | scsi_cmd = scsiq->cdbptr[0]; |
10751 | !(asc_dvc->pci_fix_asyn_xfer_always & scsiq->q1.target_id)) { | 9672 | disable_syn_offset_one_fix = FALSE; |
10752 | if (scsiq->q1.cntl & QC_SG_HEAD) { | 9673 | if ((asc_dvc->pci_fix_asyn_xfer & scsiq->q1.target_id) && |
10753 | data_cnt = 0; | 9674 | !(asc_dvc->pci_fix_asyn_xfer_always & scsiq->q1.target_id)) { |
10754 | for (i = 0; i < sg_entry_cnt; i++) { | 9675 | if (scsiq->q1.cntl & QC_SG_HEAD) { |
10755 | data_cnt += (ADV_DCNT) le32_to_cpu(sg_head->sg_list[i].bytes); | 9676 | data_cnt = 0; |
10756 | } | 9677 | for (i = 0; i < sg_entry_cnt; i++) { |
10757 | } else { | 9678 | data_cnt += |
10758 | data_cnt = le32_to_cpu(scsiq->q1.data_cnt); | 9679 | (ADV_DCNT)le32_to_cpu(sg_head->sg_list[i]. |
10759 | } | 9680 | bytes); |
10760 | if (data_cnt != 0UL) { | 9681 | } |
10761 | if (data_cnt < 512UL) { | 9682 | } else { |
10762 | disable_syn_offset_one_fix = TRUE; | 9683 | data_cnt = le32_to_cpu(scsiq->q1.data_cnt); |
10763 | } else { | 9684 | } |
10764 | for (i = 0; i < ASC_SYN_OFFSET_ONE_DISABLE_LIST; i++) { | 9685 | if (data_cnt != 0UL) { |
10765 | disable_cmd = _syn_offset_one_disable_cmd[i]; | 9686 | if (data_cnt < 512UL) { |
10766 | if (disable_cmd == 0xFF) { | 9687 | disable_syn_offset_one_fix = TRUE; |
10767 | break; | 9688 | } else { |
10768 | } | 9689 | for (i = 0; i < ASC_SYN_OFFSET_ONE_DISABLE_LIST; |
10769 | if (scsi_cmd == disable_cmd) { | 9690 | i++) { |
10770 | disable_syn_offset_one_fix = TRUE; | 9691 | disable_cmd = |
10771 | break; | 9692 | _syn_offset_one_disable_cmd[i]; |
10772 | } | 9693 | if (disable_cmd == 0xFF) { |
10773 | } | 9694 | break; |
10774 | } | 9695 | } |
10775 | } | 9696 | if (scsi_cmd == disable_cmd) { |
10776 | } | 9697 | disable_syn_offset_one_fix = |
10777 | if (disable_syn_offset_one_fix) { | 9698 | TRUE; |
10778 | scsiq->q2.tag_code &= ~MSG_SIMPLE_TAG; | 9699 | break; |
10779 | scsiq->q2.tag_code |= (ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX | | 9700 | } |
10780 | ASC_TAG_FLAG_DISABLE_DISCONNECT); | 9701 | } |
10781 | } else { | 9702 | } |
10782 | scsiq->q2.tag_code &= 0x27; | 9703 | } |
10783 | } | 9704 | } |
10784 | if ((scsiq->q1.cntl & QC_SG_HEAD) != 0) { | 9705 | if (disable_syn_offset_one_fix) { |
10785 | if (asc_dvc->bug_fix_cntl) { | 9706 | scsiq->q2.tag_code &= ~MSG_SIMPLE_TAG; |
10786 | if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) { | 9707 | scsiq->q2.tag_code |= (ASC_TAG_FLAG_DISABLE_ASYN_USE_SYN_FIX | |
10787 | if ((scsi_cmd == READ_6) || | 9708 | ASC_TAG_FLAG_DISABLE_DISCONNECT); |
10788 | (scsi_cmd == READ_10)) { | 9709 | } else { |
10789 | addr = | 9710 | scsiq->q2.tag_code &= 0x27; |
10790 | (ADV_PADDR) le32_to_cpu( | 9711 | } |
10791 | sg_head->sg_list[sg_entry_cnt_minus_one].addr) + | 9712 | if ((scsiq->q1.cntl & QC_SG_HEAD) != 0) { |
10792 | (ADV_DCNT) le32_to_cpu( | 9713 | if (asc_dvc->bug_fix_cntl) { |
10793 | sg_head->sg_list[sg_entry_cnt_minus_one].bytes); | 9714 | if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) { |
10794 | extra_bytes = (uchar) ((ushort) addr & 0x0003); | 9715 | if ((scsi_cmd == READ_6) || |
10795 | if ((extra_bytes != 0) && | 9716 | (scsi_cmd == READ_10)) { |
10796 | ((scsiq->q2.tag_code & ASC_TAG_FLAG_EXTRA_BYTES) | 9717 | addr = |
10797 | == 0)) { | 9718 | (ADV_PADDR)le32_to_cpu(sg_head-> |
10798 | scsiq->q2.tag_code |= ASC_TAG_FLAG_EXTRA_BYTES; | 9719 | sg_list |
10799 | scsiq->q1.extra_bytes = extra_bytes; | 9720 | [sg_entry_cnt_minus_one]. |
10800 | data_cnt = le32_to_cpu( | 9721 | addr) + |
10801 | sg_head->sg_list[sg_entry_cnt_minus_one].bytes); | 9722 | (ADV_DCNT)le32_to_cpu(sg_head-> |
10802 | data_cnt -= (ASC_DCNT) extra_bytes; | 9723 | sg_list |
10803 | sg_head->sg_list[sg_entry_cnt_minus_one].bytes = | 9724 | [sg_entry_cnt_minus_one]. |
10804 | cpu_to_le32(data_cnt); | 9725 | bytes); |
10805 | } | 9726 | extra_bytes = |
10806 | } | 9727 | (uchar)((ushort)addr & 0x0003); |
10807 | } | 9728 | if ((extra_bytes != 0) |
10808 | } | 9729 | && |
10809 | sg_head->entry_to_copy = sg_head->entry_cnt; | 9730 | ((scsiq->q2. |
9731 | tag_code & | ||
9732 | ASC_TAG_FLAG_EXTRA_BYTES) | ||
9733 | == 0)) { | ||
9734 | scsiq->q2.tag_code |= | ||
9735 | ASC_TAG_FLAG_EXTRA_BYTES; | ||
9736 | scsiq->q1.extra_bytes = | ||
9737 | extra_bytes; | ||
9738 | data_cnt = | ||
9739 | le32_to_cpu(sg_head-> | ||
9740 | sg_list | ||
9741 | [sg_entry_cnt_minus_one]. | ||
9742 | bytes); | ||
9743 | data_cnt -= | ||
9744 | (ASC_DCNT) extra_bytes; | ||
9745 | sg_head-> | ||
9746 | sg_list | ||
9747 | [sg_entry_cnt_minus_one]. | ||
9748 | bytes = | ||
9749 | cpu_to_le32(data_cnt); | ||
9750 | } | ||
9751 | } | ||
9752 | } | ||
9753 | } | ||
9754 | sg_head->entry_to_copy = sg_head->entry_cnt; | ||
10810 | #if CC_VERY_LONG_SG_LIST | 9755 | #if CC_VERY_LONG_SG_LIST |
10811 | /* | 9756 | /* |
10812 | * Set the sg_entry_cnt to the maximum possible. The rest of | 9757 | * Set the sg_entry_cnt to the maximum possible. The rest of |
10813 | * the SG elements will be copied when the RISC completes the | 9758 | * the SG elements will be copied when the RISC completes the |
10814 | * SG elements that fit and halts. | 9759 | * SG elements that fit and halts. |
10815 | */ | 9760 | */ |
10816 | if (sg_entry_cnt > ASC_MAX_SG_LIST) | 9761 | if (sg_entry_cnt > ASC_MAX_SG_LIST) { |
10817 | { | 9762 | sg_entry_cnt = ASC_MAX_SG_LIST; |
10818 | sg_entry_cnt = ASC_MAX_SG_LIST; | 9763 | } |
10819 | } | ||
10820 | #endif /* CC_VERY_LONG_SG_LIST */ | 9764 | #endif /* CC_VERY_LONG_SG_LIST */ |
10821 | n_q_required = AscSgListToQueue(sg_entry_cnt); | 9765 | n_q_required = AscSgListToQueue(sg_entry_cnt); |
10822 | if ((AscGetNumOfFreeQueue(asc_dvc, target_ix, n_q_required) >= | 9766 | if ((AscGetNumOfFreeQueue(asc_dvc, target_ix, n_q_required) >= |
10823 | (uint) n_q_required) || ((scsiq->q1.cntl & QC_URGENT) != 0)) { | 9767 | (uint) n_q_required) |
10824 | if ((sta = AscSendScsiQueue(asc_dvc, scsiq, | 9768 | || ((scsiq->q1.cntl & QC_URGENT) != 0)) { |
10825 | n_q_required)) == 1) { | 9769 | if ((sta = |
10826 | asc_dvc->in_critical_cnt--; | 9770 | AscSendScsiQueue(asc_dvc, scsiq, |
10827 | if (asc_exe_callback != 0) { | 9771 | n_q_required)) == 1) { |
10828 | (*asc_exe_callback) (asc_dvc, scsiq); | 9772 | asc_dvc->in_critical_cnt--; |
10829 | } | 9773 | if (asc_exe_callback != 0) { |
10830 | DvcLeaveCritical(last_int_level); | 9774 | (*asc_exe_callback) (asc_dvc, scsiq); |
10831 | return (sta); | 9775 | } |
10832 | } | 9776 | DvcLeaveCritical(last_int_level); |
10833 | } | 9777 | return (sta); |
10834 | } else { | 9778 | } |
10835 | if (asc_dvc->bug_fix_cntl) { | 9779 | } |
10836 | if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) { | 9780 | } else { |
10837 | if ((scsi_cmd == READ_6) || | 9781 | if (asc_dvc->bug_fix_cntl) { |
10838 | (scsi_cmd == READ_10)) { | 9782 | if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) { |
10839 | addr = le32_to_cpu(scsiq->q1.data_addr) + | 9783 | if ((scsi_cmd == READ_6) || |
10840 | le32_to_cpu(scsiq->q1.data_cnt); | 9784 | (scsi_cmd == READ_10)) { |
10841 | extra_bytes = (uchar) ((ushort) addr & 0x0003); | 9785 | addr = |
10842 | if ((extra_bytes != 0) && | 9786 | le32_to_cpu(scsiq->q1.data_addr) + |
10843 | ((scsiq->q2.tag_code & ASC_TAG_FLAG_EXTRA_BYTES) | 9787 | le32_to_cpu(scsiq->q1.data_cnt); |
10844 | == 0)) { | 9788 | extra_bytes = |
10845 | data_cnt = le32_to_cpu(scsiq->q1.data_cnt); | 9789 | (uchar)((ushort)addr & 0x0003); |
10846 | if (((ushort) data_cnt & 0x01FF) == 0) { | 9790 | if ((extra_bytes != 0) |
10847 | scsiq->q2.tag_code |= ASC_TAG_FLAG_EXTRA_BYTES; | 9791 | && |
10848 | data_cnt -= (ASC_DCNT) extra_bytes; | 9792 | ((scsiq->q2. |
10849 | scsiq->q1.data_cnt = cpu_to_le32(data_cnt); | 9793 | tag_code & |
10850 | scsiq->q1.extra_bytes = extra_bytes; | 9794 | ASC_TAG_FLAG_EXTRA_BYTES) |
10851 | } | 9795 | == 0)) { |
10852 | } | 9796 | data_cnt = |
10853 | } | 9797 | le32_to_cpu(scsiq->q1. |
10854 | } | 9798 | data_cnt); |
10855 | } | 9799 | if (((ushort)data_cnt & 0x01FF) |
10856 | n_q_required = 1; | 9800 | == 0) { |
10857 | if ((AscGetNumOfFreeQueue(asc_dvc, target_ix, 1) >= 1) || | 9801 | scsiq->q2.tag_code |= |
10858 | ((scsiq->q1.cntl & QC_URGENT) != 0)) { | 9802 | ASC_TAG_FLAG_EXTRA_BYTES; |
10859 | if ((sta = AscSendScsiQueue(asc_dvc, scsiq, | 9803 | data_cnt -= (ASC_DCNT) |
10860 | n_q_required)) == 1) { | 9804 | extra_bytes; |
10861 | asc_dvc->in_critical_cnt--; | 9805 | scsiq->q1.data_cnt = |
10862 | if (asc_exe_callback != 0) { | 9806 | cpu_to_le32 |
10863 | (*asc_exe_callback) (asc_dvc, scsiq); | 9807 | (data_cnt); |
10864 | } | 9808 | scsiq->q1.extra_bytes = |
10865 | DvcLeaveCritical(last_int_level); | 9809 | extra_bytes; |
10866 | return (sta); | 9810 | } |
10867 | } | 9811 | } |
10868 | } | 9812 | } |
10869 | } | 9813 | } |
10870 | asc_dvc->in_critical_cnt--; | 9814 | } |
10871 | DvcLeaveCritical(last_int_level); | 9815 | n_q_required = 1; |
10872 | return (sta); | 9816 | if ((AscGetNumOfFreeQueue(asc_dvc, target_ix, 1) >= 1) || |
9817 | ((scsiq->q1.cntl & QC_URGENT) != 0)) { | ||
9818 | if ((sta = AscSendScsiQueue(asc_dvc, scsiq, | ||
9819 | n_q_required)) == 1) { | ||
9820 | asc_dvc->in_critical_cnt--; | ||
9821 | if (asc_exe_callback != 0) { | ||
9822 | (*asc_exe_callback) (asc_dvc, scsiq); | ||
9823 | } | ||
9824 | DvcLeaveCritical(last_int_level); | ||
9825 | return (sta); | ||
9826 | } | ||
9827 | } | ||
9828 | } | ||
9829 | asc_dvc->in_critical_cnt--; | ||
9830 | DvcLeaveCritical(last_int_level); | ||
9831 | return (sta); | ||
10873 | } | 9832 | } |
10874 | 9833 | ||
10875 | STATIC int | 9834 | static int |
10876 | AscSendScsiQueue( | 9835 | AscSendScsiQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar n_q_required) |
10877 | ASC_DVC_VAR *asc_dvc, | ||
10878 | ASC_SCSI_Q *scsiq, | ||
10879 | uchar n_q_required | ||
10880 | ) | ||
10881 | { | 9836 | { |
10882 | PortAddr iop_base; | 9837 | PortAddr iop_base; |
10883 | uchar free_q_head; | 9838 | uchar free_q_head; |
10884 | uchar next_qp; | 9839 | uchar next_qp; |
10885 | uchar tid_no; | 9840 | uchar tid_no; |
10886 | uchar target_ix; | 9841 | uchar target_ix; |
10887 | int sta; | 9842 | int sta; |
10888 | 9843 | ||
10889 | iop_base = asc_dvc->iop_base; | 9844 | iop_base = asc_dvc->iop_base; |
10890 | target_ix = scsiq->q2.target_ix; | 9845 | target_ix = scsiq->q2.target_ix; |
10891 | tid_no = ASC_TIX_TO_TID(target_ix); | 9846 | tid_no = ASC_TIX_TO_TID(target_ix); |
10892 | sta = 0; | 9847 | sta = 0; |
10893 | free_q_head = (uchar) AscGetVarFreeQHead(iop_base); | 9848 | free_q_head = (uchar)AscGetVarFreeQHead(iop_base); |
10894 | if (n_q_required > 1) { | 9849 | if (n_q_required > 1) { |
10895 | if ((next_qp = AscAllocMultipleFreeQueue(iop_base, | 9850 | if ((next_qp = AscAllocMultipleFreeQueue(iop_base, |
10896 | free_q_head, (uchar) (n_q_required))) | 9851 | free_q_head, (uchar) |
10897 | != (uchar) ASC_QLINK_END) { | 9852 | (n_q_required))) |
10898 | asc_dvc->last_q_shortage = 0; | 9853 | != (uchar)ASC_QLINK_END) { |
10899 | scsiq->sg_head->queue_cnt = n_q_required - 1; | 9854 | asc_dvc->last_q_shortage = 0; |
10900 | scsiq->q1.q_no = free_q_head; | 9855 | scsiq->sg_head->queue_cnt = n_q_required - 1; |
10901 | if ((sta = AscPutReadySgListQueue(asc_dvc, scsiq, | 9856 | scsiq->q1.q_no = free_q_head; |
10902 | free_q_head)) == 1) { | 9857 | if ((sta = AscPutReadySgListQueue(asc_dvc, scsiq, |
10903 | AscPutVarFreeQHead(iop_base, next_qp); | 9858 | free_q_head)) == 1) { |
10904 | asc_dvc->cur_total_qng += (uchar) (n_q_required); | 9859 | AscPutVarFreeQHead(iop_base, next_qp); |
10905 | asc_dvc->cur_dvc_qng[tid_no]++; | 9860 | asc_dvc->cur_total_qng += (uchar)(n_q_required); |
10906 | } | 9861 | asc_dvc->cur_dvc_qng[tid_no]++; |
10907 | return (sta); | 9862 | } |
10908 | } | 9863 | return (sta); |
10909 | } else if (n_q_required == 1) { | 9864 | } |
10910 | if ((next_qp = AscAllocFreeQueue(iop_base, | 9865 | } else if (n_q_required == 1) { |
10911 | free_q_head)) != ASC_QLINK_END) { | 9866 | if ((next_qp = AscAllocFreeQueue(iop_base, |
10912 | scsiq->q1.q_no = free_q_head; | 9867 | free_q_head)) != |
10913 | if ((sta = AscPutReadyQueue(asc_dvc, scsiq, | 9868 | ASC_QLINK_END) { |
10914 | free_q_head)) == 1) { | 9869 | scsiq->q1.q_no = free_q_head; |
10915 | AscPutVarFreeQHead(iop_base, next_qp); | 9870 | if ((sta = AscPutReadyQueue(asc_dvc, scsiq, |
10916 | asc_dvc->cur_total_qng++; | 9871 | free_q_head)) == 1) { |
10917 | asc_dvc->cur_dvc_qng[tid_no]++; | 9872 | AscPutVarFreeQHead(iop_base, next_qp); |
10918 | } | 9873 | asc_dvc->cur_total_qng++; |
10919 | return (sta); | 9874 | asc_dvc->cur_dvc_qng[tid_no]++; |
10920 | } | 9875 | } |
10921 | } | 9876 | return (sta); |
10922 | return (sta); | 9877 | } |
9878 | } | ||
9879 | return (sta); | ||
10923 | } | 9880 | } |
10924 | 9881 | ||
10925 | STATIC int | 9882 | static int AscSgListToQueue(int sg_list) |
10926 | AscSgListToQueue( | ||
10927 | int sg_list | ||
10928 | ) | ||
10929 | { | 9883 | { |
10930 | int n_sg_list_qs; | 9884 | int n_sg_list_qs; |
10931 | 9885 | ||
10932 | n_sg_list_qs = ((sg_list - 1) / ASC_SG_LIST_PER_Q); | 9886 | n_sg_list_qs = ((sg_list - 1) / ASC_SG_LIST_PER_Q); |
10933 | if (((sg_list - 1) % ASC_SG_LIST_PER_Q) != 0) | 9887 | if (((sg_list - 1) % ASC_SG_LIST_PER_Q) != 0) |
10934 | n_sg_list_qs++; | 9888 | n_sg_list_qs++; |
10935 | return (n_sg_list_qs + 1); | 9889 | return (n_sg_list_qs + 1); |
10936 | } | 9890 | } |
10937 | 9891 | ||
10938 | 9892 | static uint | |
10939 | STATIC uint | 9893 | AscGetNumOfFreeQueue(ASC_DVC_VAR *asc_dvc, uchar target_ix, uchar n_qs) |
10940 | AscGetNumOfFreeQueue( | ||
10941 | ASC_DVC_VAR *asc_dvc, | ||
10942 | uchar target_ix, | ||
10943 | uchar n_qs | ||
10944 | ) | ||
10945 | { | 9894 | { |
10946 | uint cur_used_qs; | 9895 | uint cur_used_qs; |
10947 | uint cur_free_qs; | 9896 | uint cur_free_qs; |
10948 | ASC_SCSI_BIT_ID_TYPE target_id; | 9897 | ASC_SCSI_BIT_ID_TYPE target_id; |
10949 | uchar tid_no; | 9898 | uchar tid_no; |
10950 | 9899 | ||
10951 | target_id = ASC_TIX_TO_TARGET_ID(target_ix); | 9900 | target_id = ASC_TIX_TO_TARGET_ID(target_ix); |
10952 | tid_no = ASC_TIX_TO_TID(target_ix); | 9901 | tid_no = ASC_TIX_TO_TID(target_ix); |
10953 | if ((asc_dvc->unit_not_ready & target_id) || | 9902 | if ((asc_dvc->unit_not_ready & target_id) || |
10954 | (asc_dvc->queue_full_or_busy & target_id)) { | 9903 | (asc_dvc->queue_full_or_busy & target_id)) { |
10955 | return (0); | 9904 | return (0); |
10956 | } | 9905 | } |
10957 | if (n_qs == 1) { | 9906 | if (n_qs == 1) { |
10958 | cur_used_qs = (uint) asc_dvc->cur_total_qng + | 9907 | cur_used_qs = (uint) asc_dvc->cur_total_qng + |
10959 | (uint) asc_dvc->last_q_shortage + | 9908 | (uint) asc_dvc->last_q_shortage + (uint) ASC_MIN_FREE_Q; |
10960 | (uint) ASC_MIN_FREE_Q; | 9909 | } else { |
10961 | } else { | 9910 | cur_used_qs = (uint) asc_dvc->cur_total_qng + |
10962 | cur_used_qs = (uint) asc_dvc->cur_total_qng + | 9911 | (uint) ASC_MIN_FREE_Q; |
10963 | (uint) ASC_MIN_FREE_Q; | 9912 | } |
10964 | } | 9913 | if ((uint) (cur_used_qs + n_qs) <= (uint) asc_dvc->max_total_qng) { |
10965 | if ((uint) (cur_used_qs + n_qs) <= (uint) asc_dvc->max_total_qng) { | 9914 | cur_free_qs = (uint) asc_dvc->max_total_qng - cur_used_qs; |
10966 | cur_free_qs = (uint) asc_dvc->max_total_qng - cur_used_qs; | 9915 | if (asc_dvc->cur_dvc_qng[tid_no] >= |
10967 | if (asc_dvc->cur_dvc_qng[tid_no] >= | 9916 | asc_dvc->max_dvc_qng[tid_no]) { |
10968 | asc_dvc->max_dvc_qng[tid_no]) { | 9917 | return (0); |
10969 | return (0); | 9918 | } |
10970 | } | 9919 | return (cur_free_qs); |
10971 | return (cur_free_qs); | 9920 | } |
10972 | } | 9921 | if (n_qs > 1) { |
10973 | if (n_qs > 1) { | 9922 | if ((n_qs > asc_dvc->last_q_shortage) |
10974 | if ((n_qs > asc_dvc->last_q_shortage) && (n_qs <= (asc_dvc->max_total_qng - ASC_MIN_FREE_Q))) { | 9923 | && (n_qs <= (asc_dvc->max_total_qng - ASC_MIN_FREE_Q))) { |
10975 | asc_dvc->last_q_shortage = n_qs; | 9924 | asc_dvc->last_q_shortage = n_qs; |
10976 | } | 9925 | } |
10977 | } | 9926 | } |
10978 | return (0); | 9927 | return (0); |
10979 | } | 9928 | } |
10980 | 9929 | ||
10981 | STATIC int | 9930 | static int AscPutReadyQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no) |
10982 | AscPutReadyQueue( | ||
10983 | ASC_DVC_VAR *asc_dvc, | ||
10984 | ASC_SCSI_Q *scsiq, | ||
10985 | uchar q_no | ||
10986 | ) | ||
10987 | { | 9931 | { |
10988 | ushort q_addr; | 9932 | ushort q_addr; |
10989 | uchar tid_no; | 9933 | uchar tid_no; |
10990 | uchar sdtr_data; | 9934 | uchar sdtr_data; |
10991 | uchar syn_period_ix; | 9935 | uchar syn_period_ix; |
10992 | uchar syn_offset; | 9936 | uchar syn_offset; |
10993 | PortAddr iop_base; | 9937 | PortAddr iop_base; |
10994 | 9938 | ||
10995 | iop_base = asc_dvc->iop_base; | 9939 | iop_base = asc_dvc->iop_base; |
10996 | if (((asc_dvc->init_sdtr & scsiq->q1.target_id) != 0) && | 9940 | if (((asc_dvc->init_sdtr & scsiq->q1.target_id) != 0) && |
10997 | ((asc_dvc->sdtr_done & scsiq->q1.target_id) == 0)) { | 9941 | ((asc_dvc->sdtr_done & scsiq->q1.target_id) == 0)) { |
10998 | tid_no = ASC_TIX_TO_TID(scsiq->q2.target_ix); | 9942 | tid_no = ASC_TIX_TO_TID(scsiq->q2.target_ix); |
10999 | sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no); | 9943 | sdtr_data = AscGetMCodeInitSDTRAtID(iop_base, tid_no); |
11000 | syn_period_ix = (sdtr_data >> 4) & (asc_dvc->max_sdtr_index - 1); | 9944 | syn_period_ix = |
11001 | syn_offset = sdtr_data & ASC_SYN_MAX_OFFSET; | 9945 | (sdtr_data >> 4) & (asc_dvc->max_sdtr_index - 1); |
11002 | AscMsgOutSDTR(asc_dvc, | 9946 | syn_offset = sdtr_data & ASC_SYN_MAX_OFFSET; |
11003 | asc_dvc->sdtr_period_tbl[syn_period_ix], | 9947 | AscMsgOutSDTR(asc_dvc, |
11004 | syn_offset); | 9948 | asc_dvc->sdtr_period_tbl[syn_period_ix], |
11005 | scsiq->q1.cntl |= QC_MSG_OUT; | 9949 | syn_offset); |
11006 | } | 9950 | scsiq->q1.cntl |= QC_MSG_OUT; |
11007 | q_addr = ASC_QNO_TO_QADDR(q_no); | 9951 | } |
11008 | if ((scsiq->q1.target_id & asc_dvc->use_tagged_qng) == 0) { | 9952 | q_addr = ASC_QNO_TO_QADDR(q_no); |
11009 | scsiq->q2.tag_code &= ~MSG_SIMPLE_TAG ; | 9953 | if ((scsiq->q1.target_id & asc_dvc->use_tagged_qng) == 0) { |
11010 | } | 9954 | scsiq->q2.tag_code &= ~MSG_SIMPLE_TAG; |
11011 | scsiq->q1.status = QS_FREE; | 9955 | } |
11012 | AscMemWordCopyPtrToLram(iop_base, | 9956 | scsiq->q1.status = QS_FREE; |
11013 | q_addr + ASC_SCSIQ_CDB_BEG, | 9957 | AscMemWordCopyPtrToLram(iop_base, |
11014 | (uchar *) scsiq->cdbptr, | 9958 | q_addr + ASC_SCSIQ_CDB_BEG, |
11015 | scsiq->q2.cdb_len >> 1); | 9959 | (uchar *)scsiq->cdbptr, scsiq->q2.cdb_len >> 1); |
11016 | 9960 | ||
11017 | DvcPutScsiQ(iop_base, | 9961 | DvcPutScsiQ(iop_base, |
11018 | q_addr + ASC_SCSIQ_CPY_BEG, | 9962 | q_addr + ASC_SCSIQ_CPY_BEG, |
11019 | (uchar *) &scsiq->q1.cntl, | 9963 | (uchar *)&scsiq->q1.cntl, |
11020 | ((sizeof(ASC_SCSIQ_1) + sizeof(ASC_SCSIQ_2)) / 2) - 1); | 9964 | ((sizeof(ASC_SCSIQ_1) + sizeof(ASC_SCSIQ_2)) / 2) - 1); |
11021 | AscWriteLramWord(iop_base, | 9965 | AscWriteLramWord(iop_base, |
11022 | (ushort) (q_addr + (ushort) ASC_SCSIQ_B_STATUS), | 9966 | (ushort)(q_addr + (ushort)ASC_SCSIQ_B_STATUS), |
11023 | (ushort) (((ushort) scsiq->q1.q_no << 8) | (ushort) QS_READY)); | 9967 | (ushort)(((ushort)scsiq->q1. |
11024 | return (1); | 9968 | q_no << 8) | (ushort)QS_READY)); |
9969 | return (1); | ||
11025 | } | 9970 | } |
11026 | 9971 | ||
11027 | STATIC int | 9972 | static int |
11028 | AscPutReadySgListQueue( | 9973 | AscPutReadySgListQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no) |
11029 | ASC_DVC_VAR *asc_dvc, | ||
11030 | ASC_SCSI_Q *scsiq, | ||
11031 | uchar q_no | ||
11032 | ) | ||
11033 | { | 9974 | { |
11034 | int sta; | 9975 | int sta; |
11035 | int i; | 9976 | int i; |
11036 | ASC_SG_HEAD *sg_head; | 9977 | ASC_SG_HEAD *sg_head; |
11037 | ASC_SG_LIST_Q scsi_sg_q; | 9978 | ASC_SG_LIST_Q scsi_sg_q; |
11038 | ASC_DCNT saved_data_addr; | 9979 | ASC_DCNT saved_data_addr; |
11039 | ASC_DCNT saved_data_cnt; | 9980 | ASC_DCNT saved_data_cnt; |
11040 | PortAddr iop_base; | 9981 | PortAddr iop_base; |
11041 | ushort sg_list_dwords; | 9982 | ushort sg_list_dwords; |
11042 | ushort sg_index; | 9983 | ushort sg_index; |
11043 | ushort sg_entry_cnt; | 9984 | ushort sg_entry_cnt; |
11044 | ushort q_addr; | 9985 | ushort q_addr; |
11045 | uchar next_qp; | 9986 | uchar next_qp; |
11046 | 9987 | ||
11047 | iop_base = asc_dvc->iop_base; | 9988 | iop_base = asc_dvc->iop_base; |
11048 | sg_head = scsiq->sg_head; | 9989 | sg_head = scsiq->sg_head; |
11049 | saved_data_addr = scsiq->q1.data_addr; | 9990 | saved_data_addr = scsiq->q1.data_addr; |
11050 | saved_data_cnt = scsiq->q1.data_cnt; | 9991 | saved_data_cnt = scsiq->q1.data_cnt; |
11051 | scsiq->q1.data_addr = (ASC_PADDR) sg_head->sg_list[0].addr; | 9992 | scsiq->q1.data_addr = (ASC_PADDR) sg_head->sg_list[0].addr; |
11052 | scsiq->q1.data_cnt = (ASC_DCNT) sg_head->sg_list[0].bytes; | 9993 | scsiq->q1.data_cnt = (ASC_DCNT) sg_head->sg_list[0].bytes; |
11053 | #if CC_VERY_LONG_SG_LIST | 9994 | #if CC_VERY_LONG_SG_LIST |
11054 | /* | 9995 | /* |
11055 | * If sg_head->entry_cnt is greater than ASC_MAX_SG_LIST | 9996 | * If sg_head->entry_cnt is greater than ASC_MAX_SG_LIST |
11056 | * then not all SG elements will fit in the allocated queues. | 9997 | * then not all SG elements will fit in the allocated queues. |
11057 | * The rest of the SG elements will be copied when the RISC | 9998 | * The rest of the SG elements will be copied when the RISC |
11058 | * completes the SG elements that fit and halts. | 9999 | * completes the SG elements that fit and halts. |
11059 | */ | 10000 | */ |
11060 | if (sg_head->entry_cnt > ASC_MAX_SG_LIST) | 10001 | if (sg_head->entry_cnt > ASC_MAX_SG_LIST) { |
11061 | { | 10002 | /* |
11062 | /* | 10003 | * Set sg_entry_cnt to be the number of SG elements that |
11063 | * Set sg_entry_cnt to be the number of SG elements that | 10004 | * will fit in the allocated SG queues. It is minus 1, because |
11064 | * will fit in the allocated SG queues. It is minus 1, because | 10005 | * the first SG element is handled above. ASC_MAX_SG_LIST is |
11065 | * the first SG element is handled above. ASC_MAX_SG_LIST is | 10006 | * already inflated by 1 to account for this. For example it |
11066 | * already inflated by 1 to account for this. For example it | 10007 | * may be 50 which is 1 + 7 queues * 7 SG elements. |
11067 | * may be 50 which is 1 + 7 queues * 7 SG elements. | 10008 | */ |
11068 | */ | 10009 | sg_entry_cnt = ASC_MAX_SG_LIST - 1; |
11069 | sg_entry_cnt = ASC_MAX_SG_LIST - 1; | 10010 | |
11070 | 10011 | /* | |
11071 | /* | 10012 | * Keep track of remaining number of SG elements that will |
11072 | * Keep track of remaining number of SG elements that will | 10013 | * need to be handled from a_isr.c. |
11073 | * need to be handled from a_isr.c. | 10014 | */ |
11074 | */ | 10015 | scsiq->remain_sg_entry_cnt = |
11075 | scsiq->remain_sg_entry_cnt = sg_head->entry_cnt - ASC_MAX_SG_LIST; | 10016 | sg_head->entry_cnt - ASC_MAX_SG_LIST; |
11076 | } else | 10017 | } else { |
11077 | { | ||
11078 | #endif /* CC_VERY_LONG_SG_LIST */ | 10018 | #endif /* CC_VERY_LONG_SG_LIST */ |
11079 | /* | 10019 | /* |
11080 | * Set sg_entry_cnt to be the number of SG elements that | 10020 | * Set sg_entry_cnt to be the number of SG elements that |
11081 | * will fit in the allocated SG queues. It is minus 1, because | 10021 | * will fit in the allocated SG queues. It is minus 1, because |
11082 | * the first SG element is handled above. | 10022 | * the first SG element is handled above. |
11083 | */ | 10023 | */ |
11084 | sg_entry_cnt = sg_head->entry_cnt - 1; | 10024 | sg_entry_cnt = sg_head->entry_cnt - 1; |
11085 | #if CC_VERY_LONG_SG_LIST | 10025 | #if CC_VERY_LONG_SG_LIST |
11086 | } | 10026 | } |
11087 | #endif /* CC_VERY_LONG_SG_LIST */ | 10027 | #endif /* CC_VERY_LONG_SG_LIST */ |
11088 | if (sg_entry_cnt != 0) { | 10028 | if (sg_entry_cnt != 0) { |
11089 | scsiq->q1.cntl |= QC_SG_HEAD; | 10029 | scsiq->q1.cntl |= QC_SG_HEAD; |
11090 | q_addr = ASC_QNO_TO_QADDR(q_no); | 10030 | q_addr = ASC_QNO_TO_QADDR(q_no); |
11091 | sg_index = 1; | 10031 | sg_index = 1; |
11092 | scsiq->q1.sg_queue_cnt = sg_head->queue_cnt; | 10032 | scsiq->q1.sg_queue_cnt = sg_head->queue_cnt; |
11093 | scsi_sg_q.sg_head_qp = q_no; | 10033 | scsi_sg_q.sg_head_qp = q_no; |
11094 | scsi_sg_q.cntl = QCSG_SG_XFER_LIST; | 10034 | scsi_sg_q.cntl = QCSG_SG_XFER_LIST; |
11095 | for (i = 0; i < sg_head->queue_cnt; i++) { | 10035 | for (i = 0; i < sg_head->queue_cnt; i++) { |
11096 | scsi_sg_q.seq_no = i + 1; | 10036 | scsi_sg_q.seq_no = i + 1; |
11097 | if (sg_entry_cnt > ASC_SG_LIST_PER_Q) { | 10037 | if (sg_entry_cnt > ASC_SG_LIST_PER_Q) { |
11098 | sg_list_dwords = (uchar) (ASC_SG_LIST_PER_Q * 2); | 10038 | sg_list_dwords = (uchar)(ASC_SG_LIST_PER_Q * 2); |
11099 | sg_entry_cnt -= ASC_SG_LIST_PER_Q; | 10039 | sg_entry_cnt -= ASC_SG_LIST_PER_Q; |
11100 | if (i == 0) { | 10040 | if (i == 0) { |
11101 | scsi_sg_q.sg_list_cnt = ASC_SG_LIST_PER_Q; | 10041 | scsi_sg_q.sg_list_cnt = |
11102 | scsi_sg_q.sg_cur_list_cnt = ASC_SG_LIST_PER_Q; | 10042 | ASC_SG_LIST_PER_Q; |
11103 | } else { | 10043 | scsi_sg_q.sg_cur_list_cnt = |
11104 | scsi_sg_q.sg_list_cnt = ASC_SG_LIST_PER_Q - 1; | 10044 | ASC_SG_LIST_PER_Q; |
11105 | scsi_sg_q.sg_cur_list_cnt = ASC_SG_LIST_PER_Q - 1; | 10045 | } else { |
11106 | } | 10046 | scsi_sg_q.sg_list_cnt = |
11107 | } else { | 10047 | ASC_SG_LIST_PER_Q - 1; |
10048 | scsi_sg_q.sg_cur_list_cnt = | ||
10049 | ASC_SG_LIST_PER_Q - 1; | ||
10050 | } | ||
10051 | } else { | ||
11108 | #if CC_VERY_LONG_SG_LIST | 10052 | #if CC_VERY_LONG_SG_LIST |
11109 | /* | 10053 | /* |
11110 | * This is the last SG queue in the list of | 10054 | * This is the last SG queue in the list of |
11111 | * allocated SG queues. If there are more | 10055 | * allocated SG queues. If there are more |
11112 | * SG elements than will fit in the allocated | 10056 | * SG elements than will fit in the allocated |
11113 | * queues, then set the QCSG_SG_XFER_MORE flag. | 10057 | * queues, then set the QCSG_SG_XFER_MORE flag. |
11114 | */ | 10058 | */ |
11115 | if (sg_head->entry_cnt > ASC_MAX_SG_LIST) | 10059 | if (sg_head->entry_cnt > ASC_MAX_SG_LIST) { |
11116 | { | 10060 | scsi_sg_q.cntl |= QCSG_SG_XFER_MORE; |
11117 | scsi_sg_q.cntl |= QCSG_SG_XFER_MORE; | 10061 | } else { |
11118 | } else | ||
11119 | { | ||
11120 | #endif /* CC_VERY_LONG_SG_LIST */ | 10062 | #endif /* CC_VERY_LONG_SG_LIST */ |
11121 | scsi_sg_q.cntl |= QCSG_SG_XFER_END; | 10063 | scsi_sg_q.cntl |= QCSG_SG_XFER_END; |
11122 | #if CC_VERY_LONG_SG_LIST | 10064 | #if CC_VERY_LONG_SG_LIST |
11123 | } | 10065 | } |
11124 | #endif /* CC_VERY_LONG_SG_LIST */ | 10066 | #endif /* CC_VERY_LONG_SG_LIST */ |
11125 | sg_list_dwords = sg_entry_cnt << 1; | 10067 | sg_list_dwords = sg_entry_cnt << 1; |
11126 | if (i == 0) { | 10068 | if (i == 0) { |
11127 | scsi_sg_q.sg_list_cnt = sg_entry_cnt; | 10069 | scsi_sg_q.sg_list_cnt = sg_entry_cnt; |
11128 | scsi_sg_q.sg_cur_list_cnt = sg_entry_cnt; | 10070 | scsi_sg_q.sg_cur_list_cnt = |
11129 | } else { | 10071 | sg_entry_cnt; |
11130 | scsi_sg_q.sg_list_cnt = sg_entry_cnt - 1; | 10072 | } else { |
11131 | scsi_sg_q.sg_cur_list_cnt = sg_entry_cnt - 1; | 10073 | scsi_sg_q.sg_list_cnt = |
11132 | } | 10074 | sg_entry_cnt - 1; |
11133 | sg_entry_cnt = 0; | 10075 | scsi_sg_q.sg_cur_list_cnt = |
11134 | } | 10076 | sg_entry_cnt - 1; |
11135 | next_qp = AscReadLramByte(iop_base, | 10077 | } |
11136 | (ushort) (q_addr + ASC_SCSIQ_B_FWD)); | 10078 | sg_entry_cnt = 0; |
11137 | scsi_sg_q.q_no = next_qp; | 10079 | } |
11138 | q_addr = ASC_QNO_TO_QADDR(next_qp); | 10080 | next_qp = AscReadLramByte(iop_base, |
11139 | AscMemWordCopyPtrToLram(iop_base, | 10081 | (ushort)(q_addr + |
11140 | q_addr + ASC_SCSIQ_SGHD_CPY_BEG, | 10082 | ASC_SCSIQ_B_FWD)); |
11141 | (uchar *) &scsi_sg_q, | 10083 | scsi_sg_q.q_no = next_qp; |
11142 | sizeof(ASC_SG_LIST_Q) >> 1); | 10084 | q_addr = ASC_QNO_TO_QADDR(next_qp); |
11143 | AscMemDWordCopyPtrToLram(iop_base, | 10085 | AscMemWordCopyPtrToLram(iop_base, |
11144 | q_addr + ASC_SGQ_LIST_BEG, | 10086 | q_addr + ASC_SCSIQ_SGHD_CPY_BEG, |
11145 | (uchar *) &sg_head->sg_list[sg_index], | 10087 | (uchar *)&scsi_sg_q, |
11146 | sg_list_dwords); | 10088 | sizeof(ASC_SG_LIST_Q) >> 1); |
11147 | sg_index += ASC_SG_LIST_PER_Q; | 10089 | AscMemDWordCopyPtrToLram(iop_base, |
11148 | scsiq->next_sg_index = sg_index; | 10090 | q_addr + ASC_SGQ_LIST_BEG, |
11149 | } | 10091 | (uchar *)&sg_head-> |
11150 | } else { | 10092 | sg_list[sg_index], |
11151 | scsiq->q1.cntl &= ~QC_SG_HEAD; | 10093 | sg_list_dwords); |
11152 | } | 10094 | sg_index += ASC_SG_LIST_PER_Q; |
11153 | sta = AscPutReadyQueue(asc_dvc, scsiq, q_no); | 10095 | scsiq->next_sg_index = sg_index; |
11154 | scsiq->q1.data_addr = saved_data_addr; | 10096 | } |
11155 | scsiq->q1.data_cnt = saved_data_cnt; | 10097 | } else { |
11156 | return (sta); | 10098 | scsiq->q1.cntl &= ~QC_SG_HEAD; |
10099 | } | ||
10100 | sta = AscPutReadyQueue(asc_dvc, scsiq, q_no); | ||
10101 | scsiq->q1.data_addr = saved_data_addr; | ||
10102 | scsiq->q1.data_cnt = saved_data_cnt; | ||
10103 | return (sta); | ||
11157 | } | 10104 | } |
11158 | 10105 | ||
11159 | STATIC int | 10106 | static int |
11160 | AscSetRunChipSynRegAtID( | 10107 | AscSetRunChipSynRegAtID(PortAddr iop_base, uchar tid_no, uchar sdtr_data) |
11161 | PortAddr iop_base, | ||
11162 | uchar tid_no, | ||
11163 | uchar sdtr_data | ||
11164 | ) | ||
11165 | { | 10108 | { |
11166 | int sta = FALSE; | 10109 | int sta = FALSE; |
11167 | 10110 | ||
11168 | if (AscHostReqRiscHalt(iop_base)) { | 10111 | if (AscHostReqRiscHalt(iop_base)) { |
11169 | sta = AscSetChipSynRegAtID(iop_base, tid_no, sdtr_data); | 10112 | sta = AscSetChipSynRegAtID(iop_base, tid_no, sdtr_data); |
11170 | AscStartChip(iop_base); | 10113 | AscStartChip(iop_base); |
11171 | return (sta); | 10114 | return (sta); |
11172 | } | 10115 | } |
11173 | return (sta); | 10116 | return (sta); |
11174 | } | 10117 | } |
11175 | 10118 | ||
11176 | STATIC int | 10119 | static int AscSetChipSynRegAtID(PortAddr iop_base, uchar id, uchar sdtr_data) |
11177 | AscSetChipSynRegAtID( | ||
11178 | PortAddr iop_base, | ||
11179 | uchar id, | ||
11180 | uchar sdtr_data | ||
11181 | ) | ||
11182 | { | 10120 | { |
11183 | ASC_SCSI_BIT_ID_TYPE org_id; | 10121 | ASC_SCSI_BIT_ID_TYPE org_id; |
11184 | int i; | 10122 | int i; |
11185 | int sta = TRUE; | 10123 | int sta = TRUE; |
11186 | 10124 | ||
11187 | AscSetBank(iop_base, 1); | 10125 | AscSetBank(iop_base, 1); |
11188 | org_id = AscReadChipDvcID(iop_base); | 10126 | org_id = AscReadChipDvcID(iop_base); |
11189 | for (i = 0; i <= ASC_MAX_TID; i++) { | 10127 | for (i = 0; i <= ASC_MAX_TID; i++) { |
11190 | if (org_id == (0x01 << i)) | 10128 | if (org_id == (0x01 << i)) |
11191 | break; | 10129 | break; |
11192 | } | 10130 | } |
11193 | org_id = (ASC_SCSI_BIT_ID_TYPE) i; | 10131 | org_id = (ASC_SCSI_BIT_ID_TYPE) i; |
11194 | AscWriteChipDvcID(iop_base, id); | 10132 | AscWriteChipDvcID(iop_base, id); |
11195 | if (AscReadChipDvcID(iop_base) == (0x01 << id)) { | 10133 | if (AscReadChipDvcID(iop_base) == (0x01 << id)) { |
11196 | AscSetBank(iop_base, 0); | 10134 | AscSetBank(iop_base, 0); |
11197 | AscSetChipSyn(iop_base, sdtr_data); | 10135 | AscSetChipSyn(iop_base, sdtr_data); |
11198 | if (AscGetChipSyn(iop_base) != sdtr_data) { | 10136 | if (AscGetChipSyn(iop_base) != sdtr_data) { |
11199 | sta = FALSE; | 10137 | sta = FALSE; |
11200 | } | 10138 | } |
11201 | } else { | 10139 | } else { |
11202 | sta = FALSE; | 10140 | sta = FALSE; |
11203 | } | 10141 | } |
11204 | AscSetBank(iop_base, 1); | 10142 | AscSetBank(iop_base, 1); |
11205 | AscWriteChipDvcID(iop_base, org_id); | 10143 | AscWriteChipDvcID(iop_base, org_id); |
11206 | AscSetBank(iop_base, 0); | 10144 | AscSetBank(iop_base, 0); |
11207 | return (sta); | 10145 | return (sta); |
11208 | } | 10146 | } |
11209 | 10147 | ||
11210 | STATIC ushort | 10148 | static ushort AscInitLram(ASC_DVC_VAR *asc_dvc) |
11211 | AscInitLram( | ||
11212 | ASC_DVC_VAR *asc_dvc | ||
11213 | ) | ||
11214 | { | 10149 | { |
11215 | uchar i; | 10150 | uchar i; |
11216 | ushort s_addr; | 10151 | ushort s_addr; |
11217 | PortAddr iop_base; | 10152 | PortAddr iop_base; |
11218 | ushort warn_code; | 10153 | ushort warn_code; |
11219 | 10154 | ||
11220 | iop_base = asc_dvc->iop_base; | 10155 | iop_base = asc_dvc->iop_base; |
11221 | warn_code = 0; | 10156 | warn_code = 0; |
11222 | AscMemWordSetLram(iop_base, ASC_QADR_BEG, 0, | 10157 | AscMemWordSetLram(iop_base, ASC_QADR_BEG, 0, |
11223 | (ushort) (((int) (asc_dvc->max_total_qng + 2 + 1) * 64) >> 1) | 10158 | (ushort)(((int)(asc_dvc->max_total_qng + 2 + 1) * |
11224 | ); | 10159 | 64) >> 1) |
11225 | i = ASC_MIN_ACTIVE_QNO; | 10160 | ); |
11226 | s_addr = ASC_QADR_BEG + ASC_QBLK_SIZE; | 10161 | i = ASC_MIN_ACTIVE_QNO; |
11227 | AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_FWD), | 10162 | s_addr = ASC_QADR_BEG + ASC_QBLK_SIZE; |
11228 | (uchar) (i + 1)); | 10163 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_FWD), |
11229 | AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_BWD), | 10164 | (uchar)(i + 1)); |
11230 | (uchar) (asc_dvc->max_total_qng)); | 10165 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_BWD), |
11231 | AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_QNO), | 10166 | (uchar)(asc_dvc->max_total_qng)); |
11232 | (uchar) i); | 10167 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_QNO), |
11233 | i++; | 10168 | (uchar)i); |
11234 | s_addr += ASC_QBLK_SIZE; | 10169 | i++; |
11235 | for (; i < asc_dvc->max_total_qng; i++, s_addr += ASC_QBLK_SIZE) { | 10170 | s_addr += ASC_QBLK_SIZE; |
11236 | AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_FWD), | 10171 | for (; i < asc_dvc->max_total_qng; i++, s_addr += ASC_QBLK_SIZE) { |
11237 | (uchar) (i + 1)); | 10172 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_FWD), |
11238 | AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_BWD), | 10173 | (uchar)(i + 1)); |
11239 | (uchar) (i - 1)); | 10174 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_BWD), |
11240 | AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_QNO), | 10175 | (uchar)(i - 1)); |
11241 | (uchar) i); | 10176 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_QNO), |
11242 | } | 10177 | (uchar)i); |
11243 | AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_FWD), | 10178 | } |
11244 | (uchar) ASC_QLINK_END); | 10179 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_FWD), |
11245 | AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_BWD), | 10180 | (uchar)ASC_QLINK_END); |
11246 | (uchar) (asc_dvc->max_total_qng - 1)); | 10181 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_BWD), |
11247 | AscWriteLramByte(iop_base, (ushort) (s_addr + ASC_SCSIQ_B_QNO), | 10182 | (uchar)(asc_dvc->max_total_qng - 1)); |
11248 | (uchar) asc_dvc->max_total_qng); | 10183 | AscWriteLramByte(iop_base, (ushort)(s_addr + ASC_SCSIQ_B_QNO), |
11249 | i++; | 10184 | (uchar)asc_dvc->max_total_qng); |
11250 | s_addr += ASC_QBLK_SIZE; | 10185 | i++; |
11251 | for (; i <= (uchar) (asc_dvc->max_total_qng + 3); | 10186 | s_addr += ASC_QBLK_SIZE; |
11252 | i++, s_addr += ASC_QBLK_SIZE) { | 10187 | for (; i <= (uchar)(asc_dvc->max_total_qng + 3); |
11253 | AscWriteLramByte(iop_base, | 10188 | i++, s_addr += ASC_QBLK_SIZE) { |
11254 | (ushort) (s_addr + (ushort) ASC_SCSIQ_B_FWD), i); | 10189 | AscWriteLramByte(iop_base, |
11255 | AscWriteLramByte(iop_base, | 10190 | (ushort)(s_addr + (ushort)ASC_SCSIQ_B_FWD), i); |
11256 | (ushort) (s_addr + (ushort) ASC_SCSIQ_B_BWD), i); | 10191 | AscWriteLramByte(iop_base, |
11257 | AscWriteLramByte(iop_base, | 10192 | (ushort)(s_addr + (ushort)ASC_SCSIQ_B_BWD), i); |
11258 | (ushort) (s_addr + (ushort) ASC_SCSIQ_B_QNO), i); | 10193 | AscWriteLramByte(iop_base, |
11259 | } | 10194 | (ushort)(s_addr + (ushort)ASC_SCSIQ_B_QNO), i); |
11260 | return (warn_code); | 10195 | } |
10196 | return (warn_code); | ||
11261 | } | 10197 | } |
11262 | 10198 | ||
11263 | STATIC ushort | 10199 | static ushort AscInitQLinkVar(ASC_DVC_VAR *asc_dvc) |
11264 | AscInitQLinkVar( | ||
11265 | ASC_DVC_VAR *asc_dvc | ||
11266 | ) | ||
11267 | { | 10200 | { |
11268 | PortAddr iop_base; | 10201 | PortAddr iop_base; |
11269 | int i; | 10202 | int i; |
11270 | ushort lram_addr; | 10203 | ushort lram_addr; |
11271 | 10204 | ||
11272 | iop_base = asc_dvc->iop_base; | 10205 | iop_base = asc_dvc->iop_base; |
11273 | AscPutRiscVarFreeQHead(iop_base, 1); | 10206 | AscPutRiscVarFreeQHead(iop_base, 1); |
11274 | AscPutRiscVarDoneQTail(iop_base, asc_dvc->max_total_qng); | 10207 | AscPutRiscVarDoneQTail(iop_base, asc_dvc->max_total_qng); |
11275 | AscPutVarFreeQHead(iop_base, 1); | 10208 | AscPutVarFreeQHead(iop_base, 1); |
11276 | AscPutVarDoneQTail(iop_base, asc_dvc->max_total_qng); | 10209 | AscPutVarDoneQTail(iop_base, asc_dvc->max_total_qng); |
11277 | AscWriteLramByte(iop_base, ASCV_BUSY_QHEAD_B, | 10210 | AscWriteLramByte(iop_base, ASCV_BUSY_QHEAD_B, |
11278 | (uchar) ((int) asc_dvc->max_total_qng + 1)); | 10211 | (uchar)((int)asc_dvc->max_total_qng + 1)); |
11279 | AscWriteLramByte(iop_base, ASCV_DISC1_QHEAD_B, | 10212 | AscWriteLramByte(iop_base, ASCV_DISC1_QHEAD_B, |
11280 | (uchar) ((int) asc_dvc->max_total_qng + 2)); | 10213 | (uchar)((int)asc_dvc->max_total_qng + 2)); |
11281 | AscWriteLramByte(iop_base, (ushort) ASCV_TOTAL_READY_Q_B, | 10214 | AscWriteLramByte(iop_base, (ushort)ASCV_TOTAL_READY_Q_B, |
11282 | asc_dvc->max_total_qng); | 10215 | asc_dvc->max_total_qng); |
11283 | AscWriteLramWord(iop_base, ASCV_ASCDVC_ERR_CODE_W, 0); | 10216 | AscWriteLramWord(iop_base, ASCV_ASCDVC_ERR_CODE_W, 0); |
11284 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | 10217 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); |
11285 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, 0); | 10218 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, 0); |
11286 | AscWriteLramByte(iop_base, ASCV_SCSIBUSY_B, 0); | 10219 | AscWriteLramByte(iop_base, ASCV_SCSIBUSY_B, 0); |
11287 | AscWriteLramByte(iop_base, ASCV_WTM_FLAG_B, 0); | 10220 | AscWriteLramByte(iop_base, ASCV_WTM_FLAG_B, 0); |
11288 | AscPutQDoneInProgress(iop_base, 0); | 10221 | AscPutQDoneInProgress(iop_base, 0); |
11289 | lram_addr = ASC_QADR_BEG; | 10222 | lram_addr = ASC_QADR_BEG; |
11290 | for (i = 0; i < 32; i++, lram_addr += 2) { | 10223 | for (i = 0; i < 32; i++, lram_addr += 2) { |
11291 | AscWriteLramWord(iop_base, lram_addr, 0); | 10224 | AscWriteLramWord(iop_base, lram_addr, 0); |
11292 | } | 10225 | } |
11293 | return (0); | 10226 | return (0); |
11294 | } | 10227 | } |
11295 | 10228 | ||
11296 | STATIC int | 10229 | static int AscSetLibErrorCode(ASC_DVC_VAR *asc_dvc, ushort err_code) |
11297 | AscSetLibErrorCode( | ||
11298 | ASC_DVC_VAR *asc_dvc, | ||
11299 | ushort err_code | ||
11300 | ) | ||
11301 | { | 10230 | { |
11302 | if (asc_dvc->err_code == 0) { | 10231 | if (asc_dvc->err_code == 0) { |
11303 | asc_dvc->err_code = err_code; | 10232 | asc_dvc->err_code = err_code; |
11304 | AscWriteLramWord(asc_dvc->iop_base, ASCV_ASCDVC_ERR_CODE_W, | 10233 | AscWriteLramWord(asc_dvc->iop_base, ASCV_ASCDVC_ERR_CODE_W, |
11305 | err_code); | 10234 | err_code); |
11306 | } | 10235 | } |
11307 | return (err_code); | 10236 | return (err_code); |
11308 | } | 10237 | } |
11309 | 10238 | ||
11310 | 10239 | static uchar | |
11311 | STATIC uchar | 10240 | AscMsgOutSDTR(ASC_DVC_VAR *asc_dvc, uchar sdtr_period, uchar sdtr_offset) |
11312 | AscMsgOutSDTR( | ||
11313 | ASC_DVC_VAR *asc_dvc, | ||
11314 | uchar sdtr_period, | ||
11315 | uchar sdtr_offset | ||
11316 | ) | ||
11317 | { | 10241 | { |
11318 | EXT_MSG sdtr_buf; | 10242 | EXT_MSG sdtr_buf; |
11319 | uchar sdtr_period_index; | 10243 | uchar sdtr_period_index; |
11320 | PortAddr iop_base; | 10244 | PortAddr iop_base; |
11321 | 10245 | ||
11322 | iop_base = asc_dvc->iop_base; | 10246 | iop_base = asc_dvc->iop_base; |
11323 | sdtr_buf.msg_type = MS_EXTEND; | 10247 | sdtr_buf.msg_type = MS_EXTEND; |
11324 | sdtr_buf.msg_len = MS_SDTR_LEN; | 10248 | sdtr_buf.msg_len = MS_SDTR_LEN; |
11325 | sdtr_buf.msg_req = MS_SDTR_CODE; | 10249 | sdtr_buf.msg_req = MS_SDTR_CODE; |
11326 | sdtr_buf.xfer_period = sdtr_period; | 10250 | sdtr_buf.xfer_period = sdtr_period; |
11327 | sdtr_offset &= ASC_SYN_MAX_OFFSET; | 10251 | sdtr_offset &= ASC_SYN_MAX_OFFSET; |
11328 | sdtr_buf.req_ack_offset = sdtr_offset; | 10252 | sdtr_buf.req_ack_offset = sdtr_offset; |
11329 | if ((sdtr_period_index = | 10253 | if ((sdtr_period_index = |
11330 | AscGetSynPeriodIndex(asc_dvc, sdtr_period)) <= | 10254 | AscGetSynPeriodIndex(asc_dvc, sdtr_period)) <= |
11331 | asc_dvc->max_sdtr_index) { | 10255 | asc_dvc->max_sdtr_index) { |
11332 | AscMemWordCopyPtrToLram(iop_base, | 10256 | AscMemWordCopyPtrToLram(iop_base, |
11333 | ASCV_MSGOUT_BEG, | 10257 | ASCV_MSGOUT_BEG, |
11334 | (uchar *) &sdtr_buf, | 10258 | (uchar *)&sdtr_buf, |
11335 | sizeof (EXT_MSG) >> 1); | 10259 | sizeof(EXT_MSG) >> 1); |
11336 | return ((sdtr_period_index << 4) | sdtr_offset); | 10260 | return ((sdtr_period_index << 4) | sdtr_offset); |
11337 | } else { | 10261 | } else { |
11338 | 10262 | ||
11339 | sdtr_buf.req_ack_offset = 0; | 10263 | sdtr_buf.req_ack_offset = 0; |
11340 | AscMemWordCopyPtrToLram(iop_base, | 10264 | AscMemWordCopyPtrToLram(iop_base, |
11341 | ASCV_MSGOUT_BEG, | 10265 | ASCV_MSGOUT_BEG, |
11342 | (uchar *) &sdtr_buf, | 10266 | (uchar *)&sdtr_buf, |
11343 | sizeof (EXT_MSG) >> 1); | 10267 | sizeof(EXT_MSG) >> 1); |
11344 | return (0); | 10268 | return (0); |
11345 | } | 10269 | } |
11346 | } | 10270 | } |
11347 | 10271 | ||
11348 | STATIC uchar | 10272 | static uchar |
11349 | AscCalSDTRData( | 10273 | AscCalSDTRData(ASC_DVC_VAR *asc_dvc, uchar sdtr_period, uchar syn_offset) |
11350 | ASC_DVC_VAR *asc_dvc, | ||
11351 | uchar sdtr_period, | ||
11352 | uchar syn_offset | ||
11353 | ) | ||
11354 | { | 10274 | { |
11355 | uchar byte; | 10275 | uchar byte; |
11356 | uchar sdtr_period_ix; | 10276 | uchar sdtr_period_ix; |
11357 | 10277 | ||
11358 | sdtr_period_ix = AscGetSynPeriodIndex(asc_dvc, sdtr_period); | 10278 | sdtr_period_ix = AscGetSynPeriodIndex(asc_dvc, sdtr_period); |
11359 | if ( | 10279 | if ((sdtr_period_ix > asc_dvc->max_sdtr_index) |
11360 | (sdtr_period_ix > asc_dvc->max_sdtr_index) | 10280 | ) { |
11361 | ) { | 10281 | return (0xFF); |
11362 | return (0xFF); | 10282 | } |
11363 | } | 10283 | byte = (sdtr_period_ix << 4) | (syn_offset & ASC_SYN_MAX_OFFSET); |
11364 | byte = (sdtr_period_ix << 4) | (syn_offset & ASC_SYN_MAX_OFFSET); | 10284 | return (byte); |
11365 | return (byte); | ||
11366 | } | 10285 | } |
11367 | 10286 | ||
11368 | STATIC void | 10287 | static void AscSetChipSDTR(PortAddr iop_base, uchar sdtr_data, uchar tid_no) |
11369 | AscSetChipSDTR( | ||
11370 | PortAddr iop_base, | ||
11371 | uchar sdtr_data, | ||
11372 | uchar tid_no | ||
11373 | ) | ||
11374 | { | 10288 | { |
11375 | AscSetChipSynRegAtID(iop_base, tid_no, sdtr_data); | 10289 | AscSetChipSynRegAtID(iop_base, tid_no, sdtr_data); |
11376 | AscPutMCodeSDTRDoneAtID(iop_base, tid_no, sdtr_data); | 10290 | AscPutMCodeSDTRDoneAtID(iop_base, tid_no, sdtr_data); |
11377 | return; | 10291 | return; |
11378 | } | 10292 | } |
11379 | 10293 | ||
11380 | STATIC uchar | 10294 | static uchar AscGetSynPeriodIndex(ASC_DVC_VAR *asc_dvc, uchar syn_time) |
11381 | AscGetSynPeriodIndex( | ||
11382 | ASC_DVC_VAR *asc_dvc, | ||
11383 | uchar syn_time | ||
11384 | ) | ||
11385 | { | 10295 | { |
11386 | uchar *period_table; | 10296 | uchar *period_table; |
11387 | int max_index; | 10297 | int max_index; |
11388 | int min_index; | 10298 | int min_index; |
11389 | int i; | 10299 | int i; |
11390 | 10300 | ||
11391 | period_table = asc_dvc->sdtr_period_tbl; | 10301 | period_table = asc_dvc->sdtr_period_tbl; |
11392 | max_index = (int) asc_dvc->max_sdtr_index; | 10302 | max_index = (int)asc_dvc->max_sdtr_index; |
11393 | min_index = (int)asc_dvc->host_init_sdtr_index; | 10303 | min_index = (int)asc_dvc->host_init_sdtr_index; |
11394 | if ((syn_time <= period_table[max_index])) { | 10304 | if ((syn_time <= period_table[max_index])) { |
11395 | for (i = min_index; i < (max_index - 1); i++) { | 10305 | for (i = min_index; i < (max_index - 1); i++) { |
11396 | if (syn_time <= period_table[i]) { | 10306 | if (syn_time <= period_table[i]) { |
11397 | return ((uchar) i); | 10307 | return ((uchar)i); |
11398 | } | 10308 | } |
11399 | } | 10309 | } |
11400 | return ((uchar) max_index); | 10310 | return ((uchar)max_index); |
11401 | } else { | 10311 | } else { |
11402 | return ((uchar) (max_index + 1)); | 10312 | return ((uchar)(max_index + 1)); |
11403 | } | 10313 | } |
11404 | } | 10314 | } |
11405 | 10315 | ||
11406 | STATIC uchar | 10316 | static uchar AscAllocFreeQueue(PortAddr iop_base, uchar free_q_head) |
11407 | AscAllocFreeQueue( | ||
11408 | PortAddr iop_base, | ||
11409 | uchar free_q_head | ||
11410 | ) | ||
11411 | { | 10317 | { |
11412 | ushort q_addr; | 10318 | ushort q_addr; |
11413 | uchar next_qp; | 10319 | uchar next_qp; |
11414 | uchar q_status; | 10320 | uchar q_status; |
11415 | 10321 | ||
11416 | q_addr = ASC_QNO_TO_QADDR(free_q_head); | 10322 | q_addr = ASC_QNO_TO_QADDR(free_q_head); |
11417 | q_status = (uchar) AscReadLramByte(iop_base, | 10323 | q_status = (uchar)AscReadLramByte(iop_base, |
11418 | (ushort) (q_addr + ASC_SCSIQ_B_STATUS)); | 10324 | (ushort)(q_addr + |
11419 | next_qp = AscReadLramByte(iop_base, | 10325 | ASC_SCSIQ_B_STATUS)); |
11420 | (ushort) (q_addr + ASC_SCSIQ_B_FWD)); | 10326 | next_qp = AscReadLramByte(iop_base, (ushort)(q_addr + ASC_SCSIQ_B_FWD)); |
11421 | if (((q_status & QS_READY) == 0) && (next_qp != ASC_QLINK_END)) { | 10327 | if (((q_status & QS_READY) == 0) && (next_qp != ASC_QLINK_END)) { |
11422 | return (next_qp); | 10328 | return (next_qp); |
11423 | } | 10329 | } |
11424 | return (ASC_QLINK_END); | 10330 | return (ASC_QLINK_END); |
11425 | } | 10331 | } |
11426 | 10332 | ||
11427 | STATIC uchar | 10333 | static uchar |
11428 | AscAllocMultipleFreeQueue( | 10334 | AscAllocMultipleFreeQueue(PortAddr iop_base, uchar free_q_head, uchar n_free_q) |
11429 | PortAddr iop_base, | ||
11430 | uchar free_q_head, | ||
11431 | uchar n_free_q | ||
11432 | ) | ||
11433 | { | 10335 | { |
11434 | uchar i; | 10336 | uchar i; |
11435 | 10337 | ||
11436 | for (i = 0; i < n_free_q; i++) { | 10338 | for (i = 0; i < n_free_q; i++) { |
11437 | if ((free_q_head = AscAllocFreeQueue(iop_base, free_q_head)) | 10339 | if ((free_q_head = AscAllocFreeQueue(iop_base, free_q_head)) |
11438 | == ASC_QLINK_END) { | 10340 | == ASC_QLINK_END) { |
11439 | return (ASC_QLINK_END); | 10341 | return (ASC_QLINK_END); |
11440 | } | 10342 | } |
11441 | } | 10343 | } |
11442 | return (free_q_head); | 10344 | return (free_q_head); |
11443 | } | 10345 | } |
11444 | 10346 | ||
11445 | STATIC int | 10347 | static int AscHostReqRiscHalt(PortAddr iop_base) |
11446 | AscHostReqRiscHalt( | ||
11447 | PortAddr iop_base | ||
11448 | ) | ||
11449 | { | 10348 | { |
11450 | int count = 0; | 10349 | int count = 0; |
11451 | int sta = 0; | 10350 | int sta = 0; |
11452 | uchar saved_stop_code; | 10351 | uchar saved_stop_code; |
11453 | 10352 | ||
11454 | if (AscIsChipHalted(iop_base)) | 10353 | if (AscIsChipHalted(iop_base)) |
11455 | return (1); | 10354 | return (1); |
11456 | saved_stop_code = AscReadLramByte(iop_base, ASCV_STOP_CODE_B); | 10355 | saved_stop_code = AscReadLramByte(iop_base, ASCV_STOP_CODE_B); |
11457 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, | 10356 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, |
11458 | ASC_STOP_HOST_REQ_RISC_HALT | ASC_STOP_REQ_RISC_STOP | 10357 | ASC_STOP_HOST_REQ_RISC_HALT | ASC_STOP_REQ_RISC_STOP); |
11459 | ); | 10358 | do { |
11460 | do { | 10359 | if (AscIsChipHalted(iop_base)) { |
11461 | if (AscIsChipHalted(iop_base)) { | 10360 | sta = 1; |
11462 | sta = 1; | 10361 | break; |
11463 | break; | 10362 | } |
11464 | } | 10363 | DvcSleepMilliSecond(100); |
11465 | DvcSleepMilliSecond(100); | 10364 | } while (count++ < 20); |
11466 | } while (count++ < 20); | 10365 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, saved_stop_code); |
11467 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, saved_stop_code); | 10366 | return (sta); |
11468 | return (sta); | ||
11469 | } | 10367 | } |
11470 | 10368 | ||
11471 | STATIC int | 10369 | static int AscStopQueueExe(PortAddr iop_base) |
11472 | AscStopQueueExe( | ||
11473 | PortAddr iop_base | ||
11474 | ) | ||
11475 | { | 10370 | { |
11476 | int count = 0; | 10371 | int count = 0; |
11477 | 10372 | ||
11478 | if (AscReadLramByte(iop_base, ASCV_STOP_CODE_B) == 0) { | 10373 | if (AscReadLramByte(iop_base, ASCV_STOP_CODE_B) == 0) { |
11479 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, | 10374 | AscWriteLramByte(iop_base, ASCV_STOP_CODE_B, |
11480 | ASC_STOP_REQ_RISC_STOP); | 10375 | ASC_STOP_REQ_RISC_STOP); |
11481 | do { | 10376 | do { |
11482 | if ( | 10377 | if (AscReadLramByte(iop_base, ASCV_STOP_CODE_B) & |
11483 | AscReadLramByte(iop_base, ASCV_STOP_CODE_B) & | 10378 | ASC_STOP_ACK_RISC_STOP) { |
11484 | ASC_STOP_ACK_RISC_STOP) { | 10379 | return (1); |
11485 | return (1); | 10380 | } |
11486 | } | 10381 | DvcSleepMilliSecond(100); |
11487 | DvcSleepMilliSecond(100); | 10382 | } while (count++ < 20); |
11488 | } while (count++ < 20); | 10383 | } |
11489 | } | 10384 | return (0); |
11490 | return (0); | ||
11491 | } | 10385 | } |
11492 | 10386 | ||
11493 | STATIC void | 10387 | static void DvcDelayMicroSecond(ADV_DVC_VAR *asc_dvc, ushort micro_sec) |
11494 | DvcDelayMicroSecond(ADV_DVC_VAR *asc_dvc, ushort micro_sec) | ||
11495 | { | 10388 | { |
11496 | udelay(micro_sec); | 10389 | udelay(micro_sec); |
11497 | } | 10390 | } |
11498 | 10391 | ||
11499 | STATIC void | 10392 | static void DvcDelayNanoSecond(ASC_DVC_VAR *asc_dvc, ASC_DCNT nano_sec) |
11500 | DvcDelayNanoSecond(ASC_DVC_VAR *asc_dvc, ASC_DCNT nano_sec) | ||
11501 | { | 10393 | { |
11502 | udelay((nano_sec + 999)/1000); | 10394 | udelay((nano_sec + 999) / 1000); |
11503 | } | 10395 | } |
11504 | 10396 | ||
11505 | #ifdef CONFIG_ISA | 10397 | #ifdef CONFIG_ISA |
11506 | STATIC ASC_DCNT __init | 10398 | static ASC_DCNT __init AscGetEisaProductID(PortAddr iop_base) |
11507 | AscGetEisaProductID( | ||
11508 | PortAddr iop_base) | ||
11509 | { | 10399 | { |
11510 | PortAddr eisa_iop; | 10400 | PortAddr eisa_iop; |
11511 | ushort product_id_high, product_id_low; | 10401 | ushort product_id_high, product_id_low; |
11512 | ASC_DCNT product_id; | 10402 | ASC_DCNT product_id; |
11513 | 10403 | ||
11514 | eisa_iop = ASC_GET_EISA_SLOT(iop_base) | ASC_EISA_PID_IOP_MASK; | 10404 | eisa_iop = ASC_GET_EISA_SLOT(iop_base) | ASC_EISA_PID_IOP_MASK; |
11515 | product_id_low = inpw(eisa_iop); | 10405 | product_id_low = inpw(eisa_iop); |
11516 | product_id_high = inpw(eisa_iop + 2); | 10406 | product_id_high = inpw(eisa_iop + 2); |
11517 | product_id = ((ASC_DCNT) product_id_high << 16) | | 10407 | product_id = ((ASC_DCNT) product_id_high << 16) | |
11518 | (ASC_DCNT) product_id_low; | 10408 | (ASC_DCNT) product_id_low; |
11519 | return (product_id); | 10409 | return (product_id); |
11520 | } | 10410 | } |
11521 | 10411 | ||
11522 | STATIC PortAddr __init | 10412 | static PortAddr __init AscSearchIOPortAddrEISA(PortAddr iop_base) |
11523 | AscSearchIOPortAddrEISA( | ||
11524 | PortAddr iop_base) | ||
11525 | { | 10413 | { |
11526 | ASC_DCNT eisa_product_id; | 10414 | ASC_DCNT eisa_product_id; |
11527 | 10415 | ||
11528 | if (iop_base == 0) { | 10416 | if (iop_base == 0) { |
11529 | iop_base = ASC_EISA_MIN_IOP_ADDR; | 10417 | iop_base = ASC_EISA_MIN_IOP_ADDR; |
11530 | } else { | 10418 | } else { |
11531 | if (iop_base == ASC_EISA_MAX_IOP_ADDR) | 10419 | if (iop_base == ASC_EISA_MAX_IOP_ADDR) |
11532 | return (0); | 10420 | return (0); |
11533 | if ((iop_base & 0x0050) == 0x0050) { | 10421 | if ((iop_base & 0x0050) == 0x0050) { |
11534 | iop_base += ASC_EISA_BIG_IOP_GAP; | 10422 | iop_base += ASC_EISA_BIG_IOP_GAP; |
11535 | } else { | 10423 | } else { |
11536 | iop_base += ASC_EISA_SMALL_IOP_GAP; | 10424 | iop_base += ASC_EISA_SMALL_IOP_GAP; |
11537 | } | 10425 | } |
11538 | } | 10426 | } |
11539 | while (iop_base <= ASC_EISA_MAX_IOP_ADDR) { | 10427 | while (iop_base <= ASC_EISA_MAX_IOP_ADDR) { |
11540 | eisa_product_id = AscGetEisaProductID(iop_base); | 10428 | eisa_product_id = AscGetEisaProductID(iop_base); |
11541 | if ((eisa_product_id == ASC_EISA_ID_740) || | 10429 | if ((eisa_product_id == ASC_EISA_ID_740) || |
11542 | (eisa_product_id == ASC_EISA_ID_750)) { | 10430 | (eisa_product_id == ASC_EISA_ID_750)) { |
11543 | if (AscFindSignature(iop_base)) { | 10431 | if (AscFindSignature(iop_base)) { |
11544 | inpw(iop_base + 4); | 10432 | inpw(iop_base + 4); |
11545 | return (iop_base); | 10433 | return (iop_base); |
11546 | } | 10434 | } |
11547 | } | 10435 | } |
11548 | if (iop_base == ASC_EISA_MAX_IOP_ADDR) | 10436 | if (iop_base == ASC_EISA_MAX_IOP_ADDR) |
11549 | return (0); | 10437 | return (0); |
11550 | if ((iop_base & 0x0050) == 0x0050) { | 10438 | if ((iop_base & 0x0050) == 0x0050) { |
11551 | iop_base += ASC_EISA_BIG_IOP_GAP; | 10439 | iop_base += ASC_EISA_BIG_IOP_GAP; |
11552 | } else { | 10440 | } else { |
11553 | iop_base += ASC_EISA_SMALL_IOP_GAP; | 10441 | iop_base += ASC_EISA_SMALL_IOP_GAP; |
11554 | } | 10442 | } |
11555 | } | 10443 | } |
11556 | return (0); | 10444 | return (0); |
11557 | } | 10445 | } |
11558 | #endif /* CONFIG_ISA */ | 10446 | #endif /* CONFIG_ISA */ |
11559 | 10447 | ||
11560 | STATIC int | 10448 | static int AscStartChip(PortAddr iop_base) |
11561 | AscStartChip( | ||
11562 | PortAddr iop_base | ||
11563 | ) | ||
11564 | { | 10449 | { |
11565 | AscSetChipControl(iop_base, 0); | 10450 | AscSetChipControl(iop_base, 0); |
11566 | if ((AscGetChipStatus(iop_base) & CSW_HALTED) != 0) { | 10451 | if ((AscGetChipStatus(iop_base) & CSW_HALTED) != 0) { |
11567 | return (0); | 10452 | return (0); |
11568 | } | 10453 | } |
11569 | return (1); | 10454 | return (1); |
11570 | } | 10455 | } |
11571 | 10456 | ||
11572 | STATIC int | 10457 | static int AscStopChip(PortAddr iop_base) |
11573 | AscStopChip( | ||
11574 | PortAddr iop_base | ||
11575 | ) | ||
11576 | { | 10458 | { |
11577 | uchar cc_val; | 10459 | uchar cc_val; |
11578 | 10460 | ||
11579 | cc_val = AscGetChipControl(iop_base) & (~(CC_SINGLE_STEP | CC_TEST | CC_DIAG)); | 10461 | cc_val = |
11580 | AscSetChipControl(iop_base, (uchar) (cc_val | CC_HALT)); | 10462 | AscGetChipControl(iop_base) & |
11581 | AscSetChipIH(iop_base, INS_HALT); | 10463 | (~(CC_SINGLE_STEP | CC_TEST | CC_DIAG)); |
11582 | AscSetChipIH(iop_base, INS_RFLAG_WTM); | 10464 | AscSetChipControl(iop_base, (uchar)(cc_val | CC_HALT)); |
11583 | if ((AscGetChipStatus(iop_base) & CSW_HALTED) == 0) { | 10465 | AscSetChipIH(iop_base, INS_HALT); |
11584 | return (0); | 10466 | AscSetChipIH(iop_base, INS_RFLAG_WTM); |
11585 | } | 10467 | if ((AscGetChipStatus(iop_base) & CSW_HALTED) == 0) { |
11586 | return (1); | 10468 | return (0); |
10469 | } | ||
10470 | return (1); | ||
11587 | } | 10471 | } |
11588 | 10472 | ||
11589 | STATIC int | 10473 | static int AscIsChipHalted(PortAddr iop_base) |
11590 | AscIsChipHalted( | ||
11591 | PortAddr iop_base | ||
11592 | ) | ||
11593 | { | 10474 | { |
11594 | if ((AscGetChipStatus(iop_base) & CSW_HALTED) != 0) { | 10475 | if ((AscGetChipStatus(iop_base) & CSW_HALTED) != 0) { |
11595 | if ((AscGetChipControl(iop_base) & CC_HALT) != 0) { | 10476 | if ((AscGetChipControl(iop_base) & CC_HALT) != 0) { |
11596 | return (1); | 10477 | return (1); |
11597 | } | 10478 | } |
11598 | } | 10479 | } |
11599 | return (0); | 10480 | return (0); |
11600 | } | 10481 | } |
11601 | 10482 | ||
11602 | STATIC void | 10483 | static void AscSetChipIH(PortAddr iop_base, ushort ins_code) |
11603 | AscSetChipIH( | ||
11604 | PortAddr iop_base, | ||
11605 | ushort ins_code | ||
11606 | ) | ||
11607 | { | 10484 | { |
11608 | AscSetBank(iop_base, 1); | 10485 | AscSetBank(iop_base, 1); |
11609 | AscWriteChipIH(iop_base, ins_code); | 10486 | AscWriteChipIH(iop_base, ins_code); |
11610 | AscSetBank(iop_base, 0); | 10487 | AscSetBank(iop_base, 0); |
11611 | return; | 10488 | return; |
11612 | } | 10489 | } |
11613 | 10490 | ||
11614 | STATIC void | 10491 | static void AscAckInterrupt(PortAddr iop_base) |
11615 | AscAckInterrupt( | ||
11616 | PortAddr iop_base | ||
11617 | ) | ||
11618 | { | 10492 | { |
11619 | uchar host_flag; | 10493 | uchar host_flag; |
11620 | uchar risc_flag; | 10494 | uchar risc_flag; |
11621 | ushort loop; | 10495 | ushort loop; |
11622 | 10496 | ||
11623 | loop = 0; | 10497 | loop = 0; |
11624 | do { | 10498 | do { |
11625 | risc_flag = AscReadLramByte(iop_base, ASCV_RISC_FLAG_B); | 10499 | risc_flag = AscReadLramByte(iop_base, ASCV_RISC_FLAG_B); |
11626 | if (loop++ > 0x7FFF) { | 10500 | if (loop++ > 0x7FFF) { |
11627 | break; | 10501 | break; |
11628 | } | 10502 | } |
11629 | } while ((risc_flag & ASC_RISC_FLAG_GEN_INT) != 0); | 10503 | } while ((risc_flag & ASC_RISC_FLAG_GEN_INT) != 0); |
11630 | host_flag = AscReadLramByte(iop_base, ASCV_HOST_FLAG_B) & (~ASC_HOST_FLAG_ACK_INT); | 10504 | host_flag = |
11631 | AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, | 10505 | AscReadLramByte(iop_base, |
11632 | (uchar) (host_flag | ASC_HOST_FLAG_ACK_INT)); | 10506 | ASCV_HOST_FLAG_B) & (~ASC_HOST_FLAG_ACK_INT); |
11633 | AscSetChipStatus(iop_base, CIW_INT_ACK); | 10507 | AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, |
11634 | loop = 0; | 10508 | (uchar)(host_flag | ASC_HOST_FLAG_ACK_INT)); |
11635 | while (AscGetChipStatus(iop_base) & CSW_INT_PENDING) { | 10509 | AscSetChipStatus(iop_base, CIW_INT_ACK); |
11636 | AscSetChipStatus(iop_base, CIW_INT_ACK); | 10510 | loop = 0; |
11637 | if (loop++ > 3) { | 10511 | while (AscGetChipStatus(iop_base) & CSW_INT_PENDING) { |
11638 | break; | 10512 | AscSetChipStatus(iop_base, CIW_INT_ACK); |
11639 | } | 10513 | if (loop++ > 3) { |
11640 | } | 10514 | break; |
11641 | AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, host_flag); | 10515 | } |
11642 | return; | 10516 | } |
10517 | AscWriteLramByte(iop_base, ASCV_HOST_FLAG_B, host_flag); | ||
10518 | return; | ||
11643 | } | 10519 | } |
11644 | 10520 | ||
11645 | STATIC void | 10521 | static void AscDisableInterrupt(PortAddr iop_base) |
11646 | AscDisableInterrupt( | ||
11647 | PortAddr iop_base | ||
11648 | ) | ||
11649 | { | 10522 | { |
11650 | ushort cfg; | 10523 | ushort cfg; |
11651 | 10524 | ||
11652 | cfg = AscGetChipCfgLsw(iop_base); | 10525 | cfg = AscGetChipCfgLsw(iop_base); |
11653 | AscSetChipCfgLsw(iop_base, cfg & (~ASC_CFG0_HOST_INT_ON)); | 10526 | AscSetChipCfgLsw(iop_base, cfg & (~ASC_CFG0_HOST_INT_ON)); |
11654 | return; | 10527 | return; |
11655 | } | 10528 | } |
11656 | 10529 | ||
11657 | STATIC void | 10530 | static void AscEnableInterrupt(PortAddr iop_base) |
11658 | AscEnableInterrupt( | ||
11659 | PortAddr iop_base | ||
11660 | ) | ||
11661 | { | 10531 | { |
11662 | ushort cfg; | 10532 | ushort cfg; |
11663 | 10533 | ||
11664 | cfg = AscGetChipCfgLsw(iop_base); | 10534 | cfg = AscGetChipCfgLsw(iop_base); |
11665 | AscSetChipCfgLsw(iop_base, cfg | ASC_CFG0_HOST_INT_ON); | 10535 | AscSetChipCfgLsw(iop_base, cfg | ASC_CFG0_HOST_INT_ON); |
11666 | return; | 10536 | return; |
11667 | } | 10537 | } |
11668 | 10538 | ||
11669 | 10539 | static void AscSetBank(PortAddr iop_base, uchar bank) | |
11670 | |||
11671 | STATIC void | ||
11672 | AscSetBank( | ||
11673 | PortAddr iop_base, | ||
11674 | uchar bank | ||
11675 | ) | ||
11676 | { | 10540 | { |
11677 | uchar val; | 10541 | uchar val; |
11678 | 10542 | ||
11679 | val = AscGetChipControl(iop_base) & | 10543 | val = AscGetChipControl(iop_base) & |
11680 | (~(CC_SINGLE_STEP | CC_TEST | CC_DIAG | CC_SCSI_RESET | CC_CHIP_RESET)); | 10544 | (~ |
11681 | if (bank == 1) { | 10545 | (CC_SINGLE_STEP | CC_TEST | CC_DIAG | CC_SCSI_RESET | |
11682 | val |= CC_BANK_ONE; | 10546 | CC_CHIP_RESET)); |
11683 | } else if (bank == 2) { | 10547 | if (bank == 1) { |
11684 | val |= CC_DIAG | CC_BANK_ONE; | 10548 | val |= CC_BANK_ONE; |
11685 | } else { | 10549 | } else if (bank == 2) { |
11686 | val &= ~CC_BANK_ONE; | 10550 | val |= CC_DIAG | CC_BANK_ONE; |
11687 | } | 10551 | } else { |
11688 | AscSetChipControl(iop_base, val); | 10552 | val &= ~CC_BANK_ONE; |
11689 | return; | 10553 | } |
10554 | AscSetChipControl(iop_base, val); | ||
10555 | return; | ||
11690 | } | 10556 | } |
11691 | 10557 | ||
11692 | STATIC int | 10558 | static int AscResetChipAndScsiBus(ASC_DVC_VAR *asc_dvc) |
11693 | AscResetChipAndScsiBus( | ||
11694 | ASC_DVC_VAR *asc_dvc | ||
11695 | ) | ||
11696 | { | 10559 | { |
11697 | PortAddr iop_base; | 10560 | PortAddr iop_base; |
11698 | int i = 10; | 10561 | int i = 10; |
11699 | 10562 | ||
11700 | iop_base = asc_dvc->iop_base; | 10563 | iop_base = asc_dvc->iop_base; |
11701 | while ((AscGetChipStatus(iop_base) & CSW_SCSI_RESET_ACTIVE) && (i-- > 0)) | 10564 | while ((AscGetChipStatus(iop_base) & CSW_SCSI_RESET_ACTIVE) |
11702 | { | 10565 | && (i-- > 0)) { |
11703 | DvcSleepMilliSecond(100); | 10566 | DvcSleepMilliSecond(100); |
11704 | } | 10567 | } |
11705 | AscStopChip(iop_base); | 10568 | AscStopChip(iop_base); |
11706 | AscSetChipControl(iop_base, CC_CHIP_RESET | CC_SCSI_RESET | CC_HALT); | 10569 | AscSetChipControl(iop_base, CC_CHIP_RESET | CC_SCSI_RESET | CC_HALT); |
11707 | DvcDelayNanoSecond(asc_dvc, 60000); | 10570 | DvcDelayNanoSecond(asc_dvc, 60000); |
11708 | AscSetChipIH(iop_base, INS_RFLAG_WTM); | 10571 | AscSetChipIH(iop_base, INS_RFLAG_WTM); |
11709 | AscSetChipIH(iop_base, INS_HALT); | 10572 | AscSetChipIH(iop_base, INS_HALT); |
11710 | AscSetChipControl(iop_base, CC_CHIP_RESET | CC_HALT); | 10573 | AscSetChipControl(iop_base, CC_CHIP_RESET | CC_HALT); |
11711 | AscSetChipControl(iop_base, CC_HALT); | 10574 | AscSetChipControl(iop_base, CC_HALT); |
11712 | DvcSleepMilliSecond(200); | 10575 | DvcSleepMilliSecond(200); |
11713 | AscSetChipStatus(iop_base, CIW_CLR_SCSI_RESET_INT); | 10576 | AscSetChipStatus(iop_base, CIW_CLR_SCSI_RESET_INT); |
11714 | AscSetChipStatus(iop_base, 0); | 10577 | AscSetChipStatus(iop_base, 0); |
11715 | return (AscIsChipHalted(iop_base)); | 10578 | return (AscIsChipHalted(iop_base)); |
11716 | } | 10579 | } |
11717 | 10580 | ||
11718 | STATIC ASC_DCNT __init | 10581 | static ASC_DCNT __init AscGetMaxDmaCount(ushort bus_type) |
11719 | AscGetMaxDmaCount( | ||
11720 | ushort bus_type) | ||
11721 | { | 10582 | { |
11722 | if (bus_type & ASC_IS_ISA) | 10583 | if (bus_type & ASC_IS_ISA) |
11723 | return (ASC_MAX_ISA_DMA_COUNT); | 10584 | return (ASC_MAX_ISA_DMA_COUNT); |
11724 | else if (bus_type & (ASC_IS_EISA | ASC_IS_VL)) | 10585 | else if (bus_type & (ASC_IS_EISA | ASC_IS_VL)) |
11725 | return (ASC_MAX_VL_DMA_COUNT); | 10586 | return (ASC_MAX_VL_DMA_COUNT); |
11726 | return (ASC_MAX_PCI_DMA_COUNT); | 10587 | return (ASC_MAX_PCI_DMA_COUNT); |
11727 | } | 10588 | } |
11728 | 10589 | ||
11729 | #ifdef CONFIG_ISA | 10590 | #ifdef CONFIG_ISA |
11730 | STATIC ushort __init | 10591 | static ushort __init AscGetIsaDmaChannel(PortAddr iop_base) |
11731 | AscGetIsaDmaChannel( | ||
11732 | PortAddr iop_base) | ||
11733 | { | 10592 | { |
11734 | ushort channel; | 10593 | ushort channel; |
11735 | 10594 | ||
11736 | channel = AscGetChipCfgLsw(iop_base) & 0x0003; | 10595 | channel = AscGetChipCfgLsw(iop_base) & 0x0003; |
11737 | if (channel == 0x03) | 10596 | if (channel == 0x03) |
11738 | return (0); | 10597 | return (0); |
11739 | else if (channel == 0x00) | 10598 | else if (channel == 0x00) |
11740 | return (7); | 10599 | return (7); |
11741 | return (channel + 4); | 10600 | return (channel + 4); |
11742 | } | 10601 | } |
11743 | 10602 | ||
11744 | STATIC ushort __init | 10603 | static ushort __init AscSetIsaDmaChannel(PortAddr iop_base, ushort dma_channel) |
11745 | AscSetIsaDmaChannel( | ||
11746 | PortAddr iop_base, | ||
11747 | ushort dma_channel) | ||
11748 | { | 10604 | { |
11749 | ushort cfg_lsw; | 10605 | ushort cfg_lsw; |
11750 | uchar value; | 10606 | uchar value; |
11751 | 10607 | ||
11752 | if ((dma_channel >= 5) && (dma_channel <= 7)) { | 10608 | if ((dma_channel >= 5) && (dma_channel <= 7)) { |
11753 | if (dma_channel == 7) | 10609 | if (dma_channel == 7) |
11754 | value = 0x00; | 10610 | value = 0x00; |
11755 | else | 10611 | else |
11756 | value = dma_channel - 4; | 10612 | value = dma_channel - 4; |
11757 | cfg_lsw = AscGetChipCfgLsw(iop_base) & 0xFFFC; | 10613 | cfg_lsw = AscGetChipCfgLsw(iop_base) & 0xFFFC; |
11758 | cfg_lsw |= value; | 10614 | cfg_lsw |= value; |
11759 | AscSetChipCfgLsw(iop_base, cfg_lsw); | 10615 | AscSetChipCfgLsw(iop_base, cfg_lsw); |
11760 | return (AscGetIsaDmaChannel(iop_base)); | 10616 | return (AscGetIsaDmaChannel(iop_base)); |
11761 | } | 10617 | } |
11762 | return (0); | 10618 | return (0); |
11763 | } | 10619 | } |
11764 | 10620 | ||
11765 | STATIC uchar __init | 10621 | static uchar __init AscSetIsaDmaSpeed(PortAddr iop_base, uchar speed_value) |
11766 | AscSetIsaDmaSpeed( | ||
11767 | PortAddr iop_base, | ||
11768 | uchar speed_value) | ||
11769 | { | 10622 | { |
11770 | speed_value &= 0x07; | 10623 | speed_value &= 0x07; |
11771 | AscSetBank(iop_base, 1); | 10624 | AscSetBank(iop_base, 1); |
11772 | AscWriteChipDmaSpeed(iop_base, speed_value); | 10625 | AscWriteChipDmaSpeed(iop_base, speed_value); |
11773 | AscSetBank(iop_base, 0); | 10626 | AscSetBank(iop_base, 0); |
11774 | return (AscGetIsaDmaSpeed(iop_base)); | 10627 | return (AscGetIsaDmaSpeed(iop_base)); |
11775 | } | 10628 | } |
11776 | 10629 | ||
11777 | STATIC uchar __init | 10630 | static uchar __init AscGetIsaDmaSpeed(PortAddr iop_base) |
11778 | AscGetIsaDmaSpeed( | ||
11779 | PortAddr iop_base | ||
11780 | ) | ||
11781 | { | 10631 | { |
11782 | uchar speed_value; | 10632 | uchar speed_value; |
11783 | 10633 | ||
11784 | AscSetBank(iop_base, 1); | 10634 | AscSetBank(iop_base, 1); |
11785 | speed_value = AscReadChipDmaSpeed(iop_base); | 10635 | speed_value = AscReadChipDmaSpeed(iop_base); |
11786 | speed_value &= 0x07; | 10636 | speed_value &= 0x07; |
11787 | AscSetBank(iop_base, 0); | 10637 | AscSetBank(iop_base, 0); |
11788 | return (speed_value); | 10638 | return (speed_value); |
11789 | } | 10639 | } |
11790 | #endif /* CONFIG_ISA */ | 10640 | #endif /* CONFIG_ISA */ |
11791 | 10641 | ||
11792 | STATIC ushort __init | 10642 | static ushort __init |
11793 | AscReadPCIConfigWord( | 10643 | AscReadPCIConfigWord(ASC_DVC_VAR *asc_dvc, ushort pci_config_offset) |
11794 | ASC_DVC_VAR *asc_dvc, | ||
11795 | ushort pci_config_offset) | ||
11796 | { | 10644 | { |
11797 | uchar lsb, msb; | 10645 | uchar lsb, msb; |
11798 | 10646 | ||
11799 | lsb = DvcReadPCIConfigByte(asc_dvc, pci_config_offset); | 10647 | lsb = DvcReadPCIConfigByte(asc_dvc, pci_config_offset); |
11800 | msb = DvcReadPCIConfigByte(asc_dvc, pci_config_offset + 1); | 10648 | msb = DvcReadPCIConfigByte(asc_dvc, pci_config_offset + 1); |
11801 | return ((ushort) ((msb << 8) | lsb)); | 10649 | return ((ushort)((msb << 8) | lsb)); |
11802 | } | 10650 | } |
11803 | 10651 | ||
11804 | STATIC ushort __init | 10652 | static ushort __init AscInitGetConfig(ASC_DVC_VAR *asc_dvc) |
11805 | AscInitGetConfig( | ||
11806 | ASC_DVC_VAR *asc_dvc | ||
11807 | ) | ||
11808 | { | 10653 | { |
11809 | ushort warn_code; | 10654 | ushort warn_code; |
11810 | PortAddr iop_base; | 10655 | PortAddr iop_base; |
11811 | ushort PCIDeviceID; | 10656 | ushort PCIDeviceID; |
11812 | ushort PCIVendorID; | 10657 | ushort PCIVendorID; |
11813 | uchar PCIRevisionID; | 10658 | uchar PCIRevisionID; |
11814 | uchar prevCmdRegBits; | 10659 | uchar prevCmdRegBits; |
11815 | 10660 | ||
11816 | warn_code = 0; | 10661 | warn_code = 0; |
11817 | iop_base = asc_dvc->iop_base; | 10662 | iop_base = asc_dvc->iop_base; |
11818 | asc_dvc->init_state = ASC_INIT_STATE_BEG_GET_CFG; | 10663 | asc_dvc->init_state = ASC_INIT_STATE_BEG_GET_CFG; |
11819 | if (asc_dvc->err_code != 0) { | 10664 | if (asc_dvc->err_code != 0) { |
11820 | return (UW_ERR); | 10665 | return (UW_ERR); |
11821 | } | 10666 | } |
11822 | if (asc_dvc->bus_type == ASC_IS_PCI) { | 10667 | if (asc_dvc->bus_type == ASC_IS_PCI) { |
11823 | PCIVendorID = AscReadPCIConfigWord(asc_dvc, | 10668 | PCIVendorID = AscReadPCIConfigWord(asc_dvc, |
11824 | AscPCIConfigVendorIDRegister); | 10669 | AscPCIConfigVendorIDRegister); |
11825 | 10670 | ||
11826 | PCIDeviceID = AscReadPCIConfigWord(asc_dvc, | 10671 | PCIDeviceID = AscReadPCIConfigWord(asc_dvc, |
11827 | AscPCIConfigDeviceIDRegister); | 10672 | AscPCIConfigDeviceIDRegister); |
11828 | 10673 | ||
11829 | PCIRevisionID = DvcReadPCIConfigByte(asc_dvc, | 10674 | PCIRevisionID = DvcReadPCIConfigByte(asc_dvc, |
11830 | AscPCIConfigRevisionIDRegister); | 10675 | AscPCIConfigRevisionIDRegister); |
11831 | 10676 | ||
11832 | if (PCIVendorID != PCI_VENDOR_ID_ASP) { | 10677 | if (PCIVendorID != PCI_VENDOR_ID_ASP) { |
11833 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; | 10678 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; |
11834 | } | 10679 | } |
11835 | prevCmdRegBits = DvcReadPCIConfigByte(asc_dvc, | 10680 | prevCmdRegBits = DvcReadPCIConfigByte(asc_dvc, |
11836 | AscPCIConfigCommandRegister); | 10681 | AscPCIConfigCommandRegister); |
11837 | 10682 | ||
11838 | if ((prevCmdRegBits & AscPCICmdRegBits_IOMemBusMaster) != | 10683 | if ((prevCmdRegBits & AscPCICmdRegBits_IOMemBusMaster) != |
11839 | AscPCICmdRegBits_IOMemBusMaster) { | 10684 | AscPCICmdRegBits_IOMemBusMaster) { |
11840 | DvcWritePCIConfigByte(asc_dvc, | 10685 | DvcWritePCIConfigByte(asc_dvc, |
11841 | AscPCIConfigCommandRegister, | 10686 | AscPCIConfigCommandRegister, |
11842 | (prevCmdRegBits | | 10687 | (prevCmdRegBits | |
11843 | AscPCICmdRegBits_IOMemBusMaster)); | 10688 | AscPCICmdRegBits_IOMemBusMaster)); |
11844 | 10689 | ||
11845 | if ((DvcReadPCIConfigByte(asc_dvc, | 10690 | if ((DvcReadPCIConfigByte(asc_dvc, |
11846 | AscPCIConfigCommandRegister) | 10691 | AscPCIConfigCommandRegister) |
11847 | & AscPCICmdRegBits_IOMemBusMaster) | 10692 | & AscPCICmdRegBits_IOMemBusMaster) |
11848 | != AscPCICmdRegBits_IOMemBusMaster) { | 10693 | != AscPCICmdRegBits_IOMemBusMaster) { |
11849 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; | 10694 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; |
11850 | } | 10695 | } |
11851 | } | 10696 | } |
11852 | if ((PCIDeviceID == PCI_DEVICE_ID_ASP_1200A) || | 10697 | if ((PCIDeviceID == PCI_DEVICE_ID_ASP_1200A) || |
11853 | (PCIDeviceID == PCI_DEVICE_ID_ASP_ABP940)) { | 10698 | (PCIDeviceID == PCI_DEVICE_ID_ASP_ABP940)) { |
11854 | DvcWritePCIConfigByte(asc_dvc, | 10699 | DvcWritePCIConfigByte(asc_dvc, |
11855 | AscPCIConfigLatencyTimer, 0x00); | 10700 | AscPCIConfigLatencyTimer, 0x00); |
11856 | if (DvcReadPCIConfigByte(asc_dvc, AscPCIConfigLatencyTimer) | 10701 | if (DvcReadPCIConfigByte |
11857 | != 0x00) { | 10702 | (asc_dvc, AscPCIConfigLatencyTimer) |
11858 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; | 10703 | != 0x00) { |
11859 | } | 10704 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; |
11860 | } else if (PCIDeviceID == PCI_DEVICE_ID_ASP_ABP940U) { | 10705 | } |
11861 | if (DvcReadPCIConfigByte(asc_dvc, | 10706 | } else if (PCIDeviceID == PCI_DEVICE_ID_ASP_ABP940U) { |
11862 | AscPCIConfigLatencyTimer) < 0x20) { | 10707 | if (DvcReadPCIConfigByte(asc_dvc, |
11863 | DvcWritePCIConfigByte(asc_dvc, | 10708 | AscPCIConfigLatencyTimer) < |
11864 | AscPCIConfigLatencyTimer, 0x20); | 10709 | 0x20) { |
11865 | 10710 | DvcWritePCIConfigByte(asc_dvc, | |
11866 | if (DvcReadPCIConfigByte(asc_dvc, | 10711 | AscPCIConfigLatencyTimer, |
11867 | AscPCIConfigLatencyTimer) < 0x20) { | 10712 | 0x20); |
11868 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; | 10713 | |
11869 | } | 10714 | if (DvcReadPCIConfigByte(asc_dvc, |
11870 | } | 10715 | AscPCIConfigLatencyTimer) |
11871 | } | 10716 | < 0x20) { |
11872 | } | 10717 | warn_code |= |
10718 | ASC_WARN_SET_PCI_CONFIG_SPACE; | ||
10719 | } | ||
10720 | } | ||
10721 | } | ||
10722 | } | ||
11873 | 10723 | ||
11874 | if (AscFindSignature(iop_base)) { | 10724 | if (AscFindSignature(iop_base)) { |
11875 | warn_code |= AscInitAscDvcVar(asc_dvc); | 10725 | warn_code |= AscInitAscDvcVar(asc_dvc); |
11876 | warn_code |= AscInitFromEEP(asc_dvc); | 10726 | warn_code |= AscInitFromEEP(asc_dvc); |
11877 | asc_dvc->init_state |= ASC_INIT_STATE_END_GET_CFG; | 10727 | asc_dvc->init_state |= ASC_INIT_STATE_END_GET_CFG; |
11878 | if (asc_dvc->scsi_reset_wait > ASC_MAX_SCSI_RESET_WAIT) { | 10728 | if (asc_dvc->scsi_reset_wait > ASC_MAX_SCSI_RESET_WAIT) { |
11879 | asc_dvc->scsi_reset_wait = ASC_MAX_SCSI_RESET_WAIT; | 10729 | asc_dvc->scsi_reset_wait = ASC_MAX_SCSI_RESET_WAIT; |
11880 | } | 10730 | } |
11881 | } else { | 10731 | } else { |
11882 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; | 10732 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; |
11883 | } | 10733 | } |
11884 | return(warn_code); | 10734 | return (warn_code); |
11885 | } | 10735 | } |
11886 | 10736 | ||
11887 | STATIC ushort __init | 10737 | static ushort __init AscInitSetConfig(ASC_DVC_VAR *asc_dvc) |
11888 | AscInitSetConfig( | ||
11889 | ASC_DVC_VAR *asc_dvc | ||
11890 | ) | ||
11891 | { | 10738 | { |
11892 | ushort warn_code = 0; | 10739 | ushort warn_code = 0; |
11893 | 10740 | ||
11894 | asc_dvc->init_state |= ASC_INIT_STATE_BEG_SET_CFG; | 10741 | asc_dvc->init_state |= ASC_INIT_STATE_BEG_SET_CFG; |
11895 | if (asc_dvc->err_code != 0) | 10742 | if (asc_dvc->err_code != 0) |
11896 | return (UW_ERR); | 10743 | return (UW_ERR); |
11897 | if (AscFindSignature(asc_dvc->iop_base)) { | 10744 | if (AscFindSignature(asc_dvc->iop_base)) { |
11898 | warn_code |= AscInitFromAscDvcVar(asc_dvc); | 10745 | warn_code |= AscInitFromAscDvcVar(asc_dvc); |
11899 | asc_dvc->init_state |= ASC_INIT_STATE_END_SET_CFG; | 10746 | asc_dvc->init_state |= ASC_INIT_STATE_END_SET_CFG; |
11900 | } else { | 10747 | } else { |
11901 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; | 10748 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; |
11902 | } | 10749 | } |
11903 | return (warn_code); | 10750 | return (warn_code); |
11904 | } | 10751 | } |
11905 | 10752 | ||
11906 | STATIC ushort __init | 10753 | static ushort __init AscInitFromAscDvcVar(ASC_DVC_VAR *asc_dvc) |
11907 | AscInitFromAscDvcVar( | ||
11908 | ASC_DVC_VAR *asc_dvc | ||
11909 | ) | ||
11910 | { | 10754 | { |
11911 | PortAddr iop_base; | 10755 | PortAddr iop_base; |
11912 | ushort cfg_msw; | 10756 | ushort cfg_msw; |
11913 | ushort warn_code; | 10757 | ushort warn_code; |
11914 | ushort pci_device_id = 0; | 10758 | ushort pci_device_id = 0; |
11915 | 10759 | ||
11916 | iop_base = asc_dvc->iop_base; | 10760 | iop_base = asc_dvc->iop_base; |
11917 | #ifdef CONFIG_PCI | 10761 | #ifdef CONFIG_PCI |
11918 | if (asc_dvc->cfg->dev) | 10762 | if (asc_dvc->cfg->dev) |
11919 | pci_device_id = to_pci_dev(asc_dvc->cfg->dev)->device; | 10763 | pci_device_id = to_pci_dev(asc_dvc->cfg->dev)->device; |
11920 | #endif | 10764 | #endif |
11921 | warn_code = 0; | 10765 | warn_code = 0; |
11922 | cfg_msw = AscGetChipCfgMsw(iop_base); | 10766 | cfg_msw = AscGetChipCfgMsw(iop_base); |
11923 | if ((cfg_msw & ASC_CFG_MSW_CLR_MASK) != 0) { | 10767 | if ((cfg_msw & ASC_CFG_MSW_CLR_MASK) != 0) { |
11924 | cfg_msw &= (~(ASC_CFG_MSW_CLR_MASK)); | 10768 | cfg_msw &= (~(ASC_CFG_MSW_CLR_MASK)); |
11925 | warn_code |= ASC_WARN_CFG_MSW_RECOVER; | 10769 | warn_code |= ASC_WARN_CFG_MSW_RECOVER; |
11926 | AscSetChipCfgMsw(iop_base, cfg_msw); | 10770 | AscSetChipCfgMsw(iop_base, cfg_msw); |
11927 | } | 10771 | } |
11928 | if ((asc_dvc->cfg->cmd_qng_enabled & asc_dvc->cfg->disc_enable) != | 10772 | if ((asc_dvc->cfg->cmd_qng_enabled & asc_dvc->cfg->disc_enable) != |
11929 | asc_dvc->cfg->cmd_qng_enabled) { | 10773 | asc_dvc->cfg->cmd_qng_enabled) { |
11930 | asc_dvc->cfg->disc_enable = asc_dvc->cfg->cmd_qng_enabled; | 10774 | asc_dvc->cfg->disc_enable = asc_dvc->cfg->cmd_qng_enabled; |
11931 | warn_code |= ASC_WARN_CMD_QNG_CONFLICT; | 10775 | warn_code |= ASC_WARN_CMD_QNG_CONFLICT; |
11932 | } | 10776 | } |
11933 | if (AscGetChipStatus(iop_base) & CSW_AUTO_CONFIG) { | 10777 | if (AscGetChipStatus(iop_base) & CSW_AUTO_CONFIG) { |
11934 | warn_code |= ASC_WARN_AUTO_CONFIG; | 10778 | warn_code |= ASC_WARN_AUTO_CONFIG; |
11935 | } | 10779 | } |
11936 | if ((asc_dvc->bus_type & (ASC_IS_ISA | ASC_IS_VL)) != 0) { | 10780 | if ((asc_dvc->bus_type & (ASC_IS_ISA | ASC_IS_VL)) != 0) { |
11937 | if (AscSetChipIRQ(iop_base, asc_dvc->irq_no, asc_dvc->bus_type) | 10781 | if (AscSetChipIRQ(iop_base, asc_dvc->irq_no, asc_dvc->bus_type) |
11938 | != asc_dvc->irq_no) { | 10782 | != asc_dvc->irq_no) { |
11939 | asc_dvc->err_code |= ASC_IERR_SET_IRQ_NO; | 10783 | asc_dvc->err_code |= ASC_IERR_SET_IRQ_NO; |
11940 | } | 10784 | } |
11941 | } | 10785 | } |
11942 | if (asc_dvc->bus_type & ASC_IS_PCI) { | 10786 | if (asc_dvc->bus_type & ASC_IS_PCI) { |
11943 | cfg_msw &= 0xFFC0; | 10787 | cfg_msw &= 0xFFC0; |
11944 | AscSetChipCfgMsw(iop_base, cfg_msw); | 10788 | AscSetChipCfgMsw(iop_base, cfg_msw); |
11945 | if ((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) { | 10789 | if ((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) { |
11946 | } else { | 10790 | } else { |
11947 | if ((pci_device_id == PCI_DEVICE_ID_ASP_1200A) || | 10791 | if ((pci_device_id == PCI_DEVICE_ID_ASP_1200A) || |
11948 | (pci_device_id == PCI_DEVICE_ID_ASP_ABP940)) { | 10792 | (pci_device_id == PCI_DEVICE_ID_ASP_ABP940)) { |
11949 | asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_IF_NOT_DWB; | 10793 | asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_IF_NOT_DWB; |
11950 | asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_ASYN_USE_SYN; | 10794 | asc_dvc->bug_fix_cntl |= |
11951 | } | 10795 | ASC_BUG_FIX_ASYN_USE_SYN; |
11952 | } | 10796 | } |
11953 | } else if (asc_dvc->bus_type == ASC_IS_ISAPNP) { | 10797 | } |
11954 | if (AscGetChipVersion(iop_base, asc_dvc->bus_type) | 10798 | } else if (asc_dvc->bus_type == ASC_IS_ISAPNP) { |
11955 | == ASC_CHIP_VER_ASYN_BUG) { | 10799 | if (AscGetChipVersion(iop_base, asc_dvc->bus_type) |
11956 | asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_ASYN_USE_SYN; | 10800 | == ASC_CHIP_VER_ASYN_BUG) { |
11957 | } | 10801 | asc_dvc->bug_fix_cntl |= ASC_BUG_FIX_ASYN_USE_SYN; |
11958 | } | 10802 | } |
11959 | if (AscSetChipScsiID(iop_base, asc_dvc->cfg->chip_scsi_id) != | 10803 | } |
11960 | asc_dvc->cfg->chip_scsi_id) { | 10804 | if (AscSetChipScsiID(iop_base, asc_dvc->cfg->chip_scsi_id) != |
11961 | asc_dvc->err_code |= ASC_IERR_SET_SCSI_ID; | 10805 | asc_dvc->cfg->chip_scsi_id) { |
11962 | } | 10806 | asc_dvc->err_code |= ASC_IERR_SET_SCSI_ID; |
10807 | } | ||
11963 | #ifdef CONFIG_ISA | 10808 | #ifdef CONFIG_ISA |
11964 | if (asc_dvc->bus_type & ASC_IS_ISA) { | 10809 | if (asc_dvc->bus_type & ASC_IS_ISA) { |
11965 | AscSetIsaDmaChannel(iop_base, asc_dvc->cfg->isa_dma_channel); | 10810 | AscSetIsaDmaChannel(iop_base, asc_dvc->cfg->isa_dma_channel); |
11966 | AscSetIsaDmaSpeed(iop_base, asc_dvc->cfg->isa_dma_speed); | 10811 | AscSetIsaDmaSpeed(iop_base, asc_dvc->cfg->isa_dma_speed); |
11967 | } | 10812 | } |
11968 | #endif /* CONFIG_ISA */ | 10813 | #endif /* CONFIG_ISA */ |
11969 | return (warn_code); | 10814 | return (warn_code); |
11970 | } | 10815 | } |
11971 | 10816 | ||
11972 | STATIC ushort | 10817 | static ushort AscInitAsc1000Driver(ASC_DVC_VAR *asc_dvc) |
11973 | AscInitAsc1000Driver( | ||
11974 | ASC_DVC_VAR *asc_dvc | ||
11975 | ) | ||
11976 | { | 10818 | { |
11977 | ushort warn_code; | 10819 | ushort warn_code; |
11978 | PortAddr iop_base; | 10820 | PortAddr iop_base; |
11979 | 10821 | ||
11980 | iop_base = asc_dvc->iop_base; | 10822 | iop_base = asc_dvc->iop_base; |
11981 | warn_code = 0; | 10823 | warn_code = 0; |
11982 | if ((asc_dvc->dvc_cntl & ASC_CNTL_RESET_SCSI) && | 10824 | if ((asc_dvc->dvc_cntl & ASC_CNTL_RESET_SCSI) && |
11983 | !(asc_dvc->init_state & ASC_INIT_RESET_SCSI_DONE)) { | 10825 | !(asc_dvc->init_state & ASC_INIT_RESET_SCSI_DONE)) { |
11984 | AscResetChipAndScsiBus(asc_dvc); | 10826 | AscResetChipAndScsiBus(asc_dvc); |
11985 | DvcSleepMilliSecond((ASC_DCNT) | 10827 | DvcSleepMilliSecond((ASC_DCNT) |
11986 | ((ushort) asc_dvc->scsi_reset_wait * 1000)); | 10828 | ((ushort)asc_dvc->scsi_reset_wait * 1000)); |
11987 | } | 10829 | } |
11988 | asc_dvc->init_state |= ASC_INIT_STATE_BEG_LOAD_MC; | 10830 | asc_dvc->init_state |= ASC_INIT_STATE_BEG_LOAD_MC; |
11989 | if (asc_dvc->err_code != 0) | 10831 | if (asc_dvc->err_code != 0) |
11990 | return (UW_ERR); | 10832 | return (UW_ERR); |
11991 | if (!AscFindSignature(asc_dvc->iop_base)) { | 10833 | if (!AscFindSignature(asc_dvc->iop_base)) { |
11992 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; | 10834 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; |
11993 | return (warn_code); | 10835 | return (warn_code); |
11994 | } | 10836 | } |
11995 | AscDisableInterrupt(iop_base); | 10837 | AscDisableInterrupt(iop_base); |
11996 | warn_code |= AscInitLram(asc_dvc); | 10838 | warn_code |= AscInitLram(asc_dvc); |
11997 | if (asc_dvc->err_code != 0) | 10839 | if (asc_dvc->err_code != 0) |
11998 | return (UW_ERR); | 10840 | return (UW_ERR); |
11999 | ASC_DBG1(1, "AscInitAsc1000Driver: _asc_mcode_chksum 0x%lx\n", | 10841 | ASC_DBG1(1, "AscInitAsc1000Driver: _asc_mcode_chksum 0x%lx\n", |
12000 | (ulong) _asc_mcode_chksum); | 10842 | (ulong)_asc_mcode_chksum); |
12001 | if (AscLoadMicroCode(iop_base, 0, _asc_mcode_buf, | 10843 | if (AscLoadMicroCode(iop_base, 0, _asc_mcode_buf, |
12002 | _asc_mcode_size) != _asc_mcode_chksum) { | 10844 | _asc_mcode_size) != _asc_mcode_chksum) { |
12003 | asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM; | 10845 | asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM; |
12004 | return (warn_code); | 10846 | return (warn_code); |
12005 | } | 10847 | } |
12006 | warn_code |= AscInitMicroCodeVar(asc_dvc); | 10848 | warn_code |= AscInitMicroCodeVar(asc_dvc); |
12007 | asc_dvc->init_state |= ASC_INIT_STATE_END_LOAD_MC; | 10849 | asc_dvc->init_state |= ASC_INIT_STATE_END_LOAD_MC; |
12008 | AscEnableInterrupt(iop_base); | 10850 | AscEnableInterrupt(iop_base); |
12009 | return (warn_code); | 10851 | return (warn_code); |
12010 | } | 10852 | } |
12011 | 10853 | ||
12012 | STATIC ushort __init | 10854 | static ushort __init AscInitAscDvcVar(ASC_DVC_VAR *asc_dvc) |
12013 | AscInitAscDvcVar( | ||
12014 | ASC_DVC_VAR *asc_dvc) | ||
12015 | { | 10855 | { |
12016 | int i; | 10856 | int i; |
12017 | PortAddr iop_base; | 10857 | PortAddr iop_base; |
12018 | ushort warn_code; | 10858 | ushort warn_code; |
12019 | uchar chip_version; | 10859 | uchar chip_version; |
12020 | 10860 | ||
12021 | iop_base = asc_dvc->iop_base; | 10861 | iop_base = asc_dvc->iop_base; |
12022 | warn_code = 0; | 10862 | warn_code = 0; |
12023 | asc_dvc->err_code = 0; | 10863 | asc_dvc->err_code = 0; |
12024 | if ((asc_dvc->bus_type & | 10864 | if ((asc_dvc->bus_type & |
12025 | (ASC_IS_ISA | ASC_IS_PCI | ASC_IS_EISA | ASC_IS_VL)) == 0) { | 10865 | (ASC_IS_ISA | ASC_IS_PCI | ASC_IS_EISA | ASC_IS_VL)) == 0) { |
12026 | asc_dvc->err_code |= ASC_IERR_NO_BUS_TYPE; | 10866 | asc_dvc->err_code |= ASC_IERR_NO_BUS_TYPE; |
12027 | } | 10867 | } |
12028 | AscSetChipControl(iop_base, CC_HALT); | 10868 | AscSetChipControl(iop_base, CC_HALT); |
12029 | AscSetChipStatus(iop_base, 0); | 10869 | AscSetChipStatus(iop_base, 0); |
12030 | asc_dvc->bug_fix_cntl = 0; | 10870 | asc_dvc->bug_fix_cntl = 0; |
12031 | asc_dvc->pci_fix_asyn_xfer = 0; | 10871 | asc_dvc->pci_fix_asyn_xfer = 0; |
12032 | asc_dvc->pci_fix_asyn_xfer_always = 0; | 10872 | asc_dvc->pci_fix_asyn_xfer_always = 0; |
12033 | /* asc_dvc->init_state initalized in AscInitGetConfig(). */ | 10873 | /* asc_dvc->init_state initalized in AscInitGetConfig(). */ |
12034 | asc_dvc->sdtr_done = 0; | 10874 | asc_dvc->sdtr_done = 0; |
12035 | asc_dvc->cur_total_qng = 0; | 10875 | asc_dvc->cur_total_qng = 0; |
12036 | asc_dvc->is_in_int = 0; | 10876 | asc_dvc->is_in_int = 0; |
12037 | asc_dvc->in_critical_cnt = 0; | 10877 | asc_dvc->in_critical_cnt = 0; |
12038 | asc_dvc->last_q_shortage = 0; | 10878 | asc_dvc->last_q_shortage = 0; |
12039 | asc_dvc->use_tagged_qng = 0; | 10879 | asc_dvc->use_tagged_qng = 0; |
12040 | asc_dvc->no_scam = 0; | 10880 | asc_dvc->no_scam = 0; |
12041 | asc_dvc->unit_not_ready = 0; | 10881 | asc_dvc->unit_not_ready = 0; |
12042 | asc_dvc->queue_full_or_busy = 0; | 10882 | asc_dvc->queue_full_or_busy = 0; |
12043 | asc_dvc->redo_scam = 0; | 10883 | asc_dvc->redo_scam = 0; |
12044 | asc_dvc->res2 = 0; | 10884 | asc_dvc->res2 = 0; |
12045 | asc_dvc->host_init_sdtr_index = 0; | 10885 | asc_dvc->host_init_sdtr_index = 0; |
12046 | asc_dvc->cfg->can_tagged_qng = 0; | 10886 | asc_dvc->cfg->can_tagged_qng = 0; |
12047 | asc_dvc->cfg->cmd_qng_enabled = 0; | 10887 | asc_dvc->cfg->cmd_qng_enabled = 0; |
12048 | asc_dvc->dvc_cntl = ASC_DEF_DVC_CNTL; | 10888 | asc_dvc->dvc_cntl = ASC_DEF_DVC_CNTL; |
12049 | asc_dvc->init_sdtr = 0; | 10889 | asc_dvc->init_sdtr = 0; |
12050 | asc_dvc->max_total_qng = ASC_DEF_MAX_TOTAL_QNG; | 10890 | asc_dvc->max_total_qng = ASC_DEF_MAX_TOTAL_QNG; |
12051 | asc_dvc->scsi_reset_wait = 3; | 10891 | asc_dvc->scsi_reset_wait = 3; |
12052 | asc_dvc->start_motor = ASC_SCSI_WIDTH_BIT_SET; | 10892 | asc_dvc->start_motor = ASC_SCSI_WIDTH_BIT_SET; |
12053 | asc_dvc->max_dma_count = AscGetMaxDmaCount(asc_dvc->bus_type); | 10893 | asc_dvc->max_dma_count = AscGetMaxDmaCount(asc_dvc->bus_type); |
12054 | asc_dvc->cfg->sdtr_enable = ASC_SCSI_WIDTH_BIT_SET; | 10894 | asc_dvc->cfg->sdtr_enable = ASC_SCSI_WIDTH_BIT_SET; |
12055 | asc_dvc->cfg->disc_enable = ASC_SCSI_WIDTH_BIT_SET; | 10895 | asc_dvc->cfg->disc_enable = ASC_SCSI_WIDTH_BIT_SET; |
12056 | asc_dvc->cfg->chip_scsi_id = ASC_DEF_CHIP_SCSI_ID; | 10896 | asc_dvc->cfg->chip_scsi_id = ASC_DEF_CHIP_SCSI_ID; |
12057 | asc_dvc->cfg->lib_serial_no = ASC_LIB_SERIAL_NUMBER; | 10897 | asc_dvc->cfg->lib_serial_no = ASC_LIB_SERIAL_NUMBER; |
12058 | asc_dvc->cfg->lib_version = (ASC_LIB_VERSION_MAJOR << 8) | | 10898 | asc_dvc->cfg->lib_version = (ASC_LIB_VERSION_MAJOR << 8) | |
12059 | ASC_LIB_VERSION_MINOR; | 10899 | ASC_LIB_VERSION_MINOR; |
12060 | chip_version = AscGetChipVersion(iop_base, asc_dvc->bus_type); | 10900 | chip_version = AscGetChipVersion(iop_base, asc_dvc->bus_type); |
12061 | asc_dvc->cfg->chip_version = chip_version; | 10901 | asc_dvc->cfg->chip_version = chip_version; |
12062 | asc_dvc->sdtr_period_tbl[0] = SYN_XFER_NS_0; | 10902 | asc_dvc->sdtr_period_tbl[0] = SYN_XFER_NS_0; |
12063 | asc_dvc->sdtr_period_tbl[1] = SYN_XFER_NS_1; | 10903 | asc_dvc->sdtr_period_tbl[1] = SYN_XFER_NS_1; |
12064 | asc_dvc->sdtr_period_tbl[2] = SYN_XFER_NS_2; | 10904 | asc_dvc->sdtr_period_tbl[2] = SYN_XFER_NS_2; |
12065 | asc_dvc->sdtr_period_tbl[3] = SYN_XFER_NS_3; | 10905 | asc_dvc->sdtr_period_tbl[3] = SYN_XFER_NS_3; |
12066 | asc_dvc->sdtr_period_tbl[4] = SYN_XFER_NS_4; | 10906 | asc_dvc->sdtr_period_tbl[4] = SYN_XFER_NS_4; |
12067 | asc_dvc->sdtr_period_tbl[5] = SYN_XFER_NS_5; | 10907 | asc_dvc->sdtr_period_tbl[5] = SYN_XFER_NS_5; |
12068 | asc_dvc->sdtr_period_tbl[6] = SYN_XFER_NS_6; | 10908 | asc_dvc->sdtr_period_tbl[6] = SYN_XFER_NS_6; |
12069 | asc_dvc->sdtr_period_tbl[7] = SYN_XFER_NS_7; | 10909 | asc_dvc->sdtr_period_tbl[7] = SYN_XFER_NS_7; |
12070 | asc_dvc->max_sdtr_index = 7; | 10910 | asc_dvc->max_sdtr_index = 7; |
12071 | if ((asc_dvc->bus_type & ASC_IS_PCI) && | 10911 | if ((asc_dvc->bus_type & ASC_IS_PCI) && |
12072 | (chip_version >= ASC_CHIP_VER_PCI_ULTRA_3150)) { | 10912 | (chip_version >= ASC_CHIP_VER_PCI_ULTRA_3150)) { |
12073 | asc_dvc->bus_type = ASC_IS_PCI_ULTRA; | 10913 | asc_dvc->bus_type = ASC_IS_PCI_ULTRA; |
12074 | asc_dvc->sdtr_period_tbl[0] = SYN_ULTRA_XFER_NS_0; | 10914 | asc_dvc->sdtr_period_tbl[0] = SYN_ULTRA_XFER_NS_0; |
12075 | asc_dvc->sdtr_period_tbl[1] = SYN_ULTRA_XFER_NS_1; | 10915 | asc_dvc->sdtr_period_tbl[1] = SYN_ULTRA_XFER_NS_1; |
12076 | asc_dvc->sdtr_period_tbl[2] = SYN_ULTRA_XFER_NS_2; | 10916 | asc_dvc->sdtr_period_tbl[2] = SYN_ULTRA_XFER_NS_2; |
12077 | asc_dvc->sdtr_period_tbl[3] = SYN_ULTRA_XFER_NS_3; | 10917 | asc_dvc->sdtr_period_tbl[3] = SYN_ULTRA_XFER_NS_3; |
12078 | asc_dvc->sdtr_period_tbl[4] = SYN_ULTRA_XFER_NS_4; | 10918 | asc_dvc->sdtr_period_tbl[4] = SYN_ULTRA_XFER_NS_4; |
12079 | asc_dvc->sdtr_period_tbl[5] = SYN_ULTRA_XFER_NS_5; | 10919 | asc_dvc->sdtr_period_tbl[5] = SYN_ULTRA_XFER_NS_5; |
12080 | asc_dvc->sdtr_period_tbl[6] = SYN_ULTRA_XFER_NS_6; | 10920 | asc_dvc->sdtr_period_tbl[6] = SYN_ULTRA_XFER_NS_6; |
12081 | asc_dvc->sdtr_period_tbl[7] = SYN_ULTRA_XFER_NS_7; | 10921 | asc_dvc->sdtr_period_tbl[7] = SYN_ULTRA_XFER_NS_7; |
12082 | asc_dvc->sdtr_period_tbl[8] = SYN_ULTRA_XFER_NS_8; | 10922 | asc_dvc->sdtr_period_tbl[8] = SYN_ULTRA_XFER_NS_8; |
12083 | asc_dvc->sdtr_period_tbl[9] = SYN_ULTRA_XFER_NS_9; | 10923 | asc_dvc->sdtr_period_tbl[9] = SYN_ULTRA_XFER_NS_9; |
12084 | asc_dvc->sdtr_period_tbl[10] = SYN_ULTRA_XFER_NS_10; | 10924 | asc_dvc->sdtr_period_tbl[10] = SYN_ULTRA_XFER_NS_10; |
12085 | asc_dvc->sdtr_period_tbl[11] = SYN_ULTRA_XFER_NS_11; | 10925 | asc_dvc->sdtr_period_tbl[11] = SYN_ULTRA_XFER_NS_11; |
12086 | asc_dvc->sdtr_period_tbl[12] = SYN_ULTRA_XFER_NS_12; | 10926 | asc_dvc->sdtr_period_tbl[12] = SYN_ULTRA_XFER_NS_12; |
12087 | asc_dvc->sdtr_period_tbl[13] = SYN_ULTRA_XFER_NS_13; | 10927 | asc_dvc->sdtr_period_tbl[13] = SYN_ULTRA_XFER_NS_13; |
12088 | asc_dvc->sdtr_period_tbl[14] = SYN_ULTRA_XFER_NS_14; | 10928 | asc_dvc->sdtr_period_tbl[14] = SYN_ULTRA_XFER_NS_14; |
12089 | asc_dvc->sdtr_period_tbl[15] = SYN_ULTRA_XFER_NS_15; | 10929 | asc_dvc->sdtr_period_tbl[15] = SYN_ULTRA_XFER_NS_15; |
12090 | asc_dvc->max_sdtr_index = 15; | 10930 | asc_dvc->max_sdtr_index = 15; |
12091 | if (chip_version == ASC_CHIP_VER_PCI_ULTRA_3150) | 10931 | if (chip_version == ASC_CHIP_VER_PCI_ULTRA_3150) { |
12092 | { | 10932 | AscSetExtraControl(iop_base, |
12093 | AscSetExtraControl(iop_base, | 10933 | (SEC_ACTIVE_NEGATE | SEC_SLEW_RATE)); |
12094 | (SEC_ACTIVE_NEGATE | SEC_SLEW_RATE)); | 10934 | } else if (chip_version >= ASC_CHIP_VER_PCI_ULTRA_3050) { |
12095 | } else if (chip_version >= ASC_CHIP_VER_PCI_ULTRA_3050) { | 10935 | AscSetExtraControl(iop_base, |
12096 | AscSetExtraControl(iop_base, | 10936 | (SEC_ACTIVE_NEGATE | |
12097 | (SEC_ACTIVE_NEGATE | SEC_ENABLE_FILTER)); | 10937 | SEC_ENABLE_FILTER)); |
12098 | } | 10938 | } |
12099 | } | 10939 | } |
12100 | if (asc_dvc->bus_type == ASC_IS_PCI) { | 10940 | if (asc_dvc->bus_type == ASC_IS_PCI) { |
12101 | AscSetExtraControl(iop_base, (SEC_ACTIVE_NEGATE | SEC_SLEW_RATE)); | 10941 | AscSetExtraControl(iop_base, |
12102 | } | 10942 | (SEC_ACTIVE_NEGATE | SEC_SLEW_RATE)); |
10943 | } | ||
12103 | 10944 | ||
12104 | asc_dvc->cfg->isa_dma_speed = ASC_DEF_ISA_DMA_SPEED; | 10945 | asc_dvc->cfg->isa_dma_speed = ASC_DEF_ISA_DMA_SPEED; |
12105 | if (AscGetChipBusType(iop_base) == ASC_IS_ISAPNP) { | 10946 | if (AscGetChipBusType(iop_base) == ASC_IS_ISAPNP) { |
12106 | AscSetChipIFC(iop_base, IFC_INIT_DEFAULT); | 10947 | AscSetChipIFC(iop_base, IFC_INIT_DEFAULT); |
12107 | asc_dvc->bus_type = ASC_IS_ISAPNP; | 10948 | asc_dvc->bus_type = ASC_IS_ISAPNP; |
12108 | } | 10949 | } |
12109 | #ifdef CONFIG_ISA | 10950 | #ifdef CONFIG_ISA |
12110 | if ((asc_dvc->bus_type & ASC_IS_ISA) != 0) { | 10951 | if ((asc_dvc->bus_type & ASC_IS_ISA) != 0) { |
12111 | asc_dvc->cfg->isa_dma_channel = (uchar) AscGetIsaDmaChannel(iop_base); | 10952 | asc_dvc->cfg->isa_dma_channel = |
12112 | } | 10953 | (uchar)AscGetIsaDmaChannel(iop_base); |
10954 | } | ||
12113 | #endif /* CONFIG_ISA */ | 10955 | #endif /* CONFIG_ISA */ |
12114 | for (i = 0; i <= ASC_MAX_TID; i++) { | 10956 | for (i = 0; i <= ASC_MAX_TID; i++) { |
12115 | asc_dvc->cur_dvc_qng[i] = 0; | 10957 | asc_dvc->cur_dvc_qng[i] = 0; |
12116 | asc_dvc->max_dvc_qng[i] = ASC_MAX_SCSI1_QNG; | 10958 | asc_dvc->max_dvc_qng[i] = ASC_MAX_SCSI1_QNG; |
12117 | asc_dvc->scsiq_busy_head[i] = (ASC_SCSI_Q *) 0L; | 10959 | asc_dvc->scsiq_busy_head[i] = (ASC_SCSI_Q *)0L; |
12118 | asc_dvc->scsiq_busy_tail[i] = (ASC_SCSI_Q *) 0L; | 10960 | asc_dvc->scsiq_busy_tail[i] = (ASC_SCSI_Q *)0L; |
12119 | asc_dvc->cfg->max_tag_qng[i] = ASC_MAX_INRAM_TAG_QNG; | 10961 | asc_dvc->cfg->max_tag_qng[i] = ASC_MAX_INRAM_TAG_QNG; |
12120 | } | 10962 | } |
12121 | return (warn_code); | 10963 | return (warn_code); |
12122 | } | 10964 | } |
12123 | 10965 | ||
12124 | STATIC ushort __init | 10966 | static ushort __init AscInitFromEEP(ASC_DVC_VAR *asc_dvc) |
12125 | AscInitFromEEP(ASC_DVC_VAR *asc_dvc) | ||
12126 | { | 10967 | { |
12127 | ASCEEP_CONFIG eep_config_buf; | 10968 | ASCEEP_CONFIG eep_config_buf; |
12128 | ASCEEP_CONFIG *eep_config; | 10969 | ASCEEP_CONFIG *eep_config; |
12129 | PortAddr iop_base; | 10970 | PortAddr iop_base; |
12130 | ushort chksum; | 10971 | ushort chksum; |
12131 | ushort warn_code; | 10972 | ushort warn_code; |
12132 | ushort cfg_msw, cfg_lsw; | 10973 | ushort cfg_msw, cfg_lsw; |
12133 | int i; | 10974 | int i; |
12134 | int write_eep = 0; | 10975 | int write_eep = 0; |
12135 | 10976 | ||
12136 | iop_base = asc_dvc->iop_base; | 10977 | iop_base = asc_dvc->iop_base; |
12137 | warn_code = 0; | 10978 | warn_code = 0; |
12138 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0x00FE); | 10979 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0x00FE); |
12139 | AscStopQueueExe(iop_base); | 10980 | AscStopQueueExe(iop_base); |
12140 | if ((AscStopChip(iop_base) == FALSE) || | 10981 | if ((AscStopChip(iop_base) == FALSE) || |
12141 | (AscGetChipScsiCtrl(iop_base) != 0)) { | 10982 | (AscGetChipScsiCtrl(iop_base) != 0)) { |
12142 | asc_dvc->init_state |= ASC_INIT_RESET_SCSI_DONE; | 10983 | asc_dvc->init_state |= ASC_INIT_RESET_SCSI_DONE; |
12143 | AscResetChipAndScsiBus(asc_dvc); | 10984 | AscResetChipAndScsiBus(asc_dvc); |
12144 | DvcSleepMilliSecond((ASC_DCNT) | 10985 | DvcSleepMilliSecond((ASC_DCNT) |
12145 | ((ushort) asc_dvc->scsi_reset_wait * 1000)); | 10986 | ((ushort)asc_dvc->scsi_reset_wait * 1000)); |
12146 | } | 10987 | } |
12147 | if (AscIsChipHalted(iop_base) == FALSE) { | 10988 | if (AscIsChipHalted(iop_base) == FALSE) { |
12148 | asc_dvc->err_code |= ASC_IERR_START_STOP_CHIP; | 10989 | asc_dvc->err_code |= ASC_IERR_START_STOP_CHIP; |
12149 | return (warn_code); | 10990 | return (warn_code); |
12150 | } | 10991 | } |
12151 | AscSetPCAddr(iop_base, ASC_MCODE_START_ADDR); | 10992 | AscSetPCAddr(iop_base, ASC_MCODE_START_ADDR); |
12152 | if (AscGetPCAddr(iop_base) != ASC_MCODE_START_ADDR) { | 10993 | if (AscGetPCAddr(iop_base) != ASC_MCODE_START_ADDR) { |
12153 | asc_dvc->err_code |= ASC_IERR_SET_PC_ADDR; | 10994 | asc_dvc->err_code |= ASC_IERR_SET_PC_ADDR; |
12154 | return (warn_code); | 10995 | return (warn_code); |
12155 | } | 10996 | } |
12156 | eep_config = (ASCEEP_CONFIG *) &eep_config_buf; | 10997 | eep_config = (ASCEEP_CONFIG *)&eep_config_buf; |
12157 | cfg_msw = AscGetChipCfgMsw(iop_base); | 10998 | cfg_msw = AscGetChipCfgMsw(iop_base); |
12158 | cfg_lsw = AscGetChipCfgLsw(iop_base); | 10999 | cfg_lsw = AscGetChipCfgLsw(iop_base); |
12159 | if ((cfg_msw & ASC_CFG_MSW_CLR_MASK) != 0) { | 11000 | if ((cfg_msw & ASC_CFG_MSW_CLR_MASK) != 0) { |
12160 | cfg_msw &= (~(ASC_CFG_MSW_CLR_MASK)); | 11001 | cfg_msw &= (~(ASC_CFG_MSW_CLR_MASK)); |
12161 | warn_code |= ASC_WARN_CFG_MSW_RECOVER; | 11002 | warn_code |= ASC_WARN_CFG_MSW_RECOVER; |
12162 | AscSetChipCfgMsw(iop_base, cfg_msw); | 11003 | AscSetChipCfgMsw(iop_base, cfg_msw); |
12163 | } | 11004 | } |
12164 | chksum = AscGetEEPConfig(iop_base, eep_config, asc_dvc->bus_type); | 11005 | chksum = AscGetEEPConfig(iop_base, eep_config, asc_dvc->bus_type); |
12165 | ASC_DBG1(1, "AscInitFromEEP: chksum 0x%x\n", chksum); | 11006 | ASC_DBG1(1, "AscInitFromEEP: chksum 0x%x\n", chksum); |
12166 | if (chksum == 0) { | 11007 | if (chksum == 0) { |
12167 | chksum = 0xaa55; | 11008 | chksum = 0xaa55; |
12168 | } | 11009 | } |
12169 | if (AscGetChipStatus(iop_base) & CSW_AUTO_CONFIG) { | 11010 | if (AscGetChipStatus(iop_base) & CSW_AUTO_CONFIG) { |
12170 | warn_code |= ASC_WARN_AUTO_CONFIG; | 11011 | warn_code |= ASC_WARN_AUTO_CONFIG; |
12171 | if (asc_dvc->cfg->chip_version == 3) { | 11012 | if (asc_dvc->cfg->chip_version == 3) { |
12172 | if (eep_config->cfg_lsw != cfg_lsw) { | 11013 | if (eep_config->cfg_lsw != cfg_lsw) { |
12173 | warn_code |= ASC_WARN_EEPROM_RECOVER; | 11014 | warn_code |= ASC_WARN_EEPROM_RECOVER; |
12174 | eep_config->cfg_lsw = AscGetChipCfgLsw(iop_base); | 11015 | eep_config->cfg_lsw = |
12175 | } | 11016 | AscGetChipCfgLsw(iop_base); |
12176 | if (eep_config->cfg_msw != cfg_msw) { | 11017 | } |
12177 | warn_code |= ASC_WARN_EEPROM_RECOVER; | 11018 | if (eep_config->cfg_msw != cfg_msw) { |
12178 | eep_config->cfg_msw = AscGetChipCfgMsw(iop_base); | 11019 | warn_code |= ASC_WARN_EEPROM_RECOVER; |
12179 | } | 11020 | eep_config->cfg_msw = |
12180 | } | 11021 | AscGetChipCfgMsw(iop_base); |
12181 | } | 11022 | } |
12182 | eep_config->cfg_msw &= ~ASC_CFG_MSW_CLR_MASK; | 11023 | } |
12183 | eep_config->cfg_lsw |= ASC_CFG0_HOST_INT_ON; | 11024 | } |
12184 | ASC_DBG1(1, "AscInitFromEEP: eep_config->chksum 0x%x\n", | 11025 | eep_config->cfg_msw &= ~ASC_CFG_MSW_CLR_MASK; |
12185 | eep_config->chksum); | 11026 | eep_config->cfg_lsw |= ASC_CFG0_HOST_INT_ON; |
12186 | if (chksum != eep_config->chksum) { | 11027 | ASC_DBG1(1, "AscInitFromEEP: eep_config->chksum 0x%x\n", |
12187 | if (AscGetChipVersion(iop_base, asc_dvc->bus_type) == | 11028 | eep_config->chksum); |
12188 | ASC_CHIP_VER_PCI_ULTRA_3050 ) | 11029 | if (chksum != eep_config->chksum) { |
12189 | { | 11030 | if (AscGetChipVersion(iop_base, asc_dvc->bus_type) == |
12190 | ASC_DBG(1, | 11031 | ASC_CHIP_VER_PCI_ULTRA_3050) { |
12191 | "AscInitFromEEP: chksum error ignored; EEPROM-less board\n"); | 11032 | ASC_DBG(1, |
12192 | eep_config->init_sdtr = 0xFF; | 11033 | "AscInitFromEEP: chksum error ignored; EEPROM-less board\n"); |
12193 | eep_config->disc_enable = 0xFF; | 11034 | eep_config->init_sdtr = 0xFF; |
12194 | eep_config->start_motor = 0xFF; | 11035 | eep_config->disc_enable = 0xFF; |
12195 | eep_config->use_cmd_qng = 0; | 11036 | eep_config->start_motor = 0xFF; |
12196 | eep_config->max_total_qng = 0xF0; | 11037 | eep_config->use_cmd_qng = 0; |
12197 | eep_config->max_tag_qng = 0x20; | 11038 | eep_config->max_total_qng = 0xF0; |
12198 | eep_config->cntl = 0xBFFF; | 11039 | eep_config->max_tag_qng = 0x20; |
12199 | ASC_EEP_SET_CHIP_ID(eep_config, 7); | 11040 | eep_config->cntl = 0xBFFF; |
12200 | eep_config->no_scam = 0; | 11041 | ASC_EEP_SET_CHIP_ID(eep_config, 7); |
12201 | eep_config->adapter_info[0] = 0; | 11042 | eep_config->no_scam = 0; |
12202 | eep_config->adapter_info[1] = 0; | 11043 | eep_config->adapter_info[0] = 0; |
12203 | eep_config->adapter_info[2] = 0; | 11044 | eep_config->adapter_info[1] = 0; |
12204 | eep_config->adapter_info[3] = 0; | 11045 | eep_config->adapter_info[2] = 0; |
12205 | eep_config->adapter_info[4] = 0; | 11046 | eep_config->adapter_info[3] = 0; |
12206 | /* Indicate EEPROM-less board. */ | 11047 | eep_config->adapter_info[4] = 0; |
12207 | eep_config->adapter_info[5] = 0xBB; | 11048 | /* Indicate EEPROM-less board. */ |
12208 | } else { | 11049 | eep_config->adapter_info[5] = 0xBB; |
12209 | ASC_PRINT( | 11050 | } else { |
12210 | "AscInitFromEEP: EEPROM checksum error; Will try to re-write EEPROM.\n"); | 11051 | ASC_PRINT |
12211 | write_eep = 1; | 11052 | ("AscInitFromEEP: EEPROM checksum error; Will try to re-write EEPROM.\n"); |
12212 | warn_code |= ASC_WARN_EEPROM_CHKSUM; | 11053 | write_eep = 1; |
12213 | } | 11054 | warn_code |= ASC_WARN_EEPROM_CHKSUM; |
12214 | } | 11055 | } |
12215 | asc_dvc->cfg->sdtr_enable = eep_config->init_sdtr; | 11056 | } |
12216 | asc_dvc->cfg->disc_enable = eep_config->disc_enable; | 11057 | asc_dvc->cfg->sdtr_enable = eep_config->init_sdtr; |
12217 | asc_dvc->cfg->cmd_qng_enabled = eep_config->use_cmd_qng; | 11058 | asc_dvc->cfg->disc_enable = eep_config->disc_enable; |
12218 | asc_dvc->cfg->isa_dma_speed = ASC_EEP_GET_DMA_SPD(eep_config); | 11059 | asc_dvc->cfg->cmd_qng_enabled = eep_config->use_cmd_qng; |
12219 | asc_dvc->start_motor = eep_config->start_motor; | 11060 | asc_dvc->cfg->isa_dma_speed = ASC_EEP_GET_DMA_SPD(eep_config); |
12220 | asc_dvc->dvc_cntl = eep_config->cntl; | 11061 | asc_dvc->start_motor = eep_config->start_motor; |
12221 | asc_dvc->no_scam = eep_config->no_scam; | 11062 | asc_dvc->dvc_cntl = eep_config->cntl; |
12222 | asc_dvc->cfg->adapter_info[0] = eep_config->adapter_info[0]; | 11063 | asc_dvc->no_scam = eep_config->no_scam; |
12223 | asc_dvc->cfg->adapter_info[1] = eep_config->adapter_info[1]; | 11064 | asc_dvc->cfg->adapter_info[0] = eep_config->adapter_info[0]; |
12224 | asc_dvc->cfg->adapter_info[2] = eep_config->adapter_info[2]; | 11065 | asc_dvc->cfg->adapter_info[1] = eep_config->adapter_info[1]; |
12225 | asc_dvc->cfg->adapter_info[3] = eep_config->adapter_info[3]; | 11066 | asc_dvc->cfg->adapter_info[2] = eep_config->adapter_info[2]; |
12226 | asc_dvc->cfg->adapter_info[4] = eep_config->adapter_info[4]; | 11067 | asc_dvc->cfg->adapter_info[3] = eep_config->adapter_info[3]; |
12227 | asc_dvc->cfg->adapter_info[5] = eep_config->adapter_info[5]; | 11068 | asc_dvc->cfg->adapter_info[4] = eep_config->adapter_info[4]; |
12228 | if (!AscTestExternalLram(asc_dvc)) { | 11069 | asc_dvc->cfg->adapter_info[5] = eep_config->adapter_info[5]; |
12229 | if (((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA)) { | 11070 | if (!AscTestExternalLram(asc_dvc)) { |
12230 | eep_config->max_total_qng = ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG; | 11071 | if (((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == |
12231 | eep_config->max_tag_qng = ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG; | 11072 | ASC_IS_PCI_ULTRA)) { |
12232 | } else { | 11073 | eep_config->max_total_qng = |
12233 | eep_config->cfg_msw |= 0x0800; | 11074 | ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG; |
12234 | cfg_msw |= 0x0800; | 11075 | eep_config->max_tag_qng = |
12235 | AscSetChipCfgMsw(iop_base, cfg_msw); | 11076 | ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG; |
12236 | eep_config->max_total_qng = ASC_MAX_PCI_INRAM_TOTAL_QNG; | 11077 | } else { |
12237 | eep_config->max_tag_qng = ASC_MAX_INRAM_TAG_QNG; | 11078 | eep_config->cfg_msw |= 0x0800; |
12238 | } | 11079 | cfg_msw |= 0x0800; |
12239 | } else { | 11080 | AscSetChipCfgMsw(iop_base, cfg_msw); |
12240 | } | 11081 | eep_config->max_total_qng = ASC_MAX_PCI_INRAM_TOTAL_QNG; |
12241 | if (eep_config->max_total_qng < ASC_MIN_TOTAL_QNG) { | 11082 | eep_config->max_tag_qng = ASC_MAX_INRAM_TAG_QNG; |
12242 | eep_config->max_total_qng = ASC_MIN_TOTAL_QNG; | 11083 | } |
12243 | } | 11084 | } else { |
12244 | if (eep_config->max_total_qng > ASC_MAX_TOTAL_QNG) { | 11085 | } |
12245 | eep_config->max_total_qng = ASC_MAX_TOTAL_QNG; | 11086 | if (eep_config->max_total_qng < ASC_MIN_TOTAL_QNG) { |
12246 | } | 11087 | eep_config->max_total_qng = ASC_MIN_TOTAL_QNG; |
12247 | if (eep_config->max_tag_qng > eep_config->max_total_qng) { | 11088 | } |
12248 | eep_config->max_tag_qng = eep_config->max_total_qng; | 11089 | if (eep_config->max_total_qng > ASC_MAX_TOTAL_QNG) { |
12249 | } | 11090 | eep_config->max_total_qng = ASC_MAX_TOTAL_QNG; |
12250 | if (eep_config->max_tag_qng < ASC_MIN_TAG_Q_PER_DVC) { | 11091 | } |
12251 | eep_config->max_tag_qng = ASC_MIN_TAG_Q_PER_DVC; | 11092 | if (eep_config->max_tag_qng > eep_config->max_total_qng) { |
12252 | } | 11093 | eep_config->max_tag_qng = eep_config->max_total_qng; |
12253 | asc_dvc->max_total_qng = eep_config->max_total_qng; | 11094 | } |
12254 | if ((eep_config->use_cmd_qng & eep_config->disc_enable) != | 11095 | if (eep_config->max_tag_qng < ASC_MIN_TAG_Q_PER_DVC) { |
12255 | eep_config->use_cmd_qng) { | 11096 | eep_config->max_tag_qng = ASC_MIN_TAG_Q_PER_DVC; |
12256 | eep_config->disc_enable = eep_config->use_cmd_qng; | 11097 | } |
12257 | warn_code |= ASC_WARN_CMD_QNG_CONFLICT; | 11098 | asc_dvc->max_total_qng = eep_config->max_total_qng; |
12258 | } | 11099 | if ((eep_config->use_cmd_qng & eep_config->disc_enable) != |
12259 | if (asc_dvc->bus_type & (ASC_IS_ISA | ASC_IS_VL | ASC_IS_EISA)) { | 11100 | eep_config->use_cmd_qng) { |
12260 | asc_dvc->irq_no = AscGetChipIRQ(iop_base, asc_dvc->bus_type); | 11101 | eep_config->disc_enable = eep_config->use_cmd_qng; |
12261 | } | 11102 | warn_code |= ASC_WARN_CMD_QNG_CONFLICT; |
12262 | ASC_EEP_SET_CHIP_ID(eep_config, ASC_EEP_GET_CHIP_ID(eep_config) & ASC_MAX_TID); | 11103 | } |
12263 | asc_dvc->cfg->chip_scsi_id = ASC_EEP_GET_CHIP_ID(eep_config); | 11104 | if (asc_dvc->bus_type & (ASC_IS_ISA | ASC_IS_VL | ASC_IS_EISA)) { |
12264 | if (((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) && | 11105 | asc_dvc->irq_no = AscGetChipIRQ(iop_base, asc_dvc->bus_type); |
12265 | !(asc_dvc->dvc_cntl & ASC_CNTL_SDTR_ENABLE_ULTRA)) { | 11106 | } |
12266 | asc_dvc->host_init_sdtr_index = ASC_SDTR_ULTRA_PCI_10MB_INDEX; | 11107 | ASC_EEP_SET_CHIP_ID(eep_config, |
12267 | } | 11108 | ASC_EEP_GET_CHIP_ID(eep_config) & ASC_MAX_TID); |
11109 | asc_dvc->cfg->chip_scsi_id = ASC_EEP_GET_CHIP_ID(eep_config); | ||
11110 | if (((asc_dvc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) && | ||
11111 | !(asc_dvc->dvc_cntl & ASC_CNTL_SDTR_ENABLE_ULTRA)) { | ||
11112 | asc_dvc->host_init_sdtr_index = ASC_SDTR_ULTRA_PCI_10MB_INDEX; | ||
11113 | } | ||
12268 | 11114 | ||
12269 | for (i = 0; i <= ASC_MAX_TID; i++) { | 11115 | for (i = 0; i <= ASC_MAX_TID; i++) { |
12270 | asc_dvc->dos_int13_table[i] = eep_config->dos_int13_table[i]; | 11116 | asc_dvc->dos_int13_table[i] = eep_config->dos_int13_table[i]; |
12271 | asc_dvc->cfg->max_tag_qng[i] = eep_config->max_tag_qng; | 11117 | asc_dvc->cfg->max_tag_qng[i] = eep_config->max_tag_qng; |
12272 | asc_dvc->cfg->sdtr_period_offset[i] = | 11118 | asc_dvc->cfg->sdtr_period_offset[i] = |
12273 | (uchar) (ASC_DEF_SDTR_OFFSET | | 11119 | (uchar)(ASC_DEF_SDTR_OFFSET | |
12274 | (asc_dvc->host_init_sdtr_index << 4)); | 11120 | (asc_dvc->host_init_sdtr_index << 4)); |
12275 | } | 11121 | } |
12276 | eep_config->cfg_msw = AscGetChipCfgMsw(iop_base); | 11122 | eep_config->cfg_msw = AscGetChipCfgMsw(iop_base); |
12277 | if (write_eep) { | 11123 | if (write_eep) { |
12278 | if ((i = AscSetEEPConfig(iop_base, eep_config, asc_dvc->bus_type)) != | 11124 | if ((i = |
12279 | 0) { | 11125 | AscSetEEPConfig(iop_base, eep_config, |
12280 | ASC_PRINT1( | 11126 | asc_dvc->bus_type)) != 0) { |
12281 | "AscInitFromEEP: Failed to re-write EEPROM with %d errors.\n", i); | 11127 | ASC_PRINT1 |
12282 | } else { | 11128 | ("AscInitFromEEP: Failed to re-write EEPROM with %d errors.\n", |
12283 | ASC_PRINT("AscInitFromEEP: Successfully re-wrote EEPROM.\n"); | 11129 | i); |
12284 | } | 11130 | } else { |
12285 | } | 11131 | ASC_PRINT |
12286 | return (warn_code); | 11132 | ("AscInitFromEEP: Successfully re-wrote EEPROM.\n"); |
11133 | } | ||
11134 | } | ||
11135 | return (warn_code); | ||
12287 | } | 11136 | } |
12288 | 11137 | ||
12289 | STATIC ushort | 11138 | static ushort AscInitMicroCodeVar(ASC_DVC_VAR *asc_dvc) |
12290 | AscInitMicroCodeVar( | ||
12291 | ASC_DVC_VAR *asc_dvc | ||
12292 | ) | ||
12293 | { | 11139 | { |
12294 | int i; | 11140 | int i; |
12295 | ushort warn_code; | 11141 | ushort warn_code; |
12296 | PortAddr iop_base; | 11142 | PortAddr iop_base; |
12297 | ASC_PADDR phy_addr; | 11143 | ASC_PADDR phy_addr; |
12298 | ASC_DCNT phy_size; | 11144 | ASC_DCNT phy_size; |
12299 | 11145 | ||
12300 | iop_base = asc_dvc->iop_base; | 11146 | iop_base = asc_dvc->iop_base; |
12301 | warn_code = 0; | 11147 | warn_code = 0; |
12302 | for (i = 0; i <= ASC_MAX_TID; i++) { | 11148 | for (i = 0; i <= ASC_MAX_TID; i++) { |
12303 | AscPutMCodeInitSDTRAtID(iop_base, i, | 11149 | AscPutMCodeInitSDTRAtID(iop_base, i, |
12304 | asc_dvc->cfg->sdtr_period_offset[i] | 11150 | asc_dvc->cfg->sdtr_period_offset[i] |
12305 | ); | 11151 | ); |
12306 | } | 11152 | } |
12307 | 11153 | ||
12308 | AscInitQLinkVar(asc_dvc); | 11154 | AscInitQLinkVar(asc_dvc); |
12309 | AscWriteLramByte(iop_base, ASCV_DISC_ENABLE_B, | 11155 | AscWriteLramByte(iop_base, ASCV_DISC_ENABLE_B, |
12310 | asc_dvc->cfg->disc_enable); | 11156 | asc_dvc->cfg->disc_enable); |
12311 | AscWriteLramByte(iop_base, ASCV_HOSTSCSI_ID_B, | 11157 | AscWriteLramByte(iop_base, ASCV_HOSTSCSI_ID_B, |
12312 | ASC_TID_TO_TARGET_ID(asc_dvc->cfg->chip_scsi_id)); | 11158 | ASC_TID_TO_TARGET_ID(asc_dvc->cfg->chip_scsi_id)); |
12313 | 11159 | ||
12314 | /* Align overrun buffer on an 8 byte boundary. */ | 11160 | /* Align overrun buffer on an 8 byte boundary. */ |
12315 | phy_addr = virt_to_bus(asc_dvc->cfg->overrun_buf); | 11161 | phy_addr = virt_to_bus(asc_dvc->cfg->overrun_buf); |
12316 | phy_addr = cpu_to_le32((phy_addr + 7) & ~0x7); | 11162 | phy_addr = cpu_to_le32((phy_addr + 7) & ~0x7); |
12317 | AscMemDWordCopyPtrToLram(iop_base, ASCV_OVERRUN_PADDR_D, | 11163 | AscMemDWordCopyPtrToLram(iop_base, ASCV_OVERRUN_PADDR_D, |
12318 | (uchar *) &phy_addr, 1); | 11164 | (uchar *)&phy_addr, 1); |
12319 | phy_size = cpu_to_le32(ASC_OVERRUN_BSIZE - 8); | 11165 | phy_size = cpu_to_le32(ASC_OVERRUN_BSIZE - 8); |
12320 | AscMemDWordCopyPtrToLram(iop_base, ASCV_OVERRUN_BSIZE_D, | 11166 | AscMemDWordCopyPtrToLram(iop_base, ASCV_OVERRUN_BSIZE_D, |
12321 | (uchar *) &phy_size, 1); | 11167 | (uchar *)&phy_size, 1); |
12322 | 11168 | ||
12323 | asc_dvc->cfg->mcode_date = | 11169 | asc_dvc->cfg->mcode_date = |
12324 | AscReadLramWord(iop_base, (ushort) ASCV_MC_DATE_W); | 11170 | AscReadLramWord(iop_base, (ushort)ASCV_MC_DATE_W); |
12325 | asc_dvc->cfg->mcode_version = | 11171 | asc_dvc->cfg->mcode_version = |
12326 | AscReadLramWord(iop_base, (ushort) ASCV_MC_VER_W); | 11172 | AscReadLramWord(iop_base, (ushort)ASCV_MC_VER_W); |
12327 | 11173 | ||
12328 | AscSetPCAddr(iop_base, ASC_MCODE_START_ADDR); | 11174 | AscSetPCAddr(iop_base, ASC_MCODE_START_ADDR); |
12329 | if (AscGetPCAddr(iop_base) != ASC_MCODE_START_ADDR) { | 11175 | if (AscGetPCAddr(iop_base) != ASC_MCODE_START_ADDR) { |
12330 | asc_dvc->err_code |= ASC_IERR_SET_PC_ADDR; | 11176 | asc_dvc->err_code |= ASC_IERR_SET_PC_ADDR; |
12331 | return (warn_code); | 11177 | return (warn_code); |
12332 | } | 11178 | } |
12333 | if (AscStartChip(iop_base) != 1) { | 11179 | if (AscStartChip(iop_base) != 1) { |
12334 | asc_dvc->err_code |= ASC_IERR_START_STOP_CHIP; | 11180 | asc_dvc->err_code |= ASC_IERR_START_STOP_CHIP; |
12335 | return (warn_code); | 11181 | return (warn_code); |
12336 | } | 11182 | } |
12337 | 11183 | ||
12338 | return (warn_code); | 11184 | return (warn_code); |
12339 | } | 11185 | } |
12340 | 11186 | ||
12341 | STATIC int __init | 11187 | static int __init AscTestExternalLram(ASC_DVC_VAR *asc_dvc) |
12342 | AscTestExternalLram( | ||
12343 | ASC_DVC_VAR *asc_dvc) | ||
12344 | { | 11188 | { |
12345 | PortAddr iop_base; | 11189 | PortAddr iop_base; |
12346 | ushort q_addr; | 11190 | ushort q_addr; |
12347 | ushort saved_word; | 11191 | ushort saved_word; |
12348 | int sta; | 11192 | int sta; |
12349 | 11193 | ||
12350 | iop_base = asc_dvc->iop_base; | 11194 | iop_base = asc_dvc->iop_base; |
12351 | sta = 0; | 11195 | sta = 0; |
12352 | q_addr = ASC_QNO_TO_QADDR(241); | 11196 | q_addr = ASC_QNO_TO_QADDR(241); |
12353 | saved_word = AscReadLramWord(iop_base, q_addr); | 11197 | saved_word = AscReadLramWord(iop_base, q_addr); |
12354 | AscSetChipLramAddr(iop_base, q_addr); | 11198 | AscSetChipLramAddr(iop_base, q_addr); |
12355 | AscSetChipLramData(iop_base, 0x55AA); | 11199 | AscSetChipLramData(iop_base, 0x55AA); |
12356 | DvcSleepMilliSecond(10); | 11200 | DvcSleepMilliSecond(10); |
12357 | AscSetChipLramAddr(iop_base, q_addr); | 11201 | AscSetChipLramAddr(iop_base, q_addr); |
12358 | if (AscGetChipLramData(iop_base) == 0x55AA) { | 11202 | if (AscGetChipLramData(iop_base) == 0x55AA) { |
12359 | sta = 1; | 11203 | sta = 1; |
12360 | AscWriteLramWord(iop_base, q_addr, saved_word); | 11204 | AscWriteLramWord(iop_base, q_addr, saved_word); |
12361 | } | 11205 | } |
12362 | return (sta); | 11206 | return (sta); |
12363 | } | 11207 | } |
12364 | 11208 | ||
12365 | STATIC int __init | 11209 | static int __init AscWriteEEPCmdReg(PortAddr iop_base, uchar cmd_reg) |
12366 | AscWriteEEPCmdReg( | ||
12367 | PortAddr iop_base, | ||
12368 | uchar cmd_reg | ||
12369 | ) | ||
12370 | { | 11210 | { |
12371 | uchar read_back; | 11211 | uchar read_back; |
12372 | int retry; | 11212 | int retry; |
12373 | 11213 | ||
12374 | retry = 0; | 11214 | retry = 0; |
12375 | while (TRUE) { | 11215 | while (TRUE) { |
12376 | AscSetChipEEPCmd(iop_base, cmd_reg); | 11216 | AscSetChipEEPCmd(iop_base, cmd_reg); |
12377 | DvcSleepMilliSecond(1); | 11217 | DvcSleepMilliSecond(1); |
12378 | read_back = AscGetChipEEPCmd(iop_base); | 11218 | read_back = AscGetChipEEPCmd(iop_base); |
12379 | if (read_back == cmd_reg) { | 11219 | if (read_back == cmd_reg) { |
12380 | return (1); | 11220 | return (1); |
12381 | } | 11221 | } |
12382 | if (retry++ > ASC_EEP_MAX_RETRY) { | 11222 | if (retry++ > ASC_EEP_MAX_RETRY) { |
12383 | return (0); | 11223 | return (0); |
12384 | } | 11224 | } |
12385 | } | 11225 | } |
12386 | } | 11226 | } |
12387 | 11227 | ||
12388 | STATIC int __init | 11228 | static int __init AscWriteEEPDataReg(PortAddr iop_base, ushort data_reg) |
12389 | AscWriteEEPDataReg( | ||
12390 | PortAddr iop_base, | ||
12391 | ushort data_reg | ||
12392 | ) | ||
12393 | { | 11229 | { |
12394 | ushort read_back; | 11230 | ushort read_back; |
12395 | int retry; | 11231 | int retry; |
12396 | 11232 | ||
12397 | retry = 0; | 11233 | retry = 0; |
12398 | while (TRUE) { | 11234 | while (TRUE) { |
12399 | AscSetChipEEPData(iop_base, data_reg); | 11235 | AscSetChipEEPData(iop_base, data_reg); |
12400 | DvcSleepMilliSecond(1); | 11236 | DvcSleepMilliSecond(1); |
12401 | read_back = AscGetChipEEPData(iop_base); | 11237 | read_back = AscGetChipEEPData(iop_base); |
12402 | if (read_back == data_reg) { | 11238 | if (read_back == data_reg) { |
12403 | return (1); | 11239 | return (1); |
12404 | } | 11240 | } |
12405 | if (retry++ > ASC_EEP_MAX_RETRY) { | 11241 | if (retry++ > ASC_EEP_MAX_RETRY) { |
12406 | return (0); | 11242 | return (0); |
12407 | } | 11243 | } |
12408 | } | 11244 | } |
12409 | } | 11245 | } |
12410 | 11246 | ||
12411 | STATIC void __init | 11247 | static void __init AscWaitEEPRead(void) |
12412 | AscWaitEEPRead(void) | ||
12413 | { | 11248 | { |
12414 | DvcSleepMilliSecond(1); | 11249 | DvcSleepMilliSecond(1); |
12415 | return; | 11250 | return; |
12416 | } | 11251 | } |
12417 | 11252 | ||
12418 | STATIC void __init | 11253 | static void __init AscWaitEEPWrite(void) |
12419 | AscWaitEEPWrite(void) | ||
12420 | { | 11254 | { |
12421 | DvcSleepMilliSecond(20); | 11255 | DvcSleepMilliSecond(20); |
12422 | return; | 11256 | return; |
12423 | } | 11257 | } |
12424 | 11258 | ||
12425 | STATIC ushort __init | 11259 | static ushort __init AscReadEEPWord(PortAddr iop_base, uchar addr) |
12426 | AscReadEEPWord( | ||
12427 | PortAddr iop_base, | ||
12428 | uchar addr) | ||
12429 | { | 11260 | { |
12430 | ushort read_wval; | 11261 | ushort read_wval; |
12431 | uchar cmd_reg; | 11262 | uchar cmd_reg; |
12432 | 11263 | ||
12433 | AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_DISABLE); | 11264 | AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_DISABLE); |
12434 | AscWaitEEPRead(); | 11265 | AscWaitEEPRead(); |
12435 | cmd_reg = addr | ASC_EEP_CMD_READ; | 11266 | cmd_reg = addr | ASC_EEP_CMD_READ; |
12436 | AscWriteEEPCmdReg(iop_base, cmd_reg); | 11267 | AscWriteEEPCmdReg(iop_base, cmd_reg); |
12437 | AscWaitEEPRead(); | 11268 | AscWaitEEPRead(); |
12438 | read_wval = AscGetChipEEPData(iop_base); | 11269 | read_wval = AscGetChipEEPData(iop_base); |
12439 | AscWaitEEPRead(); | 11270 | AscWaitEEPRead(); |
12440 | return (read_wval); | 11271 | return (read_wval); |
12441 | } | 11272 | } |
12442 | 11273 | ||
12443 | STATIC ushort __init | 11274 | static ushort __init |
12444 | AscWriteEEPWord( | 11275 | AscWriteEEPWord(PortAddr iop_base, uchar addr, ushort word_val) |
12445 | PortAddr iop_base, | ||
12446 | uchar addr, | ||
12447 | ushort word_val) | ||
12448 | { | 11276 | { |
12449 | ushort read_wval; | 11277 | ushort read_wval; |
12450 | 11278 | ||
12451 | read_wval = AscReadEEPWord(iop_base, addr); | 11279 | read_wval = AscReadEEPWord(iop_base, addr); |
12452 | if (read_wval != word_val) { | 11280 | if (read_wval != word_val) { |
12453 | AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_ABLE); | 11281 | AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_ABLE); |
12454 | AscWaitEEPRead(); | 11282 | AscWaitEEPRead(); |
12455 | AscWriteEEPDataReg(iop_base, word_val); | 11283 | AscWriteEEPDataReg(iop_base, word_val); |
12456 | AscWaitEEPRead(); | 11284 | AscWaitEEPRead(); |
12457 | AscWriteEEPCmdReg(iop_base, | 11285 | AscWriteEEPCmdReg(iop_base, |
12458 | (uchar) ((uchar) ASC_EEP_CMD_WRITE | addr)); | 11286 | (uchar)((uchar)ASC_EEP_CMD_WRITE | addr)); |
12459 | AscWaitEEPWrite(); | 11287 | AscWaitEEPWrite(); |
12460 | AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_DISABLE); | 11288 | AscWriteEEPCmdReg(iop_base, ASC_EEP_CMD_WRITE_DISABLE); |
12461 | AscWaitEEPRead(); | 11289 | AscWaitEEPRead(); |
12462 | return (AscReadEEPWord(iop_base, addr)); | 11290 | return (AscReadEEPWord(iop_base, addr)); |
12463 | } | 11291 | } |
12464 | return (read_wval); | 11292 | return (read_wval); |
12465 | } | 11293 | } |
12466 | 11294 | ||
12467 | STATIC ushort __init | 11295 | static ushort __init |
12468 | AscGetEEPConfig( | 11296 | AscGetEEPConfig(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type) |
12469 | PortAddr iop_base, | ||
12470 | ASCEEP_CONFIG * cfg_buf, ushort bus_type) | ||
12471 | { | 11297 | { |
12472 | ushort wval; | 11298 | ushort wval; |
12473 | ushort sum; | 11299 | ushort sum; |
12474 | ushort *wbuf; | 11300 | ushort *wbuf; |
12475 | int cfg_beg; | 11301 | int cfg_beg; |
12476 | int cfg_end; | 11302 | int cfg_end; |
12477 | int uchar_end_in_config = ASC_EEP_MAX_DVC_ADDR - 2; | 11303 | int uchar_end_in_config = ASC_EEP_MAX_DVC_ADDR - 2; |
12478 | int s_addr; | 11304 | int s_addr; |
12479 | 11305 | ||
12480 | wbuf = (ushort *) cfg_buf; | 11306 | wbuf = (ushort *)cfg_buf; |
12481 | sum = 0; | 11307 | sum = 0; |
12482 | /* Read two config words; Byte-swapping done by AscReadEEPWord(). */ | 11308 | /* Read two config words; Byte-swapping done by AscReadEEPWord(). */ |
12483 | for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) { | 11309 | for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) { |
12484 | *wbuf = AscReadEEPWord(iop_base, (uchar) s_addr); | 11310 | *wbuf = AscReadEEPWord(iop_base, (uchar)s_addr); |
12485 | sum += *wbuf; | 11311 | sum += *wbuf; |
12486 | } | 11312 | } |
12487 | if (bus_type & ASC_IS_VL) { | 11313 | if (bus_type & ASC_IS_VL) { |
12488 | cfg_beg = ASC_EEP_DVC_CFG_BEG_VL; | 11314 | cfg_beg = ASC_EEP_DVC_CFG_BEG_VL; |
12489 | cfg_end = ASC_EEP_MAX_DVC_ADDR_VL; | 11315 | cfg_end = ASC_EEP_MAX_DVC_ADDR_VL; |
12490 | } else { | 11316 | } else { |
12491 | cfg_beg = ASC_EEP_DVC_CFG_BEG; | 11317 | cfg_beg = ASC_EEP_DVC_CFG_BEG; |
12492 | cfg_end = ASC_EEP_MAX_DVC_ADDR; | 11318 | cfg_end = ASC_EEP_MAX_DVC_ADDR; |
12493 | } | 11319 | } |
12494 | for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) { | 11320 | for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) { |
12495 | wval = AscReadEEPWord( iop_base, ( uchar )s_addr ) ; | 11321 | wval = AscReadEEPWord(iop_base, (uchar)s_addr); |
12496 | if (s_addr <= uchar_end_in_config) { | 11322 | if (s_addr <= uchar_end_in_config) { |
12497 | /* | 11323 | /* |
12498 | * Swap all char fields - must unswap bytes already swapped | 11324 | * Swap all char fields - must unswap bytes already swapped |
12499 | * by AscReadEEPWord(). | 11325 | * by AscReadEEPWord(). |
12500 | */ | 11326 | */ |
12501 | *wbuf = le16_to_cpu(wval); | 11327 | *wbuf = le16_to_cpu(wval); |
12502 | } else { | 11328 | } else { |
12503 | /* Don't swap word field at the end - cntl field. */ | 11329 | /* Don't swap word field at the end - cntl field. */ |
12504 | *wbuf = wval; | 11330 | *wbuf = wval; |
12505 | } | 11331 | } |
12506 | sum += wval; /* Checksum treats all EEPROM data as words. */ | 11332 | sum += wval; /* Checksum treats all EEPROM data as words. */ |
12507 | } | 11333 | } |
12508 | /* | 11334 | /* |
12509 | * Read the checksum word which will be compared against 'sum' | 11335 | * Read the checksum word which will be compared against 'sum' |
12510 | * by the caller. Word field already swapped. | 11336 | * by the caller. Word field already swapped. |
12511 | */ | 11337 | */ |
12512 | *wbuf = AscReadEEPWord(iop_base, (uchar) s_addr); | 11338 | *wbuf = AscReadEEPWord(iop_base, (uchar)s_addr); |
12513 | return (sum); | 11339 | return (sum); |
12514 | } | 11340 | } |
12515 | 11341 | ||
12516 | STATIC int __init | 11342 | static int __init |
12517 | AscSetEEPConfigOnce( | 11343 | AscSetEEPConfigOnce(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type) |
12518 | PortAddr iop_base, | ||
12519 | ASCEEP_CONFIG * cfg_buf, ushort bus_type) | ||
12520 | { | 11344 | { |
12521 | int n_error; | 11345 | int n_error; |
12522 | ushort *wbuf; | 11346 | ushort *wbuf; |
12523 | ushort word; | 11347 | ushort word; |
12524 | ushort sum; | 11348 | ushort sum; |
12525 | int s_addr; | 11349 | int s_addr; |
12526 | int cfg_beg; | 11350 | int cfg_beg; |
12527 | int cfg_end; | 11351 | int cfg_end; |
12528 | int uchar_end_in_config = ASC_EEP_MAX_DVC_ADDR - 2; | 11352 | int uchar_end_in_config = ASC_EEP_MAX_DVC_ADDR - 2; |
12529 | 11353 | ||
12530 | 11354 | wbuf = (ushort *)cfg_buf; | |
12531 | wbuf = (ushort *) cfg_buf; | 11355 | n_error = 0; |
12532 | n_error = 0; | 11356 | sum = 0; |
12533 | sum = 0; | 11357 | /* Write two config words; AscWriteEEPWord() will swap bytes. */ |
12534 | /* Write two config words; AscWriteEEPWord() will swap bytes. */ | 11358 | for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) { |
12535 | for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) { | 11359 | sum += *wbuf; |
12536 | sum += *wbuf; | 11360 | if (*wbuf != AscWriteEEPWord(iop_base, (uchar)s_addr, *wbuf)) { |
12537 | if (*wbuf != AscWriteEEPWord(iop_base, (uchar) s_addr, *wbuf)) { | 11361 | n_error++; |
12538 | n_error++; | 11362 | } |
12539 | } | 11363 | } |
12540 | } | 11364 | if (bus_type & ASC_IS_VL) { |
12541 | if (bus_type & ASC_IS_VL) { | 11365 | cfg_beg = ASC_EEP_DVC_CFG_BEG_VL; |
12542 | cfg_beg = ASC_EEP_DVC_CFG_BEG_VL; | 11366 | cfg_end = ASC_EEP_MAX_DVC_ADDR_VL; |
12543 | cfg_end = ASC_EEP_MAX_DVC_ADDR_VL; | 11367 | } else { |
12544 | } else { | 11368 | cfg_beg = ASC_EEP_DVC_CFG_BEG; |
12545 | cfg_beg = ASC_EEP_DVC_CFG_BEG; | 11369 | cfg_end = ASC_EEP_MAX_DVC_ADDR; |
12546 | cfg_end = ASC_EEP_MAX_DVC_ADDR; | 11370 | } |
12547 | } | 11371 | for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) { |
12548 | for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) { | 11372 | if (s_addr <= uchar_end_in_config) { |
12549 | if (s_addr <= uchar_end_in_config) { | 11373 | /* |
12550 | /* | 11374 | * This is a char field. Swap char fields before they are |
12551 | * This is a char field. Swap char fields before they are | 11375 | * swapped again by AscWriteEEPWord(). |
12552 | * swapped again by AscWriteEEPWord(). | 11376 | */ |
12553 | */ | 11377 | word = cpu_to_le16(*wbuf); |
12554 | word = cpu_to_le16(*wbuf); | 11378 | if (word != |
12555 | if (word != AscWriteEEPWord( iop_base, (uchar) s_addr, word)) { | 11379 | AscWriteEEPWord(iop_base, (uchar)s_addr, word)) { |
12556 | n_error++; | 11380 | n_error++; |
12557 | } | 11381 | } |
12558 | } else { | 11382 | } else { |
12559 | /* Don't swap word field at the end - cntl field. */ | 11383 | /* Don't swap word field at the end - cntl field. */ |
12560 | if (*wbuf != AscWriteEEPWord(iop_base, (uchar) s_addr, *wbuf)) { | 11384 | if (*wbuf != |
12561 | n_error++; | 11385 | AscWriteEEPWord(iop_base, (uchar)s_addr, *wbuf)) { |
12562 | } | 11386 | n_error++; |
12563 | } | 11387 | } |
12564 | sum += *wbuf; /* Checksum calculated from word values. */ | 11388 | } |
12565 | } | 11389 | sum += *wbuf; /* Checksum calculated from word values. */ |
12566 | /* Write checksum word. It will be swapped by AscWriteEEPWord(). */ | 11390 | } |
12567 | *wbuf = sum; | 11391 | /* Write checksum word. It will be swapped by AscWriteEEPWord(). */ |
12568 | if (sum != AscWriteEEPWord(iop_base, (uchar) s_addr, sum)) { | 11392 | *wbuf = sum; |
12569 | n_error++; | 11393 | if (sum != AscWriteEEPWord(iop_base, (uchar)s_addr, sum)) { |
12570 | } | 11394 | n_error++; |
11395 | } | ||
12571 | 11396 | ||
12572 | /* Read EEPROM back again. */ | 11397 | /* Read EEPROM back again. */ |
12573 | wbuf = (ushort *) cfg_buf; | 11398 | wbuf = (ushort *)cfg_buf; |
12574 | /* | 11399 | /* |
12575 | * Read two config words; Byte-swapping done by AscReadEEPWord(). | 11400 | * Read two config words; Byte-swapping done by AscReadEEPWord(). |
12576 | */ | 11401 | */ |
12577 | for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) { | 11402 | for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) { |
12578 | if (*wbuf != AscReadEEPWord(iop_base, (uchar) s_addr)) { | 11403 | if (*wbuf != AscReadEEPWord(iop_base, (uchar)s_addr)) { |
12579 | n_error++; | 11404 | n_error++; |
12580 | } | 11405 | } |
12581 | } | 11406 | } |
12582 | if (bus_type & ASC_IS_VL) { | 11407 | if (bus_type & ASC_IS_VL) { |
12583 | cfg_beg = ASC_EEP_DVC_CFG_BEG_VL; | 11408 | cfg_beg = ASC_EEP_DVC_CFG_BEG_VL; |
12584 | cfg_end = ASC_EEP_MAX_DVC_ADDR_VL; | 11409 | cfg_end = ASC_EEP_MAX_DVC_ADDR_VL; |
12585 | } else { | 11410 | } else { |
12586 | cfg_beg = ASC_EEP_DVC_CFG_BEG; | 11411 | cfg_beg = ASC_EEP_DVC_CFG_BEG; |
12587 | cfg_end = ASC_EEP_MAX_DVC_ADDR; | 11412 | cfg_end = ASC_EEP_MAX_DVC_ADDR; |
12588 | } | 11413 | } |
12589 | for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) { | 11414 | for (s_addr = cfg_beg; s_addr <= (cfg_end - 1); s_addr++, wbuf++) { |
12590 | if (s_addr <= uchar_end_in_config) { | 11415 | if (s_addr <= uchar_end_in_config) { |
12591 | /* | 11416 | /* |
12592 | * Swap all char fields. Must unswap bytes already swapped | 11417 | * Swap all char fields. Must unswap bytes already swapped |
12593 | * by AscReadEEPWord(). | 11418 | * by AscReadEEPWord(). |
12594 | */ | 11419 | */ |
12595 | word = le16_to_cpu(AscReadEEPWord(iop_base, (uchar) s_addr)); | 11420 | word = |
12596 | } else { | 11421 | le16_to_cpu(AscReadEEPWord |
12597 | /* Don't swap word field at the end - cntl field. */ | 11422 | (iop_base, (uchar)s_addr)); |
12598 | word = AscReadEEPWord(iop_base, (uchar) s_addr); | 11423 | } else { |
12599 | } | 11424 | /* Don't swap word field at the end - cntl field. */ |
12600 | if (*wbuf != word) { | 11425 | word = AscReadEEPWord(iop_base, (uchar)s_addr); |
12601 | n_error++; | 11426 | } |
12602 | } | 11427 | if (*wbuf != word) { |
12603 | } | 11428 | n_error++; |
12604 | /* Read checksum; Byte swapping not needed. */ | 11429 | } |
12605 | if (AscReadEEPWord(iop_base, (uchar) s_addr) != sum) { | 11430 | } |
12606 | n_error++; | 11431 | /* Read checksum; Byte swapping not needed. */ |
12607 | } | 11432 | if (AscReadEEPWord(iop_base, (uchar)s_addr) != sum) { |
12608 | return (n_error); | 11433 | n_error++; |
11434 | } | ||
11435 | return (n_error); | ||
12609 | } | 11436 | } |
12610 | 11437 | ||
12611 | STATIC int __init | 11438 | static int __init |
12612 | AscSetEEPConfig( | 11439 | AscSetEEPConfig(PortAddr iop_base, ASCEEP_CONFIG *cfg_buf, ushort bus_type) |
12613 | PortAddr iop_base, | ||
12614 | ASCEEP_CONFIG * cfg_buf, ushort bus_type | ||
12615 | ) | ||
12616 | { | 11440 | { |
12617 | int retry; | 11441 | int retry; |
12618 | int n_error; | 11442 | int n_error; |
12619 | 11443 | ||
12620 | retry = 0; | 11444 | retry = 0; |
12621 | while (TRUE) { | 11445 | while (TRUE) { |
12622 | if ((n_error = AscSetEEPConfigOnce(iop_base, cfg_buf, | 11446 | if ((n_error = AscSetEEPConfigOnce(iop_base, cfg_buf, |
12623 | bus_type)) == 0) { | 11447 | bus_type)) == 0) { |
12624 | break; | 11448 | break; |
12625 | } | 11449 | } |
12626 | if (++retry > ASC_EEP_MAX_RETRY) { | 11450 | if (++retry > ASC_EEP_MAX_RETRY) { |
12627 | break; | 11451 | break; |
12628 | } | 11452 | } |
12629 | } | 11453 | } |
12630 | return (n_error); | 11454 | return (n_error); |
12631 | } | 11455 | } |
12632 | 11456 | ||
12633 | STATIC void | 11457 | static void |
12634 | AscAsyncFix( | 11458 | AscAsyncFix(ASC_DVC_VAR *asc_dvc, uchar tid_no, ASC_SCSI_INQUIRY *inq) |
12635 | ASC_DVC_VAR *asc_dvc, | ||
12636 | uchar tid_no, | ||
12637 | ASC_SCSI_INQUIRY *inq) | ||
12638 | { | 11459 | { |
12639 | uchar dvc_type; | 11460 | uchar dvc_type; |
12640 | ASC_SCSI_BIT_ID_TYPE tid_bits; | 11461 | ASC_SCSI_BIT_ID_TYPE tid_bits; |
12641 | 11462 | ||
12642 | dvc_type = ASC_INQ_DVC_TYPE(inq); | 11463 | dvc_type = ASC_INQ_DVC_TYPE(inq); |
12643 | tid_bits = ASC_TIX_TO_TARGET_ID(tid_no); | 11464 | tid_bits = ASC_TIX_TO_TARGET_ID(tid_no); |
12644 | 11465 | ||
12645 | if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_ASYN_USE_SYN) | 11466 | if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_ASYN_USE_SYN) { |
12646 | { | 11467 | if (!(asc_dvc->init_sdtr & tid_bits)) { |
12647 | if (!(asc_dvc->init_sdtr & tid_bits)) | 11468 | if ((dvc_type == TYPE_ROM) && |
12648 | { | 11469 | (AscCompareString((uchar *)inq->vendor_id, |
12649 | if ((dvc_type == TYPE_ROM) && | 11470 | (uchar *)"HP ", 3) == 0)) { |
12650 | (AscCompareString((uchar *) inq->vendor_id, | 11471 | asc_dvc->pci_fix_asyn_xfer_always |= tid_bits; |
12651 | (uchar *) "HP ", 3) == 0)) | 11472 | } |
12652 | { | 11473 | asc_dvc->pci_fix_asyn_xfer |= tid_bits; |
12653 | asc_dvc->pci_fix_asyn_xfer_always |= tid_bits; | 11474 | if ((dvc_type == TYPE_PROCESSOR) || |
12654 | } | 11475 | (dvc_type == TYPE_SCANNER) || |
12655 | asc_dvc->pci_fix_asyn_xfer |= tid_bits; | 11476 | (dvc_type == TYPE_ROM) || (dvc_type == TYPE_TAPE)) { |
12656 | if ((dvc_type == TYPE_PROCESSOR) || | 11477 | asc_dvc->pci_fix_asyn_xfer &= ~tid_bits; |
12657 | (dvc_type == TYPE_SCANNER) || | 11478 | } |
12658 | (dvc_type == TYPE_ROM) || | 11479 | |
12659 | (dvc_type == TYPE_TAPE)) | 11480 | if (asc_dvc->pci_fix_asyn_xfer & tid_bits) { |
12660 | { | 11481 | AscSetRunChipSynRegAtID(asc_dvc->iop_base, |
12661 | asc_dvc->pci_fix_asyn_xfer &= ~tid_bits; | 11482 | tid_no, |
12662 | } | 11483 | ASYN_SDTR_DATA_FIX_PCI_REV_AB); |
12663 | 11484 | } | |
12664 | if (asc_dvc->pci_fix_asyn_xfer & tid_bits) | 11485 | } |
12665 | { | 11486 | } |
12666 | AscSetRunChipSynRegAtID(asc_dvc->iop_base, tid_no, | 11487 | return; |
12667 | ASYN_SDTR_DATA_FIX_PCI_REV_AB); | ||
12668 | } | ||
12669 | } | ||
12670 | } | ||
12671 | return; | ||
12672 | } | 11488 | } |
12673 | 11489 | ||
12674 | STATIC int | 11490 | static int AscTagQueuingSafe(ASC_SCSI_INQUIRY *inq) |
12675 | AscTagQueuingSafe(ASC_SCSI_INQUIRY *inq) | ||
12676 | { | 11491 | { |
12677 | if ((inq->add_len >= 32) && | 11492 | if ((inq->add_len >= 32) && |
12678 | (AscCompareString((uchar *) inq->vendor_id, | 11493 | (AscCompareString((uchar *)inq->vendor_id, |
12679 | (uchar *) "QUANTUM XP34301", 15) == 0) && | 11494 | (uchar *)"QUANTUM XP34301", 15) == 0) && |
12680 | (AscCompareString((uchar *) inq->product_rev_level, | 11495 | (AscCompareString((uchar *)inq->product_rev_level, |
12681 | (uchar *) "1071", 4) == 0)) | 11496 | (uchar *)"1071", 4) == 0)) { |
12682 | { | 11497 | return 0; |
12683 | return 0; | 11498 | } |
12684 | } | 11499 | return 1; |
12685 | return 1; | ||
12686 | } | 11500 | } |
12687 | 11501 | ||
12688 | STATIC void | 11502 | static void |
12689 | AscInquiryHandling(ASC_DVC_VAR *asc_dvc, | 11503 | AscInquiryHandling(ASC_DVC_VAR *asc_dvc, uchar tid_no, ASC_SCSI_INQUIRY *inq) |
12690 | uchar tid_no, ASC_SCSI_INQUIRY *inq) | ||
12691 | { | 11504 | { |
12692 | ASC_SCSI_BIT_ID_TYPE tid_bit = ASC_TIX_TO_TARGET_ID(tid_no); | 11505 | ASC_SCSI_BIT_ID_TYPE tid_bit = ASC_TIX_TO_TARGET_ID(tid_no); |
12693 | ASC_SCSI_BIT_ID_TYPE orig_init_sdtr, orig_use_tagged_qng; | 11506 | ASC_SCSI_BIT_ID_TYPE orig_init_sdtr, orig_use_tagged_qng; |
12694 | 11507 | ||
12695 | orig_init_sdtr = asc_dvc->init_sdtr; | 11508 | orig_init_sdtr = asc_dvc->init_sdtr; |
12696 | orig_use_tagged_qng = asc_dvc->use_tagged_qng; | 11509 | orig_use_tagged_qng = asc_dvc->use_tagged_qng; |
12697 | 11510 | ||
12698 | asc_dvc->init_sdtr &= ~tid_bit; | 11511 | asc_dvc->init_sdtr &= ~tid_bit; |
12699 | asc_dvc->cfg->can_tagged_qng &= ~tid_bit; | 11512 | asc_dvc->cfg->can_tagged_qng &= ~tid_bit; |
12700 | asc_dvc->use_tagged_qng &= ~tid_bit; | 11513 | asc_dvc->use_tagged_qng &= ~tid_bit; |
12701 | 11514 | ||
12702 | if (ASC_INQ_RESPONSE_FMT(inq) >= 2 || ASC_INQ_ANSI_VER(inq) >= 2) { | 11515 | if (ASC_INQ_RESPONSE_FMT(inq) >= 2 || ASC_INQ_ANSI_VER(inq) >= 2) { |
12703 | if ((asc_dvc->cfg->sdtr_enable & tid_bit) && ASC_INQ_SYNC(inq)) { | 11516 | if ((asc_dvc->cfg->sdtr_enable & tid_bit) && ASC_INQ_SYNC(inq)) { |
12704 | asc_dvc->init_sdtr |= tid_bit; | 11517 | asc_dvc->init_sdtr |= tid_bit; |
12705 | } | 11518 | } |
12706 | if ((asc_dvc->cfg->cmd_qng_enabled & tid_bit) && | 11519 | if ((asc_dvc->cfg->cmd_qng_enabled & tid_bit) && |
12707 | ASC_INQ_CMD_QUEUE(inq)) { | 11520 | ASC_INQ_CMD_QUEUE(inq)) { |
12708 | if (AscTagQueuingSafe(inq)) { | 11521 | if (AscTagQueuingSafe(inq)) { |
12709 | asc_dvc->use_tagged_qng |= tid_bit; | 11522 | asc_dvc->use_tagged_qng |= tid_bit; |
12710 | asc_dvc->cfg->can_tagged_qng |= tid_bit; | 11523 | asc_dvc->cfg->can_tagged_qng |= tid_bit; |
12711 | } | 11524 | } |
12712 | } | 11525 | } |
12713 | } | 11526 | } |
12714 | if (orig_use_tagged_qng != asc_dvc->use_tagged_qng) { | 11527 | if (orig_use_tagged_qng != asc_dvc->use_tagged_qng) { |
12715 | AscWriteLramByte(asc_dvc->iop_base, ASCV_DISC_ENABLE_B, | 11528 | AscWriteLramByte(asc_dvc->iop_base, ASCV_DISC_ENABLE_B, |
12716 | asc_dvc->cfg->disc_enable); | 11529 | asc_dvc->cfg->disc_enable); |
12717 | AscWriteLramByte(asc_dvc->iop_base, ASCV_USE_TAGGED_QNG_B, | 11530 | AscWriteLramByte(asc_dvc->iop_base, ASCV_USE_TAGGED_QNG_B, |
12718 | asc_dvc->use_tagged_qng); | 11531 | asc_dvc->use_tagged_qng); |
12719 | AscWriteLramByte(asc_dvc->iop_base, ASCV_CAN_TAGGED_QNG_B, | 11532 | AscWriteLramByte(asc_dvc->iop_base, ASCV_CAN_TAGGED_QNG_B, |
12720 | asc_dvc->cfg->can_tagged_qng); | 11533 | asc_dvc->cfg->can_tagged_qng); |
12721 | 11534 | ||
12722 | asc_dvc->max_dvc_qng[tid_no] = | 11535 | asc_dvc->max_dvc_qng[tid_no] = |
12723 | asc_dvc->cfg->max_tag_qng[tid_no]; | 11536 | asc_dvc->cfg->max_tag_qng[tid_no]; |
12724 | AscWriteLramByte(asc_dvc->iop_base, | 11537 | AscWriteLramByte(asc_dvc->iop_base, |
12725 | (ushort) (ASCV_MAX_DVC_QNG_BEG + tid_no), | 11538 | (ushort)(ASCV_MAX_DVC_QNG_BEG + tid_no), |
12726 | asc_dvc->max_dvc_qng[tid_no]); | 11539 | asc_dvc->max_dvc_qng[tid_no]); |
12727 | } | 11540 | } |
12728 | if (orig_init_sdtr != asc_dvc->init_sdtr) { | 11541 | if (orig_init_sdtr != asc_dvc->init_sdtr) { |
12729 | AscAsyncFix(asc_dvc, tid_no, inq); | 11542 | AscAsyncFix(asc_dvc, tid_no, inq); |
12730 | } | 11543 | } |
12731 | return; | 11544 | return; |
12732 | } | 11545 | } |
12733 | 11546 | ||
12734 | STATIC int | 11547 | static int AscCompareString(uchar *str1, uchar *str2, int len) |
12735 | AscCompareString( | ||
12736 | uchar *str1, | ||
12737 | uchar *str2, | ||
12738 | int len | ||
12739 | ) | ||
12740 | { | 11548 | { |
12741 | int i; | 11549 | int i; |
12742 | int diff; | 11550 | int diff; |
12743 | 11551 | ||
12744 | for (i = 0; i < len; i++) { | 11552 | for (i = 0; i < len; i++) { |
12745 | diff = (int) (str1[i] - str2[i]); | 11553 | diff = (int)(str1[i] - str2[i]); |
12746 | if (diff != 0) | 11554 | if (diff != 0) |
12747 | return (diff); | 11555 | return (diff); |
12748 | } | 11556 | } |
12749 | return (0); | 11557 | return (0); |
12750 | } | 11558 | } |
12751 | 11559 | ||
12752 | STATIC uchar | 11560 | static uchar AscReadLramByte(PortAddr iop_base, ushort addr) |
12753 | AscReadLramByte( | ||
12754 | PortAddr iop_base, | ||
12755 | ushort addr | ||
12756 | ) | ||
12757 | { | 11561 | { |
12758 | uchar byte_data; | 11562 | uchar byte_data; |
12759 | ushort word_data; | 11563 | ushort word_data; |
12760 | 11564 | ||
12761 | if (isodd_word(addr)) { | 11565 | if (isodd_word(addr)) { |
12762 | AscSetChipLramAddr(iop_base, addr - 1); | 11566 | AscSetChipLramAddr(iop_base, addr - 1); |
12763 | word_data = AscGetChipLramData(iop_base); | 11567 | word_data = AscGetChipLramData(iop_base); |
12764 | byte_data = (uchar) ((word_data >> 8) & 0xFF); | 11568 | byte_data = (uchar)((word_data >> 8) & 0xFF); |
12765 | } else { | 11569 | } else { |
12766 | AscSetChipLramAddr(iop_base, addr); | 11570 | AscSetChipLramAddr(iop_base, addr); |
12767 | word_data = AscGetChipLramData(iop_base); | 11571 | word_data = AscGetChipLramData(iop_base); |
12768 | byte_data = (uchar) (word_data & 0xFF); | 11572 | byte_data = (uchar)(word_data & 0xFF); |
12769 | } | 11573 | } |
12770 | return (byte_data); | 11574 | return (byte_data); |
12771 | } | 11575 | } |
12772 | STATIC ushort | 11576 | |
12773 | AscReadLramWord( | 11577 | static ushort AscReadLramWord(PortAddr iop_base, ushort addr) |
12774 | PortAddr iop_base, | ||
12775 | ushort addr | ||
12776 | ) | ||
12777 | { | 11578 | { |
12778 | ushort word_data; | 11579 | ushort word_data; |
12779 | 11580 | ||
12780 | AscSetChipLramAddr(iop_base, addr); | 11581 | AscSetChipLramAddr(iop_base, addr); |
12781 | word_data = AscGetChipLramData(iop_base); | 11582 | word_data = AscGetChipLramData(iop_base); |
12782 | return (word_data); | 11583 | return (word_data); |
12783 | } | 11584 | } |
12784 | 11585 | ||
12785 | #if CC_VERY_LONG_SG_LIST | 11586 | #if CC_VERY_LONG_SG_LIST |
12786 | STATIC ASC_DCNT | 11587 | static ASC_DCNT AscReadLramDWord(PortAddr iop_base, ushort addr) |
12787 | AscReadLramDWord( | ||
12788 | PortAddr iop_base, | ||
12789 | ushort addr | ||
12790 | ) | ||
12791 | { | 11588 | { |
12792 | ushort val_low, val_high; | 11589 | ushort val_low, val_high; |
12793 | ASC_DCNT dword_data; | 11590 | ASC_DCNT dword_data; |
12794 | 11591 | ||
12795 | AscSetChipLramAddr(iop_base, addr); | 11592 | AscSetChipLramAddr(iop_base, addr); |
12796 | val_low = AscGetChipLramData(iop_base); | 11593 | val_low = AscGetChipLramData(iop_base); |
12797 | val_high = AscGetChipLramData(iop_base); | 11594 | val_high = AscGetChipLramData(iop_base); |
12798 | dword_data = ((ASC_DCNT) val_high << 16) | (ASC_DCNT) val_low; | 11595 | dword_data = ((ASC_DCNT) val_high << 16) | (ASC_DCNT) val_low; |
12799 | return (dword_data); | 11596 | return (dword_data); |
12800 | } | 11597 | } |
12801 | #endif /* CC_VERY_LONG_SG_LIST */ | 11598 | #endif /* CC_VERY_LONG_SG_LIST */ |
12802 | 11599 | ||
12803 | STATIC void | 11600 | static void AscWriteLramWord(PortAddr iop_base, ushort addr, ushort word_val) |
12804 | AscWriteLramWord( | ||
12805 | PortAddr iop_base, | ||
12806 | ushort addr, | ||
12807 | ushort word_val | ||
12808 | ) | ||
12809 | { | 11601 | { |
12810 | AscSetChipLramAddr(iop_base, addr); | 11602 | AscSetChipLramAddr(iop_base, addr); |
12811 | AscSetChipLramData(iop_base, word_val); | 11603 | AscSetChipLramData(iop_base, word_val); |
12812 | return; | 11604 | return; |
12813 | } | 11605 | } |
12814 | 11606 | ||
12815 | STATIC void | 11607 | static void AscWriteLramByte(PortAddr iop_base, ushort addr, uchar byte_val) |
12816 | AscWriteLramByte( | ||
12817 | PortAddr iop_base, | ||
12818 | ushort addr, | ||
12819 | uchar byte_val | ||
12820 | ) | ||
12821 | { | 11608 | { |
12822 | ushort word_data; | 11609 | ushort word_data; |
12823 | 11610 | ||
12824 | if (isodd_word(addr)) { | 11611 | if (isodd_word(addr)) { |
12825 | addr--; | 11612 | addr--; |
12826 | word_data = AscReadLramWord(iop_base, addr); | 11613 | word_data = AscReadLramWord(iop_base, addr); |
12827 | word_data &= 0x00FF; | 11614 | word_data &= 0x00FF; |
12828 | word_data |= (((ushort) byte_val << 8) & 0xFF00); | 11615 | word_data |= (((ushort)byte_val << 8) & 0xFF00); |
12829 | } else { | 11616 | } else { |
12830 | word_data = AscReadLramWord(iop_base, addr); | 11617 | word_data = AscReadLramWord(iop_base, addr); |
12831 | word_data &= 0xFF00; | 11618 | word_data &= 0xFF00; |
12832 | word_data |= ((ushort) byte_val & 0x00FF); | 11619 | word_data |= ((ushort)byte_val & 0x00FF); |
12833 | } | 11620 | } |
12834 | AscWriteLramWord(iop_base, addr, word_data); | 11621 | AscWriteLramWord(iop_base, addr, word_data); |
12835 | return; | 11622 | return; |
12836 | } | 11623 | } |
12837 | 11624 | ||
12838 | /* | 11625 | /* |
@@ -12841,30 +11628,26 @@ AscWriteLramByte( | |||
12841 | * The source data is assumed to be in little-endian order in memory | 11628 | * The source data is assumed to be in little-endian order in memory |
12842 | * and is maintained in little-endian order when written to LRAM. | 11629 | * and is maintained in little-endian order when written to LRAM. |
12843 | */ | 11630 | */ |
12844 | STATIC void | 11631 | static void |
12845 | AscMemWordCopyPtrToLram( | 11632 | AscMemWordCopyPtrToLram(PortAddr iop_base, |
12846 | PortAddr iop_base, | 11633 | ushort s_addr, uchar *s_buffer, int words) |
12847 | ushort s_addr, | ||
12848 | uchar *s_buffer, | ||
12849 | int words | ||
12850 | ) | ||
12851 | { | 11634 | { |
12852 | int i; | 11635 | int i; |
12853 | 11636 | ||
12854 | AscSetChipLramAddr(iop_base, s_addr); | 11637 | AscSetChipLramAddr(iop_base, s_addr); |
12855 | for (i = 0; i < 2 * words; i += 2) { | 11638 | for (i = 0; i < 2 * words; i += 2) { |
12856 | /* | 11639 | /* |
12857 | * On a little-endian system the second argument below | 11640 | * On a little-endian system the second argument below |
12858 | * produces a little-endian ushort which is written to | 11641 | * produces a little-endian ushort which is written to |
12859 | * LRAM in little-endian order. On a big-endian system | 11642 | * LRAM in little-endian order. On a big-endian system |
12860 | * the second argument produces a big-endian ushort which | 11643 | * the second argument produces a big-endian ushort which |
12861 | * is "transparently" byte-swapped by outpw() and written | 11644 | * is "transparently" byte-swapped by outpw() and written |
12862 | * in little-endian order to LRAM. | 11645 | * in little-endian order to LRAM. |
12863 | */ | 11646 | */ |
12864 | outpw(iop_base + IOP_RAM_DATA, | 11647 | outpw(iop_base + IOP_RAM_DATA, |
12865 | ((ushort) s_buffer[i + 1] << 8) | s_buffer[i]); | 11648 | ((ushort)s_buffer[i + 1] << 8) | s_buffer[i]); |
12866 | } | 11649 | } |
12867 | return; | 11650 | return; |
12868 | } | 11651 | } |
12869 | 11652 | ||
12870 | /* | 11653 | /* |
@@ -12873,24 +11656,18 @@ AscMemWordCopyPtrToLram( | |||
12873 | * The source data is assumed to be in little-endian order in memory | 11656 | * The source data is assumed to be in little-endian order in memory |
12874 | * and is maintained in little-endian order when writen to LRAM. | 11657 | * and is maintained in little-endian order when writen to LRAM. |
12875 | */ | 11658 | */ |
12876 | STATIC void | 11659 | static void |
12877 | AscMemDWordCopyPtrToLram( | 11660 | AscMemDWordCopyPtrToLram(PortAddr iop_base, |
12878 | PortAddr iop_base, | 11661 | ushort s_addr, uchar *s_buffer, int dwords) |
12879 | ushort s_addr, | ||
12880 | uchar *s_buffer, | ||
12881 | int dwords | ||
12882 | ) | ||
12883 | { | 11662 | { |
12884 | int i; | 11663 | int i; |
12885 | 11664 | ||
12886 | AscSetChipLramAddr(iop_base, s_addr); | 11665 | AscSetChipLramAddr(iop_base, s_addr); |
12887 | for (i = 0; i < 4 * dwords; i += 4) { | 11666 | for (i = 0; i < 4 * dwords; i += 4) { |
12888 | outpw(iop_base + IOP_RAM_DATA, | 11667 | outpw(iop_base + IOP_RAM_DATA, ((ushort)s_buffer[i + 1] << 8) | s_buffer[i]); /* LSW */ |
12889 | ((ushort) s_buffer[i + 1] << 8) | s_buffer[i]); /* LSW */ | 11668 | outpw(iop_base + IOP_RAM_DATA, ((ushort)s_buffer[i + 3] << 8) | s_buffer[i + 2]); /* MSW */ |
12890 | outpw(iop_base + IOP_RAM_DATA, | 11669 | } |
12891 | ((ushort) s_buffer[i + 3] << 8) | s_buffer[i + 2]); /* MSW */ | 11670 | return; |
12892 | } | ||
12893 | return; | ||
12894 | } | 11671 | } |
12895 | 11672 | ||
12896 | /* | 11673 | /* |
@@ -12899,61 +11676,46 @@ AscMemDWordCopyPtrToLram( | |||
12899 | * The source data is assumed to be in little-endian order in LRAM | 11676 | * The source data is assumed to be in little-endian order in LRAM |
12900 | * and is maintained in little-endian order when written to memory. | 11677 | * and is maintained in little-endian order when written to memory. |
12901 | */ | 11678 | */ |
12902 | STATIC void | 11679 | static void |
12903 | AscMemWordCopyPtrFromLram( | 11680 | AscMemWordCopyPtrFromLram(PortAddr iop_base, |
12904 | PortAddr iop_base, | 11681 | ushort s_addr, uchar *d_buffer, int words) |
12905 | ushort s_addr, | ||
12906 | uchar *d_buffer, | ||
12907 | int words | ||
12908 | ) | ||
12909 | { | 11682 | { |
12910 | int i; | 11683 | int i; |
12911 | ushort word; | 11684 | ushort word; |
12912 | 11685 | ||
12913 | AscSetChipLramAddr(iop_base, s_addr); | 11686 | AscSetChipLramAddr(iop_base, s_addr); |
12914 | for (i = 0; i < 2 * words; i += 2) { | 11687 | for (i = 0; i < 2 * words; i += 2) { |
12915 | word = inpw(iop_base + IOP_RAM_DATA); | 11688 | word = inpw(iop_base + IOP_RAM_DATA); |
12916 | d_buffer[i] = word & 0xff; | 11689 | d_buffer[i] = word & 0xff; |
12917 | d_buffer[i + 1] = (word >> 8) & 0xff; | 11690 | d_buffer[i + 1] = (word >> 8) & 0xff; |
12918 | } | 11691 | } |
12919 | return; | 11692 | return; |
12920 | } | 11693 | } |
12921 | 11694 | ||
12922 | STATIC ASC_DCNT | 11695 | static ASC_DCNT AscMemSumLramWord(PortAddr iop_base, ushort s_addr, int words) |
12923 | AscMemSumLramWord( | ||
12924 | PortAddr iop_base, | ||
12925 | ushort s_addr, | ||
12926 | int words | ||
12927 | ) | ||
12928 | { | 11696 | { |
12929 | ASC_DCNT sum; | 11697 | ASC_DCNT sum; |
12930 | int i; | 11698 | int i; |
12931 | 11699 | ||
12932 | sum = 0L; | 11700 | sum = 0L; |
12933 | for (i = 0; i < words; i++, s_addr += 2) { | 11701 | for (i = 0; i < words; i++, s_addr += 2) { |
12934 | sum += AscReadLramWord(iop_base, s_addr); | 11702 | sum += AscReadLramWord(iop_base, s_addr); |
12935 | } | 11703 | } |
12936 | return (sum); | 11704 | return (sum); |
12937 | } | 11705 | } |
12938 | 11706 | ||
12939 | STATIC void | 11707 | static void |
12940 | AscMemWordSetLram( | 11708 | AscMemWordSetLram(PortAddr iop_base, ushort s_addr, ushort set_wval, int words) |
12941 | PortAddr iop_base, | ||
12942 | ushort s_addr, | ||
12943 | ushort set_wval, | ||
12944 | int words | ||
12945 | ) | ||
12946 | { | 11709 | { |
12947 | int i; | 11710 | int i; |
12948 | 11711 | ||
12949 | AscSetChipLramAddr(iop_base, s_addr); | 11712 | AscSetChipLramAddr(iop_base, s_addr); |
12950 | for (i = 0; i < words; i++) { | 11713 | for (i = 0; i < words; i++) { |
12951 | AscSetChipLramData(iop_base, set_wval); | 11714 | AscSetChipLramData(iop_base, set_wval); |
12952 | } | 11715 | } |
12953 | return; | 11716 | return; |
12954 | } | 11717 | } |
12955 | 11718 | ||
12956 | |||
12957 | /* | 11719 | /* |
12958 | * --- Adv Library Functions | 11720 | * --- Adv Library Functions |
12959 | */ | 11721 | */ |
@@ -12961,1076 +11723,2112 @@ AscMemWordSetLram( | |||
12961 | /* a_mcode.h */ | 11723 | /* a_mcode.h */ |
12962 | 11724 | ||
12963 | /* Microcode buffer is kept after initialization for error recovery. */ | 11725 | /* Microcode buffer is kept after initialization for error recovery. */ |
12964 | STATIC unsigned char _adv_asc3550_buf[] = { | 11726 | static unsigned char _adv_asc3550_buf[] = { |
12965 | 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0x16, 0x18, 0xe4, 0x00, 0xfc, 0x01, 0x00, 0x48, 0xe4, | 11727 | 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0x16, 0x18, 0xe4, 0x00, 0xfc, |
12966 | 0xbe, 0x18, 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, 0x00, 0xfa, 0xff, 0xff, 0x28, 0x0e, 0x9e, 0xe7, | 11728 | 0x01, 0x00, 0x48, 0xe4, |
12967 | 0xff, 0x00, 0x82, 0xe7, 0x00, 0xea, 0x00, 0xf6, 0x01, 0xe6, 0x09, 0xe7, 0x55, 0xf0, 0x01, 0xf6, | 11729 | 0xbe, 0x18, 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, 0x00, 0xfa, 0xff, 0xff, |
12968 | 0x01, 0xfa, 0x08, 0x00, 0x03, 0x00, 0x04, 0x00, 0x18, 0xf4, 0x10, 0x00, 0x00, 0xec, 0x85, 0xf0, | 11730 | 0x28, 0x0e, 0x9e, 0xe7, |
12969 | 0xbc, 0x00, 0xd5, 0xf0, 0x8e, 0x0c, 0x38, 0x54, 0x00, 0xe6, 0x1e, 0xf0, 0x86, 0xf0, 0xb4, 0x00, | 11731 | 0xff, 0x00, 0x82, 0xe7, 0x00, 0xea, 0x00, 0xf6, 0x01, 0xe6, 0x09, 0xe7, |
12970 | 0x98, 0x57, 0xd0, 0x01, 0x0c, 0x1c, 0x3e, 0x1c, 0x0c, 0x00, 0xbb, 0x00, 0xaa, 0x18, 0x02, 0x80, | 11732 | 0x55, 0xf0, 0x01, 0xf6, |
12971 | 0x32, 0xf0, 0x01, 0xfc, 0x88, 0x0c, 0xc6, 0x12, 0x02, 0x13, 0x18, 0x40, 0x00, 0x57, 0x01, 0xea, | 11733 | 0x01, 0xfa, 0x08, 0x00, 0x03, 0x00, 0x04, 0x00, 0x18, 0xf4, 0x10, 0x00, |
12972 | 0x3c, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12, 0x3e, 0x57, 0x00, 0x80, 0x03, 0xe6, 0xb6, 0x00, | 11734 | 0x00, 0xec, 0x85, 0xf0, |
12973 | 0xc0, 0x00, 0x01, 0x01, 0x3e, 0x01, 0xda, 0x0f, 0x22, 0x10, 0x08, 0x12, 0x02, 0x4a, 0xb9, 0x54, | 11735 | 0xbc, 0x00, 0xd5, 0xf0, 0x8e, 0x0c, 0x38, 0x54, 0x00, 0xe6, 0x1e, 0xf0, |
12974 | 0x03, 0x58, 0x1b, 0x80, 0x30, 0xe4, 0x4b, 0xe4, 0x20, 0x00, 0x32, 0x00, 0x3e, 0x00, 0x80, 0x00, | 11736 | 0x86, 0xf0, 0xb4, 0x00, |
12975 | 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01, 0x70, 0x01, 0x72, 0x01, 0x74, 0x01, 0x76, 0x01, | 11737 | 0x98, 0x57, 0xd0, 0x01, 0x0c, 0x1c, 0x3e, 0x1c, 0x0c, 0x00, 0xbb, 0x00, |
12976 | 0x78, 0x01, 0x62, 0x0a, 0x92, 0x0c, 0x2c, 0x10, 0x2e, 0x10, 0x06, 0x13, 0x4c, 0x1c, 0xbb, 0x55, | 11738 | 0xaa, 0x18, 0x02, 0x80, |
12977 | 0x3c, 0x56, 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, 0xb1, 0xf0, 0x03, 0xf7, 0x06, 0xf7, | 11739 | 0x32, 0xf0, 0x01, 0xfc, 0x88, 0x0c, 0xc6, 0x12, 0x02, 0x13, 0x18, 0x40, |
12978 | 0x03, 0xfc, 0x0f, 0x00, 0x40, 0x00, 0xbe, 0x00, 0x00, 0x01, 0xb0, 0x08, 0x30, 0x13, 0x64, 0x15, | 11740 | 0x00, 0x57, 0x01, 0xea, |
12979 | 0x32, 0x1c, 0x38, 0x1c, 0x4e, 0x1c, 0x10, 0x44, 0x02, 0x48, 0x00, 0x4c, 0x04, 0xea, 0x5d, 0xf0, | 11741 | 0x3c, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12, 0x3e, 0x57, 0x00, 0x80, |
12980 | 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x34, 0x00, 0x36, 0x00, 0x98, 0x00, 0xcc, 0x00, 0x20, 0x01, | 11742 | 0x03, 0xe6, 0xb6, 0x00, |
12981 | 0x4e, 0x01, 0x4e, 0x0b, 0x1e, 0x0e, 0x0c, 0x10, 0x0a, 0x12, 0x04, 0x13, 0x40, 0x13, 0x30, 0x1c, | 11743 | 0xc0, 0x00, 0x01, 0x01, 0x3e, 0x01, 0xda, 0x0f, 0x22, 0x10, 0x08, 0x12, |
12982 | 0x00, 0x4e, 0xbd, 0x56, 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0, 0x59, 0xf0, 0xa7, 0xf0, | 11744 | 0x02, 0x4a, 0xb9, 0x54, |
12983 | 0xb8, 0xf0, 0x0e, 0xf7, 0x06, 0x00, 0x19, 0x00, 0x33, 0x00, 0x9b, 0x00, 0xa4, 0x00, 0xb5, 0x00, | 11745 | 0x03, 0x58, 0x1b, 0x80, 0x30, 0xe4, 0x4b, 0xe4, 0x20, 0x00, 0x32, 0x00, |
12984 | 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, 0xe7, 0x00, 0xde, 0x03, 0x56, 0x0a, 0x14, 0x0e, 0x02, 0x10, | 11746 | 0x3e, 0x00, 0x80, 0x00, |
12985 | 0x04, 0x10, 0x0a, 0x10, 0x36, 0x10, 0x0a, 0x13, 0x12, 0x13, 0x52, 0x13, 0x10, 0x15, 0x14, 0x15, | 11747 | 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01, 0x70, 0x01, 0x72, 0x01, |
12986 | 0xac, 0x16, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x08, 0x44, 0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, | 11748 | 0x74, 0x01, 0x76, 0x01, |
12987 | 0x48, 0x46, 0x01, 0x48, 0x68, 0x54, 0x83, 0x55, 0xb0, 0x57, 0x01, 0x58, 0x83, 0x59, 0x05, 0xe6, | 11749 | 0x78, 0x01, 0x62, 0x0a, 0x92, 0x0c, 0x2c, 0x10, 0x2e, 0x10, 0x06, 0x13, |
12988 | 0x0b, 0xf0, 0x0c, 0xf0, 0x5c, 0xf0, 0x4b, 0xf4, 0x04, 0xf8, 0x05, 0xf8, 0x02, 0xfa, 0x03, 0xfa, | 11750 | 0x4c, 0x1c, 0xbb, 0x55, |
12989 | 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00, 0x0a, 0x00, 0x0d, 0x00, 0x1c, 0x00, 0x9e, 0x00, 0xa8, 0x00, | 11751 | 0x3c, 0x56, 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, 0xb1, 0xf0, |
12990 | 0xaa, 0x00, 0xb9, 0x00, 0xe0, 0x00, 0x22, 0x01, 0x26, 0x01, 0x79, 0x01, 0x7a, 0x01, 0xc0, 0x01, | 11752 | 0x03, 0xf7, 0x06, 0xf7, |
12991 | 0xc2, 0x01, 0x7c, 0x02, 0x5a, 0x03, 0xea, 0x04, 0xe8, 0x07, 0x68, 0x08, 0x69, 0x08, 0xba, 0x08, | 11753 | 0x03, 0xfc, 0x0f, 0x00, 0x40, 0x00, 0xbe, 0x00, 0x00, 0x01, 0xb0, 0x08, |
12992 | 0xe9, 0x09, 0x06, 0x0b, 0x3a, 0x0e, 0x00, 0x10, 0x1a, 0x10, 0xed, 0x10, 0xf1, 0x10, 0x06, 0x12, | 11754 | 0x30, 0x13, 0x64, 0x15, |
12993 | 0x0c, 0x13, 0x16, 0x13, 0x1e, 0x13, 0x82, 0x13, 0x42, 0x14, 0xd6, 0x14, 0x8a, 0x15, 0xc6, 0x17, | 11755 | 0x32, 0x1c, 0x38, 0x1c, 0x4e, 0x1c, 0x10, 0x44, 0x02, 0x48, 0x00, 0x4c, |
12994 | 0xd2, 0x17, 0x6b, 0x18, 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40, 0x0e, 0x47, 0x48, 0x47, | 11756 | 0x04, 0xea, 0x5d, 0xf0, |
12995 | 0x41, 0x48, 0x89, 0x48, 0x80, 0x4c, 0x00, 0x54, 0x44, 0x55, 0xe5, 0x55, 0x14, 0x56, 0x77, 0x57, | 11757 | 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x34, 0x00, 0x36, 0x00, 0x98, 0x00, |
12996 | 0xbf, 0x57, 0x40, 0x5c, 0x06, 0x80, 0x08, 0x90, 0x03, 0xa1, 0xfe, 0x9c, 0xf0, 0x29, 0x02, 0xfe, | 11758 | 0xcc, 0x00, 0x20, 0x01, |
12997 | 0xb8, 0x0c, 0xff, 0x10, 0x00, 0x00, 0xd0, 0xfe, 0xcc, 0x18, 0x00, 0xcf, 0xfe, 0x80, 0x01, 0xff, | 11759 | 0x4e, 0x01, 0x4e, 0x0b, 0x1e, 0x0e, 0x0c, 0x10, 0x0a, 0x12, 0x04, 0x13, |
12998 | 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00, 0x00, 0xfe, 0x57, 0x24, | 11760 | 0x40, 0x13, 0x30, 0x1c, |
12999 | 0x00, 0xfe, 0x48, 0x00, 0x4f, 0xff, 0x04, 0x00, 0x00, 0x10, 0xff, 0x09, 0x00, 0x00, 0xff, 0x08, | 11761 | 0x00, 0x4e, 0xbd, 0x56, 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0, |
13000 | 0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, 0xff, 0xff, 0xff, 0x0f, | 11762 | 0x59, 0xf0, 0xa7, 0xf0, |
13001 | 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00, 0xfe, 0x04, 0xf7, 0xcf, | 11763 | 0xb8, 0xf0, 0x0e, 0xf7, 0x06, 0x00, 0x19, 0x00, 0x33, 0x00, 0x9b, 0x00, |
13002 | 0x2a, 0x67, 0x0b, 0x01, 0xfe, 0xce, 0x0e, 0xfe, 0x04, 0xf7, 0xcf, 0x67, 0x0b, 0x3c, 0x2a, 0xfe, | 11764 | 0xa4, 0x00, 0xb5, 0x00, |
13003 | 0x3d, 0xf0, 0xfe, 0x02, 0x02, 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x91, 0xf0, 0xfe, 0xf0, 0x01, 0xfe, | 11765 | 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, 0xe7, 0x00, 0xde, 0x03, 0x56, 0x0a, |
13004 | 0x90, 0xf0, 0xfe, 0xf0, 0x01, 0xfe, 0x8f, 0xf0, 0x9c, 0x05, 0x51, 0x3b, 0x02, 0xfe, 0xd4, 0x0c, | 11766 | 0x14, 0x0e, 0x02, 0x10, |
13005 | 0x01, 0xfe, 0x44, 0x0d, 0xfe, 0xdd, 0x12, 0xfe, 0xfc, 0x10, 0xfe, 0x28, 0x1c, 0x05, 0xfe, 0xa6, | 11767 | 0x04, 0x10, 0x0a, 0x10, 0x36, 0x10, 0x0a, 0x13, 0x12, 0x13, 0x52, 0x13, |
13006 | 0x00, 0xfe, 0xd3, 0x12, 0x47, 0x18, 0xfe, 0xa6, 0x00, 0xb5, 0xfe, 0x48, 0xf0, 0xfe, 0x86, 0x02, | 11768 | 0x10, 0x15, 0x14, 0x15, |
13007 | 0xfe, 0x49, 0xf0, 0xfe, 0xa0, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xbe, 0x02, 0xfe, 0x46, 0xf0, 0xfe, | 11769 | 0xac, 0x16, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x08, 0x44, 0x38, 0x44, |
13008 | 0x50, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x56, 0x02, 0xfe, 0x43, 0xf0, 0xfe, 0x44, 0x02, 0xfe, 0x44, | 11770 | 0x91, 0x44, 0x0a, 0x45, |
13009 | 0xf0, 0xfe, 0x48, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x4c, 0x02, 0x17, 0x0b, 0xa0, 0x17, 0x06, 0x18, | 11771 | 0x48, 0x46, 0x01, 0x48, 0x68, 0x54, 0x83, 0x55, 0xb0, 0x57, 0x01, 0x58, |
13010 | 0x96, 0x02, 0x29, 0xfe, 0x00, 0x1c, 0xde, 0xfe, 0x02, 0x1c, 0xdd, 0xfe, 0x1e, 0x1c, 0xfe, 0xe9, | 11772 | 0x83, 0x59, 0x05, 0xe6, |
13011 | 0x10, 0x01, 0xfe, 0x20, 0x17, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc, 0xc7, 0x0a, 0x6b, 0x01, 0x9e, | 11773 | 0x0b, 0xf0, 0x0c, 0xf0, 0x5c, 0xf0, 0x4b, 0xf4, 0x04, 0xf8, 0x05, 0xf8, |
13012 | 0x02, 0x29, 0x14, 0x4d, 0x37, 0x97, 0x01, 0xfe, 0x64, 0x0f, 0x0a, 0x6b, 0x01, 0x82, 0xfe, 0xbd, | 11774 | 0x02, 0xfa, 0x03, 0xfa, |
13013 | 0x10, 0x0a, 0x6b, 0x01, 0x82, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe, 0x58, 0x1c, 0x17, 0x06, | 11775 | 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00, 0x0a, 0x00, 0x0d, 0x00, 0x1c, 0x00, |
13014 | 0x18, 0x96, 0x2a, 0x25, 0x29, 0xfe, 0x3d, 0xf0, 0xfe, 0x02, 0x02, 0x21, 0xfe, 0x94, 0x02, 0xfe, | 11776 | 0x9e, 0x00, 0xa8, 0x00, |
13015 | 0x5a, 0x1c, 0xea, 0xfe, 0x14, 0x1c, 0x14, 0xfe, 0x30, 0x00, 0x37, 0x97, 0x01, 0xfe, 0x54, 0x0f, | 11777 | 0xaa, 0x00, 0xb9, 0x00, 0xe0, 0x00, 0x22, 0x01, 0x26, 0x01, 0x79, 0x01, |
13016 | 0x17, 0x06, 0x18, 0x96, 0x02, 0xd0, 0x1e, 0x20, 0x07, 0x10, 0x34, 0xfe, 0x69, 0x10, 0x17, 0x06, | 11778 | 0x7a, 0x01, 0xc0, 0x01, |
13017 | 0x18, 0x96, 0xfe, 0x04, 0xec, 0x20, 0x46, 0x3d, 0x12, 0x20, 0xfe, 0x05, 0xf6, 0xc7, 0x01, 0xfe, | 11779 | 0xc2, 0x01, 0x7c, 0x02, 0x5a, 0x03, 0xea, 0x04, 0xe8, 0x07, 0x68, 0x08, |
13018 | 0x52, 0x16, 0x09, 0x4a, 0x4c, 0x35, 0x11, 0x2d, 0x3c, 0x8a, 0x01, 0xe6, 0x02, 0x29, 0x0a, 0x40, | 11780 | 0x69, 0x08, 0xba, 0x08, |
13019 | 0x01, 0x0e, 0x07, 0x00, 0x5d, 0x01, 0x6f, 0xfe, 0x18, 0x10, 0xfe, 0x41, 0x58, 0x0a, 0x99, 0x01, | 11781 | 0xe9, 0x09, 0x06, 0x0b, 0x3a, 0x0e, 0x00, 0x10, 0x1a, 0x10, 0xed, 0x10, |
13020 | 0x0e, 0xfe, 0xc8, 0x54, 0x64, 0xfe, 0x0c, 0x03, 0x01, 0xe6, 0x02, 0x29, 0x2a, 0x46, 0xfe, 0x02, | 11782 | 0xf1, 0x10, 0x06, 0x12, |
13021 | 0xe8, 0x27, 0xf8, 0xfe, 0x9e, 0x43, 0xf7, 0xfe, 0x27, 0xf0, 0xfe, 0xdc, 0x01, 0xfe, 0x07, 0x4b, | 11783 | 0x0c, 0x13, 0x16, 0x13, 0x1e, 0x13, 0x82, 0x13, 0x42, 0x14, 0xd6, 0x14, |
13022 | 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x40, 0x1c, 0x25, 0xd2, 0xfe, 0x26, 0xf0, 0xfe, 0x56, 0x03, 0xfe, | 11784 | 0x8a, 0x15, 0xc6, 0x17, |
13023 | 0xa0, 0xf0, 0xfe, 0x44, 0x03, 0xfe, 0x11, 0xf0, 0x9c, 0xfe, 0xef, 0x10, 0xfe, 0x9f, 0xf0, 0xfe, | 11785 | 0xd2, 0x17, 0x6b, 0x18, 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40, |
13024 | 0x64, 0x03, 0xeb, 0x0f, 0xfe, 0x11, 0x00, 0x02, 0x5a, 0x2a, 0xfe, 0x48, 0x1c, 0xeb, 0x09, 0x04, | 11786 | 0x0e, 0x47, 0x48, 0x47, |
13025 | 0x1d, 0xfe, 0x18, 0x13, 0x23, 0x1e, 0x98, 0xac, 0x12, 0x98, 0x0a, 0x40, 0x01, 0x0e, 0xac, 0x75, | 11787 | 0x41, 0x48, 0x89, 0x48, 0x80, 0x4c, 0x00, 0x54, 0x44, 0x55, 0xe5, 0x55, |
13026 | 0x01, 0xfe, 0xbc, 0x15, 0x11, 0xca, 0x25, 0xd2, 0xfe, 0x01, 0xf0, 0xd2, 0xfe, 0x82, 0xf0, 0xfe, | 11788 | 0x14, 0x56, 0x77, 0x57, |
13027 | 0x92, 0x03, 0xec, 0x11, 0xfe, 0xe4, 0x00, 0x65, 0xfe, 0xa4, 0x03, 0x25, 0x32, 0x1f, 0xfe, 0xb4, | 11789 | 0xbf, 0x57, 0x40, 0x5c, 0x06, 0x80, 0x08, 0x90, 0x03, 0xa1, 0xfe, 0x9c, |
13028 | 0x03, 0x01, 0x43, 0xfe, 0x06, 0xf0, 0xfe, 0xc4, 0x03, 0x8d, 0x81, 0xfe, 0x0a, 0xf0, 0xfe, 0x7a, | 11790 | 0xf0, 0x29, 0x02, 0xfe, |
13029 | 0x06, 0x02, 0x22, 0x05, 0x6b, 0x28, 0x16, 0xfe, 0xf6, 0x04, 0x14, 0x2c, 0x01, 0x33, 0x8f, 0xfe, | 11791 | 0xb8, 0x0c, 0xff, 0x10, 0x00, 0x00, 0xd0, 0xfe, 0xcc, 0x18, 0x00, 0xcf, |
13030 | 0x66, 0x02, 0x02, 0xd1, 0xeb, 0x2a, 0x67, 0x1a, 0xfe, 0x67, 0x1b, 0xf8, 0xf7, 0xfe, 0x48, 0x1c, | 11792 | 0xfe, 0x80, 0x01, 0xff, |
13031 | 0x70, 0x01, 0x6e, 0x87, 0x0a, 0x40, 0x01, 0x0e, 0x07, 0x00, 0x16, 0xd3, 0x0a, 0xca, 0x01, 0x0e, | 11793 | 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00, |
13032 | 0x74, 0x60, 0x59, 0x76, 0x27, 0x05, 0x6b, 0x28, 0xfe, 0x10, 0x12, 0x14, 0x2c, 0x01, 0x33, 0x8f, | 11794 | 0x00, 0xfe, 0x57, 0x24, |
13033 | 0xfe, 0x66, 0x02, 0x02, 0xd1, 0xbc, 0x7d, 0xbd, 0x7f, 0x25, 0x22, 0x65, 0xfe, 0x3c, 0x04, 0x1f, | 11795 | 0x00, 0xfe, 0x48, 0x00, 0x4f, 0xff, 0x04, 0x00, 0x00, 0x10, 0xff, 0x09, |
13034 | 0xfe, 0x38, 0x04, 0x68, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e, 0x12, 0x2b, 0xff, 0x02, | 11796 | 0x00, 0x00, 0xff, 0x08, |
13035 | 0x00, 0x10, 0x01, 0x08, 0x1f, 0xfe, 0xe0, 0x04, 0x2b, 0x01, 0x08, 0x1f, 0x22, 0x30, 0x2e, 0xd5, | 11797 | 0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, |
13036 | 0xfe, 0x4c, 0x44, 0xfe, 0x4c, 0x12, 0x60, 0xfe, 0x44, 0x48, 0x13, 0x2c, 0xfe, 0x4c, 0x54, 0x64, | 11798 | 0xff, 0xff, 0xff, 0x0f, |
13037 | 0xd3, 0x46, 0x76, 0x27, 0xfa, 0xef, 0xfe, 0x62, 0x13, 0x09, 0x04, 0x1d, 0xfe, 0x2a, 0x13, 0x2f, | 11799 | 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00, |
13038 | 0x07, 0x7e, 0xa5, 0xfe, 0x20, 0x10, 0x13, 0x2c, 0xfe, 0x4c, 0x54, 0x64, 0xd3, 0xfa, 0xef, 0x86, | 11800 | 0xfe, 0x04, 0xf7, 0xcf, |
13039 | 0x09, 0x04, 0x1d, 0xfe, 0x08, 0x13, 0x2f, 0x07, 0x7e, 0x6e, 0x09, 0x04, 0x1d, 0xfe, 0x1c, 0x12, | 11801 | 0x2a, 0x67, 0x0b, 0x01, 0xfe, 0xce, 0x0e, 0xfe, 0x04, 0xf7, 0xcf, 0x67, |
13040 | 0x14, 0x92, 0x09, 0x04, 0x06, 0x3b, 0x14, 0xc4, 0x01, 0x33, 0x8f, 0xfe, 0x70, 0x0c, 0x02, 0x22, | 11802 | 0x0b, 0x3c, 0x2a, 0xfe, |
13041 | 0x2b, 0x11, 0xfe, 0xe6, 0x00, 0xfe, 0x1c, 0x90, 0xf9, 0x03, 0x14, 0x92, 0x01, 0x33, 0x02, 0x29, | 11803 | 0x3d, 0xf0, 0xfe, 0x02, 0x02, 0xfe, 0x20, 0xf0, 0x9c, 0xfe, 0x91, 0xf0, |
13042 | 0xfe, 0x42, 0x5b, 0x67, 0x1a, 0xfe, 0x46, 0x59, 0xf8, 0xf7, 0xfe, 0x87, 0x80, 0xfe, 0x31, 0xe4, | 11804 | 0xfe, 0xf0, 0x01, 0xfe, |
13043 | 0x4f, 0x09, 0x04, 0x0b, 0xfe, 0x78, 0x13, 0xfe, 0x20, 0x80, 0x07, 0x1a, 0xfe, 0x70, 0x12, 0x49, | 11805 | 0x90, 0xf0, 0xfe, 0xf0, 0x01, 0xfe, 0x8f, 0xf0, 0x9c, 0x05, 0x51, 0x3b, |
13044 | 0x04, 0x06, 0xfe, 0x60, 0x13, 0x05, 0xfe, 0xa2, 0x00, 0x28, 0x16, 0xfe, 0x80, 0x05, 0xfe, 0x31, | 11806 | 0x02, 0xfe, 0xd4, 0x0c, |
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13099 | 0x0c, 0x7c, 0x79, 0x56, 0x68, 0x57, 0xfe, 0x12, 0x10, 0x09, 0x04, 0x19, 0x16, 0xd7, 0x79, 0x39, | 11861 | 0x74, 0x60, 0x59, 0x76, 0x27, 0x05, 0x6b, 0x28, 0xfe, 0x10, 0x12, 0x14, |
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13104 | 0x0b, 0xfe, 0x14, 0x13, 0x05, 0x39, 0x31, 0x3a, 0x77, 0xfe, 0xc6, 0x08, 0xfe, 0x0c, 0x58, 0xfe, | 11866 | 0x12, 0x2b, 0xff, 0x02, |
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13106 | 0xfe, 0x6c, 0x19, 0xfe, 0x19, 0x41, 0xe9, 0xb5, 0xfe, 0xd1, 0xf0, 0xd9, 0x14, 0x7a, 0x01, 0x33, | 11868 | 0x22, 0x30, 0x2e, 0xd5, |
13107 | 0x0f, 0xfe, 0x44, 0x00, 0xfe, 0x8e, 0x10, 0xfe, 0x6c, 0x19, 0xbe, 0x39, 0xfe, 0xed, 0x19, 0xbf, | 11869 | 0xfe, 0x4c, 0x44, 0xfe, 0x4c, 0x12, 0x60, 0xfe, 0x44, 0x48, 0x13, 0x2c, |
13108 | 0x3a, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0xe9, 0x1c, 0xfe, 0x00, 0xff, 0x34, 0xfe, 0x74, 0x10, | 11870 | 0xfe, 0x4c, 0x54, 0x64, |
13109 | 0xb5, 0xfe, 0xd2, 0xf0, 0xfe, 0xb2, 0x0a, 0xfe, 0x76, 0x18, 0x1c, 0x1a, 0x84, 0x05, 0xcb, 0x1c, | 11871 | 0xd3, 0x46, 0x76, 0x27, 0xfa, 0xef, 0xfe, 0x62, 0x13, 0x09, 0x04, 0x1d, |
13110 | 0x06, 0xfe, 0x08, 0x13, 0x0f, 0xfe, 0x16, 0x00, 0x02, 0x5a, 0xfe, 0xd1, 0xf0, 0xfe, 0xc4, 0x0a, | 11872 | 0xfe, 0x2a, 0x13, 0x2f, |
13111 | 0x14, 0x7a, 0x01, 0x33, 0x0f, 0xfe, 0x17, 0x00, 0xfe, 0x42, 0x10, 0xfe, 0xce, 0xf0, 0xfe, 0xca, | 11873 | 0x07, 0x7e, 0xa5, 0xfe, 0x20, 0x10, 0x13, 0x2c, 0xfe, 0x4c, 0x54, 0x64, |
13112 | 0x0a, 0xfe, 0x3c, 0x10, 0xfe, 0xcd, 0xf0, 0xfe, 0xd6, 0x0a, 0x0f, 0xfe, 0x22, 0x00, 0x02, 0x5a, | 11874 | 0xd3, 0xfa, 0xef, 0x86, |
13113 | 0xfe, 0xcb, 0xf0, 0xfe, 0xe2, 0x0a, 0x0f, 0xfe, 0x24, 0x00, 0x02, 0x5a, 0xfe, 0xd0, 0xf0, 0xfe, | 11875 | 0x09, 0x04, 0x1d, 0xfe, 0x08, 0x13, 0x2f, 0x07, 0x7e, 0x6e, 0x09, 0x04, |
13114 | 0xec, 0x0a, 0x0f, 0x93, 0xdc, 0xfe, 0xcf, 0xf0, 0xfe, 0xf6, 0x0a, 0x0f, 0x4c, 0xfe, 0x10, 0x10, | 11876 | 0x1d, 0xfe, 0x1c, 0x12, |
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13116 | 0x11, 0x65, 0xfe, 0x0c, 0x0b, 0xfe, 0x9e, 0xf0, 0xfe, 0x20, 0x0b, 0xb1, 0x16, 0x32, 0x2a, 0x73, | 11878 | 0x70, 0x0c, 0x02, 0x22, |
13117 | 0xdd, 0xb8, 0x22, 0xb9, 0x22, 0x2a, 0xec, 0x65, 0xfe, 0x2c, 0x0b, 0x25, 0x32, 0x8c, 0xfe, 0x48, | 11879 | 0x2b, 0x11, 0xfe, 0xe6, 0x00, 0xfe, 0x1c, 0x90, 0xf9, 0x03, 0x14, 0x92, |
13118 | 0x0b, 0x8d, 0x81, 0xb8, 0xd4, 0xb9, 0xd4, 0x02, 0x22, 0x01, 0x43, 0xfe, 0xdb, 0x10, 0x11, 0xfe, | 11880 | 0x01, 0x33, 0x02, 0x29, |
13119 | 0xe8, 0x00, 0xaa, 0xab, 0x70, 0xbc, 0x7d, 0xbd, 0x7f, 0xfe, 0x89, 0xf0, 0x22, 0x30, 0x2e, 0xd8, | 11881 | 0xfe, 0x42, 0x5b, 0x67, 0x1a, 0xfe, 0x46, 0x59, 0xf8, 0xf7, 0xfe, 0x87, |
13120 | 0xbc, 0x7d, 0xbd, 0x7f, 0x01, 0x08, 0x1f, 0x22, 0x30, 0x2e, 0xd6, 0xb1, 0x45, 0x0f, 0xfe, 0x42, | 11882 | 0x80, 0xfe, 0x31, 0xe4, |
13121 | 0x00, 0x02, 0x5a, 0x78, 0x06, 0xfe, 0x81, 0x49, 0x16, 0xfe, 0x38, 0x0c, 0x09, 0x04, 0x0b, 0xfe, | 11883 | 0x4f, 0x09, 0x04, 0x0b, 0xfe, 0x78, 0x13, 0xfe, 0x20, 0x80, 0x07, 0x1a, |
13122 | 0x44, 0x13, 0x0f, 0x00, 0x4b, 0x0b, 0xfe, 0x54, 0x12, 0x4b, 0xfe, 0x28, 0x00, 0x21, 0xfe, 0xa6, | 11884 | 0xfe, 0x70, 0x12, 0x49, |
13123 | 0x0c, 0x0a, 0x40, 0x01, 0x0e, 0x07, 0x00, 0x5d, 0x3e, 0xfe, 0x28, 0x00, 0xfe, 0xe2, 0x10, 0x01, | 11885 | 0x04, 0x06, 0xfe, 0x60, 0x13, 0x05, 0xfe, 0xa2, 0x00, 0x28, 0x16, 0xfe, |
13124 | 0xe7, 0x01, 0xe8, 0x0a, 0x99, 0x01, 0xfe, 0x32, 0x0e, 0x59, 0x11, 0x2d, 0x01, 0x6f, 0x02, 0x29, | 11886 | 0x80, 0x05, 0xfe, 0x31, |
13125 | 0x0f, 0xfe, 0x44, 0x00, 0x4b, 0x0b, 0xdf, 0x3e, 0x0b, 0xfe, 0xb4, 0x10, 0x01, 0x86, 0x3e, 0x0b, | 11887 | 0xe4, 0x6a, 0x49, 0x04, 0x0b, 0xfe, 0x4a, 0x13, 0x05, 0xfe, 0xa0, 0x00, |
13126 | 0xfe, 0xaa, 0x10, 0x01, 0x86, 0xfe, 0x19, 0x82, 0xfe, 0x34, 0x46, 0xa3, 0x3e, 0x0b, 0x0f, 0xfe, | 11888 | 0x28, 0xfe, 0x42, 0x12, |
13127 | 0x43, 0x00, 0xfe, 0x96, 0x10, 0x09, 0x4a, 0x0b, 0x35, 0x01, 0xe7, 0x01, 0xe8, 0x59, 0x11, 0x2d, | 11889 | 0x5e, 0x01, 0x08, 0x25, 0x32, 0xf1, 0x01, 0x08, 0x26, 0xfe, 0x98, 0x05, |
13128 | 0x01, 0x6f, 0x67, 0x0b, 0x59, 0x3c, 0x8a, 0x02, 0xfe, 0x2a, 0x03, 0x09, 0x04, 0x0b, 0x84, 0x3e, | 11890 | 0x11, 0xfe, 0xe3, 0x00, |
13129 | 0x0b, 0x0f, 0x00, 0xfe, 0x5c, 0x10, 0x61, 0x04, 0x1b, 0xfe, 0x58, 0x12, 0x09, 0x04, 0x1b, 0xfe, | 11891 | 0x23, 0x49, 0xfe, 0x4a, 0xf0, 0xfe, 0x6a, 0x05, 0xfe, 0x49, 0xf0, 0xfe, |
13130 | 0x50, 0x13, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x5c, 0x0c, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, | 11892 | 0x64, 0x05, 0x83, 0x24, |
13131 | 0xf0, 0xfe, 0x62, 0x0c, 0x09, 0x4a, 0x1b, 0x35, 0xfe, 0xa9, 0x10, 0x0f, 0xfe, 0x15, 0x00, 0xfe, | 11893 | 0xfe, 0x21, 0x00, 0xa1, 0x24, 0xfe, 0x22, 0x00, 0xa0, 0x24, 0x4c, 0xfe, |
13132 | 0x04, 0xe6, 0x0b, 0x5f, 0x5c, 0x0f, 0xfe, 0x13, 0x00, 0xfe, 0x10, 0x10, 0x0f, 0xfe, 0x47, 0x00, | 11894 | 0x09, 0x48, 0x01, 0x08, |
13133 | 0xa1, 0x0f, 0xfe, 0x41, 0x00, 0xa0, 0x0f, 0xfe, 0x24, 0x00, 0x87, 0xaa, 0xab, 0x70, 0x05, 0x6b, | 11895 | 0x26, 0xfe, 0x98, 0x05, 0xfe, 0xe2, 0x08, 0x49, 0x04, 0xc5, 0x3b, 0x01, |
13134 | 0x28, 0x21, 0xd1, 0x5f, 0xfe, 0x04, 0xe6, 0x1b, 0xfe, 0x9d, 0x41, 0xfe, 0x1c, 0x42, 0x59, 0x01, | 11896 | 0x86, 0x24, 0x06, 0x12, |
13135 | 0xda, 0x02, 0x29, 0xea, 0x14, 0x0b, 0x37, 0x95, 0xa9, 0x14, 0xfe, 0x31, 0x00, 0x37, 0x97, 0x01, | 11897 | 0xcc, 0x37, 0xfe, 0x27, 0x01, 0x09, 0x04, 0x1d, 0xfe, 0x22, 0x12, 0x47, |
13136 | 0xfe, 0x54, 0x0f, 0x02, 0xd0, 0x3c, 0xfe, 0x06, 0xec, 0xc9, 0xee, 0x3e, 0x1d, 0xfe, 0xce, 0x45, | 11898 | 0x01, 0xa7, 0x14, 0x92, |
13137 | 0x34, 0x3c, 0xfe, 0x06, 0xea, 0xc9, 0xfe, 0x47, 0x4b, 0x89, 0xfe, 0x75, 0x57, 0x05, 0x51, 0xfe, | 11899 | 0x09, 0x04, 0x06, 0x3b, 0x14, 0xc4, 0x01, 0x33, 0x8f, 0xfe, 0x70, 0x0c, |
13138 | 0x98, 0x56, 0xfe, 0x38, 0x12, 0x0a, 0x42, 0x01, 0x0e, 0xfe, 0x44, 0x48, 0x46, 0x09, 0x04, 0x1d, | 11900 | 0x02, 0x22, 0x05, 0xfe, |
13139 | 0xfe, 0x1a, 0x13, 0x0a, 0x40, 0x01, 0x0e, 0x47, 0xfe, 0x41, 0x58, 0x0a, 0x99, 0x01, 0x0e, 0xfe, | 11901 | 0x9c, 0x00, 0x28, 0xfe, 0x3e, 0x12, 0x05, 0x50, 0x28, 0xfe, 0x36, 0x13, |
13140 | 0x49, 0x54, 0x8e, 0xfe, 0x2a, 0x0d, 0x02, 0xfe, 0x2a, 0x03, 0x0a, 0x51, 0xfe, 0xee, 0x14, 0xee, | 11902 | 0x47, 0x01, 0xa7, 0x26, |
13141 | 0x3e, 0x1d, 0xfe, 0xce, 0x45, 0x34, 0x3c, 0xfe, 0xce, 0x47, 0xfe, 0xad, 0x13, 0x02, 0x29, 0x1e, | 11903 | 0xfe, 0x08, 0x06, 0x0a, 0x06, 0x49, 0x04, 0x19, 0xfe, 0x02, 0x12, 0x5f, |
13142 | 0x20, 0x07, 0x10, 0xfe, 0x9e, 0x12, 0x23, 0x12, 0x4d, 0x12, 0x94, 0x12, 0xce, 0x1e, 0x2d, 0x47, | 11904 | 0x01, 0xfe, 0xaa, 0x14, |
13143 | 0x37, 0x2d, 0xb1, 0xe0, 0xfe, 0xbc, 0xf0, 0xfe, 0xec, 0x0d, 0x13, 0x06, 0x12, 0x4d, 0x01, 0xfe, | 11905 | 0x1f, 0xfe, 0xfe, 0x05, 0x11, 0x9a, 0x01, 0x43, 0x11, 0xfe, 0xe5, 0x00, |
13144 | 0xe2, 0x15, 0x05, 0xfe, 0x38, 0x01, 0x31, 0xfe, 0x3a, 0x01, 0x77, 0xfe, 0xf0, 0x0d, 0xfe, 0x02, | 11906 | 0x05, 0x50, 0xb4, 0x0c, |
13145 | 0xec, 0xce, 0x62, 0x00, 0x5d, 0xfe, 0x04, 0xec, 0x20, 0x46, 0xfe, 0x05, 0xf6, 0xfe, 0x34, 0x01, | 11907 | 0x50, 0x05, 0xc6, 0x28, 0xfe, 0x62, 0x12, 0x05, 0x3f, 0x28, 0xfe, 0x5a, |
13146 | 0x01, 0xfe, 0x52, 0x16, 0xfb, 0xfe, 0x48, 0xf4, 0x0d, 0xfe, 0x18, 0x13, 0xaf, 0xfe, 0x02, 0xea, | 11908 | 0x13, 0x01, 0xfe, 0x14, |
13147 | 0xce, 0x62, 0x7a, 0xfe, 0xc5, 0x13, 0x14, 0x1b, 0x37, 0x95, 0xa9, 0x5c, 0x05, 0xfe, 0x38, 0x01, | 11909 | 0x18, 0x01, 0xfe, 0x66, 0x18, 0xfe, 0x43, 0x48, 0xb7, 0x19, 0x13, 0x6c, |
13148 | 0x1c, 0xfe, 0xf0, 0xff, 0x0c, 0xfe, 0x60, 0x01, 0x05, 0xfe, 0x3a, 0x01, 0x0c, 0xfe, 0x62, 0x01, | 11910 | 0xff, 0x02, 0x00, 0x57, |
13149 | 0x3d, 0x12, 0x20, 0x24, 0x06, 0x12, 0x2d, 0x11, 0x2d, 0x8a, 0x13, 0x06, 0x03, 0x23, 0x03, 0x1e, | 11911 | 0x48, 0x8b, 0x1c, 0x3d, 0x85, 0xb7, 0x69, 0x47, 0x01, 0xa7, 0x26, 0xfe, |
13150 | 0x4d, 0xfe, 0xf7, 0x12, 0x1e, 0x94, 0xac, 0x12, 0x94, 0x07, 0x7a, 0xfe, 0x71, 0x13, 0xfe, 0x24, | 11912 | 0x72, 0x06, 0x49, 0x04, |
13151 | 0x1c, 0x14, 0x1a, 0x37, 0x95, 0xa9, 0xfe, 0xd9, 0x10, 0xb6, 0xfe, 0x03, 0xdc, 0xfe, 0x73, 0x57, | 11913 | 0x1b, 0xdf, 0x89, 0x0a, 0x4d, 0x01, 0xfe, 0xd8, 0x14, 0x1f, 0xfe, 0x68, |
13152 | 0xfe, 0x80, 0x5d, 0x03, 0xb6, 0xfe, 0x03, 0xdc, 0xfe, 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x03, 0xfe, | 11914 | 0x06, 0x11, 0x9a, 0x01, |
13153 | 0x03, 0x57, 0xb6, 0x23, 0xfe, 0x00, 0xcc, 0x03, 0xfe, 0x03, 0x57, 0xb6, 0x75, 0x03, 0x09, 0x04, | 11915 | 0x43, 0x11, 0xfe, 0xe5, 0x00, 0x05, 0x3f, 0xb4, 0x0c, 0x3f, 0x17, 0x06, |
13154 | 0x4c, 0xfe, 0x22, 0x13, 0xfe, 0x1c, 0x80, 0x07, 0x06, 0xfe, 0x1a, 0x13, 0xfe, 0x1e, 0x80, 0xe1, | 11916 | 0x01, 0xa7, 0xec, 0x72, |
13155 | 0xfe, 0x1d, 0x80, 0xa4, 0xfe, 0x0c, 0x90, 0xfe, 0x0e, 0x13, 0xfe, 0x0e, 0x90, 0xa3, 0xfe, 0x3c, | 11917 | 0x70, 0x01, 0x6e, 0x87, 0x11, 0xfe, 0xe2, 0x00, 0x01, 0x08, 0x25, 0x32, |
13156 | 0x90, 0xfe, 0x30, 0xf4, 0x0b, 0xfe, 0x3c, 0x50, 0xa0, 0x01, 0xfe, 0x82, 0x16, 0x2f, 0x07, 0x2d, | 11918 | 0xfe, 0x0a, 0xf0, 0xfe, |
13157 | 0xe0, 0x01, 0xfe, 0xbc, 0x15, 0x09, 0x04, 0x1d, 0x45, 0x01, 0xe7, 0x01, 0xe8, 0x11, 0xfe, 0xe9, | 11919 | 0xa6, 0x06, 0x8c, 0xfe, 0x5c, 0x07, 0xfe, 0x06, 0xf0, 0xfe, 0x64, 0x07, |
13158 | 0x00, 0x09, 0x04, 0x4c, 0xfe, 0x2c, 0x13, 0x01, 0xfe, 0x14, 0x16, 0xfe, 0x1e, 0x1c, 0xfe, 0x14, | 11920 | 0x8d, 0x81, 0x02, 0x22, |
13159 | 0x90, 0xfe, 0x96, 0x90, 0x0c, 0xfe, 0x64, 0x01, 0x18, 0xfe, 0x66, 0x01, 0x09, 0x04, 0x4f, 0xfe, | 11921 | 0x09, 0x04, 0x0b, 0xfe, 0x2e, 0x12, 0x15, 0x1a, 0x01, 0x08, 0x15, 0x00, |
13160 | 0x12, 0x12, 0xfe, 0x03, 0x80, 0x74, 0xfe, 0x01, 0xec, 0x20, 0xfe, 0x80, 0x40, 0x12, 0x20, 0x63, | 11922 | 0x01, 0x08, 0x15, 0x00, |
13161 | 0x27, 0x11, 0xc8, 0x59, 0x1e, 0x20, 0xed, 0x76, 0x20, 0x03, 0xfe, 0x08, 0x1c, 0x05, 0xfe, 0xac, | 11923 | 0x01, 0x08, 0x15, 0x00, 0x01, 0x08, 0xfe, 0x99, 0xa4, 0x01, 0x08, 0x15, |
13162 | 0x00, 0xfe, 0x06, 0x58, 0x05, 0xfe, 0xae, 0x00, 0xfe, 0x07, 0x58, 0x05, 0xfe, 0xb0, 0x00, 0xfe, | 11924 | 0x00, 0x02, 0xfe, 0x32, |
13163 | 0x08, 0x58, 0x05, 0xfe, 0xb2, 0x00, 0xfe, 0x09, 0x58, 0xfe, 0x0a, 0x1c, 0x24, 0x69, 0x12, 0xc9, | 11925 | 0x08, 0x61, 0x04, 0x1b, 0xfe, 0x38, 0x12, 0x09, 0x04, 0x1b, 0x6e, 0x15, |
13164 | 0x23, 0x0c, 0x50, 0x0c, 0x3f, 0x13, 0x40, 0x48, 0x5f, 0x17, 0x1d, 0xfe, 0x90, 0x4d, 0xfe, 0x91, | 11926 | 0xfe, 0x1b, 0x00, 0x01, |
13165 | 0x54, 0x21, 0xfe, 0x08, 0x0f, 0x3e, 0x10, 0x13, 0x42, 0x48, 0x17, 0x4c, 0xfe, 0x90, 0x4d, 0xfe, | 11927 | 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x00, 0x01, 0x08, 0x15, 0x00, 0x01, |
13166 | 0x91, 0x54, 0x21, 0xfe, 0x1e, 0x0f, 0x24, 0x10, 0x12, 0x20, 0x78, 0x2c, 0x46, 0x1e, 0x20, 0xed, | 11928 | 0x08, 0x15, 0x06, 0x01, |
13167 | 0x76, 0x20, 0x11, 0xc8, 0xf6, 0xfe, 0xd6, 0xf0, 0xfe, 0x32, 0x0f, 0xea, 0x70, 0xfe, 0x14, 0x1c, | 11929 | 0x08, 0x15, 0x00, 0x02, 0xd9, 0x66, 0x4c, 0xfe, 0x3a, 0x55, 0x5f, 0xfe, |
13168 | 0xfe, 0x10, 0x1c, 0xfe, 0x18, 0x1c, 0x03, 0x3c, 0xfe, 0x0c, 0x14, 0xee, 0xfe, 0x07, 0xe6, 0x1d, | 11930 | 0x9a, 0x81, 0x4b, 0x1d, |
13169 | 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x03, 0x01, 0x86, 0x78, 0x2c, 0x46, 0xfa, 0xef, 0xfe, 0x42, | 11931 | 0xba, 0xfe, 0x32, 0x07, 0x0a, 0x1d, 0xfe, 0x09, 0x6f, 0xaf, 0xfe, 0xca, |
13170 | 0x13, 0x2f, 0x07, 0x2d, 0xfe, 0x34, 0x13, 0x0a, 0x42, 0x01, 0x0e, 0xb0, 0xfe, 0x36, 0x12, 0xf0, | 11932 | 0x45, 0xfe, 0x32, 0x12, |
13171 | 0xfe, 0x45, 0x48, 0x01, 0xe3, 0xfe, 0x00, 0xcc, 0xb0, 0xfe, 0xf3, 0x13, 0x3d, 0x75, 0x07, 0x10, | 11933 | 0x62, 0x2c, 0x85, 0x66, 0x7b, 0x01, 0x08, 0x25, 0x32, 0xfe, 0x0a, 0xf0, |
13172 | 0xa3, 0x0a, 0x80, 0x01, 0x0e, 0xfe, 0x80, 0x5c, 0x01, 0x6f, 0xfe, 0x0e, 0x10, 0x07, 0x7e, 0x45, | 11934 | 0xfe, 0x32, 0x07, 0x8d, |
13173 | 0xf6, 0xfe, 0xd6, 0xf0, 0xfe, 0x6c, 0x0f, 0x03, 0xfe, 0x44, 0x58, 0x74, 0xfe, 0x01, 0xec, 0x97, | 11935 | 0x81, 0x8c, 0xfe, 0x5c, 0x07, 0x02, 0x22, 0x01, 0x43, 0x02, 0xfe, 0x8a, |
13174 | 0xfe, 0x9e, 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x1b, 0x76, 0x27, 0x01, 0xda, 0xfe, | 11936 | 0x06, 0x15, 0x19, 0x02, |
13175 | 0xdd, 0x10, 0x2a, 0xbc, 0x7d, 0xbd, 0x7f, 0x30, 0x2e, 0xd5, 0x07, 0x1b, 0xfe, 0x48, 0x12, 0x07, | 11937 | 0xfe, 0x8a, 0x06, 0xfe, 0x9c, 0xf7, 0xd4, 0xfe, 0x2c, 0x90, 0xfe, 0xae, |
13176 | 0x0b, 0xfe, 0x56, 0x12, 0x07, 0x1a, 0xfe, 0x30, 0x12, 0x07, 0xc2, 0x16, 0xfe, 0x3e, 0x11, 0x07, | 11938 | 0x90, 0x77, 0xfe, 0xca, |
13177 | 0xfe, 0x23, 0x00, 0x16, 0xfe, 0x4a, 0x11, 0x07, 0x06, 0x16, 0xfe, 0xa8, 0x11, 0x07, 0x19, 0xfe, | 11939 | 0x07, 0x0c, 0x54, 0x18, 0x55, 0x09, 0x4a, 0x6a, 0x35, 0x1e, 0x20, 0x07, |
13178 | 0x12, 0x12, 0x07, 0x00, 0x16, 0x22, 0x14, 0xc2, 0x01, 0x33, 0x9f, 0x2b, 0x01, 0x08, 0x8c, 0x43, | 11940 | 0x10, 0xfe, 0x0e, 0x12, |
13179 | 0x03, 0x2b, 0xfe, 0x62, 0x08, 0x0a, 0xca, 0x01, 0xfe, 0x32, 0x0e, 0x11, 0x7e, 0x02, 0x29, 0x2b, | 11941 | 0x74, 0xfe, 0x80, 0x80, 0x37, 0x20, 0x63, 0x27, 0xfe, 0x06, 0x10, 0xfe, |
13180 | 0x2f, 0x07, 0x9b, 0xfe, 0xd9, 0x13, 0x79, 0x39, 0x68, 0x3a, 0x77, 0xfe, 0xfc, 0x10, 0x09, 0x04, | 11942 | 0x83, 0xe7, 0xc4, 0xa1, |
13181 | 0x6a, 0xfe, 0x72, 0x12, 0xc0, 0x38, 0xc1, 0x4e, 0xf4, 0xf5, 0x8e, 0xfe, 0xc6, 0x10, 0x1e, 0x58, | 11943 | 0xfe, 0x03, 0x40, 0x09, 0x4a, 0x4f, 0x35, 0x01, 0xa8, 0xad, 0xfe, 0x1f, |
13182 | 0xfe, 0x26, 0x13, 0x05, 0x7b, 0x31, 0x7c, 0x77, 0xfe, 0x82, 0x0c, 0x0c, 0x54, 0x18, 0x55, 0x23, | 11944 | 0x40, 0x12, 0x58, 0x01, |
13183 | 0x0c, 0x7b, 0x0c, 0x7c, 0x01, 0xa8, 0x24, 0x69, 0x73, 0x12, 0x58, 0x01, 0xa5, 0xc0, 0x38, 0xc1, | 11945 | 0xa5, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0xfe, 0x44, 0x51, 0xfe, 0xc6, |
13184 | 0x4e, 0xfe, 0x04, 0x55, 0xfe, 0xa5, 0x55, 0xfe, 0x04, 0xfa, 0x38, 0xfe, 0x05, 0xfa, 0x4e, 0xfe, | 11946 | 0x51, 0x83, 0xfb, 0xfe, |
13185 | 0x91, 0x10, 0x05, 0x56, 0x31, 0x57, 0xfe, 0x40, 0x56, 0xfe, 0xe1, 0x56, 0x0c, 0x56, 0x18, 0x57, | 11947 | 0x8a, 0x90, 0x0c, 0x52, 0x18, 0x53, 0xfe, 0x0c, 0x90, 0xfe, 0x8e, 0x90, |
13186 | 0x83, 0xc0, 0x38, 0xc1, 0x4e, 0xf4, 0xf5, 0x05, 0x52, 0x31, 0x53, 0xfe, 0x00, 0x56, 0xfe, 0xa1, | 11948 | 0xfe, 0x40, 0x50, 0xfe, |
13187 | 0x56, 0x0c, 0x52, 0x18, 0x53, 0x09, 0x04, 0x6a, 0xfe, 0x1e, 0x12, 0x1e, 0x58, 0xfe, 0x1f, 0x40, | 11949 | 0xc2, 0x50, 0x0c, 0x39, 0x18, 0x3a, 0xfe, 0x4a, 0x10, 0x09, 0x04, 0x6a, |
13188 | 0x05, 0x54, 0x31, 0x55, 0xfe, 0x2c, 0x50, 0xfe, 0xae, 0x50, 0x05, 0x56, 0x31, 0x57, 0xfe, 0x44, | 11950 | 0xfe, 0x2a, 0x12, 0xfe, |
13189 | 0x50, 0xfe, 0xc6, 0x50, 0x05, 0x52, 0x31, 0x53, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0x05, 0x39, | 11951 | 0x2c, 0x90, 0xfe, 0xae, 0x90, 0x0c, 0x54, 0x18, 0x55, 0x09, 0x04, 0x4f, |
13190 | 0x31, 0x3a, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x02, 0x5c, 0x24, 0x06, 0x12, 0xcd, 0x02, 0x5b, | 11952 | 0x85, 0x01, 0xa8, 0xfe, |
13191 | 0x2b, 0x01, 0x08, 0x1f, 0x44, 0x30, 0x2e, 0xd5, 0x07, 0x06, 0x21, 0x44, 0x2f, 0x07, 0x9b, 0x21, | 11953 | 0x1f, 0x80, 0x12, 0x58, 0xfe, 0x44, 0x90, 0xfe, 0xc6, 0x90, 0x0c, 0x56, |
13192 | 0x5b, 0x01, 0x6e, 0x1c, 0x3d, 0x16, 0x44, 0x09, 0x04, 0x0b, 0xe2, 0x79, 0x39, 0x68, 0x3a, 0xfe, | 11954 | 0x18, 0x57, 0xfb, 0xfe, |
13193 | 0x0a, 0x55, 0x34, 0xfe, 0x8b, 0x55, 0xbe, 0x39, 0xbf, 0x3a, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, | 11955 | 0x8a, 0x90, 0x0c, 0x52, 0x18, 0x53, 0xfe, 0x40, 0x90, 0xfe, 0xc2, 0x90, |
13194 | 0x02, 0x5b, 0xfe, 0x19, 0x81, 0xaf, 0xfe, 0x19, 0x41, 0x02, 0x5b, 0x2b, 0x01, 0x08, 0x25, 0x32, | 11956 | 0x0c, 0x39, 0x18, 0x3a, |
13195 | 0x1f, 0xa2, 0x30, 0x2e, 0xd8, 0x4b, 0x1a, 0xfe, 0xa6, 0x12, 0x4b, 0x0b, 0x3b, 0x02, 0x44, 0x01, | 11957 | 0x0c, 0x38, 0x18, 0x4e, 0x09, 0x4a, 0x19, 0x35, 0x2a, 0x13, 0xfe, 0x4e, |
13196 | 0x08, 0x25, 0x32, 0x1f, 0xa2, 0x30, 0x2e, 0xd6, 0x07, 0x1a, 0x21, 0x44, 0x01, 0x08, 0x1f, 0xa2, | 11958 | 0x11, 0x65, 0xfe, 0x48, |
13197 | 0x30, 0x2e, 0xfe, 0xe8, 0x09, 0xfe, 0xc2, 0x49, 0x60, 0x05, 0xfe, 0x9c, 0x00, 0x28, 0x84, 0x49, | 11959 | 0x08, 0xfe, 0x9e, 0xf0, 0xfe, 0x5c, 0x08, 0xb1, 0x16, 0x32, 0x2a, 0x73, |
13198 | 0x04, 0x19, 0x34, 0x9f, 0xfe, 0xbb, 0x45, 0x4b, 0x00, 0x45, 0x3e, 0x06, 0x78, 0x3d, 0xfe, 0xda, | 11960 | 0xdd, 0xb8, 0xfe, 0x80, |
13199 | 0x14, 0x01, 0x6e, 0x87, 0xfe, 0x4b, 0x45, 0xe2, 0x2f, 0x07, 0x9a, 0xe1, 0x05, 0xc6, 0x28, 0x84, | 11961 | 0x08, 0xb9, 0xfe, 0x9e, 0x08, 0x8c, 0xfe, 0x74, 0x08, 0xfe, 0x06, 0xf0, |
13200 | 0x05, 0x3f, 0x28, 0x34, 0x5e, 0x02, 0x5b, 0xfe, 0xc0, 0x5d, 0xfe, 0xf8, 0x14, 0xfe, 0x03, 0x17, | 11962 | 0xfe, 0x7a, 0x08, 0x8d, |
13201 | 0x05, 0x50, 0xb4, 0x0c, 0x50, 0x5e, 0x2b, 0x01, 0x08, 0x26, 0x5c, 0x01, 0xfe, 0xaa, 0x14, 0x02, | 11963 | 0x81, 0x02, 0x22, 0x01, 0x43, 0xfe, 0xc9, 0x10, 0x15, 0x19, 0xfe, 0xc9, |
13202 | 0x5c, 0x01, 0x08, 0x25, 0x32, 0x1f, 0x44, 0x30, 0x2e, 0xd6, 0x07, 0x06, 0x21, 0x44, 0x01, 0xfe, | 11964 | 0x10, 0x61, 0x04, 0x06, |
13203 | 0x8e, 0x13, 0xfe, 0x42, 0x58, 0xfe, 0x82, 0x14, 0xfe, 0xa4, 0x14, 0x87, 0xfe, 0x4a, 0xf4, 0x0b, | 11965 | 0xfe, 0x10, 0x12, 0x61, 0x04, 0x0b, 0x45, 0x09, 0x04, 0x0b, 0xfe, 0x68, |
13204 | 0x16, 0x44, 0xfe, 0x4a, 0xf4, 0x06, 0xfe, 0x0c, 0x12, 0x2f, 0x07, 0x9a, 0x85, 0x02, 0x5b, 0x05, | 11966 | 0x12, 0xfe, 0x2e, 0x1c, |
13205 | 0x3f, 0xb4, 0x0c, 0x3f, 0x5e, 0x2b, 0x01, 0x08, 0x26, 0x5c, 0x01, 0xfe, 0xd8, 0x14, 0x02, 0x5c, | 11967 | 0x02, 0xfe, 0x24, 0x0a, 0x61, 0x04, 0x06, 0x45, 0x61, 0x04, 0x0b, 0xfe, |
13206 | 0x13, 0x06, 0x65, 0xfe, 0xca, 0x12, 0x26, 0xfe, 0xe0, 0x12, 0x72, 0xf1, 0x01, 0x08, 0x23, 0x72, | 11968 | 0x52, 0x12, 0xfe, 0x2c, |
13207 | 0x03, 0x8f, 0xfe, 0xdc, 0x12, 0x25, 0xfe, 0xdc, 0x12, 0x1f, 0xfe, 0xca, 0x12, 0x5e, 0x2b, 0x01, | 11969 | 0x1c, 0xfe, 0xaa, 0xf0, 0xfe, 0x1e, 0x09, 0xfe, 0xac, 0xf0, 0xfe, 0xbe, |
13208 | 0x08, 0xfe, 0xd5, 0x10, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, 0x1c, 0xfe, 0xff, 0x7f, | 11970 | 0x08, 0xfe, 0x8a, 0x10, |
13209 | 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x03, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, 0x1c, | 11971 | 0xaa, 0xfe, 0xf3, 0x10, 0xfe, 0xad, 0xf0, 0xfe, 0xca, 0x08, 0x02, 0xfe, |
13210 | 0x3d, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x03, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, | 11972 | 0x24, 0x0a, 0xab, 0xfe, |
13211 | 0x03, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, 0xfe, 0x0b, 0x58, 0x03, 0x0a, 0x50, 0x01, | 11973 | 0xe7, 0x10, 0xfe, 0x2b, 0xf0, 0x9d, 0xe9, 0x1c, 0xfe, 0x00, 0xfe, 0xfe, |
13212 | 0x82, 0x0a, 0x3f, 0x01, 0x82, 0x03, 0xfc, 0x1c, 0x10, 0xff, 0x03, 0x00, 0x54, 0xfe, 0x00, 0xf4, | 11974 | 0x1c, 0x12, 0xb5, 0xfe, |
13213 | 0x19, 0x48, 0xfe, 0x00, 0x7d, 0xfe, 0x01, 0x7d, 0xfe, 0x02, 0x7d, 0xfe, 0x03, 0x7c, 0x63, 0x27, | 11975 | 0xd2, 0xf0, 0x9d, 0xfe, 0x76, 0x18, 0x1c, 0x1a, 0x16, 0x9d, 0x05, 0xcb, |
13214 | 0x0c, 0x52, 0x18, 0x53, 0xbe, 0x56, 0xbf, 0x57, 0x03, 0xfe, 0x62, 0x08, 0xfe, 0x82, 0x4a, 0xfe, | 11976 | 0x1c, 0x06, 0x16, 0x9d, |
13215 | 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x74, 0x03, 0x01, 0xfe, 0x14, 0x18, 0xfe, 0x42, 0x48, 0x5f, 0x60, | 11977 | 0xb8, 0x6d, 0xb9, 0x6d, 0xaa, 0xab, 0xfe, 0xb1, 0x10, 0x70, 0x5e, 0x2b, |
13216 | 0x89, 0x01, 0x08, 0x1f, 0xfe, 0xa2, 0x14, 0x30, 0x2e, 0xd8, 0x01, 0x08, 0x1f, 0xfe, 0xa2, 0x14, | 11978 | 0x14, 0x92, 0x01, 0x33, |
13217 | 0x30, 0x2e, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, 0x05, 0xc6, 0x28, 0xfe, 0xcc, 0x12, 0x49, 0x04, | 11979 | 0x0f, 0xfe, 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x5a, 0x0f, 0x7c, 0x02, 0x5a, |
13218 | 0x1b, 0xfe, 0xc4, 0x13, 0x23, 0x62, 0x1b, 0xe2, 0x4b, 0xc3, 0x64, 0xfe, 0xe8, 0x13, 0x3b, 0x13, | 11980 | 0xfe, 0x74, 0x18, 0x1c, |
13219 | 0x06, 0x17, 0xc3, 0x78, 0xdb, 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, 0xa1, 0xff, 0x02, 0x83, | 11981 | 0xfe, 0x00, 0xf8, 0x16, 0x6d, 0x67, 0x1b, 0x01, 0xfe, 0x44, 0x0d, 0x3b, |
13220 | 0x55, 0x62, 0x1a, 0xa4, 0xbb, 0xfe, 0x30, 0x00, 0x8e, 0xe4, 0x17, 0x2c, 0x13, 0x06, 0xfe, 0x56, | 11982 | 0x01, 0xe6, 0x1e, 0x27, |
13221 | 0x10, 0x62, 0x0b, 0xe1, 0xbb, 0xfe, 0x64, 0x00, 0x8e, 0xe4, 0x0a, 0xfe, 0x64, 0x00, 0x17, 0x93, | 11983 | 0x74, 0x67, 0x1a, 0x02, 0x6d, 0x09, 0x04, 0x0b, 0x21, 0xfe, 0x06, 0x0a, |
13222 | 0x13, 0x06, 0xfe, 0x28, 0x10, 0x62, 0x06, 0xfe, 0x60, 0x13, 0xbb, 0xfe, 0xc8, 0x00, 0x8e, 0xe4, | 11984 | 0x09, 0x04, 0x6a, 0xfe, |
13223 | 0x0a, 0xfe, 0xc8, 0x00, 0x17, 0x4d, 0x13, 0x06, 0x83, 0xbb, 0xfe, 0x90, 0x01, 0xba, 0xfe, 0x4e, | 11985 | 0x82, 0x12, 0x09, 0x04, 0x19, 0xfe, 0x66, 0x13, 0x1e, 0x58, 0xac, 0xfc, |
13224 | 0x14, 0x89, 0xfe, 0x12, 0x10, 0xfe, 0x43, 0xf4, 0x94, 0xfe, 0x56, 0xf0, 0xfe, 0x60, 0x14, 0xfe, | 11986 | 0xfe, 0x83, 0x80, 0xfe, |
13225 | 0x04, 0xf4, 0x6c, 0xfe, 0x43, 0xf4, 0x93, 0xfe, 0xf3, 0x10, 0xf9, 0x01, 0xfe, 0x22, 0x13, 0x1c, | 11987 | 0xc8, 0x44, 0xfe, 0x2e, 0x13, 0xfe, 0x04, 0x91, 0xfe, 0x86, 0x91, 0x63, |
13226 | 0x3d, 0xfe, 0x10, 0x13, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4, 0x69, 0xba, 0xfe, 0x9c, 0x14, 0xb7, | 11988 | 0x27, 0xfe, 0x40, 0x59, |
13227 | 0x69, 0xfe, 0x1c, 0x10, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4, 0x19, 0xba, 0xfe, 0x9c, 0x14, 0xb7, | 11989 | 0xfe, 0xc1, 0x59, 0x77, 0xd7, 0x05, 0x54, 0x31, 0x55, 0x0c, 0x7b, 0x18, |
13228 | 0x19, 0x83, 0x60, 0x23, 0xfe, 0x4d, 0xf4, 0x00, 0xdf, 0x89, 0x13, 0x06, 0xfe, 0xb4, 0x56, 0xfe, | 11990 | 0x7c, 0xbe, 0x54, 0xbf, |
13229 | 0xc3, 0x58, 0x03, 0x60, 0x13, 0x0b, 0x03, 0x15, 0x06, 0x01, 0x08, 0x26, 0xe5, 0x15, 0x0b, 0x01, | 11991 | 0x55, 0x01, 0xa8, 0xad, 0x63, 0x27, 0x12, 0x58, 0xc0, 0x38, 0xc1, 0x4e, |
13230 | 0x08, 0x26, 0xe5, 0x15, 0x1a, 0x01, 0x08, 0x26, 0xe5, 0x72, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x03, | 11992 | 0x79, 0x56, 0x68, 0x57, |
13231 | 0x15, 0x06, 0x01, 0x08, 0x26, 0xa6, 0x15, 0x1a, 0x01, 0x08, 0x26, 0xa6, 0x15, 0x06, 0x01, 0x08, | 11993 | 0xf4, 0xf5, 0xfe, 0x04, 0xfa, 0x38, 0xfe, 0x05, 0xfa, 0x4e, 0x01, 0xa5, |
13232 | 0x26, 0xa6, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x26, 0xa6, 0x72, 0xfe, 0x89, 0x4a, 0x01, 0x08, 0x03, | 11994 | 0xa2, 0x23, 0x0c, 0x7b, |
13233 | 0x60, 0x03, 0x1e, 0xcc, 0x07, 0x06, 0xfe, 0x44, 0x13, 0xad, 0x12, 0xcc, 0xfe, 0x49, 0xf4, 0x00, | 11995 | 0x0c, 0x7c, 0x79, 0x56, 0x68, 0x57, 0xfe, 0x12, 0x10, 0x09, 0x04, 0x19, |
13234 | 0x3b, 0x72, 0x9f, 0x5e, 0xfe, 0x01, 0xec, 0xfe, 0x27, 0x01, 0xf1, 0x01, 0x08, 0x2f, 0x07, 0xfe, | 11996 | 0x16, 0xd7, 0x79, 0x39, |
13235 | 0xe3, 0x00, 0xfe, 0x20, 0x13, 0x1f, 0xfe, 0x5a, 0x15, 0x23, 0x12, 0xcd, 0x01, 0x43, 0x1e, 0xcd, | 11997 | 0x68, 0x3a, 0x09, 0x04, 0xfe, 0xf7, 0x00, 0x35, 0x05, 0x52, 0x31, 0x53, |
13236 | 0x07, 0x06, 0x45, 0x09, 0x4a, 0x06, 0x35, 0x03, 0x0a, 0x42, 0x01, 0x0e, 0xed, 0x88, 0x07, 0x10, | 11998 | 0xfe, 0x10, 0x58, 0xfe, |
13237 | 0xa4, 0x0a, 0x80, 0x01, 0x0e, 0x88, 0x0a, 0x51, 0x01, 0x9e, 0x03, 0x0a, 0x80, 0x01, 0x0e, 0x88, | 11999 | 0x91, 0x58, 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0x02, 0x6d, 0x09, 0x04, |
13238 | 0xfe, 0x80, 0xe7, 0x10, 0x07, 0x10, 0x84, 0xfe, 0x45, 0x58, 0x01, 0xe3, 0x88, 0x03, 0x0a, 0x42, | 12000 | 0x19, 0x16, 0xd7, 0x09, |
13239 | 0x01, 0x0e, 0x88, 0x0a, 0x51, 0x01, 0x9e, 0x03, 0x0a, 0x42, 0x01, 0x0e, 0xfe, 0x80, 0x80, 0xf2, | 12001 | 0x04, 0xfe, 0xf7, 0x00, 0x35, 0xfe, 0x3a, 0x55, 0xfe, 0x19, 0x81, 0x5f, |
13240 | 0xfe, 0x49, 0xe4, 0x10, 0xa4, 0x0a, 0x80, 0x01, 0x0e, 0xf2, 0x0a, 0x51, 0x01, 0x82, 0x03, 0x17, | 12002 | 0xfe, 0x10, 0x90, 0xfe, |
13241 | 0x10, 0x71, 0x66, 0xfe, 0x60, 0x01, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x24, 0x1c, 0xfe, | 12003 | 0x92, 0x90, 0xfe, 0xd7, 0x10, 0x2f, 0x07, 0x9b, 0x16, 0xfe, 0xc6, 0x08, |
13242 | 0x1d, 0xf7, 0x1d, 0x90, 0xfe, 0xf6, 0x15, 0x01, 0xfe, 0xfc, 0x16, 0xe0, 0x91, 0x1d, 0x66, 0xfe, | 12004 | 0x11, 0x9b, 0x09, 0x04, |
13243 | 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x03, 0xae, 0x21, 0xfe, 0xe6, 0x15, 0xfe, 0xda, 0x10, 0x17, 0x10, | 12005 | 0x0b, 0xfe, 0x14, 0x13, 0x05, 0x39, 0x31, 0x3a, 0x77, 0xfe, 0xc6, 0x08, |
13244 | 0x71, 0x05, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x19, 0xfe, 0x18, 0x58, 0x05, 0xfe, 0x66, 0x01, | 12006 | 0xfe, 0x0c, 0x58, 0xfe, |
13245 | 0xfe, 0x19, 0x58, 0x91, 0x19, 0xfe, 0x3c, 0x90, 0xfe, 0x30, 0xf4, 0x06, 0xfe, 0x3c, 0x50, 0x66, | 12007 | 0x8d, 0x58, 0x02, 0x6d, 0x23, 0x47, 0xfe, 0x19, 0x80, 0xde, 0x09, 0x04, |
13246 | 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0x19, 0x90, 0xfe, 0x40, 0x16, 0xfe, 0xb6, | 12008 | 0x0b, 0xfe, 0x1a, 0x12, |
13247 | 0x14, 0x34, 0x03, 0xae, 0x21, 0xfe, 0x18, 0x16, 0xfe, 0x9c, 0x10, 0x17, 0x10, 0x71, 0xfe, 0x83, | 12009 | 0xfe, 0x6c, 0x19, 0xfe, 0x19, 0x41, 0xe9, 0xb5, 0xfe, 0xd1, 0xf0, 0xd9, |
13248 | 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x1d, 0xf7, 0x38, 0x90, 0xfe, 0x62, 0x16, 0xfe, | 12010 | 0x14, 0x7a, 0x01, 0x33, |
13249 | 0x94, 0x14, 0xfe, 0x10, 0x13, 0x91, 0x38, 0x66, 0x1b, 0xfe, 0xaf, 0x19, 0xfe, 0x98, 0xe7, 0x00, | 12011 | 0x0f, 0xfe, 0x44, 0x00, 0xfe, 0x8e, 0x10, 0xfe, 0x6c, 0x19, 0xbe, 0x39, |
13250 | 0x03, 0xae, 0x21, 0xfe, 0x56, 0x16, 0xfe, 0x6c, 0x10, 0x17, 0x10, 0x71, 0xfe, 0x30, 0xbc, 0xfe, | 12012 | 0xfe, 0xed, 0x19, 0xbf, |
13251 | 0xb2, 0xbc, 0x91, 0xc5, 0x66, 0x1b, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0xc5, 0x90, 0xfe, 0x9a, | 12013 | 0x3a, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0xe9, 0x1c, 0xfe, 0x00, 0xff, |
13252 | 0x16, 0xfe, 0x5c, 0x14, 0x34, 0x03, 0xae, 0x21, 0xfe, 0x86, 0x16, 0xfe, 0x42, 0x10, 0xfe, 0x02, | 12014 | 0x34, 0xfe, 0x74, 0x10, |
13253 | 0xf6, 0x10, 0x71, 0xfe, 0x18, 0xfe, 0x54, 0xfe, 0x19, 0xfe, 0x55, 0xfc, 0xfe, 0x1d, 0xf7, 0x4f, | 12015 | 0xb5, 0xfe, 0xd2, 0xf0, 0xfe, 0xb2, 0x0a, 0xfe, 0x76, 0x18, 0x1c, 0x1a, |
13254 | 0x90, 0xfe, 0xc0, 0x16, 0xfe, 0x36, 0x14, 0xfe, 0x1c, 0x13, 0x91, 0x4f, 0x47, 0xfe, 0x83, 0x58, | 12016 | 0x84, 0x05, 0xcb, 0x1c, |
13255 | 0xfe, 0xaf, 0x19, 0xfe, 0x80, 0xe7, 0x10, 0xfe, 0x81, 0xe7, 0x10, 0x11, 0xfe, 0xdd, 0x00, 0x63, | 12017 | 0x06, 0xfe, 0x08, 0x13, 0x0f, 0xfe, 0x16, 0x00, 0x02, 0x5a, 0xfe, 0xd1, |
13256 | 0x27, 0x03, 0x63, 0x27, 0xfe, 0x12, 0x45, 0x21, 0xfe, 0xb0, 0x16, 0x14, 0x06, 0x37, 0x95, 0xa9, | 12018 | 0xf0, 0xfe, 0xc4, 0x0a, |
13257 | 0x02, 0x29, 0xfe, 0x39, 0xf0, 0xfe, 0x04, 0x17, 0x23, 0x03, 0xfe, 0x7e, 0x18, 0x1c, 0x1a, 0x5d, | 12019 | 0x14, 0x7a, 0x01, 0x33, 0x0f, 0xfe, 0x17, 0x00, 0xfe, 0x42, 0x10, 0xfe, |
13258 | 0x13, 0x0d, 0x03, 0x71, 0x05, 0xcb, 0x1c, 0x06, 0xfe, 0xef, 0x12, 0xfe, 0xe1, 0x10, 0x78, 0x2c, | 12020 | 0xce, 0xf0, 0xfe, 0xca, |
13259 | 0x46, 0x2f, 0x07, 0x2d, 0xfe, 0x3c, 0x13, 0xfe, 0x82, 0x14, 0xfe, 0x42, 0x13, 0x3c, 0x8a, 0x0a, | 12021 | 0x0a, 0xfe, 0x3c, 0x10, 0xfe, 0xcd, 0xf0, 0xfe, 0xd6, 0x0a, 0x0f, 0xfe, |
13260 | 0x42, 0x01, 0x0e, 0xb0, 0xfe, 0x3e, 0x12, 0xf0, 0xfe, 0x45, 0x48, 0x01, 0xe3, 0xfe, 0x00, 0xcc, | 12022 | 0x22, 0x00, 0x02, 0x5a, |
13261 | 0xb0, 0xfe, 0xf3, 0x13, 0x3d, 0x75, 0x07, 0x10, 0xa3, 0x0a, 0x80, 0x01, 0x0e, 0xf2, 0x01, 0x6f, | 12023 | 0xfe, 0xcb, 0xf0, 0xfe, 0xe2, 0x0a, 0x0f, 0xfe, 0x24, 0x00, 0x02, 0x5a, |
13262 | 0xfe, 0x16, 0x10, 0x07, 0x7e, 0x85, 0xfe, 0x40, 0x14, 0xfe, 0x24, 0x12, 0xf6, 0xfe, 0xd6, 0xf0, | 12024 | 0xfe, 0xd0, 0xf0, 0xfe, |
13263 | 0xfe, 0x24, 0x17, 0x17, 0x0b, 0x03, 0xfe, 0x9c, 0xe7, 0x0b, 0x0f, 0xfe, 0x15, 0x00, 0x59, 0x76, | 12025 | 0xec, 0x0a, 0x0f, 0x93, 0xdc, 0xfe, 0xcf, 0xf0, 0xfe, 0xf6, 0x0a, 0x0f, |
13264 | 0x27, 0x01, 0xda, 0x17, 0x06, 0x03, 0x3c, 0x8a, 0x09, 0x4a, 0x1d, 0x35, 0x11, 0x2d, 0x01, 0x6f, | 12026 | 0x4c, 0xfe, 0x10, 0x10, |
13265 | 0x17, 0x06, 0x03, 0xfe, 0x38, 0x90, 0xfe, 0xba, 0x90, 0x79, 0xc7, 0x68, 0xc8, 0xfe, 0x48, 0x55, | 12027 | 0xfe, 0xcc, 0xf0, 0xd9, 0x61, 0x04, 0x19, 0x3b, 0x0f, 0xfe, 0x12, 0x00, |
13266 | 0x34, 0xfe, 0xc9, 0x55, 0x03, 0x1e, 0x98, 0x73, 0x12, 0x98, 0x03, 0x0a, 0x99, 0x01, 0x0e, 0xf0, | 12028 | 0x2a, 0x13, 0xfe, 0x4e, |
13267 | 0x0a, 0x40, 0x01, 0x0e, 0xfe, 0x49, 0x44, 0x16, 0xfe, 0xf0, 0x17, 0x73, 0x75, 0x03, 0x0a, 0x42, | 12029 | 0x11, 0x65, 0xfe, 0x0c, 0x0b, 0xfe, 0x9e, 0xf0, 0xfe, 0x20, 0x0b, 0xb1, |
13268 | 0x01, 0x0e, 0x07, 0x10, 0x45, 0x0a, 0x51, 0x01, 0x9e, 0x0a, 0x40, 0x01, 0x0e, 0x73, 0x75, 0x03, | 12030 | 0x16, 0x32, 0x2a, 0x73, |
13269 | 0xfe, 0x4e, 0xe4, 0x1a, 0x64, 0xfe, 0x24, 0x18, 0x05, 0xfe, 0x90, 0x00, 0xfe, 0x3a, 0x45, 0x5b, | 12031 | 0xdd, 0xb8, 0x22, 0xb9, 0x22, 0x2a, 0xec, 0x65, 0xfe, 0x2c, 0x0b, 0x25, |
13270 | 0xfe, 0x4e, 0xe4, 0xc2, 0x64, 0xfe, 0x36, 0x18, 0x05, 0xfe, 0x92, 0x00, 0xfe, 0x02, 0xe6, 0x1b, | 12032 | 0x32, 0x8c, 0xfe, 0x48, |
13271 | 0xdc, 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x64, 0xfe, 0x48, 0x18, 0x05, 0xfe, 0x94, 0x00, 0xfe, | 12033 | 0x0b, 0x8d, 0x81, 0xb8, 0xd4, 0xb9, 0xd4, 0x02, 0x22, 0x01, 0x43, 0xfe, |
13272 | 0x02, 0xe6, 0x19, 0xfe, 0x08, 0x10, 0x05, 0xfe, 0x96, 0x00, 0xfe, 0x02, 0xe6, 0x2c, 0xfe, 0x4e, | 12034 | 0xdb, 0x10, 0x11, 0xfe, |
13273 | 0x45, 0xfe, 0x0c, 0x12, 0xaf, 0xff, 0x04, 0x68, 0x54, 0xde, 0x1c, 0x69, 0x03, 0x07, 0x7a, 0xfe, | 12035 | 0xe8, 0x00, 0xaa, 0xab, 0x70, 0xbc, 0x7d, 0xbd, 0x7f, 0xfe, 0x89, 0xf0, |
13274 | 0x5a, 0xf0, 0xfe, 0x74, 0x18, 0x24, 0xfe, 0x09, 0x00, 0xfe, 0x34, 0x10, 0x07, 0x1b, 0xfe, 0x5a, | 12036 | 0x22, 0x30, 0x2e, 0xd8, |
13275 | 0xf0, 0xfe, 0x82, 0x18, 0x24, 0xc3, 0xfe, 0x26, 0x10, 0x07, 0x1a, 0x5d, 0x24, 0x2c, 0xdc, 0x07, | 12037 | 0xbc, 0x7d, 0xbd, 0x7f, 0x01, 0x08, 0x1f, 0x22, 0x30, 0x2e, 0xd6, 0xb1, |
13276 | 0x0b, 0x5d, 0x24, 0x93, 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x5d, 0x24, 0x4d, 0x9f, 0xad, 0x03, 0x14, | 12038 | 0x45, 0x0f, 0xfe, 0x42, |
13277 | 0xfe, 0x09, 0x00, 0x01, 0x33, 0xfe, 0x04, 0xfe, 0x7d, 0x05, 0x7f, 0xf9, 0x03, 0x25, 0xfe, 0xca, | 12039 | 0x00, 0x02, 0x5a, 0x78, 0x06, 0xfe, 0x81, 0x49, 0x16, 0xfe, 0x38, 0x0c, |
13278 | 0x18, 0xfe, 0x14, 0xf0, 0x08, 0x65, 0xfe, 0xc6, 0x18, 0x03, 0xff, 0x1a, 0x00, 0x00, | 12040 | 0x09, 0x04, 0x0b, 0xfe, |
12041 | 0x44, 0x13, 0x0f, 0x00, 0x4b, 0x0b, 0xfe, 0x54, 0x12, 0x4b, 0xfe, 0x28, | ||
12042 | 0x00, 0x21, 0xfe, 0xa6, | ||
12043 | 0x0c, 0x0a, 0x40, 0x01, 0x0e, 0x07, 0x00, 0x5d, 0x3e, 0xfe, 0x28, 0x00, | ||
12044 | 0xfe, 0xe2, 0x10, 0x01, | ||
12045 | 0xe7, 0x01, 0xe8, 0x0a, 0x99, 0x01, 0xfe, 0x32, 0x0e, 0x59, 0x11, 0x2d, | ||
12046 | 0x01, 0x6f, 0x02, 0x29, | ||
12047 | 0x0f, 0xfe, 0x44, 0x00, 0x4b, 0x0b, 0xdf, 0x3e, 0x0b, 0xfe, 0xb4, 0x10, | ||
12048 | 0x01, 0x86, 0x3e, 0x0b, | ||
12049 | 0xfe, 0xaa, 0x10, 0x01, 0x86, 0xfe, 0x19, 0x82, 0xfe, 0x34, 0x46, 0xa3, | ||
12050 | 0x3e, 0x0b, 0x0f, 0xfe, | ||
12051 | 0x43, 0x00, 0xfe, 0x96, 0x10, 0x09, 0x4a, 0x0b, 0x35, 0x01, 0xe7, 0x01, | ||
12052 | 0xe8, 0x59, 0x11, 0x2d, | ||
12053 | 0x01, 0x6f, 0x67, 0x0b, 0x59, 0x3c, 0x8a, 0x02, 0xfe, 0x2a, 0x03, 0x09, | ||
12054 | 0x04, 0x0b, 0x84, 0x3e, | ||
12055 | 0x0b, 0x0f, 0x00, 0xfe, 0x5c, 0x10, 0x61, 0x04, 0x1b, 0xfe, 0x58, 0x12, | ||
12056 | 0x09, 0x04, 0x1b, 0xfe, | ||
12057 | 0x50, 0x13, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x5c, 0x0c, 0xfe, | ||
12058 | 0x1c, 0x1c, 0xfe, 0x9d, | ||
12059 | 0xf0, 0xfe, 0x62, 0x0c, 0x09, 0x4a, 0x1b, 0x35, 0xfe, 0xa9, 0x10, 0x0f, | ||
12060 | 0xfe, 0x15, 0x00, 0xfe, | ||
12061 | 0x04, 0xe6, 0x0b, 0x5f, 0x5c, 0x0f, 0xfe, 0x13, 0x00, 0xfe, 0x10, 0x10, | ||
12062 | 0x0f, 0xfe, 0x47, 0x00, | ||
12063 | 0xa1, 0x0f, 0xfe, 0x41, 0x00, 0xa0, 0x0f, 0xfe, 0x24, 0x00, 0x87, 0xaa, | ||
12064 | 0xab, 0x70, 0x05, 0x6b, | ||
12065 | 0x28, 0x21, 0xd1, 0x5f, 0xfe, 0x04, 0xe6, 0x1b, 0xfe, 0x9d, 0x41, 0xfe, | ||
12066 | 0x1c, 0x42, 0x59, 0x01, | ||
12067 | 0xda, 0x02, 0x29, 0xea, 0x14, 0x0b, 0x37, 0x95, 0xa9, 0x14, 0xfe, 0x31, | ||
12068 | 0x00, 0x37, 0x97, 0x01, | ||
12069 | 0xfe, 0x54, 0x0f, 0x02, 0xd0, 0x3c, 0xfe, 0x06, 0xec, 0xc9, 0xee, 0x3e, | ||
12070 | 0x1d, 0xfe, 0xce, 0x45, | ||
12071 | 0x34, 0x3c, 0xfe, 0x06, 0xea, 0xc9, 0xfe, 0x47, 0x4b, 0x89, 0xfe, 0x75, | ||
12072 | 0x57, 0x05, 0x51, 0xfe, | ||
12073 | 0x98, 0x56, 0xfe, 0x38, 0x12, 0x0a, 0x42, 0x01, 0x0e, 0xfe, 0x44, 0x48, | ||
12074 | 0x46, 0x09, 0x04, 0x1d, | ||
12075 | 0xfe, 0x1a, 0x13, 0x0a, 0x40, 0x01, 0x0e, 0x47, 0xfe, 0x41, 0x58, 0x0a, | ||
12076 | 0x99, 0x01, 0x0e, 0xfe, | ||
12077 | 0x49, 0x54, 0x8e, 0xfe, 0x2a, 0x0d, 0x02, 0xfe, 0x2a, 0x03, 0x0a, 0x51, | ||
12078 | 0xfe, 0xee, 0x14, 0xee, | ||
12079 | 0x3e, 0x1d, 0xfe, 0xce, 0x45, 0x34, 0x3c, 0xfe, 0xce, 0x47, 0xfe, 0xad, | ||
12080 | 0x13, 0x02, 0x29, 0x1e, | ||
12081 | 0x20, 0x07, 0x10, 0xfe, 0x9e, 0x12, 0x23, 0x12, 0x4d, 0x12, 0x94, 0x12, | ||
12082 | 0xce, 0x1e, 0x2d, 0x47, | ||
12083 | 0x37, 0x2d, 0xb1, 0xe0, 0xfe, 0xbc, 0xf0, 0xfe, 0xec, 0x0d, 0x13, 0x06, | ||
12084 | 0x12, 0x4d, 0x01, 0xfe, | ||
12085 | 0xe2, 0x15, 0x05, 0xfe, 0x38, 0x01, 0x31, 0xfe, 0x3a, 0x01, 0x77, 0xfe, | ||
12086 | 0xf0, 0x0d, 0xfe, 0x02, | ||
12087 | 0xec, 0xce, 0x62, 0x00, 0x5d, 0xfe, 0x04, 0xec, 0x20, 0x46, 0xfe, 0x05, | ||
12088 | 0xf6, 0xfe, 0x34, 0x01, | ||
12089 | 0x01, 0xfe, 0x52, 0x16, 0xfb, 0xfe, 0x48, 0xf4, 0x0d, 0xfe, 0x18, 0x13, | ||
12090 | 0xaf, 0xfe, 0x02, 0xea, | ||
12091 | 0xce, 0x62, 0x7a, 0xfe, 0xc5, 0x13, 0x14, 0x1b, 0x37, 0x95, 0xa9, 0x5c, | ||
12092 | 0x05, 0xfe, 0x38, 0x01, | ||
12093 | 0x1c, 0xfe, 0xf0, 0xff, 0x0c, 0xfe, 0x60, 0x01, 0x05, 0xfe, 0x3a, 0x01, | ||
12094 | 0x0c, 0xfe, 0x62, 0x01, | ||
12095 | 0x3d, 0x12, 0x20, 0x24, 0x06, 0x12, 0x2d, 0x11, 0x2d, 0x8a, 0x13, 0x06, | ||
12096 | 0x03, 0x23, 0x03, 0x1e, | ||
12097 | 0x4d, 0xfe, 0xf7, 0x12, 0x1e, 0x94, 0xac, 0x12, 0x94, 0x07, 0x7a, 0xfe, | ||
12098 | 0x71, 0x13, 0xfe, 0x24, | ||
12099 | 0x1c, 0x14, 0x1a, 0x37, 0x95, 0xa9, 0xfe, 0xd9, 0x10, 0xb6, 0xfe, 0x03, | ||
12100 | 0xdc, 0xfe, 0x73, 0x57, | ||
12101 | 0xfe, 0x80, 0x5d, 0x03, 0xb6, 0xfe, 0x03, 0xdc, 0xfe, 0x5b, 0x57, 0xfe, | ||
12102 | 0x80, 0x5d, 0x03, 0xfe, | ||
12103 | 0x03, 0x57, 0xb6, 0x23, 0xfe, 0x00, 0xcc, 0x03, 0xfe, 0x03, 0x57, 0xb6, | ||
12104 | 0x75, 0x03, 0x09, 0x04, | ||
12105 | 0x4c, 0xfe, 0x22, 0x13, 0xfe, 0x1c, 0x80, 0x07, 0x06, 0xfe, 0x1a, 0x13, | ||
12106 | 0xfe, 0x1e, 0x80, 0xe1, | ||
12107 | 0xfe, 0x1d, 0x80, 0xa4, 0xfe, 0x0c, 0x90, 0xfe, 0x0e, 0x13, 0xfe, 0x0e, | ||
12108 | 0x90, 0xa3, 0xfe, 0x3c, | ||
12109 | 0x90, 0xfe, 0x30, 0xf4, 0x0b, 0xfe, 0x3c, 0x50, 0xa0, 0x01, 0xfe, 0x82, | ||
12110 | 0x16, 0x2f, 0x07, 0x2d, | ||
12111 | 0xe0, 0x01, 0xfe, 0xbc, 0x15, 0x09, 0x04, 0x1d, 0x45, 0x01, 0xe7, 0x01, | ||
12112 | 0xe8, 0x11, 0xfe, 0xe9, | ||
12113 | 0x00, 0x09, 0x04, 0x4c, 0xfe, 0x2c, 0x13, 0x01, 0xfe, 0x14, 0x16, 0xfe, | ||
12114 | 0x1e, 0x1c, 0xfe, 0x14, | ||
12115 | 0x90, 0xfe, 0x96, 0x90, 0x0c, 0xfe, 0x64, 0x01, 0x18, 0xfe, 0x66, 0x01, | ||
12116 | 0x09, 0x04, 0x4f, 0xfe, | ||
12117 | 0x12, 0x12, 0xfe, 0x03, 0x80, 0x74, 0xfe, 0x01, 0xec, 0x20, 0xfe, 0x80, | ||
12118 | 0x40, 0x12, 0x20, 0x63, | ||
12119 | 0x27, 0x11, 0xc8, 0x59, 0x1e, 0x20, 0xed, 0x76, 0x20, 0x03, 0xfe, 0x08, | ||
12120 | 0x1c, 0x05, 0xfe, 0xac, | ||
12121 | 0x00, 0xfe, 0x06, 0x58, 0x05, 0xfe, 0xae, 0x00, 0xfe, 0x07, 0x58, 0x05, | ||
12122 | 0xfe, 0xb0, 0x00, 0xfe, | ||
12123 | 0x08, 0x58, 0x05, 0xfe, 0xb2, 0x00, 0xfe, 0x09, 0x58, 0xfe, 0x0a, 0x1c, | ||
12124 | 0x24, 0x69, 0x12, 0xc9, | ||
12125 | 0x23, 0x0c, 0x50, 0x0c, 0x3f, 0x13, 0x40, 0x48, 0x5f, 0x17, 0x1d, 0xfe, | ||
12126 | 0x90, 0x4d, 0xfe, 0x91, | ||
12127 | 0x54, 0x21, 0xfe, 0x08, 0x0f, 0x3e, 0x10, 0x13, 0x42, 0x48, 0x17, 0x4c, | ||
12128 | 0xfe, 0x90, 0x4d, 0xfe, | ||
12129 | 0x91, 0x54, 0x21, 0xfe, 0x1e, 0x0f, 0x24, 0x10, 0x12, 0x20, 0x78, 0x2c, | ||
12130 | 0x46, 0x1e, 0x20, 0xed, | ||
12131 | 0x76, 0x20, 0x11, 0xc8, 0xf6, 0xfe, 0xd6, 0xf0, 0xfe, 0x32, 0x0f, 0xea, | ||
12132 | 0x70, 0xfe, 0x14, 0x1c, | ||
12133 | 0xfe, 0x10, 0x1c, 0xfe, 0x18, 0x1c, 0x03, 0x3c, 0xfe, 0x0c, 0x14, 0xee, | ||
12134 | 0xfe, 0x07, 0xe6, 0x1d, | ||
12135 | 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x03, 0x01, 0x86, 0x78, 0x2c, 0x46, | ||
12136 | 0xfa, 0xef, 0xfe, 0x42, | ||
12137 | 0x13, 0x2f, 0x07, 0x2d, 0xfe, 0x34, 0x13, 0x0a, 0x42, 0x01, 0x0e, 0xb0, | ||
12138 | 0xfe, 0x36, 0x12, 0xf0, | ||
12139 | 0xfe, 0x45, 0x48, 0x01, 0xe3, 0xfe, 0x00, 0xcc, 0xb0, 0xfe, 0xf3, 0x13, | ||
12140 | 0x3d, 0x75, 0x07, 0x10, | ||
12141 | 0xa3, 0x0a, 0x80, 0x01, 0x0e, 0xfe, 0x80, 0x5c, 0x01, 0x6f, 0xfe, 0x0e, | ||
12142 | 0x10, 0x07, 0x7e, 0x45, | ||
12143 | 0xf6, 0xfe, 0xd6, 0xf0, 0xfe, 0x6c, 0x0f, 0x03, 0xfe, 0x44, 0x58, 0x74, | ||
12144 | 0xfe, 0x01, 0xec, 0x97, | ||
12145 | 0xfe, 0x9e, 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x1b, 0x76, | ||
12146 | 0x27, 0x01, 0xda, 0xfe, | ||
12147 | 0xdd, 0x10, 0x2a, 0xbc, 0x7d, 0xbd, 0x7f, 0x30, 0x2e, 0xd5, 0x07, 0x1b, | ||
12148 | 0xfe, 0x48, 0x12, 0x07, | ||
12149 | 0x0b, 0xfe, 0x56, 0x12, 0x07, 0x1a, 0xfe, 0x30, 0x12, 0x07, 0xc2, 0x16, | ||
12150 | 0xfe, 0x3e, 0x11, 0x07, | ||
12151 | 0xfe, 0x23, 0x00, 0x16, 0xfe, 0x4a, 0x11, 0x07, 0x06, 0x16, 0xfe, 0xa8, | ||
12152 | 0x11, 0x07, 0x19, 0xfe, | ||
12153 | 0x12, 0x12, 0x07, 0x00, 0x16, 0x22, 0x14, 0xc2, 0x01, 0x33, 0x9f, 0x2b, | ||
12154 | 0x01, 0x08, 0x8c, 0x43, | ||
12155 | 0x03, 0x2b, 0xfe, 0x62, 0x08, 0x0a, 0xca, 0x01, 0xfe, 0x32, 0x0e, 0x11, | ||
12156 | 0x7e, 0x02, 0x29, 0x2b, | ||
12157 | 0x2f, 0x07, 0x9b, 0xfe, 0xd9, 0x13, 0x79, 0x39, 0x68, 0x3a, 0x77, 0xfe, | ||
12158 | 0xfc, 0x10, 0x09, 0x04, | ||
12159 | 0x6a, 0xfe, 0x72, 0x12, 0xc0, 0x38, 0xc1, 0x4e, 0xf4, 0xf5, 0x8e, 0xfe, | ||
12160 | 0xc6, 0x10, 0x1e, 0x58, | ||
12161 | 0xfe, 0x26, 0x13, 0x05, 0x7b, 0x31, 0x7c, 0x77, 0xfe, 0x82, 0x0c, 0x0c, | ||
12162 | 0x54, 0x18, 0x55, 0x23, | ||
12163 | 0x0c, 0x7b, 0x0c, 0x7c, 0x01, 0xa8, 0x24, 0x69, 0x73, 0x12, 0x58, 0x01, | ||
12164 | 0xa5, 0xc0, 0x38, 0xc1, | ||
12165 | 0x4e, 0xfe, 0x04, 0x55, 0xfe, 0xa5, 0x55, 0xfe, 0x04, 0xfa, 0x38, 0xfe, | ||
12166 | 0x05, 0xfa, 0x4e, 0xfe, | ||
12167 | 0x91, 0x10, 0x05, 0x56, 0x31, 0x57, 0xfe, 0x40, 0x56, 0xfe, 0xe1, 0x56, | ||
12168 | 0x0c, 0x56, 0x18, 0x57, | ||
12169 | 0x83, 0xc0, 0x38, 0xc1, 0x4e, 0xf4, 0xf5, 0x05, 0x52, 0x31, 0x53, 0xfe, | ||
12170 | 0x00, 0x56, 0xfe, 0xa1, | ||
12171 | 0x56, 0x0c, 0x52, 0x18, 0x53, 0x09, 0x04, 0x6a, 0xfe, 0x1e, 0x12, 0x1e, | ||
12172 | 0x58, 0xfe, 0x1f, 0x40, | ||
12173 | 0x05, 0x54, 0x31, 0x55, 0xfe, 0x2c, 0x50, 0xfe, 0xae, 0x50, 0x05, 0x56, | ||
12174 | 0x31, 0x57, 0xfe, 0x44, | ||
12175 | 0x50, 0xfe, 0xc6, 0x50, 0x05, 0x52, 0x31, 0x53, 0xfe, 0x08, 0x50, 0xfe, | ||
12176 | 0x8a, 0x50, 0x05, 0x39, | ||
12177 | 0x31, 0x3a, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x02, 0x5c, 0x24, 0x06, | ||
12178 | 0x12, 0xcd, 0x02, 0x5b, | ||
12179 | 0x2b, 0x01, 0x08, 0x1f, 0x44, 0x30, 0x2e, 0xd5, 0x07, 0x06, 0x21, 0x44, | ||
12180 | 0x2f, 0x07, 0x9b, 0x21, | ||
12181 | 0x5b, 0x01, 0x6e, 0x1c, 0x3d, 0x16, 0x44, 0x09, 0x04, 0x0b, 0xe2, 0x79, | ||
12182 | 0x39, 0x68, 0x3a, 0xfe, | ||
12183 | 0x0a, 0x55, 0x34, 0xfe, 0x8b, 0x55, 0xbe, 0x39, 0xbf, 0x3a, 0xfe, 0x0c, | ||
12184 | 0x51, 0xfe, 0x8e, 0x51, | ||
12185 | 0x02, 0x5b, 0xfe, 0x19, 0x81, 0xaf, 0xfe, 0x19, 0x41, 0x02, 0x5b, 0x2b, | ||
12186 | 0x01, 0x08, 0x25, 0x32, | ||
12187 | 0x1f, 0xa2, 0x30, 0x2e, 0xd8, 0x4b, 0x1a, 0xfe, 0xa6, 0x12, 0x4b, 0x0b, | ||
12188 | 0x3b, 0x02, 0x44, 0x01, | ||
12189 | 0x08, 0x25, 0x32, 0x1f, 0xa2, 0x30, 0x2e, 0xd6, 0x07, 0x1a, 0x21, 0x44, | ||
12190 | 0x01, 0x08, 0x1f, 0xa2, | ||
12191 | 0x30, 0x2e, 0xfe, 0xe8, 0x09, 0xfe, 0xc2, 0x49, 0x60, 0x05, 0xfe, 0x9c, | ||
12192 | 0x00, 0x28, 0x84, 0x49, | ||
12193 | 0x04, 0x19, 0x34, 0x9f, 0xfe, 0xbb, 0x45, 0x4b, 0x00, 0x45, 0x3e, 0x06, | ||
12194 | 0x78, 0x3d, 0xfe, 0xda, | ||
12195 | 0x14, 0x01, 0x6e, 0x87, 0xfe, 0x4b, 0x45, 0xe2, 0x2f, 0x07, 0x9a, 0xe1, | ||
12196 | 0x05, 0xc6, 0x28, 0x84, | ||
12197 | 0x05, 0x3f, 0x28, 0x34, 0x5e, 0x02, 0x5b, 0xfe, 0xc0, 0x5d, 0xfe, 0xf8, | ||
12198 | 0x14, 0xfe, 0x03, 0x17, | ||
12199 | 0x05, 0x50, 0xb4, 0x0c, 0x50, 0x5e, 0x2b, 0x01, 0x08, 0x26, 0x5c, 0x01, | ||
12200 | 0xfe, 0xaa, 0x14, 0x02, | ||
12201 | 0x5c, 0x01, 0x08, 0x25, 0x32, 0x1f, 0x44, 0x30, 0x2e, 0xd6, 0x07, 0x06, | ||
12202 | 0x21, 0x44, 0x01, 0xfe, | ||
12203 | 0x8e, 0x13, 0xfe, 0x42, 0x58, 0xfe, 0x82, 0x14, 0xfe, 0xa4, 0x14, 0x87, | ||
12204 | 0xfe, 0x4a, 0xf4, 0x0b, | ||
12205 | 0x16, 0x44, 0xfe, 0x4a, 0xf4, 0x06, 0xfe, 0x0c, 0x12, 0x2f, 0x07, 0x9a, | ||
12206 | 0x85, 0x02, 0x5b, 0x05, | ||
12207 | 0x3f, 0xb4, 0x0c, 0x3f, 0x5e, 0x2b, 0x01, 0x08, 0x26, 0x5c, 0x01, 0xfe, | ||
12208 | 0xd8, 0x14, 0x02, 0x5c, | ||
12209 | 0x13, 0x06, 0x65, 0xfe, 0xca, 0x12, 0x26, 0xfe, 0xe0, 0x12, 0x72, 0xf1, | ||
12210 | 0x01, 0x08, 0x23, 0x72, | ||
12211 | 0x03, 0x8f, 0xfe, 0xdc, 0x12, 0x25, 0xfe, 0xdc, 0x12, 0x1f, 0xfe, 0xca, | ||
12212 | 0x12, 0x5e, 0x2b, 0x01, | ||
12213 | 0x08, 0xfe, 0xd5, 0x10, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, | ||
12214 | 0x1c, 0xfe, 0xff, 0x7f, | ||
12215 | 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x03, 0x13, 0x6c, 0xff, 0x02, 0x00, | ||
12216 | 0x57, 0x48, 0x8b, 0x1c, | ||
12217 | 0x3d, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x03, 0x13, 0x6c, 0xff, 0x02, | ||
12218 | 0x00, 0x57, 0x48, 0x8b, | ||
12219 | 0x03, 0x13, 0x6c, 0xff, 0x02, 0x00, 0x57, 0x48, 0x8b, 0xfe, 0x0b, 0x58, | ||
12220 | 0x03, 0x0a, 0x50, 0x01, | ||
12221 | 0x82, 0x0a, 0x3f, 0x01, 0x82, 0x03, 0xfc, 0x1c, 0x10, 0xff, 0x03, 0x00, | ||
12222 | 0x54, 0xfe, 0x00, 0xf4, | ||
12223 | 0x19, 0x48, 0xfe, 0x00, 0x7d, 0xfe, 0x01, 0x7d, 0xfe, 0x02, 0x7d, 0xfe, | ||
12224 | 0x03, 0x7c, 0x63, 0x27, | ||
12225 | 0x0c, 0x52, 0x18, 0x53, 0xbe, 0x56, 0xbf, 0x57, 0x03, 0xfe, 0x62, 0x08, | ||
12226 | 0xfe, 0x82, 0x4a, 0xfe, | ||
12227 | 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x74, 0x03, 0x01, 0xfe, 0x14, 0x18, 0xfe, | ||
12228 | 0x42, 0x48, 0x5f, 0x60, | ||
12229 | 0x89, 0x01, 0x08, 0x1f, 0xfe, 0xa2, 0x14, 0x30, 0x2e, 0xd8, 0x01, 0x08, | ||
12230 | 0x1f, 0xfe, 0xa2, 0x14, | ||
12231 | 0x30, 0x2e, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, 0x05, 0xc6, 0x28, 0xfe, | ||
12232 | 0xcc, 0x12, 0x49, 0x04, | ||
12233 | 0x1b, 0xfe, 0xc4, 0x13, 0x23, 0x62, 0x1b, 0xe2, 0x4b, 0xc3, 0x64, 0xfe, | ||
12234 | 0xe8, 0x13, 0x3b, 0x13, | ||
12235 | 0x06, 0x17, 0xc3, 0x78, 0xdb, 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, | ||
12236 | 0xa1, 0xff, 0x02, 0x83, | ||
12237 | 0x55, 0x62, 0x1a, 0xa4, 0xbb, 0xfe, 0x30, 0x00, 0x8e, 0xe4, 0x17, 0x2c, | ||
12238 | 0x13, 0x06, 0xfe, 0x56, | ||
12239 | 0x10, 0x62, 0x0b, 0xe1, 0xbb, 0xfe, 0x64, 0x00, 0x8e, 0xe4, 0x0a, 0xfe, | ||
12240 | 0x64, 0x00, 0x17, 0x93, | ||
12241 | 0x13, 0x06, 0xfe, 0x28, 0x10, 0x62, 0x06, 0xfe, 0x60, 0x13, 0xbb, 0xfe, | ||
12242 | 0xc8, 0x00, 0x8e, 0xe4, | ||
12243 | 0x0a, 0xfe, 0xc8, 0x00, 0x17, 0x4d, 0x13, 0x06, 0x83, 0xbb, 0xfe, 0x90, | ||
12244 | 0x01, 0xba, 0xfe, 0x4e, | ||
12245 | 0x14, 0x89, 0xfe, 0x12, 0x10, 0xfe, 0x43, 0xf4, 0x94, 0xfe, 0x56, 0xf0, | ||
12246 | 0xfe, 0x60, 0x14, 0xfe, | ||
12247 | 0x04, 0xf4, 0x6c, 0xfe, 0x43, 0xf4, 0x93, 0xfe, 0xf3, 0x10, 0xf9, 0x01, | ||
12248 | 0xfe, 0x22, 0x13, 0x1c, | ||
12249 | 0x3d, 0xfe, 0x10, 0x13, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4, 0x69, 0xba, | ||
12250 | 0xfe, 0x9c, 0x14, 0xb7, | ||
12251 | 0x69, 0xfe, 0x1c, 0x10, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4, 0x19, 0xba, | ||
12252 | 0xfe, 0x9c, 0x14, 0xb7, | ||
12253 | 0x19, 0x83, 0x60, 0x23, 0xfe, 0x4d, 0xf4, 0x00, 0xdf, 0x89, 0x13, 0x06, | ||
12254 | 0xfe, 0xb4, 0x56, 0xfe, | ||
12255 | 0xc3, 0x58, 0x03, 0x60, 0x13, 0x0b, 0x03, 0x15, 0x06, 0x01, 0x08, 0x26, | ||
12256 | 0xe5, 0x15, 0x0b, 0x01, | ||
12257 | 0x08, 0x26, 0xe5, 0x15, 0x1a, 0x01, 0x08, 0x26, 0xe5, 0x72, 0xfe, 0x89, | ||
12258 | 0x49, 0x01, 0x08, 0x03, | ||
12259 | 0x15, 0x06, 0x01, 0x08, 0x26, 0xa6, 0x15, 0x1a, 0x01, 0x08, 0x26, 0xa6, | ||
12260 | 0x15, 0x06, 0x01, 0x08, | ||
12261 | 0x26, 0xa6, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x26, 0xa6, 0x72, 0xfe, 0x89, | ||
12262 | 0x4a, 0x01, 0x08, 0x03, | ||
12263 | 0x60, 0x03, 0x1e, 0xcc, 0x07, 0x06, 0xfe, 0x44, 0x13, 0xad, 0x12, 0xcc, | ||
12264 | 0xfe, 0x49, 0xf4, 0x00, | ||
12265 | 0x3b, 0x72, 0x9f, 0x5e, 0xfe, 0x01, 0xec, 0xfe, 0x27, 0x01, 0xf1, 0x01, | ||
12266 | 0x08, 0x2f, 0x07, 0xfe, | ||
12267 | 0xe3, 0x00, 0xfe, 0x20, 0x13, 0x1f, 0xfe, 0x5a, 0x15, 0x23, 0x12, 0xcd, | ||
12268 | 0x01, 0x43, 0x1e, 0xcd, | ||
12269 | 0x07, 0x06, 0x45, 0x09, 0x4a, 0x06, 0x35, 0x03, 0x0a, 0x42, 0x01, 0x0e, | ||
12270 | 0xed, 0x88, 0x07, 0x10, | ||
12271 | 0xa4, 0x0a, 0x80, 0x01, 0x0e, 0x88, 0x0a, 0x51, 0x01, 0x9e, 0x03, 0x0a, | ||
12272 | 0x80, 0x01, 0x0e, 0x88, | ||
12273 | 0xfe, 0x80, 0xe7, 0x10, 0x07, 0x10, 0x84, 0xfe, 0x45, 0x58, 0x01, 0xe3, | ||
12274 | 0x88, 0x03, 0x0a, 0x42, | ||
12275 | 0x01, 0x0e, 0x88, 0x0a, 0x51, 0x01, 0x9e, 0x03, 0x0a, 0x42, 0x01, 0x0e, | ||
12276 | 0xfe, 0x80, 0x80, 0xf2, | ||
12277 | 0xfe, 0x49, 0xe4, 0x10, 0xa4, 0x0a, 0x80, 0x01, 0x0e, 0xf2, 0x0a, 0x51, | ||
12278 | 0x01, 0x82, 0x03, 0x17, | ||
12279 | 0x10, 0x71, 0x66, 0xfe, 0x60, 0x01, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, | ||
12280 | 0xfe, 0x24, 0x1c, 0xfe, | ||
12281 | 0x1d, 0xf7, 0x1d, 0x90, 0xfe, 0xf6, 0x15, 0x01, 0xfe, 0xfc, 0x16, 0xe0, | ||
12282 | 0x91, 0x1d, 0x66, 0xfe, | ||
12283 | 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x03, 0xae, 0x21, 0xfe, 0xe6, 0x15, 0xfe, | ||
12284 | 0xda, 0x10, 0x17, 0x10, | ||
12285 | 0x71, 0x05, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x19, 0xfe, 0x18, 0x58, | ||
12286 | 0x05, 0xfe, 0x66, 0x01, | ||
12287 | 0xfe, 0x19, 0x58, 0x91, 0x19, 0xfe, 0x3c, 0x90, 0xfe, 0x30, 0xf4, 0x06, | ||
12288 | 0xfe, 0x3c, 0x50, 0x66, | ||
12289 | 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0x19, 0x90, 0xfe, | ||
12290 | 0x40, 0x16, 0xfe, 0xb6, | ||
12291 | 0x14, 0x34, 0x03, 0xae, 0x21, 0xfe, 0x18, 0x16, 0xfe, 0x9c, 0x10, 0x17, | ||
12292 | 0x10, 0x71, 0xfe, 0x83, | ||
12293 | 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x1d, 0xf7, 0x38, 0x90, | ||
12294 | 0xfe, 0x62, 0x16, 0xfe, | ||
12295 | 0x94, 0x14, 0xfe, 0x10, 0x13, 0x91, 0x38, 0x66, 0x1b, 0xfe, 0xaf, 0x19, | ||
12296 | 0xfe, 0x98, 0xe7, 0x00, | ||
12297 | 0x03, 0xae, 0x21, 0xfe, 0x56, 0x16, 0xfe, 0x6c, 0x10, 0x17, 0x10, 0x71, | ||
12298 | 0xfe, 0x30, 0xbc, 0xfe, | ||
12299 | 0xb2, 0xbc, 0x91, 0xc5, 0x66, 0x1b, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, | ||
12300 | 0xc5, 0x90, 0xfe, 0x9a, | ||
12301 | 0x16, 0xfe, 0x5c, 0x14, 0x34, 0x03, 0xae, 0x21, 0xfe, 0x86, 0x16, 0xfe, | ||
12302 | 0x42, 0x10, 0xfe, 0x02, | ||
12303 | 0xf6, 0x10, 0x71, 0xfe, 0x18, 0xfe, 0x54, 0xfe, 0x19, 0xfe, 0x55, 0xfc, | ||
12304 | 0xfe, 0x1d, 0xf7, 0x4f, | ||
12305 | 0x90, 0xfe, 0xc0, 0x16, 0xfe, 0x36, 0x14, 0xfe, 0x1c, 0x13, 0x91, 0x4f, | ||
12306 | 0x47, 0xfe, 0x83, 0x58, | ||
12307 | 0xfe, 0xaf, 0x19, 0xfe, 0x80, 0xe7, 0x10, 0xfe, 0x81, 0xe7, 0x10, 0x11, | ||
12308 | 0xfe, 0xdd, 0x00, 0x63, | ||
12309 | 0x27, 0x03, 0x63, 0x27, 0xfe, 0x12, 0x45, 0x21, 0xfe, 0xb0, 0x16, 0x14, | ||
12310 | 0x06, 0x37, 0x95, 0xa9, | ||
12311 | 0x02, 0x29, 0xfe, 0x39, 0xf0, 0xfe, 0x04, 0x17, 0x23, 0x03, 0xfe, 0x7e, | ||
12312 | 0x18, 0x1c, 0x1a, 0x5d, | ||
12313 | 0x13, 0x0d, 0x03, 0x71, 0x05, 0xcb, 0x1c, 0x06, 0xfe, 0xef, 0x12, 0xfe, | ||
12314 | 0xe1, 0x10, 0x78, 0x2c, | ||
12315 | 0x46, 0x2f, 0x07, 0x2d, 0xfe, 0x3c, 0x13, 0xfe, 0x82, 0x14, 0xfe, 0x42, | ||
12316 | 0x13, 0x3c, 0x8a, 0x0a, | ||
12317 | 0x42, 0x01, 0x0e, 0xb0, 0xfe, 0x3e, 0x12, 0xf0, 0xfe, 0x45, 0x48, 0x01, | ||
12318 | 0xe3, 0xfe, 0x00, 0xcc, | ||
12319 | 0xb0, 0xfe, 0xf3, 0x13, 0x3d, 0x75, 0x07, 0x10, 0xa3, 0x0a, 0x80, 0x01, | ||
12320 | 0x0e, 0xf2, 0x01, 0x6f, | ||
12321 | 0xfe, 0x16, 0x10, 0x07, 0x7e, 0x85, 0xfe, 0x40, 0x14, 0xfe, 0x24, 0x12, | ||
12322 | 0xf6, 0xfe, 0xd6, 0xf0, | ||
12323 | 0xfe, 0x24, 0x17, 0x17, 0x0b, 0x03, 0xfe, 0x9c, 0xe7, 0x0b, 0x0f, 0xfe, | ||
12324 | 0x15, 0x00, 0x59, 0x76, | ||
12325 | 0x27, 0x01, 0xda, 0x17, 0x06, 0x03, 0x3c, 0x8a, 0x09, 0x4a, 0x1d, 0x35, | ||
12326 | 0x11, 0x2d, 0x01, 0x6f, | ||
12327 | 0x17, 0x06, 0x03, 0xfe, 0x38, 0x90, 0xfe, 0xba, 0x90, 0x79, 0xc7, 0x68, | ||
12328 | 0xc8, 0xfe, 0x48, 0x55, | ||
12329 | 0x34, 0xfe, 0xc9, 0x55, 0x03, 0x1e, 0x98, 0x73, 0x12, 0x98, 0x03, 0x0a, | ||
12330 | 0x99, 0x01, 0x0e, 0xf0, | ||
12331 | 0x0a, 0x40, 0x01, 0x0e, 0xfe, 0x49, 0x44, 0x16, 0xfe, 0xf0, 0x17, 0x73, | ||
12332 | 0x75, 0x03, 0x0a, 0x42, | ||
12333 | 0x01, 0x0e, 0x07, 0x10, 0x45, 0x0a, 0x51, 0x01, 0x9e, 0x0a, 0x40, 0x01, | ||
12334 | 0x0e, 0x73, 0x75, 0x03, | ||
12335 | 0xfe, 0x4e, 0xe4, 0x1a, 0x64, 0xfe, 0x24, 0x18, 0x05, 0xfe, 0x90, 0x00, | ||
12336 | 0xfe, 0x3a, 0x45, 0x5b, | ||
12337 | 0xfe, 0x4e, 0xe4, 0xc2, 0x64, 0xfe, 0x36, 0x18, 0x05, 0xfe, 0x92, 0x00, | ||
12338 | 0xfe, 0x02, 0xe6, 0x1b, | ||
12339 | 0xdc, 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x64, 0xfe, 0x48, 0x18, 0x05, | ||
12340 | 0xfe, 0x94, 0x00, 0xfe, | ||
12341 | 0x02, 0xe6, 0x19, 0xfe, 0x08, 0x10, 0x05, 0xfe, 0x96, 0x00, 0xfe, 0x02, | ||
12342 | 0xe6, 0x2c, 0xfe, 0x4e, | ||
12343 | 0x45, 0xfe, 0x0c, 0x12, 0xaf, 0xff, 0x04, 0x68, 0x54, 0xde, 0x1c, 0x69, | ||
12344 | 0x03, 0x07, 0x7a, 0xfe, | ||
12345 | 0x5a, 0xf0, 0xfe, 0x74, 0x18, 0x24, 0xfe, 0x09, 0x00, 0xfe, 0x34, 0x10, | ||
12346 | 0x07, 0x1b, 0xfe, 0x5a, | ||
12347 | 0xf0, 0xfe, 0x82, 0x18, 0x24, 0xc3, 0xfe, 0x26, 0x10, 0x07, 0x1a, 0x5d, | ||
12348 | 0x24, 0x2c, 0xdc, 0x07, | ||
12349 | 0x0b, 0x5d, 0x24, 0x93, 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x5d, 0x24, 0x4d, | ||
12350 | 0x9f, 0xad, 0x03, 0x14, | ||
12351 | 0xfe, 0x09, 0x00, 0x01, 0x33, 0xfe, 0x04, 0xfe, 0x7d, 0x05, 0x7f, 0xf9, | ||
12352 | 0x03, 0x25, 0xfe, 0xca, | ||
12353 | 0x18, 0xfe, 0x14, 0xf0, 0x08, 0x65, 0xfe, 0xc6, 0x18, 0x03, 0xff, 0x1a, | ||
12354 | 0x00, 0x00, | ||
13279 | }; | 12355 | }; |
13280 | 12356 | ||
13281 | STATIC unsigned short _adv_asc3550_size = | 12357 | static unsigned short _adv_asc3550_size = sizeof(_adv_asc3550_buf); /* 0x13AD */ |
13282 | sizeof(_adv_asc3550_buf); /* 0x13AD */ | 12358 | static ADV_DCNT _adv_asc3550_chksum = 0x04D52DDDUL; /* Expanded little-endian checksum. */ |
13283 | STATIC ADV_DCNT _adv_asc3550_chksum = | ||
13284 | 0x04D52DDDUL; /* Expanded little-endian checksum. */ | ||
13285 | 12359 | ||
13286 | /* Microcode buffer is kept after initialization for error recovery. */ | 12360 | /* Microcode buffer is kept after initialization for error recovery. */ |
13287 | STATIC unsigned char _adv_asc38C0800_buf[] = { | 12361 | static unsigned char _adv_asc38C0800_buf[] = { |
13288 | 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0xfc, 0x00, 0x16, 0x18, 0xe4, 0x01, 0x00, 0x48, 0xe4, | 12362 | 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0xfc, 0x00, 0x16, 0x18, 0xe4, |
13289 | 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, 0xce, 0x19, 0x00, 0xfa, 0xff, 0xff, 0x1c, 0x0f, 0x00, 0xf6, | 12363 | 0x01, 0x00, 0x48, 0xe4, |
13290 | 0x9e, 0xe7, 0xff, 0x00, 0x82, 0xe7, 0x00, 0xea, 0x01, 0xfa, 0x01, 0xe6, 0x09, 0xe7, 0x55, 0xf0, | 12364 | 0x18, 0x80, 0x03, 0xf6, 0x02, 0x00, 0xce, 0x19, 0x00, 0xfa, 0xff, 0xff, |
13291 | 0x01, 0xf6, 0x03, 0x00, 0x04, 0x00, 0x10, 0x00, 0x1e, 0xf0, 0x85, 0xf0, 0x18, 0xf4, 0x08, 0x00, | 12365 | 0x1c, 0x0f, 0x00, 0xf6, |
13292 | 0xbc, 0x00, 0x38, 0x54, 0x00, 0xec, 0xd5, 0xf0, 0x82, 0x0d, 0x00, 0xe6, 0x86, 0xf0, 0xb1, 0xf0, | 12366 | 0x9e, 0xe7, 0xff, 0x00, 0x82, 0xe7, 0x00, 0xea, 0x01, 0xfa, 0x01, 0xe6, |
13293 | 0x98, 0x57, 0x01, 0xfc, 0xb4, 0x00, 0xd4, 0x01, 0x0c, 0x1c, 0x3e, 0x1c, 0x3c, 0x00, 0xbb, 0x00, | 12367 | 0x09, 0xe7, 0x55, 0xf0, |
13294 | 0x00, 0x10, 0xba, 0x19, 0x02, 0x80, 0x32, 0xf0, 0x7c, 0x0d, 0x02, 0x13, 0xba, 0x13, 0x18, 0x40, | 12368 | 0x01, 0xf6, 0x03, 0x00, 0x04, 0x00, 0x10, 0x00, 0x1e, 0xf0, 0x85, 0xf0, |
13295 | 0x00, 0x57, 0x01, 0xea, 0x02, 0xfc, 0x03, 0xfc, 0x3e, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x74, 0x01, | 12369 | 0x18, 0xf4, 0x08, 0x00, |
13296 | 0x76, 0x01, 0xb9, 0x54, 0x3e, 0x57, 0x00, 0x80, 0x03, 0xe6, 0xb6, 0x00, 0xc0, 0x00, 0x01, 0x01, | 12370 | 0xbc, 0x00, 0x38, 0x54, 0x00, 0xec, 0xd5, 0xf0, 0x82, 0x0d, 0x00, 0xe6, |
13297 | 0x3e, 0x01, 0x7a, 0x01, 0xca, 0x08, 0xce, 0x10, 0x16, 0x11, 0x04, 0x12, 0x08, 0x12, 0x02, 0x4a, | 12371 | 0x86, 0xf0, 0xb1, 0xf0, |
13298 | 0xbb, 0x55, 0x3c, 0x56, 0x03, 0x58, 0x1b, 0x80, 0x30, 0xe4, 0x4b, 0xe4, 0x5d, 0xf0, 0x02, 0xfa, | 12372 | 0x98, 0x57, 0x01, 0xfc, 0xb4, 0x00, 0xd4, 0x01, 0x0c, 0x1c, 0x3e, 0x1c, |
13299 | 0x20, 0x00, 0x32, 0x00, 0x40, 0x00, 0x80, 0x00, 0x24, 0x01, 0x3c, 0x01, 0x68, 0x01, 0x6a, 0x01, | 12373 | 0x3c, 0x00, 0xbb, 0x00, |
13300 | 0x70, 0x01, 0x72, 0x01, 0x78, 0x01, 0x7c, 0x01, 0x62, 0x0a, 0x86, 0x0d, 0x06, 0x13, 0x4c, 0x1c, | 12374 | 0x00, 0x10, 0xba, 0x19, 0x02, 0x80, 0x32, 0xf0, 0x7c, 0x0d, 0x02, 0x13, |
13301 | 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, 0x03, 0xf7, 0x0c, 0x00, 0x0f, 0x00, 0x47, 0x00, | 12375 | 0xba, 0x13, 0x18, 0x40, |
13302 | 0xbe, 0x00, 0x00, 0x01, 0x20, 0x11, 0x5c, 0x16, 0x32, 0x1c, 0x38, 0x1c, 0x4e, 0x1c, 0x10, 0x44, | 12376 | 0x00, 0x57, 0x01, 0xea, 0x02, 0xfc, 0x03, 0xfc, 0x3e, 0x00, 0x6c, 0x01, |
13303 | 0x00, 0x4c, 0x04, 0xea, 0x5c, 0xf0, 0xa7, 0xf0, 0x04, 0xf6, 0x03, 0xfa, 0x05, 0x00, 0x34, 0x00, | 12377 | 0x6e, 0x01, 0x74, 0x01, |
13304 | 0x36, 0x00, 0x98, 0x00, 0xcc, 0x00, 0x20, 0x01, 0x4e, 0x01, 0x4a, 0x0b, 0x42, 0x0c, 0x12, 0x0f, | 12378 | 0x76, 0x01, 0xb9, 0x54, 0x3e, 0x57, 0x00, 0x80, 0x03, 0xe6, 0xb6, 0x00, |
13305 | 0x0c, 0x10, 0x22, 0x11, 0x0a, 0x12, 0x04, 0x13, 0x30, 0x1c, 0x02, 0x48, 0x00, 0x4e, 0x42, 0x54, | 12379 | 0xc0, 0x00, 0x01, 0x01, |
13306 | 0x44, 0x55, 0xbd, 0x56, 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0, 0x59, 0xf0, 0xb8, 0xf0, | 12380 | 0x3e, 0x01, 0x7a, 0x01, 0xca, 0x08, 0xce, 0x10, 0x16, 0x11, 0x04, 0x12, |
13307 | 0x4b, 0xf4, 0x06, 0xf7, 0x0e, 0xf7, 0x04, 0xfc, 0x05, 0xfc, 0x06, 0x00, 0x19, 0x00, 0x33, 0x00, | 12381 | 0x08, 0x12, 0x02, 0x4a, |
13308 | 0x9b, 0x00, 0xa4, 0x00, 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, 0xe7, 0x00, 0xe2, 0x03, | 12382 | 0xbb, 0x55, 0x3c, 0x56, 0x03, 0x58, 0x1b, 0x80, 0x30, 0xe4, 0x4b, 0xe4, |
13309 | 0x08, 0x0f, 0x02, 0x10, 0x04, 0x10, 0x0a, 0x10, 0x0a, 0x13, 0x0c, 0x13, 0x12, 0x13, 0x24, 0x14, | 12383 | 0x5d, 0xf0, 0x02, 0xfa, |
13310 | 0x34, 0x14, 0x04, 0x16, 0x08, 0x16, 0xa4, 0x17, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x08, 0x44, | 12384 | 0x20, 0x00, 0x32, 0x00, 0x40, 0x00, 0x80, 0x00, 0x24, 0x01, 0x3c, 0x01, |
13311 | 0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, 0x01, 0x48, 0x68, 0x54, 0x3a, 0x55, 0x83, 0x55, | 12385 | 0x68, 0x01, 0x6a, 0x01, |
13312 | 0xe5, 0x55, 0xb0, 0x57, 0x01, 0x58, 0x83, 0x59, 0x05, 0xe6, 0x0b, 0xf0, 0x0c, 0xf0, 0x04, 0xf8, | 12386 | 0x70, 0x01, 0x72, 0x01, 0x78, 0x01, 0x7c, 0x01, 0x62, 0x0a, 0x86, 0x0d, |
13313 | 0x05, 0xf8, 0x07, 0x00, 0x0a, 0x00, 0x1c, 0x00, 0x1e, 0x00, 0x9e, 0x00, 0xa8, 0x00, 0xaa, 0x00, | 12387 | 0x06, 0x13, 0x4c, 0x1c, |
13314 | 0xb9, 0x00, 0xe0, 0x00, 0x22, 0x01, 0x26, 0x01, 0x79, 0x01, 0x7e, 0x01, 0xc4, 0x01, 0xc6, 0x01, | 12388 | 0x04, 0x80, 0x4a, 0xe4, 0x02, 0xee, 0x5b, 0xf0, 0x03, 0xf7, 0x0c, 0x00, |
13315 | 0x80, 0x02, 0x5e, 0x03, 0xee, 0x04, 0x9a, 0x06, 0xf8, 0x07, 0x62, 0x08, 0x68, 0x08, 0x69, 0x08, | 12389 | 0x0f, 0x00, 0x47, 0x00, |
13316 | 0xd6, 0x08, 0xe9, 0x09, 0xfa, 0x0b, 0x2e, 0x0f, 0x12, 0x10, 0x1a, 0x10, 0xed, 0x10, 0xf1, 0x10, | 12390 | 0xbe, 0x00, 0x00, 0x01, 0x20, 0x11, 0x5c, 0x16, 0x32, 0x1c, 0x38, 0x1c, |
13317 | 0x2a, 0x11, 0x06, 0x12, 0x0c, 0x12, 0x3e, 0x12, 0x10, 0x13, 0x16, 0x13, 0x1e, 0x13, 0x46, 0x14, | 12391 | 0x4e, 0x1c, 0x10, 0x44, |
13318 | 0x76, 0x14, 0x82, 0x14, 0x36, 0x15, 0xca, 0x15, 0x6b, 0x18, 0xbe, 0x18, 0xca, 0x18, 0xe6, 0x19, | 12392 | 0x00, 0x4c, 0x04, 0xea, 0x5c, 0xf0, 0xa7, 0xf0, 0x04, 0xf6, 0x03, 0xfa, |
13319 | 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40, 0x0e, 0x47, 0xfe, 0x9c, 0xf0, 0x2b, 0x02, 0xfe, | 12393 | 0x05, 0x00, 0x34, 0x00, |
13320 | 0xac, 0x0d, 0xff, 0x10, 0x00, 0x00, 0xd7, 0xfe, 0xe8, 0x19, 0x00, 0xd6, 0xfe, 0x84, 0x01, 0xff, | 12394 | 0x36, 0x00, 0x98, 0x00, 0xcc, 0x00, 0x20, 0x01, 0x4e, 0x01, 0x4a, 0x0b, |
13321 | 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00, 0x00, 0xfe, 0x57, 0x24, | 12395 | 0x42, 0x0c, 0x12, 0x0f, |
13322 | 0x00, 0xfe, 0x4c, 0x00, 0x5b, 0xff, 0x04, 0x00, 0x00, 0x11, 0xff, 0x09, 0x00, 0x00, 0xff, 0x08, | 12396 | 0x0c, 0x10, 0x22, 0x11, 0x0a, 0x12, 0x04, 0x13, 0x30, 0x1c, 0x02, 0x48, |
13323 | 0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, 0xff, 0xff, 0xff, 0x11, | 12397 | 0x00, 0x4e, 0x42, 0x54, |
13324 | 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00, 0xfe, 0x04, 0xf7, 0xd6, | 12398 | 0x44, 0x55, 0xbd, 0x56, 0x06, 0x83, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0, |
13325 | 0x2c, 0x99, 0x0a, 0x01, 0xfe, 0xc2, 0x0f, 0xfe, 0x04, 0xf7, 0xd6, 0x99, 0x0a, 0x42, 0x2c, 0xfe, | 12399 | 0x59, 0xf0, 0xb8, 0xf0, |
13326 | 0x3d, 0xf0, 0xfe, 0x06, 0x02, 0xfe, 0x20, 0xf0, 0xa7, 0xfe, 0x91, 0xf0, 0xfe, 0xf4, 0x01, 0xfe, | 12400 | 0x4b, 0xf4, 0x06, 0xf7, 0x0e, 0xf7, 0x04, 0xfc, 0x05, 0xfc, 0x06, 0x00, |
13327 | 0x90, 0xf0, 0xfe, 0xf4, 0x01, 0xfe, 0x8f, 0xf0, 0xa7, 0x03, 0x5d, 0x4d, 0x02, 0xfe, 0xc8, 0x0d, | 12401 | 0x19, 0x00, 0x33, 0x00, |
13328 | 0x01, 0xfe, 0x38, 0x0e, 0xfe, 0xdd, 0x12, 0xfe, 0xfc, 0x10, 0xfe, 0x28, 0x1c, 0x03, 0xfe, 0xa6, | 12402 | 0x9b, 0x00, 0xa4, 0x00, 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe1, 0x00, |
13329 | 0x00, 0xfe, 0xd3, 0x12, 0x41, 0x14, 0xfe, 0xa6, 0x00, 0xc2, 0xfe, 0x48, 0xf0, 0xfe, 0x8a, 0x02, | 12403 | 0xe7, 0x00, 0xe2, 0x03, |
13330 | 0xfe, 0x49, 0xf0, 0xfe, 0xa4, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc2, 0x02, 0xfe, 0x46, 0xf0, 0xfe, | 12404 | 0x08, 0x0f, 0x02, 0x10, 0x04, 0x10, 0x0a, 0x10, 0x0a, 0x13, 0x0c, 0x13, |
13331 | 0x54, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x5a, 0x02, 0xfe, 0x43, 0xf0, 0xfe, 0x48, 0x02, 0xfe, 0x44, | 12405 | 0x12, 0x13, 0x24, 0x14, |
13332 | 0xf0, 0xfe, 0x4c, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x50, 0x02, 0x18, 0x0a, 0xaa, 0x18, 0x06, 0x14, | 12406 | 0x34, 0x14, 0x04, 0x16, 0x08, 0x16, 0xa4, 0x17, 0x20, 0x1c, 0x34, 0x1c, |
13333 | 0xa1, 0x02, 0x2b, 0xfe, 0x00, 0x1c, 0xe7, 0xfe, 0x02, 0x1c, 0xe6, 0xfe, 0x1e, 0x1c, 0xfe, 0xe9, | 12407 | 0x36, 0x1c, 0x08, 0x44, |
13334 | 0x10, 0x01, 0xfe, 0x18, 0x18, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc, 0xce, 0x09, 0x70, 0x01, 0xa8, | 12408 | 0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, 0x01, 0x48, 0x68, 0x54, |
13335 | 0x02, 0x2b, 0x15, 0x59, 0x39, 0xa2, 0x01, 0xfe, 0x58, 0x10, 0x09, 0x70, 0x01, 0x87, 0xfe, 0xbd, | 12409 | 0x3a, 0x55, 0x83, 0x55, |
13336 | 0x10, 0x09, 0x70, 0x01, 0x87, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe, 0x58, 0x1c, 0x18, 0x06, | 12410 | 0xe5, 0x55, 0xb0, 0x57, 0x01, 0x58, 0x83, 0x59, 0x05, 0xe6, 0x0b, 0xf0, |
13337 | 0x14, 0xa1, 0x2c, 0x1c, 0x2b, 0xfe, 0x3d, 0xf0, 0xfe, 0x06, 0x02, 0x23, 0xfe, 0x98, 0x02, 0xfe, | 12411 | 0x0c, 0xf0, 0x04, 0xf8, |
13338 | 0x5a, 0x1c, 0xf8, 0xfe, 0x14, 0x1c, 0x15, 0xfe, 0x30, 0x00, 0x39, 0xa2, 0x01, 0xfe, 0x48, 0x10, | 12412 | 0x05, 0xf8, 0x07, 0x00, 0x0a, 0x00, 0x1c, 0x00, 0x1e, 0x00, 0x9e, 0x00, |
13339 | 0x18, 0x06, 0x14, 0xa1, 0x02, 0xd7, 0x22, 0x20, 0x07, 0x11, 0x35, 0xfe, 0x69, 0x10, 0x18, 0x06, | 12413 | 0xa8, 0x00, 0xaa, 0x00, |
13340 | 0x14, 0xa1, 0xfe, 0x04, 0xec, 0x20, 0x4f, 0x43, 0x13, 0x20, 0xfe, 0x05, 0xf6, 0xce, 0x01, 0xfe, | 12414 | 0xb9, 0x00, 0xe0, 0x00, 0x22, 0x01, 0x26, 0x01, 0x79, 0x01, 0x7e, 0x01, |
13341 | 0x4a, 0x17, 0x08, 0x54, 0x58, 0x37, 0x12, 0x2f, 0x42, 0x92, 0x01, 0xfe, 0x82, 0x16, 0x02, 0x2b, | 12415 | 0xc4, 0x01, 0xc6, 0x01, |
13342 | 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x66, 0x01, 0x73, 0xfe, 0x18, 0x10, 0xfe, 0x41, 0x58, 0x09, | 12416 | 0x80, 0x02, 0x5e, 0x03, 0xee, 0x04, 0x9a, 0x06, 0xf8, 0x07, 0x62, 0x08, |
13343 | 0xa4, 0x01, 0x0e, 0xfe, 0xc8, 0x54, 0x6b, 0xfe, 0x10, 0x03, 0x01, 0xfe, 0x82, 0x16, 0x02, 0x2b, | 12417 | 0x68, 0x08, 0x69, 0x08, |
13344 | 0x2c, 0x4f, 0xfe, 0x02, 0xe8, 0x2a, 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, 0xfe, 0x77, 0x57, 0xfe, | 12418 | 0xd6, 0x08, 0xe9, 0x09, 0xfa, 0x0b, 0x2e, 0x0f, 0x12, 0x10, 0x1a, 0x10, |
13345 | 0x27, 0xf0, 0xfe, 0xe0, 0x01, 0xfe, 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xa7, 0xfe, 0x40, 0x1c, 0x1c, | 12419 | 0xed, 0x10, 0xf1, 0x10, |
13346 | 0xd9, 0xfe, 0x26, 0xf0, 0xfe, 0x5a, 0x03, 0xfe, 0xa0, 0xf0, 0xfe, 0x48, 0x03, 0xfe, 0x11, 0xf0, | 12420 | 0x2a, 0x11, 0x06, 0x12, 0x0c, 0x12, 0x3e, 0x12, 0x10, 0x13, 0x16, 0x13, |
13347 | 0xa7, 0xfe, 0xef, 0x10, 0xfe, 0x9f, 0xf0, 0xfe, 0x68, 0x03, 0xf9, 0x10, 0xfe, 0x11, 0x00, 0x02, | 12421 | 0x1e, 0x13, 0x46, 0x14, |
13348 | 0x65, 0x2c, 0xfe, 0x48, 0x1c, 0xf9, 0x08, 0x05, 0x1b, 0xfe, 0x18, 0x13, 0x21, 0x22, 0xa3, 0xb7, | 12422 | 0x76, 0x14, 0x82, 0x14, 0x36, 0x15, 0xca, 0x15, 0x6b, 0x18, 0xbe, 0x18, |
13349 | 0x13, 0xa3, 0x09, 0x46, 0x01, 0x0e, 0xb7, 0x78, 0x01, 0xfe, 0xb4, 0x16, 0x12, 0xd1, 0x1c, 0xd9, | 12423 | 0xca, 0x18, 0xe6, 0x19, |
13350 | 0xfe, 0x01, 0xf0, 0xd9, 0xfe, 0x82, 0xf0, 0xfe, 0x96, 0x03, 0xfa, 0x12, 0xfe, 0xe4, 0x00, 0x27, | 12424 | 0x12, 0x1c, 0x46, 0x1c, 0x9c, 0x32, 0x00, 0x40, 0x0e, 0x47, 0xfe, 0x9c, |
13351 | 0xfe, 0xa8, 0x03, 0x1c, 0x34, 0x1d, 0xfe, 0xb8, 0x03, 0x01, 0x4b, 0xfe, 0x06, 0xf0, 0xfe, 0xc8, | 12425 | 0xf0, 0x2b, 0x02, 0xfe, |
13352 | 0x03, 0x95, 0x86, 0xfe, 0x0a, 0xf0, 0xfe, 0x8a, 0x06, 0x02, 0x24, 0x03, 0x70, 0x28, 0x17, 0xfe, | 12426 | 0xac, 0x0d, 0xff, 0x10, 0x00, 0x00, 0xd7, 0xfe, 0xe8, 0x19, 0x00, 0xd6, |
13353 | 0xfa, 0x04, 0x15, 0x6d, 0x01, 0x36, 0x7b, 0xfe, 0x6a, 0x02, 0x02, 0xd8, 0xf9, 0x2c, 0x99, 0x19, | 12427 | 0xfe, 0x84, 0x01, 0xff, |
13354 | 0xfe, 0x67, 0x1b, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x48, 0x1c, 0x74, 0x01, 0xaf, 0x8c, | 12428 | 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00, |
13355 | 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x17, 0xda, 0x09, 0xd1, 0x01, 0x0e, 0x8d, 0x51, 0x64, 0x79, | 12429 | 0x00, 0xfe, 0x57, 0x24, |
13356 | 0x2a, 0x03, 0x70, 0x28, 0xfe, 0x10, 0x12, 0x15, 0x6d, 0x01, 0x36, 0x7b, 0xfe, 0x6a, 0x02, 0x02, | 12430 | 0x00, 0xfe, 0x4c, 0x00, 0x5b, 0xff, 0x04, 0x00, 0x00, 0x11, 0xff, 0x09, |
13357 | 0xd8, 0xc7, 0x81, 0xc8, 0x83, 0x1c, 0x24, 0x27, 0xfe, 0x40, 0x04, 0x1d, 0xfe, 0x3c, 0x04, 0x3b, | 12431 | 0x00, 0x00, 0xff, 0x08, |
13358 | 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e, 0x12, 0x2d, 0xff, 0x02, 0x00, 0x10, 0x01, 0x0b, | 12432 | 0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, |
13359 | 0x1d, 0xfe, 0xe4, 0x04, 0x2d, 0x01, 0x0b, 0x1d, 0x24, 0x33, 0x31, 0xde, 0xfe, 0x4c, 0x44, 0xfe, | 12433 | 0xff, 0xff, 0xff, 0x11, |
13360 | 0x4c, 0x12, 0x51, 0xfe, 0x44, 0x48, 0x0f, 0x6f, 0xfe, 0x4c, 0x54, 0x6b, 0xda, 0x4f, 0x79, 0x2a, | 12434 | 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00, |
13361 | 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x62, 0x13, 0x08, 0x05, 0x1b, 0xfe, 0x2a, 0x13, 0x32, | 12435 | 0xfe, 0x04, 0xf7, 0xd6, |
13362 | 0x07, 0x82, 0xfe, 0x52, 0x13, 0xfe, 0x20, 0x10, 0x0f, 0x6f, 0xfe, 0x4c, 0x54, 0x6b, 0xda, 0xfe, | 12436 | 0x2c, 0x99, 0x0a, 0x01, 0xfe, 0xc2, 0x0f, 0xfe, 0x04, 0xf7, 0xd6, 0x99, |
13363 | 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x40, 0x13, 0x08, 0x05, 0x1b, 0xfe, 0x08, 0x13, 0x32, 0x07, | 12437 | 0x0a, 0x42, 0x2c, 0xfe, |
13364 | 0x82, 0xfe, 0x30, 0x13, 0x08, 0x05, 0x1b, 0xfe, 0x1c, 0x12, 0x15, 0x9d, 0x08, 0x05, 0x06, 0x4d, | 12438 | 0x3d, 0xf0, 0xfe, 0x06, 0x02, 0xfe, 0x20, 0xf0, 0xa7, 0xfe, 0x91, 0xf0, |
13365 | 0x15, 0xfe, 0x0d, 0x00, 0x01, 0x36, 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24, 0x2d, 0x12, 0xfe, 0xe6, | 12439 | 0xfe, 0xf4, 0x01, 0xfe, |
13366 | 0x00, 0xfe, 0x1c, 0x90, 0xfe, 0x40, 0x5c, 0x04, 0x15, 0x9d, 0x01, 0x36, 0x02, 0x2b, 0xfe, 0x42, | 12440 | 0x90, 0xf0, 0xfe, 0xf4, 0x01, 0xfe, 0x8f, 0xf0, 0xa7, 0x03, 0x5d, 0x4d, |
13367 | 0x5b, 0x99, 0x19, 0xfe, 0x46, 0x59, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x87, 0x80, 0xfe, | 12441 | 0x02, 0xfe, 0xc8, 0x0d, |
13368 | 0x31, 0xe4, 0x5b, 0x08, 0x05, 0x0a, 0xfe, 0x84, 0x13, 0xfe, 0x20, 0x80, 0x07, 0x19, 0xfe, 0x7c, | 12442 | 0x01, 0xfe, 0x38, 0x0e, 0xfe, 0xdd, 0x12, 0xfe, 0xfc, 0x10, 0xfe, 0x28, |
13369 | 0x12, 0x53, 0x05, 0x06, 0xfe, 0x6c, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x28, 0x17, 0xfe, 0x90, 0x05, | 12443 | 0x1c, 0x03, 0xfe, 0xa6, |
13370 | 0xfe, 0x31, 0xe4, 0x5a, 0x53, 0x05, 0x0a, 0xfe, 0x56, 0x13, 0x03, 0xfe, 0xa0, 0x00, 0x28, 0xfe, | 12444 | 0x00, 0xfe, 0xd3, 0x12, 0x41, 0x14, 0xfe, 0xa6, 0x00, 0xc2, 0xfe, 0x48, |
13371 | 0x4e, 0x12, 0x67, 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x48, 0x05, 0x1c, 0x34, 0xfe, 0x89, 0x48, | 12445 | 0xf0, 0xfe, 0x8a, 0x02, |
13372 | 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x56, 0x05, 0x26, 0xfe, 0xa8, 0x05, 0x12, 0xfe, 0xe3, 0x00, | 12446 | 0xfe, 0x49, 0xf0, 0xfe, 0xa4, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc2, 0x02, |
13373 | 0x21, 0x53, 0xfe, 0x4a, 0xf0, 0xfe, 0x76, 0x05, 0xfe, 0x49, 0xf0, 0xfe, 0x70, 0x05, 0x88, 0x25, | 12447 | 0xfe, 0x46, 0xf0, 0xfe, |
13374 | 0xfe, 0x21, 0x00, 0xab, 0x25, 0xfe, 0x22, 0x00, 0xaa, 0x25, 0x58, 0xfe, 0x09, 0x48, 0xff, 0x02, | 12448 | 0x54, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x5a, 0x02, 0xfe, 0x43, 0xf0, 0xfe, |
13375 | 0x00, 0x10, 0x27, 0xfe, 0x86, 0x05, 0x26, 0xfe, 0xa8, 0x05, 0xfe, 0xe2, 0x08, 0x53, 0x05, 0xcb, | 12449 | 0x48, 0x02, 0xfe, 0x44, |
13376 | 0x4d, 0x01, 0xb0, 0x25, 0x06, 0x13, 0xd3, 0x39, 0xfe, 0x27, 0x01, 0x08, 0x05, 0x1b, 0xfe, 0x22, | 12450 | 0xf0, 0xfe, 0x4c, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x50, 0x02, 0x18, 0x0a, |
13377 | 0x12, 0x41, 0x01, 0xb2, 0x15, 0x9d, 0x08, 0x05, 0x06, 0x4d, 0x15, 0xfe, 0x0d, 0x00, 0x01, 0x36, | 12451 | 0xaa, 0x18, 0x06, 0x14, |
13378 | 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24, 0x03, 0xfe, 0x9c, 0x00, 0x28, 0xeb, 0x03, 0x5c, 0x28, 0xfe, | 12452 | 0xa1, 0x02, 0x2b, 0xfe, 0x00, 0x1c, 0xe7, 0xfe, 0x02, 0x1c, 0xe6, 0xfe, |
13379 | 0x36, 0x13, 0x41, 0x01, 0xb2, 0x26, 0xfe, 0x18, 0x06, 0x09, 0x06, 0x53, 0x05, 0x1f, 0xfe, 0x02, | 12453 | 0x1e, 0x1c, 0xfe, 0xe9, |
13380 | 0x12, 0x50, 0x01, 0xfe, 0x9e, 0x15, 0x1d, 0xfe, 0x0e, 0x06, 0x12, 0xa5, 0x01, 0x4b, 0x12, 0xfe, | 12454 | 0x10, 0x01, 0xfe, 0x18, 0x18, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc, 0xce, |
13381 | 0xe5, 0x00, 0x03, 0x5c, 0xc1, 0x0c, 0x5c, 0x03, 0xcd, 0x28, 0xfe, 0x62, 0x12, 0x03, 0x45, 0x28, | 12455 | 0x09, 0x70, 0x01, 0xa8, |
13382 | 0xfe, 0x5a, 0x13, 0x01, 0xfe, 0x0c, 0x19, 0x01, 0xfe, 0x76, 0x19, 0xfe, 0x43, 0x48, 0xc4, 0xcc, | 12456 | 0x02, 0x2b, 0x15, 0x59, 0x39, 0xa2, 0x01, 0xfe, 0x58, 0x10, 0x09, 0x70, |
13383 | 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0x1e, 0x43, 0x8b, 0xc4, 0x6e, 0x41, 0x01, 0xb2, | 12457 | 0x01, 0x87, 0xfe, 0xbd, |
13384 | 0x26, 0xfe, 0x82, 0x06, 0x53, 0x05, 0x1a, 0xe9, 0x91, 0x09, 0x59, 0x01, 0xfe, 0xcc, 0x15, 0x1d, | 12458 | 0x10, 0x09, 0x70, 0x01, 0x87, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe, |
13385 | 0xfe, 0x78, 0x06, 0x12, 0xa5, 0x01, 0x4b, 0x12, 0xfe, 0xe5, 0x00, 0x03, 0x45, 0xc1, 0x0c, 0x45, | 12459 | 0x58, 0x1c, 0x18, 0x06, |
13386 | 0x18, 0x06, 0x01, 0xb2, 0xfa, 0x76, 0x74, 0x01, 0xaf, 0x8c, 0x12, 0xfe, 0xe2, 0x00, 0x27, 0xdb, | 12460 | 0x14, 0xa1, 0x2c, 0x1c, 0x2b, 0xfe, 0x3d, 0xf0, 0xfe, 0x06, 0x02, 0x23, |
13387 | 0x1c, 0x34, 0xfe, 0x0a, 0xf0, 0xfe, 0xb6, 0x06, 0x94, 0xfe, 0x6c, 0x07, 0xfe, 0x06, 0xf0, 0xfe, | 12461 | 0xfe, 0x98, 0x02, 0xfe, |
13388 | 0x74, 0x07, 0x95, 0x86, 0x02, 0x24, 0x08, 0x05, 0x0a, 0xfe, 0x2e, 0x12, 0x16, 0x19, 0x01, 0x0b, | 12462 | 0x5a, 0x1c, 0xf8, 0xfe, 0x14, 0x1c, 0x15, 0xfe, 0x30, 0x00, 0x39, 0xa2, |
13389 | 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b, 0xfe, 0x99, 0xa4, 0x01, | 12463 | 0x01, 0xfe, 0x48, 0x10, |
13390 | 0x0b, 0x16, 0x00, 0x02, 0xfe, 0x42, 0x08, 0x68, 0x05, 0x1a, 0xfe, 0x38, 0x12, 0x08, 0x05, 0x1a, | 12464 | 0x18, 0x06, 0x14, 0xa1, 0x02, 0xd7, 0x22, 0x20, 0x07, 0x11, 0x35, 0xfe, |
13391 | 0xfe, 0x30, 0x13, 0x16, 0xfe, 0x1b, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, | 12465 | 0x69, 0x10, 0x18, 0x06, |
13392 | 0x0b, 0x16, 0x00, 0x01, 0x0b, 0x16, 0x06, 0x01, 0x0b, 0x16, 0x00, 0x02, 0xe2, 0x6c, 0x58, 0xbe, | 12466 | 0x14, 0xa1, 0xfe, 0x04, 0xec, 0x20, 0x4f, 0x43, 0x13, 0x20, 0xfe, 0x05, |
13393 | 0x50, 0xfe, 0x9a, 0x81, 0x55, 0x1b, 0x7a, 0xfe, 0x42, 0x07, 0x09, 0x1b, 0xfe, 0x09, 0x6f, 0xba, | 12467 | 0xf6, 0xce, 0x01, 0xfe, |
13394 | 0xfe, 0xca, 0x45, 0xfe, 0x32, 0x12, 0x69, 0x6d, 0x8b, 0x6c, 0x7f, 0x27, 0xfe, 0x54, 0x07, 0x1c, | 12468 | 0x4a, 0x17, 0x08, 0x54, 0x58, 0x37, 0x12, 0x2f, 0x42, 0x92, 0x01, 0xfe, |
13395 | 0x34, 0xfe, 0x0a, 0xf0, 0xfe, 0x42, 0x07, 0x95, 0x86, 0x94, 0xfe, 0x6c, 0x07, 0x02, 0x24, 0x01, | 12469 | 0x82, 0x16, 0x02, 0x2b, |
13396 | 0x4b, 0x02, 0xdb, 0x16, 0x1f, 0x02, 0xdb, 0xfe, 0x9c, 0xf7, 0xdc, 0xfe, 0x2c, 0x90, 0xfe, 0xae, | 12470 | 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x66, 0x01, 0x73, 0xfe, 0x18, 0x10, |
13397 | 0x90, 0x56, 0xfe, 0xda, 0x07, 0x0c, 0x60, 0x14, 0x61, 0x08, 0x54, 0x5a, 0x37, 0x22, 0x20, 0x07, | 12471 | 0xfe, 0x41, 0x58, 0x09, |
13398 | 0x11, 0xfe, 0x0e, 0x12, 0x8d, 0xfe, 0x80, 0x80, 0x39, 0x20, 0x6a, 0x2a, 0xfe, 0x06, 0x10, 0xfe, | 12472 | 0xa4, 0x01, 0x0e, 0xfe, 0xc8, 0x54, 0x6b, 0xfe, 0x10, 0x03, 0x01, 0xfe, |
13399 | 0x83, 0xe7, 0xfe, 0x48, 0x00, 0xab, 0xfe, 0x03, 0x40, 0x08, 0x54, 0x5b, 0x37, 0x01, 0xb3, 0xb8, | 12473 | 0x82, 0x16, 0x02, 0x2b, |
13400 | 0xfe, 0x1f, 0x40, 0x13, 0x62, 0x01, 0xef, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0xfe, 0x44, 0x51, | 12474 | 0x2c, 0x4f, 0xfe, 0x02, 0xe8, 0x2a, 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, |
13401 | 0xfe, 0xc6, 0x51, 0x88, 0xfe, 0x08, 0x90, 0xfe, 0x8a, 0x90, 0x0c, 0x5e, 0x14, 0x5f, 0xfe, 0x0c, | 12475 | 0xfe, 0x77, 0x57, 0xfe, |
13402 | 0x90, 0xfe, 0x8e, 0x90, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x0c, 0x3d, 0x14, 0x3e, 0xfe, 0x4a, | 12476 | 0x27, 0xf0, 0xfe, 0xe0, 0x01, 0xfe, 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xa7, |
13403 | 0x10, 0x08, 0x05, 0x5a, 0xfe, 0x2a, 0x12, 0xfe, 0x2c, 0x90, 0xfe, 0xae, 0x90, 0x0c, 0x60, 0x14, | 12477 | 0xfe, 0x40, 0x1c, 0x1c, |
13404 | 0x61, 0x08, 0x05, 0x5b, 0x8b, 0x01, 0xb3, 0xfe, 0x1f, 0x80, 0x13, 0x62, 0xfe, 0x44, 0x90, 0xfe, | 12478 | 0xd9, 0xfe, 0x26, 0xf0, 0xfe, 0x5a, 0x03, 0xfe, 0xa0, 0xf0, 0xfe, 0x48, |
13405 | 0xc6, 0x90, 0x0c, 0x3f, 0x14, 0x40, 0xfe, 0x08, 0x90, 0xfe, 0x8a, 0x90, 0x0c, 0x5e, 0x14, 0x5f, | 12479 | 0x03, 0xfe, 0x11, 0xf0, |
13406 | 0xfe, 0x40, 0x90, 0xfe, 0xc2, 0x90, 0x0c, 0x3d, 0x14, 0x3e, 0x0c, 0x2e, 0x14, 0x3c, 0x21, 0x0c, | 12480 | 0xa7, 0xfe, 0xef, 0x10, 0xfe, 0x9f, 0xf0, 0xfe, 0x68, 0x03, 0xf9, 0x10, |
13407 | 0x49, 0x0c, 0x63, 0x08, 0x54, 0x1f, 0x37, 0x2c, 0x0f, 0xfe, 0x4e, 0x11, 0x27, 0xdd, 0xfe, 0x9e, | 12481 | 0xfe, 0x11, 0x00, 0x02, |
13408 | 0xf0, 0xfe, 0x76, 0x08, 0xbc, 0x17, 0x34, 0x2c, 0x77, 0xe6, 0xc5, 0xfe, 0x9a, 0x08, 0xc6, 0xfe, | 12482 | 0x65, 0x2c, 0xfe, 0x48, 0x1c, 0xf9, 0x08, 0x05, 0x1b, 0xfe, 0x18, 0x13, |
13409 | 0xb8, 0x08, 0x94, 0xfe, 0x8e, 0x08, 0xfe, 0x06, 0xf0, 0xfe, 0x94, 0x08, 0x95, 0x86, 0x02, 0x24, | 12483 | 0x21, 0x22, 0xa3, 0xb7, |
13410 | 0x01, 0x4b, 0xfe, 0xc9, 0x10, 0x16, 0x1f, 0xfe, 0xc9, 0x10, 0x68, 0x05, 0x06, 0xfe, 0x10, 0x12, | 12484 | 0x13, 0xa3, 0x09, 0x46, 0x01, 0x0e, 0xb7, 0x78, 0x01, 0xfe, 0xb4, 0x16, |
13411 | 0x68, 0x05, 0x0a, 0x4e, 0x08, 0x05, 0x0a, 0xfe, 0x90, 0x12, 0xfe, 0x2e, 0x1c, 0x02, 0xfe, 0x18, | 12485 | 0x12, 0xd1, 0x1c, 0xd9, |
13412 | 0x0b, 0x68, 0x05, 0x06, 0x4e, 0x68, 0x05, 0x0a, 0xfe, 0x7a, 0x12, 0xfe, 0x2c, 0x1c, 0xfe, 0xaa, | 12486 | 0xfe, 0x01, 0xf0, 0xd9, 0xfe, 0x82, 0xf0, 0xfe, 0x96, 0x03, 0xfa, 0x12, |
13413 | 0xf0, 0xfe, 0xd2, 0x09, 0xfe, 0xac, 0xf0, 0xfe, 0x00, 0x09, 0x02, 0xfe, 0xde, 0x09, 0xfe, 0xb7, | 12487 | 0xfe, 0xe4, 0x00, 0x27, |
13414 | 0xf0, 0xfe, 0xfc, 0x08, 0xfe, 0x02, 0xf6, 0x1a, 0x50, 0xfe, 0x70, 0x18, 0xfe, 0xf1, 0x18, 0xfe, | 12488 | 0xfe, 0xa8, 0x03, 0x1c, 0x34, 0x1d, 0xfe, 0xb8, 0x03, 0x01, 0x4b, 0xfe, |
13415 | 0x40, 0x55, 0xfe, 0xe1, 0x55, 0xfe, 0x10, 0x58, 0xfe, 0x91, 0x58, 0xfe, 0x14, 0x59, 0xfe, 0x95, | 12489 | 0x06, 0xf0, 0xfe, 0xc8, |
13416 | 0x59, 0x1c, 0x85, 0xfe, 0x8c, 0xf0, 0xfe, 0xfc, 0x08, 0xfe, 0xac, 0xf0, 0xfe, 0xf0, 0x08, 0xb5, | 12490 | 0x03, 0x95, 0x86, 0xfe, 0x0a, 0xf0, 0xfe, 0x8a, 0x06, 0x02, 0x24, 0x03, |
13417 | 0xfe, 0xcb, 0x10, 0xfe, 0xad, 0xf0, 0xfe, 0x0c, 0x09, 0x02, 0xfe, 0x18, 0x0b, 0xb6, 0xfe, 0xbf, | 12491 | 0x70, 0x28, 0x17, 0xfe, |
13418 | 0x10, 0xfe, 0x2b, 0xf0, 0x85, 0xf4, 0x1e, 0xfe, 0x00, 0xfe, 0xfe, 0x1c, 0x12, 0xc2, 0xfe, 0xd2, | 12492 | 0xfa, 0x04, 0x15, 0x6d, 0x01, 0x36, 0x7b, 0xfe, 0x6a, 0x02, 0x02, 0xd8, |
13419 | 0xf0, 0x85, 0xfe, 0x76, 0x18, 0x1e, 0x19, 0x17, 0x85, 0x03, 0xd2, 0x1e, 0x06, 0x17, 0x85, 0xc5, | 12493 | 0xf9, 0x2c, 0x99, 0x19, |
13420 | 0x4a, 0xc6, 0x4a, 0xb5, 0xb6, 0xfe, 0x89, 0x10, 0x74, 0x67, 0x2d, 0x15, 0x9d, 0x01, 0x36, 0x10, | 12494 | 0xfe, 0x67, 0x1b, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x48, 0x1c, |
13421 | 0xfe, 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x65, 0x10, 0x80, 0x02, 0x65, 0xfe, 0x98, 0x80, 0xfe, 0x19, | 12495 | 0x74, 0x01, 0xaf, 0x8c, |
13422 | 0xe4, 0x0a, 0xfe, 0x1a, 0x12, 0x51, 0xfe, 0x19, 0x82, 0xfe, 0x6c, 0x18, 0xfe, 0x44, 0x54, 0xbe, | 12496 | 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x17, 0xda, 0x09, 0xd1, 0x01, 0x0e, |
13423 | 0xfe, 0x19, 0x81, 0xfe, 0x74, 0x18, 0x8f, 0x90, 0x17, 0xfe, 0xce, 0x08, 0x02, 0x4a, 0x08, 0x05, | 12497 | 0x8d, 0x51, 0x64, 0x79, |
13424 | 0x5a, 0xec, 0x03, 0x2e, 0x29, 0x3c, 0x0c, 0x3f, 0x14, 0x40, 0x9b, 0x2e, 0x9c, 0x3c, 0xfe, 0x6c, | 12498 | 0x2a, 0x03, 0x70, 0x28, 0xfe, 0x10, 0x12, 0x15, 0x6d, 0x01, 0x36, 0x7b, |
13425 | 0x18, 0xfe, 0xed, 0x18, 0xfe, 0x44, 0x54, 0xfe, 0xe5, 0x54, 0x3a, 0x3f, 0x3b, 0x40, 0x03, 0x49, | 12499 | 0xfe, 0x6a, 0x02, 0x02, |
13426 | 0x29, 0x63, 0x8f, 0xfe, 0xe3, 0x54, 0xfe, 0x74, 0x18, 0xfe, 0xf5, 0x18, 0x8f, 0xfe, 0xe3, 0x54, | 12500 | 0xd8, 0xc7, 0x81, 0xc8, 0x83, 0x1c, 0x24, 0x27, 0xfe, 0x40, 0x04, 0x1d, |
13427 | 0x90, 0xc0, 0x56, 0xfe, 0xce, 0x08, 0x02, 0x4a, 0xfe, 0x37, 0xf0, 0xfe, 0xda, 0x09, 0xfe, 0x8b, | 12501 | 0xfe, 0x3c, 0x04, 0x3b, |
13428 | 0xf0, 0xfe, 0x60, 0x09, 0x02, 0x4a, 0x08, 0x05, 0x0a, 0x23, 0xfe, 0xfa, 0x0a, 0x3a, 0x49, 0x3b, | 12502 | 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x4e, 0x12, 0x2d, 0xff, 0x02, |
13429 | 0x63, 0x56, 0xfe, 0x3e, 0x0a, 0x0f, 0xfe, 0xc0, 0x07, 0x41, 0x98, 0x00, 0xad, 0xfe, 0x01, 0x59, | 12503 | 0x00, 0x10, 0x01, 0x0b, |
13430 | 0xfe, 0x52, 0xf0, 0xfe, 0x0c, 0x0a, 0x8f, 0x7a, 0xfe, 0x24, 0x0a, 0x3a, 0x49, 0x8f, 0xfe, 0xe3, | 12504 | 0x1d, 0xfe, 0xe4, 0x04, 0x2d, 0x01, 0x0b, 0x1d, 0x24, 0x33, 0x31, 0xde, |
13431 | 0x54, 0x57, 0x49, 0x7d, 0x63, 0xfe, 0x14, 0x58, 0xfe, 0x95, 0x58, 0x02, 0x4a, 0x3a, 0x49, 0x3b, | 12505 | 0xfe, 0x4c, 0x44, 0xfe, |
13432 | 0x63, 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0xbe, 0x57, 0x49, 0x57, 0x63, 0x02, 0x4a, 0x08, 0x05, | 12506 | 0x4c, 0x12, 0x51, 0xfe, 0x44, 0x48, 0x0f, 0x6f, 0xfe, 0x4c, 0x54, 0x6b, |
13433 | 0x5a, 0xfe, 0x82, 0x12, 0x08, 0x05, 0x1f, 0xfe, 0x66, 0x13, 0x22, 0x62, 0xb7, 0xfe, 0x03, 0xa1, | 12507 | 0xda, 0x4f, 0x79, 0x2a, |
13434 | 0xfe, 0x83, 0x80, 0xfe, 0xc8, 0x44, 0xfe, 0x2e, 0x13, 0xfe, 0x04, 0x91, 0xfe, 0x86, 0x91, 0x6a, | 12508 | 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x62, 0x13, 0x08, 0x05, 0x1b, |
13435 | 0x2a, 0xfe, 0x40, 0x59, 0xfe, 0xc1, 0x59, 0x56, 0xe0, 0x03, 0x60, 0x29, 0x61, 0x0c, 0x7f, 0x14, | 12509 | 0xfe, 0x2a, 0x13, 0x32, |
13436 | 0x80, 0x57, 0x60, 0x7d, 0x61, 0x01, 0xb3, 0xb8, 0x6a, 0x2a, 0x13, 0x62, 0x9b, 0x2e, 0x9c, 0x3c, | 12510 | 0x07, 0x82, 0xfe, 0x52, 0x13, 0xfe, 0x20, 0x10, 0x0f, 0x6f, 0xfe, 0x4c, |
13437 | 0x3a, 0x3f, 0x3b, 0x40, 0x90, 0xc0, 0xfe, 0x04, 0xfa, 0x2e, 0xfe, 0x05, 0xfa, 0x3c, 0x01, 0xef, | 12511 | 0x54, 0x6b, 0xda, 0xfe, |
13438 | 0xfe, 0x36, 0x10, 0x21, 0x0c, 0x7f, 0x0c, 0x80, 0x3a, 0x3f, 0x3b, 0x40, 0xe4, 0x08, 0x05, 0x1f, | 12512 | 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x40, 0x13, 0x08, 0x05, 0x1b, 0xfe, |
13439 | 0x17, 0xe0, 0x3a, 0x3d, 0x3b, 0x3e, 0x08, 0x05, 0xfe, 0xf7, 0x00, 0x37, 0x03, 0x5e, 0x29, 0x5f, | 12513 | 0x08, 0x13, 0x32, 0x07, |
13440 | 0xfe, 0x10, 0x58, 0xfe, 0x91, 0x58, 0x57, 0x49, 0x7d, 0x63, 0x02, 0xfe, 0xf4, 0x09, 0x08, 0x05, | 12514 | 0x82, 0xfe, 0x30, 0x13, 0x08, 0x05, 0x1b, 0xfe, 0x1c, 0x12, 0x15, 0x9d, |
13441 | 0x1f, 0x17, 0xe0, 0x08, 0x05, 0xfe, 0xf7, 0x00, 0x37, 0xbe, 0xfe, 0x19, 0x81, 0x50, 0xfe, 0x10, | 12515 | 0x08, 0x05, 0x06, 0x4d, |
13442 | 0x90, 0xfe, 0x92, 0x90, 0xfe, 0xd3, 0x10, 0x32, 0x07, 0xa6, 0x17, 0xfe, 0x08, 0x09, 0x12, 0xa6, | 12516 | 0x15, 0xfe, 0x0d, 0x00, 0x01, 0x36, 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24, |
13443 | 0x08, 0x05, 0x0a, 0xfe, 0x14, 0x13, 0x03, 0x3d, 0x29, 0x3e, 0x56, 0xfe, 0x08, 0x09, 0xfe, 0x0c, | 12517 | 0x2d, 0x12, 0xfe, 0xe6, |
13444 | 0x58, 0xfe, 0x8d, 0x58, 0x02, 0x4a, 0x21, 0x41, 0xfe, 0x19, 0x80, 0xe7, 0x08, 0x05, 0x0a, 0xfe, | 12518 | 0x00, 0xfe, 0x1c, 0x90, 0xfe, 0x40, 0x5c, 0x04, 0x15, 0x9d, 0x01, 0x36, |
13445 | 0x1a, 0x12, 0xfe, 0x6c, 0x19, 0xfe, 0x19, 0x41, 0xf4, 0xc2, 0xfe, 0xd1, 0xf0, 0xe2, 0x15, 0x7e, | 12519 | 0x02, 0x2b, 0xfe, 0x42, |
13446 | 0x01, 0x36, 0x10, 0xfe, 0x44, 0x00, 0xfe, 0x8e, 0x10, 0xfe, 0x6c, 0x19, 0x57, 0x3d, 0xfe, 0xed, | 12520 | 0x5b, 0x99, 0x19, 0xfe, 0x46, 0x59, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, |
13447 | 0x19, 0x7d, 0x3e, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0xf4, 0x1e, 0xfe, 0x00, 0xff, 0x35, 0xfe, | 12521 | 0xfe, 0x87, 0x80, 0xfe, |
13448 | 0x74, 0x10, 0xc2, 0xfe, 0xd2, 0xf0, 0xfe, 0xa6, 0x0b, 0xfe, 0x76, 0x18, 0x1e, 0x19, 0x8a, 0x03, | 12522 | 0x31, 0xe4, 0x5b, 0x08, 0x05, 0x0a, 0xfe, 0x84, 0x13, 0xfe, 0x20, 0x80, |
13449 | 0xd2, 0x1e, 0x06, 0xfe, 0x08, 0x13, 0x10, 0xfe, 0x16, 0x00, 0x02, 0x65, 0xfe, 0xd1, 0xf0, 0xfe, | 12523 | 0x07, 0x19, 0xfe, 0x7c, |
13450 | 0xb8, 0x0b, 0x15, 0x7e, 0x01, 0x36, 0x10, 0xfe, 0x17, 0x00, 0xfe, 0x42, 0x10, 0xfe, 0xce, 0xf0, | 12524 | 0x12, 0x53, 0x05, 0x06, 0xfe, 0x6c, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x28, |
13451 | 0xfe, 0xbe, 0x0b, 0xfe, 0x3c, 0x10, 0xfe, 0xcd, 0xf0, 0xfe, 0xca, 0x0b, 0x10, 0xfe, 0x22, 0x00, | 12525 | 0x17, 0xfe, 0x90, 0x05, |
13452 | 0x02, 0x65, 0xfe, 0xcb, 0xf0, 0xfe, 0xd6, 0x0b, 0x10, 0xfe, 0x24, 0x00, 0x02, 0x65, 0xfe, 0xd0, | 12526 | 0xfe, 0x31, 0xe4, 0x5a, 0x53, 0x05, 0x0a, 0xfe, 0x56, 0x13, 0x03, 0xfe, |
13453 | 0xf0, 0xfe, 0xe0, 0x0b, 0x10, 0x9e, 0xe5, 0xfe, 0xcf, 0xf0, 0xfe, 0xea, 0x0b, 0x10, 0x58, 0xfe, | 12527 | 0xa0, 0x00, 0x28, 0xfe, |
13454 | 0x10, 0x10, 0xfe, 0xcc, 0xf0, 0xe2, 0x68, 0x05, 0x1f, 0x4d, 0x10, 0xfe, 0x12, 0x00, 0x2c, 0x0f, | 12528 | 0x4e, 0x12, 0x67, 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x48, 0x05, 0x1c, |
13455 | 0xfe, 0x4e, 0x11, 0x27, 0xfe, 0x00, 0x0c, 0xfe, 0x9e, 0xf0, 0xfe, 0x14, 0x0c, 0xbc, 0x17, 0x34, | 12529 | 0x34, 0xfe, 0x89, 0x48, |
13456 | 0x2c, 0x77, 0xe6, 0xc5, 0x24, 0xc6, 0x24, 0x2c, 0xfa, 0x27, 0xfe, 0x20, 0x0c, 0x1c, 0x34, 0x94, | 12530 | 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x56, 0x05, 0x26, 0xfe, 0xa8, 0x05, |
13457 | 0xfe, 0x3c, 0x0c, 0x95, 0x86, 0xc5, 0xdc, 0xc6, 0xdc, 0x02, 0x24, 0x01, 0x4b, 0xfe, 0xdb, 0x10, | 12531 | 0x12, 0xfe, 0xe3, 0x00, |
13458 | 0x12, 0xfe, 0xe8, 0x00, 0xb5, 0xb6, 0x74, 0xc7, 0x81, 0xc8, 0x83, 0xfe, 0x89, 0xf0, 0x24, 0x33, | 12532 | 0x21, 0x53, 0xfe, 0x4a, 0xf0, 0xfe, 0x76, 0x05, 0xfe, 0x49, 0xf0, 0xfe, |
13459 | 0x31, 0xe1, 0xc7, 0x81, 0xc8, 0x83, 0x27, 0xfe, 0x66, 0x0c, 0x1d, 0x24, 0x33, 0x31, 0xdf, 0xbc, | 12533 | 0x70, 0x05, 0x88, 0x25, |
13460 | 0x4e, 0x10, 0xfe, 0x42, 0x00, 0x02, 0x65, 0x7c, 0x06, 0xfe, 0x81, 0x49, 0x17, 0xfe, 0x2c, 0x0d, | 12534 | 0xfe, 0x21, 0x00, 0xab, 0x25, 0xfe, 0x22, 0x00, 0xaa, 0x25, 0x58, 0xfe, |
13461 | 0x08, 0x05, 0x0a, 0xfe, 0x44, 0x13, 0x10, 0x00, 0x55, 0x0a, 0xfe, 0x54, 0x12, 0x55, 0xfe, 0x28, | 12535 | 0x09, 0x48, 0xff, 0x02, |
13462 | 0x00, 0x23, 0xfe, 0x9a, 0x0d, 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x66, 0x44, 0xfe, 0x28, 0x00, | 12536 | 0x00, 0x10, 0x27, 0xfe, 0x86, 0x05, 0x26, 0xfe, 0xa8, 0x05, 0xfe, 0xe2, |
13463 | 0xfe, 0xe2, 0x10, 0x01, 0xf5, 0x01, 0xf6, 0x09, 0xa4, 0x01, 0xfe, 0x26, 0x0f, 0x64, 0x12, 0x2f, | 12537 | 0x08, 0x53, 0x05, 0xcb, |
13464 | 0x01, 0x73, 0x02, 0x2b, 0x10, 0xfe, 0x44, 0x00, 0x55, 0x0a, 0xe9, 0x44, 0x0a, 0xfe, 0xb4, 0x10, | 12538 | 0x4d, 0x01, 0xb0, 0x25, 0x06, 0x13, 0xd3, 0x39, 0xfe, 0x27, 0x01, 0x08, |
13465 | 0x01, 0xb0, 0x44, 0x0a, 0xfe, 0xaa, 0x10, 0x01, 0xb0, 0xfe, 0x19, 0x82, 0xfe, 0x34, 0x46, 0xac, | 12539 | 0x05, 0x1b, 0xfe, 0x22, |
13466 | 0x44, 0x0a, 0x10, 0xfe, 0x43, 0x00, 0xfe, 0x96, 0x10, 0x08, 0x54, 0x0a, 0x37, 0x01, 0xf5, 0x01, | 12540 | 0x12, 0x41, 0x01, 0xb2, 0x15, 0x9d, 0x08, 0x05, 0x06, 0x4d, 0x15, 0xfe, |
13467 | 0xf6, 0x64, 0x12, 0x2f, 0x01, 0x73, 0x99, 0x0a, 0x64, 0x42, 0x92, 0x02, 0xfe, 0x2e, 0x03, 0x08, | 12541 | 0x0d, 0x00, 0x01, 0x36, |
13468 | 0x05, 0x0a, 0x8a, 0x44, 0x0a, 0x10, 0x00, 0xfe, 0x5c, 0x10, 0x68, 0x05, 0x1a, 0xfe, 0x58, 0x12, | 12542 | 0x7b, 0xfe, 0x64, 0x0d, 0x02, 0x24, 0x03, 0xfe, 0x9c, 0x00, 0x28, 0xeb, |
13469 | 0x08, 0x05, 0x1a, 0xfe, 0x50, 0x13, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x50, 0x0d, 0xfe, | 12543 | 0x03, 0x5c, 0x28, 0xfe, |
13470 | 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x56, 0x0d, 0x08, 0x54, 0x1a, 0x37, 0xfe, 0xa9, 0x10, 0x10, | 12544 | 0x36, 0x13, 0x41, 0x01, 0xb2, 0x26, 0xfe, 0x18, 0x06, 0x09, 0x06, 0x53, |
13471 | 0xfe, 0x15, 0x00, 0xfe, 0x04, 0xe6, 0x0a, 0x50, 0xfe, 0x2e, 0x10, 0x10, 0xfe, 0x13, 0x00, 0xfe, | 12545 | 0x05, 0x1f, 0xfe, 0x02, |
13472 | 0x10, 0x10, 0x10, 0x6f, 0xab, 0x10, 0xfe, 0x41, 0x00, 0xaa, 0x10, 0xfe, 0x24, 0x00, 0x8c, 0xb5, | 12546 | 0x12, 0x50, 0x01, 0xfe, 0x9e, 0x15, 0x1d, 0xfe, 0x0e, 0x06, 0x12, 0xa5, |
13473 | 0xb6, 0x74, 0x03, 0x70, 0x28, 0x23, 0xd8, 0x50, 0xfe, 0x04, 0xe6, 0x1a, 0xfe, 0x9d, 0x41, 0xfe, | 12547 | 0x01, 0x4b, 0x12, 0xfe, |
13474 | 0x1c, 0x42, 0x64, 0x01, 0xe3, 0x02, 0x2b, 0xf8, 0x15, 0x0a, 0x39, 0xa0, 0xb4, 0x15, 0xfe, 0x31, | 12548 | 0xe5, 0x00, 0x03, 0x5c, 0xc1, 0x0c, 0x5c, 0x03, 0xcd, 0x28, 0xfe, 0x62, |
13475 | 0x00, 0x39, 0xa2, 0x01, 0xfe, 0x48, 0x10, 0x02, 0xd7, 0x42, 0xfe, 0x06, 0xec, 0xd0, 0xfc, 0x44, | 12549 | 0x12, 0x03, 0x45, 0x28, |
13476 | 0x1b, 0xfe, 0xce, 0x45, 0x35, 0x42, 0xfe, 0x06, 0xea, 0xd0, 0xfe, 0x47, 0x4b, 0x91, 0xfe, 0x75, | 12550 | 0xfe, 0x5a, 0x13, 0x01, 0xfe, 0x0c, 0x19, 0x01, 0xfe, 0x76, 0x19, 0xfe, |
13477 | 0x57, 0x03, 0x5d, 0xfe, 0x98, 0x56, 0xfe, 0x38, 0x12, 0x09, 0x48, 0x01, 0x0e, 0xfe, 0x44, 0x48, | 12551 | 0x43, 0x48, 0xc4, 0xcc, |
13478 | 0x4f, 0x08, 0x05, 0x1b, 0xfe, 0x1a, 0x13, 0x09, 0x46, 0x01, 0x0e, 0x41, 0xfe, 0x41, 0x58, 0x09, | 12552 | 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0x1e, 0x43, 0x8b, 0xc4, |
13479 | 0xa4, 0x01, 0x0e, 0xfe, 0x49, 0x54, 0x96, 0xfe, 0x1e, 0x0e, 0x02, 0xfe, 0x2e, 0x03, 0x09, 0x5d, | 12553 | 0x6e, 0x41, 0x01, 0xb2, |
13480 | 0xfe, 0xee, 0x14, 0xfc, 0x44, 0x1b, 0xfe, 0xce, 0x45, 0x35, 0x42, 0xfe, 0xce, 0x47, 0xfe, 0xad, | 12554 | 0x26, 0xfe, 0x82, 0x06, 0x53, 0x05, 0x1a, 0xe9, 0x91, 0x09, 0x59, 0x01, |
13481 | 0x13, 0x02, 0x2b, 0x22, 0x20, 0x07, 0x11, 0xfe, 0x9e, 0x12, 0x21, 0x13, 0x59, 0x13, 0x9f, 0x13, | 12555 | 0xfe, 0xcc, 0x15, 0x1d, |
13482 | 0xd5, 0x22, 0x2f, 0x41, 0x39, 0x2f, 0xbc, 0xad, 0xfe, 0xbc, 0xf0, 0xfe, 0xe0, 0x0e, 0x0f, 0x06, | 12556 | 0xfe, 0x78, 0x06, 0x12, 0xa5, 0x01, 0x4b, 0x12, 0xfe, 0xe5, 0x00, 0x03, |
13483 | 0x13, 0x59, 0x01, 0xfe, 0xda, 0x16, 0x03, 0xfe, 0x38, 0x01, 0x29, 0xfe, 0x3a, 0x01, 0x56, 0xfe, | 12557 | 0x45, 0xc1, 0x0c, 0x45, |
13484 | 0xe4, 0x0e, 0xfe, 0x02, 0xec, 0xd5, 0x69, 0x00, 0x66, 0xfe, 0x04, 0xec, 0x20, 0x4f, 0xfe, 0x05, | 12558 | 0x18, 0x06, 0x01, 0xb2, 0xfa, 0x76, 0x74, 0x01, 0xaf, 0x8c, 0x12, 0xfe, |
13485 | 0xf6, 0xfe, 0x34, 0x01, 0x01, 0xfe, 0x4a, 0x17, 0xfe, 0x08, 0x90, 0xfe, 0x48, 0xf4, 0x0d, 0xfe, | 12559 | 0xe2, 0x00, 0x27, 0xdb, |
13486 | 0x18, 0x13, 0xba, 0xfe, 0x02, 0xea, 0xd5, 0x69, 0x7e, 0xfe, 0xc5, 0x13, 0x15, 0x1a, 0x39, 0xa0, | 12560 | 0x1c, 0x34, 0xfe, 0x0a, 0xf0, 0xfe, 0xb6, 0x06, 0x94, 0xfe, 0x6c, 0x07, |
13487 | 0xb4, 0xfe, 0x2e, 0x10, 0x03, 0xfe, 0x38, 0x01, 0x1e, 0xfe, 0xf0, 0xff, 0x0c, 0xfe, 0x60, 0x01, | 12561 | 0xfe, 0x06, 0xf0, 0xfe, |
13488 | 0x03, 0xfe, 0x3a, 0x01, 0x0c, 0xfe, 0x62, 0x01, 0x43, 0x13, 0x20, 0x25, 0x06, 0x13, 0x2f, 0x12, | 12562 | 0x74, 0x07, 0x95, 0x86, 0x02, 0x24, 0x08, 0x05, 0x0a, 0xfe, 0x2e, 0x12, |
13489 | 0x2f, 0x92, 0x0f, 0x06, 0x04, 0x21, 0x04, 0x22, 0x59, 0xfe, 0xf7, 0x12, 0x22, 0x9f, 0xb7, 0x13, | 12563 | 0x16, 0x19, 0x01, 0x0b, |
13490 | 0x9f, 0x07, 0x7e, 0xfe, 0x71, 0x13, 0xfe, 0x24, 0x1c, 0x15, 0x19, 0x39, 0xa0, 0xb4, 0xfe, 0xd9, | 12564 | 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, 0x0b, |
13491 | 0x10, 0xc3, 0xfe, 0x03, 0xdc, 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x04, 0xc3, 0xfe, 0x03, 0xdc, | 12565 | 0xfe, 0x99, 0xa4, 0x01, |
13492 | 0xfe, 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x04, 0xfe, 0x03, 0x57, 0xc3, 0x21, 0xfe, 0x00, 0xcc, 0x04, | 12566 | 0x0b, 0x16, 0x00, 0x02, 0xfe, 0x42, 0x08, 0x68, 0x05, 0x1a, 0xfe, 0x38, |
13493 | 0xfe, 0x03, 0x57, 0xc3, 0x78, 0x04, 0x08, 0x05, 0x58, 0xfe, 0x22, 0x13, 0xfe, 0x1c, 0x80, 0x07, | 12567 | 0x12, 0x08, 0x05, 0x1a, |
13494 | 0x06, 0xfe, 0x1a, 0x13, 0xfe, 0x1e, 0x80, 0xed, 0xfe, 0x1d, 0x80, 0xae, 0xfe, 0x0c, 0x90, 0xfe, | 12568 | 0xfe, 0x30, 0x13, 0x16, 0xfe, 0x1b, 0x00, 0x01, 0x0b, 0x16, 0x00, 0x01, |
13495 | 0x0e, 0x13, 0xfe, 0x0e, 0x90, 0xac, 0xfe, 0x3c, 0x90, 0xfe, 0x30, 0xf4, 0x0a, 0xfe, 0x3c, 0x50, | 12569 | 0x0b, 0x16, 0x00, 0x01, |
13496 | 0xaa, 0x01, 0xfe, 0x7a, 0x17, 0x32, 0x07, 0x2f, 0xad, 0x01, 0xfe, 0xb4, 0x16, 0x08, 0x05, 0x1b, | 12570 | 0x0b, 0x16, 0x00, 0x01, 0x0b, 0x16, 0x06, 0x01, 0x0b, 0x16, 0x00, 0x02, |
13497 | 0x4e, 0x01, 0xf5, 0x01, 0xf6, 0x12, 0xfe, 0xe9, 0x00, 0x08, 0x05, 0x58, 0xfe, 0x2c, 0x13, 0x01, | 12571 | 0xe2, 0x6c, 0x58, 0xbe, |
13498 | 0xfe, 0x0c, 0x17, 0xfe, 0x1e, 0x1c, 0xfe, 0x14, 0x90, 0xfe, 0x96, 0x90, 0x0c, 0xfe, 0x64, 0x01, | 12572 | 0x50, 0xfe, 0x9a, 0x81, 0x55, 0x1b, 0x7a, 0xfe, 0x42, 0x07, 0x09, 0x1b, |
13499 | 0x14, 0xfe, 0x66, 0x01, 0x08, 0x05, 0x5b, 0xfe, 0x12, 0x12, 0xfe, 0x03, 0x80, 0x8d, 0xfe, 0x01, | 12573 | 0xfe, 0x09, 0x6f, 0xba, |
13500 | 0xec, 0x20, 0xfe, 0x80, 0x40, 0x13, 0x20, 0x6a, 0x2a, 0x12, 0xcf, 0x64, 0x22, 0x20, 0xfb, 0x79, | 12574 | 0xfe, 0xca, 0x45, 0xfe, 0x32, 0x12, 0x69, 0x6d, 0x8b, 0x6c, 0x7f, 0x27, |
13501 | 0x20, 0x04, 0xfe, 0x08, 0x1c, 0x03, 0xfe, 0xac, 0x00, 0xfe, 0x06, 0x58, 0x03, 0xfe, 0xae, 0x00, | 12575 | 0xfe, 0x54, 0x07, 0x1c, |
13502 | 12576 | 0x34, 0xfe, 0x0a, 0xf0, 0xfe, 0x42, 0x07, 0x95, 0x86, 0x94, 0xfe, 0x6c, | |
13503 | 0xfe, 0x07, 0x58, 0x03, 0xfe, 0xb0, 0x00, 0xfe, 0x08, 0x58, 0x03, 0xfe, 0xb2, 0x00, 0xfe, 0x09, | 12577 | 0x07, 0x02, 0x24, 0x01, |
13504 | 0x58, 0xfe, 0x0a, 0x1c, 0x25, 0x6e, 0x13, 0xd0, 0x21, 0x0c, 0x5c, 0x0c, 0x45, 0x0f, 0x46, 0x52, | 12578 | 0x4b, 0x02, 0xdb, 0x16, 0x1f, 0x02, 0xdb, 0xfe, 0x9c, 0xf7, 0xdc, 0xfe, |
13505 | 0x50, 0x18, 0x1b, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x23, 0xfe, 0xfc, 0x0f, 0x44, 0x11, 0x0f, | 12579 | 0x2c, 0x90, 0xfe, 0xae, |
13506 | 0x48, 0x52, 0x18, 0x58, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x23, 0xe4, 0x25, 0x11, 0x13, 0x20, | 12580 | 0x90, 0x56, 0xfe, 0xda, 0x07, 0x0c, 0x60, 0x14, 0x61, 0x08, 0x54, 0x5a, |
13507 | 0x7c, 0x6f, 0x4f, 0x22, 0x20, 0xfb, 0x79, 0x20, 0x12, 0xcf, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0, | 12581 | 0x37, 0x22, 0x20, 0x07, |
13508 | 0xfe, 0x26, 0x10, 0xf8, 0x74, 0xfe, 0x14, 0x1c, 0xfe, 0x10, 0x1c, 0xfe, 0x18, 0x1c, 0x04, 0x42, | 12582 | 0x11, 0xfe, 0x0e, 0x12, 0x8d, 0xfe, 0x80, 0x80, 0x39, 0x20, 0x6a, 0x2a, |
13509 | 0xfe, 0x0c, 0x14, 0xfc, 0xfe, 0x07, 0xe6, 0x1b, 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x04, 0x01, | 12583 | 0xfe, 0x06, 0x10, 0xfe, |
13510 | 0xb0, 0x7c, 0x6f, 0x4f, 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x42, 0x13, 0x32, 0x07, 0x2f, | 12584 | 0x83, 0xe7, 0xfe, 0x48, 0x00, 0xab, 0xfe, 0x03, 0x40, 0x08, 0x54, 0x5b, |
13511 | 0xfe, 0x34, 0x13, 0x09, 0x48, 0x01, 0x0e, 0xbb, 0xfe, 0x36, 0x12, 0xfe, 0x41, 0x48, 0xfe, 0x45, | 12585 | 0x37, 0x01, 0xb3, 0xb8, |
13512 | 0x48, 0x01, 0xf0, 0xfe, 0x00, 0xcc, 0xbb, 0xfe, 0xf3, 0x13, 0x43, 0x78, 0x07, 0x11, 0xac, 0x09, | 12586 | 0xfe, 0x1f, 0x40, 0x13, 0x62, 0x01, 0xef, 0xfe, 0x08, 0x50, 0xfe, 0x8a, |
13513 | 0x84, 0x01, 0x0e, 0xfe, 0x80, 0x5c, 0x01, 0x73, 0xfe, 0x0e, 0x10, 0x07, 0x82, 0x4e, 0xfe, 0x14, | 12587 | 0x50, 0xfe, 0x44, 0x51, |
13514 | 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x60, 0x10, 0x04, 0xfe, 0x44, 0x58, 0x8d, 0xfe, 0x01, 0xec, 0xa2, | 12588 | 0xfe, 0xc6, 0x51, 0x88, 0xfe, 0x08, 0x90, 0xfe, 0x8a, 0x90, 0x0c, 0x5e, |
13515 | 0xfe, 0x9e, 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x1a, 0x79, 0x2a, 0x01, 0xe3, 0xfe, | 12589 | 0x14, 0x5f, 0xfe, 0x0c, |
13516 | 0xdd, 0x10, 0x2c, 0xc7, 0x81, 0xc8, 0x83, 0x33, 0x31, 0xde, 0x07, 0x1a, 0xfe, 0x48, 0x12, 0x07, | 12590 | 0x90, 0xfe, 0x8e, 0x90, 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x0c, 0x3d, |
13517 | 0x0a, 0xfe, 0x56, 0x12, 0x07, 0x19, 0xfe, 0x30, 0x12, 0x07, 0xc9, 0x17, 0xfe, 0x32, 0x12, 0x07, | 12591 | 0x14, 0x3e, 0xfe, 0x4a, |
13518 | 0xfe, 0x23, 0x00, 0x17, 0xeb, 0x07, 0x06, 0x17, 0xfe, 0x9c, 0x12, 0x07, 0x1f, 0xfe, 0x12, 0x12, | 12592 | 0x10, 0x08, 0x05, 0x5a, 0xfe, 0x2a, 0x12, 0xfe, 0x2c, 0x90, 0xfe, 0xae, |
13519 | 0x07, 0x00, 0x17, 0x24, 0x15, 0xc9, 0x01, 0x36, 0xa9, 0x2d, 0x01, 0x0b, 0x94, 0x4b, 0x04, 0x2d, | 12593 | 0x90, 0x0c, 0x60, 0x14, |
13520 | 0xdd, 0x09, 0xd1, 0x01, 0xfe, 0x26, 0x0f, 0x12, 0x82, 0x02, 0x2b, 0x2d, 0x32, 0x07, 0xa6, 0xfe, | 12594 | 0x61, 0x08, 0x05, 0x5b, 0x8b, 0x01, 0xb3, 0xfe, 0x1f, 0x80, 0x13, 0x62, |
13521 | 0xd9, 0x13, 0x3a, 0x3d, 0x3b, 0x3e, 0x56, 0xfe, 0xf0, 0x11, 0x08, 0x05, 0x5a, 0xfe, 0x72, 0x12, | 12595 | 0xfe, 0x44, 0x90, 0xfe, |
13522 | 0x9b, 0x2e, 0x9c, 0x3c, 0x90, 0xc0, 0x96, 0xfe, 0xba, 0x11, 0x22, 0x62, 0xfe, 0x26, 0x13, 0x03, | 12596 | 0xc6, 0x90, 0x0c, 0x3f, 0x14, 0x40, 0xfe, 0x08, 0x90, 0xfe, 0x8a, 0x90, |
13523 | 0x7f, 0x29, 0x80, 0x56, 0xfe, 0x76, 0x0d, 0x0c, 0x60, 0x14, 0x61, 0x21, 0x0c, 0x7f, 0x0c, 0x80, | 12597 | 0x0c, 0x5e, 0x14, 0x5f, |
13524 | 0x01, 0xb3, 0x25, 0x6e, 0x77, 0x13, 0x62, 0x01, 0xef, 0x9b, 0x2e, 0x9c, 0x3c, 0xfe, 0x04, 0x55, | 12598 | 0xfe, 0x40, 0x90, 0xfe, 0xc2, 0x90, 0x0c, 0x3d, 0x14, 0x3e, 0x0c, 0x2e, |
13525 | 0xfe, 0xa5, 0x55, 0xfe, 0x04, 0xfa, 0x2e, 0xfe, 0x05, 0xfa, 0x3c, 0xfe, 0x91, 0x10, 0x03, 0x3f, | 12599 | 0x14, 0x3c, 0x21, 0x0c, |
13526 | 0x29, 0x40, 0xfe, 0x40, 0x56, 0xfe, 0xe1, 0x56, 0x0c, 0x3f, 0x14, 0x40, 0x88, 0x9b, 0x2e, 0x9c, | 12600 | 0x49, 0x0c, 0x63, 0x08, 0x54, 0x1f, 0x37, 0x2c, 0x0f, 0xfe, 0x4e, 0x11, |
13527 | 0x3c, 0x90, 0xc0, 0x03, 0x5e, 0x29, 0x5f, 0xfe, 0x00, 0x56, 0xfe, 0xa1, 0x56, 0x0c, 0x5e, 0x14, | 12601 | 0x27, 0xdd, 0xfe, 0x9e, |
13528 | 0x5f, 0x08, 0x05, 0x5a, 0xfe, 0x1e, 0x12, 0x22, 0x62, 0xfe, 0x1f, 0x40, 0x03, 0x60, 0x29, 0x61, | 12602 | 0xf0, 0xfe, 0x76, 0x08, 0xbc, 0x17, 0x34, 0x2c, 0x77, 0xe6, 0xc5, 0xfe, |
13529 | 0xfe, 0x2c, 0x50, 0xfe, 0xae, 0x50, 0x03, 0x3f, 0x29, 0x40, 0xfe, 0x44, 0x50, 0xfe, 0xc6, 0x50, | 12603 | 0x9a, 0x08, 0xc6, 0xfe, |
13530 | 0x03, 0x5e, 0x29, 0x5f, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0x03, 0x3d, 0x29, 0x3e, 0xfe, 0x40, | 12604 | 0xb8, 0x08, 0x94, 0xfe, 0x8e, 0x08, 0xfe, 0x06, 0xf0, 0xfe, 0x94, 0x08, |
13531 | 0x50, 0xfe, 0xc2, 0x50, 0x02, 0x89, 0x25, 0x06, 0x13, 0xd4, 0x02, 0x72, 0x2d, 0x01, 0x0b, 0x1d, | 12605 | 0x95, 0x86, 0x02, 0x24, |
13532 | 0x4c, 0x33, 0x31, 0xde, 0x07, 0x06, 0x23, 0x4c, 0x32, 0x07, 0xa6, 0x23, 0x72, 0x01, 0xaf, 0x1e, | 12606 | 0x01, 0x4b, 0xfe, 0xc9, 0x10, 0x16, 0x1f, 0xfe, 0xc9, 0x10, 0x68, 0x05, |
13533 | 0x43, 0x17, 0x4c, 0x08, 0x05, 0x0a, 0xee, 0x3a, 0x3d, 0x3b, 0x3e, 0xfe, 0x0a, 0x55, 0x35, 0xfe, | 12607 | 0x06, 0xfe, 0x10, 0x12, |
13534 | 0x8b, 0x55, 0x57, 0x3d, 0x7d, 0x3e, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0x02, 0x72, 0xfe, 0x19, | 12608 | 0x68, 0x05, 0x0a, 0x4e, 0x08, 0x05, 0x0a, 0xfe, 0x90, 0x12, 0xfe, 0x2e, |
13535 | 0x81, 0xba, 0xfe, 0x19, 0x41, 0x02, 0x72, 0x2d, 0x01, 0x0b, 0x1c, 0x34, 0x1d, 0xe8, 0x33, 0x31, | 12609 | 0x1c, 0x02, 0xfe, 0x18, |
13536 | 0xe1, 0x55, 0x19, 0xfe, 0xa6, 0x12, 0x55, 0x0a, 0x4d, 0x02, 0x4c, 0x01, 0x0b, 0x1c, 0x34, 0x1d, | 12610 | 0x0b, 0x68, 0x05, 0x06, 0x4e, 0x68, 0x05, 0x0a, 0xfe, 0x7a, 0x12, 0xfe, |
13537 | 0xe8, 0x33, 0x31, 0xdf, 0x07, 0x19, 0x23, 0x4c, 0x01, 0x0b, 0x1d, 0xe8, 0x33, 0x31, 0xfe, 0xe8, | 12611 | 0x2c, 0x1c, 0xfe, 0xaa, |
13538 | 0x09, 0xfe, 0xc2, 0x49, 0x51, 0x03, 0xfe, 0x9c, 0x00, 0x28, 0x8a, 0x53, 0x05, 0x1f, 0x35, 0xa9, | 12612 | 0xf0, 0xfe, 0xd2, 0x09, 0xfe, 0xac, 0xf0, 0xfe, 0x00, 0x09, 0x02, 0xfe, |
13539 | 0xfe, 0xbb, 0x45, 0x55, 0x00, 0x4e, 0x44, 0x06, 0x7c, 0x43, 0xfe, 0xda, 0x14, 0x01, 0xaf, 0x8c, | 12613 | 0xde, 0x09, 0xfe, 0xb7, |
13540 | 0xfe, 0x4b, 0x45, 0xee, 0x32, 0x07, 0xa5, 0xed, 0x03, 0xcd, 0x28, 0x8a, 0x03, 0x45, 0x28, 0x35, | 12614 | 0xf0, 0xfe, 0xfc, 0x08, 0xfe, 0x02, 0xf6, 0x1a, 0x50, 0xfe, 0x70, 0x18, |
13541 | 0x67, 0x02, 0x72, 0xfe, 0xc0, 0x5d, 0xfe, 0xf8, 0x14, 0xfe, 0x03, 0x17, 0x03, 0x5c, 0xc1, 0x0c, | 12615 | 0xfe, 0xf1, 0x18, 0xfe, |
13542 | 0x5c, 0x67, 0x2d, 0x01, 0x0b, 0x26, 0x89, 0x01, 0xfe, 0x9e, 0x15, 0x02, 0x89, 0x01, 0x0b, 0x1c, | 12616 | 0x40, 0x55, 0xfe, 0xe1, 0x55, 0xfe, 0x10, 0x58, 0xfe, 0x91, 0x58, 0xfe, |
13543 | 0x34, 0x1d, 0x4c, 0x33, 0x31, 0xdf, 0x07, 0x06, 0x23, 0x4c, 0x01, 0xf1, 0xfe, 0x42, 0x58, 0xf1, | 12617 | 0x14, 0x59, 0xfe, 0x95, |
13544 | 0xfe, 0xa4, 0x14, 0x8c, 0xfe, 0x4a, 0xf4, 0x0a, 0x17, 0x4c, 0xfe, 0x4a, 0xf4, 0x06, 0xea, 0x32, | 12618 | 0x59, 0x1c, 0x85, 0xfe, 0x8c, 0xf0, 0xfe, 0xfc, 0x08, 0xfe, 0xac, 0xf0, |
13545 | 0x07, 0xa5, 0x8b, 0x02, 0x72, 0x03, 0x45, 0xc1, 0x0c, 0x45, 0x67, 0x2d, 0x01, 0x0b, 0x26, 0x89, | 12619 | 0xfe, 0xf0, 0x08, 0xb5, |
13546 | 0x01, 0xfe, 0xcc, 0x15, 0x02, 0x89, 0x0f, 0x06, 0x27, 0xfe, 0xbe, 0x13, 0x26, 0xfe, 0xd4, 0x13, | 12620 | 0xfe, 0xcb, 0x10, 0xfe, 0xad, 0xf0, 0xfe, 0x0c, 0x09, 0x02, 0xfe, 0x18, |
13547 | 0x76, 0xfe, 0x89, 0x48, 0x01, 0x0b, 0x21, 0x76, 0x04, 0x7b, 0xfe, 0xd0, 0x13, 0x1c, 0xfe, 0xd0, | 12621 | 0x0b, 0xb6, 0xfe, 0xbf, |
13548 | 0x13, 0x1d, 0xfe, 0xbe, 0x13, 0x67, 0x2d, 0x01, 0x0b, 0xfe, 0xd5, 0x10, 0x0f, 0x71, 0xff, 0x02, | 12622 | 0x10, 0xfe, 0x2b, 0xf0, 0x85, 0xf4, 0x1e, 0xfe, 0x00, 0xfe, 0xfe, 0x1c, |
13549 | 0x00, 0x57, 0x52, 0x93, 0x1e, 0xfe, 0xff, 0x7f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x04, 0x0f, | 12623 | 0x12, 0xc2, 0xfe, 0xd2, |
13550 | 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0x1e, 0x43, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x04, | 12624 | 0xf0, 0x85, 0xfe, 0x76, 0x18, 0x1e, 0x19, 0x17, 0x85, 0x03, 0xd2, 0x1e, |
13551 | 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0x04, 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, | 12625 | 0x06, 0x17, 0x85, 0xc5, |
13552 | 0x93, 0xfe, 0x0b, 0x58, 0x04, 0x09, 0x5c, 0x01, 0x87, 0x09, 0x45, 0x01, 0x87, 0x04, 0xfe, 0x03, | 12626 | 0x4a, 0xc6, 0x4a, 0xb5, 0xb6, 0xfe, 0x89, 0x10, 0x74, 0x67, 0x2d, 0x15, |
13553 | 0xa1, 0x1e, 0x11, 0xff, 0x03, 0x00, 0x54, 0xfe, 0x00, 0xf4, 0x1f, 0x52, 0xfe, 0x00, 0x7d, 0xfe, | 12627 | 0x9d, 0x01, 0x36, 0x10, |
13554 | 0x01, 0x7d, 0xfe, 0x02, 0x7d, 0xfe, 0x03, 0x7c, 0x6a, 0x2a, 0x0c, 0x5e, 0x14, 0x5f, 0x57, 0x3f, | 12628 | 0xfe, 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x65, 0x10, 0x80, 0x02, 0x65, 0xfe, |
13555 | 0x7d, 0x40, 0x04, 0xdd, 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x8d, 0x04, 0x01, | 12629 | 0x98, 0x80, 0xfe, 0x19, |
13556 | 0xfe, 0x0c, 0x19, 0xfe, 0x42, 0x48, 0x50, 0x51, 0x91, 0x01, 0x0b, 0x1d, 0xfe, 0x96, 0x15, 0x33, | 12630 | 0xe4, 0x0a, 0xfe, 0x1a, 0x12, 0x51, 0xfe, 0x19, 0x82, 0xfe, 0x6c, 0x18, |
13557 | 0x31, 0xe1, 0x01, 0x0b, 0x1d, 0xfe, 0x96, 0x15, 0x33, 0x31, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, | 12631 | 0xfe, 0x44, 0x54, 0xbe, |
13558 | 0x03, 0xcd, 0x28, 0xfe, 0xcc, 0x12, 0x53, 0x05, 0x1a, 0xfe, 0xc4, 0x13, 0x21, 0x69, 0x1a, 0xee, | 12632 | 0xfe, 0x19, 0x81, 0xfe, 0x74, 0x18, 0x8f, 0x90, 0x17, 0xfe, 0xce, 0x08, |
13559 | 0x55, 0xca, 0x6b, 0xfe, 0xdc, 0x14, 0x4d, 0x0f, 0x06, 0x18, 0xca, 0x7c, 0x30, 0xfe, 0x78, 0x10, | 12633 | 0x02, 0x4a, 0x08, 0x05, |
13560 | 0xff, 0x02, 0x83, 0x55, 0xab, 0xff, 0x02, 0x83, 0x55, 0x69, 0x19, 0xae, 0x98, 0xfe, 0x30, 0x00, | 12634 | 0x5a, 0xec, 0x03, 0x2e, 0x29, 0x3c, 0x0c, 0x3f, 0x14, 0x40, 0x9b, 0x2e, |
13561 | 0x96, 0xf2, 0x18, 0x6d, 0x0f, 0x06, 0xfe, 0x56, 0x10, 0x69, 0x0a, 0xed, 0x98, 0xfe, 0x64, 0x00, | 12635 | 0x9c, 0x3c, 0xfe, 0x6c, |
13562 | 0x96, 0xf2, 0x09, 0xfe, 0x64, 0x00, 0x18, 0x9e, 0x0f, 0x06, 0xfe, 0x28, 0x10, 0x69, 0x06, 0xfe, | 12636 | 0x18, 0xfe, 0xed, 0x18, 0xfe, 0x44, 0x54, 0xfe, 0xe5, 0x54, 0x3a, 0x3f, |
13563 | 0x60, 0x13, 0x98, 0xfe, 0xc8, 0x00, 0x96, 0xf2, 0x09, 0xfe, 0xc8, 0x00, 0x18, 0x59, 0x0f, 0x06, | 12637 | 0x3b, 0x40, 0x03, 0x49, |
13564 | 0x88, 0x98, 0xfe, 0x90, 0x01, 0x7a, 0xfe, 0x42, 0x15, 0x91, 0xe4, 0xfe, 0x43, 0xf4, 0x9f, 0xfe, | 12638 | 0x29, 0x63, 0x8f, 0xfe, 0xe3, 0x54, 0xfe, 0x74, 0x18, 0xfe, 0xf5, 0x18, |
13565 | 0x56, 0xf0, 0xfe, 0x54, 0x15, 0xfe, 0x04, 0xf4, 0x71, 0xfe, 0x43, 0xf4, 0x9e, 0xfe, 0xf3, 0x10, | 12639 | 0x8f, 0xfe, 0xe3, 0x54, |
13566 | 0xfe, 0x40, 0x5c, 0x01, 0xfe, 0x16, 0x14, 0x1e, 0x43, 0xec, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4, | 12640 | 0x90, 0xc0, 0x56, 0xfe, 0xce, 0x08, 0x02, 0x4a, 0xfe, 0x37, 0xf0, 0xfe, |
13567 | 0x6e, 0x7a, 0xfe, 0x90, 0x15, 0xc4, 0x6e, 0xfe, 0x1c, 0x10, 0xfe, 0x00, 0x17, 0xfe, 0x4d, 0xe4, | 12641 | 0xda, 0x09, 0xfe, 0x8b, |
13568 | 0xcc, 0x7a, 0xfe, 0x90, 0x15, 0xc4, 0xcc, 0x88, 0x51, 0x21, 0xfe, 0x4d, 0xf4, 0x00, 0xe9, 0x91, | 12642 | 0xf0, 0xfe, 0x60, 0x09, 0x02, 0x4a, 0x08, 0x05, 0x0a, 0x23, 0xfe, 0xfa, |
13569 | 0x0f, 0x06, 0xfe, 0xb4, 0x56, 0xfe, 0xc3, 0x58, 0x04, 0x51, 0x0f, 0x0a, 0x04, 0x16, 0x06, 0x01, | 12643 | 0x0a, 0x3a, 0x49, 0x3b, |
13570 | 0x0b, 0x26, 0xf3, 0x16, 0x0a, 0x01, 0x0b, 0x26, 0xf3, 0x16, 0x19, 0x01, 0x0b, 0x26, 0xf3, 0x76, | 12644 | 0x63, 0x56, 0xfe, 0x3e, 0x0a, 0x0f, 0xfe, 0xc0, 0x07, 0x41, 0x98, 0x00, |
13571 | 0xfe, 0x89, 0x49, 0x01, 0x0b, 0x04, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xb1, 0x16, 0x19, 0x01, 0x0b, | 12645 | 0xad, 0xfe, 0x01, 0x59, |
13572 | 0x26, 0xb1, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xb1, 0xfe, 0x89, 0x49, 0x01, 0x0b, 0x26, 0xb1, 0x76, | 12646 | 0xfe, 0x52, 0xf0, 0xfe, 0x0c, 0x0a, 0x8f, 0x7a, 0xfe, 0x24, 0x0a, 0x3a, |
13573 | 0xfe, 0x89, 0x4a, 0x01, 0x0b, 0x04, 0x51, 0x04, 0x22, 0xd3, 0x07, 0x06, 0xfe, 0x48, 0x13, 0xb8, | 12647 | 0x49, 0x8f, 0xfe, 0xe3, |
13574 | 0x13, 0xd3, 0xfe, 0x49, 0xf4, 0x00, 0x4d, 0x76, 0xa9, 0x67, 0xfe, 0x01, 0xec, 0xfe, 0x27, 0x01, | 12648 | 0x54, 0x57, 0x49, 0x7d, 0x63, 0xfe, 0x14, 0x58, 0xfe, 0x95, 0x58, 0x02, |
13575 | 0xfe, 0x89, 0x48, 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x2e, 0x16, 0x32, 0x07, 0xfe, 0xe3, 0x00, | 12649 | 0x4a, 0x3a, 0x49, 0x3b, |
13576 | 0xfe, 0x20, 0x13, 0x1d, 0xfe, 0x52, 0x16, 0x21, 0x13, 0xd4, 0x01, 0x4b, 0x22, 0xd4, 0x07, 0x06, | 12650 | 0x63, 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0xbe, 0x57, 0x49, 0x57, 0x63, |
13577 | 0x4e, 0x08, 0x54, 0x06, 0x37, 0x04, 0x09, 0x48, 0x01, 0x0e, 0xfb, 0x8e, 0x07, 0x11, 0xae, 0x09, | 12651 | 0x02, 0x4a, 0x08, 0x05, |
13578 | 0x84, 0x01, 0x0e, 0x8e, 0x09, 0x5d, 0x01, 0xa8, 0x04, 0x09, 0x84, 0x01, 0x0e, 0x8e, 0xfe, 0x80, | 12652 | 0x5a, 0xfe, 0x82, 0x12, 0x08, 0x05, 0x1f, 0xfe, 0x66, 0x13, 0x22, 0x62, |
13579 | 0xe7, 0x11, 0x07, 0x11, 0x8a, 0xfe, 0x45, 0x58, 0x01, 0xf0, 0x8e, 0x04, 0x09, 0x48, 0x01, 0x0e, | 12653 | 0xb7, 0xfe, 0x03, 0xa1, |
13580 | 0x8e, 0x09, 0x5d, 0x01, 0xa8, 0x04, 0x09, 0x48, 0x01, 0x0e, 0xfe, 0x80, 0x80, 0xfe, 0x80, 0x4c, | 12654 | 0xfe, 0x83, 0x80, 0xfe, 0xc8, 0x44, 0xfe, 0x2e, 0x13, 0xfe, 0x04, 0x91, |
13581 | 0xfe, 0x49, 0xe4, 0x11, 0xae, 0x09, 0x84, 0x01, 0x0e, 0xfe, 0x80, 0x4c, 0x09, 0x5d, 0x01, 0x87, | 12655 | 0xfe, 0x86, 0x91, 0x6a, |
13582 | 0x04, 0x18, 0x11, 0x75, 0x6c, 0xfe, 0x60, 0x01, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x24, | 12656 | 0x2a, 0xfe, 0x40, 0x59, 0xfe, 0xc1, 0x59, 0x56, 0xe0, 0x03, 0x60, 0x29, |
13583 | 0x1c, 0xfe, 0x1d, 0xf7, 0x1b, 0x97, 0xfe, 0xee, 0x16, 0x01, 0xfe, 0xf4, 0x17, 0xad, 0x9a, 0x1b, | 12657 | 0x61, 0x0c, 0x7f, 0x14, |
13584 | 0x6c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x04, 0xb9, 0x23, 0xfe, 0xde, 0x16, 0xfe, 0xda, 0x10, | 12658 | 0x80, 0x57, 0x60, 0x7d, 0x61, 0x01, 0xb3, 0xb8, 0x6a, 0x2a, 0x13, 0x62, |
13585 | 0x18, 0x11, 0x75, 0x03, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x1f, 0xfe, 0x18, 0x58, 0x03, 0xfe, | 12659 | 0x9b, 0x2e, 0x9c, 0x3c, |
13586 | 0x66, 0x01, 0xfe, 0x19, 0x58, 0x9a, 0x1f, 0xfe, 0x3c, 0x90, 0xfe, 0x30, 0xf4, 0x06, 0xfe, 0x3c, | 12660 | 0x3a, 0x3f, 0x3b, 0x40, 0x90, 0xc0, 0xfe, 0x04, 0xfa, 0x2e, 0xfe, 0x05, |
13587 | 0x50, 0x6c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0x1f, 0x97, 0xfe, 0x38, 0x17, | 12661 | 0xfa, 0x3c, 0x01, 0xef, |
13588 | 0xfe, 0xb6, 0x14, 0x35, 0x04, 0xb9, 0x23, 0xfe, 0x10, 0x17, 0xfe, 0x9c, 0x10, 0x18, 0x11, 0x75, | 12662 | 0xfe, 0x36, 0x10, 0x21, 0x0c, 0x7f, 0x0c, 0x80, 0x3a, 0x3f, 0x3b, 0x40, |
13589 | 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x1d, 0xf7, 0x2e, 0x97, 0xfe, 0x5a, | 12663 | 0xe4, 0x08, 0x05, 0x1f, |
13590 | 0x17, 0xfe, 0x94, 0x14, 0xec, 0x9a, 0x2e, 0x6c, 0x1a, 0xfe, 0xaf, 0x19, 0xfe, 0x98, 0xe7, 0x00, | 12664 | 0x17, 0xe0, 0x3a, 0x3d, 0x3b, 0x3e, 0x08, 0x05, 0xfe, 0xf7, 0x00, 0x37, |
13591 | 0x04, 0xb9, 0x23, 0xfe, 0x4e, 0x17, 0xfe, 0x6c, 0x10, 0x18, 0x11, 0x75, 0xfe, 0x30, 0xbc, 0xfe, | 12665 | 0x03, 0x5e, 0x29, 0x5f, |
13592 | 0xb2, 0xbc, 0x9a, 0xcb, 0x6c, 0x1a, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0xcb, 0x97, 0xfe, 0x92, | 12666 | 0xfe, 0x10, 0x58, 0xfe, 0x91, 0x58, 0x57, 0x49, 0x7d, 0x63, 0x02, 0xfe, |
13593 | 0x17, 0xfe, 0x5c, 0x14, 0x35, 0x04, 0xb9, 0x23, 0xfe, 0x7e, 0x17, 0xfe, 0x42, 0x10, 0xfe, 0x02, | 12667 | 0xf4, 0x09, 0x08, 0x05, |
13594 | 0xf6, 0x11, 0x75, 0xfe, 0x18, 0xfe, 0x60, 0xfe, 0x19, 0xfe, 0x61, 0xfe, 0x03, 0xa1, 0xfe, 0x1d, | 12668 | 0x1f, 0x17, 0xe0, 0x08, 0x05, 0xfe, 0xf7, 0x00, 0x37, 0xbe, 0xfe, 0x19, |
13595 | 0xf7, 0x5b, 0x97, 0xfe, 0xb8, 0x17, 0xfe, 0x36, 0x14, 0xfe, 0x1c, 0x13, 0x9a, 0x5b, 0x41, 0xfe, | 12669 | 0x81, 0x50, 0xfe, 0x10, |
13596 | 0x83, 0x58, 0xfe, 0xaf, 0x19, 0xfe, 0x80, 0xe7, 0x11, 0xfe, 0x81, 0xe7, 0x11, 0x12, 0xfe, 0xdd, | 12670 | 0x90, 0xfe, 0x92, 0x90, 0xfe, 0xd3, 0x10, 0x32, 0x07, 0xa6, 0x17, 0xfe, |
13597 | 0x00, 0x6a, 0x2a, 0x04, 0x6a, 0x2a, 0xfe, 0x12, 0x45, 0x23, 0xfe, 0xa8, 0x17, 0x15, 0x06, 0x39, | 12671 | 0x08, 0x09, 0x12, 0xa6, |
13598 | 0xa0, 0xb4, 0x02, 0x2b, 0xfe, 0x39, 0xf0, 0xfe, 0xfc, 0x17, 0x21, 0x04, 0xfe, 0x7e, 0x18, 0x1e, | 12672 | 0x08, 0x05, 0x0a, 0xfe, 0x14, 0x13, 0x03, 0x3d, 0x29, 0x3e, 0x56, 0xfe, |
13599 | 0x19, 0x66, 0x0f, 0x0d, 0x04, 0x75, 0x03, 0xd2, 0x1e, 0x06, 0xfe, 0xef, 0x12, 0xfe, 0xe1, 0x10, | 12673 | 0x08, 0x09, 0xfe, 0x0c, |
13600 | 0x7c, 0x6f, 0x4f, 0x32, 0x07, 0x2f, 0xfe, 0x3c, 0x13, 0xf1, 0xfe, 0x42, 0x13, 0x42, 0x92, 0x09, | 12674 | 0x58, 0xfe, 0x8d, 0x58, 0x02, 0x4a, 0x21, 0x41, 0xfe, 0x19, 0x80, 0xe7, |
13601 | 0x48, 0x01, 0x0e, 0xbb, 0xeb, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01, 0xf0, 0xfe, 0x00, 0xcc, | 12675 | 0x08, 0x05, 0x0a, 0xfe, |
13602 | 0xbb, 0xfe, 0xf3, 0x13, 0x43, 0x78, 0x07, 0x11, 0xac, 0x09, 0x84, 0x01, 0x0e, 0xfe, 0x80, 0x4c, | 12676 | 0x1a, 0x12, 0xfe, 0x6c, 0x19, 0xfe, 0x19, 0x41, 0xf4, 0xc2, 0xfe, 0xd1, |
13603 | 0x01, 0x73, 0xfe, 0x16, 0x10, 0x07, 0x82, 0x8b, 0xfe, 0x40, 0x14, 0xfe, 0x24, 0x12, 0xfe, 0x14, | 12677 | 0xf0, 0xe2, 0x15, 0x7e, |
13604 | 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x1c, 0x18, 0x18, 0x0a, 0x04, 0xfe, 0x9c, 0xe7, 0x0a, 0x10, 0xfe, | 12678 | 0x01, 0x36, 0x10, 0xfe, 0x44, 0x00, 0xfe, 0x8e, 0x10, 0xfe, 0x6c, 0x19, |
13605 | 0x15, 0x00, 0x64, 0x79, 0x2a, 0x01, 0xe3, 0x18, 0x06, 0x04, 0x42, 0x92, 0x08, 0x54, 0x1b, 0x37, | 12679 | 0x57, 0x3d, 0xfe, 0xed, |
13606 | 0x12, 0x2f, 0x01, 0x73, 0x18, 0x06, 0x04, 0xfe, 0x38, 0x90, 0xfe, 0xba, 0x90, 0x3a, 0xce, 0x3b, | 12680 | 0x19, 0x7d, 0x3e, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0xf4, 0x1e, 0xfe, |
13607 | 0xcf, 0xfe, 0x48, 0x55, 0x35, 0xfe, 0xc9, 0x55, 0x04, 0x22, 0xa3, 0x77, 0x13, 0xa3, 0x04, 0x09, | 12681 | 0x00, 0xff, 0x35, 0xfe, |
13608 | 0xa4, 0x01, 0x0e, 0xfe, 0x41, 0x48, 0x09, 0x46, 0x01, 0x0e, 0xfe, 0x49, 0x44, 0x17, 0xfe, 0xe8, | 12682 | 0x74, 0x10, 0xc2, 0xfe, 0xd2, 0xf0, 0xfe, 0xa6, 0x0b, 0xfe, 0x76, 0x18, |
13609 | 0x18, 0x77, 0x78, 0x04, 0x09, 0x48, 0x01, 0x0e, 0x07, 0x11, 0x4e, 0x09, 0x5d, 0x01, 0xa8, 0x09, | 12683 | 0x1e, 0x19, 0x8a, 0x03, |
13610 | 0x46, 0x01, 0x0e, 0x77, 0x78, 0x04, 0xfe, 0x4e, 0xe4, 0x19, 0x6b, 0xfe, 0x1c, 0x19, 0x03, 0xfe, | 12684 | 0xd2, 0x1e, 0x06, 0xfe, 0x08, 0x13, 0x10, 0xfe, 0x16, 0x00, 0x02, 0x65, |
13611 | 0x90, 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10, 0xfe, 0x4e, 0xe4, 0xc9, 0x6b, 0xfe, 0x2e, 0x19, | 12685 | 0xfe, 0xd1, 0xf0, 0xfe, |
13612 | 0x03, 0xfe, 0x92, 0x00, 0xfe, 0x02, 0xe6, 0x1a, 0xe5, 0xfe, 0x4e, 0xe4, 0xfe, 0x0b, 0x00, 0x6b, | 12686 | 0xb8, 0x0b, 0x15, 0x7e, 0x01, 0x36, 0x10, 0xfe, 0x17, 0x00, 0xfe, 0x42, |
13613 | 0xfe, 0x40, 0x19, 0x03, 0xfe, 0x94, 0x00, 0xfe, 0x02, 0xe6, 0x1f, 0xfe, 0x08, 0x10, 0x03, 0xfe, | 12687 | 0x10, 0xfe, 0xce, 0xf0, |
13614 | 0x96, 0x00, 0xfe, 0x02, 0xe6, 0x6d, 0xfe, 0x4e, 0x45, 0xea, 0xba, 0xff, 0x04, 0x68, 0x54, 0xe7, | 12688 | 0xfe, 0xbe, 0x0b, 0xfe, 0x3c, 0x10, 0xfe, 0xcd, 0xf0, 0xfe, 0xca, 0x0b, |
13615 | 0x1e, 0x6e, 0xfe, 0x08, 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c, 0xfe, 0x1a, 0xf4, 0xfe, 0x00, | 12689 | 0x10, 0xfe, 0x22, 0x00, |
13616 | 0x04, 0xea, 0xfe, 0x48, 0xf4, 0x19, 0x7a, 0xfe, 0x74, 0x19, 0x0f, 0x19, 0x04, 0x07, 0x7e, 0xfe, | 12690 | 0x02, 0x65, 0xfe, 0xcb, 0xf0, 0xfe, 0xd6, 0x0b, 0x10, 0xfe, 0x24, 0x00, |
13617 | 0x5a, 0xf0, 0xfe, 0x84, 0x19, 0x25, 0xfe, 0x09, 0x00, 0xfe, 0x34, 0x10, 0x07, 0x1a, 0xfe, 0x5a, | 12691 | 0x02, 0x65, 0xfe, 0xd0, |
13618 | 0xf0, 0xfe, 0x92, 0x19, 0x25, 0xca, 0xfe, 0x26, 0x10, 0x07, 0x19, 0x66, 0x25, 0x6d, 0xe5, 0x07, | 12692 | 0xf0, 0xfe, 0xe0, 0x0b, 0x10, 0x9e, 0xe5, 0xfe, 0xcf, 0xf0, 0xfe, 0xea, |
13619 | 0x0a, 0x66, 0x25, 0x9e, 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x66, 0x25, 0x59, 0xa9, 0xb8, 0x04, 0x15, | 12693 | 0x0b, 0x10, 0x58, 0xfe, |
13620 | 0xfe, 0x09, 0x00, 0x01, 0x36, 0xfe, 0x04, 0xfe, 0x81, 0x03, 0x83, 0xfe, 0x40, 0x5c, 0x04, 0x1c, | 12694 | 0x10, 0x10, 0xfe, 0xcc, 0xf0, 0xe2, 0x68, 0x05, 0x1f, 0x4d, 0x10, 0xfe, |
13621 | 0xf7, 0xfe, 0x14, 0xf0, 0x0b, 0x27, 0xfe, 0xd6, 0x19, 0x1c, 0xf7, 0x7b, 0xf7, 0xfe, 0x82, 0xf0, | 12695 | 0x12, 0x00, 0x2c, 0x0f, |
13622 | 0xfe, 0xda, 0x19, 0x04, 0xff, 0xcc, 0x00, 0x00, | 12696 | 0xfe, 0x4e, 0x11, 0x27, 0xfe, 0x00, 0x0c, 0xfe, 0x9e, 0xf0, 0xfe, 0x14, |
12697 | 0x0c, 0xbc, 0x17, 0x34, | ||
12698 | 0x2c, 0x77, 0xe6, 0xc5, 0x24, 0xc6, 0x24, 0x2c, 0xfa, 0x27, 0xfe, 0x20, | ||
12699 | 0x0c, 0x1c, 0x34, 0x94, | ||
12700 | 0xfe, 0x3c, 0x0c, 0x95, 0x86, 0xc5, 0xdc, 0xc6, 0xdc, 0x02, 0x24, 0x01, | ||
12701 | 0x4b, 0xfe, 0xdb, 0x10, | ||
12702 | 0x12, 0xfe, 0xe8, 0x00, 0xb5, 0xb6, 0x74, 0xc7, 0x81, 0xc8, 0x83, 0xfe, | ||
12703 | 0x89, 0xf0, 0x24, 0x33, | ||
12704 | 0x31, 0xe1, 0xc7, 0x81, 0xc8, 0x83, 0x27, 0xfe, 0x66, 0x0c, 0x1d, 0x24, | ||
12705 | 0x33, 0x31, 0xdf, 0xbc, | ||
12706 | 0x4e, 0x10, 0xfe, 0x42, 0x00, 0x02, 0x65, 0x7c, 0x06, 0xfe, 0x81, 0x49, | ||
12707 | 0x17, 0xfe, 0x2c, 0x0d, | ||
12708 | 0x08, 0x05, 0x0a, 0xfe, 0x44, 0x13, 0x10, 0x00, 0x55, 0x0a, 0xfe, 0x54, | ||
12709 | 0x12, 0x55, 0xfe, 0x28, | ||
12710 | 0x00, 0x23, 0xfe, 0x9a, 0x0d, 0x09, 0x46, 0x01, 0x0e, 0x07, 0x00, 0x66, | ||
12711 | 0x44, 0xfe, 0x28, 0x00, | ||
12712 | 0xfe, 0xe2, 0x10, 0x01, 0xf5, 0x01, 0xf6, 0x09, 0xa4, 0x01, 0xfe, 0x26, | ||
12713 | 0x0f, 0x64, 0x12, 0x2f, | ||
12714 | 0x01, 0x73, 0x02, 0x2b, 0x10, 0xfe, 0x44, 0x00, 0x55, 0x0a, 0xe9, 0x44, | ||
12715 | 0x0a, 0xfe, 0xb4, 0x10, | ||
12716 | 0x01, 0xb0, 0x44, 0x0a, 0xfe, 0xaa, 0x10, 0x01, 0xb0, 0xfe, 0x19, 0x82, | ||
12717 | 0xfe, 0x34, 0x46, 0xac, | ||
12718 | 0x44, 0x0a, 0x10, 0xfe, 0x43, 0x00, 0xfe, 0x96, 0x10, 0x08, 0x54, 0x0a, | ||
12719 | 0x37, 0x01, 0xf5, 0x01, | ||
12720 | 0xf6, 0x64, 0x12, 0x2f, 0x01, 0x73, 0x99, 0x0a, 0x64, 0x42, 0x92, 0x02, | ||
12721 | 0xfe, 0x2e, 0x03, 0x08, | ||
12722 | 0x05, 0x0a, 0x8a, 0x44, 0x0a, 0x10, 0x00, 0xfe, 0x5c, 0x10, 0x68, 0x05, | ||
12723 | 0x1a, 0xfe, 0x58, 0x12, | ||
12724 | 0x08, 0x05, 0x1a, 0xfe, 0x50, 0x13, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, | ||
12725 | 0xfe, 0x50, 0x0d, 0xfe, | ||
12726 | 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x56, 0x0d, 0x08, 0x54, 0x1a, 0x37, | ||
12727 | 0xfe, 0xa9, 0x10, 0x10, | ||
12728 | 0xfe, 0x15, 0x00, 0xfe, 0x04, 0xe6, 0x0a, 0x50, 0xfe, 0x2e, 0x10, 0x10, | ||
12729 | 0xfe, 0x13, 0x00, 0xfe, | ||
12730 | 0x10, 0x10, 0x10, 0x6f, 0xab, 0x10, 0xfe, 0x41, 0x00, 0xaa, 0x10, 0xfe, | ||
12731 | 0x24, 0x00, 0x8c, 0xb5, | ||
12732 | 0xb6, 0x74, 0x03, 0x70, 0x28, 0x23, 0xd8, 0x50, 0xfe, 0x04, 0xe6, 0x1a, | ||
12733 | 0xfe, 0x9d, 0x41, 0xfe, | ||
12734 | 0x1c, 0x42, 0x64, 0x01, 0xe3, 0x02, 0x2b, 0xf8, 0x15, 0x0a, 0x39, 0xa0, | ||
12735 | 0xb4, 0x15, 0xfe, 0x31, | ||
12736 | 0x00, 0x39, 0xa2, 0x01, 0xfe, 0x48, 0x10, 0x02, 0xd7, 0x42, 0xfe, 0x06, | ||
12737 | 0xec, 0xd0, 0xfc, 0x44, | ||
12738 | 0x1b, 0xfe, 0xce, 0x45, 0x35, 0x42, 0xfe, 0x06, 0xea, 0xd0, 0xfe, 0x47, | ||
12739 | 0x4b, 0x91, 0xfe, 0x75, | ||
12740 | 0x57, 0x03, 0x5d, 0xfe, 0x98, 0x56, 0xfe, 0x38, 0x12, 0x09, 0x48, 0x01, | ||
12741 | 0x0e, 0xfe, 0x44, 0x48, | ||
12742 | 0x4f, 0x08, 0x05, 0x1b, 0xfe, 0x1a, 0x13, 0x09, 0x46, 0x01, 0x0e, 0x41, | ||
12743 | 0xfe, 0x41, 0x58, 0x09, | ||
12744 | 0xa4, 0x01, 0x0e, 0xfe, 0x49, 0x54, 0x96, 0xfe, 0x1e, 0x0e, 0x02, 0xfe, | ||
12745 | 0x2e, 0x03, 0x09, 0x5d, | ||
12746 | 0xfe, 0xee, 0x14, 0xfc, 0x44, 0x1b, 0xfe, 0xce, 0x45, 0x35, 0x42, 0xfe, | ||
12747 | 0xce, 0x47, 0xfe, 0xad, | ||
12748 | 0x13, 0x02, 0x2b, 0x22, 0x20, 0x07, 0x11, 0xfe, 0x9e, 0x12, 0x21, 0x13, | ||
12749 | 0x59, 0x13, 0x9f, 0x13, | ||
12750 | 0xd5, 0x22, 0x2f, 0x41, 0x39, 0x2f, 0xbc, 0xad, 0xfe, 0xbc, 0xf0, 0xfe, | ||
12751 | 0xe0, 0x0e, 0x0f, 0x06, | ||
12752 | 0x13, 0x59, 0x01, 0xfe, 0xda, 0x16, 0x03, 0xfe, 0x38, 0x01, 0x29, 0xfe, | ||
12753 | 0x3a, 0x01, 0x56, 0xfe, | ||
12754 | 0xe4, 0x0e, 0xfe, 0x02, 0xec, 0xd5, 0x69, 0x00, 0x66, 0xfe, 0x04, 0xec, | ||
12755 | 0x20, 0x4f, 0xfe, 0x05, | ||
12756 | 0xf6, 0xfe, 0x34, 0x01, 0x01, 0xfe, 0x4a, 0x17, 0xfe, 0x08, 0x90, 0xfe, | ||
12757 | 0x48, 0xf4, 0x0d, 0xfe, | ||
12758 | 0x18, 0x13, 0xba, 0xfe, 0x02, 0xea, 0xd5, 0x69, 0x7e, 0xfe, 0xc5, 0x13, | ||
12759 | 0x15, 0x1a, 0x39, 0xa0, | ||
12760 | 0xb4, 0xfe, 0x2e, 0x10, 0x03, 0xfe, 0x38, 0x01, 0x1e, 0xfe, 0xf0, 0xff, | ||
12761 | 0x0c, 0xfe, 0x60, 0x01, | ||
12762 | 0x03, 0xfe, 0x3a, 0x01, 0x0c, 0xfe, 0x62, 0x01, 0x43, 0x13, 0x20, 0x25, | ||
12763 | 0x06, 0x13, 0x2f, 0x12, | ||
12764 | 0x2f, 0x92, 0x0f, 0x06, 0x04, 0x21, 0x04, 0x22, 0x59, 0xfe, 0xf7, 0x12, | ||
12765 | 0x22, 0x9f, 0xb7, 0x13, | ||
12766 | 0x9f, 0x07, 0x7e, 0xfe, 0x71, 0x13, 0xfe, 0x24, 0x1c, 0x15, 0x19, 0x39, | ||
12767 | 0xa0, 0xb4, 0xfe, 0xd9, | ||
12768 | 0x10, 0xc3, 0xfe, 0x03, 0xdc, 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x04, | ||
12769 | 0xc3, 0xfe, 0x03, 0xdc, | ||
12770 | 0xfe, 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x04, 0xfe, 0x03, 0x57, 0xc3, 0x21, | ||
12771 | 0xfe, 0x00, 0xcc, 0x04, | ||
12772 | 0xfe, 0x03, 0x57, 0xc3, 0x78, 0x04, 0x08, 0x05, 0x58, 0xfe, 0x22, 0x13, | ||
12773 | 0xfe, 0x1c, 0x80, 0x07, | ||
12774 | 0x06, 0xfe, 0x1a, 0x13, 0xfe, 0x1e, 0x80, 0xed, 0xfe, 0x1d, 0x80, 0xae, | ||
12775 | 0xfe, 0x0c, 0x90, 0xfe, | ||
12776 | 0x0e, 0x13, 0xfe, 0x0e, 0x90, 0xac, 0xfe, 0x3c, 0x90, 0xfe, 0x30, 0xf4, | ||
12777 | 0x0a, 0xfe, 0x3c, 0x50, | ||
12778 | 0xaa, 0x01, 0xfe, 0x7a, 0x17, 0x32, 0x07, 0x2f, 0xad, 0x01, 0xfe, 0xb4, | ||
12779 | 0x16, 0x08, 0x05, 0x1b, | ||
12780 | 0x4e, 0x01, 0xf5, 0x01, 0xf6, 0x12, 0xfe, 0xe9, 0x00, 0x08, 0x05, 0x58, | ||
12781 | 0xfe, 0x2c, 0x13, 0x01, | ||
12782 | 0xfe, 0x0c, 0x17, 0xfe, 0x1e, 0x1c, 0xfe, 0x14, 0x90, 0xfe, 0x96, 0x90, | ||
12783 | 0x0c, 0xfe, 0x64, 0x01, | ||
12784 | 0x14, 0xfe, 0x66, 0x01, 0x08, 0x05, 0x5b, 0xfe, 0x12, 0x12, 0xfe, 0x03, | ||
12785 | 0x80, 0x8d, 0xfe, 0x01, | ||
12786 | 0xec, 0x20, 0xfe, 0x80, 0x40, 0x13, 0x20, 0x6a, 0x2a, 0x12, 0xcf, 0x64, | ||
12787 | 0x22, 0x20, 0xfb, 0x79, | ||
12788 | 0x20, 0x04, 0xfe, 0x08, 0x1c, 0x03, 0xfe, 0xac, 0x00, 0xfe, 0x06, 0x58, | ||
12789 | 0x03, 0xfe, 0xae, 0x00, | ||
12790 | |||
12791 | 0xfe, 0x07, 0x58, 0x03, 0xfe, 0xb0, 0x00, 0xfe, 0x08, 0x58, 0x03, 0xfe, | ||
12792 | 0xb2, 0x00, 0xfe, 0x09, | ||
12793 | 0x58, 0xfe, 0x0a, 0x1c, 0x25, 0x6e, 0x13, 0xd0, 0x21, 0x0c, 0x5c, 0x0c, | ||
12794 | 0x45, 0x0f, 0x46, 0x52, | ||
12795 | 0x50, 0x18, 0x1b, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x23, 0xfe, 0xfc, | ||
12796 | 0x0f, 0x44, 0x11, 0x0f, | ||
12797 | 0x48, 0x52, 0x18, 0x58, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x23, 0xe4, | ||
12798 | 0x25, 0x11, 0x13, 0x20, | ||
12799 | 0x7c, 0x6f, 0x4f, 0x22, 0x20, 0xfb, 0x79, 0x20, 0x12, 0xcf, 0xfe, 0x14, | ||
12800 | 0x56, 0xfe, 0xd6, 0xf0, | ||
12801 | 0xfe, 0x26, 0x10, 0xf8, 0x74, 0xfe, 0x14, 0x1c, 0xfe, 0x10, 0x1c, 0xfe, | ||
12802 | 0x18, 0x1c, 0x04, 0x42, | ||
12803 | 0xfe, 0x0c, 0x14, 0xfc, 0xfe, 0x07, 0xe6, 0x1b, 0xfe, 0xce, 0x47, 0xfe, | ||
12804 | 0xf5, 0x13, 0x04, 0x01, | ||
12805 | 0xb0, 0x7c, 0x6f, 0x4f, 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x42, | ||
12806 | 0x13, 0x32, 0x07, 0x2f, | ||
12807 | 0xfe, 0x34, 0x13, 0x09, 0x48, 0x01, 0x0e, 0xbb, 0xfe, 0x36, 0x12, 0xfe, | ||
12808 | 0x41, 0x48, 0xfe, 0x45, | ||
12809 | 0x48, 0x01, 0xf0, 0xfe, 0x00, 0xcc, 0xbb, 0xfe, 0xf3, 0x13, 0x43, 0x78, | ||
12810 | 0x07, 0x11, 0xac, 0x09, | ||
12811 | 0x84, 0x01, 0x0e, 0xfe, 0x80, 0x5c, 0x01, 0x73, 0xfe, 0x0e, 0x10, 0x07, | ||
12812 | 0x82, 0x4e, 0xfe, 0x14, | ||
12813 | 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x60, 0x10, 0x04, 0xfe, 0x44, 0x58, 0x8d, | ||
12814 | 0xfe, 0x01, 0xec, 0xa2, | ||
12815 | 0xfe, 0x9e, 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x1a, 0x79, | ||
12816 | 0x2a, 0x01, 0xe3, 0xfe, | ||
12817 | 0xdd, 0x10, 0x2c, 0xc7, 0x81, 0xc8, 0x83, 0x33, 0x31, 0xde, 0x07, 0x1a, | ||
12818 | 0xfe, 0x48, 0x12, 0x07, | ||
12819 | 0x0a, 0xfe, 0x56, 0x12, 0x07, 0x19, 0xfe, 0x30, 0x12, 0x07, 0xc9, 0x17, | ||
12820 | 0xfe, 0x32, 0x12, 0x07, | ||
12821 | 0xfe, 0x23, 0x00, 0x17, 0xeb, 0x07, 0x06, 0x17, 0xfe, 0x9c, 0x12, 0x07, | ||
12822 | 0x1f, 0xfe, 0x12, 0x12, | ||
12823 | 0x07, 0x00, 0x17, 0x24, 0x15, 0xc9, 0x01, 0x36, 0xa9, 0x2d, 0x01, 0x0b, | ||
12824 | 0x94, 0x4b, 0x04, 0x2d, | ||
12825 | 0xdd, 0x09, 0xd1, 0x01, 0xfe, 0x26, 0x0f, 0x12, 0x82, 0x02, 0x2b, 0x2d, | ||
12826 | 0x32, 0x07, 0xa6, 0xfe, | ||
12827 | 0xd9, 0x13, 0x3a, 0x3d, 0x3b, 0x3e, 0x56, 0xfe, 0xf0, 0x11, 0x08, 0x05, | ||
12828 | 0x5a, 0xfe, 0x72, 0x12, | ||
12829 | 0x9b, 0x2e, 0x9c, 0x3c, 0x90, 0xc0, 0x96, 0xfe, 0xba, 0x11, 0x22, 0x62, | ||
12830 | 0xfe, 0x26, 0x13, 0x03, | ||
12831 | 0x7f, 0x29, 0x80, 0x56, 0xfe, 0x76, 0x0d, 0x0c, 0x60, 0x14, 0x61, 0x21, | ||
12832 | 0x0c, 0x7f, 0x0c, 0x80, | ||
12833 | 0x01, 0xb3, 0x25, 0x6e, 0x77, 0x13, 0x62, 0x01, 0xef, 0x9b, 0x2e, 0x9c, | ||
12834 | 0x3c, 0xfe, 0x04, 0x55, | ||
12835 | 0xfe, 0xa5, 0x55, 0xfe, 0x04, 0xfa, 0x2e, 0xfe, 0x05, 0xfa, 0x3c, 0xfe, | ||
12836 | 0x91, 0x10, 0x03, 0x3f, | ||
12837 | 0x29, 0x40, 0xfe, 0x40, 0x56, 0xfe, 0xe1, 0x56, 0x0c, 0x3f, 0x14, 0x40, | ||
12838 | 0x88, 0x9b, 0x2e, 0x9c, | ||
12839 | 0x3c, 0x90, 0xc0, 0x03, 0x5e, 0x29, 0x5f, 0xfe, 0x00, 0x56, 0xfe, 0xa1, | ||
12840 | 0x56, 0x0c, 0x5e, 0x14, | ||
12841 | 0x5f, 0x08, 0x05, 0x5a, 0xfe, 0x1e, 0x12, 0x22, 0x62, 0xfe, 0x1f, 0x40, | ||
12842 | 0x03, 0x60, 0x29, 0x61, | ||
12843 | 0xfe, 0x2c, 0x50, 0xfe, 0xae, 0x50, 0x03, 0x3f, 0x29, 0x40, 0xfe, 0x44, | ||
12844 | 0x50, 0xfe, 0xc6, 0x50, | ||
12845 | 0x03, 0x5e, 0x29, 0x5f, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0x03, 0x3d, | ||
12846 | 0x29, 0x3e, 0xfe, 0x40, | ||
12847 | 0x50, 0xfe, 0xc2, 0x50, 0x02, 0x89, 0x25, 0x06, 0x13, 0xd4, 0x02, 0x72, | ||
12848 | 0x2d, 0x01, 0x0b, 0x1d, | ||
12849 | 0x4c, 0x33, 0x31, 0xde, 0x07, 0x06, 0x23, 0x4c, 0x32, 0x07, 0xa6, 0x23, | ||
12850 | 0x72, 0x01, 0xaf, 0x1e, | ||
12851 | 0x43, 0x17, 0x4c, 0x08, 0x05, 0x0a, 0xee, 0x3a, 0x3d, 0x3b, 0x3e, 0xfe, | ||
12852 | 0x0a, 0x55, 0x35, 0xfe, | ||
12853 | 0x8b, 0x55, 0x57, 0x3d, 0x7d, 0x3e, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, | ||
12854 | 0x02, 0x72, 0xfe, 0x19, | ||
12855 | 0x81, 0xba, 0xfe, 0x19, 0x41, 0x02, 0x72, 0x2d, 0x01, 0x0b, 0x1c, 0x34, | ||
12856 | 0x1d, 0xe8, 0x33, 0x31, | ||
12857 | 0xe1, 0x55, 0x19, 0xfe, 0xa6, 0x12, 0x55, 0x0a, 0x4d, 0x02, 0x4c, 0x01, | ||
12858 | 0x0b, 0x1c, 0x34, 0x1d, | ||
12859 | 0xe8, 0x33, 0x31, 0xdf, 0x07, 0x19, 0x23, 0x4c, 0x01, 0x0b, 0x1d, 0xe8, | ||
12860 | 0x33, 0x31, 0xfe, 0xe8, | ||
12861 | 0x09, 0xfe, 0xc2, 0x49, 0x51, 0x03, 0xfe, 0x9c, 0x00, 0x28, 0x8a, 0x53, | ||
12862 | 0x05, 0x1f, 0x35, 0xa9, | ||
12863 | 0xfe, 0xbb, 0x45, 0x55, 0x00, 0x4e, 0x44, 0x06, 0x7c, 0x43, 0xfe, 0xda, | ||
12864 | 0x14, 0x01, 0xaf, 0x8c, | ||
12865 | 0xfe, 0x4b, 0x45, 0xee, 0x32, 0x07, 0xa5, 0xed, 0x03, 0xcd, 0x28, 0x8a, | ||
12866 | 0x03, 0x45, 0x28, 0x35, | ||
12867 | 0x67, 0x02, 0x72, 0xfe, 0xc0, 0x5d, 0xfe, 0xf8, 0x14, 0xfe, 0x03, 0x17, | ||
12868 | 0x03, 0x5c, 0xc1, 0x0c, | ||
12869 | 0x5c, 0x67, 0x2d, 0x01, 0x0b, 0x26, 0x89, 0x01, 0xfe, 0x9e, 0x15, 0x02, | ||
12870 | 0x89, 0x01, 0x0b, 0x1c, | ||
12871 | 0x34, 0x1d, 0x4c, 0x33, 0x31, 0xdf, 0x07, 0x06, 0x23, 0x4c, 0x01, 0xf1, | ||
12872 | 0xfe, 0x42, 0x58, 0xf1, | ||
12873 | 0xfe, 0xa4, 0x14, 0x8c, 0xfe, 0x4a, 0xf4, 0x0a, 0x17, 0x4c, 0xfe, 0x4a, | ||
12874 | 0xf4, 0x06, 0xea, 0x32, | ||
12875 | 0x07, 0xa5, 0x8b, 0x02, 0x72, 0x03, 0x45, 0xc1, 0x0c, 0x45, 0x67, 0x2d, | ||
12876 | 0x01, 0x0b, 0x26, 0x89, | ||
12877 | 0x01, 0xfe, 0xcc, 0x15, 0x02, 0x89, 0x0f, 0x06, 0x27, 0xfe, 0xbe, 0x13, | ||
12878 | 0x26, 0xfe, 0xd4, 0x13, | ||
12879 | 0x76, 0xfe, 0x89, 0x48, 0x01, 0x0b, 0x21, 0x76, 0x04, 0x7b, 0xfe, 0xd0, | ||
12880 | 0x13, 0x1c, 0xfe, 0xd0, | ||
12881 | 0x13, 0x1d, 0xfe, 0xbe, 0x13, 0x67, 0x2d, 0x01, 0x0b, 0xfe, 0xd5, 0x10, | ||
12882 | 0x0f, 0x71, 0xff, 0x02, | ||
12883 | 0x00, 0x57, 0x52, 0x93, 0x1e, 0xfe, 0xff, 0x7f, 0xfe, 0x30, 0x56, 0xfe, | ||
12884 | 0x00, 0x5c, 0x04, 0x0f, | ||
12885 | 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0x1e, 0x43, 0xfe, 0x30, 0x56, | ||
12886 | 0xfe, 0x00, 0x5c, 0x04, | ||
12887 | 0x0f, 0x71, 0xff, 0x02, 0x00, 0x57, 0x52, 0x93, 0x04, 0x0f, 0x71, 0xff, | ||
12888 | 0x02, 0x00, 0x57, 0x52, | ||
12889 | 0x93, 0xfe, 0x0b, 0x58, 0x04, 0x09, 0x5c, 0x01, 0x87, 0x09, 0x45, 0x01, | ||
12890 | 0x87, 0x04, 0xfe, 0x03, | ||
12891 | 0xa1, 0x1e, 0x11, 0xff, 0x03, 0x00, 0x54, 0xfe, 0x00, 0xf4, 0x1f, 0x52, | ||
12892 | 0xfe, 0x00, 0x7d, 0xfe, | ||
12893 | 0x01, 0x7d, 0xfe, 0x02, 0x7d, 0xfe, 0x03, 0x7c, 0x6a, 0x2a, 0x0c, 0x5e, | ||
12894 | 0x14, 0x5f, 0x57, 0x3f, | ||
12895 | 0x7d, 0x40, 0x04, 0xdd, 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, | ||
12896 | 0x5a, 0x8d, 0x04, 0x01, | ||
12897 | 0xfe, 0x0c, 0x19, 0xfe, 0x42, 0x48, 0x50, 0x51, 0x91, 0x01, 0x0b, 0x1d, | ||
12898 | 0xfe, 0x96, 0x15, 0x33, | ||
12899 | 0x31, 0xe1, 0x01, 0x0b, 0x1d, 0xfe, 0x96, 0x15, 0x33, 0x31, 0xfe, 0xe8, | ||
12900 | 0x0a, 0xfe, 0xc1, 0x59, | ||
12901 | 0x03, 0xcd, 0x28, 0xfe, 0xcc, 0x12, 0x53, 0x05, 0x1a, 0xfe, 0xc4, 0x13, | ||
12902 | 0x21, 0x69, 0x1a, 0xee, | ||
12903 | 0x55, 0xca, 0x6b, 0xfe, 0xdc, 0x14, 0x4d, 0x0f, 0x06, 0x18, 0xca, 0x7c, | ||
12904 | 0x30, 0xfe, 0x78, 0x10, | ||
12905 | 0xff, 0x02, 0x83, 0x55, 0xab, 0xff, 0x02, 0x83, 0x55, 0x69, 0x19, 0xae, | ||
12906 | 0x98, 0xfe, 0x30, 0x00, | ||
12907 | 0x96, 0xf2, 0x18, 0x6d, 0x0f, 0x06, 0xfe, 0x56, 0x10, 0x69, 0x0a, 0xed, | ||
12908 | 0x98, 0xfe, 0x64, 0x00, | ||
12909 | 0x96, 0xf2, 0x09, 0xfe, 0x64, 0x00, 0x18, 0x9e, 0x0f, 0x06, 0xfe, 0x28, | ||
12910 | 0x10, 0x69, 0x06, 0xfe, | ||
12911 | 0x60, 0x13, 0x98, 0xfe, 0xc8, 0x00, 0x96, 0xf2, 0x09, 0xfe, 0xc8, 0x00, | ||
12912 | 0x18, 0x59, 0x0f, 0x06, | ||
12913 | 0x88, 0x98, 0xfe, 0x90, 0x01, 0x7a, 0xfe, 0x42, 0x15, 0x91, 0xe4, 0xfe, | ||
12914 | 0x43, 0xf4, 0x9f, 0xfe, | ||
12915 | 0x56, 0xf0, 0xfe, 0x54, 0x15, 0xfe, 0x04, 0xf4, 0x71, 0xfe, 0x43, 0xf4, | ||
12916 | 0x9e, 0xfe, 0xf3, 0x10, | ||
12917 | 0xfe, 0x40, 0x5c, 0x01, 0xfe, 0x16, 0x14, 0x1e, 0x43, 0xec, 0xfe, 0x00, | ||
12918 | 0x17, 0xfe, 0x4d, 0xe4, | ||
12919 | 0x6e, 0x7a, 0xfe, 0x90, 0x15, 0xc4, 0x6e, 0xfe, 0x1c, 0x10, 0xfe, 0x00, | ||
12920 | 0x17, 0xfe, 0x4d, 0xe4, | ||
12921 | 0xcc, 0x7a, 0xfe, 0x90, 0x15, 0xc4, 0xcc, 0x88, 0x51, 0x21, 0xfe, 0x4d, | ||
12922 | 0xf4, 0x00, 0xe9, 0x91, | ||
12923 | 0x0f, 0x06, 0xfe, 0xb4, 0x56, 0xfe, 0xc3, 0x58, 0x04, 0x51, 0x0f, 0x0a, | ||
12924 | 0x04, 0x16, 0x06, 0x01, | ||
12925 | 0x0b, 0x26, 0xf3, 0x16, 0x0a, 0x01, 0x0b, 0x26, 0xf3, 0x16, 0x19, 0x01, | ||
12926 | 0x0b, 0x26, 0xf3, 0x76, | ||
12927 | 0xfe, 0x89, 0x49, 0x01, 0x0b, 0x04, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xb1, | ||
12928 | 0x16, 0x19, 0x01, 0x0b, | ||
12929 | 0x26, 0xb1, 0x16, 0x06, 0x01, 0x0b, 0x26, 0xb1, 0xfe, 0x89, 0x49, 0x01, | ||
12930 | 0x0b, 0x26, 0xb1, 0x76, | ||
12931 | 0xfe, 0x89, 0x4a, 0x01, 0x0b, 0x04, 0x51, 0x04, 0x22, 0xd3, 0x07, 0x06, | ||
12932 | 0xfe, 0x48, 0x13, 0xb8, | ||
12933 | 0x13, 0xd3, 0xfe, 0x49, 0xf4, 0x00, 0x4d, 0x76, 0xa9, 0x67, 0xfe, 0x01, | ||
12934 | 0xec, 0xfe, 0x27, 0x01, | ||
12935 | 0xfe, 0x89, 0x48, 0xff, 0x02, 0x00, 0x10, 0x27, 0xfe, 0x2e, 0x16, 0x32, | ||
12936 | 0x07, 0xfe, 0xe3, 0x00, | ||
12937 | 0xfe, 0x20, 0x13, 0x1d, 0xfe, 0x52, 0x16, 0x21, 0x13, 0xd4, 0x01, 0x4b, | ||
12938 | 0x22, 0xd4, 0x07, 0x06, | ||
12939 | 0x4e, 0x08, 0x54, 0x06, 0x37, 0x04, 0x09, 0x48, 0x01, 0x0e, 0xfb, 0x8e, | ||
12940 | 0x07, 0x11, 0xae, 0x09, | ||
12941 | 0x84, 0x01, 0x0e, 0x8e, 0x09, 0x5d, 0x01, 0xa8, 0x04, 0x09, 0x84, 0x01, | ||
12942 | 0x0e, 0x8e, 0xfe, 0x80, | ||
12943 | 0xe7, 0x11, 0x07, 0x11, 0x8a, 0xfe, 0x45, 0x58, 0x01, 0xf0, 0x8e, 0x04, | ||
12944 | 0x09, 0x48, 0x01, 0x0e, | ||
12945 | 0x8e, 0x09, 0x5d, 0x01, 0xa8, 0x04, 0x09, 0x48, 0x01, 0x0e, 0xfe, 0x80, | ||
12946 | 0x80, 0xfe, 0x80, 0x4c, | ||
12947 | 0xfe, 0x49, 0xe4, 0x11, 0xae, 0x09, 0x84, 0x01, 0x0e, 0xfe, 0x80, 0x4c, | ||
12948 | 0x09, 0x5d, 0x01, 0x87, | ||
12949 | 0x04, 0x18, 0x11, 0x75, 0x6c, 0xfe, 0x60, 0x01, 0xfe, 0x18, 0xdf, 0xfe, | ||
12950 | 0x19, 0xde, 0xfe, 0x24, | ||
12951 | 0x1c, 0xfe, 0x1d, 0xf7, 0x1b, 0x97, 0xfe, 0xee, 0x16, 0x01, 0xfe, 0xf4, | ||
12952 | 0x17, 0xad, 0x9a, 0x1b, | ||
12953 | 0x6c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x04, 0xb9, 0x23, 0xfe, 0xde, | ||
12954 | 0x16, 0xfe, 0xda, 0x10, | ||
12955 | 0x18, 0x11, 0x75, 0x03, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x1f, 0xfe, | ||
12956 | 0x18, 0x58, 0x03, 0xfe, | ||
12957 | 0x66, 0x01, 0xfe, 0x19, 0x58, 0x9a, 0x1f, 0xfe, 0x3c, 0x90, 0xfe, 0x30, | ||
12958 | 0xf4, 0x06, 0xfe, 0x3c, | ||
12959 | 0x50, 0x6c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0x1f, | ||
12960 | 0x97, 0xfe, 0x38, 0x17, | ||
12961 | 0xfe, 0xb6, 0x14, 0x35, 0x04, 0xb9, 0x23, 0xfe, 0x10, 0x17, 0xfe, 0x9c, | ||
12962 | 0x10, 0x18, 0x11, 0x75, | ||
12963 | 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x1d, 0xf7, | ||
12964 | 0x2e, 0x97, 0xfe, 0x5a, | ||
12965 | 0x17, 0xfe, 0x94, 0x14, 0xec, 0x9a, 0x2e, 0x6c, 0x1a, 0xfe, 0xaf, 0x19, | ||
12966 | 0xfe, 0x98, 0xe7, 0x00, | ||
12967 | 0x04, 0xb9, 0x23, 0xfe, 0x4e, 0x17, 0xfe, 0x6c, 0x10, 0x18, 0x11, 0x75, | ||
12968 | 0xfe, 0x30, 0xbc, 0xfe, | ||
12969 | 0xb2, 0xbc, 0x9a, 0xcb, 0x6c, 0x1a, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, | ||
12970 | 0xcb, 0x97, 0xfe, 0x92, | ||
12971 | 0x17, 0xfe, 0x5c, 0x14, 0x35, 0x04, 0xb9, 0x23, 0xfe, 0x7e, 0x17, 0xfe, | ||
12972 | 0x42, 0x10, 0xfe, 0x02, | ||
12973 | 0xf6, 0x11, 0x75, 0xfe, 0x18, 0xfe, 0x60, 0xfe, 0x19, 0xfe, 0x61, 0xfe, | ||
12974 | 0x03, 0xa1, 0xfe, 0x1d, | ||
12975 | 0xf7, 0x5b, 0x97, 0xfe, 0xb8, 0x17, 0xfe, 0x36, 0x14, 0xfe, 0x1c, 0x13, | ||
12976 | 0x9a, 0x5b, 0x41, 0xfe, | ||
12977 | 0x83, 0x58, 0xfe, 0xaf, 0x19, 0xfe, 0x80, 0xe7, 0x11, 0xfe, 0x81, 0xe7, | ||
12978 | 0x11, 0x12, 0xfe, 0xdd, | ||
12979 | 0x00, 0x6a, 0x2a, 0x04, 0x6a, 0x2a, 0xfe, 0x12, 0x45, 0x23, 0xfe, 0xa8, | ||
12980 | 0x17, 0x15, 0x06, 0x39, | ||
12981 | 0xa0, 0xb4, 0x02, 0x2b, 0xfe, 0x39, 0xf0, 0xfe, 0xfc, 0x17, 0x21, 0x04, | ||
12982 | 0xfe, 0x7e, 0x18, 0x1e, | ||
12983 | 0x19, 0x66, 0x0f, 0x0d, 0x04, 0x75, 0x03, 0xd2, 0x1e, 0x06, 0xfe, 0xef, | ||
12984 | 0x12, 0xfe, 0xe1, 0x10, | ||
12985 | 0x7c, 0x6f, 0x4f, 0x32, 0x07, 0x2f, 0xfe, 0x3c, 0x13, 0xf1, 0xfe, 0x42, | ||
12986 | 0x13, 0x42, 0x92, 0x09, | ||
12987 | 0x48, 0x01, 0x0e, 0xbb, 0xeb, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01, | ||
12988 | 0xf0, 0xfe, 0x00, 0xcc, | ||
12989 | 0xbb, 0xfe, 0xf3, 0x13, 0x43, 0x78, 0x07, 0x11, 0xac, 0x09, 0x84, 0x01, | ||
12990 | 0x0e, 0xfe, 0x80, 0x4c, | ||
12991 | 0x01, 0x73, 0xfe, 0x16, 0x10, 0x07, 0x82, 0x8b, 0xfe, 0x40, 0x14, 0xfe, | ||
12992 | 0x24, 0x12, 0xfe, 0x14, | ||
12993 | 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0x1c, 0x18, 0x18, 0x0a, 0x04, 0xfe, 0x9c, | ||
12994 | 0xe7, 0x0a, 0x10, 0xfe, | ||
12995 | 0x15, 0x00, 0x64, 0x79, 0x2a, 0x01, 0xe3, 0x18, 0x06, 0x04, 0x42, 0x92, | ||
12996 | 0x08, 0x54, 0x1b, 0x37, | ||
12997 | 0x12, 0x2f, 0x01, 0x73, 0x18, 0x06, 0x04, 0xfe, 0x38, 0x90, 0xfe, 0xba, | ||
12998 | 0x90, 0x3a, 0xce, 0x3b, | ||
12999 | 0xcf, 0xfe, 0x48, 0x55, 0x35, 0xfe, 0xc9, 0x55, 0x04, 0x22, 0xa3, 0x77, | ||
13000 | 0x13, 0xa3, 0x04, 0x09, | ||
13001 | 0xa4, 0x01, 0x0e, 0xfe, 0x41, 0x48, 0x09, 0x46, 0x01, 0x0e, 0xfe, 0x49, | ||
13002 | 0x44, 0x17, 0xfe, 0xe8, | ||
13003 | 0x18, 0x77, 0x78, 0x04, 0x09, 0x48, 0x01, 0x0e, 0x07, 0x11, 0x4e, 0x09, | ||
13004 | 0x5d, 0x01, 0xa8, 0x09, | ||
13005 | 0x46, 0x01, 0x0e, 0x77, 0x78, 0x04, 0xfe, 0x4e, 0xe4, 0x19, 0x6b, 0xfe, | ||
13006 | 0x1c, 0x19, 0x03, 0xfe, | ||
13007 | 0x90, 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10, 0xfe, 0x4e, 0xe4, 0xc9, | ||
13008 | 0x6b, 0xfe, 0x2e, 0x19, | ||
13009 | 0x03, 0xfe, 0x92, 0x00, 0xfe, 0x02, 0xe6, 0x1a, 0xe5, 0xfe, 0x4e, 0xe4, | ||
13010 | 0xfe, 0x0b, 0x00, 0x6b, | ||
13011 | 0xfe, 0x40, 0x19, 0x03, 0xfe, 0x94, 0x00, 0xfe, 0x02, 0xe6, 0x1f, 0xfe, | ||
13012 | 0x08, 0x10, 0x03, 0xfe, | ||
13013 | 0x96, 0x00, 0xfe, 0x02, 0xe6, 0x6d, 0xfe, 0x4e, 0x45, 0xea, 0xba, 0xff, | ||
13014 | 0x04, 0x68, 0x54, 0xe7, | ||
13015 | 0x1e, 0x6e, 0xfe, 0x08, 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c, 0xfe, | ||
13016 | 0x1a, 0xf4, 0xfe, 0x00, | ||
13017 | 0x04, 0xea, 0xfe, 0x48, 0xf4, 0x19, 0x7a, 0xfe, 0x74, 0x19, 0x0f, 0x19, | ||
13018 | 0x04, 0x07, 0x7e, 0xfe, | ||
13019 | 0x5a, 0xf0, 0xfe, 0x84, 0x19, 0x25, 0xfe, 0x09, 0x00, 0xfe, 0x34, 0x10, | ||
13020 | 0x07, 0x1a, 0xfe, 0x5a, | ||
13021 | 0xf0, 0xfe, 0x92, 0x19, 0x25, 0xca, 0xfe, 0x26, 0x10, 0x07, 0x19, 0x66, | ||
13022 | 0x25, 0x6d, 0xe5, 0x07, | ||
13023 | 0x0a, 0x66, 0x25, 0x9e, 0xfe, 0x0e, 0x10, 0x07, 0x06, 0x66, 0x25, 0x59, | ||
13024 | 0xa9, 0xb8, 0x04, 0x15, | ||
13025 | 0xfe, 0x09, 0x00, 0x01, 0x36, 0xfe, 0x04, 0xfe, 0x81, 0x03, 0x83, 0xfe, | ||
13026 | 0x40, 0x5c, 0x04, 0x1c, | ||
13027 | 0xf7, 0xfe, 0x14, 0xf0, 0x0b, 0x27, 0xfe, 0xd6, 0x19, 0x1c, 0xf7, 0x7b, | ||
13028 | 0xf7, 0xfe, 0x82, 0xf0, | ||
13029 | 0xfe, 0xda, 0x19, 0x04, 0xff, 0xcc, 0x00, 0x00, | ||
13623 | }; | 13030 | }; |
13624 | 13031 | ||
13625 | STATIC unsigned short _adv_asc38C0800_size = | 13032 | static unsigned short _adv_asc38C0800_size = sizeof(_adv_asc38C0800_buf); /* 0x14E1 */ |
13626 | sizeof(_adv_asc38C0800_buf); /* 0x14E1 */ | 13033 | static ADV_DCNT _adv_asc38C0800_chksum = 0x050D3FD8UL; /* Expanded little-endian checksum. */ |
13627 | STATIC ADV_DCNT _adv_asc38C0800_chksum = | ||
13628 | 0x050D3FD8UL; /* Expanded little-endian checksum. */ | ||
13629 | 13034 | ||
13630 | /* Microcode buffer is kept after initialization for error recovery. */ | 13035 | /* Microcode buffer is kept after initialization for error recovery. */ |
13631 | STATIC unsigned char _adv_asc38C1600_buf[] = { | 13036 | static unsigned char _adv_asc38C1600_buf[] = { |
13632 | 0x00, 0x00, 0x00, 0xf2, 0x00, 0x16, 0x00, 0xfc, 0x00, 0x10, 0x00, 0xf0, 0x18, 0xe4, 0x01, 0x00, | 13037 | 0x00, 0x00, 0x00, 0xf2, 0x00, 0x16, 0x00, 0xfc, 0x00, 0x10, 0x00, 0xf0, |
13633 | 0x04, 0x1e, 0x48, 0xe4, 0x03, 0xf6, 0xf7, 0x13, 0x2e, 0x1e, 0x02, 0x00, 0x07, 0x17, 0xc0, 0x5f, | 13038 | 0x18, 0xe4, 0x01, 0x00, |
13634 | 0x00, 0xfa, 0xff, 0xff, 0x04, 0x00, 0x00, 0xf6, 0x09, 0xe7, 0x82, 0xe7, 0x85, 0xf0, 0x86, 0xf0, | 13039 | 0x04, 0x1e, 0x48, 0xe4, 0x03, 0xf6, 0xf7, 0x13, 0x2e, 0x1e, 0x02, 0x00, |
13635 | 0x4e, 0x10, 0x9e, 0xe7, 0xff, 0x00, 0x55, 0xf0, 0x01, 0xf6, 0x03, 0x00, 0x98, 0x57, 0x01, 0xe6, | 13040 | 0x07, 0x17, 0xc0, 0x5f, |
13636 | 0x00, 0xea, 0x00, 0xec, 0x01, 0xfa, 0x18, 0xf4, 0x08, 0x00, 0xf0, 0x1d, 0x38, 0x54, 0x32, 0xf0, | 13041 | 0x00, 0xfa, 0xff, 0xff, 0x04, 0x00, 0x00, 0xf6, 0x09, 0xe7, 0x82, 0xe7, |
13637 | 0x10, 0x00, 0xc2, 0x0e, 0x1e, 0xf0, 0xd5, 0xf0, 0xbc, 0x00, 0x4b, 0xe4, 0x00, 0xe6, 0xb1, 0xf0, | 13042 | 0x85, 0xf0, 0x86, 0xf0, |
13638 | 0xb4, 0x00, 0x02, 0x13, 0x3e, 0x1c, 0xc8, 0x47, 0x3e, 0x00, 0xd8, 0x01, 0x06, 0x13, 0x0c, 0x1c, | 13043 | 0x4e, 0x10, 0x9e, 0xe7, 0xff, 0x00, 0x55, 0xf0, 0x01, 0xf6, 0x03, 0x00, |
13639 | 0x5e, 0x1e, 0x00, 0x57, 0xc8, 0x57, 0x01, 0xfc, 0xbc, 0x0e, 0xa2, 0x12, 0xb9, 0x54, 0x00, 0x80, | 13044 | 0x98, 0x57, 0x01, 0xe6, |
13640 | 0x62, 0x0a, 0x5a, 0x12, 0xc8, 0x15, 0x3e, 0x1e, 0x18, 0x40, 0xbd, 0x56, 0x03, 0xe6, 0x01, 0xea, | 13045 | 0x00, 0xea, 0x00, 0xec, 0x01, 0xfa, 0x18, 0xf4, 0x08, 0x00, 0xf0, 0x1d, |
13641 | 0x5c, 0xf0, 0x0f, 0x00, 0x20, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12, 0x04, 0x13, 0xbb, 0x55, | 13046 | 0x38, 0x54, 0x32, 0xf0, |
13642 | 0x3c, 0x56, 0x3e, 0x57, 0x03, 0x58, 0x4a, 0xe4, 0x40, 0x00, 0xb6, 0x00, 0xbb, 0x00, 0xc0, 0x00, | 13047 | 0x10, 0x00, 0xc2, 0x0e, 0x1e, 0xf0, 0xd5, 0xf0, 0xbc, 0x00, 0x4b, 0xe4, |
13643 | 0x00, 0x01, 0x01, 0x01, 0x3e, 0x01, 0x58, 0x0a, 0x44, 0x10, 0x0a, 0x12, 0x4c, 0x1c, 0x4e, 0x1c, | 13048 | 0x00, 0xe6, 0xb1, 0xf0, |
13644 | 0x02, 0x4a, 0x30, 0xe4, 0x05, 0xe6, 0x0c, 0x00, 0x3c, 0x00, 0x80, 0x00, 0x24, 0x01, 0x3c, 0x01, | 13049 | 0xb4, 0x00, 0x02, 0x13, 0x3e, 0x1c, 0xc8, 0x47, 0x3e, 0x00, 0xd8, 0x01, |
13645 | 0x68, 0x01, 0x6a, 0x01, 0x70, 0x01, 0x72, 0x01, 0x74, 0x01, 0x76, 0x01, 0x78, 0x01, 0x7c, 0x01, | 13050 | 0x06, 0x13, 0x0c, 0x1c, |
13646 | 0xc6, 0x0e, 0x0c, 0x10, 0xac, 0x12, 0xae, 0x12, 0x16, 0x1a, 0x32, 0x1c, 0x6e, 0x1e, 0x02, 0x48, | 13051 | 0x5e, 0x1e, 0x00, 0x57, 0xc8, 0x57, 0x01, 0xfc, 0xbc, 0x0e, 0xa2, 0x12, |
13647 | 0x3a, 0x55, 0xc9, 0x57, 0x02, 0xee, 0x5b, 0xf0, 0x03, 0xf7, 0x06, 0xf7, 0x03, 0xfc, 0x06, 0x00, | 13052 | 0xb9, 0x54, 0x00, 0x80, |
13648 | 0x1e, 0x00, 0xbe, 0x00, 0xe1, 0x00, 0x0c, 0x12, 0x18, 0x1a, 0x70, 0x1a, 0x30, 0x1c, 0x38, 0x1c, | 13053 | 0x62, 0x0a, 0x5a, 0x12, 0xc8, 0x15, 0x3e, 0x1e, 0x18, 0x40, 0xbd, 0x56, |
13649 | 0x10, 0x44, 0x00, 0x4c, 0xb0, 0x57, 0x40, 0x5c, 0x4d, 0xe4, 0x04, 0xea, 0x5d, 0xf0, 0xa7, 0xf0, | 13054 | 0x03, 0xe6, 0x01, 0xea, |
13650 | 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x09, 0x00, 0x19, 0x00, 0x32, 0x00, 0x33, 0x00, 0x34, 0x00, | 13055 | 0x5c, 0xf0, 0x0f, 0x00, 0x20, 0x00, 0x6c, 0x01, 0x6e, 0x01, 0x04, 0x12, |
13651 | 0x36, 0x00, 0x98, 0x00, 0x9e, 0x00, 0xcc, 0x00, 0x20, 0x01, 0x4e, 0x01, 0x79, 0x01, 0x3c, 0x09, | 13056 | 0x04, 0x13, 0xbb, 0x55, |
13652 | 0x68, 0x0d, 0x02, 0x10, 0x04, 0x10, 0x3a, 0x10, 0x08, 0x12, 0x0a, 0x13, 0x40, 0x16, 0x50, 0x16, | 13057 | 0x3c, 0x56, 0x3e, 0x57, 0x03, 0x58, 0x4a, 0xe4, 0x40, 0x00, 0xb6, 0x00, |
13653 | 0x00, 0x17, 0x4a, 0x19, 0x00, 0x4e, 0x00, 0x54, 0x01, 0x58, 0x00, 0xdc, 0x05, 0xf0, 0x09, 0xf0, | 13058 | 0xbb, 0x00, 0xc0, 0x00, |
13654 | 0x59, 0xf0, 0xb8, 0xf0, 0x48, 0xf4, 0x0e, 0xf7, 0x0a, 0x00, 0x9b, 0x00, 0x9c, 0x00, 0xa4, 0x00, | 13059 | 0x00, 0x01, 0x01, 0x01, 0x3e, 0x01, 0x58, 0x0a, 0x44, 0x10, 0x0a, 0x12, |
13655 | 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe7, 0x00, 0xf0, 0x03, 0x69, 0x08, 0xe9, 0x09, 0x5c, 0x0c, | 13060 | 0x4c, 0x1c, 0x4e, 0x1c, |
13656 | 0xb6, 0x12, 0xbc, 0x19, 0xd8, 0x1b, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, 0x42, 0x1d, 0x08, 0x44, | 13061 | 0x02, 0x4a, 0x30, 0xe4, 0x05, 0xe6, 0x0c, 0x00, 0x3c, 0x00, 0x80, 0x00, |
13657 | 0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, 0x89, 0x48, 0x68, 0x54, 0x83, 0x55, 0x83, 0x59, | 13062 | 0x24, 0x01, 0x3c, 0x01, |
13658 | 0x31, 0xe4, 0x02, 0xe6, 0x07, 0xf0, 0x08, 0xf0, 0x0b, 0xf0, 0x0c, 0xf0, 0x4b, 0xf4, 0x04, 0xf8, | 13063 | 0x68, 0x01, 0x6a, 0x01, 0x70, 0x01, 0x72, 0x01, 0x74, 0x01, 0x76, 0x01, |
13659 | 0x05, 0xf8, 0x02, 0xfa, 0x03, 0xfa, 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00, 0xa8, 0x00, 0xaa, 0x00, | 13064 | 0x78, 0x01, 0x7c, 0x01, |
13660 | 0xb9, 0x00, 0xe0, 0x00, 0xe5, 0x00, 0x22, 0x01, 0x26, 0x01, 0x60, 0x01, 0x7a, 0x01, 0x82, 0x01, | 13065 | 0xc6, 0x0e, 0x0c, 0x10, 0xac, 0x12, 0xae, 0x12, 0x16, 0x1a, 0x32, 0x1c, |
13661 | 0xc8, 0x01, 0xca, 0x01, 0x86, 0x02, 0x6a, 0x03, 0x18, 0x05, 0xb2, 0x07, 0x68, 0x08, 0x10, 0x0d, | 13066 | 0x6e, 0x1e, 0x02, 0x48, |
13662 | 0x06, 0x10, 0x0a, 0x10, 0x0e, 0x10, 0x12, 0x10, 0x60, 0x10, 0xed, 0x10, 0xf3, 0x10, 0x06, 0x12, | 13067 | 0x3a, 0x55, 0xc9, 0x57, 0x02, 0xee, 0x5b, 0xf0, 0x03, 0xf7, 0x06, 0xf7, |
13663 | 0x10, 0x12, 0x1e, 0x12, 0x0c, 0x13, 0x0e, 0x13, 0x10, 0x13, 0xfe, 0x9c, 0xf0, 0x35, 0x05, 0xfe, | 13068 | 0x03, 0xfc, 0x06, 0x00, |
13664 | 0xec, 0x0e, 0xff, 0x10, 0x00, 0x00, 0xe9, 0xfe, 0x34, 0x1f, 0x00, 0xe8, 0xfe, 0x88, 0x01, 0xff, | 13069 | 0x1e, 0x00, 0xbe, 0x00, 0xe1, 0x00, 0x0c, 0x12, 0x18, 0x1a, 0x70, 0x1a, |
13665 | 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00, 0x00, 0xfe, 0x57, 0x24, | 13070 | 0x30, 0x1c, 0x38, 0x1c, |
13666 | 0x00, 0xfe, 0x4c, 0x00, 0x65, 0xff, 0x04, 0x00, 0x00, 0x1a, 0xff, 0x09, 0x00, 0x00, 0xff, 0x08, | 13071 | 0x10, 0x44, 0x00, 0x4c, 0xb0, 0x57, 0x40, 0x5c, 0x4d, 0xe4, 0x04, 0xea, |
13667 | 0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, 0xff, 0xff, 0xff, 0x13, | 13072 | 0x5d, 0xf0, 0xa7, 0xf0, |
13668 | 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00, 0xfe, 0x04, 0xf7, 0xe8, | 13073 | 0x04, 0xf6, 0x02, 0xfc, 0x05, 0x00, 0x09, 0x00, 0x19, 0x00, 0x32, 0x00, |
13669 | 0x37, 0x7d, 0x0d, 0x01, 0xfe, 0x4a, 0x11, 0xfe, 0x04, 0xf7, 0xe8, 0x7d, 0x0d, 0x51, 0x37, 0xfe, | 13074 | 0x33, 0x00, 0x34, 0x00, |
13670 | 0x3d, 0xf0, 0xfe, 0x0c, 0x02, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x91, 0xf0, 0xfe, 0xf8, 0x01, 0xfe, | 13075 | 0x36, 0x00, 0x98, 0x00, 0x9e, 0x00, 0xcc, 0x00, 0x20, 0x01, 0x4e, 0x01, |
13671 | 0x90, 0xf0, 0xfe, 0xf8, 0x01, 0xfe, 0x8f, 0xf0, 0xbc, 0x03, 0x67, 0x4d, 0x05, 0xfe, 0x08, 0x0f, | 13076 | 0x79, 0x01, 0x3c, 0x09, |
13672 | 0x01, 0xfe, 0x78, 0x0f, 0xfe, 0xdd, 0x12, 0x05, 0xfe, 0x0e, 0x03, 0xfe, 0x28, 0x1c, 0x03, 0xfe, | 13077 | 0x68, 0x0d, 0x02, 0x10, 0x04, 0x10, 0x3a, 0x10, 0x08, 0x12, 0x0a, 0x13, |
13673 | 0xa6, 0x00, 0xfe, 0xd1, 0x12, 0x3e, 0x22, 0xfe, 0xa6, 0x00, 0xac, 0xfe, 0x48, 0xf0, 0xfe, 0x90, | 13078 | 0x40, 0x16, 0x50, 0x16, |
13674 | 0x02, 0xfe, 0x49, 0xf0, 0xfe, 0xaa, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc8, 0x02, 0xfe, 0x46, 0xf0, | 13079 | 0x00, 0x17, 0x4a, 0x19, 0x00, 0x4e, 0x00, 0x54, 0x01, 0x58, 0x00, 0xdc, |
13675 | 0xfe, 0x5a, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x60, 0x02, 0xfe, 0x43, 0xf0, 0xfe, 0x4e, 0x02, 0xfe, | 13080 | 0x05, 0xf0, 0x09, 0xf0, |
13676 | 0x44, 0xf0, 0xfe, 0x52, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x56, 0x02, 0x1c, 0x0d, 0xa2, 0x1c, 0x07, | 13081 | 0x59, 0xf0, 0xb8, 0xf0, 0x48, 0xf4, 0x0e, 0xf7, 0x0a, 0x00, 0x9b, 0x00, |
13677 | 0x22, 0xb7, 0x05, 0x35, 0xfe, 0x00, 0x1c, 0xfe, 0xf1, 0x10, 0xfe, 0x02, 0x1c, 0xf5, 0xfe, 0x1e, | 13082 | 0x9c, 0x00, 0xa4, 0x00, |
13678 | 0x1c, 0xfe, 0xe9, 0x10, 0x01, 0x5f, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc, 0xde, 0x0a, 0x81, 0x01, | 13083 | 0xb5, 0x00, 0xba, 0x00, 0xd0, 0x00, 0xe7, 0x00, 0xf0, 0x03, 0x69, 0x08, |
13679 | 0xa3, 0x05, 0x35, 0x1f, 0x95, 0x47, 0xb8, 0x01, 0xfe, 0xe4, 0x11, 0x0a, 0x81, 0x01, 0x5c, 0xfe, | 13084 | 0xe9, 0x09, 0x5c, 0x0c, |
13680 | 0xbd, 0x10, 0x0a, 0x81, 0x01, 0x5c, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, 0xfe, 0x58, 0x1c, 0x1c, | 13085 | 0xb6, 0x12, 0xbc, 0x19, 0xd8, 0x1b, 0x20, 0x1c, 0x34, 0x1c, 0x36, 0x1c, |
13681 | 0x07, 0x22, 0xb7, 0x37, 0x2a, 0x35, 0xfe, 0x3d, 0xf0, 0xfe, 0x0c, 0x02, 0x2b, 0xfe, 0x9e, 0x02, | 13086 | 0x42, 0x1d, 0x08, 0x44, |
13682 | 0xfe, 0x5a, 0x1c, 0xfe, 0x12, 0x1c, 0xfe, 0x14, 0x1c, 0x1f, 0xfe, 0x30, 0x00, 0x47, 0xb8, 0x01, | 13087 | 0x38, 0x44, 0x91, 0x44, 0x0a, 0x45, 0x48, 0x46, 0x89, 0x48, 0x68, 0x54, |
13683 | 0xfe, 0xd4, 0x11, 0x1c, 0x07, 0x22, 0xb7, 0x05, 0xe9, 0x21, 0x2c, 0x09, 0x1a, 0x31, 0xfe, 0x69, | 13088 | 0x83, 0x55, 0x83, 0x59, |
13684 | 0x10, 0x1c, 0x07, 0x22, 0xb7, 0xfe, 0x04, 0xec, 0x2c, 0x60, 0x01, 0xfe, 0x1e, 0x1e, 0x20, 0x2c, | 13089 | 0x31, 0xe4, 0x02, 0xe6, 0x07, 0xf0, 0x08, 0xf0, 0x0b, 0xf0, 0x0c, 0xf0, |
13685 | 0xfe, 0x05, 0xf6, 0xde, 0x01, 0xfe, 0x62, 0x1b, 0x01, 0x0c, 0x61, 0x4a, 0x44, 0x15, 0x56, 0x51, | 13090 | 0x4b, 0xf4, 0x04, 0xf8, |
13686 | 0x01, 0xfe, 0x9e, 0x1e, 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x0a, 0x57, 0x01, 0x18, 0x09, 0x00, | 13091 | 0x05, 0xf8, 0x02, 0xfa, 0x03, 0xfa, 0x04, 0xfc, 0x05, 0xfc, 0x07, 0x00, |
13687 | 0x36, 0x01, 0x85, 0xfe, 0x18, 0x10, 0xfe, 0x41, 0x58, 0x0a, 0xba, 0x01, 0x18, 0xfe, 0xc8, 0x54, | 13092 | 0xa8, 0x00, 0xaa, 0x00, |
13688 | 0x7b, 0xfe, 0x1c, 0x03, 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x37, 0x60, 0xfe, 0x02, 0xe8, 0x30, | 13093 | 0xb9, 0x00, 0xe0, 0x00, 0xe5, 0x00, 0x22, 0x01, 0x26, 0x01, 0x60, 0x01, |
13689 | 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, 0xfe, 0x77, 0x57, 0xfe, 0x27, 0xf0, 0xfe, 0xe4, 0x01, 0xfe, | 13094 | 0x7a, 0x01, 0x82, 0x01, |
13690 | 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x40, 0x1c, 0x2a, 0xeb, 0xfe, 0x26, 0xf0, 0xfe, 0x66, | 13095 | 0xc8, 0x01, 0xca, 0x01, 0x86, 0x02, 0x6a, 0x03, 0x18, 0x05, 0xb2, 0x07, |
13691 | 0x03, 0xfe, 0xa0, 0xf0, 0xfe, 0x54, 0x03, 0xfe, 0x11, 0xf0, 0xbc, 0xfe, 0xef, 0x10, 0xfe, 0x9f, | 13096 | 0x68, 0x08, 0x10, 0x0d, |
13692 | 0xf0, 0xfe, 0x74, 0x03, 0xfe, 0x46, 0x1c, 0x19, 0xfe, 0x11, 0x00, 0x05, 0x70, 0x37, 0xfe, 0x48, | 13097 | 0x06, 0x10, 0x0a, 0x10, 0x0e, 0x10, 0x12, 0x10, 0x60, 0x10, 0xed, 0x10, |
13693 | 0x1c, 0xfe, 0x46, 0x1c, 0x01, 0x0c, 0x06, 0x28, 0xfe, 0x18, 0x13, 0x26, 0x21, 0xb9, 0xc7, 0x20, | 13098 | 0xf3, 0x10, 0x06, 0x12, |
13694 | 0xb9, 0x0a, 0x57, 0x01, 0x18, 0xc7, 0x89, 0x01, 0xfe, 0xc8, 0x1a, 0x15, 0xe1, 0x2a, 0xeb, 0xfe, | 13099 | 0x10, 0x12, 0x1e, 0x12, 0x0c, 0x13, 0x0e, 0x13, 0x10, 0x13, 0xfe, 0x9c, |
13695 | 0x01, 0xf0, 0xeb, 0xfe, 0x82, 0xf0, 0xfe, 0xa4, 0x03, 0xfe, 0x9c, 0x32, 0x15, 0xfe, 0xe4, 0x00, | 13100 | 0xf0, 0x35, 0x05, 0xfe, |
13696 | 0x2f, 0xfe, 0xb6, 0x03, 0x2a, 0x3c, 0x16, 0xfe, 0xc6, 0x03, 0x01, 0x41, 0xfe, 0x06, 0xf0, 0xfe, | 13101 | 0xec, 0x0e, 0xff, 0x10, 0x00, 0x00, 0xe9, 0xfe, 0x34, 0x1f, 0x00, 0xe8, |
13697 | 0xd6, 0x03, 0xaf, 0xa0, 0xfe, 0x0a, 0xf0, 0xfe, 0xa2, 0x07, 0x05, 0x29, 0x03, 0x81, 0x1e, 0x1b, | 13102 | 0xfe, 0x88, 0x01, 0xff, |
13698 | 0xfe, 0x24, 0x05, 0x1f, 0x63, 0x01, 0x42, 0x8f, 0xfe, 0x70, 0x02, 0x05, 0xea, 0xfe, 0x46, 0x1c, | 13103 | 0x03, 0x00, 0x00, 0xfe, 0x93, 0x15, 0xfe, 0x0f, 0x05, 0xff, 0x38, 0x00, |
13699 | 0x37, 0x7d, 0x1d, 0xfe, 0x67, 0x1b, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0xfe, 0x48, 0x1c, 0x75, | 13104 | 0x00, 0xfe, 0x57, 0x24, |
13700 | 0x01, 0xa6, 0x86, 0x0a, 0x57, 0x01, 0x18, 0x09, 0x00, 0x1b, 0xec, 0x0a, 0xe1, 0x01, 0x18, 0x77, | 13105 | 0x00, 0xfe, 0x4c, 0x00, 0x65, 0xff, 0x04, 0x00, 0x00, 0x1a, 0xff, 0x09, |
13701 | 0x50, 0x40, 0x8d, 0x30, 0x03, 0x81, 0x1e, 0xf8, 0x1f, 0x63, 0x01, 0x42, 0x8f, 0xfe, 0x70, 0x02, | 13106 | 0x00, 0x00, 0xff, 0x08, |
13702 | 0x05, 0xea, 0xd7, 0x99, 0xd8, 0x9c, 0x2a, 0x29, 0x2f, 0xfe, 0x4e, 0x04, 0x16, 0xfe, 0x4a, 0x04, | 13107 | 0x01, 0x01, 0xff, 0x08, 0xff, 0xff, 0xff, 0x27, 0x00, 0x00, 0xff, 0x10, |
13703 | 0x7e, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x54, 0x12, 0x32, 0xff, 0x02, 0x00, 0x10, 0x01, | 13108 | 0xff, 0xff, 0xff, 0x13, |
13704 | 0x08, 0x16, 0xfe, 0x02, 0x05, 0x32, 0x01, 0x08, 0x16, 0x29, 0x27, 0x25, 0xee, 0xfe, 0x4c, 0x44, | 13109 | 0x00, 0x00, 0xfe, 0x78, 0x56, 0xfe, 0x34, 0x12, 0xff, 0x21, 0x00, 0x00, |
13705 | 0xfe, 0x58, 0x12, 0x50, 0xfe, 0x44, 0x48, 0x13, 0x34, 0xfe, 0x4c, 0x54, 0x7b, 0xec, 0x60, 0x8d, | 13110 | 0xfe, 0x04, 0xf7, 0xe8, |
13706 | 0x30, 0x01, 0xfe, 0x4e, 0x1e, 0xfe, 0x48, 0x47, 0xfe, 0x7c, 0x13, 0x01, 0x0c, 0x06, 0x28, 0xfe, | 13111 | 0x37, 0x7d, 0x0d, 0x01, 0xfe, 0x4a, 0x11, 0xfe, 0x04, 0xf7, 0xe8, 0x7d, |
13707 | 0x32, 0x13, 0x01, 0x43, 0x09, 0x9b, 0xfe, 0x68, 0x13, 0xfe, 0x26, 0x10, 0x13, 0x34, 0xfe, 0x4c, | 13112 | 0x0d, 0x51, 0x37, 0xfe, |
13708 | 0x54, 0x7b, 0xec, 0x01, 0xfe, 0x4e, 0x1e, 0xfe, 0x48, 0x47, 0xfe, 0x54, 0x13, 0x01, 0x0c, 0x06, | 13113 | 0x3d, 0xf0, 0xfe, 0x0c, 0x02, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x91, 0xf0, |
13709 | 0x28, 0xa5, 0x01, 0x43, 0x09, 0x9b, 0xfe, 0x40, 0x13, 0x01, 0x0c, 0x06, 0x28, 0xf9, 0x1f, 0x7f, | 13114 | 0xfe, 0xf8, 0x01, 0xfe, |
13710 | 0x01, 0x0c, 0x06, 0x07, 0x4d, 0x1f, 0xfe, 0x0d, 0x00, 0x01, 0x42, 0x8f, 0xfe, 0xa4, 0x0e, 0x05, | 13115 | 0x90, 0xf0, 0xfe, 0xf8, 0x01, 0xfe, 0x8f, 0xf0, 0xbc, 0x03, 0x67, 0x4d, |
13711 | 0x29, 0x32, 0x15, 0xfe, 0xe6, 0x00, 0x0f, 0xfe, 0x1c, 0x90, 0x04, 0xfe, 0x9c, 0x93, 0x3a, 0x0b, | 13116 | 0x05, 0xfe, 0x08, 0x0f, |
13712 | 0x0e, 0x8b, 0x02, 0x1f, 0x7f, 0x01, 0x42, 0x05, 0x35, 0xfe, 0x42, 0x5b, 0x7d, 0x1d, 0xfe, 0x46, | 13117 | 0x01, 0xfe, 0x78, 0x0f, 0xfe, 0xdd, 0x12, 0x05, 0xfe, 0x0e, 0x03, 0xfe, |
13713 | 0x59, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0x0f, 0xfe, 0x87, 0x80, 0x04, 0xfe, 0x87, 0x83, 0xfe, | 13118 | 0x28, 0x1c, 0x03, 0xfe, |
13714 | 0xc9, 0x47, 0x0b, 0x0e, 0xd0, 0x65, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x98, 0x13, 0x0f, 0xfe, 0x20, | 13119 | 0xa6, 0x00, 0xfe, 0xd1, 0x12, 0x3e, 0x22, 0xfe, 0xa6, 0x00, 0xac, 0xfe, |
13715 | 0x80, 0x04, 0xfe, 0xa0, 0x83, 0x33, 0x0b, 0x0e, 0x09, 0x1d, 0xfe, 0x84, 0x12, 0x01, 0x38, 0x06, | 13120 | 0x48, 0xf0, 0xfe, 0x90, |
13716 | 0x07, 0xfe, 0x70, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x1e, 0x1b, 0xfe, 0xda, 0x05, 0xd0, 0x54, 0x01, | 13121 | 0x02, 0xfe, 0x49, 0xf0, 0xfe, 0xaa, 0x02, 0xfe, 0x4a, 0xf0, 0xfe, 0xc8, |
13717 | 0x38, 0x06, 0x0d, 0xfe, 0x58, 0x13, 0x03, 0xfe, 0xa0, 0x00, 0x1e, 0xfe, 0x50, 0x12, 0x5e, 0xff, | 13122 | 0x02, 0xfe, 0x46, 0xf0, |
13718 | 0x02, 0x00, 0x10, 0x2f, 0xfe, 0x90, 0x05, 0x2a, 0x3c, 0xcc, 0xff, 0x02, 0x00, 0x10, 0x2f, 0xfe, | 13123 | 0xfe, 0x5a, 0x02, 0xfe, 0x47, 0xf0, 0xfe, 0x60, 0x02, 0xfe, 0x43, 0xf0, |
13719 | 0x9e, 0x05, 0x17, 0xfe, 0xf4, 0x05, 0x15, 0xfe, 0xe3, 0x00, 0x26, 0x01, 0x38, 0xfe, 0x4a, 0xf0, | 13124 | 0xfe, 0x4e, 0x02, 0xfe, |
13720 | 0xfe, 0xc0, 0x05, 0xfe, 0x49, 0xf0, 0xfe, 0xba, 0x05, 0x71, 0x2e, 0xfe, 0x21, 0x00, 0xf1, 0x2e, | 13125 | 0x44, 0xf0, 0xfe, 0x52, 0x02, 0xfe, 0x45, 0xf0, 0xfe, 0x56, 0x02, 0x1c, |
13721 | 0xfe, 0x22, 0x00, 0xa2, 0x2e, 0x4a, 0xfe, 0x09, 0x48, 0xff, 0x02, 0x00, 0x10, 0x2f, 0xfe, 0xd0, | 13126 | 0x0d, 0xa2, 0x1c, 0x07, |
13722 | 0x05, 0x17, 0xfe, 0xf4, 0x05, 0xfe, 0xe2, 0x08, 0x01, 0x38, 0x06, 0xfe, 0x1c, 0x00, 0x4d, 0x01, | 13127 | 0x22, 0xb7, 0x05, 0x35, 0xfe, 0x00, 0x1c, 0xfe, 0xf1, 0x10, 0xfe, 0x02, |
13723 | 0xa7, 0x2e, 0x07, 0x20, 0xe4, 0x47, 0xfe, 0x27, 0x01, 0x01, 0x0c, 0x06, 0x28, 0xfe, 0x24, 0x12, | 13128 | 0x1c, 0xf5, 0xfe, 0x1e, |
13724 | 0x3e, 0x01, 0x84, 0x1f, 0x7f, 0x01, 0x0c, 0x06, 0x07, 0x4d, 0x1f, 0xfe, 0x0d, 0x00, 0x01, 0x42, | 13129 | 0x1c, 0xfe, 0xe9, 0x10, 0x01, 0x5f, 0xfe, 0xe7, 0x10, 0xfe, 0x06, 0xfc, |
13725 | 0x8f, 0xfe, 0xa4, 0x0e, 0x05, 0x29, 0x03, 0xe6, 0x1e, 0xfe, 0xca, 0x13, 0x03, 0xb6, 0x1e, 0xfe, | 13130 | 0xde, 0x0a, 0x81, 0x01, |
13726 | 0x40, 0x12, 0x03, 0x66, 0x1e, 0xfe, 0x38, 0x13, 0x3e, 0x01, 0x84, 0x17, 0xfe, 0x72, 0x06, 0x0a, | 13131 | 0xa3, 0x05, 0x35, 0x1f, 0x95, 0x47, 0xb8, 0x01, 0xfe, 0xe4, 0x11, 0x0a, |
13727 | 0x07, 0x01, 0x38, 0x06, 0x24, 0xfe, 0x02, 0x12, 0x4f, 0x01, 0xfe, 0x56, 0x19, 0x16, 0xfe, 0x68, | 13132 | 0x81, 0x01, 0x5c, 0xfe, |
13728 | 0x06, 0x15, 0x82, 0x01, 0x41, 0x15, 0xe2, 0x03, 0x66, 0x8a, 0x10, 0x66, 0x03, 0x9a, 0x1e, 0xfe, | 13133 | 0xbd, 0x10, 0x0a, 0x81, 0x01, 0x5c, 0xfe, 0xad, 0x10, 0xfe, 0x16, 0x1c, |
13729 | 0x70, 0x12, 0x03, 0x55, 0x1e, 0xfe, 0x68, 0x13, 0x01, 0xc6, 0x09, 0x12, 0x48, 0xfe, 0x92, 0x06, | 13134 | 0xfe, 0x58, 0x1c, 0x1c, |
13730 | 0x2e, 0x12, 0x01, 0xfe, 0xac, 0x1d, 0xfe, 0x43, 0x48, 0x62, 0x80, 0x13, 0x58, 0xff, 0x02, 0x00, | 13135 | 0x07, 0x22, 0xb7, 0x37, 0x2a, 0x35, 0xfe, 0x3d, 0xf0, 0xfe, 0x0c, 0x02, |
13731 | 0x57, 0x52, 0xad, 0x23, 0x3f, 0x4e, 0x62, 0x49, 0x3e, 0x01, 0x84, 0x17, 0xfe, 0xea, 0x06, 0x01, | 13136 | 0x2b, 0xfe, 0x9e, 0x02, |
13732 | 0x38, 0x06, 0x12, 0xf7, 0x45, 0x0a, 0x95, 0x01, 0xfe, 0x84, 0x19, 0x16, 0xfe, 0xe0, 0x06, 0x15, | 13137 | 0xfe, 0x5a, 0x1c, 0xfe, 0x12, 0x1c, 0xfe, 0x14, 0x1c, 0x1f, 0xfe, 0x30, |
13733 | 0x82, 0x01, 0x41, 0x15, 0xe2, 0x03, 0x55, 0x8a, 0x10, 0x55, 0x1c, 0x07, 0x01, 0x84, 0xfe, 0xae, | 13138 | 0x00, 0x47, 0xb8, 0x01, |
13734 | 0x10, 0x03, 0x6f, 0x1e, 0xfe, 0x9e, 0x13, 0x3e, 0x01, 0x84, 0x03, 0x9a, 0x1e, 0xfe, 0x1a, 0x12, | 13139 | 0xfe, 0xd4, 0x11, 0x1c, 0x07, 0x22, 0xb7, 0x05, 0xe9, 0x21, 0x2c, 0x09, |
13735 | 0x01, 0x38, 0x06, 0x12, 0xfc, 0x01, 0xc6, 0x01, 0xfe, 0xac, 0x1d, 0xfe, 0x43, 0x48, 0x62, 0x80, | 13140 | 0x1a, 0x31, 0xfe, 0x69, |
13736 | 0xf0, 0x45, 0x0a, 0x95, 0x03, 0xb6, 0x1e, 0xf8, 0x01, 0x38, 0x06, 0x24, 0x36, 0xfe, 0x02, 0xf6, | 13141 | 0x10, 0x1c, 0x07, 0x22, 0xb7, 0xfe, 0x04, 0xec, 0x2c, 0x60, 0x01, 0xfe, |
13737 | 0x07, 0x71, 0x78, 0x8c, 0x00, 0x4d, 0x62, 0x49, 0x3e, 0x2d, 0x93, 0x4e, 0xd0, 0x0d, 0x17, 0xfe, | 13142 | 0x1e, 0x1e, 0x20, 0x2c, |
13738 | 0x9a, 0x07, 0x01, 0xfe, 0xc0, 0x19, 0x16, 0xfe, 0x90, 0x07, 0x26, 0x20, 0x9e, 0x15, 0x82, 0x01, | 13143 | 0xfe, 0x05, 0xf6, 0xde, 0x01, 0xfe, 0x62, 0x1b, 0x01, 0x0c, 0x61, 0x4a, |
13739 | 0x41, 0x15, 0xe2, 0x21, 0x9e, 0x09, 0x07, 0xfb, 0x03, 0xe6, 0xfe, 0x58, 0x57, 0x10, 0xe6, 0x05, | 13144 | 0x44, 0x15, 0x56, 0x51, |
13740 | 0xfe, 0x2a, 0x06, 0x03, 0x6f, 0x8a, 0x10, 0x6f, 0x1c, 0x07, 0x01, 0x84, 0xfe, 0x9c, 0x32, 0x5f, | 13145 | 0x01, 0xfe, 0x9e, 0x1e, 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x0a, 0x57, |
13741 | 0x75, 0x01, 0xa6, 0x86, 0x15, 0xfe, 0xe2, 0x00, 0x2f, 0xed, 0x2a, 0x3c, 0xfe, 0x0a, 0xf0, 0xfe, | 13146 | 0x01, 0x18, 0x09, 0x00, |
13742 | 0xce, 0x07, 0xae, 0xfe, 0x96, 0x08, 0xfe, 0x06, 0xf0, 0xfe, 0x9e, 0x08, 0xaf, 0xa0, 0x05, 0x29, | 13147 | 0x36, 0x01, 0x85, 0xfe, 0x18, 0x10, 0xfe, 0x41, 0x58, 0x0a, 0xba, 0x01, |
13743 | 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x2e, 0x12, 0x14, 0x1d, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0x14, | 13148 | 0x18, 0xfe, 0xc8, 0x54, |
13744 | 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0xfe, 0x99, 0xa4, 0x01, 0x08, 0x14, 0x00, 0x05, 0xfe, | 13149 | 0x7b, 0xfe, 0x1c, 0x03, 0x01, 0xfe, 0x96, 0x1a, 0x05, 0x35, 0x37, 0x60, |
13745 | 0xc6, 0x09, 0x01, 0x76, 0x06, 0x12, 0xfe, 0x3a, 0x12, 0x01, 0x0c, 0x06, 0x12, 0xfe, 0x30, 0x13, | 13150 | 0xfe, 0x02, 0xe8, 0x30, |
13746 | 0x14, 0xfe, 0x1b, 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0x14, 0x00, | 13151 | 0xfe, 0xbf, 0x57, 0xfe, 0x9e, 0x43, 0xfe, 0x77, 0x57, 0xfe, 0x27, 0xf0, |
13747 | 0x01, 0x08, 0x14, 0x07, 0x01, 0x08, 0x14, 0x00, 0x05, 0xef, 0x7c, 0x4a, 0x78, 0x4f, 0x0f, 0xfe, | 13152 | 0xfe, 0xe4, 0x01, 0xfe, |
13748 | 0x9a, 0x81, 0x04, 0xfe, 0x9a, 0x83, 0xfe, 0xcb, 0x47, 0x0b, 0x0e, 0x2d, 0x28, 0x48, 0xfe, 0x6c, | 13153 | 0x07, 0x4b, 0xfe, 0x20, 0xf0, 0xbc, 0xfe, 0x40, 0x1c, 0x2a, 0xeb, 0xfe, |
13749 | 0x08, 0x0a, 0x28, 0xfe, 0x09, 0x6f, 0xca, 0xfe, 0xca, 0x45, 0xfe, 0x32, 0x12, 0x53, 0x63, 0x4e, | 13154 | 0x26, 0xf0, 0xfe, 0x66, |
13750 | 0x7c, 0x97, 0x2f, 0xfe, 0x7e, 0x08, 0x2a, 0x3c, 0xfe, 0x0a, 0xf0, 0xfe, 0x6c, 0x08, 0xaf, 0xa0, | 13155 | 0x03, 0xfe, 0xa0, 0xf0, 0xfe, 0x54, 0x03, 0xfe, 0x11, 0xf0, 0xbc, 0xfe, |
13751 | 0xae, 0xfe, 0x96, 0x08, 0x05, 0x29, 0x01, 0x41, 0x05, 0xed, 0x14, 0x24, 0x05, 0xed, 0xfe, 0x9c, | 13156 | 0xef, 0x10, 0xfe, 0x9f, |
13752 | 0xf7, 0x9f, 0x01, 0xfe, 0xae, 0x1e, 0xfe, 0x18, 0x58, 0x01, 0xfe, 0xbe, 0x1e, 0xfe, 0x99, 0x58, | 13157 | 0xf0, 0xfe, 0x74, 0x03, 0xfe, 0x46, 0x1c, 0x19, 0xfe, 0x11, 0x00, 0x05, |
13753 | 0xfe, 0x78, 0x18, 0xfe, 0xf9, 0x18, 0x8e, 0xfe, 0x16, 0x09, 0x10, 0x6a, 0x22, 0x6b, 0x01, 0x0c, | 13158 | 0x70, 0x37, 0xfe, 0x48, |
13754 | 0x61, 0x54, 0x44, 0x21, 0x2c, 0x09, 0x1a, 0xf8, 0x77, 0x01, 0xfe, 0x7e, 0x1e, 0x47, 0x2c, 0x7a, | 13159 | 0x1c, 0xfe, 0x46, 0x1c, 0x01, 0x0c, 0x06, 0x28, 0xfe, 0x18, 0x13, 0x26, |
13755 | 0x30, 0xf0, 0xfe, 0x83, 0xe7, 0xfe, 0x3f, 0x00, 0x71, 0xfe, 0x03, 0x40, 0x01, 0x0c, 0x61, 0x65, | 13160 | 0x21, 0xb9, 0xc7, 0x20, |
13756 | 0x44, 0x01, 0xc2, 0xc8, 0xfe, 0x1f, 0x40, 0x20, 0x6e, 0x01, 0xfe, 0x6a, 0x16, 0xfe, 0x08, 0x50, | 13161 | 0xb9, 0x0a, 0x57, 0x01, 0x18, 0xc7, 0x89, 0x01, 0xfe, 0xc8, 0x1a, 0x15, |
13757 | 0xfe, 0x8a, 0x50, 0xfe, 0x44, 0x51, 0xfe, 0xc6, 0x51, 0xfe, 0x10, 0x10, 0x01, 0xfe, 0xce, 0x1e, | 13162 | 0xe1, 0x2a, 0xeb, 0xfe, |
13758 | 0x01, 0xfe, 0xde, 0x1e, 0x10, 0x68, 0x22, 0x69, 0x01, 0xfe, 0xee, 0x1e, 0x01, 0xfe, 0xfe, 0x1e, | 13163 | 0x01, 0xf0, 0xeb, 0xfe, 0x82, 0xf0, 0xfe, 0xa4, 0x03, 0xfe, 0x9c, 0x32, |
13759 | 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x10, 0x4b, 0x22, 0x4c, 0xfe, 0x8a, 0x10, 0x01, 0x0c, 0x06, | 13164 | 0x15, 0xfe, 0xe4, 0x00, |
13760 | 0x54, 0xfe, 0x50, 0x12, 0x01, 0xfe, 0xae, 0x1e, 0x01, 0xfe, 0xbe, 0x1e, 0x10, 0x6a, 0x22, 0x6b, | 13165 | 0x2f, 0xfe, 0xb6, 0x03, 0x2a, 0x3c, 0x16, 0xfe, 0xc6, 0x03, 0x01, 0x41, |
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13767 | 0xde, 0x09, 0xfe, 0x9e, 0xf0, 0xfe, 0xf2, 0x09, 0xfe, 0x01, 0x48, 0x1b, 0x3c, 0x37, 0x88, 0xf5, | 13172 | 0xfe, 0x48, 0x1c, 0x75, |
13768 | 0xd4, 0xfe, 0x1e, 0x0a, 0xd5, 0xfe, 0x42, 0x0a, 0xd2, 0xfe, 0x1e, 0x0a, 0xd3, 0xfe, 0x42, 0x0a, | 13173 | 0x01, 0xa6, 0x86, 0x0a, 0x57, 0x01, 0x18, 0x09, 0x00, 0x1b, 0xec, 0x0a, |
13769 | 0xae, 0xfe, 0x12, 0x0a, 0xfe, 0x06, 0xf0, 0xfe, 0x18, 0x0a, 0xaf, 0xa0, 0x05, 0x29, 0x01, 0x41, | 13174 | 0xe1, 0x01, 0x18, 0x77, |
13770 | 0xfe, 0xc1, 0x10, 0x14, 0x24, 0xfe, 0xc1, 0x10, 0x01, 0x76, 0x06, 0x07, 0xfe, 0x14, 0x12, 0x01, | 13175 | 0x50, 0x40, 0x8d, 0x30, 0x03, 0x81, 0x1e, 0xf8, 0x1f, 0x63, 0x01, 0x42, |
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13773 | 0xaa, 0xf0, 0xfe, 0xce, 0x0a, 0xfe, 0xac, 0xf0, 0xfe, 0x66, 0x0a, 0xfe, 0x92, 0x10, 0xc4, 0xf6, | 13178 | 0x16, 0xfe, 0x4a, 0x04, |
13774 | 0xfe, 0xad, 0xf0, 0xfe, 0x72, 0x0a, 0x05, 0xfe, 0x1a, 0x0c, 0xc5, 0xfe, 0xe7, 0x10, 0xfe, 0x2b, | 13179 | 0x7e, 0xfe, 0xa0, 0x00, 0xfe, 0x9b, 0x57, 0xfe, 0x54, 0x12, 0x32, 0xff, |
13775 | 0xf0, 0xbf, 0xfe, 0x6b, 0x18, 0x23, 0xfe, 0x00, 0xfe, 0xfe, 0x1c, 0x12, 0xac, 0xfe, 0xd2, 0xf0, | 13180 | 0x02, 0x00, 0x10, 0x01, |
13776 | 0xbf, 0xfe, 0x76, 0x18, 0x23, 0x1d, 0x1b, 0xbf, 0x03, 0xe3, 0x23, 0x07, 0x1b, 0xbf, 0xd4, 0x5b, | 13181 | 0x08, 0x16, 0xfe, 0x02, 0x05, 0x32, 0x01, 0x08, 0x16, 0x29, 0x27, 0x25, |
13777 | 0xd5, 0x5b, 0xd2, 0x5b, 0xd3, 0x5b, 0xc4, 0xc5, 0xfe, 0xa9, 0x10, 0x75, 0x5e, 0x32, 0x1f, 0x7f, | 13182 | 0xee, 0xfe, 0x4c, 0x44, |
13778 | 0x01, 0x42, 0x19, 0xfe, 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x70, 0x19, 0x98, 0x05, 0x70, 0xfe, 0x74, | 13183 | 0xfe, 0x58, 0x12, 0x50, 0xfe, 0x44, 0x48, 0x13, 0x34, 0xfe, 0x4c, 0x54, |
13779 | 0x18, 0x23, 0xfe, 0x00, 0xf8, 0x1b, 0x5b, 0x7d, 0x12, 0x01, 0xfe, 0x78, 0x0f, 0x4d, 0x01, 0xfe, | 13184 | 0x7b, 0xec, 0x60, 0x8d, |
13780 | 0x96, 0x1a, 0x21, 0x30, 0x77, 0x7d, 0x1d, 0x05, 0x5b, 0x01, 0x0c, 0x06, 0x0d, 0x2b, 0xfe, 0xe2, | 13185 | 0x30, 0x01, 0xfe, 0x4e, 0x1e, 0xfe, 0x48, 0x47, 0xfe, 0x7c, 0x13, 0x01, |
13781 | 0x0b, 0x01, 0x0c, 0x06, 0x54, 0xfe, 0xa6, 0x12, 0x01, 0x0c, 0x06, 0x24, 0xfe, 0x88, 0x13, 0x21, | 13186 | 0x0c, 0x06, 0x28, 0xfe, |
13782 | 0x6e, 0xc7, 0x01, 0xfe, 0x1e, 0x1f, 0x0f, 0xfe, 0x83, 0x80, 0x04, 0xfe, 0x83, 0x83, 0xfe, 0xc9, | 13187 | 0x32, 0x13, 0x01, 0x43, 0x09, 0x9b, 0xfe, 0x68, 0x13, 0xfe, 0x26, 0x10, |
13783 | 0x47, 0x0b, 0x0e, 0xfe, 0xc8, 0x44, 0xfe, 0x42, 0x13, 0x0f, 0xfe, 0x04, 0x91, 0x04, 0xfe, 0x84, | 13188 | 0x13, 0x34, 0xfe, 0x4c, |
13784 | 0x93, 0xfe, 0xca, 0x57, 0x0b, 0xfe, 0x86, 0x91, 0x04, 0xfe, 0x86, 0x93, 0xfe, 0xcb, 0x57, 0x0b, | 13189 | 0x54, 0x7b, 0xec, 0x01, 0xfe, 0x4e, 0x1e, 0xfe, 0x48, 0x47, 0xfe, 0x54, |
13785 | 0x0e, 0x7a, 0x30, 0xfe, 0x40, 0x59, 0xfe, 0xc1, 0x59, 0x8e, 0x40, 0x03, 0x6a, 0x3b, 0x6b, 0x10, | 13190 | 0x13, 0x01, 0x0c, 0x06, |
13786 | 0x97, 0x22, 0x98, 0xd9, 0x6a, 0xda, 0x6b, 0x01, 0xc2, 0xc8, 0x7a, 0x30, 0x20, 0x6e, 0xdb, 0x64, | 13191 | 0x28, 0xa5, 0x01, 0x43, 0x09, 0x9b, 0xfe, 0x40, 0x13, 0x01, 0x0c, 0x06, |
13787 | 0xdc, 0x34, 0x91, 0x6c, 0x7e, 0x6d, 0xfe, 0x44, 0x55, 0xfe, 0xe5, 0x55, 0xfe, 0x04, 0xfa, 0x64, | 13192 | 0x28, 0xf9, 0x1f, 0x7f, |
13788 | 0xfe, 0x05, 0xfa, 0x34, 0x01, 0xfe, 0x6a, 0x16, 0xa3, 0x26, 0x10, 0x97, 0x10, 0x98, 0x91, 0x6c, | 13193 | 0x01, 0x0c, 0x06, 0x07, 0x4d, 0x1f, 0xfe, 0x0d, 0x00, 0x01, 0x42, 0x8f, |
13789 | 0x7e, 0x6d, 0xfe, 0x14, 0x10, 0x01, 0x0c, 0x06, 0x24, 0x1b, 0x40, 0x91, 0x4b, 0x7e, 0x4c, 0x01, | 13194 | 0xfe, 0xa4, 0x0e, 0x05, |
13790 | 0x0c, 0x06, 0xfe, 0xf7, 0x00, 0x44, 0x03, 0x68, 0x3b, 0x69, 0xfe, 0x10, 0x58, 0xfe, 0x91, 0x58, | 13195 | 0x29, 0x32, 0x15, 0xfe, 0xe6, 0x00, 0x0f, 0xfe, 0x1c, 0x90, 0x04, 0xfe, |
13791 | 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0x05, 0x5b, 0x01, 0x0c, 0x06, 0x24, 0x1b, 0x40, 0x01, 0x0c, | 13196 | 0x9c, 0x93, 0x3a, 0x0b, |
13792 | 0x06, 0xfe, 0xf7, 0x00, 0x44, 0x78, 0x01, 0xfe, 0x8e, 0x1e, 0x4f, 0x0f, 0xfe, 0x10, 0x90, 0x04, | 13197 | 0x0e, 0x8b, 0x02, 0x1f, 0x7f, 0x01, 0x42, 0x05, 0x35, 0xfe, 0x42, 0x5b, |
13793 | 0xfe, 0x90, 0x93, 0x3a, 0x0b, 0xfe, 0x92, 0x90, 0x04, 0xfe, 0x92, 0x93, 0x79, 0x0b, 0x0e, 0xfe, | 13198 | 0x7d, 0x1d, 0xfe, 0x46, |
13794 | 0xbd, 0x10, 0x01, 0x43, 0x09, 0xbb, 0x1b, 0xfe, 0x6e, 0x0a, 0x15, 0xbb, 0x01, 0x0c, 0x06, 0x0d, | 13199 | 0x59, 0xfe, 0xbf, 0x57, 0xfe, 0x77, 0x57, 0x0f, 0xfe, 0x87, 0x80, 0x04, |
13795 | 0xfe, 0x14, 0x13, 0x03, 0x4b, 0x3b, 0x4c, 0x8e, 0xfe, 0x6e, 0x0a, 0xfe, 0x0c, 0x58, 0xfe, 0x8d, | 13200 | 0xfe, 0x87, 0x83, 0xfe, |
13796 | 0x58, 0x05, 0x5b, 0x26, 0x3e, 0x0f, 0xfe, 0x19, 0x80, 0x04, 0xfe, 0x99, 0x83, 0x33, 0x0b, 0x0e, | 13201 | 0xc9, 0x47, 0x0b, 0x0e, 0xd0, 0x65, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x98, |
13797 | 0xfe, 0xe5, 0x10, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x1a, 0x12, 0xfe, 0x6c, 0x19, 0xfe, 0x19, 0x41, | 13202 | 0x13, 0x0f, 0xfe, 0x20, |
13798 | 0xfe, 0x6b, 0x18, 0xac, 0xfe, 0xd1, 0xf0, 0xef, 0x1f, 0x92, 0x01, 0x42, 0x19, 0xfe, 0x44, 0x00, | 13203 | 0x80, 0x04, 0xfe, 0xa0, 0x83, 0x33, 0x0b, 0x0e, 0x09, 0x1d, 0xfe, 0x84, |
13799 | 0xfe, 0x90, 0x10, 0xfe, 0x6c, 0x19, 0xd9, 0x4b, 0xfe, 0xed, 0x19, 0xda, 0x4c, 0xfe, 0x0c, 0x51, | 13204 | 0x12, 0x01, 0x38, 0x06, |
13800 | 0xfe, 0x8e, 0x51, 0xfe, 0x6b, 0x18, 0x23, 0xfe, 0x00, 0xff, 0x31, 0xfe, 0x76, 0x10, 0xac, 0xfe, | 13205 | 0x07, 0xfe, 0x70, 0x13, 0x03, 0xfe, 0xa2, 0x00, 0x1e, 0x1b, 0xfe, 0xda, |
13801 | 0xd2, 0xf0, 0xfe, 0xba, 0x0c, 0xfe, 0x76, 0x18, 0x23, 0x1d, 0x5d, 0x03, 0xe3, 0x23, 0x07, 0xfe, | 13206 | 0x05, 0xd0, 0x54, 0x01, |
13802 | 0x08, 0x13, 0x19, 0xfe, 0x16, 0x00, 0x05, 0x70, 0xfe, 0xd1, 0xf0, 0xfe, 0xcc, 0x0c, 0x1f, 0x92, | 13207 | 0x38, 0x06, 0x0d, 0xfe, 0x58, 0x13, 0x03, 0xfe, 0xa0, 0x00, 0x1e, 0xfe, |
13803 | 0x01, 0x42, 0x19, 0xfe, 0x17, 0x00, 0x5c, 0xfe, 0xce, 0xf0, 0xfe, 0xd2, 0x0c, 0xfe, 0x3e, 0x10, | 13208 | 0x50, 0x12, 0x5e, 0xff, |
13804 | 0xfe, 0xcd, 0xf0, 0xfe, 0xde, 0x0c, 0x19, 0xfe, 0x22, 0x00, 0x05, 0x70, 0xfe, 0xcb, 0xf0, 0xfe, | 13209 | 0x02, 0x00, 0x10, 0x2f, 0xfe, 0x90, 0x05, 0x2a, 0x3c, 0xcc, 0xff, 0x02, |
13805 | 0xea, 0x0c, 0x19, 0xfe, 0x24, 0x00, 0x05, 0x70, 0xfe, 0xd0, 0xf0, 0xfe, 0xf4, 0x0c, 0x19, 0x94, | 13210 | 0x00, 0x10, 0x2f, 0xfe, |
13806 | 0xfe, 0x1c, 0x10, 0xfe, 0xcf, 0xf0, 0xfe, 0xfe, 0x0c, 0x19, 0x4a, 0xf3, 0xfe, 0xcc, 0xf0, 0xef, | 13211 | 0x9e, 0x05, 0x17, 0xfe, 0xf4, 0x05, 0x15, 0xfe, 0xe3, 0x00, 0x26, 0x01, |
13807 | 0x01, 0x76, 0x06, 0x24, 0x4d, 0x19, 0xfe, 0x12, 0x00, 0x37, 0x13, 0xfe, 0x4e, 0x11, 0x2f, 0xfe, | 13212 | 0x38, 0xfe, 0x4a, 0xf0, |
13808 | 0x16, 0x0d, 0xfe, 0x9e, 0xf0, 0xfe, 0x2a, 0x0d, 0xfe, 0x01, 0x48, 0x1b, 0x3c, 0x37, 0x88, 0xf5, | 13213 | 0xfe, 0xc0, 0x05, 0xfe, 0x49, 0xf0, 0xfe, 0xba, 0x05, 0x71, 0x2e, 0xfe, |
13809 | 0xd4, 0x29, 0xd5, 0x29, 0xd2, 0x29, 0xd3, 0x29, 0x37, 0xfe, 0x9c, 0x32, 0x2f, 0xfe, 0x3e, 0x0d, | 13214 | 0x21, 0x00, 0xf1, 0x2e, |
13810 | 0x2a, 0x3c, 0xae, 0xfe, 0x62, 0x0d, 0xaf, 0xa0, 0xd4, 0x9f, 0xd5, 0x9f, 0xd2, 0x9f, 0xd3, 0x9f, | 13215 | 0xfe, 0x22, 0x00, 0xa2, 0x2e, 0x4a, 0xfe, 0x09, 0x48, 0xff, 0x02, 0x00, |
13811 | 0x05, 0x29, 0x01, 0x41, 0xfe, 0xd3, 0x10, 0x15, 0xfe, 0xe8, 0x00, 0xc4, 0xc5, 0x75, 0xd7, 0x99, | 13216 | 0x10, 0x2f, 0xfe, 0xd0, |
13812 | 0xd8, 0x9c, 0xfe, 0x89, 0xf0, 0x29, 0x27, 0x25, 0xbe, 0xd7, 0x99, 0xd8, 0x9c, 0x2f, 0xfe, 0x8c, | 13217 | 0x05, 0x17, 0xfe, 0xf4, 0x05, 0xfe, 0xe2, 0x08, 0x01, 0x38, 0x06, 0xfe, |
13813 | 0x0d, 0x16, 0x29, 0x27, 0x25, 0xbd, 0xfe, 0x01, 0x48, 0xa4, 0x19, 0xfe, 0x42, 0x00, 0x05, 0x70, | 13218 | 0x1c, 0x00, 0x4d, 0x01, |
13814 | 0x90, 0x07, 0xfe, 0x81, 0x49, 0x1b, 0xfe, 0x64, 0x0e, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x44, 0x13, | 13219 | 0xa7, 0x2e, 0x07, 0x20, 0xe4, 0x47, 0xfe, 0x27, 0x01, 0x01, 0x0c, 0x06, |
13815 | 0x19, 0x00, 0x2d, 0x0d, 0xfe, 0x54, 0x12, 0x2d, 0xfe, 0x28, 0x00, 0x2b, 0xfe, 0xda, 0x0e, 0x0a, | 13220 | 0x28, 0xfe, 0x24, 0x12, |
13816 | 0x57, 0x01, 0x18, 0x09, 0x00, 0x36, 0x46, 0xfe, 0x28, 0x00, 0xfe, 0xfa, 0x10, 0x01, 0xfe, 0xf4, | 13221 | 0x3e, 0x01, 0x84, 0x1f, 0x7f, 0x01, 0x0c, 0x06, 0x07, 0x4d, 0x1f, 0xfe, |
13817 | 0x1c, 0x01, 0xfe, 0x00, 0x1d, 0x0a, 0xba, 0x01, 0xfe, 0x58, 0x10, 0x40, 0x15, 0x56, 0x01, 0x85, | 13222 | 0x0d, 0x00, 0x01, 0x42, |
13818 | 0x05, 0x35, 0x19, 0xfe, 0x44, 0x00, 0x2d, 0x0d, 0xf7, 0x46, 0x0d, 0xfe, 0xcc, 0x10, 0x01, 0xa7, | 13223 | 0x8f, 0xfe, 0xa4, 0x0e, 0x05, 0x29, 0x03, 0xe6, 0x1e, 0xfe, 0xca, 0x13, |
13819 | 0x46, 0x0d, 0xfe, 0xc2, 0x10, 0x01, 0xa7, 0x0f, 0xfe, 0x19, 0x82, 0x04, 0xfe, 0x99, 0x83, 0xfe, | 13224 | 0x03, 0xb6, 0x1e, 0xfe, |
13820 | 0xcc, 0x47, 0x0b, 0x0e, 0xfe, 0x34, 0x46, 0xa5, 0x46, 0x0d, 0x19, 0xfe, 0x43, 0x00, 0xfe, 0xa2, | 13225 | 0x40, 0x12, 0x03, 0x66, 0x1e, 0xfe, 0x38, 0x13, 0x3e, 0x01, 0x84, 0x17, |
13821 | 0x10, 0x01, 0x0c, 0x61, 0x0d, 0x44, 0x01, 0xfe, 0xf4, 0x1c, 0x01, 0xfe, 0x00, 0x1d, 0x40, 0x15, | 13226 | 0xfe, 0x72, 0x06, 0x0a, |
13822 | 0x56, 0x01, 0x85, 0x7d, 0x0d, 0x40, 0x51, 0x01, 0xfe, 0x9e, 0x1e, 0x05, 0xfe, 0x3a, 0x03, 0x01, | 13227 | 0x07, 0x01, 0x38, 0x06, 0x24, 0xfe, 0x02, 0x12, 0x4f, 0x01, 0xfe, 0x56, |
13823 | 0x0c, 0x06, 0x0d, 0x5d, 0x46, 0x0d, 0x19, 0x00, 0xfe, 0x62, 0x10, 0x01, 0x76, 0x06, 0x12, 0xfe, | 13228 | 0x19, 0x16, 0xfe, 0x68, |
13824 | 0x5c, 0x12, 0x01, 0x0c, 0x06, 0x12, 0xfe, 0x52, 0x13, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, | 13229 | 0x06, 0x15, 0x82, 0x01, 0x41, 0x15, 0xe2, 0x03, 0x66, 0x8a, 0x10, 0x66, |
13825 | 0x8e, 0x0e, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x94, 0x0e, 0x01, 0x0c, 0x61, 0x12, 0x44, | 13230 | 0x03, 0x9a, 0x1e, 0xfe, |
13826 | 0xfe, 0x9f, 0x10, 0x19, 0xfe, 0x15, 0x00, 0xfe, 0x04, 0xe6, 0x0d, 0x4f, 0xfe, 0x2e, 0x10, 0x19, | 13231 | 0x70, 0x12, 0x03, 0x55, 0x1e, 0xfe, 0x68, 0x13, 0x01, 0xc6, 0x09, 0x12, |
13827 | 0xfe, 0x13, 0x00, 0xfe, 0x10, 0x10, 0x19, 0xfe, 0x47, 0x00, 0xf1, 0x19, 0xfe, 0x41, 0x00, 0xa2, | 13232 | 0x48, 0xfe, 0x92, 0x06, |
13828 | 0x19, 0xfe, 0x24, 0x00, 0x86, 0xc4, 0xc5, 0x75, 0x03, 0x81, 0x1e, 0x2b, 0xea, 0x4f, 0xfe, 0x04, | 13233 | 0x2e, 0x12, 0x01, 0xfe, 0xac, 0x1d, 0xfe, 0x43, 0x48, 0x62, 0x80, 0x13, |
13829 | 0xe6, 0x12, 0xfe, 0x9d, 0x41, 0xfe, 0x1c, 0x42, 0x40, 0x01, 0xf4, 0x05, 0x35, 0xfe, 0x12, 0x1c, | 13234 | 0x58, 0xff, 0x02, 0x00, |
13830 | 0x1f, 0x0d, 0x47, 0xb5, 0xc3, 0x1f, 0xfe, 0x31, 0x00, 0x47, 0xb8, 0x01, 0xfe, 0xd4, 0x11, 0x05, | 13235 | 0x57, 0x52, 0xad, 0x23, 0x3f, 0x4e, 0x62, 0x49, 0x3e, 0x01, 0x84, 0x17, |
13831 | 0xe9, 0x51, 0xfe, 0x06, 0xec, 0xe0, 0xfe, 0x0e, 0x47, 0x46, 0x28, 0xfe, 0xce, 0x45, 0x31, 0x51, | 13236 | 0xfe, 0xea, 0x06, 0x01, |
13832 | 0xfe, 0x06, 0xea, 0xe0, 0xfe, 0x47, 0x4b, 0x45, 0xfe, 0x75, 0x57, 0x03, 0x67, 0xfe, 0x98, 0x56, | 13237 | 0x38, 0x06, 0x12, 0xf7, 0x45, 0x0a, 0x95, 0x01, 0xfe, 0x84, 0x19, 0x16, |
13833 | 0xfe, 0x38, 0x12, 0x0a, 0x5a, 0x01, 0x18, 0xfe, 0x44, 0x48, 0x60, 0x01, 0x0c, 0x06, 0x28, 0xfe, | 13238 | 0xfe, 0xe0, 0x06, 0x15, |
13834 | 0x18, 0x13, 0x0a, 0x57, 0x01, 0x18, 0x3e, 0xfe, 0x41, 0x58, 0x0a, 0xba, 0xfe, 0xfa, 0x14, 0xfe, | 13239 | 0x82, 0x01, 0x41, 0x15, 0xe2, 0x03, 0x55, 0x8a, 0x10, 0x55, 0x1c, 0x07, |
13835 | 0x49, 0x54, 0xb0, 0xfe, 0x5e, 0x0f, 0x05, 0xfe, 0x3a, 0x03, 0x0a, 0x67, 0xfe, 0xe0, 0x14, 0xfe, | 13240 | 0x01, 0x84, 0xfe, 0xae, |
13836 | 0x0e, 0x47, 0x46, 0x28, 0xfe, 0xce, 0x45, 0x31, 0x51, 0xfe, 0xce, 0x47, 0xfe, 0xad, 0x13, 0x05, | 13241 | 0x10, 0x03, 0x6f, 0x1e, 0xfe, 0x9e, 0x13, 0x3e, 0x01, 0x84, 0x03, 0x9a, |
13837 | 0x35, 0x21, 0x2c, 0x09, 0x1a, 0xfe, 0x98, 0x12, 0x26, 0x20, 0x96, 0x20, 0xe7, 0xfe, 0x08, 0x1c, | 13242 | 0x1e, 0xfe, 0x1a, 0x12, |
13838 | 0xfe, 0x7c, 0x19, 0xfe, 0xfd, 0x19, 0xfe, 0x0a, 0x1c, 0x03, 0xe5, 0xfe, 0x48, 0x55, 0xa5, 0x3b, | 13243 | 0x01, 0x38, 0x06, 0x12, 0xfc, 0x01, 0xc6, 0x01, 0xfe, 0xac, 0x1d, 0xfe, |
13839 | 0xfe, 0x62, 0x01, 0xfe, 0xc9, 0x55, 0x31, 0xfe, 0x74, 0x10, 0x01, 0xfe, 0xf0, 0x1a, 0x03, 0xfe, | 13244 | 0x43, 0x48, 0x62, 0x80, |
13840 | 0x38, 0x01, 0x3b, 0xfe, 0x3a, 0x01, 0x8e, 0xfe, 0x1e, 0x10, 0xfe, 0x02, 0xec, 0xe7, 0x53, 0x00, | 13245 | 0xf0, 0x45, 0x0a, 0x95, 0x03, 0xb6, 0x1e, 0xf8, 0x01, 0x38, 0x06, 0x24, |
13841 | 0x36, 0xfe, 0x04, 0xec, 0x2c, 0x60, 0xfe, 0x05, 0xf6, 0xfe, 0x34, 0x01, 0x01, 0xfe, 0x62, 0x1b, | 13246 | 0x36, 0xfe, 0x02, 0xf6, |
13842 | 0x01, 0xfe, 0xce, 0x1e, 0xb2, 0x11, 0xfe, 0x18, 0x13, 0xca, 0xfe, 0x02, 0xea, 0xe7, 0x53, 0x92, | 13247 | 0x07, 0x71, 0x78, 0x8c, 0x00, 0x4d, 0x62, 0x49, 0x3e, 0x2d, 0x93, 0x4e, |
13843 | 0xfe, 0xc3, 0x13, 0x1f, 0x12, 0x47, 0xb5, 0xc3, 0xfe, 0x2a, 0x10, 0x03, 0xfe, 0x38, 0x01, 0x23, | 13248 | 0xd0, 0x0d, 0x17, 0xfe, |
13844 | 0xfe, 0xf0, 0xff, 0x10, 0xe5, 0x03, 0xfe, 0x3a, 0x01, 0x10, 0xfe, 0x62, 0x01, 0x01, 0xfe, 0x1e, | 13249 | 0x9a, 0x07, 0x01, 0xfe, 0xc0, 0x19, 0x16, 0xfe, 0x90, 0x07, 0x26, 0x20, |
13845 | 0x1e, 0x20, 0x2c, 0x15, 0x56, 0x01, 0xfe, 0x9e, 0x1e, 0x13, 0x07, 0x02, 0x26, 0x02, 0x21, 0x96, | 13250 | 0x9e, 0x15, 0x82, 0x01, |
13846 | 0xc7, 0x20, 0x96, 0x09, 0x92, 0xfe, 0x79, 0x13, 0x1f, 0x1d, 0x47, 0xb5, 0xc3, 0xfe, 0xe1, 0x10, | 13251 | 0x41, 0x15, 0xe2, 0x21, 0x9e, 0x09, 0x07, 0xfb, 0x03, 0xe6, 0xfe, 0x58, |
13847 | 0xcf, 0xfe, 0x03, 0xdc, 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x02, 0xcf, 0xfe, 0x03, 0xdc, 0xfe, | 13252 | 0x57, 0x10, 0xe6, 0x05, |
13848 | 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x02, 0xfe, 0x03, 0x57, 0xcf, 0x26, 0xfe, 0x00, 0xcc, 0x02, 0xfe, | 13253 | 0xfe, 0x2a, 0x06, 0x03, 0x6f, 0x8a, 0x10, 0x6f, 0x1c, 0x07, 0x01, 0x84, |
13849 | 0x03, 0x57, 0xcf, 0x89, 0x02, 0x01, 0x0c, 0x06, 0x4a, 0xfe, 0x4e, 0x13, 0x0f, 0xfe, 0x1c, 0x80, | 13254 | 0xfe, 0x9c, 0x32, 0x5f, |
13850 | 0x04, 0xfe, 0x9c, 0x83, 0x33, 0x0b, 0x0e, 0x09, 0x07, 0xfe, 0x3a, 0x13, 0x0f, 0xfe, 0x1e, 0x80, | 13255 | 0x75, 0x01, 0xa6, 0x86, 0x15, 0xfe, 0xe2, 0x00, 0x2f, 0xed, 0x2a, 0x3c, |
13851 | 0x04, 0xfe, 0x9e, 0x83, 0x33, 0x0b, 0x0e, 0xfe, 0x2a, 0x13, 0x0f, 0xfe, 0x1d, 0x80, 0x04, 0xfe, | 13256 | 0xfe, 0x0a, 0xf0, 0xfe, |
13852 | 0x9d, 0x83, 0xfe, 0xf9, 0x13, 0x0e, 0xfe, 0x1c, 0x13, 0x01, 0xfe, 0xee, 0x1e, 0xac, 0xfe, 0x14, | 13257 | 0xce, 0x07, 0xae, 0xfe, 0x96, 0x08, 0xfe, 0x06, 0xf0, 0xfe, 0x9e, 0x08, |
13853 | 0x13, 0x01, 0xfe, 0xfe, 0x1e, 0xfe, 0x81, 0x58, 0xfa, 0x01, 0xfe, 0x0e, 0x1f, 0xfe, 0x30, 0xf4, | 13258 | 0xaf, 0xa0, 0x05, 0x29, |
13854 | 0x0d, 0xfe, 0x3c, 0x50, 0xa2, 0x01, 0xfe, 0x92, 0x1b, 0x01, 0x43, 0x09, 0x56, 0xfb, 0x01, 0xfe, | 13259 | 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x2e, 0x12, 0x14, 0x1d, 0x01, 0x08, 0x14, |
13855 | 0xc8, 0x1a, 0x01, 0x0c, 0x06, 0x28, 0xa4, 0x01, 0xfe, 0xf4, 0x1c, 0x01, 0xfe, 0x00, 0x1d, 0x15, | 13260 | 0x00, 0x01, 0x08, 0x14, |
13856 | 0xfe, 0xe9, 0x00, 0x01, 0x0c, 0x06, 0x4a, 0xfe, 0x4e, 0x13, 0x01, 0xfe, 0x22, 0x1b, 0xfe, 0x1e, | 13261 | 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0xfe, 0x99, 0xa4, 0x01, 0x08, |
13857 | 0x1c, 0x0f, 0xfe, 0x14, 0x90, 0x04, 0xfe, 0x94, 0x93, 0x3a, 0x0b, 0xfe, 0x96, 0x90, 0x04, 0xfe, | 13262 | 0x14, 0x00, 0x05, 0xfe, |
13858 | 0x96, 0x93, 0x79, 0x0b, 0x0e, 0x10, 0xfe, 0x64, 0x01, 0x22, 0xfe, 0x66, 0x01, 0x01, 0x0c, 0x06, | 13263 | 0xc6, 0x09, 0x01, 0x76, 0x06, 0x12, 0xfe, 0x3a, 0x12, 0x01, 0x0c, 0x06, |
13859 | 0x65, 0xf9, 0x0f, 0xfe, 0x03, 0x80, 0x04, 0xfe, 0x83, 0x83, 0x33, 0x0b, 0x0e, 0x77, 0xfe, 0x01, | 13264 | 0x12, 0xfe, 0x30, 0x13, |
13860 | 0xec, 0x2c, 0xfe, 0x80, 0x40, 0x20, 0x2c, 0x7a, 0x30, 0x15, 0xdf, 0x40, 0x21, 0x2c, 0xfe, 0x00, | 13265 | 0x14, 0xfe, 0x1b, 0x00, 0x01, 0x08, 0x14, 0x00, 0x01, 0x08, 0x14, 0x00, |
13861 | 0x40, 0x8d, 0x2c, 0x02, 0xfe, 0x08, 0x1c, 0x03, 0xfe, 0xac, 0x00, 0xfe, 0x06, 0x58, 0x03, 0xfe, | 13266 | 0x01, 0x08, 0x14, 0x00, |
13862 | 0xae, 0x00, 0xfe, 0x07, 0x58, 0x03, 0xfe, 0xb0, 0x00, 0xfe, 0x08, 0x58, 0x03, 0xfe, 0xb2, 0x00, | 13267 | 0x01, 0x08, 0x14, 0x07, 0x01, 0x08, 0x14, 0x00, 0x05, 0xef, 0x7c, 0x4a, |
13863 | 0xfe, 0x09, 0x58, 0xfe, 0x0a, 0x1c, 0x2e, 0x49, 0x20, 0xe0, 0x26, 0x10, 0x66, 0x10, 0x55, 0x10, | 13268 | 0x78, 0x4f, 0x0f, 0xfe, |
13864 | 0x6f, 0x13, 0x57, 0x52, 0x4f, 0x1c, 0x28, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x2b, 0xfe, 0x88, | 13269 | 0x9a, 0x81, 0x04, 0xfe, 0x9a, 0x83, 0xfe, 0xcb, 0x47, 0x0b, 0x0e, 0x2d, |
13865 | 0x11, 0x46, 0x1a, 0x13, 0x5a, 0x52, 0x1c, 0x4a, 0xfe, 0x90, 0x4d, 0xfe, 0x91, 0x54, 0x2b, 0xfe, | 13270 | 0x28, 0x48, 0xfe, 0x6c, |
13866 | 0x9e, 0x11, 0x2e, 0x1a, 0x20, 0x2c, 0x90, 0x34, 0x60, 0x21, 0x2c, 0xfe, 0x00, 0x40, 0x8d, 0x2c, | 13271 | 0x08, 0x0a, 0x28, 0xfe, 0x09, 0x6f, 0xca, 0xfe, 0xca, 0x45, 0xfe, 0x32, |
13867 | 0x15, 0xdf, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0xb2, 0x11, 0xfe, 0x12, 0x1c, 0x75, 0xfe, | 13272 | 0x12, 0x53, 0x63, 0x4e, |
13868 | 0x14, 0x1c, 0xfe, 0x10, 0x1c, 0xfe, 0x18, 0x1c, 0x02, 0x51, 0xfe, 0x0c, 0x14, 0xfe, 0x0e, 0x47, | 13273 | 0x7c, 0x97, 0x2f, 0xfe, 0x7e, 0x08, 0x2a, 0x3c, 0xfe, 0x0a, 0xf0, 0xfe, |
13869 | 0xfe, 0x07, 0xe6, 0x28, 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x02, 0x01, 0xa7, 0x90, 0x34, 0x60, | 13274 | 0x6c, 0x08, 0xaf, 0xa0, |
13870 | 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x42, 0x13, 0xfe, 0x02, 0x80, 0x09, 0x56, 0xfe, 0x34, | 13275 | 0xae, 0xfe, 0x96, 0x08, 0x05, 0x29, 0x01, 0x41, 0x05, 0xed, 0x14, 0x24, |
13871 | 0x13, 0x0a, 0x5a, 0x01, 0x18, 0xcb, 0xfe, 0x36, 0x12, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01, | 13276 | 0x05, 0xed, 0xfe, 0x9c, |
13872 | 0xfe, 0xb2, 0x16, 0xfe, 0x00, 0xcc, 0xcb, 0xfe, 0xf3, 0x13, 0x3f, 0x89, 0x09, 0x1a, 0xa5, 0x0a, | 13277 | 0xf7, 0x9f, 0x01, 0xfe, 0xae, 0x1e, 0xfe, 0x18, 0x58, 0x01, 0xfe, 0xbe, |
13873 | 0x9d, 0x01, 0x18, 0xfe, 0x80, 0x5c, 0x01, 0x85, 0xf2, 0x09, 0x9b, 0xa4, 0xfe, 0x14, 0x56, 0xfe, | 13278 | 0x1e, 0xfe, 0x99, 0x58, |
13874 | 0xd6, 0xf0, 0xfe, 0xec, 0x11, 0x02, 0xfe, 0x44, 0x58, 0x77, 0xfe, 0x01, 0xec, 0xb8, 0xfe, 0x9e, | 13279 | 0xfe, 0x78, 0x18, 0xfe, 0xf9, 0x18, 0x8e, 0xfe, 0x16, 0x09, 0x10, 0x6a, |
13875 | 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x12, 0x8d, 0x30, 0x01, 0xf4, 0xfe, 0xdd, 0x10, | 13280 | 0x22, 0x6b, 0x01, 0x0c, |
13876 | 0x37, 0xd7, 0x99, 0xd8, 0x9c, 0x27, 0x25, 0xee, 0x09, 0x12, 0xfe, 0x48, 0x12, 0x09, 0x0d, 0xfe, | 13281 | 0x61, 0x54, 0x44, 0x21, 0x2c, 0x09, 0x1a, 0xf8, 0x77, 0x01, 0xfe, 0x7e, |
13877 | 0x56, 0x12, 0x09, 0x1d, 0xfe, 0x30, 0x12, 0x09, 0xdd, 0x1b, 0xfe, 0xc4, 0x13, 0x09, 0xfe, 0x23, | 13282 | 0x1e, 0x47, 0x2c, 0x7a, |
13878 | 0x00, 0x1b, 0xfe, 0xd0, 0x13, 0x09, 0x07, 0x1b, 0xfe, 0x34, 0x14, 0x09, 0x24, 0xfe, 0x12, 0x12, | 13283 | 0x30, 0xf0, 0xfe, 0x83, 0xe7, 0xfe, 0x3f, 0x00, 0x71, 0xfe, 0x03, 0x40, |
13879 | 0x09, 0x00, 0x1b, 0x29, 0x1f, 0xdd, 0x01, 0x42, 0xa1, 0x32, 0x01, 0x08, 0xae, 0x41, 0x02, 0x32, | 13284 | 0x01, 0x0c, 0x61, 0x65, |
13880 | 0xfe, 0x62, 0x08, 0x0a, 0xe1, 0x01, 0xfe, 0x58, 0x10, 0x15, 0x9b, 0x05, 0x35, 0x32, 0x01, 0x43, | 13285 | 0x44, 0x01, 0xc2, 0xc8, 0xfe, 0x1f, 0x40, 0x20, 0x6e, 0x01, 0xfe, 0x6a, |
13881 | 0x09, 0xbb, 0xfe, 0xd7, 0x13, 0x91, 0x4b, 0x7e, 0x4c, 0x8e, 0xfe, 0x80, 0x13, 0x01, 0x0c, 0x06, | 13286 | 0x16, 0xfe, 0x08, 0x50, |
13882 | 0x54, 0xfe, 0x72, 0x12, 0xdb, 0x64, 0xdc, 0x34, 0xfe, 0x44, 0x55, 0xfe, 0xe5, 0x55, 0xb0, 0xfe, | 13287 | 0xfe, 0x8a, 0x50, 0xfe, 0x44, 0x51, 0xfe, 0xc6, 0x51, 0xfe, 0x10, 0x10, |
13883 | 0x4a, 0x13, 0x21, 0x6e, 0xfe, 0x26, 0x13, 0x03, 0x97, 0x3b, 0x98, 0x8e, 0xfe, 0xb6, 0x0e, 0x10, | 13288 | 0x01, 0xfe, 0xce, 0x1e, |
13884 | 0x6a, 0x22, 0x6b, 0x26, 0x10, 0x97, 0x10, 0x98, 0x01, 0xc2, 0x2e, 0x49, 0x88, 0x20, 0x6e, 0x01, | 13289 | 0x01, 0xfe, 0xde, 0x1e, 0x10, 0x68, 0x22, 0x69, 0x01, 0xfe, 0xee, 0x1e, |
13885 | 0xfe, 0x6a, 0x16, 0xdb, 0x64, 0xdc, 0x34, 0xfe, 0x04, 0x55, 0xfe, 0xa5, 0x55, 0xfe, 0x04, 0xfa, | 13290 | 0x01, 0xfe, 0xfe, 0x1e, |
13886 | 0x64, 0xfe, 0x05, 0xfa, 0x34, 0xfe, 0x8f, 0x10, 0x03, 0x6c, 0x3b, 0x6d, 0xfe, 0x40, 0x56, 0xfe, | 13291 | 0xfe, 0x40, 0x50, 0xfe, 0xc2, 0x50, 0x10, 0x4b, 0x22, 0x4c, 0xfe, 0x8a, |
13887 | 0xe1, 0x56, 0x10, 0x6c, 0x22, 0x6d, 0x71, 0xdb, 0x64, 0xdc, 0x34, 0xfe, 0x44, 0x55, 0xfe, 0xe5, | 13292 | 0x10, 0x01, 0x0c, 0x06, |
13888 | 0x55, 0x03, 0x68, 0x3b, 0x69, 0xfe, 0x00, 0x56, 0xfe, 0xa1, 0x56, 0x10, 0x68, 0x22, 0x69, 0x01, | 13293 | 0x54, 0xfe, 0x50, 0x12, 0x01, 0xfe, 0xae, 0x1e, 0x01, 0xfe, 0xbe, 0x1e, |
13889 | 0x0c, 0x06, 0x54, 0xf9, 0x21, 0x6e, 0xfe, 0x1f, 0x40, 0x03, 0x6a, 0x3b, 0x6b, 0xfe, 0x2c, 0x50, | 13294 | 0x10, 0x6a, 0x22, 0x6b, |
13890 | 0xfe, 0xae, 0x50, 0x03, 0x6c, 0x3b, 0x6d, 0xfe, 0x44, 0x50, 0xfe, 0xc6, 0x50, 0x03, 0x68, 0x3b, | 13295 | 0x01, 0x0c, 0x06, 0x65, 0x4e, 0x01, 0xc2, 0x0f, 0xfe, 0x1f, 0x80, 0x04, |
13891 | 0x69, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0x03, 0x4b, 0x3b, 0x4c, 0xfe, 0x40, 0x50, 0xfe, 0xc2, | 13296 | 0xfe, 0x9f, 0x83, 0x33, |
13892 | 0x50, 0x05, 0x73, 0x2e, 0x07, 0x20, 0x9e, 0x05, 0x72, 0x32, 0x01, 0x08, 0x16, 0x3d, 0x27, 0x25, | 13297 | 0x0b, 0x0e, 0x20, 0x6e, 0x0f, 0xfe, 0x44, 0x90, 0x04, 0xfe, 0xc4, 0x93, |
13893 | 0xee, 0x09, 0x07, 0x2b, 0x3d, 0x01, 0x43, 0x09, 0xbb, 0x2b, 0x72, 0x01, 0xa6, 0x23, 0x3f, 0x1b, | 13298 | 0x3a, 0x0b, 0xfe, 0xc6, |
13894 | 0x3d, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x1e, 0x13, 0x91, 0x4b, 0x7e, 0x4c, 0xfe, 0x0a, 0x55, 0x31, | 13299 | 0x90, 0x04, 0xfe, 0xc6, 0x93, 0x79, 0x0b, 0x0e, 0x10, 0x6c, 0x22, 0x6d, |
13895 | 0xfe, 0x8b, 0x55, 0xd9, 0x4b, 0xda, 0x4c, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, 0x51, 0x05, 0x72, 0x01, | 13300 | 0x01, 0xfe, 0xce, 0x1e, |
13896 | 0xfe, 0x8e, 0x1e, 0xca, 0xfe, 0x19, 0x41, 0x05, 0x72, 0x32, 0x01, 0x08, 0x2a, 0x3c, 0x16, 0xc0, | 13301 | 0x01, 0xfe, 0xde, 0x1e, 0x10, 0x68, 0x22, 0x69, 0x0f, 0xfe, 0x40, 0x90, |
13897 | 0x27, 0x25, 0xbe, 0x2d, 0x1d, 0xc0, 0x2d, 0x0d, 0x83, 0x2d, 0x7f, 0x1b, 0xfe, 0x66, 0x15, 0x05, | 13302 | 0x04, 0xfe, 0xc0, 0x93, |
13898 | 0x3d, 0x01, 0x08, 0x2a, 0x3c, 0x16, 0xc0, 0x27, 0x25, 0xbd, 0x09, 0x1d, 0x2b, 0x3d, 0x01, 0x08, | 13303 | 0x3a, 0x0b, 0xfe, 0xc2, 0x90, 0x04, 0xfe, 0xc2, 0x93, 0x79, 0x0b, 0x0e, |
13899 | 0x16, 0xc0, 0x27, 0x25, 0xfe, 0xe8, 0x09, 0xfe, 0xc2, 0x49, 0x50, 0x03, 0xb6, 0x1e, 0x83, 0x01, | 13304 | 0x10, 0x4b, 0x22, 0x4c, |
13900 | 0x38, 0x06, 0x24, 0x31, 0xa1, 0xfe, 0xbb, 0x45, 0x2d, 0x00, 0xa4, 0x46, 0x07, 0x90, 0x3f, 0x01, | 13305 | 0x10, 0x64, 0x22, 0x34, 0x01, 0x0c, 0x61, 0x24, 0x44, 0x37, 0x13, 0xfe, |
13901 | 0xfe, 0xf8, 0x15, 0x01, 0xa6, 0x86, 0xfe, 0x4b, 0x45, 0xfe, 0x20, 0x13, 0x01, 0x43, 0x09, 0x82, | 13306 | 0x4e, 0x11, 0x2f, 0xfe, |
13902 | 0xfe, 0x16, 0x13, 0x03, 0x9a, 0x1e, 0x5d, 0x03, 0x55, 0x1e, 0x31, 0x5e, 0x05, 0x72, 0xfe, 0xc0, | 13307 | 0xde, 0x09, 0xfe, 0x9e, 0xf0, 0xfe, 0xf2, 0x09, 0xfe, 0x01, 0x48, 0x1b, |
13903 | 0x5d, 0x01, 0xa7, 0xfe, 0x03, 0x17, 0x03, 0x66, 0x8a, 0x10, 0x66, 0x5e, 0x32, 0x01, 0x08, 0x17, | 13308 | 0x3c, 0x37, 0x88, 0xf5, |
13904 | 0x73, 0x01, 0xfe, 0x56, 0x19, 0x05, 0x73, 0x01, 0x08, 0x2a, 0x3c, 0x16, 0x3d, 0x27, 0x25, 0xbd, | 13309 | 0xd4, 0xfe, 0x1e, 0x0a, 0xd5, 0xfe, 0x42, 0x0a, 0xd2, 0xfe, 0x1e, 0x0a, |
13905 | 0x09, 0x07, 0x2b, 0x3d, 0x01, 0xfe, 0xbe, 0x16, 0xfe, 0x42, 0x58, 0xfe, 0xe8, 0x14, 0x01, 0xa6, | 13310 | 0xd3, 0xfe, 0x42, 0x0a, |
13906 | 0x86, 0xfe, 0x4a, 0xf4, 0x0d, 0x1b, 0x3d, 0xfe, 0x4a, 0xf4, 0x07, 0xfe, 0x0e, 0x12, 0x01, 0x43, | 13311 | 0xae, 0xfe, 0x12, 0x0a, 0xfe, 0x06, 0xf0, 0xfe, 0x18, 0x0a, 0xaf, 0xa0, |
13907 | 0x09, 0x82, 0x4e, 0x05, 0x72, 0x03, 0x55, 0x8a, 0x10, 0x55, 0x5e, 0x32, 0x01, 0x08, 0x17, 0x73, | 13312 | 0x05, 0x29, 0x01, 0x41, |
13908 | 0x01, 0xfe, 0x84, 0x19, 0x05, 0x73, 0x01, 0x08, 0x2a, 0x3c, 0x16, 0x3d, 0x27, 0x25, 0xbd, 0x09, | 13313 | 0xfe, 0xc1, 0x10, 0x14, 0x24, 0xfe, 0xc1, 0x10, 0x01, 0x76, 0x06, 0x07, |
13909 | 0x12, 0x2b, 0x3d, 0x01, 0xfe, 0xe8, 0x17, 0x8b, 0xfe, 0xaa, 0x14, 0xfe, 0xb6, 0x14, 0x86, 0xa8, | 13314 | 0xfe, 0x14, 0x12, 0x01, |
13910 | 0xb2, 0x0d, 0x1b, 0x3d, 0xb2, 0x07, 0xfe, 0x0e, 0x12, 0x01, 0x43, 0x09, 0x82, 0x4e, 0x05, 0x72, | 13315 | 0x76, 0x06, 0x0d, 0x5d, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x74, 0x12, 0xfe, |
13911 | 0x03, 0x6f, 0x8a, 0x10, 0x6f, 0x5e, 0x32, 0x01, 0x08, 0x17, 0x73, 0x01, 0xfe, 0xc0, 0x19, 0x05, | 13316 | 0x2e, 0x1c, 0x05, 0xfe, |
13912 | 0x73, 0x13, 0x07, 0x2f, 0xfe, 0xcc, 0x15, 0x17, 0xfe, 0xe2, 0x15, 0x5f, 0xcc, 0x01, 0x08, 0x26, | 13317 | 0x1a, 0x0c, 0x01, 0x76, 0x06, 0x07, 0x5d, 0x01, 0x76, 0x06, 0x0d, 0x41, |
13913 | 0x5f, 0x02, 0x8f, 0xfe, 0xde, 0x15, 0x2a, 0xfe, 0xde, 0x15, 0x16, 0xfe, 0xcc, 0x15, 0x5e, 0x32, | 13318 | 0xfe, 0x2c, 0x1c, 0xfe, |
13914 | 0x01, 0x08, 0xfe, 0xd5, 0x10, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, 0xad, 0x23, 0xfe, 0xff, | 13319 | 0xaa, 0xf0, 0xfe, 0xce, 0x0a, 0xfe, 0xac, 0xf0, 0xfe, 0x66, 0x0a, 0xfe, |
13915 | 0x7f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x02, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, 0xad, | 13320 | 0x92, 0x10, 0xc4, 0xf6, |
13916 | 0x23, 0x3f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x02, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, | 13321 | 0xfe, 0xad, 0xf0, 0xfe, 0x72, 0x0a, 0x05, 0xfe, 0x1a, 0x0c, 0xc5, 0xfe, |
13917 | 0xad, 0x02, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, 0xfe, 0x00, 0x5e, 0x02, 0x13, 0x58, 0xff, | 13322 | 0xe7, 0x10, 0xfe, 0x2b, |
13918 | 0x02, 0x00, 0x57, 0x52, 0xad, 0xfe, 0x0b, 0x58, 0x02, 0x0a, 0x66, 0x01, 0x5c, 0x0a, 0x55, 0x01, | 13323 | 0xf0, 0xbf, 0xfe, 0x6b, 0x18, 0x23, 0xfe, 0x00, 0xfe, 0xfe, 0x1c, 0x12, |
13919 | 0x5c, 0x0a, 0x6f, 0x01, 0x5c, 0x02, 0x01, 0xfe, 0x1e, 0x1f, 0x23, 0x1a, 0xff, 0x03, 0x00, 0x54, | 13324 | 0xac, 0xfe, 0xd2, 0xf0, |
13920 | 0xfe, 0x00, 0xf4, 0x24, 0x52, 0x0f, 0xfe, 0x00, 0x7c, 0x04, 0xfe, 0x07, 0x7c, 0x3a, 0x0b, 0x0e, | 13325 | 0xbf, 0xfe, 0x76, 0x18, 0x23, 0x1d, 0x1b, 0xbf, 0x03, 0xe3, 0x23, 0x07, |
13921 | 0xfe, 0x00, 0x71, 0xfe, 0xf9, 0x18, 0xfe, 0x7a, 0x19, 0xfe, 0xfb, 0x19, 0xfe, 0x1a, 0xf7, 0x00, | 13326 | 0x1b, 0xbf, 0xd4, 0x5b, |
13922 | 0xfe, 0x1b, 0xf7, 0x00, 0x7a, 0x30, 0x10, 0x68, 0x22, 0x69, 0xd9, 0x6c, 0xda, 0x6d, 0x02, 0xfe, | 13327 | 0xd5, 0x5b, 0xd2, 0x5b, 0xd3, 0x5b, 0xc4, 0xc5, 0xfe, 0xa9, 0x10, 0x75, |
13923 | 0x62, 0x08, 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x77, 0x02, 0x01, 0xc6, 0xfe, | 13328 | 0x5e, 0x32, 0x1f, 0x7f, |
13924 | 0x42, 0x48, 0x4f, 0x50, 0x45, 0x01, 0x08, 0x16, 0xfe, 0xe0, 0x17, 0x27, 0x25, 0xbe, 0x01, 0x08, | 13329 | 0x01, 0x42, 0x19, 0xfe, 0x35, 0x00, 0xfe, 0x01, 0xf0, 0x70, 0x19, 0x98, |
13925 | 0x16, 0xfe, 0xe0, 0x17, 0x27, 0x25, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, 0x03, 0x9a, 0x1e, 0xfe, | 13330 | 0x05, 0x70, 0xfe, 0x74, |
13926 | 0xda, 0x12, 0x01, 0x38, 0x06, 0x12, 0xfe, 0xd0, 0x13, 0x26, 0x53, 0x12, 0x48, 0xfe, 0x08, 0x17, | 13331 | 0x18, 0x23, 0xfe, 0x00, 0xf8, 0x1b, 0x5b, 0x7d, 0x12, 0x01, 0xfe, 0x78, |
13927 | 0xd1, 0x12, 0x53, 0x12, 0xfe, 0x1e, 0x13, 0x2d, 0xb4, 0x7b, 0xfe, 0x26, 0x17, 0x4d, 0x13, 0x07, | 13332 | 0x0f, 0x4d, 0x01, 0xfe, |
13928 | 0x1c, 0xb4, 0x90, 0x04, 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, 0xf1, 0xff, 0x02, 0x83, 0x55, | 13333 | 0x96, 0x1a, 0x21, 0x30, 0x77, 0x7d, 0x1d, 0x05, 0x5b, 0x01, 0x0c, 0x06, |
13929 | 0x53, 0x1d, 0xfe, 0x12, 0x13, 0xd6, 0xfe, 0x30, 0x00, 0xb0, 0xfe, 0x80, 0x17, 0x1c, 0x63, 0x13, | 13334 | 0x0d, 0x2b, 0xfe, 0xe2, |
13930 | 0x07, 0xfe, 0x56, 0x10, 0x53, 0x0d, 0xfe, 0x16, 0x13, 0xd6, 0xfe, 0x64, 0x00, 0xb0, 0xfe, 0x80, | 13335 | 0x0b, 0x01, 0x0c, 0x06, 0x54, 0xfe, 0xa6, 0x12, 0x01, 0x0c, 0x06, 0x24, |
13931 | 0x17, 0x0a, 0xfe, 0x64, 0x00, 0x1c, 0x94, 0x13, 0x07, 0xfe, 0x28, 0x10, 0x53, 0x07, 0xfe, 0x60, | 13336 | 0xfe, 0x88, 0x13, 0x21, |
13932 | 0x13, 0xd6, 0xfe, 0xc8, 0x00, 0xb0, 0xfe, 0x80, 0x17, 0x0a, 0xfe, 0xc8, 0x00, 0x1c, 0x95, 0x13, | 13337 | 0x6e, 0xc7, 0x01, 0xfe, 0x1e, 0x1f, 0x0f, 0xfe, 0x83, 0x80, 0x04, 0xfe, |
13933 | 0x07, 0x71, 0xd6, 0xfe, 0x90, 0x01, 0x48, 0xfe, 0x8c, 0x17, 0x45, 0xf3, 0xfe, 0x43, 0xf4, 0x96, | 13338 | 0x83, 0x83, 0xfe, 0xc9, |
13934 | 0xfe, 0x56, 0xf0, 0xfe, 0x9e, 0x17, 0xfe, 0x04, 0xf4, 0x58, 0xfe, 0x43, 0xf4, 0x94, 0xf6, 0x8b, | 13339 | 0x47, 0x0b, 0x0e, 0xfe, 0xc8, 0x44, 0xfe, 0x42, 0x13, 0x0f, 0xfe, 0x04, |
13935 | 0x01, 0xfe, 0x24, 0x16, 0x23, 0x3f, 0xfc, 0xa8, 0x8c, 0x49, 0x48, 0xfe, 0xda, 0x17, 0x62, 0x49, | 13340 | 0x91, 0x04, 0xfe, 0x84, |
13936 | 0xfe, 0x1c, 0x10, 0xa8, 0x8c, 0x80, 0x48, 0xfe, 0xda, 0x17, 0x62, 0x80, 0x71, 0x50, 0x26, 0xfe, | 13341 | 0x93, 0xfe, 0xca, 0x57, 0x0b, 0xfe, 0x86, 0x91, 0x04, 0xfe, 0x86, 0x93, |
13937 | 0x4d, 0xf4, 0x00, 0xf7, 0x45, 0x13, 0x07, 0xfe, 0xb4, 0x56, 0xfe, 0xc3, 0x58, 0x02, 0x50, 0x13, | 13342 | 0xfe, 0xcb, 0x57, 0x0b, |
13938 | 0x0d, 0x02, 0x50, 0x3e, 0x78, 0x4f, 0x45, 0x01, 0x08, 0x16, 0xa9, 0x27, 0x25, 0xbe, 0xfe, 0x03, | 13343 | 0x0e, 0x7a, 0x30, 0xfe, 0x40, 0x59, 0xfe, 0xc1, 0x59, 0x8e, 0x40, 0x03, |
13939 | 0xea, 0xfe, 0x7e, 0x01, 0x01, 0x08, 0x16, 0xa9, 0x27, 0x25, 0xfe, 0xe9, 0x0a, 0x01, 0x08, 0x16, | 13344 | 0x6a, 0x3b, 0x6b, 0x10, |
13940 | 0xa9, 0x27, 0x25, 0xfe, 0xe9, 0x0a, 0xfe, 0x05, 0xea, 0xfe, 0x7f, 0x01, 0x01, 0x08, 0x16, 0xa9, | 13345 | 0x97, 0x22, 0x98, 0xd9, 0x6a, 0xda, 0x6b, 0x01, 0xc2, 0xc8, 0x7a, 0x30, |
13941 | 0x27, 0x25, 0xfe, 0x69, 0x09, 0xfe, 0x02, 0xea, 0xfe, 0x80, 0x01, 0x01, 0x08, 0x16, 0xa9, 0x27, | 13346 | 0x20, 0x6e, 0xdb, 0x64, |
13942 | 0x25, 0xfe, 0xe8, 0x08, 0x47, 0xfe, 0x81, 0x01, 0x03, 0xb6, 0x1e, 0x83, 0x01, 0x38, 0x06, 0x24, | 13347 | 0xdc, 0x34, 0x91, 0x6c, 0x7e, 0x6d, 0xfe, 0x44, 0x55, 0xfe, 0xe5, 0x55, |
13943 | 0x31, 0xa2, 0x78, 0xf2, 0x53, 0x07, 0x36, 0xfe, 0x34, 0xf4, 0x3f, 0xa1, 0x78, 0x03, 0x9a, 0x1e, | 13348 | 0xfe, 0x04, 0xfa, 0x64, |
13944 | 0x83, 0x01, 0x38, 0x06, 0x12, 0x31, 0xf0, 0x4f, 0x45, 0xfe, 0x90, 0x10, 0xfe, 0x40, 0x5a, 0x23, | 13349 | 0xfe, 0x05, 0xfa, 0x34, 0x01, 0xfe, 0x6a, 0x16, 0xa3, 0x26, 0x10, 0x97, |
13945 | 0x3f, 0xfb, 0x8c, 0x49, 0x48, 0xfe, 0xaa, 0x18, 0x62, 0x49, 0x71, 0x8c, 0x80, 0x48, 0xfe, 0xaa, | 13350 | 0x10, 0x98, 0x91, 0x6c, |
13946 | 0x18, 0x62, 0x80, 0xfe, 0xb4, 0x56, 0xfe, 0x40, 0x5d, 0x01, 0xc6, 0x01, 0xfe, 0xac, 0x1d, 0xfe, | 13351 | 0x7e, 0x6d, 0xfe, 0x14, 0x10, 0x01, 0x0c, 0x06, 0x24, 0x1b, 0x40, 0x91, |
13947 | 0x02, 0x17, 0xfe, 0xc8, 0x45, 0xfe, 0x5a, 0xf0, 0xfe, 0xc0, 0x18, 0xfe, 0x43, 0x48, 0x2d, 0x93, | 13352 | 0x4b, 0x7e, 0x4c, 0x01, |
13948 | 0x36, 0xfe, 0x34, 0xf4, 0xfe, 0x00, 0x11, 0xfe, 0x40, 0x10, 0x2d, 0xb4, 0x36, 0xfe, 0x34, 0xf4, | 13353 | 0x0c, 0x06, 0xfe, 0xf7, 0x00, 0x44, 0x03, 0x68, 0x3b, 0x69, 0xfe, 0x10, |
13949 | 0x04, 0xfe, 0x34, 0x10, 0x2d, 0xfe, 0x0b, 0x00, 0x36, 0x46, 0x63, 0xfe, 0x28, 0x10, 0xfe, 0xc0, | 13354 | 0x58, 0xfe, 0x91, 0x58, |
13950 | 0x49, 0xff, 0x02, 0x00, 0x54, 0xb2, 0xfe, 0x90, 0x01, 0x48, 0xfe, 0xfa, 0x18, 0x45, 0xfe, 0x1c, | 13355 | 0xfe, 0x14, 0x59, 0xfe, 0x95, 0x59, 0x05, 0x5b, 0x01, 0x0c, 0x06, 0x24, |
13951 | 0xf4, 0x3f, 0xf3, 0xfe, 0x40, 0xf4, 0x96, 0xfe, 0x56, 0xf0, 0xfe, 0x0c, 0x19, 0xfe, 0x04, 0xf4, | 13356 | 0x1b, 0x40, 0x01, 0x0c, |
13952 | 0x58, 0xfe, 0x40, 0xf4, 0x94, 0xf6, 0x3e, 0x2d, 0x93, 0x4e, 0xd0, 0x0d, 0x21, 0xfe, 0x7f, 0x01, | 13357 | 0x06, 0xfe, 0xf7, 0x00, 0x44, 0x78, 0x01, 0xfe, 0x8e, 0x1e, 0x4f, 0x0f, |
13953 | 0xfe, 0xc8, 0x46, 0xfe, 0x24, 0x13, 0x8c, 0x00, 0x5d, 0x26, 0x21, 0xfe, 0x7e, 0x01, 0xfe, 0xc8, | 13358 | 0xfe, 0x10, 0x90, 0x04, |
13954 | 0x45, 0xfe, 0x14, 0x13, 0x21, 0xfe, 0x80, 0x01, 0xfe, 0x48, 0x45, 0xfa, 0x21, 0xfe, 0x81, 0x01, | 13359 | 0xfe, 0x90, 0x93, 0x3a, 0x0b, 0xfe, 0x92, 0x90, 0x04, 0xfe, 0x92, 0x93, |
13955 | 0xfe, 0xc8, 0x44, 0x4e, 0x26, 0x02, 0x13, 0x07, 0x02, 0x78, 0x45, 0x50, 0x13, 0x0d, 0x02, 0x14, | 13360 | 0x79, 0x0b, 0x0e, 0xfe, |
13956 | 0x07, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x14, 0x0d, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x14, | 13361 | 0xbd, 0x10, 0x01, 0x43, 0x09, 0xbb, 0x1b, 0xfe, 0x6e, 0x0a, 0x15, 0xbb, |
13957 | 0x1d, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x5f, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x02, 0x14, 0x07, | 13362 | 0x01, 0x0c, 0x06, 0x0d, |
13958 | 0x01, 0x08, 0x17, 0xc1, 0x14, 0x1d, 0x01, 0x08, 0x17, 0xc1, 0x14, 0x07, 0x01, 0x08, 0x17, 0xc1, | 13363 | 0xfe, 0x14, 0x13, 0x03, 0x4b, 0x3b, 0x4c, 0x8e, 0xfe, 0x6e, 0x0a, 0xfe, |
13959 | 0xfe, 0x89, 0x49, 0x01, 0x08, 0x17, 0xc1, 0x5f, 0xfe, 0x89, 0x4a, 0x01, 0x08, 0x02, 0x50, 0x02, | 13364 | 0x0c, 0x58, 0xfe, 0x8d, |
13960 | 0x14, 0x07, 0x01, 0x08, 0x17, 0x74, 0x14, 0x7f, 0x01, 0x08, 0x17, 0x74, 0x14, 0x12, 0x01, 0x08, | 13365 | 0x58, 0x05, 0x5b, 0x26, 0x3e, 0x0f, 0xfe, 0x19, 0x80, 0x04, 0xfe, 0x99, |
13961 | 0x17, 0x74, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x17, 0x74, 0x14, 0x00, 0x01, 0x08, 0x17, 0x74, 0xfe, | 13366 | 0x83, 0x33, 0x0b, 0x0e, |
13962 | 0x89, 0x4a, 0x01, 0x08, 0x17, 0x74, 0xfe, 0x09, 0x49, 0x01, 0x08, 0x17, 0x74, 0x5f, 0xcc, 0x01, | 13367 | 0xfe, 0xe5, 0x10, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x1a, 0x12, 0xfe, 0x6c, |
13963 | 0x08, 0x02, 0x21, 0xe4, 0x09, 0x07, 0xfe, 0x4c, 0x13, 0xc8, 0x20, 0xe4, 0xfe, 0x49, 0xf4, 0x00, | 13368 | 0x19, 0xfe, 0x19, 0x41, |
13964 | 0x4d, 0x5f, 0xa1, 0x5e, 0xfe, 0x01, 0xec, 0xfe, 0x27, 0x01, 0xcc, 0xff, 0x02, 0x00, 0x10, 0x2f, | 13369 | 0xfe, 0x6b, 0x18, 0xac, 0xfe, 0xd1, 0xf0, 0xef, 0x1f, 0x92, 0x01, 0x42, |
13965 | 0xfe, 0x3e, 0x1a, 0x01, 0x43, 0x09, 0xfe, 0xe3, 0x00, 0xfe, 0x22, 0x13, 0x16, 0xfe, 0x64, 0x1a, | 13370 | 0x19, 0xfe, 0x44, 0x00, |
13966 | 0x26, 0x20, 0x9e, 0x01, 0x41, 0x21, 0x9e, 0x09, 0x07, 0x5d, 0x01, 0x0c, 0x61, 0x07, 0x44, 0x02, | 13371 | 0xfe, 0x90, 0x10, 0xfe, 0x6c, 0x19, 0xd9, 0x4b, 0xfe, 0xed, 0x19, 0xda, |
13967 | 0x0a, 0x5a, 0x01, 0x18, 0xfe, 0x00, 0x40, 0xaa, 0x09, 0x1a, 0xfe, 0x12, 0x13, 0x0a, 0x9d, 0x01, | 13372 | 0x4c, 0xfe, 0x0c, 0x51, |
13968 | 0x18, 0xaa, 0x0a, 0x67, 0x01, 0xa3, 0x02, 0x0a, 0x9d, 0x01, 0x18, 0xaa, 0xfe, 0x80, 0xe7, 0x1a, | 13373 | 0xfe, 0x8e, 0x51, 0xfe, 0x6b, 0x18, 0x23, 0xfe, 0x00, 0xff, 0x31, 0xfe, |
13969 | 0x09, 0x1a, 0x5d, 0xfe, 0x45, 0x58, 0x01, 0xfe, 0xb2, 0x16, 0xaa, 0x02, 0x0a, 0x5a, 0x01, 0x18, | 13374 | 0x76, 0x10, 0xac, 0xfe, |
13970 | 0xaa, 0x0a, 0x67, 0x01, 0xa3, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x01, 0xfe, 0x7e, 0x1e, 0xfe, 0x80, | 13375 | 0xd2, 0xf0, 0xfe, 0xba, 0x0c, 0xfe, 0x76, 0x18, 0x23, 0x1d, 0x5d, 0x03, |
13971 | 0x4c, 0xfe, 0x49, 0xe4, 0x1a, 0xfe, 0x12, 0x13, 0x0a, 0x9d, 0x01, 0x18, 0xfe, 0x80, 0x4c, 0x0a, | 13376 | 0xe3, 0x23, 0x07, 0xfe, |
13972 | 0x67, 0x01, 0x5c, 0x02, 0x1c, 0x1a, 0x87, 0x7c, 0xe5, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, | 13377 | 0x08, 0x13, 0x19, 0xfe, 0x16, 0x00, 0x05, 0x70, 0xfe, 0xd1, 0xf0, 0xfe, |
13973 | 0x24, 0x1c, 0xfe, 0x1d, 0xf7, 0x28, 0xb1, 0xfe, 0x04, 0x1b, 0x01, 0xfe, 0x2a, 0x1c, 0xfa, 0xb3, | 13378 | 0xcc, 0x0c, 0x1f, 0x92, |
13974 | 0x28, 0x7c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x02, 0xc9, 0x2b, 0xfe, 0xf4, 0x1a, 0xfe, 0xfa, | 13379 | 0x01, 0x42, 0x19, 0xfe, 0x17, 0x00, 0x5c, 0xfe, 0xce, 0xf0, 0xfe, 0xd2, |
13975 | 0x10, 0x1c, 0x1a, 0x87, 0x03, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x24, 0xfe, 0x18, 0x58, 0x03, | 13380 | 0x0c, 0xfe, 0x3e, 0x10, |
13976 | 0xfe, 0x66, 0x01, 0xfe, 0x19, 0x58, 0xb3, 0x24, 0x01, 0xfe, 0x0e, 0x1f, 0xfe, 0x30, 0xf4, 0x07, | 13381 | 0xfe, 0xcd, 0xf0, 0xfe, 0xde, 0x0c, 0x19, 0xfe, 0x22, 0x00, 0x05, 0x70, |
13977 | 0xfe, 0x3c, 0x50, 0x7c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, 0xf7, 0x24, 0xb1, 0xfe, | 13382 | 0xfe, 0xcb, 0xf0, 0xfe, |
13978 | 0x50, 0x1b, 0xfe, 0xd4, 0x14, 0x31, 0x02, 0xc9, 0x2b, 0xfe, 0x26, 0x1b, 0xfe, 0xba, 0x10, 0x1c, | 13383 | 0xea, 0x0c, 0x19, 0xfe, 0x24, 0x00, 0x05, 0x70, 0xfe, 0xd0, 0xf0, 0xfe, |
13979 | 0x1a, 0x87, 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, 0x1d, 0xf7, 0x54, 0xb1, | 13384 | 0xf4, 0x0c, 0x19, 0x94, |
13980 | 0xfe, 0x72, 0x1b, 0xfe, 0xb2, 0x14, 0xfc, 0xb3, 0x54, 0x7c, 0x12, 0xfe, 0xaf, 0x19, 0xfe, 0x98, | 13385 | 0xfe, 0x1c, 0x10, 0xfe, 0xcf, 0xf0, 0xfe, 0xfe, 0x0c, 0x19, 0x4a, 0xf3, |
13981 | 0xe7, 0x00, 0x02, 0xc9, 0x2b, 0xfe, 0x66, 0x1b, 0xfe, 0x8a, 0x10, 0x1c, 0x1a, 0x87, 0x8b, 0x0f, | 13386 | 0xfe, 0xcc, 0xf0, 0xef, |
13982 | 0xfe, 0x30, 0x90, 0x04, 0xfe, 0xb0, 0x93, 0x3a, 0x0b, 0xfe, 0x18, 0x58, 0xfe, 0x32, 0x90, 0x04, | 13387 | 0x01, 0x76, 0x06, 0x24, 0x4d, 0x19, 0xfe, 0x12, 0x00, 0x37, 0x13, 0xfe, |
13983 | 0xfe, 0xb2, 0x93, 0x3a, 0x0b, 0xfe, 0x19, 0x58, 0x0e, 0xa8, 0xb3, 0x4a, 0x7c, 0x12, 0xfe, 0x0f, | 13388 | 0x4e, 0x11, 0x2f, 0xfe, |
13984 | 0x79, 0xfe, 0x1c, 0xf7, 0x4a, 0xb1, 0xfe, 0xc6, 0x1b, 0xfe, 0x5e, 0x14, 0x31, 0x02, 0xc9, 0x2b, | 13389 | 0x16, 0x0d, 0xfe, 0x9e, 0xf0, 0xfe, 0x2a, 0x0d, 0xfe, 0x01, 0x48, 0x1b, |
13985 | 0xfe, 0x96, 0x1b, 0x5c, 0xfe, 0x02, 0xf6, 0x1a, 0x87, 0xfe, 0x18, 0xfe, 0x6a, 0xfe, 0x19, 0xfe, | 13390 | 0x3c, 0x37, 0x88, 0xf5, |
13986 | 0x6b, 0x01, 0xfe, 0x1e, 0x1f, 0xfe, 0x1d, 0xf7, 0x65, 0xb1, 0xfe, 0xee, 0x1b, 0xfe, 0x36, 0x14, | 13391 | 0xd4, 0x29, 0xd5, 0x29, 0xd2, 0x29, 0xd3, 0x29, 0x37, 0xfe, 0x9c, 0x32, |
13987 | 0xfe, 0x1c, 0x13, 0xb3, 0x65, 0x3e, 0xfe, 0x83, 0x58, 0xfe, 0xaf, 0x19, 0xfe, 0x80, 0xe7, 0x1a, | 13392 | 0x2f, 0xfe, 0x3e, 0x0d, |
13988 | 0xfe, 0x81, 0xe7, 0x1a, 0x15, 0xfe, 0xdd, 0x00, 0x7a, 0x30, 0x02, 0x7a, 0x30, 0xfe, 0x12, 0x45, | 13393 | 0x2a, 0x3c, 0xae, 0xfe, 0x62, 0x0d, 0xaf, 0xa0, 0xd4, 0x9f, 0xd5, 0x9f, |
13989 | 0x2b, 0xfe, 0xdc, 0x1b, 0x1f, 0x07, 0x47, 0xb5, 0xc3, 0x05, 0x35, 0xfe, 0x39, 0xf0, 0x75, 0x26, | 13394 | 0xd2, 0x9f, 0xd3, 0x9f, |
13990 | 0x02, 0xfe, 0x7e, 0x18, 0x23, 0x1d, 0x36, 0x13, 0x11, 0x02, 0x87, 0x03, 0xe3, 0x23, 0x07, 0xfe, | 13395 | 0x05, 0x29, 0x01, 0x41, 0xfe, 0xd3, 0x10, 0x15, 0xfe, 0xe8, 0x00, 0xc4, |
13991 | 0xef, 0x12, 0xfe, 0xe1, 0x10, 0x90, 0x34, 0x60, 0xfe, 0x02, 0x80, 0x09, 0x56, 0xfe, 0x3c, 0x13, | 13396 | 0xc5, 0x75, 0xd7, 0x99, |
13992 | 0xfe, 0x82, 0x14, 0xfe, 0x42, 0x13, 0x51, 0xfe, 0x06, 0x83, 0x0a, 0x5a, 0x01, 0x18, 0xcb, 0xfe, | 13397 | 0xd8, 0x9c, 0xfe, 0x89, 0xf0, 0x29, 0x27, 0x25, 0xbe, 0xd7, 0x99, 0xd8, |
13993 | 0x3e, 0x12, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01, 0xfe, 0xb2, 0x16, 0xfe, 0x00, 0xcc, 0xcb, | 13398 | 0x9c, 0x2f, 0xfe, 0x8c, |
13994 | 0xfe, 0xf3, 0x13, 0x3f, 0x89, 0x09, 0x1a, 0xa5, 0x0a, 0x9d, 0x01, 0x18, 0xfe, 0x80, 0x4c, 0x01, | 13399 | 0x0d, 0x16, 0x29, 0x27, 0x25, 0xbd, 0xfe, 0x01, 0x48, 0xa4, 0x19, 0xfe, |
13995 | 0x85, 0xfe, 0x16, 0x10, 0x09, 0x9b, 0x4e, 0xfe, 0x40, 0x14, 0xfe, 0x24, 0x12, 0xfe, 0x14, 0x56, | 13400 | 0x42, 0x00, 0x05, 0x70, |
13996 | 0xfe, 0xd6, 0xf0, 0xfe, 0x52, 0x1c, 0x1c, 0x0d, 0x02, 0xfe, 0x9c, 0xe7, 0x0d, 0x19, 0xfe, 0x15, | 13401 | 0x90, 0x07, 0xfe, 0x81, 0x49, 0x1b, 0xfe, 0x64, 0x0e, 0x01, 0x0c, 0x06, |
13997 | 0x00, 0x40, 0x8d, 0x30, 0x01, 0xf4, 0x1c, 0x07, 0x02, 0x51, 0xfe, 0x06, 0x83, 0xfe, 0x18, 0x80, | 13402 | 0x0d, 0xfe, 0x44, 0x13, |
13998 | 0x61, 0x28, 0x44, 0x15, 0x56, 0x01, 0x85, 0x1c, 0x07, 0x02, 0xfe, 0x38, 0x90, 0xfe, 0xba, 0x90, | 13403 | 0x19, 0x00, 0x2d, 0x0d, 0xfe, 0x54, 0x12, 0x2d, 0xfe, 0x28, 0x00, 0x2b, |
13999 | 0x91, 0xde, 0x7e, 0xdf, 0xfe, 0x48, 0x55, 0x31, 0xfe, 0xc9, 0x55, 0x02, 0x21, 0xb9, 0x88, 0x20, | 13404 | 0xfe, 0xda, 0x0e, 0x0a, |
14000 | 0xb9, 0x02, 0x0a, 0xba, 0x01, 0x18, 0xfe, 0x41, 0x48, 0x0a, 0x57, 0x01, 0x18, 0xfe, 0x49, 0x44, | 13405 | 0x57, 0x01, 0x18, 0x09, 0x00, 0x36, 0x46, 0xfe, 0x28, 0x00, 0xfe, 0xfa, |
14001 | 0x1b, 0xfe, 0x1e, 0x1d, 0x88, 0x89, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x09, 0x1a, 0xa4, 0x0a, 0x67, | 13406 | 0x10, 0x01, 0xfe, 0xf4, |
14002 | 0x01, 0xa3, 0x0a, 0x57, 0x01, 0x18, 0x88, 0x89, 0x02, 0xfe, 0x4e, 0xe4, 0x1d, 0x7b, 0xfe, 0x52, | 13407 | 0x1c, 0x01, 0xfe, 0x00, 0x1d, 0x0a, 0xba, 0x01, 0xfe, 0x58, 0x10, 0x40, |
14003 | 0x1d, 0x03, 0xfe, 0x90, 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10, 0xfe, 0x4e, 0xe4, 0xdd, 0x7b, | 13408 | 0x15, 0x56, 0x01, 0x85, |
14004 | 0xfe, 0x64, 0x1d, 0x03, 0xfe, 0x92, 0x00, 0xd1, 0x12, 0xfe, 0x1a, 0x10, 0xfe, 0x4e, 0xe4, 0xfe, | 13409 | 0x05, 0x35, 0x19, 0xfe, 0x44, 0x00, 0x2d, 0x0d, 0xf7, 0x46, 0x0d, 0xfe, |
14005 | 0x0b, 0x00, 0x7b, 0xfe, 0x76, 0x1d, 0x03, 0xfe, 0x94, 0x00, 0xd1, 0x24, 0xfe, 0x08, 0x10, 0x03, | 13410 | 0xcc, 0x10, 0x01, 0xa7, |
14006 | 0xfe, 0x96, 0x00, 0xd1, 0x63, 0xfe, 0x4e, 0x45, 0x83, 0xca, 0xff, 0x04, 0x68, 0x54, 0xfe, 0xf1, | 13411 | 0x46, 0x0d, 0xfe, 0xc2, 0x10, 0x01, 0xa7, 0x0f, 0xfe, 0x19, 0x82, 0x04, |
14007 | 0x10, 0x23, 0x49, 0xfe, 0x08, 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c, 0xfe, 0x1a, 0xf4, 0xfe, | 13412 | 0xfe, 0x99, 0x83, 0xfe, |
14008 | 0x00, 0x04, 0x83, 0xb2, 0x1d, 0x48, 0xfe, 0xaa, 0x1d, 0x13, 0x1d, 0x02, 0x09, 0x92, 0xfe, 0x5a, | 13413 | 0xcc, 0x47, 0x0b, 0x0e, 0xfe, 0x34, 0x46, 0xa5, 0x46, 0x0d, 0x19, 0xfe, |
14009 | 0xf0, 0xfe, 0xba, 0x1d, 0x2e, 0x93, 0xfe, 0x34, 0x10, 0x09, 0x12, 0xfe, 0x5a, 0xf0, 0xfe, 0xc8, | 13414 | 0x43, 0x00, 0xfe, 0xa2, |
14010 | 0x1d, 0x2e, 0xb4, 0xfe, 0x26, 0x10, 0x09, 0x1d, 0x36, 0x2e, 0x63, 0xfe, 0x1a, 0x10, 0x09, 0x0d, | 13415 | 0x10, 0x01, 0x0c, 0x61, 0x0d, 0x44, 0x01, 0xfe, 0xf4, 0x1c, 0x01, 0xfe, |
14011 | 0x36, 0x2e, 0x94, 0xf2, 0x09, 0x07, 0x36, 0x2e, 0x95, 0xa1, 0xc8, 0x02, 0x1f, 0x93, 0x01, 0x42, | 13416 | 0x00, 0x1d, 0x40, 0x15, |
14012 | 0xfe, 0x04, 0xfe, 0x99, 0x03, 0x9c, 0x8b, 0x02, 0x2a, 0xfe, 0x1c, 0x1e, 0xfe, 0x14, 0xf0, 0x08, | 13417 | 0x56, 0x01, 0x85, 0x7d, 0x0d, 0x40, 0x51, 0x01, 0xfe, 0x9e, 0x1e, 0x05, |
14013 | 0x2f, 0xfe, 0x0c, 0x1e, 0x2a, 0xfe, 0x1c, 0x1e, 0x8f, 0xfe, 0x1c, 0x1e, 0xfe, 0x82, 0xf0, 0xfe, | 13418 | 0xfe, 0x3a, 0x03, 0x01, |
14014 | 0x10, 0x1e, 0x02, 0x0f, 0x3f, 0x04, 0xfe, 0x80, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x18, | 13419 | 0x0c, 0x06, 0x0d, 0x5d, 0x46, 0x0d, 0x19, 0x00, 0xfe, 0x62, 0x10, 0x01, |
14015 | 0x80, 0x04, 0xfe, 0x98, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x02, 0x80, 0x04, 0xfe, 0x82, | 13420 | 0x76, 0x06, 0x12, 0xfe, |
14016 | 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, 0x80, 0x04, 0xfe, 0x86, 0x83, 0x33, 0x0b, 0x0e, | 13421 | 0x5c, 0x12, 0x01, 0x0c, 0x06, 0x12, 0xfe, 0x52, 0x13, 0xfe, 0x1c, 0x1c, |
14017 | 0x02, 0x0f, 0xfe, 0x1b, 0x80, 0x04, 0xfe, 0x9b, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x04, | 13422 | 0xfe, 0x9d, 0xf0, 0xfe, |
14018 | 0x80, 0x04, 0xfe, 0x84, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x80, 0x80, 0x04, 0xfe, 0x80, | 13423 | 0x8e, 0x0e, 0xfe, 0x1c, 0x1c, 0xfe, 0x9d, 0xf0, 0xfe, 0x94, 0x0e, 0x01, |
14019 | 0x83, 0xfe, 0xc9, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x19, 0x81, 0x04, 0xfe, 0x99, 0x83, 0xfe, | 13424 | 0x0c, 0x61, 0x12, 0x44, |
14020 | 0xca, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, 0x83, 0x04, 0xfe, 0x86, 0x83, 0xfe, 0xce, 0x47, | 13425 | 0xfe, 0x9f, 0x10, 0x19, 0xfe, 0x15, 0x00, 0xfe, 0x04, 0xe6, 0x0d, 0x4f, |
14021 | 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x2c, 0x90, 0x04, 0xfe, 0xac, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f, | 13426 | 0xfe, 0x2e, 0x10, 0x19, |
14022 | 0xfe, 0xae, 0x90, 0x04, 0xfe, 0xae, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x08, 0x90, 0x04, | 13427 | 0xfe, 0x13, 0x00, 0xfe, 0x10, 0x10, 0x19, 0xfe, 0x47, 0x00, 0xf1, 0x19, |
14023 | 0xfe, 0x88, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x8a, 0x90, 0x04, 0xfe, 0x8a, 0x93, 0x79, | 13428 | 0xfe, 0x41, 0x00, 0xa2, |
14024 | 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x0c, 0x90, 0x04, 0xfe, 0x8c, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f, | 13429 | 0x19, 0xfe, 0x24, 0x00, 0x86, 0xc4, 0xc5, 0x75, 0x03, 0x81, 0x1e, 0x2b, |
14025 | 0xfe, 0x8e, 0x90, 0x04, 0xfe, 0x8e, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x3c, 0x90, 0x04, | 13430 | 0xea, 0x4f, 0xfe, 0x04, |
14026 | 0xfe, 0xbc, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x8b, 0x0f, 0xfe, 0x03, 0x80, 0x04, 0xfe, 0x83, 0x83, | 13431 | 0xe6, 0x12, 0xfe, 0x9d, 0x41, 0xfe, 0x1c, 0x42, 0x40, 0x01, 0xf4, 0x05, |
14027 | 0x33, 0x0b, 0x77, 0x0e, 0xa8, 0x02, 0xff, 0x66, 0x00, 0x00, | 13432 | 0x35, 0xfe, 0x12, 0x1c, |
13433 | 0x1f, 0x0d, 0x47, 0xb5, 0xc3, 0x1f, 0xfe, 0x31, 0x00, 0x47, 0xb8, 0x01, | ||
13434 | 0xfe, 0xd4, 0x11, 0x05, | ||
13435 | 0xe9, 0x51, 0xfe, 0x06, 0xec, 0xe0, 0xfe, 0x0e, 0x47, 0x46, 0x28, 0xfe, | ||
13436 | 0xce, 0x45, 0x31, 0x51, | ||
13437 | 0xfe, 0x06, 0xea, 0xe0, 0xfe, 0x47, 0x4b, 0x45, 0xfe, 0x75, 0x57, 0x03, | ||
13438 | 0x67, 0xfe, 0x98, 0x56, | ||
13439 | 0xfe, 0x38, 0x12, 0x0a, 0x5a, 0x01, 0x18, 0xfe, 0x44, 0x48, 0x60, 0x01, | ||
13440 | 0x0c, 0x06, 0x28, 0xfe, | ||
13441 | 0x18, 0x13, 0x0a, 0x57, 0x01, 0x18, 0x3e, 0xfe, 0x41, 0x58, 0x0a, 0xba, | ||
13442 | 0xfe, 0xfa, 0x14, 0xfe, | ||
13443 | 0x49, 0x54, 0xb0, 0xfe, 0x5e, 0x0f, 0x05, 0xfe, 0x3a, 0x03, 0x0a, 0x67, | ||
13444 | 0xfe, 0xe0, 0x14, 0xfe, | ||
13445 | 0x0e, 0x47, 0x46, 0x28, 0xfe, 0xce, 0x45, 0x31, 0x51, 0xfe, 0xce, 0x47, | ||
13446 | 0xfe, 0xad, 0x13, 0x05, | ||
13447 | 0x35, 0x21, 0x2c, 0x09, 0x1a, 0xfe, 0x98, 0x12, 0x26, 0x20, 0x96, 0x20, | ||
13448 | 0xe7, 0xfe, 0x08, 0x1c, | ||
13449 | 0xfe, 0x7c, 0x19, 0xfe, 0xfd, 0x19, 0xfe, 0x0a, 0x1c, 0x03, 0xe5, 0xfe, | ||
13450 | 0x48, 0x55, 0xa5, 0x3b, | ||
13451 | 0xfe, 0x62, 0x01, 0xfe, 0xc9, 0x55, 0x31, 0xfe, 0x74, 0x10, 0x01, 0xfe, | ||
13452 | 0xf0, 0x1a, 0x03, 0xfe, | ||
13453 | 0x38, 0x01, 0x3b, 0xfe, 0x3a, 0x01, 0x8e, 0xfe, 0x1e, 0x10, 0xfe, 0x02, | ||
13454 | 0xec, 0xe7, 0x53, 0x00, | ||
13455 | 0x36, 0xfe, 0x04, 0xec, 0x2c, 0x60, 0xfe, 0x05, 0xf6, 0xfe, 0x34, 0x01, | ||
13456 | 0x01, 0xfe, 0x62, 0x1b, | ||
13457 | 0x01, 0xfe, 0xce, 0x1e, 0xb2, 0x11, 0xfe, 0x18, 0x13, 0xca, 0xfe, 0x02, | ||
13458 | 0xea, 0xe7, 0x53, 0x92, | ||
13459 | 0xfe, 0xc3, 0x13, 0x1f, 0x12, 0x47, 0xb5, 0xc3, 0xfe, 0x2a, 0x10, 0x03, | ||
13460 | 0xfe, 0x38, 0x01, 0x23, | ||
13461 | 0xfe, 0xf0, 0xff, 0x10, 0xe5, 0x03, 0xfe, 0x3a, 0x01, 0x10, 0xfe, 0x62, | ||
13462 | 0x01, 0x01, 0xfe, 0x1e, | ||
13463 | 0x1e, 0x20, 0x2c, 0x15, 0x56, 0x01, 0xfe, 0x9e, 0x1e, 0x13, 0x07, 0x02, | ||
13464 | 0x26, 0x02, 0x21, 0x96, | ||
13465 | 0xc7, 0x20, 0x96, 0x09, 0x92, 0xfe, 0x79, 0x13, 0x1f, 0x1d, 0x47, 0xb5, | ||
13466 | 0xc3, 0xfe, 0xe1, 0x10, | ||
13467 | 0xcf, 0xfe, 0x03, 0xdc, 0xfe, 0x73, 0x57, 0xfe, 0x80, 0x5d, 0x02, 0xcf, | ||
13468 | 0xfe, 0x03, 0xdc, 0xfe, | ||
13469 | 0x5b, 0x57, 0xfe, 0x80, 0x5d, 0x02, 0xfe, 0x03, 0x57, 0xcf, 0x26, 0xfe, | ||
13470 | 0x00, 0xcc, 0x02, 0xfe, | ||
13471 | 0x03, 0x57, 0xcf, 0x89, 0x02, 0x01, 0x0c, 0x06, 0x4a, 0xfe, 0x4e, 0x13, | ||
13472 | 0x0f, 0xfe, 0x1c, 0x80, | ||
13473 | 0x04, 0xfe, 0x9c, 0x83, 0x33, 0x0b, 0x0e, 0x09, 0x07, 0xfe, 0x3a, 0x13, | ||
13474 | 0x0f, 0xfe, 0x1e, 0x80, | ||
13475 | 0x04, 0xfe, 0x9e, 0x83, 0x33, 0x0b, 0x0e, 0xfe, 0x2a, 0x13, 0x0f, 0xfe, | ||
13476 | 0x1d, 0x80, 0x04, 0xfe, | ||
13477 | 0x9d, 0x83, 0xfe, 0xf9, 0x13, 0x0e, 0xfe, 0x1c, 0x13, 0x01, 0xfe, 0xee, | ||
13478 | 0x1e, 0xac, 0xfe, 0x14, | ||
13479 | 0x13, 0x01, 0xfe, 0xfe, 0x1e, 0xfe, 0x81, 0x58, 0xfa, 0x01, 0xfe, 0x0e, | ||
13480 | 0x1f, 0xfe, 0x30, 0xf4, | ||
13481 | 0x0d, 0xfe, 0x3c, 0x50, 0xa2, 0x01, 0xfe, 0x92, 0x1b, 0x01, 0x43, 0x09, | ||
13482 | 0x56, 0xfb, 0x01, 0xfe, | ||
13483 | 0xc8, 0x1a, 0x01, 0x0c, 0x06, 0x28, 0xa4, 0x01, 0xfe, 0xf4, 0x1c, 0x01, | ||
13484 | 0xfe, 0x00, 0x1d, 0x15, | ||
13485 | 0xfe, 0xe9, 0x00, 0x01, 0x0c, 0x06, 0x4a, 0xfe, 0x4e, 0x13, 0x01, 0xfe, | ||
13486 | 0x22, 0x1b, 0xfe, 0x1e, | ||
13487 | 0x1c, 0x0f, 0xfe, 0x14, 0x90, 0x04, 0xfe, 0x94, 0x93, 0x3a, 0x0b, 0xfe, | ||
13488 | 0x96, 0x90, 0x04, 0xfe, | ||
13489 | 0x96, 0x93, 0x79, 0x0b, 0x0e, 0x10, 0xfe, 0x64, 0x01, 0x22, 0xfe, 0x66, | ||
13490 | 0x01, 0x01, 0x0c, 0x06, | ||
13491 | 0x65, 0xf9, 0x0f, 0xfe, 0x03, 0x80, 0x04, 0xfe, 0x83, 0x83, 0x33, 0x0b, | ||
13492 | 0x0e, 0x77, 0xfe, 0x01, | ||
13493 | 0xec, 0x2c, 0xfe, 0x80, 0x40, 0x20, 0x2c, 0x7a, 0x30, 0x15, 0xdf, 0x40, | ||
13494 | 0x21, 0x2c, 0xfe, 0x00, | ||
13495 | 0x40, 0x8d, 0x2c, 0x02, 0xfe, 0x08, 0x1c, 0x03, 0xfe, 0xac, 0x00, 0xfe, | ||
13496 | 0x06, 0x58, 0x03, 0xfe, | ||
13497 | 0xae, 0x00, 0xfe, 0x07, 0x58, 0x03, 0xfe, 0xb0, 0x00, 0xfe, 0x08, 0x58, | ||
13498 | 0x03, 0xfe, 0xb2, 0x00, | ||
13499 | 0xfe, 0x09, 0x58, 0xfe, 0x0a, 0x1c, 0x2e, 0x49, 0x20, 0xe0, 0x26, 0x10, | ||
13500 | 0x66, 0x10, 0x55, 0x10, | ||
13501 | 0x6f, 0x13, 0x57, 0x52, 0x4f, 0x1c, 0x28, 0xfe, 0x90, 0x4d, 0xfe, 0x91, | ||
13502 | 0x54, 0x2b, 0xfe, 0x88, | ||
13503 | 0x11, 0x46, 0x1a, 0x13, 0x5a, 0x52, 0x1c, 0x4a, 0xfe, 0x90, 0x4d, 0xfe, | ||
13504 | 0x91, 0x54, 0x2b, 0xfe, | ||
13505 | 0x9e, 0x11, 0x2e, 0x1a, 0x20, 0x2c, 0x90, 0x34, 0x60, 0x21, 0x2c, 0xfe, | ||
13506 | 0x00, 0x40, 0x8d, 0x2c, | ||
13507 | 0x15, 0xdf, 0xfe, 0x14, 0x56, 0xfe, 0xd6, 0xf0, 0xfe, 0xb2, 0x11, 0xfe, | ||
13508 | 0x12, 0x1c, 0x75, 0xfe, | ||
13509 | 0x14, 0x1c, 0xfe, 0x10, 0x1c, 0xfe, 0x18, 0x1c, 0x02, 0x51, 0xfe, 0x0c, | ||
13510 | 0x14, 0xfe, 0x0e, 0x47, | ||
13511 | 0xfe, 0x07, 0xe6, 0x28, 0xfe, 0xce, 0x47, 0xfe, 0xf5, 0x13, 0x02, 0x01, | ||
13512 | 0xa7, 0x90, 0x34, 0x60, | ||
13513 | 0xfe, 0x06, 0x80, 0xfe, 0x48, 0x47, 0xfe, 0x42, 0x13, 0xfe, 0x02, 0x80, | ||
13514 | 0x09, 0x56, 0xfe, 0x34, | ||
13515 | 0x13, 0x0a, 0x5a, 0x01, 0x18, 0xcb, 0xfe, 0x36, 0x12, 0xfe, 0x41, 0x48, | ||
13516 | 0xfe, 0x45, 0x48, 0x01, | ||
13517 | 0xfe, 0xb2, 0x16, 0xfe, 0x00, 0xcc, 0xcb, 0xfe, 0xf3, 0x13, 0x3f, 0x89, | ||
13518 | 0x09, 0x1a, 0xa5, 0x0a, | ||
13519 | 0x9d, 0x01, 0x18, 0xfe, 0x80, 0x5c, 0x01, 0x85, 0xf2, 0x09, 0x9b, 0xa4, | ||
13520 | 0xfe, 0x14, 0x56, 0xfe, | ||
13521 | 0xd6, 0xf0, 0xfe, 0xec, 0x11, 0x02, 0xfe, 0x44, 0x58, 0x77, 0xfe, 0x01, | ||
13522 | 0xec, 0xb8, 0xfe, 0x9e, | ||
13523 | 0x40, 0xfe, 0x9d, 0xe7, 0x00, 0xfe, 0x9c, 0xe7, 0x12, 0x8d, 0x30, 0x01, | ||
13524 | 0xf4, 0xfe, 0xdd, 0x10, | ||
13525 | 0x37, 0xd7, 0x99, 0xd8, 0x9c, 0x27, 0x25, 0xee, 0x09, 0x12, 0xfe, 0x48, | ||
13526 | 0x12, 0x09, 0x0d, 0xfe, | ||
13527 | 0x56, 0x12, 0x09, 0x1d, 0xfe, 0x30, 0x12, 0x09, 0xdd, 0x1b, 0xfe, 0xc4, | ||
13528 | 0x13, 0x09, 0xfe, 0x23, | ||
13529 | 0x00, 0x1b, 0xfe, 0xd0, 0x13, 0x09, 0x07, 0x1b, 0xfe, 0x34, 0x14, 0x09, | ||
13530 | 0x24, 0xfe, 0x12, 0x12, | ||
13531 | 0x09, 0x00, 0x1b, 0x29, 0x1f, 0xdd, 0x01, 0x42, 0xa1, 0x32, 0x01, 0x08, | ||
13532 | 0xae, 0x41, 0x02, 0x32, | ||
13533 | 0xfe, 0x62, 0x08, 0x0a, 0xe1, 0x01, 0xfe, 0x58, 0x10, 0x15, 0x9b, 0x05, | ||
13534 | 0x35, 0x32, 0x01, 0x43, | ||
13535 | 0x09, 0xbb, 0xfe, 0xd7, 0x13, 0x91, 0x4b, 0x7e, 0x4c, 0x8e, 0xfe, 0x80, | ||
13536 | 0x13, 0x01, 0x0c, 0x06, | ||
13537 | 0x54, 0xfe, 0x72, 0x12, 0xdb, 0x64, 0xdc, 0x34, 0xfe, 0x44, 0x55, 0xfe, | ||
13538 | 0xe5, 0x55, 0xb0, 0xfe, | ||
13539 | 0x4a, 0x13, 0x21, 0x6e, 0xfe, 0x26, 0x13, 0x03, 0x97, 0x3b, 0x98, 0x8e, | ||
13540 | 0xfe, 0xb6, 0x0e, 0x10, | ||
13541 | 0x6a, 0x22, 0x6b, 0x26, 0x10, 0x97, 0x10, 0x98, 0x01, 0xc2, 0x2e, 0x49, | ||
13542 | 0x88, 0x20, 0x6e, 0x01, | ||
13543 | 0xfe, 0x6a, 0x16, 0xdb, 0x64, 0xdc, 0x34, 0xfe, 0x04, 0x55, 0xfe, 0xa5, | ||
13544 | 0x55, 0xfe, 0x04, 0xfa, | ||
13545 | 0x64, 0xfe, 0x05, 0xfa, 0x34, 0xfe, 0x8f, 0x10, 0x03, 0x6c, 0x3b, 0x6d, | ||
13546 | 0xfe, 0x40, 0x56, 0xfe, | ||
13547 | 0xe1, 0x56, 0x10, 0x6c, 0x22, 0x6d, 0x71, 0xdb, 0x64, 0xdc, 0x34, 0xfe, | ||
13548 | 0x44, 0x55, 0xfe, 0xe5, | ||
13549 | 0x55, 0x03, 0x68, 0x3b, 0x69, 0xfe, 0x00, 0x56, 0xfe, 0xa1, 0x56, 0x10, | ||
13550 | 0x68, 0x22, 0x69, 0x01, | ||
13551 | 0x0c, 0x06, 0x54, 0xf9, 0x21, 0x6e, 0xfe, 0x1f, 0x40, 0x03, 0x6a, 0x3b, | ||
13552 | 0x6b, 0xfe, 0x2c, 0x50, | ||
13553 | 0xfe, 0xae, 0x50, 0x03, 0x6c, 0x3b, 0x6d, 0xfe, 0x44, 0x50, 0xfe, 0xc6, | ||
13554 | 0x50, 0x03, 0x68, 0x3b, | ||
13555 | 0x69, 0xfe, 0x08, 0x50, 0xfe, 0x8a, 0x50, 0x03, 0x4b, 0x3b, 0x4c, 0xfe, | ||
13556 | 0x40, 0x50, 0xfe, 0xc2, | ||
13557 | 0x50, 0x05, 0x73, 0x2e, 0x07, 0x20, 0x9e, 0x05, 0x72, 0x32, 0x01, 0x08, | ||
13558 | 0x16, 0x3d, 0x27, 0x25, | ||
13559 | 0xee, 0x09, 0x07, 0x2b, 0x3d, 0x01, 0x43, 0x09, 0xbb, 0x2b, 0x72, 0x01, | ||
13560 | 0xa6, 0x23, 0x3f, 0x1b, | ||
13561 | 0x3d, 0x01, 0x0c, 0x06, 0x0d, 0xfe, 0x1e, 0x13, 0x91, 0x4b, 0x7e, 0x4c, | ||
13562 | 0xfe, 0x0a, 0x55, 0x31, | ||
13563 | 0xfe, 0x8b, 0x55, 0xd9, 0x4b, 0xda, 0x4c, 0xfe, 0x0c, 0x51, 0xfe, 0x8e, | ||
13564 | 0x51, 0x05, 0x72, 0x01, | ||
13565 | 0xfe, 0x8e, 0x1e, 0xca, 0xfe, 0x19, 0x41, 0x05, 0x72, 0x32, 0x01, 0x08, | ||
13566 | 0x2a, 0x3c, 0x16, 0xc0, | ||
13567 | 0x27, 0x25, 0xbe, 0x2d, 0x1d, 0xc0, 0x2d, 0x0d, 0x83, 0x2d, 0x7f, 0x1b, | ||
13568 | 0xfe, 0x66, 0x15, 0x05, | ||
13569 | 0x3d, 0x01, 0x08, 0x2a, 0x3c, 0x16, 0xc0, 0x27, 0x25, 0xbd, 0x09, 0x1d, | ||
13570 | 0x2b, 0x3d, 0x01, 0x08, | ||
13571 | 0x16, 0xc0, 0x27, 0x25, 0xfe, 0xe8, 0x09, 0xfe, 0xc2, 0x49, 0x50, 0x03, | ||
13572 | 0xb6, 0x1e, 0x83, 0x01, | ||
13573 | 0x38, 0x06, 0x24, 0x31, 0xa1, 0xfe, 0xbb, 0x45, 0x2d, 0x00, 0xa4, 0x46, | ||
13574 | 0x07, 0x90, 0x3f, 0x01, | ||
13575 | 0xfe, 0xf8, 0x15, 0x01, 0xa6, 0x86, 0xfe, 0x4b, 0x45, 0xfe, 0x20, 0x13, | ||
13576 | 0x01, 0x43, 0x09, 0x82, | ||
13577 | 0xfe, 0x16, 0x13, 0x03, 0x9a, 0x1e, 0x5d, 0x03, 0x55, 0x1e, 0x31, 0x5e, | ||
13578 | 0x05, 0x72, 0xfe, 0xc0, | ||
13579 | 0x5d, 0x01, 0xa7, 0xfe, 0x03, 0x17, 0x03, 0x66, 0x8a, 0x10, 0x66, 0x5e, | ||
13580 | 0x32, 0x01, 0x08, 0x17, | ||
13581 | 0x73, 0x01, 0xfe, 0x56, 0x19, 0x05, 0x73, 0x01, 0x08, 0x2a, 0x3c, 0x16, | ||
13582 | 0x3d, 0x27, 0x25, 0xbd, | ||
13583 | 0x09, 0x07, 0x2b, 0x3d, 0x01, 0xfe, 0xbe, 0x16, 0xfe, 0x42, 0x58, 0xfe, | ||
13584 | 0xe8, 0x14, 0x01, 0xa6, | ||
13585 | 0x86, 0xfe, 0x4a, 0xf4, 0x0d, 0x1b, 0x3d, 0xfe, 0x4a, 0xf4, 0x07, 0xfe, | ||
13586 | 0x0e, 0x12, 0x01, 0x43, | ||
13587 | 0x09, 0x82, 0x4e, 0x05, 0x72, 0x03, 0x55, 0x8a, 0x10, 0x55, 0x5e, 0x32, | ||
13588 | 0x01, 0x08, 0x17, 0x73, | ||
13589 | 0x01, 0xfe, 0x84, 0x19, 0x05, 0x73, 0x01, 0x08, 0x2a, 0x3c, 0x16, 0x3d, | ||
13590 | 0x27, 0x25, 0xbd, 0x09, | ||
13591 | 0x12, 0x2b, 0x3d, 0x01, 0xfe, 0xe8, 0x17, 0x8b, 0xfe, 0xaa, 0x14, 0xfe, | ||
13592 | 0xb6, 0x14, 0x86, 0xa8, | ||
13593 | 0xb2, 0x0d, 0x1b, 0x3d, 0xb2, 0x07, 0xfe, 0x0e, 0x12, 0x01, 0x43, 0x09, | ||
13594 | 0x82, 0x4e, 0x05, 0x72, | ||
13595 | 0x03, 0x6f, 0x8a, 0x10, 0x6f, 0x5e, 0x32, 0x01, 0x08, 0x17, 0x73, 0x01, | ||
13596 | 0xfe, 0xc0, 0x19, 0x05, | ||
13597 | 0x73, 0x13, 0x07, 0x2f, 0xfe, 0xcc, 0x15, 0x17, 0xfe, 0xe2, 0x15, 0x5f, | ||
13598 | 0xcc, 0x01, 0x08, 0x26, | ||
13599 | 0x5f, 0x02, 0x8f, 0xfe, 0xde, 0x15, 0x2a, 0xfe, 0xde, 0x15, 0x16, 0xfe, | ||
13600 | 0xcc, 0x15, 0x5e, 0x32, | ||
13601 | 0x01, 0x08, 0xfe, 0xd5, 0x10, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, | ||
13602 | 0xad, 0x23, 0xfe, 0xff, | ||
13603 | 0x7f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x02, 0x13, 0x58, 0xff, 0x02, | ||
13604 | 0x00, 0x57, 0x52, 0xad, | ||
13605 | 0x23, 0x3f, 0xfe, 0x30, 0x56, 0xfe, 0x00, 0x5c, 0x02, 0x13, 0x58, 0xff, | ||
13606 | 0x02, 0x00, 0x57, 0x52, | ||
13607 | 0xad, 0x02, 0x13, 0x58, 0xff, 0x02, 0x00, 0x57, 0x52, 0xfe, 0x00, 0x5e, | ||
13608 | 0x02, 0x13, 0x58, 0xff, | ||
13609 | 0x02, 0x00, 0x57, 0x52, 0xad, 0xfe, 0x0b, 0x58, 0x02, 0x0a, 0x66, 0x01, | ||
13610 | 0x5c, 0x0a, 0x55, 0x01, | ||
13611 | 0x5c, 0x0a, 0x6f, 0x01, 0x5c, 0x02, 0x01, 0xfe, 0x1e, 0x1f, 0x23, 0x1a, | ||
13612 | 0xff, 0x03, 0x00, 0x54, | ||
13613 | 0xfe, 0x00, 0xf4, 0x24, 0x52, 0x0f, 0xfe, 0x00, 0x7c, 0x04, 0xfe, 0x07, | ||
13614 | 0x7c, 0x3a, 0x0b, 0x0e, | ||
13615 | 0xfe, 0x00, 0x71, 0xfe, 0xf9, 0x18, 0xfe, 0x7a, 0x19, 0xfe, 0xfb, 0x19, | ||
13616 | 0xfe, 0x1a, 0xf7, 0x00, | ||
13617 | 0xfe, 0x1b, 0xf7, 0x00, 0x7a, 0x30, 0x10, 0x68, 0x22, 0x69, 0xd9, 0x6c, | ||
13618 | 0xda, 0x6d, 0x02, 0xfe, | ||
13619 | 0x62, 0x08, 0xfe, 0x82, 0x4a, 0xfe, 0xe1, 0x1a, 0xfe, 0x83, 0x5a, 0x77, | ||
13620 | 0x02, 0x01, 0xc6, 0xfe, | ||
13621 | 0x42, 0x48, 0x4f, 0x50, 0x45, 0x01, 0x08, 0x16, 0xfe, 0xe0, 0x17, 0x27, | ||
13622 | 0x25, 0xbe, 0x01, 0x08, | ||
13623 | 0x16, 0xfe, 0xe0, 0x17, 0x27, 0x25, 0xfe, 0xe8, 0x0a, 0xfe, 0xc1, 0x59, | ||
13624 | 0x03, 0x9a, 0x1e, 0xfe, | ||
13625 | 0xda, 0x12, 0x01, 0x38, 0x06, 0x12, 0xfe, 0xd0, 0x13, 0x26, 0x53, 0x12, | ||
13626 | 0x48, 0xfe, 0x08, 0x17, | ||
13627 | 0xd1, 0x12, 0x53, 0x12, 0xfe, 0x1e, 0x13, 0x2d, 0xb4, 0x7b, 0xfe, 0x26, | ||
13628 | 0x17, 0x4d, 0x13, 0x07, | ||
13629 | 0x1c, 0xb4, 0x90, 0x04, 0xfe, 0x78, 0x10, 0xff, 0x02, 0x83, 0x55, 0xf1, | ||
13630 | 0xff, 0x02, 0x83, 0x55, | ||
13631 | 0x53, 0x1d, 0xfe, 0x12, 0x13, 0xd6, 0xfe, 0x30, 0x00, 0xb0, 0xfe, 0x80, | ||
13632 | 0x17, 0x1c, 0x63, 0x13, | ||
13633 | 0x07, 0xfe, 0x56, 0x10, 0x53, 0x0d, 0xfe, 0x16, 0x13, 0xd6, 0xfe, 0x64, | ||
13634 | 0x00, 0xb0, 0xfe, 0x80, | ||
13635 | 0x17, 0x0a, 0xfe, 0x64, 0x00, 0x1c, 0x94, 0x13, 0x07, 0xfe, 0x28, 0x10, | ||
13636 | 0x53, 0x07, 0xfe, 0x60, | ||
13637 | 0x13, 0xd6, 0xfe, 0xc8, 0x00, 0xb0, 0xfe, 0x80, 0x17, 0x0a, 0xfe, 0xc8, | ||
13638 | 0x00, 0x1c, 0x95, 0x13, | ||
13639 | 0x07, 0x71, 0xd6, 0xfe, 0x90, 0x01, 0x48, 0xfe, 0x8c, 0x17, 0x45, 0xf3, | ||
13640 | 0xfe, 0x43, 0xf4, 0x96, | ||
13641 | 0xfe, 0x56, 0xf0, 0xfe, 0x9e, 0x17, 0xfe, 0x04, 0xf4, 0x58, 0xfe, 0x43, | ||
13642 | 0xf4, 0x94, 0xf6, 0x8b, | ||
13643 | 0x01, 0xfe, 0x24, 0x16, 0x23, 0x3f, 0xfc, 0xa8, 0x8c, 0x49, 0x48, 0xfe, | ||
13644 | 0xda, 0x17, 0x62, 0x49, | ||
13645 | 0xfe, 0x1c, 0x10, 0xa8, 0x8c, 0x80, 0x48, 0xfe, 0xda, 0x17, 0x62, 0x80, | ||
13646 | 0x71, 0x50, 0x26, 0xfe, | ||
13647 | 0x4d, 0xf4, 0x00, 0xf7, 0x45, 0x13, 0x07, 0xfe, 0xb4, 0x56, 0xfe, 0xc3, | ||
13648 | 0x58, 0x02, 0x50, 0x13, | ||
13649 | 0x0d, 0x02, 0x50, 0x3e, 0x78, 0x4f, 0x45, 0x01, 0x08, 0x16, 0xa9, 0x27, | ||
13650 | 0x25, 0xbe, 0xfe, 0x03, | ||
13651 | 0xea, 0xfe, 0x7e, 0x01, 0x01, 0x08, 0x16, 0xa9, 0x27, 0x25, 0xfe, 0xe9, | ||
13652 | 0x0a, 0x01, 0x08, 0x16, | ||
13653 | 0xa9, 0x27, 0x25, 0xfe, 0xe9, 0x0a, 0xfe, 0x05, 0xea, 0xfe, 0x7f, 0x01, | ||
13654 | 0x01, 0x08, 0x16, 0xa9, | ||
13655 | 0x27, 0x25, 0xfe, 0x69, 0x09, 0xfe, 0x02, 0xea, 0xfe, 0x80, 0x01, 0x01, | ||
13656 | 0x08, 0x16, 0xa9, 0x27, | ||
13657 | 0x25, 0xfe, 0xe8, 0x08, 0x47, 0xfe, 0x81, 0x01, 0x03, 0xb6, 0x1e, 0x83, | ||
13658 | 0x01, 0x38, 0x06, 0x24, | ||
13659 | 0x31, 0xa2, 0x78, 0xf2, 0x53, 0x07, 0x36, 0xfe, 0x34, 0xf4, 0x3f, 0xa1, | ||
13660 | 0x78, 0x03, 0x9a, 0x1e, | ||
13661 | 0x83, 0x01, 0x38, 0x06, 0x12, 0x31, 0xf0, 0x4f, 0x45, 0xfe, 0x90, 0x10, | ||
13662 | 0xfe, 0x40, 0x5a, 0x23, | ||
13663 | 0x3f, 0xfb, 0x8c, 0x49, 0x48, 0xfe, 0xaa, 0x18, 0x62, 0x49, 0x71, 0x8c, | ||
13664 | 0x80, 0x48, 0xfe, 0xaa, | ||
13665 | 0x18, 0x62, 0x80, 0xfe, 0xb4, 0x56, 0xfe, 0x40, 0x5d, 0x01, 0xc6, 0x01, | ||
13666 | 0xfe, 0xac, 0x1d, 0xfe, | ||
13667 | 0x02, 0x17, 0xfe, 0xc8, 0x45, 0xfe, 0x5a, 0xf0, 0xfe, 0xc0, 0x18, 0xfe, | ||
13668 | 0x43, 0x48, 0x2d, 0x93, | ||
13669 | 0x36, 0xfe, 0x34, 0xf4, 0xfe, 0x00, 0x11, 0xfe, 0x40, 0x10, 0x2d, 0xb4, | ||
13670 | 0x36, 0xfe, 0x34, 0xf4, | ||
13671 | 0x04, 0xfe, 0x34, 0x10, 0x2d, 0xfe, 0x0b, 0x00, 0x36, 0x46, 0x63, 0xfe, | ||
13672 | 0x28, 0x10, 0xfe, 0xc0, | ||
13673 | 0x49, 0xff, 0x02, 0x00, 0x54, 0xb2, 0xfe, 0x90, 0x01, 0x48, 0xfe, 0xfa, | ||
13674 | 0x18, 0x45, 0xfe, 0x1c, | ||
13675 | 0xf4, 0x3f, 0xf3, 0xfe, 0x40, 0xf4, 0x96, 0xfe, 0x56, 0xf0, 0xfe, 0x0c, | ||
13676 | 0x19, 0xfe, 0x04, 0xf4, | ||
13677 | 0x58, 0xfe, 0x40, 0xf4, 0x94, 0xf6, 0x3e, 0x2d, 0x93, 0x4e, 0xd0, 0x0d, | ||
13678 | 0x21, 0xfe, 0x7f, 0x01, | ||
13679 | 0xfe, 0xc8, 0x46, 0xfe, 0x24, 0x13, 0x8c, 0x00, 0x5d, 0x26, 0x21, 0xfe, | ||
13680 | 0x7e, 0x01, 0xfe, 0xc8, | ||
13681 | 0x45, 0xfe, 0x14, 0x13, 0x21, 0xfe, 0x80, 0x01, 0xfe, 0x48, 0x45, 0xfa, | ||
13682 | 0x21, 0xfe, 0x81, 0x01, | ||
13683 | 0xfe, 0xc8, 0x44, 0x4e, 0x26, 0x02, 0x13, 0x07, 0x02, 0x78, 0x45, 0x50, | ||
13684 | 0x13, 0x0d, 0x02, 0x14, | ||
13685 | 0x07, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x14, 0x0d, 0x01, 0x08, 0x17, | ||
13686 | 0xfe, 0x82, 0x19, 0x14, | ||
13687 | 0x1d, 0x01, 0x08, 0x17, 0xfe, 0x82, 0x19, 0x5f, 0xfe, 0x89, 0x49, 0x01, | ||
13688 | 0x08, 0x02, 0x14, 0x07, | ||
13689 | 0x01, 0x08, 0x17, 0xc1, 0x14, 0x1d, 0x01, 0x08, 0x17, 0xc1, 0x14, 0x07, | ||
13690 | 0x01, 0x08, 0x17, 0xc1, | ||
13691 | 0xfe, 0x89, 0x49, 0x01, 0x08, 0x17, 0xc1, 0x5f, 0xfe, 0x89, 0x4a, 0x01, | ||
13692 | 0x08, 0x02, 0x50, 0x02, | ||
13693 | 0x14, 0x07, 0x01, 0x08, 0x17, 0x74, 0x14, 0x7f, 0x01, 0x08, 0x17, 0x74, | ||
13694 | 0x14, 0x12, 0x01, 0x08, | ||
13695 | 0x17, 0x74, 0xfe, 0x89, 0x49, 0x01, 0x08, 0x17, 0x74, 0x14, 0x00, 0x01, | ||
13696 | 0x08, 0x17, 0x74, 0xfe, | ||
13697 | 0x89, 0x4a, 0x01, 0x08, 0x17, 0x74, 0xfe, 0x09, 0x49, 0x01, 0x08, 0x17, | ||
13698 | 0x74, 0x5f, 0xcc, 0x01, | ||
13699 | 0x08, 0x02, 0x21, 0xe4, 0x09, 0x07, 0xfe, 0x4c, 0x13, 0xc8, 0x20, 0xe4, | ||
13700 | 0xfe, 0x49, 0xf4, 0x00, | ||
13701 | 0x4d, 0x5f, 0xa1, 0x5e, 0xfe, 0x01, 0xec, 0xfe, 0x27, 0x01, 0xcc, 0xff, | ||
13702 | 0x02, 0x00, 0x10, 0x2f, | ||
13703 | 0xfe, 0x3e, 0x1a, 0x01, 0x43, 0x09, 0xfe, 0xe3, 0x00, 0xfe, 0x22, 0x13, | ||
13704 | 0x16, 0xfe, 0x64, 0x1a, | ||
13705 | 0x26, 0x20, 0x9e, 0x01, 0x41, 0x21, 0x9e, 0x09, 0x07, 0x5d, 0x01, 0x0c, | ||
13706 | 0x61, 0x07, 0x44, 0x02, | ||
13707 | 0x0a, 0x5a, 0x01, 0x18, 0xfe, 0x00, 0x40, 0xaa, 0x09, 0x1a, 0xfe, 0x12, | ||
13708 | 0x13, 0x0a, 0x9d, 0x01, | ||
13709 | 0x18, 0xaa, 0x0a, 0x67, 0x01, 0xa3, 0x02, 0x0a, 0x9d, 0x01, 0x18, 0xaa, | ||
13710 | 0xfe, 0x80, 0xe7, 0x1a, | ||
13711 | 0x09, 0x1a, 0x5d, 0xfe, 0x45, 0x58, 0x01, 0xfe, 0xb2, 0x16, 0xaa, 0x02, | ||
13712 | 0x0a, 0x5a, 0x01, 0x18, | ||
13713 | 0xaa, 0x0a, 0x67, 0x01, 0xa3, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x01, 0xfe, | ||
13714 | 0x7e, 0x1e, 0xfe, 0x80, | ||
13715 | 0x4c, 0xfe, 0x49, 0xe4, 0x1a, 0xfe, 0x12, 0x13, 0x0a, 0x9d, 0x01, 0x18, | ||
13716 | 0xfe, 0x80, 0x4c, 0x0a, | ||
13717 | 0x67, 0x01, 0x5c, 0x02, 0x1c, 0x1a, 0x87, 0x7c, 0xe5, 0xfe, 0x18, 0xdf, | ||
13718 | 0xfe, 0x19, 0xde, 0xfe, | ||
13719 | 0x24, 0x1c, 0xfe, 0x1d, 0xf7, 0x28, 0xb1, 0xfe, 0x04, 0x1b, 0x01, 0xfe, | ||
13720 | 0x2a, 0x1c, 0xfa, 0xb3, | ||
13721 | 0x28, 0x7c, 0xfe, 0x2c, 0x01, 0xfe, 0x2f, 0x19, 0x02, 0xc9, 0x2b, 0xfe, | ||
13722 | 0xf4, 0x1a, 0xfe, 0xfa, | ||
13723 | 0x10, 0x1c, 0x1a, 0x87, 0x03, 0xfe, 0x64, 0x01, 0xfe, 0x00, 0xf4, 0x24, | ||
13724 | 0xfe, 0x18, 0x58, 0x03, | ||
13725 | 0xfe, 0x66, 0x01, 0xfe, 0x19, 0x58, 0xb3, 0x24, 0x01, 0xfe, 0x0e, 0x1f, | ||
13726 | 0xfe, 0x30, 0xf4, 0x07, | ||
13727 | 0xfe, 0x3c, 0x50, 0x7c, 0xfe, 0x38, 0x00, 0xfe, 0x0f, 0x79, 0xfe, 0x1c, | ||
13728 | 0xf7, 0x24, 0xb1, 0xfe, | ||
13729 | 0x50, 0x1b, 0xfe, 0xd4, 0x14, 0x31, 0x02, 0xc9, 0x2b, 0xfe, 0x26, 0x1b, | ||
13730 | 0xfe, 0xba, 0x10, 0x1c, | ||
13731 | 0x1a, 0x87, 0xfe, 0x83, 0x5a, 0xfe, 0x18, 0xdf, 0xfe, 0x19, 0xde, 0xfe, | ||
13732 | 0x1d, 0xf7, 0x54, 0xb1, | ||
13733 | 0xfe, 0x72, 0x1b, 0xfe, 0xb2, 0x14, 0xfc, 0xb3, 0x54, 0x7c, 0x12, 0xfe, | ||
13734 | 0xaf, 0x19, 0xfe, 0x98, | ||
13735 | 0xe7, 0x00, 0x02, 0xc9, 0x2b, 0xfe, 0x66, 0x1b, 0xfe, 0x8a, 0x10, 0x1c, | ||
13736 | 0x1a, 0x87, 0x8b, 0x0f, | ||
13737 | 0xfe, 0x30, 0x90, 0x04, 0xfe, 0xb0, 0x93, 0x3a, 0x0b, 0xfe, 0x18, 0x58, | ||
13738 | 0xfe, 0x32, 0x90, 0x04, | ||
13739 | 0xfe, 0xb2, 0x93, 0x3a, 0x0b, 0xfe, 0x19, 0x58, 0x0e, 0xa8, 0xb3, 0x4a, | ||
13740 | 0x7c, 0x12, 0xfe, 0x0f, | ||
13741 | 0x79, 0xfe, 0x1c, 0xf7, 0x4a, 0xb1, 0xfe, 0xc6, 0x1b, 0xfe, 0x5e, 0x14, | ||
13742 | 0x31, 0x02, 0xc9, 0x2b, | ||
13743 | 0xfe, 0x96, 0x1b, 0x5c, 0xfe, 0x02, 0xf6, 0x1a, 0x87, 0xfe, 0x18, 0xfe, | ||
13744 | 0x6a, 0xfe, 0x19, 0xfe, | ||
13745 | 0x6b, 0x01, 0xfe, 0x1e, 0x1f, 0xfe, 0x1d, 0xf7, 0x65, 0xb1, 0xfe, 0xee, | ||
13746 | 0x1b, 0xfe, 0x36, 0x14, | ||
13747 | 0xfe, 0x1c, 0x13, 0xb3, 0x65, 0x3e, 0xfe, 0x83, 0x58, 0xfe, 0xaf, 0x19, | ||
13748 | 0xfe, 0x80, 0xe7, 0x1a, | ||
13749 | 0xfe, 0x81, 0xe7, 0x1a, 0x15, 0xfe, 0xdd, 0x00, 0x7a, 0x30, 0x02, 0x7a, | ||
13750 | 0x30, 0xfe, 0x12, 0x45, | ||
13751 | 0x2b, 0xfe, 0xdc, 0x1b, 0x1f, 0x07, 0x47, 0xb5, 0xc3, 0x05, 0x35, 0xfe, | ||
13752 | 0x39, 0xf0, 0x75, 0x26, | ||
13753 | 0x02, 0xfe, 0x7e, 0x18, 0x23, 0x1d, 0x36, 0x13, 0x11, 0x02, 0x87, 0x03, | ||
13754 | 0xe3, 0x23, 0x07, 0xfe, | ||
13755 | 0xef, 0x12, 0xfe, 0xe1, 0x10, 0x90, 0x34, 0x60, 0xfe, 0x02, 0x80, 0x09, | ||
13756 | 0x56, 0xfe, 0x3c, 0x13, | ||
13757 | 0xfe, 0x82, 0x14, 0xfe, 0x42, 0x13, 0x51, 0xfe, 0x06, 0x83, 0x0a, 0x5a, | ||
13758 | 0x01, 0x18, 0xcb, 0xfe, | ||
13759 | 0x3e, 0x12, 0xfe, 0x41, 0x48, 0xfe, 0x45, 0x48, 0x01, 0xfe, 0xb2, 0x16, | ||
13760 | 0xfe, 0x00, 0xcc, 0xcb, | ||
13761 | 0xfe, 0xf3, 0x13, 0x3f, 0x89, 0x09, 0x1a, 0xa5, 0x0a, 0x9d, 0x01, 0x18, | ||
13762 | 0xfe, 0x80, 0x4c, 0x01, | ||
13763 | 0x85, 0xfe, 0x16, 0x10, 0x09, 0x9b, 0x4e, 0xfe, 0x40, 0x14, 0xfe, 0x24, | ||
13764 | 0x12, 0xfe, 0x14, 0x56, | ||
13765 | 0xfe, 0xd6, 0xf0, 0xfe, 0x52, 0x1c, 0x1c, 0x0d, 0x02, 0xfe, 0x9c, 0xe7, | ||
13766 | 0x0d, 0x19, 0xfe, 0x15, | ||
13767 | 0x00, 0x40, 0x8d, 0x30, 0x01, 0xf4, 0x1c, 0x07, 0x02, 0x51, 0xfe, 0x06, | ||
13768 | 0x83, 0xfe, 0x18, 0x80, | ||
13769 | 0x61, 0x28, 0x44, 0x15, 0x56, 0x01, 0x85, 0x1c, 0x07, 0x02, 0xfe, 0x38, | ||
13770 | 0x90, 0xfe, 0xba, 0x90, | ||
13771 | 0x91, 0xde, 0x7e, 0xdf, 0xfe, 0x48, 0x55, 0x31, 0xfe, 0xc9, 0x55, 0x02, | ||
13772 | 0x21, 0xb9, 0x88, 0x20, | ||
13773 | 0xb9, 0x02, 0x0a, 0xba, 0x01, 0x18, 0xfe, 0x41, 0x48, 0x0a, 0x57, 0x01, | ||
13774 | 0x18, 0xfe, 0x49, 0x44, | ||
13775 | 0x1b, 0xfe, 0x1e, 0x1d, 0x88, 0x89, 0x02, 0x0a, 0x5a, 0x01, 0x18, 0x09, | ||
13776 | 0x1a, 0xa4, 0x0a, 0x67, | ||
13777 | 0x01, 0xa3, 0x0a, 0x57, 0x01, 0x18, 0x88, 0x89, 0x02, 0xfe, 0x4e, 0xe4, | ||
13778 | 0x1d, 0x7b, 0xfe, 0x52, | ||
13779 | 0x1d, 0x03, 0xfe, 0x90, 0x00, 0xfe, 0x3a, 0x45, 0xfe, 0x2c, 0x10, 0xfe, | ||
13780 | 0x4e, 0xe4, 0xdd, 0x7b, | ||
13781 | 0xfe, 0x64, 0x1d, 0x03, 0xfe, 0x92, 0x00, 0xd1, 0x12, 0xfe, 0x1a, 0x10, | ||
13782 | 0xfe, 0x4e, 0xe4, 0xfe, | ||
13783 | 0x0b, 0x00, 0x7b, 0xfe, 0x76, 0x1d, 0x03, 0xfe, 0x94, 0x00, 0xd1, 0x24, | ||
13784 | 0xfe, 0x08, 0x10, 0x03, | ||
13785 | 0xfe, 0x96, 0x00, 0xd1, 0x63, 0xfe, 0x4e, 0x45, 0x83, 0xca, 0xff, 0x04, | ||
13786 | 0x68, 0x54, 0xfe, 0xf1, | ||
13787 | 0x10, 0x23, 0x49, 0xfe, 0x08, 0x1c, 0xfe, 0x67, 0x19, 0xfe, 0x0a, 0x1c, | ||
13788 | 0xfe, 0x1a, 0xf4, 0xfe, | ||
13789 | 0x00, 0x04, 0x83, 0xb2, 0x1d, 0x48, 0xfe, 0xaa, 0x1d, 0x13, 0x1d, 0x02, | ||
13790 | 0x09, 0x92, 0xfe, 0x5a, | ||
13791 | 0xf0, 0xfe, 0xba, 0x1d, 0x2e, 0x93, 0xfe, 0x34, 0x10, 0x09, 0x12, 0xfe, | ||
13792 | 0x5a, 0xf0, 0xfe, 0xc8, | ||
13793 | 0x1d, 0x2e, 0xb4, 0xfe, 0x26, 0x10, 0x09, 0x1d, 0x36, 0x2e, 0x63, 0xfe, | ||
13794 | 0x1a, 0x10, 0x09, 0x0d, | ||
13795 | 0x36, 0x2e, 0x94, 0xf2, 0x09, 0x07, 0x36, 0x2e, 0x95, 0xa1, 0xc8, 0x02, | ||
13796 | 0x1f, 0x93, 0x01, 0x42, | ||
13797 | 0xfe, 0x04, 0xfe, 0x99, 0x03, 0x9c, 0x8b, 0x02, 0x2a, 0xfe, 0x1c, 0x1e, | ||
13798 | 0xfe, 0x14, 0xf0, 0x08, | ||
13799 | 0x2f, 0xfe, 0x0c, 0x1e, 0x2a, 0xfe, 0x1c, 0x1e, 0x8f, 0xfe, 0x1c, 0x1e, | ||
13800 | 0xfe, 0x82, 0xf0, 0xfe, | ||
13801 | 0x10, 0x1e, 0x02, 0x0f, 0x3f, 0x04, 0xfe, 0x80, 0x83, 0x33, 0x0b, 0x0e, | ||
13802 | 0x02, 0x0f, 0xfe, 0x18, | ||
13803 | 0x80, 0x04, 0xfe, 0x98, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x02, | ||
13804 | 0x80, 0x04, 0xfe, 0x82, | ||
13805 | 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, 0x80, 0x04, 0xfe, 0x86, | ||
13806 | 0x83, 0x33, 0x0b, 0x0e, | ||
13807 | 0x02, 0x0f, 0xfe, 0x1b, 0x80, 0x04, 0xfe, 0x9b, 0x83, 0x33, 0x0b, 0x0e, | ||
13808 | 0x02, 0x0f, 0xfe, 0x04, | ||
13809 | 0x80, 0x04, 0xfe, 0x84, 0x83, 0x33, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x80, | ||
13810 | 0x80, 0x04, 0xfe, 0x80, | ||
13811 | 0x83, 0xfe, 0xc9, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x19, 0x81, 0x04, | ||
13812 | 0xfe, 0x99, 0x83, 0xfe, | ||
13813 | 0xca, 0x47, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x06, 0x83, 0x04, 0xfe, 0x86, | ||
13814 | 0x83, 0xfe, 0xce, 0x47, | ||
13815 | 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x2c, 0x90, 0x04, 0xfe, 0xac, 0x93, 0x3a, | ||
13816 | 0x0b, 0x0e, 0x02, 0x0f, | ||
13817 | 0xfe, 0xae, 0x90, 0x04, 0xfe, 0xae, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f, | ||
13818 | 0xfe, 0x08, 0x90, 0x04, | ||
13819 | 0xfe, 0x88, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x8a, 0x90, 0x04, | ||
13820 | 0xfe, 0x8a, 0x93, 0x79, | ||
13821 | 0x0b, 0x0e, 0x02, 0x0f, 0xfe, 0x0c, 0x90, 0x04, 0xfe, 0x8c, 0x93, 0x3a, | ||
13822 | 0x0b, 0x0e, 0x02, 0x0f, | ||
13823 | 0xfe, 0x8e, 0x90, 0x04, 0xfe, 0x8e, 0x93, 0x79, 0x0b, 0x0e, 0x02, 0x0f, | ||
13824 | 0xfe, 0x3c, 0x90, 0x04, | ||
13825 | 0xfe, 0xbc, 0x93, 0x3a, 0x0b, 0x0e, 0x02, 0x8b, 0x0f, 0xfe, 0x03, 0x80, | ||
13826 | 0x04, 0xfe, 0x83, 0x83, | ||
13827 | 0x33, 0x0b, 0x77, 0x0e, 0xa8, 0x02, 0xff, 0x66, 0x00, 0x00, | ||
14028 | }; | 13828 | }; |
14029 | 13829 | ||
14030 | STATIC unsigned short _adv_asc38C1600_size = | 13830 | static unsigned short _adv_asc38C1600_size = sizeof(_adv_asc38C1600_buf); /* 0x1673 */ |
14031 | sizeof(_adv_asc38C1600_buf); /* 0x1673 */ | 13831 | static ADV_DCNT _adv_asc38C1600_chksum = 0x0604EF77UL; /* Expanded little-endian checksum. */ |
14032 | STATIC ADV_DCNT _adv_asc38C1600_chksum = | ||
14033 | 0x0604EF77UL; /* Expanded little-endian checksum. */ | ||
14034 | 13832 | ||
14035 | /* a_init.c */ | 13833 | /* a_init.c */ |
14036 | /* | 13834 | /* |
@@ -14049,340 +13847,340 @@ STATIC ADV_DCNT _adv_asc38C1600_chksum = | |||
14049 | * on big-endian platforms so char fields read as words are actually being | 13847 | * on big-endian platforms so char fields read as words are actually being |
14050 | * unswapped on big-endian platforms. | 13848 | * unswapped on big-endian platforms. |
14051 | */ | 13849 | */ |
14052 | STATIC ADVEEP_3550_CONFIG | 13850 | static ADVEEP_3550_CONFIG Default_3550_EEPROM_Config __initdata = { |
14053 | Default_3550_EEPROM_Config __initdata = { | 13851 | ADV_EEPROM_BIOS_ENABLE, /* cfg_lsw */ |
14054 | ADV_EEPROM_BIOS_ENABLE, /* cfg_lsw */ | 13852 | 0x0000, /* cfg_msw */ |
14055 | 0x0000, /* cfg_msw */ | 13853 | 0xFFFF, /* disc_enable */ |
14056 | 0xFFFF, /* disc_enable */ | 13854 | 0xFFFF, /* wdtr_able */ |
14057 | 0xFFFF, /* wdtr_able */ | 13855 | 0xFFFF, /* sdtr_able */ |
14058 | 0xFFFF, /* sdtr_able */ | 13856 | 0xFFFF, /* start_motor */ |
14059 | 0xFFFF, /* start_motor */ | 13857 | 0xFFFF, /* tagqng_able */ |
14060 | 0xFFFF, /* tagqng_able */ | 13858 | 0xFFFF, /* bios_scan */ |
14061 | 0xFFFF, /* bios_scan */ | 13859 | 0, /* scam_tolerant */ |
14062 | 0, /* scam_tolerant */ | 13860 | 7, /* adapter_scsi_id */ |
14063 | 7, /* adapter_scsi_id */ | 13861 | 0, /* bios_boot_delay */ |
14064 | 0, /* bios_boot_delay */ | 13862 | 3, /* scsi_reset_delay */ |
14065 | 3, /* scsi_reset_delay */ | 13863 | 0, /* bios_id_lun */ |
14066 | 0, /* bios_id_lun */ | 13864 | 0, /* termination */ |
14067 | 0, /* termination */ | 13865 | 0, /* reserved1 */ |
14068 | 0, /* reserved1 */ | 13866 | 0xFFE7, /* bios_ctrl */ |
14069 | 0xFFE7, /* bios_ctrl */ | 13867 | 0xFFFF, /* ultra_able */ |
14070 | 0xFFFF, /* ultra_able */ | 13868 | 0, /* reserved2 */ |
14071 | 0, /* reserved2 */ | 13869 | ASC_DEF_MAX_HOST_QNG, /* max_host_qng */ |
14072 | ASC_DEF_MAX_HOST_QNG, /* max_host_qng */ | 13870 | ASC_DEF_MAX_DVC_QNG, /* max_dvc_qng */ |
14073 | ASC_DEF_MAX_DVC_QNG, /* max_dvc_qng */ | 13871 | 0, /* dvc_cntl */ |
14074 | 0, /* dvc_cntl */ | 13872 | 0, /* bug_fix */ |
14075 | 0, /* bug_fix */ | 13873 | 0, /* serial_number_word1 */ |
14076 | 0, /* serial_number_word1 */ | 13874 | 0, /* serial_number_word2 */ |
14077 | 0, /* serial_number_word2 */ | 13875 | 0, /* serial_number_word3 */ |
14078 | 0, /* serial_number_word3 */ | 13876 | 0, /* check_sum */ |
14079 | 0, /* check_sum */ | 13877 | {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} |
14080 | { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }, /* oem_name[16] */ | 13878 | , /* oem_name[16] */ |
14081 | 0, /* dvc_err_code */ | 13879 | 0, /* dvc_err_code */ |
14082 | 0, /* adv_err_code */ | 13880 | 0, /* adv_err_code */ |
14083 | 0, /* adv_err_addr */ | 13881 | 0, /* adv_err_addr */ |
14084 | 0, /* saved_dvc_err_code */ | 13882 | 0, /* saved_dvc_err_code */ |
14085 | 0, /* saved_adv_err_code */ | 13883 | 0, /* saved_adv_err_code */ |
14086 | 0, /* saved_adv_err_addr */ | 13884 | 0, /* saved_adv_err_addr */ |
14087 | 0 /* num_of_err */ | 13885 | 0 /* num_of_err */ |
14088 | }; | 13886 | }; |
14089 | 13887 | ||
14090 | STATIC ADVEEP_3550_CONFIG | 13888 | static ADVEEP_3550_CONFIG ADVEEP_3550_Config_Field_IsChar __initdata = { |
14091 | ADVEEP_3550_Config_Field_IsChar __initdata = { | 13889 | 0, /* cfg_lsw */ |
14092 | 0, /* cfg_lsw */ | 13890 | 0, /* cfg_msw */ |
14093 | 0, /* cfg_msw */ | 13891 | 0, /* -disc_enable */ |
14094 | 0, /* -disc_enable */ | 13892 | 0, /* wdtr_able */ |
14095 | 0, /* wdtr_able */ | 13893 | 0, /* sdtr_able */ |
14096 | 0, /* sdtr_able */ | 13894 | 0, /* start_motor */ |
14097 | 0, /* start_motor */ | 13895 | 0, /* tagqng_able */ |
14098 | 0, /* tagqng_able */ | 13896 | 0, /* bios_scan */ |
14099 | 0, /* bios_scan */ | 13897 | 0, /* scam_tolerant */ |
14100 | 0, /* scam_tolerant */ | 13898 | 1, /* adapter_scsi_id */ |
14101 | 1, /* adapter_scsi_id */ | 13899 | 1, /* bios_boot_delay */ |
14102 | 1, /* bios_boot_delay */ | 13900 | 1, /* scsi_reset_delay */ |
14103 | 1, /* scsi_reset_delay */ | 13901 | 1, /* bios_id_lun */ |
14104 | 1, /* bios_id_lun */ | 13902 | 1, /* termination */ |
14105 | 1, /* termination */ | 13903 | 1, /* reserved1 */ |
14106 | 1, /* reserved1 */ | 13904 | 0, /* bios_ctrl */ |
14107 | 0, /* bios_ctrl */ | 13905 | 0, /* ultra_able */ |
14108 | 0, /* ultra_able */ | 13906 | 0, /* reserved2 */ |
14109 | 0, /* reserved2 */ | 13907 | 1, /* max_host_qng */ |
14110 | 1, /* max_host_qng */ | 13908 | 1, /* max_dvc_qng */ |
14111 | 1, /* max_dvc_qng */ | 13909 | 0, /* dvc_cntl */ |
14112 | 0, /* dvc_cntl */ | 13910 | 0, /* bug_fix */ |
14113 | 0, /* bug_fix */ | 13911 | 0, /* serial_number_word1 */ |
14114 | 0, /* serial_number_word1 */ | 13912 | 0, /* serial_number_word2 */ |
14115 | 0, /* serial_number_word2 */ | 13913 | 0, /* serial_number_word3 */ |
14116 | 0, /* serial_number_word3 */ | 13914 | 0, /* check_sum */ |
14117 | 0, /* check_sum */ | 13915 | {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1} |
14118 | { 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }, /* oem_name[16] */ | 13916 | , /* oem_name[16] */ |
14119 | 0, /* dvc_err_code */ | 13917 | 0, /* dvc_err_code */ |
14120 | 0, /* adv_err_code */ | 13918 | 0, /* adv_err_code */ |
14121 | 0, /* adv_err_addr */ | 13919 | 0, /* adv_err_addr */ |
14122 | 0, /* saved_dvc_err_code */ | 13920 | 0, /* saved_dvc_err_code */ |
14123 | 0, /* saved_adv_err_code */ | 13921 | 0, /* saved_adv_err_code */ |
14124 | 0, /* saved_adv_err_addr */ | 13922 | 0, /* saved_adv_err_addr */ |
14125 | 0 /* num_of_err */ | 13923 | 0 /* num_of_err */ |
14126 | }; | 13924 | }; |
14127 | 13925 | ||
14128 | STATIC ADVEEP_38C0800_CONFIG | 13926 | static ADVEEP_38C0800_CONFIG Default_38C0800_EEPROM_Config __initdata = { |
14129 | Default_38C0800_EEPROM_Config __initdata = { | 13927 | ADV_EEPROM_BIOS_ENABLE, /* 00 cfg_lsw */ |
14130 | ADV_EEPROM_BIOS_ENABLE, /* 00 cfg_lsw */ | 13928 | 0x0000, /* 01 cfg_msw */ |
14131 | 0x0000, /* 01 cfg_msw */ | 13929 | 0xFFFF, /* 02 disc_enable */ |
14132 | 0xFFFF, /* 02 disc_enable */ | 13930 | 0xFFFF, /* 03 wdtr_able */ |
14133 | 0xFFFF, /* 03 wdtr_able */ | 13931 | 0x4444, /* 04 sdtr_speed1 */ |
14134 | 0x4444, /* 04 sdtr_speed1 */ | 13932 | 0xFFFF, /* 05 start_motor */ |
14135 | 0xFFFF, /* 05 start_motor */ | 13933 | 0xFFFF, /* 06 tagqng_able */ |
14136 | 0xFFFF, /* 06 tagqng_able */ | 13934 | 0xFFFF, /* 07 bios_scan */ |
14137 | 0xFFFF, /* 07 bios_scan */ | 13935 | 0, /* 08 scam_tolerant */ |
14138 | 0, /* 08 scam_tolerant */ | 13936 | 7, /* 09 adapter_scsi_id */ |
14139 | 7, /* 09 adapter_scsi_id */ | 13937 | 0, /* bios_boot_delay */ |
14140 | 0, /* bios_boot_delay */ | 13938 | 3, /* 10 scsi_reset_delay */ |
14141 | 3, /* 10 scsi_reset_delay */ | 13939 | 0, /* bios_id_lun */ |
14142 | 0, /* bios_id_lun */ | 13940 | 0, /* 11 termination_se */ |
14143 | 0, /* 11 termination_se */ | 13941 | 0, /* termination_lvd */ |
14144 | 0, /* termination_lvd */ | 13942 | 0xFFE7, /* 12 bios_ctrl */ |
14145 | 0xFFE7, /* 12 bios_ctrl */ | 13943 | 0x4444, /* 13 sdtr_speed2 */ |
14146 | 0x4444, /* 13 sdtr_speed2 */ | 13944 | 0x4444, /* 14 sdtr_speed3 */ |
14147 | 0x4444, /* 14 sdtr_speed3 */ | 13945 | ASC_DEF_MAX_HOST_QNG, /* 15 max_host_qng */ |
14148 | ASC_DEF_MAX_HOST_QNG, /* 15 max_host_qng */ | 13946 | ASC_DEF_MAX_DVC_QNG, /* max_dvc_qng */ |
14149 | ASC_DEF_MAX_DVC_QNG, /* max_dvc_qng */ | 13947 | 0, /* 16 dvc_cntl */ |
14150 | 0, /* 16 dvc_cntl */ | 13948 | 0x4444, /* 17 sdtr_speed4 */ |
14151 | 0x4444, /* 17 sdtr_speed4 */ | 13949 | 0, /* 18 serial_number_word1 */ |
14152 | 0, /* 18 serial_number_word1 */ | 13950 | 0, /* 19 serial_number_word2 */ |
14153 | 0, /* 19 serial_number_word2 */ | 13951 | 0, /* 20 serial_number_word3 */ |
14154 | 0, /* 20 serial_number_word3 */ | 13952 | 0, /* 21 check_sum */ |
14155 | 0, /* 21 check_sum */ | 13953 | {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} |
14156 | { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }, /* 22-29 oem_name[16] */ | 13954 | , /* 22-29 oem_name[16] */ |
14157 | 0, /* 30 dvc_err_code */ | 13955 | 0, /* 30 dvc_err_code */ |
14158 | 0, /* 31 adv_err_code */ | 13956 | 0, /* 31 adv_err_code */ |
14159 | 0, /* 32 adv_err_addr */ | 13957 | 0, /* 32 adv_err_addr */ |
14160 | 0, /* 33 saved_dvc_err_code */ | 13958 | 0, /* 33 saved_dvc_err_code */ |
14161 | 0, /* 34 saved_adv_err_code */ | 13959 | 0, /* 34 saved_adv_err_code */ |
14162 | 0, /* 35 saved_adv_err_addr */ | 13960 | 0, /* 35 saved_adv_err_addr */ |
14163 | 0, /* 36 reserved */ | 13961 | 0, /* 36 reserved */ |
14164 | 0, /* 37 reserved */ | 13962 | 0, /* 37 reserved */ |
14165 | 0, /* 38 reserved */ | 13963 | 0, /* 38 reserved */ |
14166 | 0, /* 39 reserved */ | 13964 | 0, /* 39 reserved */ |
14167 | 0, /* 40 reserved */ | 13965 | 0, /* 40 reserved */ |
14168 | 0, /* 41 reserved */ | 13966 | 0, /* 41 reserved */ |
14169 | 0, /* 42 reserved */ | 13967 | 0, /* 42 reserved */ |
14170 | 0, /* 43 reserved */ | 13968 | 0, /* 43 reserved */ |
14171 | 0, /* 44 reserved */ | 13969 | 0, /* 44 reserved */ |
14172 | 0, /* 45 reserved */ | 13970 | 0, /* 45 reserved */ |
14173 | 0, /* 46 reserved */ | 13971 | 0, /* 46 reserved */ |
14174 | 0, /* 47 reserved */ | 13972 | 0, /* 47 reserved */ |
14175 | 0, /* 48 reserved */ | 13973 | 0, /* 48 reserved */ |
14176 | 0, /* 49 reserved */ | 13974 | 0, /* 49 reserved */ |
14177 | 0, /* 50 reserved */ | 13975 | 0, /* 50 reserved */ |
14178 | 0, /* 51 reserved */ | 13976 | 0, /* 51 reserved */ |
14179 | 0, /* 52 reserved */ | 13977 | 0, /* 52 reserved */ |
14180 | 0, /* 53 reserved */ | 13978 | 0, /* 53 reserved */ |
14181 | 0, /* 54 reserved */ | 13979 | 0, /* 54 reserved */ |
14182 | 0, /* 55 reserved */ | 13980 | 0, /* 55 reserved */ |
14183 | 0, /* 56 cisptr_lsw */ | 13981 | 0, /* 56 cisptr_lsw */ |
14184 | 0, /* 57 cisprt_msw */ | 13982 | 0, /* 57 cisprt_msw */ |
14185 | PCI_VENDOR_ID_ASP, /* 58 subsysvid */ | 13983 | PCI_VENDOR_ID_ASP, /* 58 subsysvid */ |
14186 | PCI_DEVICE_ID_38C0800_REV1, /* 59 subsysid */ | 13984 | PCI_DEVICE_ID_38C0800_REV1, /* 59 subsysid */ |
14187 | 0, /* 60 reserved */ | 13985 | 0, /* 60 reserved */ |
14188 | 0, /* 61 reserved */ | 13986 | 0, /* 61 reserved */ |
14189 | 0, /* 62 reserved */ | 13987 | 0, /* 62 reserved */ |
14190 | 0 /* 63 reserved */ | 13988 | 0 /* 63 reserved */ |
14191 | }; | 13989 | }; |
14192 | 13990 | ||
14193 | STATIC ADVEEP_38C0800_CONFIG | 13991 | static ADVEEP_38C0800_CONFIG ADVEEP_38C0800_Config_Field_IsChar __initdata = { |
14194 | ADVEEP_38C0800_Config_Field_IsChar __initdata = { | 13992 | 0, /* 00 cfg_lsw */ |
14195 | 0, /* 00 cfg_lsw */ | 13993 | 0, /* 01 cfg_msw */ |
14196 | 0, /* 01 cfg_msw */ | 13994 | 0, /* 02 disc_enable */ |
14197 | 0, /* 02 disc_enable */ | 13995 | 0, /* 03 wdtr_able */ |
14198 | 0, /* 03 wdtr_able */ | 13996 | 0, /* 04 sdtr_speed1 */ |
14199 | 0, /* 04 sdtr_speed1 */ | 13997 | 0, /* 05 start_motor */ |
14200 | 0, /* 05 start_motor */ | 13998 | 0, /* 06 tagqng_able */ |
14201 | 0, /* 06 tagqng_able */ | 13999 | 0, /* 07 bios_scan */ |
14202 | 0, /* 07 bios_scan */ | 14000 | 0, /* 08 scam_tolerant */ |
14203 | 0, /* 08 scam_tolerant */ | 14001 | 1, /* 09 adapter_scsi_id */ |
14204 | 1, /* 09 adapter_scsi_id */ | 14002 | 1, /* bios_boot_delay */ |
14205 | 1, /* bios_boot_delay */ | 14003 | 1, /* 10 scsi_reset_delay */ |
14206 | 1, /* 10 scsi_reset_delay */ | 14004 | 1, /* bios_id_lun */ |
14207 | 1, /* bios_id_lun */ | 14005 | 1, /* 11 termination_se */ |
14208 | 1, /* 11 termination_se */ | 14006 | 1, /* termination_lvd */ |
14209 | 1, /* termination_lvd */ | 14007 | 0, /* 12 bios_ctrl */ |
14210 | 0, /* 12 bios_ctrl */ | 14008 | 0, /* 13 sdtr_speed2 */ |
14211 | 0, /* 13 sdtr_speed2 */ | 14009 | 0, /* 14 sdtr_speed3 */ |
14212 | 0, /* 14 sdtr_speed3 */ | 14010 | 1, /* 15 max_host_qng */ |
14213 | 1, /* 15 max_host_qng */ | 14011 | 1, /* max_dvc_qng */ |
14214 | 1, /* max_dvc_qng */ | 14012 | 0, /* 16 dvc_cntl */ |
14215 | 0, /* 16 dvc_cntl */ | 14013 | 0, /* 17 sdtr_speed4 */ |
14216 | 0, /* 17 sdtr_speed4 */ | 14014 | 0, /* 18 serial_number_word1 */ |
14217 | 0, /* 18 serial_number_word1 */ | 14015 | 0, /* 19 serial_number_word2 */ |
14218 | 0, /* 19 serial_number_word2 */ | 14016 | 0, /* 20 serial_number_word3 */ |
14219 | 0, /* 20 serial_number_word3 */ | 14017 | 0, /* 21 check_sum */ |
14220 | 0, /* 21 check_sum */ | 14018 | {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1} |
14221 | { 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }, /* 22-29 oem_name[16] */ | 14019 | , /* 22-29 oem_name[16] */ |
14222 | 0, /* 30 dvc_err_code */ | 14020 | 0, /* 30 dvc_err_code */ |
14223 | 0, /* 31 adv_err_code */ | 14021 | 0, /* 31 adv_err_code */ |
14224 | 0, /* 32 adv_err_addr */ | 14022 | 0, /* 32 adv_err_addr */ |
14225 | 0, /* 33 saved_dvc_err_code */ | 14023 | 0, /* 33 saved_dvc_err_code */ |
14226 | 0, /* 34 saved_adv_err_code */ | 14024 | 0, /* 34 saved_adv_err_code */ |
14227 | 0, /* 35 saved_adv_err_addr */ | 14025 | 0, /* 35 saved_adv_err_addr */ |
14228 | 0, /* 36 reserved */ | 14026 | 0, /* 36 reserved */ |
14229 | 0, /* 37 reserved */ | 14027 | 0, /* 37 reserved */ |
14230 | 0, /* 38 reserved */ | 14028 | 0, /* 38 reserved */ |
14231 | 0, /* 39 reserved */ | 14029 | 0, /* 39 reserved */ |
14232 | 0, /* 40 reserved */ | 14030 | 0, /* 40 reserved */ |
14233 | 0, /* 41 reserved */ | 14031 | 0, /* 41 reserved */ |
14234 | 0, /* 42 reserved */ | 14032 | 0, /* 42 reserved */ |
14235 | 0, /* 43 reserved */ | 14033 | 0, /* 43 reserved */ |
14236 | 0, /* 44 reserved */ | 14034 | 0, /* 44 reserved */ |
14237 | 0, /* 45 reserved */ | 14035 | 0, /* 45 reserved */ |
14238 | 0, /* 46 reserved */ | 14036 | 0, /* 46 reserved */ |
14239 | 0, /* 47 reserved */ | 14037 | 0, /* 47 reserved */ |
14240 | 0, /* 48 reserved */ | 14038 | 0, /* 48 reserved */ |
14241 | 0, /* 49 reserved */ | 14039 | 0, /* 49 reserved */ |
14242 | 0, /* 50 reserved */ | 14040 | 0, /* 50 reserved */ |
14243 | 0, /* 51 reserved */ | 14041 | 0, /* 51 reserved */ |
14244 | 0, /* 52 reserved */ | 14042 | 0, /* 52 reserved */ |
14245 | 0, /* 53 reserved */ | 14043 | 0, /* 53 reserved */ |
14246 | 0, /* 54 reserved */ | 14044 | 0, /* 54 reserved */ |
14247 | 0, /* 55 reserved */ | 14045 | 0, /* 55 reserved */ |
14248 | 0, /* 56 cisptr_lsw */ | 14046 | 0, /* 56 cisptr_lsw */ |
14249 | 0, /* 57 cisprt_msw */ | 14047 | 0, /* 57 cisprt_msw */ |
14250 | 0, /* 58 subsysvid */ | 14048 | 0, /* 58 subsysvid */ |
14251 | 0, /* 59 subsysid */ | 14049 | 0, /* 59 subsysid */ |
14252 | 0, /* 60 reserved */ | 14050 | 0, /* 60 reserved */ |
14253 | 0, /* 61 reserved */ | 14051 | 0, /* 61 reserved */ |
14254 | 0, /* 62 reserved */ | 14052 | 0, /* 62 reserved */ |
14255 | 0 /* 63 reserved */ | 14053 | 0 /* 63 reserved */ |
14256 | }; | 14054 | }; |
14257 | 14055 | ||
14258 | STATIC ADVEEP_38C1600_CONFIG | 14056 | static ADVEEP_38C1600_CONFIG Default_38C1600_EEPROM_Config __initdata = { |
14259 | Default_38C1600_EEPROM_Config __initdata = { | 14057 | ADV_EEPROM_BIOS_ENABLE, /* 00 cfg_lsw */ |
14260 | ADV_EEPROM_BIOS_ENABLE, /* 00 cfg_lsw */ | 14058 | 0x0000, /* 01 cfg_msw */ |
14261 | 0x0000, /* 01 cfg_msw */ | 14059 | 0xFFFF, /* 02 disc_enable */ |
14262 | 0xFFFF, /* 02 disc_enable */ | 14060 | 0xFFFF, /* 03 wdtr_able */ |
14263 | 0xFFFF, /* 03 wdtr_able */ | 14061 | 0x5555, /* 04 sdtr_speed1 */ |
14264 | 0x5555, /* 04 sdtr_speed1 */ | 14062 | 0xFFFF, /* 05 start_motor */ |
14265 | 0xFFFF, /* 05 start_motor */ | 14063 | 0xFFFF, /* 06 tagqng_able */ |
14266 | 0xFFFF, /* 06 tagqng_able */ | 14064 | 0xFFFF, /* 07 bios_scan */ |
14267 | 0xFFFF, /* 07 bios_scan */ | 14065 | 0, /* 08 scam_tolerant */ |
14268 | 0, /* 08 scam_tolerant */ | 14066 | 7, /* 09 adapter_scsi_id */ |
14269 | 7, /* 09 adapter_scsi_id */ | 14067 | 0, /* bios_boot_delay */ |
14270 | 0, /* bios_boot_delay */ | 14068 | 3, /* 10 scsi_reset_delay */ |
14271 | 3, /* 10 scsi_reset_delay */ | 14069 | 0, /* bios_id_lun */ |
14272 | 0, /* bios_id_lun */ | 14070 | 0, /* 11 termination_se */ |
14273 | 0, /* 11 termination_se */ | 14071 | 0, /* termination_lvd */ |
14274 | 0, /* termination_lvd */ | 14072 | 0xFFE7, /* 12 bios_ctrl */ |
14275 | 0xFFE7, /* 12 bios_ctrl */ | 14073 | 0x5555, /* 13 sdtr_speed2 */ |
14276 | 0x5555, /* 13 sdtr_speed2 */ | 14074 | 0x5555, /* 14 sdtr_speed3 */ |
14277 | 0x5555, /* 14 sdtr_speed3 */ | 14075 | ASC_DEF_MAX_HOST_QNG, /* 15 max_host_qng */ |
14278 | ASC_DEF_MAX_HOST_QNG, /* 15 max_host_qng */ | 14076 | ASC_DEF_MAX_DVC_QNG, /* max_dvc_qng */ |
14279 | ASC_DEF_MAX_DVC_QNG, /* max_dvc_qng */ | 14077 | 0, /* 16 dvc_cntl */ |
14280 | 0, /* 16 dvc_cntl */ | 14078 | 0x5555, /* 17 sdtr_speed4 */ |
14281 | 0x5555, /* 17 sdtr_speed4 */ | 14079 | 0, /* 18 serial_number_word1 */ |
14282 | 0, /* 18 serial_number_word1 */ | 14080 | 0, /* 19 serial_number_word2 */ |
14283 | 0, /* 19 serial_number_word2 */ | 14081 | 0, /* 20 serial_number_word3 */ |
14284 | 0, /* 20 serial_number_word3 */ | 14082 | 0, /* 21 check_sum */ |
14285 | 0, /* 21 check_sum */ | 14083 | {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} |
14286 | { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }, /* 22-29 oem_name[16] */ | 14084 | , /* 22-29 oem_name[16] */ |
14287 | 0, /* 30 dvc_err_code */ | 14085 | 0, /* 30 dvc_err_code */ |
14288 | 0, /* 31 adv_err_code */ | 14086 | 0, /* 31 adv_err_code */ |
14289 | 0, /* 32 adv_err_addr */ | 14087 | 0, /* 32 adv_err_addr */ |
14290 | 0, /* 33 saved_dvc_err_code */ | 14088 | 0, /* 33 saved_dvc_err_code */ |
14291 | 0, /* 34 saved_adv_err_code */ | 14089 | 0, /* 34 saved_adv_err_code */ |
14292 | 0, /* 35 saved_adv_err_addr */ | 14090 | 0, /* 35 saved_adv_err_addr */ |
14293 | 0, /* 36 reserved */ | 14091 | 0, /* 36 reserved */ |
14294 | 0, /* 37 reserved */ | 14092 | 0, /* 37 reserved */ |
14295 | 0, /* 38 reserved */ | 14093 | 0, /* 38 reserved */ |
14296 | 0, /* 39 reserved */ | 14094 | 0, /* 39 reserved */ |
14297 | 0, /* 40 reserved */ | 14095 | 0, /* 40 reserved */ |
14298 | 0, /* 41 reserved */ | 14096 | 0, /* 41 reserved */ |
14299 | 0, /* 42 reserved */ | 14097 | 0, /* 42 reserved */ |
14300 | 0, /* 43 reserved */ | 14098 | 0, /* 43 reserved */ |
14301 | 0, /* 44 reserved */ | 14099 | 0, /* 44 reserved */ |
14302 | 0, /* 45 reserved */ | 14100 | 0, /* 45 reserved */ |
14303 | 0, /* 46 reserved */ | 14101 | 0, /* 46 reserved */ |
14304 | 0, /* 47 reserved */ | 14102 | 0, /* 47 reserved */ |
14305 | 0, /* 48 reserved */ | 14103 | 0, /* 48 reserved */ |
14306 | 0, /* 49 reserved */ | 14104 | 0, /* 49 reserved */ |
14307 | 0, /* 50 reserved */ | 14105 | 0, /* 50 reserved */ |
14308 | 0, /* 51 reserved */ | 14106 | 0, /* 51 reserved */ |
14309 | 0, /* 52 reserved */ | 14107 | 0, /* 52 reserved */ |
14310 | 0, /* 53 reserved */ | 14108 | 0, /* 53 reserved */ |
14311 | 0, /* 54 reserved */ | 14109 | 0, /* 54 reserved */ |
14312 | 0, /* 55 reserved */ | 14110 | 0, /* 55 reserved */ |
14313 | 0, /* 56 cisptr_lsw */ | 14111 | 0, /* 56 cisptr_lsw */ |
14314 | 0, /* 57 cisprt_msw */ | 14112 | 0, /* 57 cisprt_msw */ |
14315 | PCI_VENDOR_ID_ASP, /* 58 subsysvid */ | 14113 | PCI_VENDOR_ID_ASP, /* 58 subsysvid */ |
14316 | PCI_DEVICE_ID_38C1600_REV1, /* 59 subsysid */ | 14114 | PCI_DEVICE_ID_38C1600_REV1, /* 59 subsysid */ |
14317 | 0, /* 60 reserved */ | 14115 | 0, /* 60 reserved */ |
14318 | 0, /* 61 reserved */ | 14116 | 0, /* 61 reserved */ |
14319 | 0, /* 62 reserved */ | 14117 | 0, /* 62 reserved */ |
14320 | 0 /* 63 reserved */ | 14118 | 0 /* 63 reserved */ |
14321 | }; | 14119 | }; |
14322 | 14120 | ||
14323 | STATIC ADVEEP_38C1600_CONFIG | 14121 | static ADVEEP_38C1600_CONFIG ADVEEP_38C1600_Config_Field_IsChar __initdata = { |
14324 | ADVEEP_38C1600_Config_Field_IsChar __initdata = { | 14122 | 0, /* 00 cfg_lsw */ |
14325 | 0, /* 00 cfg_lsw */ | 14123 | 0, /* 01 cfg_msw */ |
14326 | 0, /* 01 cfg_msw */ | 14124 | 0, /* 02 disc_enable */ |
14327 | 0, /* 02 disc_enable */ | 14125 | 0, /* 03 wdtr_able */ |
14328 | 0, /* 03 wdtr_able */ | 14126 | 0, /* 04 sdtr_speed1 */ |
14329 | 0, /* 04 sdtr_speed1 */ | 14127 | 0, /* 05 start_motor */ |
14330 | 0, /* 05 start_motor */ | 14128 | 0, /* 06 tagqng_able */ |
14331 | 0, /* 06 tagqng_able */ | 14129 | 0, /* 07 bios_scan */ |
14332 | 0, /* 07 bios_scan */ | 14130 | 0, /* 08 scam_tolerant */ |
14333 | 0, /* 08 scam_tolerant */ | 14131 | 1, /* 09 adapter_scsi_id */ |
14334 | 1, /* 09 adapter_scsi_id */ | 14132 | 1, /* bios_boot_delay */ |
14335 | 1, /* bios_boot_delay */ | 14133 | 1, /* 10 scsi_reset_delay */ |
14336 | 1, /* 10 scsi_reset_delay */ | 14134 | 1, /* bios_id_lun */ |
14337 | 1, /* bios_id_lun */ | 14135 | 1, /* 11 termination_se */ |
14338 | 1, /* 11 termination_se */ | 14136 | 1, /* termination_lvd */ |
14339 | 1, /* termination_lvd */ | 14137 | 0, /* 12 bios_ctrl */ |
14340 | 0, /* 12 bios_ctrl */ | 14138 | 0, /* 13 sdtr_speed2 */ |
14341 | 0, /* 13 sdtr_speed2 */ | 14139 | 0, /* 14 sdtr_speed3 */ |
14342 | 0, /* 14 sdtr_speed3 */ | 14140 | 1, /* 15 max_host_qng */ |
14343 | 1, /* 15 max_host_qng */ | 14141 | 1, /* max_dvc_qng */ |
14344 | 1, /* max_dvc_qng */ | 14142 | 0, /* 16 dvc_cntl */ |
14345 | 0, /* 16 dvc_cntl */ | 14143 | 0, /* 17 sdtr_speed4 */ |
14346 | 0, /* 17 sdtr_speed4 */ | 14144 | 0, /* 18 serial_number_word1 */ |
14347 | 0, /* 18 serial_number_word1 */ | 14145 | 0, /* 19 serial_number_word2 */ |
14348 | 0, /* 19 serial_number_word2 */ | 14146 | 0, /* 20 serial_number_word3 */ |
14349 | 0, /* 20 serial_number_word3 */ | 14147 | 0, /* 21 check_sum */ |
14350 | 0, /* 21 check_sum */ | 14148 | {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1} |
14351 | { 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }, /* 22-29 oem_name[16] */ | 14149 | , /* 22-29 oem_name[16] */ |
14352 | 0, /* 30 dvc_err_code */ | 14150 | 0, /* 30 dvc_err_code */ |
14353 | 0, /* 31 adv_err_code */ | 14151 | 0, /* 31 adv_err_code */ |
14354 | 0, /* 32 adv_err_addr */ | 14152 | 0, /* 32 adv_err_addr */ |
14355 | 0, /* 33 saved_dvc_err_code */ | 14153 | 0, /* 33 saved_dvc_err_code */ |
14356 | 0, /* 34 saved_adv_err_code */ | 14154 | 0, /* 34 saved_adv_err_code */ |
14357 | 0, /* 35 saved_adv_err_addr */ | 14155 | 0, /* 35 saved_adv_err_addr */ |
14358 | 0, /* 36 reserved */ | 14156 | 0, /* 36 reserved */ |
14359 | 0, /* 37 reserved */ | 14157 | 0, /* 37 reserved */ |
14360 | 0, /* 38 reserved */ | 14158 | 0, /* 38 reserved */ |
14361 | 0, /* 39 reserved */ | 14159 | 0, /* 39 reserved */ |
14362 | 0, /* 40 reserved */ | 14160 | 0, /* 40 reserved */ |
14363 | 0, /* 41 reserved */ | 14161 | 0, /* 41 reserved */ |
14364 | 0, /* 42 reserved */ | 14162 | 0, /* 42 reserved */ |
14365 | 0, /* 43 reserved */ | 14163 | 0, /* 43 reserved */ |
14366 | 0, /* 44 reserved */ | 14164 | 0, /* 44 reserved */ |
14367 | 0, /* 45 reserved */ | 14165 | 0, /* 45 reserved */ |
14368 | 0, /* 46 reserved */ | 14166 | 0, /* 46 reserved */ |
14369 | 0, /* 47 reserved */ | 14167 | 0, /* 47 reserved */ |
14370 | 0, /* 48 reserved */ | 14168 | 0, /* 48 reserved */ |
14371 | 0, /* 49 reserved */ | 14169 | 0, /* 49 reserved */ |
14372 | 0, /* 50 reserved */ | 14170 | 0, /* 50 reserved */ |
14373 | 0, /* 51 reserved */ | 14171 | 0, /* 51 reserved */ |
14374 | 0, /* 52 reserved */ | 14172 | 0, /* 52 reserved */ |
14375 | 0, /* 53 reserved */ | 14173 | 0, /* 53 reserved */ |
14376 | 0, /* 54 reserved */ | 14174 | 0, /* 54 reserved */ |
14377 | 0, /* 55 reserved */ | 14175 | 0, /* 55 reserved */ |
14378 | 0, /* 56 cisptr_lsw */ | 14176 | 0, /* 56 cisptr_lsw */ |
14379 | 0, /* 57 cisprt_msw */ | 14177 | 0, /* 57 cisprt_msw */ |
14380 | 0, /* 58 subsysvid */ | 14178 | 0, /* 58 subsysvid */ |
14381 | 0, /* 59 subsysid */ | 14179 | 0, /* 59 subsysid */ |
14382 | 0, /* 60 reserved */ | 14180 | 0, /* 60 reserved */ |
14383 | 0, /* 61 reserved */ | 14181 | 0, /* 61 reserved */ |
14384 | 0, /* 62 reserved */ | 14182 | 0, /* 62 reserved */ |
14385 | 0 /* 63 reserved */ | 14183 | 0 /* 63 reserved */ |
14386 | }; | 14184 | }; |
14387 | 14185 | ||
14388 | /* | 14186 | /* |
@@ -14393,136 +14191,128 @@ ADVEEP_38C1600_Config_Field_IsChar __initdata = { | |||
14393 | * For a non-fatal error return a warning code. If there are no warnings | 14191 | * For a non-fatal error return a warning code. If there are no warnings |
14394 | * then 0 is returned. | 14192 | * then 0 is returned. |
14395 | */ | 14193 | */ |
14396 | STATIC int __init | 14194 | static int __init AdvInitGetConfig(ADV_DVC_VAR *asc_dvc) |
14397 | AdvInitGetConfig(ADV_DVC_VAR *asc_dvc) | ||
14398 | { | 14195 | { |
14399 | ushort warn_code; | 14196 | ushort warn_code; |
14400 | AdvPortAddr iop_base; | 14197 | AdvPortAddr iop_base; |
14401 | uchar pci_cmd_reg; | 14198 | uchar pci_cmd_reg; |
14402 | int status; | 14199 | int status; |
14403 | 14200 | ||
14404 | warn_code = 0; | 14201 | warn_code = 0; |
14405 | asc_dvc->err_code = 0; | 14202 | asc_dvc->err_code = 0; |
14406 | iop_base = asc_dvc->iop_base; | 14203 | iop_base = asc_dvc->iop_base; |
14407 | 14204 | ||
14408 | /* | 14205 | /* |
14409 | * PCI Command Register | 14206 | * PCI Command Register |
14410 | * | 14207 | * |
14411 | * Note: AscPCICmdRegBits_BusMastering definition (0x0007) includes | 14208 | * Note: AscPCICmdRegBits_BusMastering definition (0x0007) includes |
14412 | * I/O Space Control, Memory Space Control and Bus Master Control bits. | 14209 | * I/O Space Control, Memory Space Control and Bus Master Control bits. |
14413 | */ | 14210 | */ |
14414 | 14211 | ||
14415 | if (((pci_cmd_reg = DvcAdvReadPCIConfigByte(asc_dvc, | 14212 | if (((pci_cmd_reg = DvcAdvReadPCIConfigByte(asc_dvc, |
14416 | AscPCIConfigCommandRegister)) | 14213 | AscPCIConfigCommandRegister)) |
14417 | & AscPCICmdRegBits_BusMastering) | 14214 | & AscPCICmdRegBits_BusMastering) |
14418 | != AscPCICmdRegBits_BusMastering) | 14215 | != AscPCICmdRegBits_BusMastering) { |
14419 | { | 14216 | pci_cmd_reg |= AscPCICmdRegBits_BusMastering; |
14420 | pci_cmd_reg |= AscPCICmdRegBits_BusMastering; | 14217 | |
14421 | 14218 | DvcAdvWritePCIConfigByte(asc_dvc, | |
14422 | DvcAdvWritePCIConfigByte(asc_dvc, | 14219 | AscPCIConfigCommandRegister, |
14423 | AscPCIConfigCommandRegister, pci_cmd_reg); | 14220 | pci_cmd_reg); |
14424 | 14221 | ||
14425 | if (((DvcAdvReadPCIConfigByte(asc_dvc, AscPCIConfigCommandRegister)) | 14222 | if (((DvcAdvReadPCIConfigByte |
14426 | & AscPCICmdRegBits_BusMastering) | 14223 | (asc_dvc, AscPCIConfigCommandRegister)) |
14427 | != AscPCICmdRegBits_BusMastering) | 14224 | & AscPCICmdRegBits_BusMastering) |
14428 | { | 14225 | != AscPCICmdRegBits_BusMastering) { |
14429 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; | 14226 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; |
14430 | } | 14227 | } |
14431 | } | 14228 | } |
14432 | |||
14433 | /* | ||
14434 | * PCI Latency Timer | ||
14435 | * | ||
14436 | * If the "latency timer" register is 0x20 or above, then we don't need | ||
14437 | * to change it. Otherwise, set it to 0x20 (i.e. set it to 0x20 if it | ||
14438 | * comes up less than 0x20). | ||
14439 | */ | ||
14440 | if (DvcAdvReadPCIConfigByte(asc_dvc, AscPCIConfigLatencyTimer) < 0x20) { | ||
14441 | DvcAdvWritePCIConfigByte(asc_dvc, AscPCIConfigLatencyTimer, 0x20); | ||
14442 | if (DvcAdvReadPCIConfigByte(asc_dvc, AscPCIConfigLatencyTimer) < 0x20) | ||
14443 | { | ||
14444 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; | ||
14445 | } | ||
14446 | } | ||
14447 | |||
14448 | /* | ||
14449 | * Save the state of the PCI Configuration Command Register | ||
14450 | * "Parity Error Response Control" Bit. If the bit is clear (0), | ||
14451 | * in AdvInitAsc3550/38C0800Driver() tell the microcode to ignore | ||
14452 | * DMA parity errors. | ||
14453 | */ | ||
14454 | asc_dvc->cfg->control_flag = 0; | ||
14455 | if (((DvcAdvReadPCIConfigByte(asc_dvc, AscPCIConfigCommandRegister) | ||
14456 | & AscPCICmdRegBits_ParErrRespCtrl)) == 0) | ||
14457 | { | ||
14458 | asc_dvc->cfg->control_flag |= CONTROL_FLAG_IGNORE_PERR; | ||
14459 | } | ||
14460 | 14229 | ||
14461 | asc_dvc->cfg->lib_version = (ADV_LIB_VERSION_MAJOR << 8) | | 14230 | /* |
14462 | ADV_LIB_VERSION_MINOR; | 14231 | * PCI Latency Timer |
14463 | asc_dvc->cfg->chip_version = | 14232 | * |
14464 | AdvGetChipVersion(iop_base, asc_dvc->bus_type); | 14233 | * If the "latency timer" register is 0x20 or above, then we don't need |
14234 | * to change it. Otherwise, set it to 0x20 (i.e. set it to 0x20 if it | ||
14235 | * comes up less than 0x20). | ||
14236 | */ | ||
14237 | if (DvcAdvReadPCIConfigByte(asc_dvc, AscPCIConfigLatencyTimer) < 0x20) { | ||
14238 | DvcAdvWritePCIConfigByte(asc_dvc, AscPCIConfigLatencyTimer, | ||
14239 | 0x20); | ||
14240 | if (DvcAdvReadPCIConfigByte(asc_dvc, AscPCIConfigLatencyTimer) < | ||
14241 | 0x20) { | ||
14242 | warn_code |= ASC_WARN_SET_PCI_CONFIG_SPACE; | ||
14243 | } | ||
14244 | } | ||
14465 | 14245 | ||
14466 | ASC_DBG2(1, "AdvInitGetConfig: iopb_chip_id_1: 0x%x 0x%x\n", | 14246 | /* |
14467 | (ushort) AdvReadByteRegister(iop_base, IOPB_CHIP_ID_1), | 14247 | * Save the state of the PCI Configuration Command Register |
14468 | (ushort) ADV_CHIP_ID_BYTE); | 14248 | * "Parity Error Response Control" Bit. If the bit is clear (0), |
14249 | * in AdvInitAsc3550/38C0800Driver() tell the microcode to ignore | ||
14250 | * DMA parity errors. | ||
14251 | */ | ||
14252 | asc_dvc->cfg->control_flag = 0; | ||
14253 | if (((DvcAdvReadPCIConfigByte(asc_dvc, AscPCIConfigCommandRegister) | ||
14254 | & AscPCICmdRegBits_ParErrRespCtrl)) == 0) { | ||
14255 | asc_dvc->cfg->control_flag |= CONTROL_FLAG_IGNORE_PERR; | ||
14256 | } | ||
14469 | 14257 | ||
14470 | ASC_DBG2(1, "AdvInitGetConfig: iopw_chip_id_0: 0x%x 0x%x\n", | 14258 | asc_dvc->cfg->lib_version = (ADV_LIB_VERSION_MAJOR << 8) | |
14471 | (ushort) AdvReadWordRegister(iop_base, IOPW_CHIP_ID_0), | 14259 | ADV_LIB_VERSION_MINOR; |
14472 | (ushort) ADV_CHIP_ID_WORD); | 14260 | asc_dvc->cfg->chip_version = |
14261 | AdvGetChipVersion(iop_base, asc_dvc->bus_type); | ||
14262 | |||
14263 | ASC_DBG2(1, "AdvInitGetConfig: iopb_chip_id_1: 0x%x 0x%x\n", | ||
14264 | (ushort)AdvReadByteRegister(iop_base, IOPB_CHIP_ID_1), | ||
14265 | (ushort)ADV_CHIP_ID_BYTE); | ||
14266 | |||
14267 | ASC_DBG2(1, "AdvInitGetConfig: iopw_chip_id_0: 0x%x 0x%x\n", | ||
14268 | (ushort)AdvReadWordRegister(iop_base, IOPW_CHIP_ID_0), | ||
14269 | (ushort)ADV_CHIP_ID_WORD); | ||
14270 | |||
14271 | /* | ||
14272 | * Reset the chip to start and allow register writes. | ||
14273 | */ | ||
14274 | if (AdvFindSignature(iop_base) == 0) { | ||
14275 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; | ||
14276 | return ADV_ERROR; | ||
14277 | } else { | ||
14278 | /* | ||
14279 | * The caller must set 'chip_type' to a valid setting. | ||
14280 | */ | ||
14281 | if (asc_dvc->chip_type != ADV_CHIP_ASC3550 && | ||
14282 | asc_dvc->chip_type != ADV_CHIP_ASC38C0800 && | ||
14283 | asc_dvc->chip_type != ADV_CHIP_ASC38C1600) { | ||
14284 | asc_dvc->err_code |= ASC_IERR_BAD_CHIPTYPE; | ||
14285 | return ADV_ERROR; | ||
14286 | } | ||
14473 | 14287 | ||
14474 | /* | 14288 | /* |
14475 | * Reset the chip to start and allow register writes. | 14289 | * Reset Chip. |
14476 | */ | 14290 | */ |
14477 | if (AdvFindSignature(iop_base) == 0) | 14291 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, |
14478 | { | 14292 | ADV_CTRL_REG_CMD_RESET); |
14479 | asc_dvc->err_code = ASC_IERR_BAD_SIGNATURE; | 14293 | DvcSleepMilliSecond(100); |
14480 | return ADV_ERROR; | 14294 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, |
14481 | } | 14295 | ADV_CTRL_REG_CMD_WR_IO_REG); |
14482 | else { | 14296 | |
14483 | /* | 14297 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) { |
14484 | * The caller must set 'chip_type' to a valid setting. | 14298 | if ((status = |
14485 | */ | 14299 | AdvInitFrom38C1600EEP(asc_dvc)) == ADV_ERROR) { |
14486 | if (asc_dvc->chip_type != ADV_CHIP_ASC3550 && | 14300 | return ADV_ERROR; |
14487 | asc_dvc->chip_type != ADV_CHIP_ASC38C0800 && | 14301 | } |
14488 | asc_dvc->chip_type != ADV_CHIP_ASC38C1600) | 14302 | } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800) { |
14489 | { | 14303 | if ((status = |
14490 | asc_dvc->err_code |= ASC_IERR_BAD_CHIPTYPE; | 14304 | AdvInitFrom38C0800EEP(asc_dvc)) == ADV_ERROR) { |
14491 | return ADV_ERROR; | 14305 | return ADV_ERROR; |
14492 | } | 14306 | } |
14493 | 14307 | } else { | |
14494 | /* | 14308 | if ((status = AdvInitFrom3550EEP(asc_dvc)) == ADV_ERROR) { |
14495 | * Reset Chip. | 14309 | return ADV_ERROR; |
14496 | */ | 14310 | } |
14497 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, | 14311 | } |
14498 | ADV_CTRL_REG_CMD_RESET); | 14312 | warn_code |= status; |
14499 | DvcSleepMilliSecond(100); | 14313 | } |
14500 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, | ||
14501 | ADV_CTRL_REG_CMD_WR_IO_REG); | ||
14502 | |||
14503 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) | ||
14504 | { | ||
14505 | if ((status = AdvInitFrom38C1600EEP(asc_dvc)) == ADV_ERROR) | ||
14506 | { | ||
14507 | return ADV_ERROR; | ||
14508 | } | ||
14509 | } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800) | ||
14510 | { | ||
14511 | if ((status = AdvInitFrom38C0800EEP(asc_dvc)) == ADV_ERROR) | ||
14512 | { | ||
14513 | return ADV_ERROR; | ||
14514 | } | ||
14515 | } else | ||
14516 | { | ||
14517 | if ((status = AdvInitFrom3550EEP(asc_dvc)) == ADV_ERROR) | ||
14518 | { | ||
14519 | return ADV_ERROR; | ||
14520 | } | ||
14521 | } | ||
14522 | warn_code |= status; | ||
14523 | } | ||
14524 | 14314 | ||
14525 | return warn_code; | 14315 | return warn_code; |
14526 | } | 14316 | } |
14527 | 14317 | ||
14528 | /* | 14318 | /* |
@@ -14535,574 +14325,563 @@ AdvInitGetConfig(ADV_DVC_VAR *asc_dvc) | |||
14535 | * | 14325 | * |
14536 | * Needed after initialization for error recovery. | 14326 | * Needed after initialization for error recovery. |
14537 | */ | 14327 | */ |
14538 | STATIC int | 14328 | static int AdvInitAsc3550Driver(ADV_DVC_VAR *asc_dvc) |
14539 | AdvInitAsc3550Driver(ADV_DVC_VAR *asc_dvc) | ||
14540 | { | 14329 | { |
14541 | AdvPortAddr iop_base; | 14330 | AdvPortAddr iop_base; |
14542 | ushort warn_code; | 14331 | ushort warn_code; |
14543 | ADV_DCNT sum; | 14332 | ADV_DCNT sum; |
14544 | int begin_addr; | 14333 | int begin_addr; |
14545 | int end_addr; | 14334 | int end_addr; |
14546 | ushort code_sum; | 14335 | ushort code_sum; |
14547 | int word; | 14336 | int word; |
14548 | int j; | 14337 | int j; |
14549 | int adv_asc3550_expanded_size; | 14338 | int adv_asc3550_expanded_size; |
14550 | ADV_CARR_T *carrp; | 14339 | ADV_CARR_T *carrp; |
14551 | ADV_DCNT contig_len; | 14340 | ADV_DCNT contig_len; |
14552 | ADV_SDCNT buf_size; | 14341 | ADV_SDCNT buf_size; |
14553 | ADV_PADDR carr_paddr; | 14342 | ADV_PADDR carr_paddr; |
14554 | int i; | 14343 | int i; |
14555 | ushort scsi_cfg1; | 14344 | ushort scsi_cfg1; |
14556 | uchar tid; | 14345 | uchar tid; |
14557 | ushort bios_mem[ASC_MC_BIOSLEN/2]; /* BIOS RISC Memory 0x40-0x8F. */ | 14346 | ushort bios_mem[ASC_MC_BIOSLEN / 2]; /* BIOS RISC Memory 0x40-0x8F. */ |
14558 | ushort wdtr_able = 0, sdtr_able, tagqng_able; | 14347 | ushort wdtr_able = 0, sdtr_able, tagqng_able; |
14559 | uchar max_cmd[ADV_MAX_TID + 1]; | 14348 | uchar max_cmd[ADV_MAX_TID + 1]; |
14560 | 14349 | ||
14561 | /* If there is already an error, don't continue. */ | 14350 | /* If there is already an error, don't continue. */ |
14562 | if (asc_dvc->err_code != 0) | 14351 | if (asc_dvc->err_code != 0) { |
14563 | { | 14352 | return ADV_ERROR; |
14564 | return ADV_ERROR; | 14353 | } |
14565 | } | ||
14566 | |||
14567 | /* | ||
14568 | * The caller must set 'chip_type' to ADV_CHIP_ASC3550. | ||
14569 | */ | ||
14570 | if (asc_dvc->chip_type != ADV_CHIP_ASC3550) | ||
14571 | { | ||
14572 | asc_dvc->err_code |= ASC_IERR_BAD_CHIPTYPE; | ||
14573 | return ADV_ERROR; | ||
14574 | } | ||
14575 | |||
14576 | warn_code = 0; | ||
14577 | iop_base = asc_dvc->iop_base; | ||
14578 | |||
14579 | /* | ||
14580 | * Save the RISC memory BIOS region before writing the microcode. | ||
14581 | * The BIOS may already be loaded and using its RISC LRAM region | ||
14582 | * so its region must be saved and restored. | ||
14583 | * | ||
14584 | * Note: This code makes the assumption, which is currently true, | ||
14585 | * that a chip reset does not clear RISC LRAM. | ||
14586 | */ | ||
14587 | for (i = 0; i < ASC_MC_BIOSLEN/2; i++) | ||
14588 | { | ||
14589 | AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), bios_mem[i]); | ||
14590 | } | ||
14591 | |||
14592 | /* | ||
14593 | * Save current per TID negotiated values. | ||
14594 | */ | ||
14595 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM)/2] == 0x55AA) | ||
14596 | { | ||
14597 | ushort bios_version, major, minor; | ||
14598 | |||
14599 | bios_version = bios_mem[(ASC_MC_BIOS_VERSION - ASC_MC_BIOSMEM)/2]; | ||
14600 | major = (bios_version >> 12) & 0xF; | ||
14601 | minor = (bios_version >> 8) & 0xF; | ||
14602 | if (major < 3 || (major == 3 && minor == 1)) | ||
14603 | { | ||
14604 | /* BIOS 3.1 and earlier location of 'wdtr_able' variable. */ | ||
14605 | AdvReadWordLram(iop_base, 0x120, wdtr_able); | ||
14606 | } else | ||
14607 | { | ||
14608 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
14609 | } | ||
14610 | } | ||
14611 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
14612 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | ||
14613 | for (tid = 0; tid <= ADV_MAX_TID; tid++) | ||
14614 | { | ||
14615 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
14616 | max_cmd[tid]); | ||
14617 | } | ||
14618 | |||
14619 | /* | ||
14620 | * Load the Microcode | ||
14621 | * | ||
14622 | * Write the microcode image to RISC memory starting at address 0. | ||
14623 | */ | ||
14624 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | ||
14625 | /* Assume the following compressed format of the microcode buffer: | ||
14626 | * | ||
14627 | * 254 word (508 byte) table indexed by byte code followed | ||
14628 | * by the following byte codes: | ||
14629 | * | ||
14630 | * 1-Byte Code: | ||
14631 | * 00: Emit word 0 in table. | ||
14632 | * 01: Emit word 1 in table. | ||
14633 | * . | ||
14634 | * FD: Emit word 253 in table. | ||
14635 | * | ||
14636 | * Multi-Byte Code: | ||
14637 | * FE WW WW: (3 byte code) Word to emit is the next word WW WW. | ||
14638 | * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW. | ||
14639 | */ | ||
14640 | word = 0; | ||
14641 | for (i = 253 * 2; i < _adv_asc3550_size; i++) | ||
14642 | { | ||
14643 | if (_adv_asc3550_buf[i] == 0xff) | ||
14644 | { | ||
14645 | for (j = 0; j < _adv_asc3550_buf[i + 1]; j++) | ||
14646 | { | ||
14647 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
14648 | _adv_asc3550_buf[i + 3] << 8) | | ||
14649 | _adv_asc3550_buf[i + 2])); | ||
14650 | word++; | ||
14651 | } | ||
14652 | i += 3; | ||
14653 | } else if (_adv_asc3550_buf[i] == 0xfe) | ||
14654 | { | ||
14655 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
14656 | _adv_asc3550_buf[i + 2] << 8) | | ||
14657 | _adv_asc3550_buf[i + 1])); | ||
14658 | i += 2; | ||
14659 | word++; | ||
14660 | } else | ||
14661 | { | ||
14662 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
14663 | _adv_asc3550_buf[(_adv_asc3550_buf[i] * 2) + 1] << 8) | | ||
14664 | _adv_asc3550_buf[_adv_asc3550_buf[i] * 2])); | ||
14665 | word++; | ||
14666 | } | ||
14667 | } | ||
14668 | |||
14669 | /* | ||
14670 | * Set 'word' for later use to clear the rest of memory and save | ||
14671 | * the expanded mcode size. | ||
14672 | */ | ||
14673 | word *= 2; | ||
14674 | adv_asc3550_expanded_size = word; | ||
14675 | |||
14676 | /* | ||
14677 | * Clear the rest of ASC-3550 Internal RAM (8KB). | ||
14678 | */ | ||
14679 | for (; word < ADV_3550_MEMSIZE; word += 2) | ||
14680 | { | ||
14681 | AdvWriteWordAutoIncLram(iop_base, 0); | ||
14682 | } | ||
14683 | |||
14684 | /* | ||
14685 | * Verify the microcode checksum. | ||
14686 | */ | ||
14687 | sum = 0; | ||
14688 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | ||
14689 | |||
14690 | for (word = 0; word < adv_asc3550_expanded_size; word += 2) | ||
14691 | { | ||
14692 | sum += AdvReadWordAutoIncLram(iop_base); | ||
14693 | } | ||
14694 | |||
14695 | if (sum != _adv_asc3550_chksum) | ||
14696 | { | ||
14697 | asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM; | ||
14698 | return ADV_ERROR; | ||
14699 | } | ||
14700 | |||
14701 | /* | ||
14702 | * Restore the RISC memory BIOS region. | ||
14703 | */ | ||
14704 | for (i = 0; i < ASC_MC_BIOSLEN/2; i++) | ||
14705 | { | ||
14706 | AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), bios_mem[i]); | ||
14707 | } | ||
14708 | |||
14709 | /* | ||
14710 | * Calculate and write the microcode code checksum to the microcode | ||
14711 | * code checksum location ASC_MC_CODE_CHK_SUM (0x2C). | ||
14712 | */ | ||
14713 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr); | ||
14714 | AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr); | ||
14715 | code_sum = 0; | ||
14716 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr); | ||
14717 | for (word = begin_addr; word < end_addr; word += 2) | ||
14718 | { | ||
14719 | code_sum += AdvReadWordAutoIncLram(iop_base); | ||
14720 | } | ||
14721 | AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum); | ||
14722 | |||
14723 | /* | ||
14724 | * Read and save microcode version and date. | ||
14725 | */ | ||
14726 | AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE, asc_dvc->cfg->mcode_date); | ||
14727 | AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM, asc_dvc->cfg->mcode_version); | ||
14728 | |||
14729 | /* | ||
14730 | * Set the chip type to indicate the ASC3550. | ||
14731 | */ | ||
14732 | AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC3550); | ||
14733 | |||
14734 | /* | ||
14735 | * If the PCI Configuration Command Register "Parity Error Response | ||
14736 | * Control" Bit was clear (0), then set the microcode variable | ||
14737 | * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode | ||
14738 | * to ignore DMA parity errors. | ||
14739 | */ | ||
14740 | if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) | ||
14741 | { | ||
14742 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
14743 | word |= CONTROL_FLAG_IGNORE_PERR; | ||
14744 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
14745 | } | ||
14746 | |||
14747 | /* | ||
14748 | * For ASC-3550, setting the START_CTL_EMFU [3:2] bits sets a FIFO | ||
14749 | * threshold of 128 bytes. This register is only accessible to the host. | ||
14750 | */ | ||
14751 | AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0, | ||
14752 | START_CTL_EMFU | READ_CMD_MRM); | ||
14753 | |||
14754 | /* | ||
14755 | * Microcode operating variables for WDTR, SDTR, and command tag | ||
14756 | * queuing will be set in AdvInquiryHandling() based on what a | ||
14757 | * device reports it is capable of in Inquiry byte 7. | ||
14758 | * | ||
14759 | * If SCSI Bus Resets have been disabled, then directly set | ||
14760 | * SDTR and WDTR from the EEPROM configuration. This will allow | ||
14761 | * the BIOS and warm boot to work without a SCSI bus hang on | ||
14762 | * the Inquiry caused by host and target mismatched DTR values. | ||
14763 | * Without the SCSI Bus Reset, before an Inquiry a device can't | ||
14764 | * be assumed to be in Asynchronous, Narrow mode. | ||
14765 | */ | ||
14766 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) | ||
14767 | { | ||
14768 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, asc_dvc->wdtr_able); | ||
14769 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, asc_dvc->sdtr_able); | ||
14770 | } | ||
14771 | |||
14772 | /* | ||
14773 | * Set microcode operating variables for SDTR_SPEED1, SDTR_SPEED2, | ||
14774 | * SDTR_SPEED3, and SDTR_SPEED4 based on the ULTRA EEPROM per TID | ||
14775 | * bitmask. These values determine the maximum SDTR speed negotiated | ||
14776 | * with a device. | ||
14777 | * | ||
14778 | * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2, | ||
14779 | * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them | ||
14780 | * without determining here whether the device supports SDTR. | ||
14781 | * | ||
14782 | * 4-bit speed SDTR speed name | ||
14783 | * =========== =============== | ||
14784 | * 0000b (0x0) SDTR disabled | ||
14785 | * 0001b (0x1) 5 Mhz | ||
14786 | * 0010b (0x2) 10 Mhz | ||
14787 | * 0011b (0x3) 20 Mhz (Ultra) | ||
14788 | * 0100b (0x4) 40 Mhz (LVD/Ultra2) | ||
14789 | * 0101b (0x5) 80 Mhz (LVD2/Ultra3) | ||
14790 | * 0110b (0x6) Undefined | ||
14791 | * . | ||
14792 | * 1111b (0xF) Undefined | ||
14793 | */ | ||
14794 | word = 0; | ||
14795 | for (tid = 0; tid <= ADV_MAX_TID; tid++) | ||
14796 | { | ||
14797 | if (ADV_TID_TO_TIDMASK(tid) & asc_dvc->ultra_able) | ||
14798 | { | ||
14799 | /* Set Ultra speed for TID 'tid'. */ | ||
14800 | word |= (0x3 << (4 * (tid % 4))); | ||
14801 | } else | ||
14802 | { | ||
14803 | /* Set Fast speed for TID 'tid'. */ | ||
14804 | word |= (0x2 << (4 * (tid % 4))); | ||
14805 | } | ||
14806 | if (tid == 3) /* Check if done with sdtr_speed1. */ | ||
14807 | { | ||
14808 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, word); | ||
14809 | word = 0; | ||
14810 | } else if (tid == 7) /* Check if done with sdtr_speed2. */ | ||
14811 | { | ||
14812 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, word); | ||
14813 | word = 0; | ||
14814 | } else if (tid == 11) /* Check if done with sdtr_speed3. */ | ||
14815 | { | ||
14816 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, word); | ||
14817 | word = 0; | ||
14818 | } else if (tid == 15) /* Check if done with sdtr_speed4. */ | ||
14819 | { | ||
14820 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, word); | ||
14821 | /* End of loop. */ | ||
14822 | } | ||
14823 | } | ||
14824 | |||
14825 | /* | ||
14826 | * Set microcode operating variable for the disconnect per TID bitmask. | ||
14827 | */ | ||
14828 | AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE, asc_dvc->cfg->disc_enable); | ||
14829 | 14354 | ||
14830 | /* | 14355 | /* |
14831 | * Set SCSI_CFG0 Microcode Default Value. | 14356 | * The caller must set 'chip_type' to ADV_CHIP_ASC3550. |
14832 | * | 14357 | */ |
14833 | * The microcode will set the SCSI_CFG0 register using this value | 14358 | if (asc_dvc->chip_type != ADV_CHIP_ASC3550) { |
14834 | * after it is started below. | 14359 | asc_dvc->err_code |= ASC_IERR_BAD_CHIPTYPE; |
14835 | */ | 14360 | return ADV_ERROR; |
14836 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0, | 14361 | } |
14837 | PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN | | ||
14838 | asc_dvc->chip_scsi_id); | ||
14839 | 14362 | ||
14840 | /* | 14363 | warn_code = 0; |
14841 | * Determine SCSI_CFG1 Microcode Default Value. | 14364 | iop_base = asc_dvc->iop_base; |
14842 | * | 14365 | |
14843 | * The microcode will set the SCSI_CFG1 register using this value | 14366 | /* |
14844 | * after it is started below. | 14367 | * Save the RISC memory BIOS region before writing the microcode. |
14845 | */ | 14368 | * The BIOS may already be loaded and using its RISC LRAM region |
14369 | * so its region must be saved and restored. | ||
14370 | * | ||
14371 | * Note: This code makes the assumption, which is currently true, | ||
14372 | * that a chip reset does not clear RISC LRAM. | ||
14373 | */ | ||
14374 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { | ||
14375 | AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), | ||
14376 | bios_mem[i]); | ||
14377 | } | ||
14846 | 14378 | ||
14847 | /* Read current SCSI_CFG1 Register value. */ | 14379 | /* |
14848 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | 14380 | * Save current per TID negotiated values. |
14381 | */ | ||
14382 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] == 0x55AA) { | ||
14383 | ushort bios_version, major, minor; | ||
14384 | |||
14385 | bios_version = | ||
14386 | bios_mem[(ASC_MC_BIOS_VERSION - ASC_MC_BIOSMEM) / 2]; | ||
14387 | major = (bios_version >> 12) & 0xF; | ||
14388 | minor = (bios_version >> 8) & 0xF; | ||
14389 | if (major < 3 || (major == 3 && minor == 1)) { | ||
14390 | /* BIOS 3.1 and earlier location of 'wdtr_able' variable. */ | ||
14391 | AdvReadWordLram(iop_base, 0x120, wdtr_able); | ||
14392 | } else { | ||
14393 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
14394 | } | ||
14395 | } | ||
14396 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
14397 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | ||
14398 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
14399 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
14400 | max_cmd[tid]); | ||
14401 | } | ||
14849 | 14402 | ||
14850 | /* | 14403 | /* |
14851 | * If all three connectors are in use, return an error. | 14404 | * Load the Microcode |
14852 | */ | 14405 | * |
14853 | if ((scsi_cfg1 & CABLE_ILLEGAL_A) == 0 || | 14406 | * Write the microcode image to RISC memory starting at address 0. |
14854 | (scsi_cfg1 & CABLE_ILLEGAL_B) == 0) | 14407 | */ |
14855 | { | 14408 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); |
14856 | asc_dvc->err_code |= ASC_IERR_ILLEGAL_CONNECTION; | 14409 | /* Assume the following compressed format of the microcode buffer: |
14857 | return ADV_ERROR; | 14410 | * |
14858 | } | 14411 | * 254 word (508 byte) table indexed by byte code followed |
14412 | * by the following byte codes: | ||
14413 | * | ||
14414 | * 1-Byte Code: | ||
14415 | * 00: Emit word 0 in table. | ||
14416 | * 01: Emit word 1 in table. | ||
14417 | * . | ||
14418 | * FD: Emit word 253 in table. | ||
14419 | * | ||
14420 | * Multi-Byte Code: | ||
14421 | * FE WW WW: (3 byte code) Word to emit is the next word WW WW. | ||
14422 | * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW. | ||
14423 | */ | ||
14424 | word = 0; | ||
14425 | for (i = 253 * 2; i < _adv_asc3550_size; i++) { | ||
14426 | if (_adv_asc3550_buf[i] == 0xff) { | ||
14427 | for (j = 0; j < _adv_asc3550_buf[i + 1]; j++) { | ||
14428 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
14429 | _adv_asc3550_buf | ||
14430 | [i + | ||
14431 | 3] << 8) | | ||
14432 | _adv_asc3550_buf | ||
14433 | [i + 2])); | ||
14434 | word++; | ||
14435 | } | ||
14436 | i += 3; | ||
14437 | } else if (_adv_asc3550_buf[i] == 0xfe) { | ||
14438 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
14439 | _adv_asc3550_buf[i + | ||
14440 | 2] | ||
14441 | << 8) | | ||
14442 | _adv_asc3550_buf[i + | ||
14443 | 1])); | ||
14444 | i += 2; | ||
14445 | word++; | ||
14446 | } else { | ||
14447 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
14448 | _adv_asc3550_buf[(_adv_asc3550_buf[i] * 2) + 1] << 8) | _adv_asc3550_buf[_adv_asc3550_buf[i] * 2])); | ||
14449 | word++; | ||
14450 | } | ||
14451 | } | ||
14859 | 14452 | ||
14860 | /* | 14453 | /* |
14861 | * If the internal narrow cable is reversed all of the SCSI_CTRL | 14454 | * Set 'word' for later use to clear the rest of memory and save |
14862 | * register signals will be set. Check for and return an error if | 14455 | * the expanded mcode size. |
14863 | * this condition is found. | 14456 | */ |
14864 | */ | 14457 | word *= 2; |
14865 | if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) | 14458 | adv_asc3550_expanded_size = word; |
14866 | { | 14459 | |
14867 | asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE; | 14460 | /* |
14868 | return ADV_ERROR; | 14461 | * Clear the rest of ASC-3550 Internal RAM (8KB). |
14869 | } | 14462 | */ |
14463 | for (; word < ADV_3550_MEMSIZE; word += 2) { | ||
14464 | AdvWriteWordAutoIncLram(iop_base, 0); | ||
14465 | } | ||
14870 | 14466 | ||
14871 | /* | 14467 | /* |
14872 | * If this is a differential board and a single-ended device | 14468 | * Verify the microcode checksum. |
14873 | * is attached to one of the connectors, return an error. | 14469 | */ |
14874 | */ | 14470 | sum = 0; |
14875 | if ((scsi_cfg1 & DIFF_MODE) && (scsi_cfg1 & DIFF_SENSE) == 0) | 14471 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); |
14876 | { | ||
14877 | asc_dvc->err_code |= ASC_IERR_SINGLE_END_DEVICE; | ||
14878 | return ADV_ERROR; | ||
14879 | } | ||
14880 | 14472 | ||
14881 | /* | 14473 | for (word = 0; word < adv_asc3550_expanded_size; word += 2) { |
14882 | * If automatic termination control is enabled, then set the | 14474 | sum += AdvReadWordAutoIncLram(iop_base); |
14883 | * termination value based on a table listed in a_condor.h. | 14475 | } |
14884 | * | ||
14885 | * If manual termination was specified with an EEPROM setting | ||
14886 | * then 'termination' was set-up in AdvInitFrom3550EEPROM() and | ||
14887 | * is ready to be 'ored' into SCSI_CFG1. | ||
14888 | */ | ||
14889 | if (asc_dvc->cfg->termination == 0) | ||
14890 | { | ||
14891 | /* | ||
14892 | * The software always controls termination by setting TERM_CTL_SEL. | ||
14893 | * If TERM_CTL_SEL were set to 0, the hardware would set termination. | ||
14894 | */ | ||
14895 | asc_dvc->cfg->termination |= TERM_CTL_SEL; | ||
14896 | |||
14897 | switch(scsi_cfg1 & CABLE_DETECT) | ||
14898 | { | ||
14899 | /* TERM_CTL_H: on, TERM_CTL_L: on */ | ||
14900 | case 0x3: case 0x7: case 0xB: case 0xD: case 0xE: case 0xF: | ||
14901 | asc_dvc->cfg->termination |= (TERM_CTL_H | TERM_CTL_L); | ||
14902 | break; | ||
14903 | |||
14904 | /* TERM_CTL_H: on, TERM_CTL_L: off */ | ||
14905 | case 0x1: case 0x5: case 0x9: case 0xA: case 0xC: | ||
14906 | asc_dvc->cfg->termination |= TERM_CTL_H; | ||
14907 | break; | ||
14908 | |||
14909 | /* TERM_CTL_H: off, TERM_CTL_L: off */ | ||
14910 | case 0x2: case 0x6: | ||
14911 | break; | ||
14912 | } | ||
14913 | } | ||
14914 | 14476 | ||
14915 | /* | 14477 | if (sum != _adv_asc3550_chksum) { |
14916 | * Clear any set TERM_CTL_H and TERM_CTL_L bits. | 14478 | asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM; |
14917 | */ | 14479 | return ADV_ERROR; |
14918 | scsi_cfg1 &= ~TERM_CTL; | 14480 | } |
14919 | 14481 | ||
14920 | /* | 14482 | /* |
14921 | * Invert the TERM_CTL_H and TERM_CTL_L bits and then | 14483 | * Restore the RISC memory BIOS region. |
14922 | * set 'scsi_cfg1'. The TERM_POL bit does not need to be | 14484 | */ |
14923 | * referenced, because the hardware internally inverts | 14485 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { |
14924 | * the Termination High and Low bits if TERM_POL is set. | 14486 | AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), |
14925 | */ | 14487 | bios_mem[i]); |
14926 | scsi_cfg1 |= (TERM_CTL_SEL | (~asc_dvc->cfg->termination & TERM_CTL)); | 14488 | } |
14927 | 14489 | ||
14928 | /* | 14490 | /* |
14929 | * Set SCSI_CFG1 Microcode Default Value | 14491 | * Calculate and write the microcode code checksum to the microcode |
14930 | * | 14492 | * code checksum location ASC_MC_CODE_CHK_SUM (0x2C). |
14931 | * Set filter value and possibly modified termination control | 14493 | */ |
14932 | * bits in the Microcode SCSI_CFG1 Register Value. | 14494 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr); |
14933 | * | 14495 | AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr); |
14934 | * The microcode will set the SCSI_CFG1 register using this value | 14496 | code_sum = 0; |
14935 | * after it is started below. | 14497 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr); |
14936 | */ | 14498 | for (word = begin_addr; word < end_addr; word += 2) { |
14937 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, | 14499 | code_sum += AdvReadWordAutoIncLram(iop_base); |
14938 | FLTR_DISABLE | scsi_cfg1); | 14500 | } |
14501 | AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum); | ||
14502 | |||
14503 | /* | ||
14504 | * Read and save microcode version and date. | ||
14505 | */ | ||
14506 | AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE, | ||
14507 | asc_dvc->cfg->mcode_date); | ||
14508 | AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM, | ||
14509 | asc_dvc->cfg->mcode_version); | ||
14510 | |||
14511 | /* | ||
14512 | * Set the chip type to indicate the ASC3550. | ||
14513 | */ | ||
14514 | AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC3550); | ||
14515 | |||
14516 | /* | ||
14517 | * If the PCI Configuration Command Register "Parity Error Response | ||
14518 | * Control" Bit was clear (0), then set the microcode variable | ||
14519 | * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode | ||
14520 | * to ignore DMA parity errors. | ||
14521 | */ | ||
14522 | if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) { | ||
14523 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
14524 | word |= CONTROL_FLAG_IGNORE_PERR; | ||
14525 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
14526 | } | ||
14939 | 14527 | ||
14940 | /* | 14528 | /* |
14941 | * Set MEM_CFG Microcode Default Value | 14529 | * For ASC-3550, setting the START_CTL_EMFU [3:2] bits sets a FIFO |
14942 | * | 14530 | * threshold of 128 bytes. This register is only accessible to the host. |
14943 | * The microcode will set the MEM_CFG register using this value | 14531 | */ |
14944 | * after it is started below. | 14532 | AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0, |
14945 | * | 14533 | START_CTL_EMFU | READ_CMD_MRM); |
14946 | * MEM_CFG may be accessed as a word or byte, but only bits 0-7 | 14534 | |
14947 | * are defined. | 14535 | /* |
14948 | * | 14536 | * Microcode operating variables for WDTR, SDTR, and command tag |
14949 | * ASC-3550 has 8KB internal memory. | 14537 | * queuing will be set in AdvInquiryHandling() based on what a |
14950 | */ | 14538 | * device reports it is capable of in Inquiry byte 7. |
14951 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, | 14539 | * |
14952 | BIOS_EN | RAM_SZ_8KB); | 14540 | * If SCSI Bus Resets have been disabled, then directly set |
14541 | * SDTR and WDTR from the EEPROM configuration. This will allow | ||
14542 | * the BIOS and warm boot to work without a SCSI bus hang on | ||
14543 | * the Inquiry caused by host and target mismatched DTR values. | ||
14544 | * Without the SCSI Bus Reset, before an Inquiry a device can't | ||
14545 | * be assumed to be in Asynchronous, Narrow mode. | ||
14546 | */ | ||
14547 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) { | ||
14548 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, | ||
14549 | asc_dvc->wdtr_able); | ||
14550 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, | ||
14551 | asc_dvc->sdtr_able); | ||
14552 | } | ||
14953 | 14553 | ||
14954 | /* | 14554 | /* |
14955 | * Set SEL_MASK Microcode Default Value | 14555 | * Set microcode operating variables for SDTR_SPEED1, SDTR_SPEED2, |
14956 | * | 14556 | * SDTR_SPEED3, and SDTR_SPEED4 based on the ULTRA EEPROM per TID |
14957 | * The microcode will set the SEL_MASK register using this value | 14557 | * bitmask. These values determine the maximum SDTR speed negotiated |
14958 | * after it is started below. | 14558 | * with a device. |
14959 | */ | 14559 | * |
14960 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK, | 14560 | * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2, |
14961 | ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id)); | 14561 | * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them |
14562 | * without determining here whether the device supports SDTR. | ||
14563 | * | ||
14564 | * 4-bit speed SDTR speed name | ||
14565 | * =========== =============== | ||
14566 | * 0000b (0x0) SDTR disabled | ||
14567 | * 0001b (0x1) 5 Mhz | ||
14568 | * 0010b (0x2) 10 Mhz | ||
14569 | * 0011b (0x3) 20 Mhz (Ultra) | ||
14570 | * 0100b (0x4) 40 Mhz (LVD/Ultra2) | ||
14571 | * 0101b (0x5) 80 Mhz (LVD2/Ultra3) | ||
14572 | * 0110b (0x6) Undefined | ||
14573 | * . | ||
14574 | * 1111b (0xF) Undefined | ||
14575 | */ | ||
14576 | word = 0; | ||
14577 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
14578 | if (ADV_TID_TO_TIDMASK(tid) & asc_dvc->ultra_able) { | ||
14579 | /* Set Ultra speed for TID 'tid'. */ | ||
14580 | word |= (0x3 << (4 * (tid % 4))); | ||
14581 | } else { | ||
14582 | /* Set Fast speed for TID 'tid'. */ | ||
14583 | word |= (0x2 << (4 * (tid % 4))); | ||
14584 | } | ||
14585 | if (tid == 3) { /* Check if done with sdtr_speed1. */ | ||
14586 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, word); | ||
14587 | word = 0; | ||
14588 | } else if (tid == 7) { /* Check if done with sdtr_speed2. */ | ||
14589 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, word); | ||
14590 | word = 0; | ||
14591 | } else if (tid == 11) { /* Check if done with sdtr_speed3. */ | ||
14592 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, word); | ||
14593 | word = 0; | ||
14594 | } else if (tid == 15) { /* Check if done with sdtr_speed4. */ | ||
14595 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, word); | ||
14596 | /* End of loop. */ | ||
14597 | } | ||
14598 | } | ||
14962 | 14599 | ||
14963 | /* | 14600 | /* |
14964 | * Build carrier freelist. | 14601 | * Set microcode operating variable for the disconnect per TID bitmask. |
14965 | * | 14602 | */ |
14966 | * Driver must have already allocated memory and set 'carrier_buf'. | 14603 | AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE, |
14967 | */ | 14604 | asc_dvc->cfg->disc_enable); |
14968 | ASC_ASSERT(asc_dvc->carrier_buf != NULL); | 14605 | |
14969 | 14606 | /* | |
14970 | carrp = (ADV_CARR_T *) ADV_16BALIGN(asc_dvc->carrier_buf); | 14607 | * Set SCSI_CFG0 Microcode Default Value. |
14971 | asc_dvc->carr_freelist = NULL; | 14608 | * |
14972 | if (carrp == (ADV_CARR_T *) asc_dvc->carrier_buf) | 14609 | * The microcode will set the SCSI_CFG0 register using this value |
14973 | { | 14610 | * after it is started below. |
14974 | buf_size = ADV_CARRIER_BUFSIZE; | 14611 | */ |
14975 | } else | 14612 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0, |
14976 | { | 14613 | PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN | |
14977 | buf_size = ADV_CARRIER_BUFSIZE - sizeof(ADV_CARR_T); | 14614 | asc_dvc->chip_scsi_id); |
14978 | } | 14615 | |
14616 | /* | ||
14617 | * Determine SCSI_CFG1 Microcode Default Value. | ||
14618 | * | ||
14619 | * The microcode will set the SCSI_CFG1 register using this value | ||
14620 | * after it is started below. | ||
14621 | */ | ||
14622 | |||
14623 | /* Read current SCSI_CFG1 Register value. */ | ||
14624 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
14625 | |||
14626 | /* | ||
14627 | * If all three connectors are in use, return an error. | ||
14628 | */ | ||
14629 | if ((scsi_cfg1 & CABLE_ILLEGAL_A) == 0 || | ||
14630 | (scsi_cfg1 & CABLE_ILLEGAL_B) == 0) { | ||
14631 | asc_dvc->err_code |= ASC_IERR_ILLEGAL_CONNECTION; | ||
14632 | return ADV_ERROR; | ||
14633 | } | ||
14979 | 14634 | ||
14980 | do { | 14635 | /* |
14981 | /* | 14636 | * If the internal narrow cable is reversed all of the SCSI_CTRL |
14982 | * Get physical address of the carrier 'carrp'. | 14637 | * register signals will be set. Check for and return an error if |
14983 | */ | 14638 | * this condition is found. |
14984 | contig_len = sizeof(ADV_CARR_T); | 14639 | */ |
14985 | carr_paddr = cpu_to_le32(DvcGetPhyAddr(asc_dvc, NULL, (uchar *) carrp, | 14640 | if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) { |
14986 | (ADV_SDCNT *) &contig_len, ADV_IS_CARRIER_FLAG)); | 14641 | asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE; |
14987 | 14642 | return ADV_ERROR; | |
14988 | buf_size -= sizeof(ADV_CARR_T); | 14643 | } |
14989 | |||
14990 | /* | ||
14991 | * If the current carrier is not physically contiguous, then | ||
14992 | * maybe there was a page crossing. Try the next carrier aligned | ||
14993 | * start address. | ||
14994 | */ | ||
14995 | if (contig_len < sizeof(ADV_CARR_T)) | ||
14996 | { | ||
14997 | carrp++; | ||
14998 | continue; | ||
14999 | } | ||
15000 | |||
15001 | carrp->carr_pa = carr_paddr; | ||
15002 | carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp)); | ||
15003 | |||
15004 | /* | ||
15005 | * Insert the carrier at the beginning of the freelist. | ||
15006 | */ | ||
15007 | carrp->next_vpa = cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist)); | ||
15008 | asc_dvc->carr_freelist = carrp; | ||
15009 | |||
15010 | carrp++; | ||
15011 | } | ||
15012 | while (buf_size > 0); | ||
15013 | 14644 | ||
15014 | /* | 14645 | /* |
15015 | * Set-up the Host->RISC Initiator Command Queue (ICQ). | 14646 | * If this is a differential board and a single-ended device |
15016 | */ | 14647 | * is attached to one of the connectors, return an error. |
14648 | */ | ||
14649 | if ((scsi_cfg1 & DIFF_MODE) && (scsi_cfg1 & DIFF_SENSE) == 0) { | ||
14650 | asc_dvc->err_code |= ASC_IERR_SINGLE_END_DEVICE; | ||
14651 | return ADV_ERROR; | ||
14652 | } | ||
15017 | 14653 | ||
15018 | if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) | 14654 | /* |
15019 | { | 14655 | * If automatic termination control is enabled, then set the |
15020 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | 14656 | * termination value based on a table listed in a_condor.h. |
15021 | return ADV_ERROR; | 14657 | * |
15022 | } | 14658 | * If manual termination was specified with an EEPROM setting |
15023 | asc_dvc->carr_freelist = (ADV_CARR_T *) | 14659 | * then 'termination' was set-up in AdvInitFrom3550EEPROM() and |
15024 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa)); | 14660 | * is ready to be 'ored' into SCSI_CFG1. |
14661 | */ | ||
14662 | if (asc_dvc->cfg->termination == 0) { | ||
14663 | /* | ||
14664 | * The software always controls termination by setting TERM_CTL_SEL. | ||
14665 | * If TERM_CTL_SEL were set to 0, the hardware would set termination. | ||
14666 | */ | ||
14667 | asc_dvc->cfg->termination |= TERM_CTL_SEL; | ||
14668 | |||
14669 | switch (scsi_cfg1 & CABLE_DETECT) { | ||
14670 | /* TERM_CTL_H: on, TERM_CTL_L: on */ | ||
14671 | case 0x3: | ||
14672 | case 0x7: | ||
14673 | case 0xB: | ||
14674 | case 0xD: | ||
14675 | case 0xE: | ||
14676 | case 0xF: | ||
14677 | asc_dvc->cfg->termination |= (TERM_CTL_H | TERM_CTL_L); | ||
14678 | break; | ||
14679 | |||
14680 | /* TERM_CTL_H: on, TERM_CTL_L: off */ | ||
14681 | case 0x1: | ||
14682 | case 0x5: | ||
14683 | case 0x9: | ||
14684 | case 0xA: | ||
14685 | case 0xC: | ||
14686 | asc_dvc->cfg->termination |= TERM_CTL_H; | ||
14687 | break; | ||
14688 | |||
14689 | /* TERM_CTL_H: off, TERM_CTL_L: off */ | ||
14690 | case 0x2: | ||
14691 | case 0x6: | ||
14692 | break; | ||
14693 | } | ||
14694 | } | ||
15025 | 14695 | ||
15026 | /* | 14696 | /* |
15027 | * The first command issued will be placed in the stopper carrier. | 14697 | * Clear any set TERM_CTL_H and TERM_CTL_L bits. |
15028 | */ | 14698 | */ |
15029 | asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | 14699 | scsi_cfg1 &= ~TERM_CTL; |
14700 | |||
14701 | /* | ||
14702 | * Invert the TERM_CTL_H and TERM_CTL_L bits and then | ||
14703 | * set 'scsi_cfg1'. The TERM_POL bit does not need to be | ||
14704 | * referenced, because the hardware internally inverts | ||
14705 | * the Termination High and Low bits if TERM_POL is set. | ||
14706 | */ | ||
14707 | scsi_cfg1 |= (TERM_CTL_SEL | (~asc_dvc->cfg->termination & TERM_CTL)); | ||
14708 | |||
14709 | /* | ||
14710 | * Set SCSI_CFG1 Microcode Default Value | ||
14711 | * | ||
14712 | * Set filter value and possibly modified termination control | ||
14713 | * bits in the Microcode SCSI_CFG1 Register Value. | ||
14714 | * | ||
14715 | * The microcode will set the SCSI_CFG1 register using this value | ||
14716 | * after it is started below. | ||
14717 | */ | ||
14718 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, | ||
14719 | FLTR_DISABLE | scsi_cfg1); | ||
14720 | |||
14721 | /* | ||
14722 | * Set MEM_CFG Microcode Default Value | ||
14723 | * | ||
14724 | * The microcode will set the MEM_CFG register using this value | ||
14725 | * after it is started below. | ||
14726 | * | ||
14727 | * MEM_CFG may be accessed as a word or byte, but only bits 0-7 | ||
14728 | * are defined. | ||
14729 | * | ||
14730 | * ASC-3550 has 8KB internal memory. | ||
14731 | */ | ||
14732 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, | ||
14733 | BIOS_EN | RAM_SZ_8KB); | ||
14734 | |||
14735 | /* | ||
14736 | * Set SEL_MASK Microcode Default Value | ||
14737 | * | ||
14738 | * The microcode will set the SEL_MASK register using this value | ||
14739 | * after it is started below. | ||
14740 | */ | ||
14741 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK, | ||
14742 | ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id)); | ||
14743 | |||
14744 | /* | ||
14745 | * Build carrier freelist. | ||
14746 | * | ||
14747 | * Driver must have already allocated memory and set 'carrier_buf'. | ||
14748 | */ | ||
14749 | ASC_ASSERT(asc_dvc->carrier_buf != NULL); | ||
14750 | |||
14751 | carrp = (ADV_CARR_T *) ADV_16BALIGN(asc_dvc->carrier_buf); | ||
14752 | asc_dvc->carr_freelist = NULL; | ||
14753 | if (carrp == (ADV_CARR_T *) asc_dvc->carrier_buf) { | ||
14754 | buf_size = ADV_CARRIER_BUFSIZE; | ||
14755 | } else { | ||
14756 | buf_size = ADV_CARRIER_BUFSIZE - sizeof(ADV_CARR_T); | ||
14757 | } | ||
15030 | 14758 | ||
15031 | /* | 14759 | do { |
15032 | * Set RISC ICQ physical address start value. | 14760 | /* |
15033 | */ | 14761 | * Get physical address of the carrier 'carrp'. |
15034 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa); | 14762 | */ |
14763 | contig_len = sizeof(ADV_CARR_T); | ||
14764 | carr_paddr = | ||
14765 | cpu_to_le32(DvcGetPhyAddr | ||
14766 | (asc_dvc, NULL, (uchar *)carrp, | ||
14767 | (ADV_SDCNT *)&contig_len, | ||
14768 | ADV_IS_CARRIER_FLAG)); | ||
15035 | 14769 | ||
15036 | /* | 14770 | buf_size -= sizeof(ADV_CARR_T); |
15037 | * Set-up the RISC->Host Initiator Response Queue (IRQ). | ||
15038 | */ | ||
15039 | if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) | ||
15040 | { | ||
15041 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | ||
15042 | return ADV_ERROR; | ||
15043 | } | ||
15044 | asc_dvc->carr_freelist = (ADV_CARR_T *) | ||
15045 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa)); | ||
15046 | 14771 | ||
15047 | /* | 14772 | /* |
15048 | * The first command completed by the RISC will be placed in | 14773 | * If the current carrier is not physically contiguous, then |
15049 | * the stopper. | 14774 | * maybe there was a page crossing. Try the next carrier aligned |
15050 | * | 14775 | * start address. |
15051 | * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is | 14776 | */ |
15052 | * completed the RISC will set the ASC_RQ_STOPPER bit. | 14777 | if (contig_len < sizeof(ADV_CARR_T)) { |
15053 | */ | 14778 | carrp++; |
15054 | asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | 14779 | continue; |
15055 | 14780 | } | |
15056 | /* | 14781 | |
15057 | * Set RISC IRQ physical address start value. | 14782 | carrp->carr_pa = carr_paddr; |
15058 | */ | 14783 | carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp)); |
15059 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa); | ||
15060 | asc_dvc->carr_pending_cnt = 0; | ||
15061 | 14784 | ||
15062 | AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES, | 14785 | /* |
15063 | (ADV_INTR_ENABLE_HOST_INTR | ADV_INTR_ENABLE_GLOBAL_INTR)); | 14786 | * Insert the carrier at the beginning of the freelist. |
14787 | */ | ||
14788 | carrp->next_vpa = | ||
14789 | cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist)); | ||
14790 | asc_dvc->carr_freelist = carrp; | ||
15064 | 14791 | ||
15065 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word); | 14792 | carrp++; |
15066 | AdvWriteWordRegister(iop_base, IOPW_PC, word); | 14793 | } |
14794 | while (buf_size > 0); | ||
15067 | 14795 | ||
15068 | /* finally, finally, gentlemen, start your engine */ | 14796 | /* |
15069 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN); | 14797 | * Set-up the Host->RISC Initiator Command Queue (ICQ). |
14798 | */ | ||
15070 | 14799 | ||
15071 | /* | 14800 | if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) { |
15072 | * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus | 14801 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; |
15073 | * Resets should be performed. The RISC has to be running | 14802 | return ADV_ERROR; |
15074 | * to issue a SCSI Bus Reset. | 14803 | } |
15075 | */ | 14804 | asc_dvc->carr_freelist = (ADV_CARR_T *) |
15076 | if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) | 14805 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa)); |
15077 | { | 14806 | |
15078 | /* | 14807 | /* |
15079 | * If the BIOS Signature is present in memory, restore the | 14808 | * The first command issued will be placed in the stopper carrier. |
15080 | * BIOS Handshake Configuration Table and do not perform | 14809 | */ |
15081 | * a SCSI Bus Reset. | 14810 | asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); |
15082 | */ | 14811 | |
15083 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM)/2] == 0x55AA) | 14812 | /* |
15084 | { | 14813 | * Set RISC ICQ physical address start value. |
15085 | /* | 14814 | */ |
15086 | * Restore per TID negotiated values. | 14815 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa); |
15087 | */ | 14816 | |
15088 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | 14817 | /* |
15089 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | 14818 | * Set-up the RISC->Host Initiator Response Queue (IRQ). |
15090 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | 14819 | */ |
15091 | for (tid = 0; tid <= ADV_MAX_TID; tid++) | 14820 | if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) { |
15092 | { | 14821 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; |
15093 | AdvWriteByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | 14822 | return ADV_ERROR; |
15094 | max_cmd[tid]); | 14823 | } |
15095 | } | 14824 | asc_dvc->carr_freelist = (ADV_CARR_T *) |
15096 | } else | 14825 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa)); |
15097 | { | 14826 | |
15098 | if (AdvResetSB(asc_dvc) != ADV_TRUE) | 14827 | /* |
15099 | { | 14828 | * The first command completed by the RISC will be placed in |
15100 | warn_code = ASC_WARN_BUSRESET_ERROR; | 14829 | * the stopper. |
15101 | } | 14830 | * |
15102 | } | 14831 | * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is |
15103 | } | 14832 | * completed the RISC will set the ASC_RQ_STOPPER bit. |
14833 | */ | ||
14834 | asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
14835 | |||
14836 | /* | ||
14837 | * Set RISC IRQ physical address start value. | ||
14838 | */ | ||
14839 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa); | ||
14840 | asc_dvc->carr_pending_cnt = 0; | ||
14841 | |||
14842 | AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES, | ||
14843 | (ADV_INTR_ENABLE_HOST_INTR | | ||
14844 | ADV_INTR_ENABLE_GLOBAL_INTR)); | ||
14845 | |||
14846 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word); | ||
14847 | AdvWriteWordRegister(iop_base, IOPW_PC, word); | ||
14848 | |||
14849 | /* finally, finally, gentlemen, start your engine */ | ||
14850 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN); | ||
14851 | |||
14852 | /* | ||
14853 | * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus | ||
14854 | * Resets should be performed. The RISC has to be running | ||
14855 | * to issue a SCSI Bus Reset. | ||
14856 | */ | ||
14857 | if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) { | ||
14858 | /* | ||
14859 | * If the BIOS Signature is present in memory, restore the | ||
14860 | * BIOS Handshake Configuration Table and do not perform | ||
14861 | * a SCSI Bus Reset. | ||
14862 | */ | ||
14863 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] == | ||
14864 | 0x55AA) { | ||
14865 | /* | ||
14866 | * Restore per TID negotiated values. | ||
14867 | */ | ||
14868 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
14869 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
14870 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, | ||
14871 | tagqng_able); | ||
14872 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
14873 | AdvWriteByteLram(iop_base, | ||
14874 | ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
14875 | max_cmd[tid]); | ||
14876 | } | ||
14877 | } else { | ||
14878 | if (AdvResetSB(asc_dvc) != ADV_TRUE) { | ||
14879 | warn_code = ASC_WARN_BUSRESET_ERROR; | ||
14880 | } | ||
14881 | } | ||
14882 | } | ||
15104 | 14883 | ||
15105 | return warn_code; | 14884 | return warn_code; |
15106 | } | 14885 | } |
15107 | 14886 | ||
15108 | /* | 14887 | /* |
@@ -15115,619 +14894,610 @@ AdvInitAsc3550Driver(ADV_DVC_VAR *asc_dvc) | |||
15115 | * | 14894 | * |
15116 | * Needed after initialization for error recovery. | 14895 | * Needed after initialization for error recovery. |
15117 | */ | 14896 | */ |
15118 | STATIC int | 14897 | static int AdvInitAsc38C0800Driver(ADV_DVC_VAR *asc_dvc) |
15119 | AdvInitAsc38C0800Driver(ADV_DVC_VAR *asc_dvc) | ||
15120 | { | 14898 | { |
15121 | AdvPortAddr iop_base; | 14899 | AdvPortAddr iop_base; |
15122 | ushort warn_code; | 14900 | ushort warn_code; |
15123 | ADV_DCNT sum; | 14901 | ADV_DCNT sum; |
15124 | int begin_addr; | 14902 | int begin_addr; |
15125 | int end_addr; | 14903 | int end_addr; |
15126 | ushort code_sum; | 14904 | ushort code_sum; |
15127 | int word; | 14905 | int word; |
15128 | int j; | 14906 | int j; |
15129 | int adv_asc38C0800_expanded_size; | 14907 | int adv_asc38C0800_expanded_size; |
15130 | ADV_CARR_T *carrp; | 14908 | ADV_CARR_T *carrp; |
15131 | ADV_DCNT contig_len; | 14909 | ADV_DCNT contig_len; |
15132 | ADV_SDCNT buf_size; | 14910 | ADV_SDCNT buf_size; |
15133 | ADV_PADDR carr_paddr; | 14911 | ADV_PADDR carr_paddr; |
15134 | int i; | 14912 | int i; |
15135 | ushort scsi_cfg1; | 14913 | ushort scsi_cfg1; |
15136 | uchar byte; | 14914 | uchar byte; |
15137 | uchar tid; | 14915 | uchar tid; |
15138 | ushort bios_mem[ASC_MC_BIOSLEN/2]; /* BIOS RISC Memory 0x40-0x8F. */ | 14916 | ushort bios_mem[ASC_MC_BIOSLEN / 2]; /* BIOS RISC Memory 0x40-0x8F. */ |
15139 | ushort wdtr_able, sdtr_able, tagqng_able; | 14917 | ushort wdtr_able, sdtr_able, tagqng_able; |
15140 | uchar max_cmd[ADV_MAX_TID + 1]; | 14918 | uchar max_cmd[ADV_MAX_TID + 1]; |
15141 | 14919 | ||
15142 | /* If there is already an error, don't continue. */ | 14920 | /* If there is already an error, don't continue. */ |
15143 | if (asc_dvc->err_code != 0) | 14921 | if (asc_dvc->err_code != 0) { |
15144 | { | 14922 | return ADV_ERROR; |
15145 | return ADV_ERROR; | 14923 | } |
15146 | } | ||
15147 | |||
15148 | /* | ||
15149 | * The caller must set 'chip_type' to ADV_CHIP_ASC38C0800. | ||
15150 | */ | ||
15151 | if (asc_dvc->chip_type != ADV_CHIP_ASC38C0800) | ||
15152 | { | ||
15153 | asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE; | ||
15154 | return ADV_ERROR; | ||
15155 | } | ||
15156 | |||
15157 | warn_code = 0; | ||
15158 | iop_base = asc_dvc->iop_base; | ||
15159 | |||
15160 | /* | ||
15161 | * Save the RISC memory BIOS region before writing the microcode. | ||
15162 | * The BIOS may already be loaded and using its RISC LRAM region | ||
15163 | * so its region must be saved and restored. | ||
15164 | * | ||
15165 | * Note: This code makes the assumption, which is currently true, | ||
15166 | * that a chip reset does not clear RISC LRAM. | ||
15167 | */ | ||
15168 | for (i = 0; i < ASC_MC_BIOSLEN/2; i++) | ||
15169 | { | ||
15170 | AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), bios_mem[i]); | ||
15171 | } | ||
15172 | |||
15173 | /* | ||
15174 | * Save current per TID negotiated values. | ||
15175 | */ | ||
15176 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
15177 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
15178 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | ||
15179 | for (tid = 0; tid <= ADV_MAX_TID; tid++) | ||
15180 | { | ||
15181 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
15182 | max_cmd[tid]); | ||
15183 | } | ||
15184 | |||
15185 | /* | ||
15186 | * RAM BIST (RAM Built-In Self Test) | ||
15187 | * | ||
15188 | * Address : I/O base + offset 0x38h register (byte). | ||
15189 | * Function: Bit 7-6(RW) : RAM mode | ||
15190 | * Normal Mode : 0x00 | ||
15191 | * Pre-test Mode : 0x40 | ||
15192 | * RAM Test Mode : 0x80 | ||
15193 | * Bit 5 : unused | ||
15194 | * Bit 4(RO) : Done bit | ||
15195 | * Bit 3-0(RO) : Status | ||
15196 | * Host Error : 0x08 | ||
15197 | * Int_RAM Error : 0x04 | ||
15198 | * RISC Error : 0x02 | ||
15199 | * SCSI Error : 0x01 | ||
15200 | * No Error : 0x00 | ||
15201 | * | ||
15202 | * Note: RAM BIST code should be put right here, before loading the | ||
15203 | * microcode and after saving the RISC memory BIOS region. | ||
15204 | */ | ||
15205 | |||
15206 | /* | ||
15207 | * LRAM Pre-test | ||
15208 | * | ||
15209 | * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds. | ||
15210 | * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return | ||
15211 | * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset | ||
15212 | * to NORMAL_MODE, return an error too. | ||
15213 | */ | ||
15214 | for (i = 0; i < 2; i++) | ||
15215 | { | ||
15216 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, PRE_TEST_MODE); | ||
15217 | DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */ | ||
15218 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); | ||
15219 | if ((byte & RAM_TEST_DONE) == 0 || (byte & 0x0F) != PRE_TEST_VALUE) | ||
15220 | { | ||
15221 | asc_dvc->err_code |= ASC_IERR_BIST_PRE_TEST; | ||
15222 | return ADV_ERROR; | ||
15223 | } | ||
15224 | |||
15225 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); | ||
15226 | DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */ | ||
15227 | if (AdvReadByteRegister(iop_base, IOPB_RAM_BIST) | ||
15228 | != NORMAL_VALUE) | ||
15229 | { | ||
15230 | asc_dvc->err_code |= ASC_IERR_BIST_PRE_TEST; | ||
15231 | return ADV_ERROR; | ||
15232 | } | ||
15233 | } | ||
15234 | |||
15235 | /* | ||
15236 | * LRAM Test - It takes about 1.5 ms to run through the test. | ||
15237 | * | ||
15238 | * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds. | ||
15239 | * If Done bit not set or Status not 0, save register byte, set the | ||
15240 | * err_code, and return an error. | ||
15241 | */ | ||
15242 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, RAM_TEST_MODE); | ||
15243 | DvcSleepMilliSecond(10); /* Wait for 10ms before checking status. */ | ||
15244 | |||
15245 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); | ||
15246 | if ((byte & RAM_TEST_DONE) == 0 || (byte & RAM_TEST_STATUS) != 0) | ||
15247 | { | ||
15248 | /* Get here if Done bit not set or Status not 0. */ | ||
15249 | asc_dvc->bist_err_code = byte; /* for BIOS display message */ | ||
15250 | asc_dvc->err_code |= ASC_IERR_BIST_RAM_TEST; | ||
15251 | return ADV_ERROR; | ||
15252 | } | ||
15253 | |||
15254 | /* We need to reset back to normal mode after LRAM test passes. */ | ||
15255 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); | ||
15256 | |||
15257 | /* | ||
15258 | * Load the Microcode | ||
15259 | * | ||
15260 | * Write the microcode image to RISC memory starting at address 0. | ||
15261 | * | ||
15262 | */ | ||
15263 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | ||
15264 | |||
15265 | /* Assume the following compressed format of the microcode buffer: | ||
15266 | * | ||
15267 | * 254 word (508 byte) table indexed by byte code followed | ||
15268 | * by the following byte codes: | ||
15269 | * | ||
15270 | * 1-Byte Code: | ||
15271 | * 00: Emit word 0 in table. | ||
15272 | * 01: Emit word 1 in table. | ||
15273 | * . | ||
15274 | * FD: Emit word 253 in table. | ||
15275 | * | ||
15276 | * Multi-Byte Code: | ||
15277 | * FE WW WW: (3 byte code) Word to emit is the next word WW WW. | ||
15278 | * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW. | ||
15279 | */ | ||
15280 | word = 0; | ||
15281 | for (i = 253 * 2; i < _adv_asc38C0800_size; i++) | ||
15282 | { | ||
15283 | if (_adv_asc38C0800_buf[i] == 0xff) | ||
15284 | { | ||
15285 | for (j = 0; j < _adv_asc38C0800_buf[i + 1]; j++) | ||
15286 | { | ||
15287 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
15288 | _adv_asc38C0800_buf[i + 3] << 8) | | ||
15289 | _adv_asc38C0800_buf[i + 2])); | ||
15290 | word++; | ||
15291 | } | ||
15292 | i += 3; | ||
15293 | } else if (_adv_asc38C0800_buf[i] == 0xfe) | ||
15294 | { | ||
15295 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
15296 | _adv_asc38C0800_buf[i + 2] << 8) | | ||
15297 | _adv_asc38C0800_buf[i + 1])); | ||
15298 | i += 2; | ||
15299 | word++; | ||
15300 | } else | ||
15301 | { | ||
15302 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
15303 | _adv_asc38C0800_buf[(_adv_asc38C0800_buf[i] * 2) + 1] << 8) | | ||
15304 | _adv_asc38C0800_buf[_adv_asc38C0800_buf[i] * 2])); | ||
15305 | word++; | ||
15306 | } | ||
15307 | } | ||
15308 | |||
15309 | /* | ||
15310 | * Set 'word' for later use to clear the rest of memory and save | ||
15311 | * the expanded mcode size. | ||
15312 | */ | ||
15313 | word *= 2; | ||
15314 | adv_asc38C0800_expanded_size = word; | ||
15315 | |||
15316 | /* | ||
15317 | * Clear the rest of ASC-38C0800 Internal RAM (16KB). | ||
15318 | */ | ||
15319 | for (; word < ADV_38C0800_MEMSIZE; word += 2) | ||
15320 | { | ||
15321 | AdvWriteWordAutoIncLram(iop_base, 0); | ||
15322 | } | ||
15323 | |||
15324 | /* | ||
15325 | * Verify the microcode checksum. | ||
15326 | */ | ||
15327 | sum = 0; | ||
15328 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | ||
15329 | |||
15330 | for (word = 0; word < adv_asc38C0800_expanded_size; word += 2) | ||
15331 | { | ||
15332 | sum += AdvReadWordAutoIncLram(iop_base); | ||
15333 | } | ||
15334 | ASC_DBG2(1, "AdvInitAsc38C0800Driver: word %d, i %d\n", word, i); | ||
15335 | |||
15336 | ASC_DBG2(1, | ||
15337 | "AdvInitAsc38C0800Driver: sum 0x%lx, _adv_asc38C0800_chksum 0x%lx\n", | ||
15338 | (ulong) sum, (ulong) _adv_asc38C0800_chksum); | ||
15339 | |||
15340 | if (sum != _adv_asc38C0800_chksum) | ||
15341 | { | ||
15342 | asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM; | ||
15343 | return ADV_ERROR; | ||
15344 | } | ||
15345 | |||
15346 | /* | ||
15347 | * Restore the RISC memory BIOS region. | ||
15348 | */ | ||
15349 | for (i = 0; i < ASC_MC_BIOSLEN/2; i++) | ||
15350 | { | ||
15351 | AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), bios_mem[i]); | ||
15352 | } | ||
15353 | |||
15354 | /* | ||
15355 | * Calculate and write the microcode code checksum to the microcode | ||
15356 | * code checksum location ASC_MC_CODE_CHK_SUM (0x2C). | ||
15357 | */ | ||
15358 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr); | ||
15359 | AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr); | ||
15360 | code_sum = 0; | ||
15361 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr); | ||
15362 | for (word = begin_addr; word < end_addr; word += 2) | ||
15363 | { | ||
15364 | code_sum += AdvReadWordAutoIncLram(iop_base); | ||
15365 | } | ||
15366 | AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum); | ||
15367 | |||
15368 | /* | ||
15369 | * Read microcode version and date. | ||
15370 | */ | ||
15371 | AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE, asc_dvc->cfg->mcode_date); | ||
15372 | AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM, asc_dvc->cfg->mcode_version); | ||
15373 | |||
15374 | /* | ||
15375 | * Set the chip type to indicate the ASC38C0800. | ||
15376 | */ | ||
15377 | AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC38C0800); | ||
15378 | |||
15379 | /* | ||
15380 | * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register. | ||
15381 | * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current | ||
15382 | * cable detection and then we are able to read C_DET[3:0]. | ||
15383 | * | ||
15384 | * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1 | ||
15385 | * Microcode Default Value' section below. | ||
15386 | */ | ||
15387 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
15388 | AdvWriteWordRegister(iop_base, IOPW_SCSI_CFG1, scsi_cfg1 | DIS_TERM_DRV); | ||
15389 | |||
15390 | /* | ||
15391 | * If the PCI Configuration Command Register "Parity Error Response | ||
15392 | * Control" Bit was clear (0), then set the microcode variable | ||
15393 | * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode | ||
15394 | * to ignore DMA parity errors. | ||
15395 | */ | ||
15396 | if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) | ||
15397 | { | ||
15398 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
15399 | word |= CONTROL_FLAG_IGNORE_PERR; | ||
15400 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
15401 | } | ||
15402 | |||
15403 | /* | ||
15404 | * For ASC-38C0800, set FIFO_THRESH_80B [6:4] bits and START_CTL_TH [3:2] | ||
15405 | * bits for the default FIFO threshold. | ||
15406 | * | ||
15407 | * Note: ASC-38C0800 FIFO threshold has been changed to 256 bytes. | ||
15408 | * | ||
15409 | * For DMA Errata #4 set the BC_THRESH_ENB bit. | ||
15410 | */ | ||
15411 | AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0, | ||
15412 | BC_THRESH_ENB | FIFO_THRESH_80B | START_CTL_TH | READ_CMD_MRM); | ||
15413 | |||
15414 | /* | ||
15415 | * Microcode operating variables for WDTR, SDTR, and command tag | ||
15416 | * queuing will be set in AdvInquiryHandling() based on what a | ||
15417 | * device reports it is capable of in Inquiry byte 7. | ||
15418 | * | ||
15419 | * If SCSI Bus Resets have been disabled, then directly set | ||
15420 | * SDTR and WDTR from the EEPROM configuration. This will allow | ||
15421 | * the BIOS and warm boot to work without a SCSI bus hang on | ||
15422 | * the Inquiry caused by host and target mismatched DTR values. | ||
15423 | * Without the SCSI Bus Reset, before an Inquiry a device can't | ||
15424 | * be assumed to be in Asynchronous, Narrow mode. | ||
15425 | */ | ||
15426 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) | ||
15427 | { | ||
15428 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, asc_dvc->wdtr_able); | ||
15429 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, asc_dvc->sdtr_able); | ||
15430 | } | ||
15431 | |||
15432 | /* | ||
15433 | * Set microcode operating variables for DISC and SDTR_SPEED1, | ||
15434 | * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM | ||
15435 | * configuration values. | ||
15436 | * | ||
15437 | * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2, | ||
15438 | * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them | ||
15439 | * without determining here whether the device supports SDTR. | ||
15440 | */ | ||
15441 | AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE, asc_dvc->cfg->disc_enable); | ||
15442 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, asc_dvc->sdtr_speed1); | ||
15443 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, asc_dvc->sdtr_speed2); | ||
15444 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, asc_dvc->sdtr_speed3); | ||
15445 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, asc_dvc->sdtr_speed4); | ||
15446 | 14924 | ||
15447 | /* | 14925 | /* |
15448 | * Set SCSI_CFG0 Microcode Default Value. | 14926 | * The caller must set 'chip_type' to ADV_CHIP_ASC38C0800. |
15449 | * | 14927 | */ |
15450 | * The microcode will set the SCSI_CFG0 register using this value | 14928 | if (asc_dvc->chip_type != ADV_CHIP_ASC38C0800) { |
15451 | * after it is started below. | 14929 | asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE; |
15452 | */ | 14930 | return ADV_ERROR; |
15453 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0, | 14931 | } |
15454 | PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN | | ||
15455 | asc_dvc->chip_scsi_id); | ||
15456 | 14932 | ||
15457 | /* | 14933 | warn_code = 0; |
15458 | * Determine SCSI_CFG1 Microcode Default Value. | 14934 | iop_base = asc_dvc->iop_base; |
15459 | * | 14935 | |
15460 | * The microcode will set the SCSI_CFG1 register using this value | 14936 | /* |
15461 | * after it is started below. | 14937 | * Save the RISC memory BIOS region before writing the microcode. |
15462 | */ | 14938 | * The BIOS may already be loaded and using its RISC LRAM region |
14939 | * so its region must be saved and restored. | ||
14940 | * | ||
14941 | * Note: This code makes the assumption, which is currently true, | ||
14942 | * that a chip reset does not clear RISC LRAM. | ||
14943 | */ | ||
14944 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { | ||
14945 | AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), | ||
14946 | bios_mem[i]); | ||
14947 | } | ||
15463 | 14948 | ||
15464 | /* Read current SCSI_CFG1 Register value. */ | 14949 | /* |
15465 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | 14950 | * Save current per TID negotiated values. |
14951 | */ | ||
14952 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
14953 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
14954 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | ||
14955 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
14956 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
14957 | max_cmd[tid]); | ||
14958 | } | ||
15466 | 14959 | ||
15467 | /* | 14960 | /* |
15468 | * If the internal narrow cable is reversed all of the SCSI_CTRL | 14961 | * RAM BIST (RAM Built-In Self Test) |
15469 | * register signals will be set. Check for and return an error if | 14962 | * |
15470 | * this condition is found. | 14963 | * Address : I/O base + offset 0x38h register (byte). |
15471 | */ | 14964 | * Function: Bit 7-6(RW) : RAM mode |
15472 | if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) | 14965 | * Normal Mode : 0x00 |
15473 | { | 14966 | * Pre-test Mode : 0x40 |
15474 | asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE; | 14967 | * RAM Test Mode : 0x80 |
15475 | return ADV_ERROR; | 14968 | * Bit 5 : unused |
15476 | } | 14969 | * Bit 4(RO) : Done bit |
14970 | * Bit 3-0(RO) : Status | ||
14971 | * Host Error : 0x08 | ||
14972 | * Int_RAM Error : 0x04 | ||
14973 | * RISC Error : 0x02 | ||
14974 | * SCSI Error : 0x01 | ||
14975 | * No Error : 0x00 | ||
14976 | * | ||
14977 | * Note: RAM BIST code should be put right here, before loading the | ||
14978 | * microcode and after saving the RISC memory BIOS region. | ||
14979 | */ | ||
14980 | |||
14981 | /* | ||
14982 | * LRAM Pre-test | ||
14983 | * | ||
14984 | * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds. | ||
14985 | * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return | ||
14986 | * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset | ||
14987 | * to NORMAL_MODE, return an error too. | ||
14988 | */ | ||
14989 | for (i = 0; i < 2; i++) { | ||
14990 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, PRE_TEST_MODE); | ||
14991 | DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */ | ||
14992 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); | ||
14993 | if ((byte & RAM_TEST_DONE) == 0 | ||
14994 | || (byte & 0x0F) != PRE_TEST_VALUE) { | ||
14995 | asc_dvc->err_code |= ASC_IERR_BIST_PRE_TEST; | ||
14996 | return ADV_ERROR; | ||
14997 | } | ||
14998 | |||
14999 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); | ||
15000 | DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */ | ||
15001 | if (AdvReadByteRegister(iop_base, IOPB_RAM_BIST) | ||
15002 | != NORMAL_VALUE) { | ||
15003 | asc_dvc->err_code |= ASC_IERR_BIST_PRE_TEST; | ||
15004 | return ADV_ERROR; | ||
15005 | } | ||
15006 | } | ||
15477 | 15007 | ||
15478 | /* | 15008 | /* |
15479 | * All kind of combinations of devices attached to one of four connectors | 15009 | * LRAM Test - It takes about 1.5 ms to run through the test. |
15480 | * are acceptable except HVD device attached. For example, LVD device can | 15010 | * |
15481 | * be attached to SE connector while SE device attached to LVD connector. | 15011 | * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds. |
15482 | * If LVD device attached to SE connector, it only runs up to Ultra speed. | 15012 | * If Done bit not set or Status not 0, save register byte, set the |
15483 | * | 15013 | * err_code, and return an error. |
15484 | * If an HVD device is attached to one of LVD connectors, return an error. | 15014 | */ |
15485 | * However, there is no way to detect HVD device attached to SE connectors. | 15015 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, RAM_TEST_MODE); |
15486 | */ | 15016 | DvcSleepMilliSecond(10); /* Wait for 10ms before checking status. */ |
15487 | if (scsi_cfg1 & HVD) | 15017 | |
15488 | { | 15018 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); |
15489 | asc_dvc->err_code |= ASC_IERR_HVD_DEVICE; | 15019 | if ((byte & RAM_TEST_DONE) == 0 || (byte & RAM_TEST_STATUS) != 0) { |
15490 | return ADV_ERROR; | 15020 | /* Get here if Done bit not set or Status not 0. */ |
15491 | } | 15021 | asc_dvc->bist_err_code = byte; /* for BIOS display message */ |
15022 | asc_dvc->err_code |= ASC_IERR_BIST_RAM_TEST; | ||
15023 | return ADV_ERROR; | ||
15024 | } | ||
15492 | 15025 | ||
15493 | /* | 15026 | /* We need to reset back to normal mode after LRAM test passes. */ |
15494 | * If either SE or LVD automatic termination control is enabled, then | 15027 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); |
15495 | * set the termination value based on a table listed in a_condor.h. | 15028 | |
15496 | * | 15029 | /* |
15497 | * If manual termination was specified with an EEPROM setting then | 15030 | * Load the Microcode |
15498 | * 'termination' was set-up in AdvInitFrom38C0800EEPROM() and is ready to | 15031 | * |
15499 | * be 'ored' into SCSI_CFG1. | 15032 | * Write the microcode image to RISC memory starting at address 0. |
15500 | */ | 15033 | * |
15501 | if ((asc_dvc->cfg->termination & TERM_SE) == 0) | 15034 | */ |
15502 | { | 15035 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); |
15503 | /* SE automatic termination control is enabled. */ | 15036 | |
15504 | switch(scsi_cfg1 & C_DET_SE) | 15037 | /* Assume the following compressed format of the microcode buffer: |
15505 | { | 15038 | * |
15506 | /* TERM_SE_HI: on, TERM_SE_LO: on */ | 15039 | * 254 word (508 byte) table indexed by byte code followed |
15507 | case 0x1: case 0x2: case 0x3: | 15040 | * by the following byte codes: |
15508 | asc_dvc->cfg->termination |= TERM_SE; | 15041 | * |
15509 | break; | 15042 | * 1-Byte Code: |
15510 | 15043 | * 00: Emit word 0 in table. | |
15511 | /* TERM_SE_HI: on, TERM_SE_LO: off */ | 15044 | * 01: Emit word 1 in table. |
15512 | case 0x0: | 15045 | * . |
15513 | asc_dvc->cfg->termination |= TERM_SE_HI; | 15046 | * FD: Emit word 253 in table. |
15514 | break; | 15047 | * |
15515 | } | 15048 | * Multi-Byte Code: |
15516 | } | 15049 | * FE WW WW: (3 byte code) Word to emit is the next word WW WW. |
15050 | * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW. | ||
15051 | */ | ||
15052 | word = 0; | ||
15053 | for (i = 253 * 2; i < _adv_asc38C0800_size; i++) { | ||
15054 | if (_adv_asc38C0800_buf[i] == 0xff) { | ||
15055 | for (j = 0; j < _adv_asc38C0800_buf[i + 1]; j++) { | ||
15056 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
15057 | _adv_asc38C0800_buf | ||
15058 | [i + | ||
15059 | 3] << 8) | | ||
15060 | _adv_asc38C0800_buf | ||
15061 | [i + 2])); | ||
15062 | word++; | ||
15063 | } | ||
15064 | i += 3; | ||
15065 | } else if (_adv_asc38C0800_buf[i] == 0xfe) { | ||
15066 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
15067 | _adv_asc38C0800_buf | ||
15068 | [i + | ||
15069 | 2] << 8) | | ||
15070 | _adv_asc38C0800_buf[i | ||
15071 | + | ||
15072 | 1])); | ||
15073 | i += 2; | ||
15074 | word++; | ||
15075 | } else { | ||
15076 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
15077 | _adv_asc38C0800_buf[(_adv_asc38C0800_buf[i] * 2) + 1] << 8) | _adv_asc38C0800_buf[_adv_asc38C0800_buf[i] * 2])); | ||
15078 | word++; | ||
15079 | } | ||
15080 | } | ||
15517 | 15081 | ||
15518 | if ((asc_dvc->cfg->termination & TERM_LVD) == 0) | 15082 | /* |
15519 | { | 15083 | * Set 'word' for later use to clear the rest of memory and save |
15520 | /* LVD automatic termination control is enabled. */ | 15084 | * the expanded mcode size. |
15521 | switch(scsi_cfg1 & C_DET_LVD) | 15085 | */ |
15522 | { | 15086 | word *= 2; |
15523 | /* TERM_LVD_HI: on, TERM_LVD_LO: on */ | 15087 | adv_asc38C0800_expanded_size = word; |
15524 | case 0x4: case 0x8: case 0xC: | 15088 | |
15525 | asc_dvc->cfg->termination |= TERM_LVD; | 15089 | /* |
15526 | break; | 15090 | * Clear the rest of ASC-38C0800 Internal RAM (16KB). |
15527 | 15091 | */ | |
15528 | /* TERM_LVD_HI: off, TERM_LVD_LO: off */ | 15092 | for (; word < ADV_38C0800_MEMSIZE; word += 2) { |
15529 | case 0x0: | 15093 | AdvWriteWordAutoIncLram(iop_base, 0); |
15530 | break; | 15094 | } |
15531 | } | ||
15532 | } | ||
15533 | 15095 | ||
15534 | /* | 15096 | /* |
15535 | * Clear any set TERM_SE and TERM_LVD bits. | 15097 | * Verify the microcode checksum. |
15536 | */ | 15098 | */ |
15537 | scsi_cfg1 &= (~TERM_SE & ~TERM_LVD); | 15099 | sum = 0; |
15100 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | ||
15538 | 15101 | ||
15539 | /* | 15102 | for (word = 0; word < adv_asc38C0800_expanded_size; word += 2) { |
15540 | * Invert the TERM_SE and TERM_LVD bits and then set 'scsi_cfg1'. | 15103 | sum += AdvReadWordAutoIncLram(iop_base); |
15541 | */ | 15104 | } |
15542 | scsi_cfg1 |= (~asc_dvc->cfg->termination & 0xF0); | 15105 | ASC_DBG2(1, "AdvInitAsc38C0800Driver: word %d, i %d\n", word, i); |
15543 | 15106 | ||
15544 | /* | 15107 | ASC_DBG2(1, |
15545 | * Clear BIG_ENDIAN, DIS_TERM_DRV, Terminator Polarity and HVD/LVD/SE bits | 15108 | "AdvInitAsc38C0800Driver: sum 0x%lx, _adv_asc38C0800_chksum 0x%lx\n", |
15546 | * and set possibly modified termination control bits in the Microcode | 15109 | (ulong)sum, (ulong)_adv_asc38C0800_chksum); |
15547 | * SCSI_CFG1 Register Value. | ||
15548 | */ | ||
15549 | scsi_cfg1 &= (~BIG_ENDIAN & ~DIS_TERM_DRV & ~TERM_POL & ~HVD_LVD_SE); | ||
15550 | 15110 | ||
15551 | /* | 15111 | if (sum != _adv_asc38C0800_chksum) { |
15552 | * Set SCSI_CFG1 Microcode Default Value | 15112 | asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM; |
15553 | * | 15113 | return ADV_ERROR; |
15554 | * Set possibly modified termination control and reset DIS_TERM_DRV | 15114 | } |
15555 | * bits in the Microcode SCSI_CFG1 Register Value. | ||
15556 | * | ||
15557 | * The microcode will set the SCSI_CFG1 register using this value | ||
15558 | * after it is started below. | ||
15559 | */ | ||
15560 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, scsi_cfg1); | ||
15561 | 15115 | ||
15562 | /* | 15116 | /* |
15563 | * Set MEM_CFG Microcode Default Value | 15117 | * Restore the RISC memory BIOS region. |
15564 | * | 15118 | */ |
15565 | * The microcode will set the MEM_CFG register using this value | 15119 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { |
15566 | * after it is started below. | 15120 | AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), |
15567 | * | 15121 | bios_mem[i]); |
15568 | * MEM_CFG may be accessed as a word or byte, but only bits 0-7 | 15122 | } |
15569 | * are defined. | ||
15570 | * | ||
15571 | * ASC-38C0800 has 16KB internal memory. | ||
15572 | */ | ||
15573 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, | ||
15574 | BIOS_EN | RAM_SZ_16KB); | ||
15575 | 15123 | ||
15576 | /* | 15124 | /* |
15577 | * Set SEL_MASK Microcode Default Value | 15125 | * Calculate and write the microcode code checksum to the microcode |
15578 | * | 15126 | * code checksum location ASC_MC_CODE_CHK_SUM (0x2C). |
15579 | * The microcode will set the SEL_MASK register using this value | 15127 | */ |
15580 | * after it is started below. | 15128 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr); |
15581 | */ | 15129 | AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr); |
15582 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK, | 15130 | code_sum = 0; |
15583 | ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id)); | 15131 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr); |
15132 | for (word = begin_addr; word < end_addr; word += 2) { | ||
15133 | code_sum += AdvReadWordAutoIncLram(iop_base); | ||
15134 | } | ||
15135 | AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum); | ||
15136 | |||
15137 | /* | ||
15138 | * Read microcode version and date. | ||
15139 | */ | ||
15140 | AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE, | ||
15141 | asc_dvc->cfg->mcode_date); | ||
15142 | AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM, | ||
15143 | asc_dvc->cfg->mcode_version); | ||
15144 | |||
15145 | /* | ||
15146 | * Set the chip type to indicate the ASC38C0800. | ||
15147 | */ | ||
15148 | AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC38C0800); | ||
15149 | |||
15150 | /* | ||
15151 | * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register. | ||
15152 | * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current | ||
15153 | * cable detection and then we are able to read C_DET[3:0]. | ||
15154 | * | ||
15155 | * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1 | ||
15156 | * Microcode Default Value' section below. | ||
15157 | */ | ||
15158 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
15159 | AdvWriteWordRegister(iop_base, IOPW_SCSI_CFG1, | ||
15160 | scsi_cfg1 | DIS_TERM_DRV); | ||
15161 | |||
15162 | /* | ||
15163 | * If the PCI Configuration Command Register "Parity Error Response | ||
15164 | * Control" Bit was clear (0), then set the microcode variable | ||
15165 | * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode | ||
15166 | * to ignore DMA parity errors. | ||
15167 | */ | ||
15168 | if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) { | ||
15169 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
15170 | word |= CONTROL_FLAG_IGNORE_PERR; | ||
15171 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
15172 | } | ||
15584 | 15173 | ||
15585 | /* | 15174 | /* |
15586 | * Build the carrier freelist. | 15175 | * For ASC-38C0800, set FIFO_THRESH_80B [6:4] bits and START_CTL_TH [3:2] |
15587 | * | 15176 | * bits for the default FIFO threshold. |
15588 | * Driver must have already allocated memory and set 'carrier_buf'. | 15177 | * |
15589 | */ | 15178 | * Note: ASC-38C0800 FIFO threshold has been changed to 256 bytes. |
15590 | ASC_ASSERT(asc_dvc->carrier_buf != NULL); | 15179 | * |
15591 | 15180 | * For DMA Errata #4 set the BC_THRESH_ENB bit. | |
15592 | carrp = (ADV_CARR_T *) ADV_16BALIGN(asc_dvc->carrier_buf); | 15181 | */ |
15593 | asc_dvc->carr_freelist = NULL; | 15182 | AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0, |
15594 | if (carrp == (ADV_CARR_T *) asc_dvc->carrier_buf) | 15183 | BC_THRESH_ENB | FIFO_THRESH_80B | START_CTL_TH | |
15595 | { | 15184 | READ_CMD_MRM); |
15596 | buf_size = ADV_CARRIER_BUFSIZE; | 15185 | |
15597 | } else | 15186 | /* |
15598 | { | 15187 | * Microcode operating variables for WDTR, SDTR, and command tag |
15599 | buf_size = ADV_CARRIER_BUFSIZE - sizeof(ADV_CARR_T); | 15188 | * queuing will be set in AdvInquiryHandling() based on what a |
15600 | } | 15189 | * device reports it is capable of in Inquiry byte 7. |
15190 | * | ||
15191 | * If SCSI Bus Resets have been disabled, then directly set | ||
15192 | * SDTR and WDTR from the EEPROM configuration. This will allow | ||
15193 | * the BIOS and warm boot to work without a SCSI bus hang on | ||
15194 | * the Inquiry caused by host and target mismatched DTR values. | ||
15195 | * Without the SCSI Bus Reset, before an Inquiry a device can't | ||
15196 | * be assumed to be in Asynchronous, Narrow mode. | ||
15197 | */ | ||
15198 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) { | ||
15199 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, | ||
15200 | asc_dvc->wdtr_able); | ||
15201 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, | ||
15202 | asc_dvc->sdtr_able); | ||
15203 | } | ||
15601 | 15204 | ||
15602 | do { | 15205 | /* |
15603 | /* | 15206 | * Set microcode operating variables for DISC and SDTR_SPEED1, |
15604 | * Get physical address for the carrier 'carrp'. | 15207 | * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM |
15605 | */ | 15208 | * configuration values. |
15606 | contig_len = sizeof(ADV_CARR_T); | 15209 | * |
15607 | carr_paddr = cpu_to_le32(DvcGetPhyAddr(asc_dvc, NULL, (uchar *) carrp, | 15210 | * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2, |
15608 | (ADV_SDCNT *) &contig_len, ADV_IS_CARRIER_FLAG)); | 15211 | * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them |
15609 | 15212 | * without determining here whether the device supports SDTR. | |
15610 | buf_size -= sizeof(ADV_CARR_T); | 15213 | */ |
15611 | 15214 | AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE, | |
15612 | /* | 15215 | asc_dvc->cfg->disc_enable); |
15613 | * If the current carrier is not physically contiguous, then | 15216 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, asc_dvc->sdtr_speed1); |
15614 | * maybe there was a page crossing. Try the next carrier aligned | 15217 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, asc_dvc->sdtr_speed2); |
15615 | * start address. | 15218 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, asc_dvc->sdtr_speed3); |
15616 | */ | 15219 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, asc_dvc->sdtr_speed4); |
15617 | if (contig_len < sizeof(ADV_CARR_T)) | 15220 | |
15618 | { | 15221 | /* |
15619 | carrp++; | 15222 | * Set SCSI_CFG0 Microcode Default Value. |
15620 | continue; | 15223 | * |
15621 | } | 15224 | * The microcode will set the SCSI_CFG0 register using this value |
15622 | 15225 | * after it is started below. | |
15623 | carrp->carr_pa = carr_paddr; | 15226 | */ |
15624 | carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp)); | 15227 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0, |
15625 | 15228 | PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN | | |
15626 | /* | 15229 | asc_dvc->chip_scsi_id); |
15627 | * Insert the carrier at the beginning of the freelist. | 15230 | |
15628 | */ | 15231 | /* |
15629 | carrp->next_vpa = cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist)); | 15232 | * Determine SCSI_CFG1 Microcode Default Value. |
15630 | asc_dvc->carr_freelist = carrp; | 15233 | * |
15631 | 15234 | * The microcode will set the SCSI_CFG1 register using this value | |
15632 | carrp++; | 15235 | * after it is started below. |
15633 | } | 15236 | */ |
15634 | while (buf_size > 0); | 15237 | |
15238 | /* Read current SCSI_CFG1 Register value. */ | ||
15239 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
15240 | |||
15241 | /* | ||
15242 | * If the internal narrow cable is reversed all of the SCSI_CTRL | ||
15243 | * register signals will be set. Check for and return an error if | ||
15244 | * this condition is found. | ||
15245 | */ | ||
15246 | if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) { | ||
15247 | asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE; | ||
15248 | return ADV_ERROR; | ||
15249 | } | ||
15635 | 15250 | ||
15636 | /* | 15251 | /* |
15637 | * Set-up the Host->RISC Initiator Command Queue (ICQ). | 15252 | * All kind of combinations of devices attached to one of four connectors |
15638 | */ | 15253 | * are acceptable except HVD device attached. For example, LVD device can |
15254 | * be attached to SE connector while SE device attached to LVD connector. | ||
15255 | * If LVD device attached to SE connector, it only runs up to Ultra speed. | ||
15256 | * | ||
15257 | * If an HVD device is attached to one of LVD connectors, return an error. | ||
15258 | * However, there is no way to detect HVD device attached to SE connectors. | ||
15259 | */ | ||
15260 | if (scsi_cfg1 & HVD) { | ||
15261 | asc_dvc->err_code |= ASC_IERR_HVD_DEVICE; | ||
15262 | return ADV_ERROR; | ||
15263 | } | ||
15639 | 15264 | ||
15640 | if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) | 15265 | /* |
15641 | { | 15266 | * If either SE or LVD automatic termination control is enabled, then |
15642 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | 15267 | * set the termination value based on a table listed in a_condor.h. |
15643 | return ADV_ERROR; | 15268 | * |
15644 | } | 15269 | * If manual termination was specified with an EEPROM setting then |
15645 | asc_dvc->carr_freelist = (ADV_CARR_T *) | 15270 | * 'termination' was set-up in AdvInitFrom38C0800EEPROM() and is ready to |
15646 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa)); | 15271 | * be 'ored' into SCSI_CFG1. |
15272 | */ | ||
15273 | if ((asc_dvc->cfg->termination & TERM_SE) == 0) { | ||
15274 | /* SE automatic termination control is enabled. */ | ||
15275 | switch (scsi_cfg1 & C_DET_SE) { | ||
15276 | /* TERM_SE_HI: on, TERM_SE_LO: on */ | ||
15277 | case 0x1: | ||
15278 | case 0x2: | ||
15279 | case 0x3: | ||
15280 | asc_dvc->cfg->termination |= TERM_SE; | ||
15281 | break; | ||
15282 | |||
15283 | /* TERM_SE_HI: on, TERM_SE_LO: off */ | ||
15284 | case 0x0: | ||
15285 | asc_dvc->cfg->termination |= TERM_SE_HI; | ||
15286 | break; | ||
15287 | } | ||
15288 | } | ||
15647 | 15289 | ||
15648 | /* | 15290 | if ((asc_dvc->cfg->termination & TERM_LVD) == 0) { |
15649 | * The first command issued will be placed in the stopper carrier. | 15291 | /* LVD automatic termination control is enabled. */ |
15650 | */ | 15292 | switch (scsi_cfg1 & C_DET_LVD) { |
15651 | asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | 15293 | /* TERM_LVD_HI: on, TERM_LVD_LO: on */ |
15294 | case 0x4: | ||
15295 | case 0x8: | ||
15296 | case 0xC: | ||
15297 | asc_dvc->cfg->termination |= TERM_LVD; | ||
15298 | break; | ||
15299 | |||
15300 | /* TERM_LVD_HI: off, TERM_LVD_LO: off */ | ||
15301 | case 0x0: | ||
15302 | break; | ||
15303 | } | ||
15304 | } | ||
15652 | 15305 | ||
15653 | /* | 15306 | /* |
15654 | * Set RISC ICQ physical address start value. | 15307 | * Clear any set TERM_SE and TERM_LVD bits. |
15655 | * carr_pa is LE, must be native before write | 15308 | */ |
15656 | */ | 15309 | scsi_cfg1 &= (~TERM_SE & ~TERM_LVD); |
15657 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa); | 15310 | |
15311 | /* | ||
15312 | * Invert the TERM_SE and TERM_LVD bits and then set 'scsi_cfg1'. | ||
15313 | */ | ||
15314 | scsi_cfg1 |= (~asc_dvc->cfg->termination & 0xF0); | ||
15315 | |||
15316 | /* | ||
15317 | * Clear BIG_ENDIAN, DIS_TERM_DRV, Terminator Polarity and HVD/LVD/SE bits | ||
15318 | * and set possibly modified termination control bits in the Microcode | ||
15319 | * SCSI_CFG1 Register Value. | ||
15320 | */ | ||
15321 | scsi_cfg1 &= (~BIG_ENDIAN & ~DIS_TERM_DRV & ~TERM_POL & ~HVD_LVD_SE); | ||
15322 | |||
15323 | /* | ||
15324 | * Set SCSI_CFG1 Microcode Default Value | ||
15325 | * | ||
15326 | * Set possibly modified termination control and reset DIS_TERM_DRV | ||
15327 | * bits in the Microcode SCSI_CFG1 Register Value. | ||
15328 | * | ||
15329 | * The microcode will set the SCSI_CFG1 register using this value | ||
15330 | * after it is started below. | ||
15331 | */ | ||
15332 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, scsi_cfg1); | ||
15333 | |||
15334 | /* | ||
15335 | * Set MEM_CFG Microcode Default Value | ||
15336 | * | ||
15337 | * The microcode will set the MEM_CFG register using this value | ||
15338 | * after it is started below. | ||
15339 | * | ||
15340 | * MEM_CFG may be accessed as a word or byte, but only bits 0-7 | ||
15341 | * are defined. | ||
15342 | * | ||
15343 | * ASC-38C0800 has 16KB internal memory. | ||
15344 | */ | ||
15345 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, | ||
15346 | BIOS_EN | RAM_SZ_16KB); | ||
15347 | |||
15348 | /* | ||
15349 | * Set SEL_MASK Microcode Default Value | ||
15350 | * | ||
15351 | * The microcode will set the SEL_MASK register using this value | ||
15352 | * after it is started below. | ||
15353 | */ | ||
15354 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK, | ||
15355 | ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id)); | ||
15356 | |||
15357 | /* | ||
15358 | * Build the carrier freelist. | ||
15359 | * | ||
15360 | * Driver must have already allocated memory and set 'carrier_buf'. | ||
15361 | */ | ||
15362 | ASC_ASSERT(asc_dvc->carrier_buf != NULL); | ||
15363 | |||
15364 | carrp = (ADV_CARR_T *) ADV_16BALIGN(asc_dvc->carrier_buf); | ||
15365 | asc_dvc->carr_freelist = NULL; | ||
15366 | if (carrp == (ADV_CARR_T *) asc_dvc->carrier_buf) { | ||
15367 | buf_size = ADV_CARRIER_BUFSIZE; | ||
15368 | } else { | ||
15369 | buf_size = ADV_CARRIER_BUFSIZE - sizeof(ADV_CARR_T); | ||
15370 | } | ||
15658 | 15371 | ||
15659 | /* | 15372 | do { |
15660 | * Set-up the RISC->Host Initiator Response Queue (IRQ). | 15373 | /* |
15661 | */ | 15374 | * Get physical address for the carrier 'carrp'. |
15662 | if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) | 15375 | */ |
15663 | { | 15376 | contig_len = sizeof(ADV_CARR_T); |
15664 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | 15377 | carr_paddr = |
15665 | return ADV_ERROR; | 15378 | cpu_to_le32(DvcGetPhyAddr |
15666 | } | 15379 | (asc_dvc, NULL, (uchar *)carrp, |
15667 | asc_dvc->carr_freelist = (ADV_CARR_T *) | 15380 | (ADV_SDCNT *)&contig_len, |
15668 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa)); | 15381 | ADV_IS_CARRIER_FLAG)); |
15669 | 15382 | ||
15670 | /* | 15383 | buf_size -= sizeof(ADV_CARR_T); |
15671 | * The first command completed by the RISC will be placed in | ||
15672 | * the stopper. | ||
15673 | * | ||
15674 | * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is | ||
15675 | * completed the RISC will set the ASC_RQ_STOPPER bit. | ||
15676 | */ | ||
15677 | asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
15678 | 15384 | ||
15679 | /* | 15385 | /* |
15680 | * Set RISC IRQ physical address start value. | 15386 | * If the current carrier is not physically contiguous, then |
15681 | * | 15387 | * maybe there was a page crossing. Try the next carrier aligned |
15682 | * carr_pa is LE, must be native before write * | 15388 | * start address. |
15683 | */ | 15389 | */ |
15684 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa); | 15390 | if (contig_len < sizeof(ADV_CARR_T)) { |
15685 | asc_dvc->carr_pending_cnt = 0; | 15391 | carrp++; |
15392 | continue; | ||
15393 | } | ||
15394 | |||
15395 | carrp->carr_pa = carr_paddr; | ||
15396 | carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp)); | ||
15686 | 15397 | ||
15687 | AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES, | 15398 | /* |
15688 | (ADV_INTR_ENABLE_HOST_INTR | ADV_INTR_ENABLE_GLOBAL_INTR)); | 15399 | * Insert the carrier at the beginning of the freelist. |
15400 | */ | ||
15401 | carrp->next_vpa = | ||
15402 | cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist)); | ||
15403 | asc_dvc->carr_freelist = carrp; | ||
15689 | 15404 | ||
15690 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word); | 15405 | carrp++; |
15691 | AdvWriteWordRegister(iop_base, IOPW_PC, word); | 15406 | } |
15407 | while (buf_size > 0); | ||
15692 | 15408 | ||
15693 | /* finally, finally, gentlemen, start your engine */ | 15409 | /* |
15694 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN); | 15410 | * Set-up the Host->RISC Initiator Command Queue (ICQ). |
15411 | */ | ||
15695 | 15412 | ||
15696 | /* | 15413 | if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) { |
15697 | * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus | 15414 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; |
15698 | * Resets should be performed. The RISC has to be running | 15415 | return ADV_ERROR; |
15699 | * to issue a SCSI Bus Reset. | 15416 | } |
15700 | */ | 15417 | asc_dvc->carr_freelist = (ADV_CARR_T *) |
15701 | if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) | 15418 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa)); |
15702 | { | 15419 | |
15703 | /* | 15420 | /* |
15704 | * If the BIOS Signature is present in memory, restore the | 15421 | * The first command issued will be placed in the stopper carrier. |
15705 | * BIOS Handshake Configuration Table and do not perform | 15422 | */ |
15706 | * a SCSI Bus Reset. | 15423 | asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); |
15707 | */ | 15424 | |
15708 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM)/2] == 0x55AA) | 15425 | /* |
15709 | { | 15426 | * Set RISC ICQ physical address start value. |
15710 | /* | 15427 | * carr_pa is LE, must be native before write |
15711 | * Restore per TID negotiated values. | 15428 | */ |
15712 | */ | 15429 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa); |
15713 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | 15430 | |
15714 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | 15431 | /* |
15715 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | 15432 | * Set-up the RISC->Host Initiator Response Queue (IRQ). |
15716 | for (tid = 0; tid <= ADV_MAX_TID; tid++) | 15433 | */ |
15717 | { | 15434 | if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) { |
15718 | AdvWriteByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | 15435 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; |
15719 | max_cmd[tid]); | 15436 | return ADV_ERROR; |
15720 | } | 15437 | } |
15721 | } else | 15438 | asc_dvc->carr_freelist = (ADV_CARR_T *) |
15722 | { | 15439 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa)); |
15723 | if (AdvResetSB(asc_dvc) != ADV_TRUE) | 15440 | |
15724 | { | 15441 | /* |
15725 | warn_code = ASC_WARN_BUSRESET_ERROR; | 15442 | * The first command completed by the RISC will be placed in |
15726 | } | 15443 | * the stopper. |
15727 | } | 15444 | * |
15728 | } | 15445 | * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is |
15446 | * completed the RISC will set the ASC_RQ_STOPPER bit. | ||
15447 | */ | ||
15448 | asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
15449 | |||
15450 | /* | ||
15451 | * Set RISC IRQ physical address start value. | ||
15452 | * | ||
15453 | * carr_pa is LE, must be native before write * | ||
15454 | */ | ||
15455 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa); | ||
15456 | asc_dvc->carr_pending_cnt = 0; | ||
15457 | |||
15458 | AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES, | ||
15459 | (ADV_INTR_ENABLE_HOST_INTR | | ||
15460 | ADV_INTR_ENABLE_GLOBAL_INTR)); | ||
15461 | |||
15462 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word); | ||
15463 | AdvWriteWordRegister(iop_base, IOPW_PC, word); | ||
15464 | |||
15465 | /* finally, finally, gentlemen, start your engine */ | ||
15466 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN); | ||
15467 | |||
15468 | /* | ||
15469 | * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus | ||
15470 | * Resets should be performed. The RISC has to be running | ||
15471 | * to issue a SCSI Bus Reset. | ||
15472 | */ | ||
15473 | if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) { | ||
15474 | /* | ||
15475 | * If the BIOS Signature is present in memory, restore the | ||
15476 | * BIOS Handshake Configuration Table and do not perform | ||
15477 | * a SCSI Bus Reset. | ||
15478 | */ | ||
15479 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] == | ||
15480 | 0x55AA) { | ||
15481 | /* | ||
15482 | * Restore per TID negotiated values. | ||
15483 | */ | ||
15484 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
15485 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
15486 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, | ||
15487 | tagqng_able); | ||
15488 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
15489 | AdvWriteByteLram(iop_base, | ||
15490 | ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
15491 | max_cmd[tid]); | ||
15492 | } | ||
15493 | } else { | ||
15494 | if (AdvResetSB(asc_dvc) != ADV_TRUE) { | ||
15495 | warn_code = ASC_WARN_BUSRESET_ERROR; | ||
15496 | } | ||
15497 | } | ||
15498 | } | ||
15729 | 15499 | ||
15730 | return warn_code; | 15500 | return warn_code; |
15731 | } | 15501 | } |
15732 | 15502 | ||
15733 | /* | 15503 | /* |
@@ -15740,630 +15510,617 @@ AdvInitAsc38C0800Driver(ADV_DVC_VAR *asc_dvc) | |||
15740 | * | 15510 | * |
15741 | * Needed after initialization for error recovery. | 15511 | * Needed after initialization for error recovery. |
15742 | */ | 15512 | */ |
15743 | STATIC int | 15513 | static int AdvInitAsc38C1600Driver(ADV_DVC_VAR *asc_dvc) |
15744 | AdvInitAsc38C1600Driver(ADV_DVC_VAR *asc_dvc) | ||
15745 | { | 15514 | { |
15746 | AdvPortAddr iop_base; | 15515 | AdvPortAddr iop_base; |
15747 | ushort warn_code; | 15516 | ushort warn_code; |
15748 | ADV_DCNT sum; | 15517 | ADV_DCNT sum; |
15749 | int begin_addr; | 15518 | int begin_addr; |
15750 | int end_addr; | 15519 | int end_addr; |
15751 | ushort code_sum; | 15520 | ushort code_sum; |
15752 | long word; | 15521 | long word; |
15753 | int j; | 15522 | int j; |
15754 | int adv_asc38C1600_expanded_size; | 15523 | int adv_asc38C1600_expanded_size; |
15755 | ADV_CARR_T *carrp; | 15524 | ADV_CARR_T *carrp; |
15756 | ADV_DCNT contig_len; | 15525 | ADV_DCNT contig_len; |
15757 | ADV_SDCNT buf_size; | 15526 | ADV_SDCNT buf_size; |
15758 | ADV_PADDR carr_paddr; | 15527 | ADV_PADDR carr_paddr; |
15759 | int i; | 15528 | int i; |
15760 | ushort scsi_cfg1; | 15529 | ushort scsi_cfg1; |
15761 | uchar byte; | 15530 | uchar byte; |
15762 | uchar tid; | 15531 | uchar tid; |
15763 | ushort bios_mem[ASC_MC_BIOSLEN/2]; /* BIOS RISC Memory 0x40-0x8F. */ | 15532 | ushort bios_mem[ASC_MC_BIOSLEN / 2]; /* BIOS RISC Memory 0x40-0x8F. */ |
15764 | ushort wdtr_able, sdtr_able, ppr_able, tagqng_able; | 15533 | ushort wdtr_able, sdtr_able, ppr_able, tagqng_able; |
15765 | uchar max_cmd[ASC_MAX_TID + 1]; | 15534 | uchar max_cmd[ASC_MAX_TID + 1]; |
15766 | 15535 | ||
15767 | /* If there is already an error, don't continue. */ | 15536 | /* If there is already an error, don't continue. */ |
15768 | if (asc_dvc->err_code != 0) | 15537 | if (asc_dvc->err_code != 0) { |
15769 | { | 15538 | return ADV_ERROR; |
15770 | return ADV_ERROR; | 15539 | } |
15771 | } | ||
15772 | |||
15773 | /* | ||
15774 | * The caller must set 'chip_type' to ADV_CHIP_ASC38C1600. | ||
15775 | */ | ||
15776 | if (asc_dvc->chip_type != ADV_CHIP_ASC38C1600) | ||
15777 | { | ||
15778 | asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE; | ||
15779 | return ADV_ERROR; | ||
15780 | } | ||
15781 | |||
15782 | warn_code = 0; | ||
15783 | iop_base = asc_dvc->iop_base; | ||
15784 | |||
15785 | /* | ||
15786 | * Save the RISC memory BIOS region before writing the microcode. | ||
15787 | * The BIOS may already be loaded and using its RISC LRAM region | ||
15788 | * so its region must be saved and restored. | ||
15789 | * | ||
15790 | * Note: This code makes the assumption, which is currently true, | ||
15791 | * that a chip reset does not clear RISC LRAM. | ||
15792 | */ | ||
15793 | for (i = 0; i < ASC_MC_BIOSLEN/2; i++) | ||
15794 | { | ||
15795 | AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), bios_mem[i]); | ||
15796 | } | ||
15797 | |||
15798 | /* | ||
15799 | * Save current per TID negotiated values. | ||
15800 | */ | ||
15801 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
15802 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
15803 | AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); | ||
15804 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | ||
15805 | for (tid = 0; tid <= ASC_MAX_TID; tid++) | ||
15806 | { | ||
15807 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
15808 | max_cmd[tid]); | ||
15809 | } | ||
15810 | |||
15811 | /* | ||
15812 | * RAM BIST (Built-In Self Test) | ||
15813 | * | ||
15814 | * Address : I/O base + offset 0x38h register (byte). | ||
15815 | * Function: Bit 7-6(RW) : RAM mode | ||
15816 | * Normal Mode : 0x00 | ||
15817 | * Pre-test Mode : 0x40 | ||
15818 | * RAM Test Mode : 0x80 | ||
15819 | * Bit 5 : unused | ||
15820 | * Bit 4(RO) : Done bit | ||
15821 | * Bit 3-0(RO) : Status | ||
15822 | * Host Error : 0x08 | ||
15823 | * Int_RAM Error : 0x04 | ||
15824 | * RISC Error : 0x02 | ||
15825 | * SCSI Error : 0x01 | ||
15826 | * No Error : 0x00 | ||
15827 | * | ||
15828 | * Note: RAM BIST code should be put right here, before loading the | ||
15829 | * microcode and after saving the RISC memory BIOS region. | ||
15830 | */ | ||
15831 | |||
15832 | /* | ||
15833 | * LRAM Pre-test | ||
15834 | * | ||
15835 | * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds. | ||
15836 | * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return | ||
15837 | * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset | ||
15838 | * to NORMAL_MODE, return an error too. | ||
15839 | */ | ||
15840 | for (i = 0; i < 2; i++) | ||
15841 | { | ||
15842 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, PRE_TEST_MODE); | ||
15843 | DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */ | ||
15844 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); | ||
15845 | if ((byte & RAM_TEST_DONE) == 0 || (byte & 0x0F) != PRE_TEST_VALUE) | ||
15846 | { | ||
15847 | asc_dvc->err_code |= ASC_IERR_BIST_PRE_TEST; | ||
15848 | return ADV_ERROR; | ||
15849 | } | ||
15850 | |||
15851 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); | ||
15852 | DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */ | ||
15853 | if (AdvReadByteRegister(iop_base, IOPB_RAM_BIST) | ||
15854 | != NORMAL_VALUE) | ||
15855 | { | ||
15856 | asc_dvc->err_code |= ASC_IERR_BIST_PRE_TEST; | ||
15857 | return ADV_ERROR; | ||
15858 | } | ||
15859 | } | ||
15860 | |||
15861 | /* | ||
15862 | * LRAM Test - It takes about 1.5 ms to run through the test. | ||
15863 | * | ||
15864 | * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds. | ||
15865 | * If Done bit not set or Status not 0, save register byte, set the | ||
15866 | * err_code, and return an error. | ||
15867 | */ | ||
15868 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, RAM_TEST_MODE); | ||
15869 | DvcSleepMilliSecond(10); /* Wait for 10ms before checking status. */ | ||
15870 | |||
15871 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); | ||
15872 | if ((byte & RAM_TEST_DONE) == 0 || (byte & RAM_TEST_STATUS) != 0) | ||
15873 | { | ||
15874 | /* Get here if Done bit not set or Status not 0. */ | ||
15875 | asc_dvc->bist_err_code = byte; /* for BIOS display message */ | ||
15876 | asc_dvc->err_code |= ASC_IERR_BIST_RAM_TEST; | ||
15877 | return ADV_ERROR; | ||
15878 | } | ||
15879 | |||
15880 | /* We need to reset back to normal mode after LRAM test passes. */ | ||
15881 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); | ||
15882 | |||
15883 | /* | ||
15884 | * Load the Microcode | ||
15885 | * | ||
15886 | * Write the microcode image to RISC memory starting at address 0. | ||
15887 | * | ||
15888 | */ | ||
15889 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | ||
15890 | |||
15891 | /* | ||
15892 | * Assume the following compressed format of the microcode buffer: | ||
15893 | * | ||
15894 | * 254 word (508 byte) table indexed by byte code followed | ||
15895 | * by the following byte codes: | ||
15896 | * | ||
15897 | * 1-Byte Code: | ||
15898 | * 00: Emit word 0 in table. | ||
15899 | * 01: Emit word 1 in table. | ||
15900 | * . | ||
15901 | * FD: Emit word 253 in table. | ||
15902 | * | ||
15903 | * Multi-Byte Code: | ||
15904 | * FE WW WW: (3 byte code) Word to emit is the next word WW WW. | ||
15905 | * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW. | ||
15906 | */ | ||
15907 | word = 0; | ||
15908 | for (i = 253 * 2; i < _adv_asc38C1600_size; i++) | ||
15909 | { | ||
15910 | if (_adv_asc38C1600_buf[i] == 0xff) | ||
15911 | { | ||
15912 | for (j = 0; j < _adv_asc38C1600_buf[i + 1]; j++) | ||
15913 | { | ||
15914 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
15915 | _adv_asc38C1600_buf[i + 3] << 8) | | ||
15916 | _adv_asc38C1600_buf[i + 2])); | ||
15917 | word++; | ||
15918 | } | ||
15919 | i += 3; | ||
15920 | } else if (_adv_asc38C1600_buf[i] == 0xfe) | ||
15921 | { | ||
15922 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
15923 | _adv_asc38C1600_buf[i + 2] << 8) | | ||
15924 | _adv_asc38C1600_buf[i + 1])); | ||
15925 | i += 2; | ||
15926 | word++; | ||
15927 | } else | ||
15928 | { | ||
15929 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
15930 | _adv_asc38C1600_buf[(_adv_asc38C1600_buf[i] * 2) + 1] << 8) | | ||
15931 | _adv_asc38C1600_buf[_adv_asc38C1600_buf[i] * 2])); | ||
15932 | word++; | ||
15933 | } | ||
15934 | } | ||
15935 | |||
15936 | /* | ||
15937 | * Set 'word' for later use to clear the rest of memory and save | ||
15938 | * the expanded mcode size. | ||
15939 | */ | ||
15940 | word *= 2; | ||
15941 | adv_asc38C1600_expanded_size = word; | ||
15942 | |||
15943 | /* | ||
15944 | * Clear the rest of ASC-38C1600 Internal RAM (32KB). | ||
15945 | */ | ||
15946 | for (; word < ADV_38C1600_MEMSIZE; word += 2) | ||
15947 | { | ||
15948 | AdvWriteWordAutoIncLram(iop_base, 0); | ||
15949 | } | ||
15950 | |||
15951 | /* | ||
15952 | * Verify the microcode checksum. | ||
15953 | */ | ||
15954 | sum = 0; | ||
15955 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | ||
15956 | |||
15957 | for (word = 0; word < adv_asc38C1600_expanded_size; word += 2) | ||
15958 | { | ||
15959 | sum += AdvReadWordAutoIncLram(iop_base); | ||
15960 | } | ||
15961 | |||
15962 | if (sum != _adv_asc38C1600_chksum) | ||
15963 | { | ||
15964 | asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM; | ||
15965 | return ADV_ERROR; | ||
15966 | } | ||
15967 | |||
15968 | /* | ||
15969 | * Restore the RISC memory BIOS region. | ||
15970 | */ | ||
15971 | for (i = 0; i < ASC_MC_BIOSLEN/2; i++) | ||
15972 | { | ||
15973 | AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), bios_mem[i]); | ||
15974 | } | ||
15975 | |||
15976 | /* | ||
15977 | * Calculate and write the microcode code checksum to the microcode | ||
15978 | * code checksum location ASC_MC_CODE_CHK_SUM (0x2C). | ||
15979 | */ | ||
15980 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr); | ||
15981 | AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr); | ||
15982 | code_sum = 0; | ||
15983 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr); | ||
15984 | for (word = begin_addr; word < end_addr; word += 2) | ||
15985 | { | ||
15986 | code_sum += AdvReadWordAutoIncLram(iop_base); | ||
15987 | } | ||
15988 | AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum); | ||
15989 | |||
15990 | /* | ||
15991 | * Read microcode version and date. | ||
15992 | */ | ||
15993 | AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE, asc_dvc->cfg->mcode_date); | ||
15994 | AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM, asc_dvc->cfg->mcode_version); | ||
15995 | |||
15996 | /* | ||
15997 | * Set the chip type to indicate the ASC38C1600. | ||
15998 | */ | ||
15999 | AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC38C1600); | ||
16000 | |||
16001 | /* | ||
16002 | * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register. | ||
16003 | * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current | ||
16004 | * cable detection and then we are able to read C_DET[3:0]. | ||
16005 | * | ||
16006 | * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1 | ||
16007 | * Microcode Default Value' section below. | ||
16008 | */ | ||
16009 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
16010 | AdvWriteWordRegister(iop_base, IOPW_SCSI_CFG1, scsi_cfg1 | DIS_TERM_DRV); | ||
16011 | |||
16012 | /* | ||
16013 | * If the PCI Configuration Command Register "Parity Error Response | ||
16014 | * Control" Bit was clear (0), then set the microcode variable | ||
16015 | * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode | ||
16016 | * to ignore DMA parity errors. | ||
16017 | */ | ||
16018 | if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) | ||
16019 | { | ||
16020 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
16021 | word |= CONTROL_FLAG_IGNORE_PERR; | ||
16022 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
16023 | } | ||
16024 | |||
16025 | /* | ||
16026 | * If the BIOS control flag AIPP (Asynchronous Information | ||
16027 | * Phase Protection) disable bit is not set, then set the firmware | ||
16028 | * 'control_flag' CONTROL_FLAG_ENABLE_AIPP bit to enable | ||
16029 | * AIPP checking and encoding. | ||
16030 | */ | ||
16031 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_AIPP_DIS) == 0) | ||
16032 | { | ||
16033 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
16034 | word |= CONTROL_FLAG_ENABLE_AIPP; | ||
16035 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
16036 | } | ||
16037 | |||
16038 | /* | ||
16039 | * For ASC-38C1600 use DMA_CFG0 default values: FIFO_THRESH_80B [6:4], | ||
16040 | * and START_CTL_TH [3:2]. | ||
16041 | */ | ||
16042 | AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0, | ||
16043 | FIFO_THRESH_80B | START_CTL_TH | READ_CMD_MRM); | ||
16044 | |||
16045 | /* | ||
16046 | * Microcode operating variables for WDTR, SDTR, and command tag | ||
16047 | * queuing will be set in AdvInquiryHandling() based on what a | ||
16048 | * device reports it is capable of in Inquiry byte 7. | ||
16049 | * | ||
16050 | * If SCSI Bus Resets have been disabled, then directly set | ||
16051 | * SDTR and WDTR from the EEPROM configuration. This will allow | ||
16052 | * the BIOS and warm boot to work without a SCSI bus hang on | ||
16053 | * the Inquiry caused by host and target mismatched DTR values. | ||
16054 | * Without the SCSI Bus Reset, before an Inquiry a device can't | ||
16055 | * be assumed to be in Asynchronous, Narrow mode. | ||
16056 | */ | ||
16057 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) | ||
16058 | { | ||
16059 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, asc_dvc->wdtr_able); | ||
16060 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, asc_dvc->sdtr_able); | ||
16061 | } | ||
16062 | 15540 | ||
16063 | /* | 15541 | /* |
16064 | * Set microcode operating variables for DISC and SDTR_SPEED1, | 15542 | * The caller must set 'chip_type' to ADV_CHIP_ASC38C1600. |
16065 | * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM | 15543 | */ |
16066 | * configuration values. | 15544 | if (asc_dvc->chip_type != ADV_CHIP_ASC38C1600) { |
16067 | * | 15545 | asc_dvc->err_code = ASC_IERR_BAD_CHIPTYPE; |
16068 | * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2, | 15546 | return ADV_ERROR; |
16069 | * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them | 15547 | } |
16070 | * without determining here whether the device supports SDTR. | ||
16071 | */ | ||
16072 | AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE, asc_dvc->cfg->disc_enable); | ||
16073 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, asc_dvc->sdtr_speed1); | ||
16074 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, asc_dvc->sdtr_speed2); | ||
16075 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, asc_dvc->sdtr_speed3); | ||
16076 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, asc_dvc->sdtr_speed4); | ||
16077 | 15548 | ||
16078 | /* | 15549 | warn_code = 0; |
16079 | * Set SCSI_CFG0 Microcode Default Value. | 15550 | iop_base = asc_dvc->iop_base; |
16080 | * | 15551 | |
16081 | * The microcode will set the SCSI_CFG0 register using this value | 15552 | /* |
16082 | * after it is started below. | 15553 | * Save the RISC memory BIOS region before writing the microcode. |
16083 | */ | 15554 | * The BIOS may already be loaded and using its RISC LRAM region |
16084 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0, | 15555 | * so its region must be saved and restored. |
16085 | PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN | | 15556 | * |
16086 | asc_dvc->chip_scsi_id); | 15557 | * Note: This code makes the assumption, which is currently true, |
15558 | * that a chip reset does not clear RISC LRAM. | ||
15559 | */ | ||
15560 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { | ||
15561 | AdvReadWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), | ||
15562 | bios_mem[i]); | ||
15563 | } | ||
16087 | 15564 | ||
16088 | /* | 15565 | /* |
16089 | * Calculate SCSI_CFG1 Microcode Default Value. | 15566 | * Save current per TID negotiated values. |
16090 | * | 15567 | */ |
16091 | * The microcode will set the SCSI_CFG1 register using this value | 15568 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); |
16092 | * after it is started below. | 15569 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); |
16093 | * | 15570 | AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); |
16094 | * Each ASC-38C1600 function has only two cable detect bits. | 15571 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); |
16095 | * The bus mode override bits are in IOPB_SOFT_OVER_WR. | 15572 | for (tid = 0; tid <= ASC_MAX_TID; tid++) { |
16096 | */ | 15573 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, |
16097 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | 15574 | max_cmd[tid]); |
15575 | } | ||
16098 | 15576 | ||
16099 | /* | 15577 | /* |
16100 | * If the cable is reversed all of the SCSI_CTRL register signals | 15578 | * RAM BIST (Built-In Self Test) |
16101 | * will be set. Check for and return an error if this condition is | 15579 | * |
16102 | * found. | 15580 | * Address : I/O base + offset 0x38h register (byte). |
16103 | */ | 15581 | * Function: Bit 7-6(RW) : RAM mode |
16104 | if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) | 15582 | * Normal Mode : 0x00 |
16105 | { | 15583 | * Pre-test Mode : 0x40 |
16106 | asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE; | 15584 | * RAM Test Mode : 0x80 |
16107 | return ADV_ERROR; | 15585 | * Bit 5 : unused |
16108 | } | 15586 | * Bit 4(RO) : Done bit |
15587 | * Bit 3-0(RO) : Status | ||
15588 | * Host Error : 0x08 | ||
15589 | * Int_RAM Error : 0x04 | ||
15590 | * RISC Error : 0x02 | ||
15591 | * SCSI Error : 0x01 | ||
15592 | * No Error : 0x00 | ||
15593 | * | ||
15594 | * Note: RAM BIST code should be put right here, before loading the | ||
15595 | * microcode and after saving the RISC memory BIOS region. | ||
15596 | */ | ||
15597 | |||
15598 | /* | ||
15599 | * LRAM Pre-test | ||
15600 | * | ||
15601 | * Write PRE_TEST_MODE (0x40) to register and wait for 10 milliseconds. | ||
15602 | * If Done bit not set or low nibble not PRE_TEST_VALUE (0x05), return | ||
15603 | * an error. Reset to NORMAL_MODE (0x00) and do again. If cannot reset | ||
15604 | * to NORMAL_MODE, return an error too. | ||
15605 | */ | ||
15606 | for (i = 0; i < 2; i++) { | ||
15607 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, PRE_TEST_MODE); | ||
15608 | DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */ | ||
15609 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); | ||
15610 | if ((byte & RAM_TEST_DONE) == 0 | ||
15611 | || (byte & 0x0F) != PRE_TEST_VALUE) { | ||
15612 | asc_dvc->err_code |= ASC_IERR_BIST_PRE_TEST; | ||
15613 | return ADV_ERROR; | ||
15614 | } | ||
15615 | |||
15616 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); | ||
15617 | DvcSleepMilliSecond(10); /* Wait for 10ms before reading back. */ | ||
15618 | if (AdvReadByteRegister(iop_base, IOPB_RAM_BIST) | ||
15619 | != NORMAL_VALUE) { | ||
15620 | asc_dvc->err_code |= ASC_IERR_BIST_PRE_TEST; | ||
15621 | return ADV_ERROR; | ||
15622 | } | ||
15623 | } | ||
16109 | 15624 | ||
16110 | /* | 15625 | /* |
16111 | * Each ASC-38C1600 function has two connectors. Only an HVD device | 15626 | * LRAM Test - It takes about 1.5 ms to run through the test. |
16112 | * can not be connected to either connector. An LVD device or SE device | 15627 | * |
16113 | * may be connected to either connecor. If an SE device is connected, | 15628 | * Write RAM_TEST_MODE (0x80) to register and wait for 10 milliseconds. |
16114 | * then at most Ultra speed (20 Mhz) can be used on both connectors. | 15629 | * If Done bit not set or Status not 0, save register byte, set the |
16115 | * | 15630 | * err_code, and return an error. |
16116 | * If an HVD device is attached, return an error. | 15631 | */ |
16117 | */ | 15632 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, RAM_TEST_MODE); |
16118 | if (scsi_cfg1 & HVD) | 15633 | DvcSleepMilliSecond(10); /* Wait for 10ms before checking status. */ |
16119 | { | 15634 | |
16120 | asc_dvc->err_code |= ASC_IERR_HVD_DEVICE; | 15635 | byte = AdvReadByteRegister(iop_base, IOPB_RAM_BIST); |
16121 | return ADV_ERROR; | 15636 | if ((byte & RAM_TEST_DONE) == 0 || (byte & RAM_TEST_STATUS) != 0) { |
16122 | } | 15637 | /* Get here if Done bit not set or Status not 0. */ |
15638 | asc_dvc->bist_err_code = byte; /* for BIOS display message */ | ||
15639 | asc_dvc->err_code |= ASC_IERR_BIST_RAM_TEST; | ||
15640 | return ADV_ERROR; | ||
15641 | } | ||
16123 | 15642 | ||
16124 | /* | 15643 | /* We need to reset back to normal mode after LRAM test passes. */ |
16125 | * Each function in the ASC-38C1600 uses only the SE cable detect and | 15644 | AdvWriteByteRegister(iop_base, IOPB_RAM_BIST, NORMAL_MODE); |
16126 | * termination because there are two connectors for each function. Each | 15645 | |
16127 | * function may use either LVD or SE mode. Corresponding the SE automatic | 15646 | /* |
16128 | * termination control EEPROM bits are used for each function. Each | 15647 | * Load the Microcode |
16129 | * function has its own EEPROM. If SE automatic control is enabled for | 15648 | * |
16130 | * the function, then set the termination value based on a table listed | 15649 | * Write the microcode image to RISC memory starting at address 0. |
16131 | * in a_condor.h. | 15650 | * |
16132 | * | 15651 | */ |
16133 | * If manual termination is specified in the EEPROM for the function, | 15652 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); |
16134 | * then 'termination' was set-up in AscInitFrom38C1600EEPROM() and is | 15653 | |
16135 | * ready to be 'ored' into SCSI_CFG1. | 15654 | /* |
16136 | */ | 15655 | * Assume the following compressed format of the microcode buffer: |
16137 | if ((asc_dvc->cfg->termination & TERM_SE) == 0) | 15656 | * |
16138 | { | 15657 | * 254 word (508 byte) table indexed by byte code followed |
16139 | /* SE automatic termination control is enabled. */ | 15658 | * by the following byte codes: |
16140 | switch(scsi_cfg1 & C_DET_SE) | 15659 | * |
16141 | { | 15660 | * 1-Byte Code: |
16142 | /* TERM_SE_HI: on, TERM_SE_LO: on */ | 15661 | * 00: Emit word 0 in table. |
16143 | case 0x1: case 0x2: case 0x3: | 15662 | * 01: Emit word 1 in table. |
16144 | asc_dvc->cfg->termination |= TERM_SE; | 15663 | * . |
16145 | break; | 15664 | * FD: Emit word 253 in table. |
16146 | 15665 | * | |
16147 | case 0x0: | 15666 | * Multi-Byte Code: |
16148 | if (ASC_PCI_ID2FUNC(asc_dvc->cfg->pci_slot_info) == 0) | 15667 | * FE WW WW: (3 byte code) Word to emit is the next word WW WW. |
16149 | { | 15668 | * FF BB WW WW: (4 byte code) Emit BB count times next word WW WW. |
16150 | /* Function 0 - TERM_SE_HI: off, TERM_SE_LO: off */ | 15669 | */ |
16151 | } | 15670 | word = 0; |
16152 | else | 15671 | for (i = 253 * 2; i < _adv_asc38C1600_size; i++) { |
16153 | { | 15672 | if (_adv_asc38C1600_buf[i] == 0xff) { |
16154 | /* Function 1 - TERM_SE_HI: on, TERM_SE_LO: off */ | 15673 | for (j = 0; j < _adv_asc38C1600_buf[i + 1]; j++) { |
16155 | asc_dvc->cfg->termination |= TERM_SE_HI; | 15674 | AdvWriteWordAutoIncLram(iop_base, (((ushort) |
16156 | } | 15675 | _adv_asc38C1600_buf |
16157 | break; | 15676 | [i + |
16158 | } | 15677 | 3] << 8) | |
16159 | } | 15678 | _adv_asc38C1600_buf |
15679 | [i + 2])); | ||
15680 | word++; | ||
15681 | } | ||
15682 | i += 3; | ||
15683 | } else if (_adv_asc38C1600_buf[i] == 0xfe) { | ||
15684 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
15685 | _adv_asc38C1600_buf | ||
15686 | [i + | ||
15687 | 2] << 8) | | ||
15688 | _adv_asc38C1600_buf[i | ||
15689 | + | ||
15690 | 1])); | ||
15691 | i += 2; | ||
15692 | word++; | ||
15693 | } else { | ||
15694 | AdvWriteWordAutoIncLram(iop_base, (((ushort) | ||
15695 | _adv_asc38C1600_buf[(_adv_asc38C1600_buf[i] * 2) + 1] << 8) | _adv_asc38C1600_buf[_adv_asc38C1600_buf[i] * 2])); | ||
15696 | word++; | ||
15697 | } | ||
15698 | } | ||
16160 | 15699 | ||
16161 | /* | 15700 | /* |
16162 | * Clear any set TERM_SE bits. | 15701 | * Set 'word' for later use to clear the rest of memory and save |
16163 | */ | 15702 | * the expanded mcode size. |
16164 | scsi_cfg1 &= ~TERM_SE; | 15703 | */ |
15704 | word *= 2; | ||
15705 | adv_asc38C1600_expanded_size = word; | ||
15706 | |||
15707 | /* | ||
15708 | * Clear the rest of ASC-38C1600 Internal RAM (32KB). | ||
15709 | */ | ||
15710 | for (; word < ADV_38C1600_MEMSIZE; word += 2) { | ||
15711 | AdvWriteWordAutoIncLram(iop_base, 0); | ||
15712 | } | ||
16165 | 15713 | ||
16166 | /* | 15714 | /* |
16167 | * Invert the TERM_SE bits and then set 'scsi_cfg1'. | 15715 | * Verify the microcode checksum. |
16168 | */ | 15716 | */ |
16169 | scsi_cfg1 |= (~asc_dvc->cfg->termination & TERM_SE); | 15717 | sum = 0; |
15718 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, 0); | ||
16170 | 15719 | ||
16171 | /* | 15720 | for (word = 0; word < adv_asc38C1600_expanded_size; word += 2) { |
16172 | * Clear Big Endian and Terminator Polarity bits and set possibly | 15721 | sum += AdvReadWordAutoIncLram(iop_base); |
16173 | * modified termination control bits in the Microcode SCSI_CFG1 | 15722 | } |
16174 | * Register Value. | ||
16175 | * | ||
16176 | * Big Endian bit is not used even on big endian machines. | ||
16177 | */ | ||
16178 | scsi_cfg1 &= (~BIG_ENDIAN & ~DIS_TERM_DRV & ~TERM_POL); | ||
16179 | 15723 | ||
16180 | /* | 15724 | if (sum != _adv_asc38C1600_chksum) { |
16181 | * Set SCSI_CFG1 Microcode Default Value | 15725 | asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM; |
16182 | * | 15726 | return ADV_ERROR; |
16183 | * Set possibly modified termination control bits in the Microcode | 15727 | } |
16184 | * SCSI_CFG1 Register Value. | ||
16185 | * | ||
16186 | * The microcode will set the SCSI_CFG1 register using this value | ||
16187 | * after it is started below. | ||
16188 | */ | ||
16189 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, scsi_cfg1); | ||
16190 | 15728 | ||
16191 | /* | 15729 | /* |
16192 | * Set MEM_CFG Microcode Default Value | 15730 | * Restore the RISC memory BIOS region. |
16193 | * | 15731 | */ |
16194 | * The microcode will set the MEM_CFG register using this value | 15732 | for (i = 0; i < ASC_MC_BIOSLEN / 2; i++) { |
16195 | * after it is started below. | 15733 | AdvWriteWordLram(iop_base, ASC_MC_BIOSMEM + (2 * i), |
16196 | * | 15734 | bios_mem[i]); |
16197 | * MEM_CFG may be accessed as a word or byte, but only bits 0-7 | 15735 | } |
16198 | * are defined. | ||
16199 | * | ||
16200 | * ASC-38C1600 has 32KB internal memory. | ||
16201 | * | ||
16202 | * XXX - Since ASC38C1600 Rev.3 has a Local RAM failure issue, we come | ||
16203 | * out a special 16K Adv Library and Microcode version. After the issue | ||
16204 | * resolved, we should turn back to the 32K support. Both a_condor.h and | ||
16205 | * mcode.sas files also need to be updated. | ||
16206 | * | ||
16207 | * AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, | ||
16208 | * BIOS_EN | RAM_SZ_32KB); | ||
16209 | */ | ||
16210 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, BIOS_EN | RAM_SZ_16KB); | ||
16211 | 15736 | ||
16212 | /* | 15737 | /* |
16213 | * Set SEL_MASK Microcode Default Value | 15738 | * Calculate and write the microcode code checksum to the microcode |
16214 | * | 15739 | * code checksum location ASC_MC_CODE_CHK_SUM (0x2C). |
16215 | * The microcode will set the SEL_MASK register using this value | 15740 | */ |
16216 | * after it is started below. | 15741 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, begin_addr); |
16217 | */ | 15742 | AdvReadWordLram(iop_base, ASC_MC_CODE_END_ADDR, end_addr); |
16218 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK, | 15743 | code_sum = 0; |
16219 | ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id)); | 15744 | AdvWriteWordRegister(iop_base, IOPW_RAM_ADDR, begin_addr); |
15745 | for (word = begin_addr; word < end_addr; word += 2) { | ||
15746 | code_sum += AdvReadWordAutoIncLram(iop_base); | ||
15747 | } | ||
15748 | AdvWriteWordLram(iop_base, ASC_MC_CODE_CHK_SUM, code_sum); | ||
15749 | |||
15750 | /* | ||
15751 | * Read microcode version and date. | ||
15752 | */ | ||
15753 | AdvReadWordLram(iop_base, ASC_MC_VERSION_DATE, | ||
15754 | asc_dvc->cfg->mcode_date); | ||
15755 | AdvReadWordLram(iop_base, ASC_MC_VERSION_NUM, | ||
15756 | asc_dvc->cfg->mcode_version); | ||
15757 | |||
15758 | /* | ||
15759 | * Set the chip type to indicate the ASC38C1600. | ||
15760 | */ | ||
15761 | AdvWriteWordLram(iop_base, ASC_MC_CHIP_TYPE, ADV_CHIP_ASC38C1600); | ||
15762 | |||
15763 | /* | ||
15764 | * Write 1 to bit 14 'DIS_TERM_DRV' in the SCSI_CFG1 register. | ||
15765 | * When DIS_TERM_DRV set to 1, C_DET[3:0] will reflect current | ||
15766 | * cable detection and then we are able to read C_DET[3:0]. | ||
15767 | * | ||
15768 | * Note: We will reset DIS_TERM_DRV to 0 in the 'Set SCSI_CFG1 | ||
15769 | * Microcode Default Value' section below. | ||
15770 | */ | ||
15771 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
15772 | AdvWriteWordRegister(iop_base, IOPW_SCSI_CFG1, | ||
15773 | scsi_cfg1 | DIS_TERM_DRV); | ||
15774 | |||
15775 | /* | ||
15776 | * If the PCI Configuration Command Register "Parity Error Response | ||
15777 | * Control" Bit was clear (0), then set the microcode variable | ||
15778 | * 'control_flag' CONTROL_FLAG_IGNORE_PERR flag to tell the microcode | ||
15779 | * to ignore DMA parity errors. | ||
15780 | */ | ||
15781 | if (asc_dvc->cfg->control_flag & CONTROL_FLAG_IGNORE_PERR) { | ||
15782 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
15783 | word |= CONTROL_FLAG_IGNORE_PERR; | ||
15784 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | ||
15785 | } | ||
16220 | 15786 | ||
16221 | /* | 15787 | /* |
16222 | * Build the carrier freelist. | 15788 | * If the BIOS control flag AIPP (Asynchronous Information |
16223 | * | 15789 | * Phase Protection) disable bit is not set, then set the firmware |
16224 | * Driver must have already allocated memory and set 'carrier_buf'. | 15790 | * 'control_flag' CONTROL_FLAG_ENABLE_AIPP bit to enable |
16225 | */ | 15791 | * AIPP checking and encoding. |
16226 | 15792 | */ | |
16227 | ASC_ASSERT(asc_dvc->carrier_buf != NULL); | 15793 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_AIPP_DIS) == 0) { |
16228 | 15794 | AdvReadWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); | |
16229 | carrp = (ADV_CARR_T *) ADV_16BALIGN(asc_dvc->carrier_buf); | 15795 | word |= CONTROL_FLAG_ENABLE_AIPP; |
16230 | asc_dvc->carr_freelist = NULL; | 15796 | AdvWriteWordLram(iop_base, ASC_MC_CONTROL_FLAG, word); |
16231 | if (carrp == (ADV_CARR_T *) asc_dvc->carrier_buf) | 15797 | } |
16232 | { | ||
16233 | buf_size = ADV_CARRIER_BUFSIZE; | ||
16234 | } else | ||
16235 | { | ||
16236 | buf_size = ADV_CARRIER_BUFSIZE - sizeof(ADV_CARR_T); | ||
16237 | } | ||
16238 | 15798 | ||
16239 | do { | 15799 | /* |
16240 | /* | 15800 | * For ASC-38C1600 use DMA_CFG0 default values: FIFO_THRESH_80B [6:4], |
16241 | * Get physical address for the carrier 'carrp'. | 15801 | * and START_CTL_TH [3:2]. |
16242 | */ | 15802 | */ |
16243 | contig_len = sizeof(ADV_CARR_T); | 15803 | AdvWriteByteRegister(iop_base, IOPB_DMA_CFG0, |
16244 | carr_paddr = cpu_to_le32(DvcGetPhyAddr(asc_dvc, NULL, (uchar *) carrp, | 15804 | FIFO_THRESH_80B | START_CTL_TH | READ_CMD_MRM); |
16245 | (ADV_SDCNT *) &contig_len, ADV_IS_CARRIER_FLAG)); | 15805 | |
16246 | 15806 | /* | |
16247 | buf_size -= sizeof(ADV_CARR_T); | 15807 | * Microcode operating variables for WDTR, SDTR, and command tag |
16248 | 15808 | * queuing will be set in AdvInquiryHandling() based on what a | |
16249 | /* | 15809 | * device reports it is capable of in Inquiry byte 7. |
16250 | * If the current carrier is not physically contiguous, then | 15810 | * |
16251 | * maybe there was a page crossing. Try the next carrier aligned | 15811 | * If SCSI Bus Resets have been disabled, then directly set |
16252 | * start address. | 15812 | * SDTR and WDTR from the EEPROM configuration. This will allow |
16253 | */ | 15813 | * the BIOS and warm boot to work without a SCSI bus hang on |
16254 | if (contig_len < sizeof(ADV_CARR_T)) | 15814 | * the Inquiry caused by host and target mismatched DTR values. |
16255 | { | 15815 | * Without the SCSI Bus Reset, before an Inquiry a device can't |
16256 | carrp++; | 15816 | * be assumed to be in Asynchronous, Narrow mode. |
16257 | continue; | 15817 | */ |
16258 | } | 15818 | if ((asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) { |
16259 | 15819 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, | |
16260 | carrp->carr_pa = carr_paddr; | 15820 | asc_dvc->wdtr_able); |
16261 | carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp)); | 15821 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, |
16262 | 15822 | asc_dvc->sdtr_able); | |
16263 | /* | 15823 | } |
16264 | * Insert the carrier at the beginning of the freelist. | ||
16265 | */ | ||
16266 | carrp->next_vpa = cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist)); | ||
16267 | asc_dvc->carr_freelist = carrp; | ||
16268 | |||
16269 | carrp++; | ||
16270 | } | ||
16271 | while (buf_size > 0); | ||
16272 | 15824 | ||
16273 | /* | 15825 | /* |
16274 | * Set-up the Host->RISC Initiator Command Queue (ICQ). | 15826 | * Set microcode operating variables for DISC and SDTR_SPEED1, |
16275 | */ | 15827 | * SDTR_SPEED2, SDTR_SPEED3, and SDTR_SPEED4 based on the EEPROM |
16276 | if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) | 15828 | * configuration values. |
16277 | { | 15829 | * |
16278 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | 15830 | * The SDTR per TID bitmask overrides the SDTR_SPEED1, SDTR_SPEED2, |
16279 | return ADV_ERROR; | 15831 | * SDTR_SPEED3, and SDTR_SPEED4 values so it is safe to set them |
16280 | } | 15832 | * without determining here whether the device supports SDTR. |
16281 | asc_dvc->carr_freelist = (ADV_CARR_T *) | 15833 | */ |
16282 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa)); | 15834 | AdvWriteWordLram(iop_base, ASC_MC_DISC_ENABLE, |
15835 | asc_dvc->cfg->disc_enable); | ||
15836 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED1, asc_dvc->sdtr_speed1); | ||
15837 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED2, asc_dvc->sdtr_speed2); | ||
15838 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED3, asc_dvc->sdtr_speed3); | ||
15839 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_SPEED4, asc_dvc->sdtr_speed4); | ||
15840 | |||
15841 | /* | ||
15842 | * Set SCSI_CFG0 Microcode Default Value. | ||
15843 | * | ||
15844 | * The microcode will set the SCSI_CFG0 register using this value | ||
15845 | * after it is started below. | ||
15846 | */ | ||
15847 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG0, | ||
15848 | PARITY_EN | QUEUE_128 | SEL_TMO_LONG | OUR_ID_EN | | ||
15849 | asc_dvc->chip_scsi_id); | ||
15850 | |||
15851 | /* | ||
15852 | * Calculate SCSI_CFG1 Microcode Default Value. | ||
15853 | * | ||
15854 | * The microcode will set the SCSI_CFG1 register using this value | ||
15855 | * after it is started below. | ||
15856 | * | ||
15857 | * Each ASC-38C1600 function has only two cable detect bits. | ||
15858 | * The bus mode override bits are in IOPB_SOFT_OVER_WR. | ||
15859 | */ | ||
15860 | scsi_cfg1 = AdvReadWordRegister(iop_base, IOPW_SCSI_CFG1); | ||
15861 | |||
15862 | /* | ||
15863 | * If the cable is reversed all of the SCSI_CTRL register signals | ||
15864 | * will be set. Check for and return an error if this condition is | ||
15865 | * found. | ||
15866 | */ | ||
15867 | if ((AdvReadWordRegister(iop_base, IOPW_SCSI_CTRL) & 0x3F07) == 0x3F07) { | ||
15868 | asc_dvc->err_code |= ASC_IERR_REVERSED_CABLE; | ||
15869 | return ADV_ERROR; | ||
15870 | } | ||
16283 | 15871 | ||
16284 | /* | 15872 | /* |
16285 | * The first command issued will be placed in the stopper carrier. | 15873 | * Each ASC-38C1600 function has two connectors. Only an HVD device |
16286 | */ | 15874 | * can not be connected to either connector. An LVD device or SE device |
16287 | asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | 15875 | * may be connected to either connecor. If an SE device is connected, |
15876 | * then at most Ultra speed (20 Mhz) can be used on both connectors. | ||
15877 | * | ||
15878 | * If an HVD device is attached, return an error. | ||
15879 | */ | ||
15880 | if (scsi_cfg1 & HVD) { | ||
15881 | asc_dvc->err_code |= ASC_IERR_HVD_DEVICE; | ||
15882 | return ADV_ERROR; | ||
15883 | } | ||
16288 | 15884 | ||
16289 | /* | 15885 | /* |
16290 | * Set RISC ICQ physical address start value. Initialize the | 15886 | * Each function in the ASC-38C1600 uses only the SE cable detect and |
16291 | * COMMA register to the same value otherwise the RISC will | 15887 | * termination because there are two connectors for each function. Each |
16292 | * prematurely detect a command is available. | 15888 | * function may use either LVD or SE mode. Corresponding the SE automatic |
16293 | */ | 15889 | * termination control EEPROM bits are used for each function. Each |
16294 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa); | 15890 | * function has its own EEPROM. If SE automatic control is enabled for |
16295 | AdvWriteDWordRegister(iop_base, IOPDW_COMMA, | 15891 | * the function, then set the termination value based on a table listed |
16296 | le32_to_cpu(asc_dvc->icq_sp->carr_pa)); | 15892 | * in a_condor.h. |
15893 | * | ||
15894 | * If manual termination is specified in the EEPROM for the function, | ||
15895 | * then 'termination' was set-up in AscInitFrom38C1600EEPROM() and is | ||
15896 | * ready to be 'ored' into SCSI_CFG1. | ||
15897 | */ | ||
15898 | if ((asc_dvc->cfg->termination & TERM_SE) == 0) { | ||
15899 | /* SE automatic termination control is enabled. */ | ||
15900 | switch (scsi_cfg1 & C_DET_SE) { | ||
15901 | /* TERM_SE_HI: on, TERM_SE_LO: on */ | ||
15902 | case 0x1: | ||
15903 | case 0x2: | ||
15904 | case 0x3: | ||
15905 | asc_dvc->cfg->termination |= TERM_SE; | ||
15906 | break; | ||
15907 | |||
15908 | case 0x0: | ||
15909 | if (ASC_PCI_ID2FUNC(asc_dvc->cfg->pci_slot_info) == 0) { | ||
15910 | /* Function 0 - TERM_SE_HI: off, TERM_SE_LO: off */ | ||
15911 | } else { | ||
15912 | /* Function 1 - TERM_SE_HI: on, TERM_SE_LO: off */ | ||
15913 | asc_dvc->cfg->termination |= TERM_SE_HI; | ||
15914 | } | ||
15915 | break; | ||
15916 | } | ||
15917 | } | ||
16297 | 15918 | ||
16298 | /* | 15919 | /* |
16299 | * Set-up the RISC->Host Initiator Response Queue (IRQ). | 15920 | * Clear any set TERM_SE bits. |
16300 | */ | 15921 | */ |
16301 | if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) | 15922 | scsi_cfg1 &= ~TERM_SE; |
16302 | { | 15923 | |
16303 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; | 15924 | /* |
16304 | return ADV_ERROR; | 15925 | * Invert the TERM_SE bits and then set 'scsi_cfg1'. |
16305 | } | 15926 | */ |
16306 | asc_dvc->carr_freelist = (ADV_CARR_T *) | 15927 | scsi_cfg1 |= (~asc_dvc->cfg->termination & TERM_SE); |
16307 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa)); | 15928 | |
15929 | /* | ||
15930 | * Clear Big Endian and Terminator Polarity bits and set possibly | ||
15931 | * modified termination control bits in the Microcode SCSI_CFG1 | ||
15932 | * Register Value. | ||
15933 | * | ||
15934 | * Big Endian bit is not used even on big endian machines. | ||
15935 | */ | ||
15936 | scsi_cfg1 &= (~BIG_ENDIAN & ~DIS_TERM_DRV & ~TERM_POL); | ||
15937 | |||
15938 | /* | ||
15939 | * Set SCSI_CFG1 Microcode Default Value | ||
15940 | * | ||
15941 | * Set possibly modified termination control bits in the Microcode | ||
15942 | * SCSI_CFG1 Register Value. | ||
15943 | * | ||
15944 | * The microcode will set the SCSI_CFG1 register using this value | ||
15945 | * after it is started below. | ||
15946 | */ | ||
15947 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SCSI_CFG1, scsi_cfg1); | ||
15948 | |||
15949 | /* | ||
15950 | * Set MEM_CFG Microcode Default Value | ||
15951 | * | ||
15952 | * The microcode will set the MEM_CFG register using this value | ||
15953 | * after it is started below. | ||
15954 | * | ||
15955 | * MEM_CFG may be accessed as a word or byte, but only bits 0-7 | ||
15956 | * are defined. | ||
15957 | * | ||
15958 | * ASC-38C1600 has 32KB internal memory. | ||
15959 | * | ||
15960 | * XXX - Since ASC38C1600 Rev.3 has a Local RAM failure issue, we come | ||
15961 | * out a special 16K Adv Library and Microcode version. After the issue | ||
15962 | * resolved, we should turn back to the 32K support. Both a_condor.h and | ||
15963 | * mcode.sas files also need to be updated. | ||
15964 | * | ||
15965 | * AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, | ||
15966 | * BIOS_EN | RAM_SZ_32KB); | ||
15967 | */ | ||
15968 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_MEM_CFG, | ||
15969 | BIOS_EN | RAM_SZ_16KB); | ||
15970 | |||
15971 | /* | ||
15972 | * Set SEL_MASK Microcode Default Value | ||
15973 | * | ||
15974 | * The microcode will set the SEL_MASK register using this value | ||
15975 | * after it is started below. | ||
15976 | */ | ||
15977 | AdvWriteWordLram(iop_base, ASC_MC_DEFAULT_SEL_MASK, | ||
15978 | ADV_TID_TO_TIDMASK(asc_dvc->chip_scsi_id)); | ||
15979 | |||
15980 | /* | ||
15981 | * Build the carrier freelist. | ||
15982 | * | ||
15983 | * Driver must have already allocated memory and set 'carrier_buf'. | ||
15984 | */ | ||
15985 | |||
15986 | ASC_ASSERT(asc_dvc->carrier_buf != NULL); | ||
15987 | |||
15988 | carrp = (ADV_CARR_T *) ADV_16BALIGN(asc_dvc->carrier_buf); | ||
15989 | asc_dvc->carr_freelist = NULL; | ||
15990 | if (carrp == (ADV_CARR_T *) asc_dvc->carrier_buf) { | ||
15991 | buf_size = ADV_CARRIER_BUFSIZE; | ||
15992 | } else { | ||
15993 | buf_size = ADV_CARRIER_BUFSIZE - sizeof(ADV_CARR_T); | ||
15994 | } | ||
16308 | 15995 | ||
16309 | /* | 15996 | do { |
16310 | * The first command completed by the RISC will be placed in | 15997 | /* |
16311 | * the stopper. | 15998 | * Get physical address for the carrier 'carrp'. |
16312 | * | 15999 | */ |
16313 | * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is | 16000 | contig_len = sizeof(ADV_CARR_T); |
16314 | * completed the RISC will set the ASC_RQ_STOPPER bit. | 16001 | carr_paddr = |
16315 | */ | 16002 | cpu_to_le32(DvcGetPhyAddr |
16316 | asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | 16003 | (asc_dvc, NULL, (uchar *)carrp, |
16004 | (ADV_SDCNT *)&contig_len, | ||
16005 | ADV_IS_CARRIER_FLAG)); | ||
16317 | 16006 | ||
16318 | /* | 16007 | buf_size -= sizeof(ADV_CARR_T); |
16319 | * Set RISC IRQ physical address start value. | ||
16320 | */ | ||
16321 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa); | ||
16322 | asc_dvc->carr_pending_cnt = 0; | ||
16323 | 16008 | ||
16324 | AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES, | 16009 | /* |
16325 | (ADV_INTR_ENABLE_HOST_INTR | ADV_INTR_ENABLE_GLOBAL_INTR)); | 16010 | * If the current carrier is not physically contiguous, then |
16326 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word); | 16011 | * maybe there was a page crossing. Try the next carrier aligned |
16327 | AdvWriteWordRegister(iop_base, IOPW_PC, word); | 16012 | * start address. |
16013 | */ | ||
16014 | if (contig_len < sizeof(ADV_CARR_T)) { | ||
16015 | carrp++; | ||
16016 | continue; | ||
16017 | } | ||
16018 | |||
16019 | carrp->carr_pa = carr_paddr; | ||
16020 | carrp->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(carrp)); | ||
16328 | 16021 | ||
16329 | /* finally, finally, gentlemen, start your engine */ | 16022 | /* |
16330 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN); | 16023 | * Insert the carrier at the beginning of the freelist. |
16024 | */ | ||
16025 | carrp->next_vpa = | ||
16026 | cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist)); | ||
16027 | asc_dvc->carr_freelist = carrp; | ||
16331 | 16028 | ||
16332 | /* | 16029 | carrp++; |
16333 | * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus | 16030 | } |
16334 | * Resets should be performed. The RISC has to be running | 16031 | while (buf_size > 0); |
16335 | * to issue a SCSI Bus Reset. | 16032 | |
16336 | */ | 16033 | /* |
16337 | if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) | 16034 | * Set-up the Host->RISC Initiator Command Queue (ICQ). |
16338 | { | 16035 | */ |
16339 | /* | 16036 | if ((asc_dvc->icq_sp = asc_dvc->carr_freelist) == NULL) { |
16340 | * If the BIOS Signature is present in memory, restore the | 16037 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; |
16341 | * per TID microcode operating variables. | 16038 | return ADV_ERROR; |
16342 | */ | 16039 | } |
16343 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM)/2] == 0x55AA) | 16040 | asc_dvc->carr_freelist = (ADV_CARR_T *) |
16344 | { | 16041 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->icq_sp->next_vpa)); |
16345 | /* | 16042 | |
16346 | * Restore per TID negotiated values. | 16043 | /* |
16347 | */ | 16044 | * The first command issued will be placed in the stopper carrier. |
16348 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | 16045 | */ |
16349 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | 16046 | asc_dvc->icq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); |
16350 | AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); | 16047 | |
16351 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | 16048 | /* |
16352 | for (tid = 0; tid <= ASC_MAX_TID; tid++) | 16049 | * Set RISC ICQ physical address start value. Initialize the |
16353 | { | 16050 | * COMMA register to the same value otherwise the RISC will |
16354 | AdvWriteByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | 16051 | * prematurely detect a command is available. |
16355 | max_cmd[tid]); | 16052 | */ |
16356 | } | 16053 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_ICQ, asc_dvc->icq_sp->carr_pa); |
16357 | } else | 16054 | AdvWriteDWordRegister(iop_base, IOPDW_COMMA, |
16358 | { | 16055 | le32_to_cpu(asc_dvc->icq_sp->carr_pa)); |
16359 | if (AdvResetSB(asc_dvc) != ADV_TRUE) | 16056 | |
16360 | { | 16057 | /* |
16361 | warn_code = ASC_WARN_BUSRESET_ERROR; | 16058 | * Set-up the RISC->Host Initiator Response Queue (IRQ). |
16362 | } | 16059 | */ |
16363 | } | 16060 | if ((asc_dvc->irq_sp = asc_dvc->carr_freelist) == NULL) { |
16364 | } | 16061 | asc_dvc->err_code |= ASC_IERR_NO_CARRIER; |
16062 | return ADV_ERROR; | ||
16063 | } | ||
16064 | asc_dvc->carr_freelist = (ADV_CARR_T *) | ||
16065 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->next_vpa)); | ||
16066 | |||
16067 | /* | ||
16068 | * The first command completed by the RISC will be placed in | ||
16069 | * the stopper. | ||
16070 | * | ||
16071 | * Note: Set 'next_vpa' to ASC_CQ_STOPPER. When the request is | ||
16072 | * completed the RISC will set the ASC_RQ_STOPPER bit. | ||
16073 | */ | ||
16074 | asc_dvc->irq_sp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
16075 | |||
16076 | /* | ||
16077 | * Set RISC IRQ physical address start value. | ||
16078 | */ | ||
16079 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IRQ, asc_dvc->irq_sp->carr_pa); | ||
16080 | asc_dvc->carr_pending_cnt = 0; | ||
16081 | |||
16082 | AdvWriteByteRegister(iop_base, IOPB_INTR_ENABLES, | ||
16083 | (ADV_INTR_ENABLE_HOST_INTR | | ||
16084 | ADV_INTR_ENABLE_GLOBAL_INTR)); | ||
16085 | AdvReadWordLram(iop_base, ASC_MC_CODE_BEGIN_ADDR, word); | ||
16086 | AdvWriteWordRegister(iop_base, IOPW_PC, word); | ||
16087 | |||
16088 | /* finally, finally, gentlemen, start your engine */ | ||
16089 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_RUN); | ||
16090 | |||
16091 | /* | ||
16092 | * Reset the SCSI Bus if the EEPROM indicates that SCSI Bus | ||
16093 | * Resets should be performed. The RISC has to be running | ||
16094 | * to issue a SCSI Bus Reset. | ||
16095 | */ | ||
16096 | if (asc_dvc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) { | ||
16097 | /* | ||
16098 | * If the BIOS Signature is present in memory, restore the | ||
16099 | * per TID microcode operating variables. | ||
16100 | */ | ||
16101 | if (bios_mem[(ASC_MC_BIOS_SIGNATURE - ASC_MC_BIOSMEM) / 2] == | ||
16102 | 0x55AA) { | ||
16103 | /* | ||
16104 | * Restore per TID negotiated values. | ||
16105 | */ | ||
16106 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | ||
16107 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | ||
16108 | AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); | ||
16109 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, | ||
16110 | tagqng_able); | ||
16111 | for (tid = 0; tid <= ASC_MAX_TID; tid++) { | ||
16112 | AdvWriteByteLram(iop_base, | ||
16113 | ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
16114 | max_cmd[tid]); | ||
16115 | } | ||
16116 | } else { | ||
16117 | if (AdvResetSB(asc_dvc) != ADV_TRUE) { | ||
16118 | warn_code = ASC_WARN_BUSRESET_ERROR; | ||
16119 | } | ||
16120 | } | ||
16121 | } | ||
16365 | 16122 | ||
16366 | return warn_code; | 16123 | return warn_code; |
16367 | } | 16124 | } |
16368 | 16125 | ||
16369 | /* | 16126 | /* |
@@ -16378,164 +16135,146 @@ AdvInitAsc38C1600Driver(ADV_DVC_VAR *asc_dvc) | |||
16378 | * | 16135 | * |
16379 | * Note: Chip is stopped on entry. | 16136 | * Note: Chip is stopped on entry. |
16380 | */ | 16137 | */ |
16381 | STATIC int __init | 16138 | static int __init AdvInitFrom3550EEP(ADV_DVC_VAR *asc_dvc) |
16382 | AdvInitFrom3550EEP(ADV_DVC_VAR *asc_dvc) | ||
16383 | { | 16139 | { |
16384 | AdvPortAddr iop_base; | 16140 | AdvPortAddr iop_base; |
16385 | ushort warn_code; | 16141 | ushort warn_code; |
16386 | ADVEEP_3550_CONFIG eep_config; | 16142 | ADVEEP_3550_CONFIG eep_config; |
16387 | int i; | 16143 | int i; |
16388 | 16144 | ||
16389 | iop_base = asc_dvc->iop_base; | 16145 | iop_base = asc_dvc->iop_base; |
16390 | 16146 | ||
16391 | warn_code = 0; | 16147 | warn_code = 0; |
16392 | 16148 | ||
16393 | /* | 16149 | /* |
16394 | * Read the board's EEPROM configuration. | 16150 | * Read the board's EEPROM configuration. |
16395 | * | 16151 | * |
16396 | * Set default values if a bad checksum is found. | 16152 | * Set default values if a bad checksum is found. |
16397 | */ | 16153 | */ |
16398 | if (AdvGet3550EEPConfig(iop_base, &eep_config) != eep_config.check_sum) | 16154 | if (AdvGet3550EEPConfig(iop_base, &eep_config) != eep_config.check_sum) { |
16399 | { | 16155 | warn_code |= ASC_WARN_EEPROM_CHKSUM; |
16400 | warn_code |= ASC_WARN_EEPROM_CHKSUM; | ||
16401 | |||
16402 | /* | ||
16403 | * Set EEPROM default values. | ||
16404 | */ | ||
16405 | for (i = 0; i < sizeof(ADVEEP_3550_CONFIG); i++) | ||
16406 | { | ||
16407 | *((uchar *) &eep_config + i) = | ||
16408 | *((uchar *) &Default_3550_EEPROM_Config + i); | ||
16409 | } | ||
16410 | |||
16411 | /* | ||
16412 | * Assume the 6 byte board serial number that was read | ||
16413 | * from EEPROM is correct even if the EEPROM checksum | ||
16414 | * failed. | ||
16415 | */ | ||
16416 | eep_config.serial_number_word3 = | ||
16417 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1); | ||
16418 | |||
16419 | eep_config.serial_number_word2 = | ||
16420 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 2); | ||
16421 | |||
16422 | eep_config.serial_number_word1 = | ||
16423 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 3); | ||
16424 | |||
16425 | AdvSet3550EEPConfig(iop_base, &eep_config); | ||
16426 | } | ||
16427 | /* | ||
16428 | * Set ASC_DVC_VAR and ASC_DVC_CFG variables from the | ||
16429 | * EEPROM configuration that was read. | ||
16430 | * | ||
16431 | * This is the mapping of EEPROM fields to Adv Library fields. | ||
16432 | */ | ||
16433 | asc_dvc->wdtr_able = eep_config.wdtr_able; | ||
16434 | asc_dvc->sdtr_able = eep_config.sdtr_able; | ||
16435 | asc_dvc->ultra_able = eep_config.ultra_able; | ||
16436 | asc_dvc->tagqng_able = eep_config.tagqng_able; | ||
16437 | asc_dvc->cfg->disc_enable = eep_config.disc_enable; | ||
16438 | asc_dvc->max_host_qng = eep_config.max_host_qng; | ||
16439 | asc_dvc->max_dvc_qng = eep_config.max_dvc_qng; | ||
16440 | asc_dvc->chip_scsi_id = (eep_config.adapter_scsi_id & ADV_MAX_TID); | ||
16441 | asc_dvc->start_motor = eep_config.start_motor; | ||
16442 | asc_dvc->scsi_reset_wait = eep_config.scsi_reset_delay; | ||
16443 | asc_dvc->bios_ctrl = eep_config.bios_ctrl; | ||
16444 | asc_dvc->no_scam = eep_config.scam_tolerant; | ||
16445 | asc_dvc->cfg->serial1 = eep_config.serial_number_word1; | ||
16446 | asc_dvc->cfg->serial2 = eep_config.serial_number_word2; | ||
16447 | asc_dvc->cfg->serial3 = eep_config.serial_number_word3; | ||
16448 | 16156 | ||
16449 | /* | 16157 | /* |
16450 | * Set the host maximum queuing (max. 253, min. 16) and the per device | 16158 | * Set EEPROM default values. |
16451 | * maximum queuing (max. 63, min. 4). | 16159 | */ |
16452 | */ | 16160 | for (i = 0; i < sizeof(ADVEEP_3550_CONFIG); i++) { |
16453 | if (eep_config.max_host_qng > ASC_DEF_MAX_HOST_QNG) | 16161 | *((uchar *)&eep_config + i) = |
16454 | { | 16162 | *((uchar *)&Default_3550_EEPROM_Config + i); |
16455 | eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG; | 16163 | } |
16456 | } else if (eep_config.max_host_qng < ASC_DEF_MIN_HOST_QNG) | ||
16457 | { | ||
16458 | /* If the value is zero, assume it is uninitialized. */ | ||
16459 | if (eep_config.max_host_qng == 0) | ||
16460 | { | ||
16461 | eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG; | ||
16462 | } else | ||
16463 | { | ||
16464 | eep_config.max_host_qng = ASC_DEF_MIN_HOST_QNG; | ||
16465 | } | ||
16466 | } | ||
16467 | 16164 | ||
16468 | if (eep_config.max_dvc_qng > ASC_DEF_MAX_DVC_QNG) | 16165 | /* |
16469 | { | 16166 | * Assume the 6 byte board serial number that was read |
16470 | eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG; | 16167 | * from EEPROM is correct even if the EEPROM checksum |
16471 | } else if (eep_config.max_dvc_qng < ASC_DEF_MIN_DVC_QNG) | 16168 | * failed. |
16472 | { | 16169 | */ |
16473 | /* If the value is zero, assume it is uninitialized. */ | 16170 | eep_config.serial_number_word3 = |
16474 | if (eep_config.max_dvc_qng == 0) | 16171 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1); |
16475 | { | ||
16476 | eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG; | ||
16477 | } else | ||
16478 | { | ||
16479 | eep_config.max_dvc_qng = ASC_DEF_MIN_DVC_QNG; | ||
16480 | } | ||
16481 | } | ||
16482 | 16172 | ||
16483 | /* | 16173 | eep_config.serial_number_word2 = |
16484 | * If 'max_dvc_qng' is greater than 'max_host_qng', then | 16174 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 2); |
16485 | * set 'max_dvc_qng' to 'max_host_qng'. | ||
16486 | */ | ||
16487 | if (eep_config.max_dvc_qng > eep_config.max_host_qng) | ||
16488 | { | ||
16489 | eep_config.max_dvc_qng = eep_config.max_host_qng; | ||
16490 | } | ||
16491 | 16175 | ||
16492 | /* | 16176 | eep_config.serial_number_word1 = |
16493 | * Set ADV_DVC_VAR 'max_host_qng' and ADV_DVC_VAR 'max_dvc_qng' | 16177 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 3); |
16494 | * values based on possibly adjusted EEPROM values. | 16178 | |
16495 | */ | 16179 | AdvSet3550EEPConfig(iop_base, &eep_config); |
16496 | asc_dvc->max_host_qng = eep_config.max_host_qng; | 16180 | } |
16497 | asc_dvc->max_dvc_qng = eep_config.max_dvc_qng; | 16181 | /* |
16182 | * Set ASC_DVC_VAR and ASC_DVC_CFG variables from the | ||
16183 | * EEPROM configuration that was read. | ||
16184 | * | ||
16185 | * This is the mapping of EEPROM fields to Adv Library fields. | ||
16186 | */ | ||
16187 | asc_dvc->wdtr_able = eep_config.wdtr_able; | ||
16188 | asc_dvc->sdtr_able = eep_config.sdtr_able; | ||
16189 | asc_dvc->ultra_able = eep_config.ultra_able; | ||
16190 | asc_dvc->tagqng_able = eep_config.tagqng_able; | ||
16191 | asc_dvc->cfg->disc_enable = eep_config.disc_enable; | ||
16192 | asc_dvc->max_host_qng = eep_config.max_host_qng; | ||
16193 | asc_dvc->max_dvc_qng = eep_config.max_dvc_qng; | ||
16194 | asc_dvc->chip_scsi_id = (eep_config.adapter_scsi_id & ADV_MAX_TID); | ||
16195 | asc_dvc->start_motor = eep_config.start_motor; | ||
16196 | asc_dvc->scsi_reset_wait = eep_config.scsi_reset_delay; | ||
16197 | asc_dvc->bios_ctrl = eep_config.bios_ctrl; | ||
16198 | asc_dvc->no_scam = eep_config.scam_tolerant; | ||
16199 | asc_dvc->cfg->serial1 = eep_config.serial_number_word1; | ||
16200 | asc_dvc->cfg->serial2 = eep_config.serial_number_word2; | ||
16201 | asc_dvc->cfg->serial3 = eep_config.serial_number_word3; | ||
16202 | |||
16203 | /* | ||
16204 | * Set the host maximum queuing (max. 253, min. 16) and the per device | ||
16205 | * maximum queuing (max. 63, min. 4). | ||
16206 | */ | ||
16207 | if (eep_config.max_host_qng > ASC_DEF_MAX_HOST_QNG) { | ||
16208 | eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG; | ||
16209 | } else if (eep_config.max_host_qng < ASC_DEF_MIN_HOST_QNG) { | ||
16210 | /* If the value is zero, assume it is uninitialized. */ | ||
16211 | if (eep_config.max_host_qng == 0) { | ||
16212 | eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG; | ||
16213 | } else { | ||
16214 | eep_config.max_host_qng = ASC_DEF_MIN_HOST_QNG; | ||
16215 | } | ||
16216 | } | ||
16498 | 16217 | ||
16218 | if (eep_config.max_dvc_qng > ASC_DEF_MAX_DVC_QNG) { | ||
16219 | eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG; | ||
16220 | } else if (eep_config.max_dvc_qng < ASC_DEF_MIN_DVC_QNG) { | ||
16221 | /* If the value is zero, assume it is uninitialized. */ | ||
16222 | if (eep_config.max_dvc_qng == 0) { | ||
16223 | eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG; | ||
16224 | } else { | ||
16225 | eep_config.max_dvc_qng = ASC_DEF_MIN_DVC_QNG; | ||
16226 | } | ||
16227 | } | ||
16499 | 16228 | ||
16500 | /* | 16229 | /* |
16501 | * If the EEPROM 'termination' field is set to automatic (0), then set | 16230 | * If 'max_dvc_qng' is greater than 'max_host_qng', then |
16502 | * the ADV_DVC_CFG 'termination' field to automatic also. | 16231 | * set 'max_dvc_qng' to 'max_host_qng'. |
16503 | * | 16232 | */ |
16504 | * If the termination is specified with a non-zero 'termination' | 16233 | if (eep_config.max_dvc_qng > eep_config.max_host_qng) { |
16505 | * value check that a legal value is set and set the ADV_DVC_CFG | 16234 | eep_config.max_dvc_qng = eep_config.max_host_qng; |
16506 | * 'termination' field appropriately. | 16235 | } |
16507 | */ | ||
16508 | if (eep_config.termination == 0) | ||
16509 | { | ||
16510 | asc_dvc->cfg->termination = 0; /* auto termination */ | ||
16511 | } else | ||
16512 | { | ||
16513 | /* Enable manual control with low off / high off. */ | ||
16514 | if (eep_config.termination == 1) | ||
16515 | { | ||
16516 | asc_dvc->cfg->termination = TERM_CTL_SEL; | ||
16517 | |||
16518 | /* Enable manual control with low off / high on. */ | ||
16519 | } else if (eep_config.termination == 2) | ||
16520 | { | ||
16521 | asc_dvc->cfg->termination = TERM_CTL_SEL | TERM_CTL_H; | ||
16522 | |||
16523 | /* Enable manual control with low on / high on. */ | ||
16524 | } else if (eep_config.termination == 3) | ||
16525 | { | ||
16526 | asc_dvc->cfg->termination = TERM_CTL_SEL | TERM_CTL_H | TERM_CTL_L; | ||
16527 | } else | ||
16528 | { | ||
16529 | /* | ||
16530 | * The EEPROM 'termination' field contains a bad value. Use | ||
16531 | * automatic termination instead. | ||
16532 | */ | ||
16533 | asc_dvc->cfg->termination = 0; | ||
16534 | warn_code |= ASC_WARN_EEPROM_TERMINATION; | ||
16535 | } | ||
16536 | } | ||
16537 | 16236 | ||
16538 | return warn_code; | 16237 | /* |
16238 | * Set ADV_DVC_VAR 'max_host_qng' and ADV_DVC_VAR 'max_dvc_qng' | ||
16239 | * values based on possibly adjusted EEPROM values. | ||
16240 | */ | ||
16241 | asc_dvc->max_host_qng = eep_config.max_host_qng; | ||
16242 | asc_dvc->max_dvc_qng = eep_config.max_dvc_qng; | ||
16243 | |||
16244 | /* | ||
16245 | * If the EEPROM 'termination' field is set to automatic (0), then set | ||
16246 | * the ADV_DVC_CFG 'termination' field to automatic also. | ||
16247 | * | ||
16248 | * If the termination is specified with a non-zero 'termination' | ||
16249 | * value check that a legal value is set and set the ADV_DVC_CFG | ||
16250 | * 'termination' field appropriately. | ||
16251 | */ | ||
16252 | if (eep_config.termination == 0) { | ||
16253 | asc_dvc->cfg->termination = 0; /* auto termination */ | ||
16254 | } else { | ||
16255 | /* Enable manual control with low off / high off. */ | ||
16256 | if (eep_config.termination == 1) { | ||
16257 | asc_dvc->cfg->termination = TERM_CTL_SEL; | ||
16258 | |||
16259 | /* Enable manual control with low off / high on. */ | ||
16260 | } else if (eep_config.termination == 2) { | ||
16261 | asc_dvc->cfg->termination = TERM_CTL_SEL | TERM_CTL_H; | ||
16262 | |||
16263 | /* Enable manual control with low on / high on. */ | ||
16264 | } else if (eep_config.termination == 3) { | ||
16265 | asc_dvc->cfg->termination = | ||
16266 | TERM_CTL_SEL | TERM_CTL_H | TERM_CTL_L; | ||
16267 | } else { | ||
16268 | /* | ||
16269 | * The EEPROM 'termination' field contains a bad value. Use | ||
16270 | * automatic termination instead. | ||
16271 | */ | ||
16272 | asc_dvc->cfg->termination = 0; | ||
16273 | warn_code |= ASC_WARN_EEPROM_TERMINATION; | ||
16274 | } | ||
16275 | } | ||
16276 | |||
16277 | return warn_code; | ||
16539 | } | 16278 | } |
16540 | 16279 | ||
16541 | /* | 16280 | /* |
@@ -16550,225 +16289,195 @@ AdvInitFrom3550EEP(ADV_DVC_VAR *asc_dvc) | |||
16550 | * | 16289 | * |
16551 | * Note: Chip is stopped on entry. | 16290 | * Note: Chip is stopped on entry. |
16552 | */ | 16291 | */ |
16553 | STATIC int __init | 16292 | static int __init AdvInitFrom38C0800EEP(ADV_DVC_VAR *asc_dvc) |
16554 | AdvInitFrom38C0800EEP(ADV_DVC_VAR *asc_dvc) | ||
16555 | { | 16293 | { |
16556 | AdvPortAddr iop_base; | 16294 | AdvPortAddr iop_base; |
16557 | ushort warn_code; | 16295 | ushort warn_code; |
16558 | ADVEEP_38C0800_CONFIG eep_config; | 16296 | ADVEEP_38C0800_CONFIG eep_config; |
16559 | int i; | 16297 | int i; |
16560 | uchar tid, termination; | 16298 | uchar tid, termination; |
16561 | ushort sdtr_speed = 0; | 16299 | ushort sdtr_speed = 0; |
16300 | |||
16301 | iop_base = asc_dvc->iop_base; | ||
16302 | |||
16303 | warn_code = 0; | ||
16304 | |||
16305 | /* | ||
16306 | * Read the board's EEPROM configuration. | ||
16307 | * | ||
16308 | * Set default values if a bad checksum is found. | ||
16309 | */ | ||
16310 | if (AdvGet38C0800EEPConfig(iop_base, &eep_config) != | ||
16311 | eep_config.check_sum) { | ||
16312 | warn_code |= ASC_WARN_EEPROM_CHKSUM; | ||
16562 | 16313 | ||
16563 | iop_base = asc_dvc->iop_base; | 16314 | /* |
16315 | * Set EEPROM default values. | ||
16316 | */ | ||
16317 | for (i = 0; i < sizeof(ADVEEP_38C0800_CONFIG); i++) { | ||
16318 | *((uchar *)&eep_config + i) = | ||
16319 | *((uchar *)&Default_38C0800_EEPROM_Config + i); | ||
16320 | } | ||
16564 | 16321 | ||
16565 | warn_code = 0; | 16322 | /* |
16323 | * Assume the 6 byte board serial number that was read | ||
16324 | * from EEPROM is correct even if the EEPROM checksum | ||
16325 | * failed. | ||
16326 | */ | ||
16327 | eep_config.serial_number_word3 = | ||
16328 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1); | ||
16566 | 16329 | ||
16567 | /* | 16330 | eep_config.serial_number_word2 = |
16568 | * Read the board's EEPROM configuration. | 16331 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 2); |
16569 | * | ||
16570 | * Set default values if a bad checksum is found. | ||
16571 | */ | ||
16572 | if (AdvGet38C0800EEPConfig(iop_base, &eep_config) != eep_config.check_sum) | ||
16573 | { | ||
16574 | warn_code |= ASC_WARN_EEPROM_CHKSUM; | ||
16575 | |||
16576 | /* | ||
16577 | * Set EEPROM default values. | ||
16578 | */ | ||
16579 | for (i = 0; i < sizeof(ADVEEP_38C0800_CONFIG); i++) | ||
16580 | { | ||
16581 | *((uchar *) &eep_config + i) = | ||
16582 | *((uchar *) &Default_38C0800_EEPROM_Config + i); | ||
16583 | } | ||
16584 | |||
16585 | /* | ||
16586 | * Assume the 6 byte board serial number that was read | ||
16587 | * from EEPROM is correct even if the EEPROM checksum | ||
16588 | * failed. | ||
16589 | */ | ||
16590 | eep_config.serial_number_word3 = | ||
16591 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1); | ||
16592 | |||
16593 | eep_config.serial_number_word2 = | ||
16594 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 2); | ||
16595 | |||
16596 | eep_config.serial_number_word1 = | ||
16597 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 3); | ||
16598 | |||
16599 | AdvSet38C0800EEPConfig(iop_base, &eep_config); | ||
16600 | } | ||
16601 | /* | ||
16602 | * Set ADV_DVC_VAR and ADV_DVC_CFG variables from the | ||
16603 | * EEPROM configuration that was read. | ||
16604 | * | ||
16605 | * This is the mapping of EEPROM fields to Adv Library fields. | ||
16606 | */ | ||
16607 | asc_dvc->wdtr_able = eep_config.wdtr_able; | ||
16608 | asc_dvc->sdtr_speed1 = eep_config.sdtr_speed1; | ||
16609 | asc_dvc->sdtr_speed2 = eep_config.sdtr_speed2; | ||
16610 | asc_dvc->sdtr_speed3 = eep_config.sdtr_speed3; | ||
16611 | asc_dvc->sdtr_speed4 = eep_config.sdtr_speed4; | ||
16612 | asc_dvc->tagqng_able = eep_config.tagqng_able; | ||
16613 | asc_dvc->cfg->disc_enable = eep_config.disc_enable; | ||
16614 | asc_dvc->max_host_qng = eep_config.max_host_qng; | ||
16615 | asc_dvc->max_dvc_qng = eep_config.max_dvc_qng; | ||
16616 | asc_dvc->chip_scsi_id = (eep_config.adapter_scsi_id & ADV_MAX_TID); | ||
16617 | asc_dvc->start_motor = eep_config.start_motor; | ||
16618 | asc_dvc->scsi_reset_wait = eep_config.scsi_reset_delay; | ||
16619 | asc_dvc->bios_ctrl = eep_config.bios_ctrl; | ||
16620 | asc_dvc->no_scam = eep_config.scam_tolerant; | ||
16621 | asc_dvc->cfg->serial1 = eep_config.serial_number_word1; | ||
16622 | asc_dvc->cfg->serial2 = eep_config.serial_number_word2; | ||
16623 | asc_dvc->cfg->serial3 = eep_config.serial_number_word3; | ||
16624 | 16332 | ||
16625 | /* | 16333 | eep_config.serial_number_word1 = |
16626 | * For every Target ID if any of its 'sdtr_speed[1234]' bits | 16334 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 3); |
16627 | * are set, then set an 'sdtr_able' bit for it. | ||
16628 | */ | ||
16629 | asc_dvc->sdtr_able = 0; | ||
16630 | for (tid = 0; tid <= ADV_MAX_TID; tid++) | ||
16631 | { | ||
16632 | if (tid == 0) | ||
16633 | { | ||
16634 | sdtr_speed = asc_dvc->sdtr_speed1; | ||
16635 | } else if (tid == 4) | ||
16636 | { | ||
16637 | sdtr_speed = asc_dvc->sdtr_speed2; | ||
16638 | } else if (tid == 8) | ||
16639 | { | ||
16640 | sdtr_speed = asc_dvc->sdtr_speed3; | ||
16641 | } else if (tid == 12) | ||
16642 | { | ||
16643 | sdtr_speed = asc_dvc->sdtr_speed4; | ||
16644 | } | ||
16645 | if (sdtr_speed & ADV_MAX_TID) | ||
16646 | { | ||
16647 | asc_dvc->sdtr_able |= (1 << tid); | ||
16648 | } | ||
16649 | sdtr_speed >>= 4; | ||
16650 | } | ||
16651 | 16335 | ||
16652 | /* | 16336 | AdvSet38C0800EEPConfig(iop_base, &eep_config); |
16653 | * Set the host maximum queuing (max. 253, min. 16) and the per device | 16337 | } |
16654 | * maximum queuing (max. 63, min. 4). | 16338 | /* |
16655 | */ | 16339 | * Set ADV_DVC_VAR and ADV_DVC_CFG variables from the |
16656 | if (eep_config.max_host_qng > ASC_DEF_MAX_HOST_QNG) | 16340 | * EEPROM configuration that was read. |
16657 | { | 16341 | * |
16658 | eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG; | 16342 | * This is the mapping of EEPROM fields to Adv Library fields. |
16659 | } else if (eep_config.max_host_qng < ASC_DEF_MIN_HOST_QNG) | 16343 | */ |
16660 | { | 16344 | asc_dvc->wdtr_able = eep_config.wdtr_able; |
16661 | /* If the value is zero, assume it is uninitialized. */ | 16345 | asc_dvc->sdtr_speed1 = eep_config.sdtr_speed1; |
16662 | if (eep_config.max_host_qng == 0) | 16346 | asc_dvc->sdtr_speed2 = eep_config.sdtr_speed2; |
16663 | { | 16347 | asc_dvc->sdtr_speed3 = eep_config.sdtr_speed3; |
16664 | eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG; | 16348 | asc_dvc->sdtr_speed4 = eep_config.sdtr_speed4; |
16665 | } else | 16349 | asc_dvc->tagqng_able = eep_config.tagqng_able; |
16666 | { | 16350 | asc_dvc->cfg->disc_enable = eep_config.disc_enable; |
16667 | eep_config.max_host_qng = ASC_DEF_MIN_HOST_QNG; | 16351 | asc_dvc->max_host_qng = eep_config.max_host_qng; |
16668 | } | 16352 | asc_dvc->max_dvc_qng = eep_config.max_dvc_qng; |
16669 | } | 16353 | asc_dvc->chip_scsi_id = (eep_config.adapter_scsi_id & ADV_MAX_TID); |
16354 | asc_dvc->start_motor = eep_config.start_motor; | ||
16355 | asc_dvc->scsi_reset_wait = eep_config.scsi_reset_delay; | ||
16356 | asc_dvc->bios_ctrl = eep_config.bios_ctrl; | ||
16357 | asc_dvc->no_scam = eep_config.scam_tolerant; | ||
16358 | asc_dvc->cfg->serial1 = eep_config.serial_number_word1; | ||
16359 | asc_dvc->cfg->serial2 = eep_config.serial_number_word2; | ||
16360 | asc_dvc->cfg->serial3 = eep_config.serial_number_word3; | ||
16361 | |||
16362 | /* | ||
16363 | * For every Target ID if any of its 'sdtr_speed[1234]' bits | ||
16364 | * are set, then set an 'sdtr_able' bit for it. | ||
16365 | */ | ||
16366 | asc_dvc->sdtr_able = 0; | ||
16367 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { | ||
16368 | if (tid == 0) { | ||
16369 | sdtr_speed = asc_dvc->sdtr_speed1; | ||
16370 | } else if (tid == 4) { | ||
16371 | sdtr_speed = asc_dvc->sdtr_speed2; | ||
16372 | } else if (tid == 8) { | ||
16373 | sdtr_speed = asc_dvc->sdtr_speed3; | ||
16374 | } else if (tid == 12) { | ||
16375 | sdtr_speed = asc_dvc->sdtr_speed4; | ||
16376 | } | ||
16377 | if (sdtr_speed & ADV_MAX_TID) { | ||
16378 | asc_dvc->sdtr_able |= (1 << tid); | ||
16379 | } | ||
16380 | sdtr_speed >>= 4; | ||
16381 | } | ||
16670 | 16382 | ||
16671 | if (eep_config.max_dvc_qng > ASC_DEF_MAX_DVC_QNG) | 16383 | /* |
16672 | { | 16384 | * Set the host maximum queuing (max. 253, min. 16) and the per device |
16673 | eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG; | 16385 | * maximum queuing (max. 63, min. 4). |
16674 | } else if (eep_config.max_dvc_qng < ASC_DEF_MIN_DVC_QNG) | 16386 | */ |
16675 | { | 16387 | if (eep_config.max_host_qng > ASC_DEF_MAX_HOST_QNG) { |
16676 | /* If the value is zero, assume it is uninitialized. */ | 16388 | eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG; |
16677 | if (eep_config.max_dvc_qng == 0) | 16389 | } else if (eep_config.max_host_qng < ASC_DEF_MIN_HOST_QNG) { |
16678 | { | 16390 | /* If the value is zero, assume it is uninitialized. */ |
16679 | eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG; | 16391 | if (eep_config.max_host_qng == 0) { |
16680 | } else | 16392 | eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG; |
16681 | { | 16393 | } else { |
16682 | eep_config.max_dvc_qng = ASC_DEF_MIN_DVC_QNG; | 16394 | eep_config.max_host_qng = ASC_DEF_MIN_HOST_QNG; |
16683 | } | 16395 | } |
16684 | } | 16396 | } |
16685 | 16397 | ||
16686 | /* | 16398 | if (eep_config.max_dvc_qng > ASC_DEF_MAX_DVC_QNG) { |
16687 | * If 'max_dvc_qng' is greater than 'max_host_qng', then | 16399 | eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG; |
16688 | * set 'max_dvc_qng' to 'max_host_qng'. | 16400 | } else if (eep_config.max_dvc_qng < ASC_DEF_MIN_DVC_QNG) { |
16689 | */ | 16401 | /* If the value is zero, assume it is uninitialized. */ |
16690 | if (eep_config.max_dvc_qng > eep_config.max_host_qng) | 16402 | if (eep_config.max_dvc_qng == 0) { |
16691 | { | 16403 | eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG; |
16692 | eep_config.max_dvc_qng = eep_config.max_host_qng; | 16404 | } else { |
16693 | } | 16405 | eep_config.max_dvc_qng = ASC_DEF_MIN_DVC_QNG; |
16406 | } | ||
16407 | } | ||
16694 | 16408 | ||
16695 | /* | 16409 | /* |
16696 | * Set ADV_DVC_VAR 'max_host_qng' and ADV_DVC_VAR 'max_dvc_qng' | 16410 | * If 'max_dvc_qng' is greater than 'max_host_qng', then |
16697 | * values based on possibly adjusted EEPROM values. | 16411 | * set 'max_dvc_qng' to 'max_host_qng'. |
16698 | */ | 16412 | */ |
16699 | asc_dvc->max_host_qng = eep_config.max_host_qng; | 16413 | if (eep_config.max_dvc_qng > eep_config.max_host_qng) { |
16700 | asc_dvc->max_dvc_qng = eep_config.max_dvc_qng; | 16414 | eep_config.max_dvc_qng = eep_config.max_host_qng; |
16415 | } | ||
16701 | 16416 | ||
16702 | /* | 16417 | /* |
16703 | * If the EEPROM 'termination' field is set to automatic (0), then set | 16418 | * Set ADV_DVC_VAR 'max_host_qng' and ADV_DVC_VAR 'max_dvc_qng' |
16704 | * the ADV_DVC_CFG 'termination' field to automatic also. | 16419 | * values based on possibly adjusted EEPROM values. |
16705 | * | 16420 | */ |
16706 | * If the termination is specified with a non-zero 'termination' | 16421 | asc_dvc->max_host_qng = eep_config.max_host_qng; |
16707 | * value check that a legal value is set and set the ADV_DVC_CFG | 16422 | asc_dvc->max_dvc_qng = eep_config.max_dvc_qng; |
16708 | * 'termination' field appropriately. | 16423 | |
16709 | */ | 16424 | /* |
16710 | if (eep_config.termination_se == 0) | 16425 | * If the EEPROM 'termination' field is set to automatic (0), then set |
16711 | { | 16426 | * the ADV_DVC_CFG 'termination' field to automatic also. |
16712 | termination = 0; /* auto termination for SE */ | 16427 | * |
16713 | } else | 16428 | * If the termination is specified with a non-zero 'termination' |
16714 | { | 16429 | * value check that a legal value is set and set the ADV_DVC_CFG |
16715 | /* Enable manual control with low off / high off. */ | 16430 | * 'termination' field appropriately. |
16716 | if (eep_config.termination_se == 1) | 16431 | */ |
16717 | { | 16432 | if (eep_config.termination_se == 0) { |
16718 | termination = 0; | 16433 | termination = 0; /* auto termination for SE */ |
16719 | 16434 | } else { | |
16720 | /* Enable manual control with low off / high on. */ | 16435 | /* Enable manual control with low off / high off. */ |
16721 | } else if (eep_config.termination_se == 2) | 16436 | if (eep_config.termination_se == 1) { |
16722 | { | 16437 | termination = 0; |
16723 | termination = TERM_SE_HI; | 16438 | |
16724 | 16439 | /* Enable manual control with low off / high on. */ | |
16725 | /* Enable manual control with low on / high on. */ | 16440 | } else if (eep_config.termination_se == 2) { |
16726 | } else if (eep_config.termination_se == 3) | 16441 | termination = TERM_SE_HI; |
16727 | { | 16442 | |
16728 | termination = TERM_SE; | 16443 | /* Enable manual control with low on / high on. */ |
16729 | } else | 16444 | } else if (eep_config.termination_se == 3) { |
16730 | { | 16445 | termination = TERM_SE; |
16731 | /* | 16446 | } else { |
16732 | * The EEPROM 'termination_se' field contains a bad value. | 16447 | /* |
16733 | * Use automatic termination instead. | 16448 | * The EEPROM 'termination_se' field contains a bad value. |
16734 | */ | 16449 | * Use automatic termination instead. |
16735 | termination = 0; | 16450 | */ |
16736 | warn_code |= ASC_WARN_EEPROM_TERMINATION; | 16451 | termination = 0; |
16737 | } | 16452 | warn_code |= ASC_WARN_EEPROM_TERMINATION; |
16738 | } | 16453 | } |
16454 | } | ||
16739 | 16455 | ||
16740 | if (eep_config.termination_lvd == 0) | 16456 | if (eep_config.termination_lvd == 0) { |
16741 | { | 16457 | asc_dvc->cfg->termination = termination; /* auto termination for LVD */ |
16742 | asc_dvc->cfg->termination = termination; /* auto termination for LVD */ | 16458 | } else { |
16743 | } else | 16459 | /* Enable manual control with low off / high off. */ |
16744 | { | 16460 | if (eep_config.termination_lvd == 1) { |
16745 | /* Enable manual control with low off / high off. */ | 16461 | asc_dvc->cfg->termination = termination; |
16746 | if (eep_config.termination_lvd == 1) | 16462 | |
16747 | { | 16463 | /* Enable manual control with low off / high on. */ |
16748 | asc_dvc->cfg->termination = termination; | 16464 | } else if (eep_config.termination_lvd == 2) { |
16749 | 16465 | asc_dvc->cfg->termination = termination | TERM_LVD_HI; | |
16750 | /* Enable manual control with low off / high on. */ | 16466 | |
16751 | } else if (eep_config.termination_lvd == 2) | 16467 | /* Enable manual control with low on / high on. */ |
16752 | { | 16468 | } else if (eep_config.termination_lvd == 3) { |
16753 | asc_dvc->cfg->termination = termination | TERM_LVD_HI; | 16469 | asc_dvc->cfg->termination = termination | TERM_LVD; |
16754 | 16470 | } else { | |
16755 | /* Enable manual control with low on / high on. */ | 16471 | /* |
16756 | } else if (eep_config.termination_lvd == 3) | 16472 | * The EEPROM 'termination_lvd' field contains a bad value. |
16757 | { | 16473 | * Use automatic termination instead. |
16758 | asc_dvc->cfg->termination = | 16474 | */ |
16759 | termination | TERM_LVD; | 16475 | asc_dvc->cfg->termination = termination; |
16760 | } else | 16476 | warn_code |= ASC_WARN_EEPROM_TERMINATION; |
16761 | { | 16477 | } |
16762 | /* | 16478 | } |
16763 | * The EEPROM 'termination_lvd' field contains a bad value. | ||
16764 | * Use automatic termination instead. | ||
16765 | */ | ||
16766 | asc_dvc->cfg->termination = termination; | ||
16767 | warn_code |= ASC_WARN_EEPROM_TERMINATION; | ||
16768 | } | ||
16769 | } | ||
16770 | 16479 | ||
16771 | return warn_code; | 16480 | return warn_code; |
16772 | } | 16481 | } |
16773 | 16482 | ||
16774 | /* | 16483 | /* |
@@ -16783,265 +16492,240 @@ AdvInitFrom38C0800EEP(ADV_DVC_VAR *asc_dvc) | |||
16783 | * | 16492 | * |
16784 | * Note: Chip is stopped on entry. | 16493 | * Note: Chip is stopped on entry. |
16785 | */ | 16494 | */ |
16786 | STATIC int __init | 16495 | static int __init AdvInitFrom38C1600EEP(ADV_DVC_VAR *asc_dvc) |
16787 | AdvInitFrom38C1600EEP(ADV_DVC_VAR *asc_dvc) | ||
16788 | { | 16496 | { |
16789 | AdvPortAddr iop_base; | 16497 | AdvPortAddr iop_base; |
16790 | ushort warn_code; | 16498 | ushort warn_code; |
16791 | ADVEEP_38C1600_CONFIG eep_config; | 16499 | ADVEEP_38C1600_CONFIG eep_config; |
16792 | int i; | 16500 | int i; |
16793 | uchar tid, termination; | 16501 | uchar tid, termination; |
16794 | ushort sdtr_speed = 0; | 16502 | ushort sdtr_speed = 0; |
16503 | |||
16504 | iop_base = asc_dvc->iop_base; | ||
16505 | |||
16506 | warn_code = 0; | ||
16507 | |||
16508 | /* | ||
16509 | * Read the board's EEPROM configuration. | ||
16510 | * | ||
16511 | * Set default values if a bad checksum is found. | ||
16512 | */ | ||
16513 | if (AdvGet38C1600EEPConfig(iop_base, &eep_config) != | ||
16514 | eep_config.check_sum) { | ||
16515 | warn_code |= ASC_WARN_EEPROM_CHKSUM; | ||
16795 | 16516 | ||
16796 | iop_base = asc_dvc->iop_base; | 16517 | /* |
16518 | * Set EEPROM default values. | ||
16519 | */ | ||
16520 | for (i = 0; i < sizeof(ADVEEP_38C1600_CONFIG); i++) { | ||
16521 | if (i == 1 | ||
16522 | && ASC_PCI_ID2FUNC(asc_dvc->cfg->pci_slot_info) != | ||
16523 | 0) { | ||
16524 | /* | ||
16525 | * Set Function 1 EEPROM Word 0 MSB | ||
16526 | * | ||
16527 | * Clear the BIOS_ENABLE (bit 14) and INTAB (bit 11) | ||
16528 | * EEPROM bits. | ||
16529 | * | ||
16530 | * Disable Bit 14 (BIOS_ENABLE) to fix SPARC Ultra 60 and | ||
16531 | * old Mac system booting problem. The Expansion ROM must | ||
16532 | * be disabled in Function 1 for these systems. | ||
16533 | * | ||
16534 | */ | ||
16535 | *((uchar *)&eep_config + i) = | ||
16536 | ((* | ||
16537 | ((uchar *)&Default_38C1600_EEPROM_Config | ||
16538 | + | ||
16539 | i)) & | ||
16540 | (~ | ||
16541 | (((ADV_EEPROM_BIOS_ENABLE | | ||
16542 | ADV_EEPROM_INTAB) >> 8) & 0xFF))); | ||
16543 | |||
16544 | /* | ||
16545 | * Set the INTAB (bit 11) if the GPIO 0 input indicates | ||
16546 | * the Function 1 interrupt line is wired to INTA. | ||
16547 | * | ||
16548 | * Set/Clear Bit 11 (INTAB) from the GPIO bit 0 input: | ||
16549 | * 1 - Function 1 interrupt line wired to INT A. | ||
16550 | * 0 - Function 1 interrupt line wired to INT B. | ||
16551 | * | ||
16552 | * Note: Adapter boards always have Function 0 wired to INTA. | ||
16553 | * Put all 5 GPIO bits in input mode and then read | ||
16554 | * their input values. | ||
16555 | */ | ||
16556 | AdvWriteByteRegister(iop_base, IOPB_GPIO_CNTL, | ||
16557 | 0); | ||
16558 | if (AdvReadByteRegister | ||
16559 | (iop_base, IOPB_GPIO_DATA) & 0x01) { | ||
16560 | /* Function 1 interrupt wired to INTA; Set EEPROM bit. */ | ||
16561 | *((uchar *)&eep_config + i) |= | ||
16562 | ((ADV_EEPROM_INTAB >> 8) & 0xFF); | ||
16563 | } | ||
16564 | } else { | ||
16565 | *((uchar *)&eep_config + i) = | ||
16566 | *((uchar *)&Default_38C1600_EEPROM_Config | ||
16567 | + i); | ||
16568 | } | ||
16569 | } | ||
16797 | 16570 | ||
16798 | warn_code = 0; | 16571 | /* |
16572 | * Assume the 6 byte board serial number that was read | ||
16573 | * from EEPROM is correct even if the EEPROM checksum | ||
16574 | * failed. | ||
16575 | */ | ||
16576 | eep_config.serial_number_word3 = | ||
16577 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1); | ||
16799 | 16578 | ||
16800 | /* | 16579 | eep_config.serial_number_word2 = |
16801 | * Read the board's EEPROM configuration. | 16580 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 2); |
16802 | * | ||
16803 | * Set default values if a bad checksum is found. | ||
16804 | */ | ||
16805 | if (AdvGet38C1600EEPConfig(iop_base, &eep_config) != eep_config.check_sum) | ||
16806 | { | ||
16807 | warn_code |= ASC_WARN_EEPROM_CHKSUM; | ||
16808 | |||
16809 | /* | ||
16810 | * Set EEPROM default values. | ||
16811 | */ | ||
16812 | for (i = 0; i < sizeof(ADVEEP_38C1600_CONFIG); i++) | ||
16813 | { | ||
16814 | if (i == 1 && ASC_PCI_ID2FUNC(asc_dvc->cfg->pci_slot_info) != 0) | ||
16815 | { | ||
16816 | /* | ||
16817 | * Set Function 1 EEPROM Word 0 MSB | ||
16818 | * | ||
16819 | * Clear the BIOS_ENABLE (bit 14) and INTAB (bit 11) | ||
16820 | * EEPROM bits. | ||
16821 | * | ||
16822 | * Disable Bit 14 (BIOS_ENABLE) to fix SPARC Ultra 60 and | ||
16823 | * old Mac system booting problem. The Expansion ROM must | ||
16824 | * be disabled in Function 1 for these systems. | ||
16825 | * | ||
16826 | */ | ||
16827 | *((uchar *) &eep_config + i) = | ||
16828 | ((*((uchar *) &Default_38C1600_EEPROM_Config + i)) & | ||
16829 | (~(((ADV_EEPROM_BIOS_ENABLE | ADV_EEPROM_INTAB) >> 8) & | ||
16830 | 0xFF))); | ||
16831 | |||
16832 | /* | ||
16833 | * Set the INTAB (bit 11) if the GPIO 0 input indicates | ||
16834 | * the Function 1 interrupt line is wired to INTA. | ||
16835 | * | ||
16836 | * Set/Clear Bit 11 (INTAB) from the GPIO bit 0 input: | ||
16837 | * 1 - Function 1 interrupt line wired to INT A. | ||
16838 | * 0 - Function 1 interrupt line wired to INT B. | ||
16839 | * | ||
16840 | * Note: Adapter boards always have Function 0 wired to INTA. | ||
16841 | * Put all 5 GPIO bits in input mode and then read | ||
16842 | * their input values. | ||
16843 | */ | ||
16844 | AdvWriteByteRegister(iop_base, IOPB_GPIO_CNTL, 0); | ||
16845 | if (AdvReadByteRegister(iop_base, IOPB_GPIO_DATA) & 0x01) | ||
16846 | { | ||
16847 | /* Function 1 interrupt wired to INTA; Set EEPROM bit. */ | ||
16848 | *((uchar *) &eep_config + i) |= | ||
16849 | ((ADV_EEPROM_INTAB >> 8) & 0xFF); | ||
16850 | } | ||
16851 | } | ||
16852 | else | ||
16853 | { | ||
16854 | *((uchar *) &eep_config + i) = | ||
16855 | *((uchar *) &Default_38C1600_EEPROM_Config + i); | ||
16856 | } | ||
16857 | } | ||
16858 | |||
16859 | /* | ||
16860 | * Assume the 6 byte board serial number that was read | ||
16861 | * from EEPROM is correct even if the EEPROM checksum | ||
16862 | * failed. | ||
16863 | */ | ||
16864 | eep_config.serial_number_word3 = | ||
16865 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 1); | ||
16866 | |||
16867 | eep_config.serial_number_word2 = | ||
16868 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 2); | ||
16869 | |||
16870 | eep_config.serial_number_word1 = | ||
16871 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 3); | ||
16872 | |||
16873 | AdvSet38C1600EEPConfig(iop_base, &eep_config); | ||
16874 | } | ||
16875 | 16581 | ||
16876 | /* | 16582 | eep_config.serial_number_word1 = |
16877 | * Set ASC_DVC_VAR and ASC_DVC_CFG variables from the | 16583 | AdvReadEEPWord(iop_base, ADV_EEP_DVC_CFG_END - 3); |
16878 | * EEPROM configuration that was read. | ||
16879 | * | ||
16880 | * This is the mapping of EEPROM fields to Adv Library fields. | ||
16881 | */ | ||
16882 | asc_dvc->wdtr_able = eep_config.wdtr_able; | ||
16883 | asc_dvc->sdtr_speed1 = eep_config.sdtr_speed1; | ||
16884 | asc_dvc->sdtr_speed2 = eep_config.sdtr_speed2; | ||
16885 | asc_dvc->sdtr_speed3 = eep_config.sdtr_speed3; | ||
16886 | asc_dvc->sdtr_speed4 = eep_config.sdtr_speed4; | ||
16887 | asc_dvc->ppr_able = 0; | ||
16888 | asc_dvc->tagqng_able = eep_config.tagqng_able; | ||
16889 | asc_dvc->cfg->disc_enable = eep_config.disc_enable; | ||
16890 | asc_dvc->max_host_qng = eep_config.max_host_qng; | ||
16891 | asc_dvc->max_dvc_qng = eep_config.max_dvc_qng; | ||
16892 | asc_dvc->chip_scsi_id = (eep_config.adapter_scsi_id & ASC_MAX_TID); | ||
16893 | asc_dvc->start_motor = eep_config.start_motor; | ||
16894 | asc_dvc->scsi_reset_wait = eep_config.scsi_reset_delay; | ||
16895 | asc_dvc->bios_ctrl = eep_config.bios_ctrl; | ||
16896 | asc_dvc->no_scam = eep_config.scam_tolerant; | ||
16897 | 16584 | ||
16898 | /* | 16585 | AdvSet38C1600EEPConfig(iop_base, &eep_config); |
16899 | * For every Target ID if any of its 'sdtr_speed[1234]' bits | 16586 | } |
16900 | * are set, then set an 'sdtr_able' bit for it. | ||
16901 | */ | ||
16902 | asc_dvc->sdtr_able = 0; | ||
16903 | for (tid = 0; tid <= ASC_MAX_TID; tid++) | ||
16904 | { | ||
16905 | if (tid == 0) | ||
16906 | { | ||
16907 | sdtr_speed = asc_dvc->sdtr_speed1; | ||
16908 | } else if (tid == 4) | ||
16909 | { | ||
16910 | sdtr_speed = asc_dvc->sdtr_speed2; | ||
16911 | } else if (tid == 8) | ||
16912 | { | ||
16913 | sdtr_speed = asc_dvc->sdtr_speed3; | ||
16914 | } else if (tid == 12) | ||
16915 | { | ||
16916 | sdtr_speed = asc_dvc->sdtr_speed4; | ||
16917 | } | ||
16918 | if (sdtr_speed & ASC_MAX_TID) | ||
16919 | { | ||
16920 | asc_dvc->sdtr_able |= (1 << tid); | ||
16921 | } | ||
16922 | sdtr_speed >>= 4; | ||
16923 | } | ||
16924 | 16587 | ||
16925 | /* | 16588 | /* |
16926 | * Set the host maximum queuing (max. 253, min. 16) and the per device | 16589 | * Set ASC_DVC_VAR and ASC_DVC_CFG variables from the |
16927 | * maximum queuing (max. 63, min. 4). | 16590 | * EEPROM configuration that was read. |
16928 | */ | 16591 | * |
16929 | if (eep_config.max_host_qng > ASC_DEF_MAX_HOST_QNG) | 16592 | * This is the mapping of EEPROM fields to Adv Library fields. |
16930 | { | 16593 | */ |
16931 | eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG; | 16594 | asc_dvc->wdtr_able = eep_config.wdtr_able; |
16932 | } else if (eep_config.max_host_qng < ASC_DEF_MIN_HOST_QNG) | 16595 | asc_dvc->sdtr_speed1 = eep_config.sdtr_speed1; |
16933 | { | 16596 | asc_dvc->sdtr_speed2 = eep_config.sdtr_speed2; |
16934 | /* If the value is zero, assume it is uninitialized. */ | 16597 | asc_dvc->sdtr_speed3 = eep_config.sdtr_speed3; |
16935 | if (eep_config.max_host_qng == 0) | 16598 | asc_dvc->sdtr_speed4 = eep_config.sdtr_speed4; |
16936 | { | 16599 | asc_dvc->ppr_able = 0; |
16937 | eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG; | 16600 | asc_dvc->tagqng_able = eep_config.tagqng_able; |
16938 | } else | 16601 | asc_dvc->cfg->disc_enable = eep_config.disc_enable; |
16939 | { | 16602 | asc_dvc->max_host_qng = eep_config.max_host_qng; |
16940 | eep_config.max_host_qng = ASC_DEF_MIN_HOST_QNG; | 16603 | asc_dvc->max_dvc_qng = eep_config.max_dvc_qng; |
16941 | } | 16604 | asc_dvc->chip_scsi_id = (eep_config.adapter_scsi_id & ASC_MAX_TID); |
16942 | } | 16605 | asc_dvc->start_motor = eep_config.start_motor; |
16606 | asc_dvc->scsi_reset_wait = eep_config.scsi_reset_delay; | ||
16607 | asc_dvc->bios_ctrl = eep_config.bios_ctrl; | ||
16608 | asc_dvc->no_scam = eep_config.scam_tolerant; | ||
16609 | |||
16610 | /* | ||
16611 | * For every Target ID if any of its 'sdtr_speed[1234]' bits | ||
16612 | * are set, then set an 'sdtr_able' bit for it. | ||
16613 | */ | ||
16614 | asc_dvc->sdtr_able = 0; | ||
16615 | for (tid = 0; tid <= ASC_MAX_TID; tid++) { | ||
16616 | if (tid == 0) { | ||
16617 | sdtr_speed = asc_dvc->sdtr_speed1; | ||
16618 | } else if (tid == 4) { | ||
16619 | sdtr_speed = asc_dvc->sdtr_speed2; | ||
16620 | } else if (tid == 8) { | ||
16621 | sdtr_speed = asc_dvc->sdtr_speed3; | ||
16622 | } else if (tid == 12) { | ||
16623 | sdtr_speed = asc_dvc->sdtr_speed4; | ||
16624 | } | ||
16625 | if (sdtr_speed & ASC_MAX_TID) { | ||
16626 | asc_dvc->sdtr_able |= (1 << tid); | ||
16627 | } | ||
16628 | sdtr_speed >>= 4; | ||
16629 | } | ||
16943 | 16630 | ||
16944 | if (eep_config.max_dvc_qng > ASC_DEF_MAX_DVC_QNG) | 16631 | /* |
16945 | { | 16632 | * Set the host maximum queuing (max. 253, min. 16) and the per device |
16946 | eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG; | 16633 | * maximum queuing (max. 63, min. 4). |
16947 | } else if (eep_config.max_dvc_qng < ASC_DEF_MIN_DVC_QNG) | 16634 | */ |
16948 | { | 16635 | if (eep_config.max_host_qng > ASC_DEF_MAX_HOST_QNG) { |
16949 | /* If the value is zero, assume it is uninitialized. */ | 16636 | eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG; |
16950 | if (eep_config.max_dvc_qng == 0) | 16637 | } else if (eep_config.max_host_qng < ASC_DEF_MIN_HOST_QNG) { |
16951 | { | 16638 | /* If the value is zero, assume it is uninitialized. */ |
16952 | eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG; | 16639 | if (eep_config.max_host_qng == 0) { |
16953 | } else | 16640 | eep_config.max_host_qng = ASC_DEF_MAX_HOST_QNG; |
16954 | { | 16641 | } else { |
16955 | eep_config.max_dvc_qng = ASC_DEF_MIN_DVC_QNG; | 16642 | eep_config.max_host_qng = ASC_DEF_MIN_HOST_QNG; |
16956 | } | 16643 | } |
16957 | } | 16644 | } |
16958 | 16645 | ||
16959 | /* | 16646 | if (eep_config.max_dvc_qng > ASC_DEF_MAX_DVC_QNG) { |
16960 | * If 'max_dvc_qng' is greater than 'max_host_qng', then | 16647 | eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG; |
16961 | * set 'max_dvc_qng' to 'max_host_qng'. | 16648 | } else if (eep_config.max_dvc_qng < ASC_DEF_MIN_DVC_QNG) { |
16962 | */ | 16649 | /* If the value is zero, assume it is uninitialized. */ |
16963 | if (eep_config.max_dvc_qng > eep_config.max_host_qng) | 16650 | if (eep_config.max_dvc_qng == 0) { |
16964 | { | 16651 | eep_config.max_dvc_qng = ASC_DEF_MAX_DVC_QNG; |
16965 | eep_config.max_dvc_qng = eep_config.max_host_qng; | 16652 | } else { |
16966 | } | 16653 | eep_config.max_dvc_qng = ASC_DEF_MIN_DVC_QNG; |
16654 | } | ||
16655 | } | ||
16967 | 16656 | ||
16968 | /* | 16657 | /* |
16969 | * Set ASC_DVC_VAR 'max_host_qng' and ASC_DVC_VAR 'max_dvc_qng' | 16658 | * If 'max_dvc_qng' is greater than 'max_host_qng', then |
16970 | * values based on possibly adjusted EEPROM values. | 16659 | * set 'max_dvc_qng' to 'max_host_qng'. |
16971 | */ | 16660 | */ |
16972 | asc_dvc->max_host_qng = eep_config.max_host_qng; | 16661 | if (eep_config.max_dvc_qng > eep_config.max_host_qng) { |
16973 | asc_dvc->max_dvc_qng = eep_config.max_dvc_qng; | 16662 | eep_config.max_dvc_qng = eep_config.max_host_qng; |
16663 | } | ||
16974 | 16664 | ||
16975 | /* | 16665 | /* |
16976 | * If the EEPROM 'termination' field is set to automatic (0), then set | 16666 | * Set ASC_DVC_VAR 'max_host_qng' and ASC_DVC_VAR 'max_dvc_qng' |
16977 | * the ASC_DVC_CFG 'termination' field to automatic also. | 16667 | * values based on possibly adjusted EEPROM values. |
16978 | * | 16668 | */ |
16979 | * If the termination is specified with a non-zero 'termination' | 16669 | asc_dvc->max_host_qng = eep_config.max_host_qng; |
16980 | * value check that a legal value is set and set the ASC_DVC_CFG | 16670 | asc_dvc->max_dvc_qng = eep_config.max_dvc_qng; |
16981 | * 'termination' field appropriately. | 16671 | |
16982 | */ | 16672 | /* |
16983 | if (eep_config.termination_se == 0) | 16673 | * If the EEPROM 'termination' field is set to automatic (0), then set |
16984 | { | 16674 | * the ASC_DVC_CFG 'termination' field to automatic also. |
16985 | termination = 0; /* auto termination for SE */ | 16675 | * |
16986 | } else | 16676 | * If the termination is specified with a non-zero 'termination' |
16987 | { | 16677 | * value check that a legal value is set and set the ASC_DVC_CFG |
16988 | /* Enable manual control with low off / high off. */ | 16678 | * 'termination' field appropriately. |
16989 | if (eep_config.termination_se == 1) | 16679 | */ |
16990 | { | 16680 | if (eep_config.termination_se == 0) { |
16991 | termination = 0; | 16681 | termination = 0; /* auto termination for SE */ |
16992 | 16682 | } else { | |
16993 | /* Enable manual control with low off / high on. */ | 16683 | /* Enable manual control with low off / high off. */ |
16994 | } else if (eep_config.termination_se == 2) | 16684 | if (eep_config.termination_se == 1) { |
16995 | { | 16685 | termination = 0; |
16996 | termination = TERM_SE_HI; | 16686 | |
16997 | 16687 | /* Enable manual control with low off / high on. */ | |
16998 | /* Enable manual control with low on / high on. */ | 16688 | } else if (eep_config.termination_se == 2) { |
16999 | } else if (eep_config.termination_se == 3) | 16689 | termination = TERM_SE_HI; |
17000 | { | 16690 | |
17001 | termination = TERM_SE; | 16691 | /* Enable manual control with low on / high on. */ |
17002 | } else | 16692 | } else if (eep_config.termination_se == 3) { |
17003 | { | 16693 | termination = TERM_SE; |
17004 | /* | 16694 | } else { |
17005 | * The EEPROM 'termination_se' field contains a bad value. | 16695 | /* |
17006 | * Use automatic termination instead. | 16696 | * The EEPROM 'termination_se' field contains a bad value. |
17007 | */ | 16697 | * Use automatic termination instead. |
17008 | termination = 0; | 16698 | */ |
17009 | warn_code |= ASC_WARN_EEPROM_TERMINATION; | 16699 | termination = 0; |
17010 | } | 16700 | warn_code |= ASC_WARN_EEPROM_TERMINATION; |
17011 | } | 16701 | } |
16702 | } | ||
17012 | 16703 | ||
17013 | if (eep_config.termination_lvd == 0) | 16704 | if (eep_config.termination_lvd == 0) { |
17014 | { | 16705 | asc_dvc->cfg->termination = termination; /* auto termination for LVD */ |
17015 | asc_dvc->cfg->termination = termination; /* auto termination for LVD */ | 16706 | } else { |
17016 | } else | 16707 | /* Enable manual control with low off / high off. */ |
17017 | { | 16708 | if (eep_config.termination_lvd == 1) { |
17018 | /* Enable manual control with low off / high off. */ | 16709 | asc_dvc->cfg->termination = termination; |
17019 | if (eep_config.termination_lvd == 1) | 16710 | |
17020 | { | 16711 | /* Enable manual control with low off / high on. */ |
17021 | asc_dvc->cfg->termination = termination; | 16712 | } else if (eep_config.termination_lvd == 2) { |
17022 | 16713 | asc_dvc->cfg->termination = termination | TERM_LVD_HI; | |
17023 | /* Enable manual control with low off / high on. */ | 16714 | |
17024 | } else if (eep_config.termination_lvd == 2) | 16715 | /* Enable manual control with low on / high on. */ |
17025 | { | 16716 | } else if (eep_config.termination_lvd == 3) { |
17026 | asc_dvc->cfg->termination = termination | TERM_LVD_HI; | 16717 | asc_dvc->cfg->termination = termination | TERM_LVD; |
17027 | 16718 | } else { | |
17028 | /* Enable manual control with low on / high on. */ | 16719 | /* |
17029 | } else if (eep_config.termination_lvd == 3) | 16720 | * The EEPROM 'termination_lvd' field contains a bad value. |
17030 | { | 16721 | * Use automatic termination instead. |
17031 | asc_dvc->cfg->termination = | 16722 | */ |
17032 | termination | TERM_LVD; | 16723 | asc_dvc->cfg->termination = termination; |
17033 | } else | 16724 | warn_code |= ASC_WARN_EEPROM_TERMINATION; |
17034 | { | 16725 | } |
17035 | /* | 16726 | } |
17036 | * The EEPROM 'termination_lvd' field contains a bad value. | ||
17037 | * Use automatic termination instead. | ||
17038 | */ | ||
17039 | asc_dvc->cfg->termination = termination; | ||
17040 | warn_code |= ASC_WARN_EEPROM_TERMINATION; | ||
17041 | } | ||
17042 | } | ||
17043 | 16727 | ||
17044 | return warn_code; | 16728 | return warn_code; |
17045 | } | 16729 | } |
17046 | 16730 | ||
17047 | /* | 16731 | /* |
@@ -17049,45 +16733,42 @@ AdvInitFrom38C1600EEP(ADV_DVC_VAR *asc_dvc) | |||
17049 | * | 16733 | * |
17050 | * Return a checksum based on the EEPROM configuration read. | 16734 | * Return a checksum based on the EEPROM configuration read. |
17051 | */ | 16735 | */ |
17052 | STATIC ushort __init | 16736 | static ushort __init |
17053 | AdvGet3550EEPConfig(AdvPortAddr iop_base, ADVEEP_3550_CONFIG *cfg_buf) | 16737 | AdvGet3550EEPConfig(AdvPortAddr iop_base, ADVEEP_3550_CONFIG *cfg_buf) |
17054 | { | 16738 | { |
17055 | ushort wval, chksum; | 16739 | ushort wval, chksum; |
17056 | ushort *wbuf; | 16740 | ushort *wbuf; |
17057 | int eep_addr; | 16741 | int eep_addr; |
17058 | ushort *charfields; | 16742 | ushort *charfields; |
17059 | 16743 | ||
17060 | charfields = (ushort *) &ADVEEP_3550_Config_Field_IsChar; | 16744 | charfields = (ushort *)&ADVEEP_3550_Config_Field_IsChar; |
17061 | wbuf = (ushort *) cfg_buf; | 16745 | wbuf = (ushort *)cfg_buf; |
17062 | chksum = 0; | 16746 | chksum = 0; |
17063 | 16747 | ||
17064 | for (eep_addr = ADV_EEP_DVC_CFG_BEGIN; | 16748 | for (eep_addr = ADV_EEP_DVC_CFG_BEGIN; |
17065 | eep_addr < ADV_EEP_DVC_CFG_END; | 16749 | eep_addr < ADV_EEP_DVC_CFG_END; eep_addr++, wbuf++) { |
17066 | eep_addr++, wbuf++) | 16750 | wval = AdvReadEEPWord(iop_base, eep_addr); |
17067 | { | 16751 | chksum += wval; /* Checksum is calculated from word values. */ |
17068 | wval = AdvReadEEPWord(iop_base, eep_addr); | 16752 | if (*charfields++) { |
17069 | chksum += wval; /* Checksum is calculated from word values. */ | 16753 | *wbuf = le16_to_cpu(wval); |
17070 | if (*charfields++) { | 16754 | } else { |
17071 | *wbuf = le16_to_cpu(wval); | 16755 | *wbuf = wval; |
17072 | } else { | 16756 | } |
17073 | *wbuf = wval; | 16757 | } |
17074 | } | 16758 | /* Read checksum word. */ |
17075 | } | 16759 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); |
17076 | /* Read checksum word. */ | 16760 | wbuf++; |
17077 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); | 16761 | charfields++; |
17078 | wbuf++; charfields++; | 16762 | |
17079 | 16763 | /* Read rest of EEPROM not covered by the checksum. */ | |
17080 | /* Read rest of EEPROM not covered by the checksum. */ | 16764 | for (eep_addr = ADV_EEP_DVC_CTL_BEGIN; |
17081 | for (eep_addr = ADV_EEP_DVC_CTL_BEGIN; | 16765 | eep_addr < ADV_EEP_MAX_WORD_ADDR; eep_addr++, wbuf++) { |
17082 | eep_addr < ADV_EEP_MAX_WORD_ADDR; | 16766 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); |
17083 | eep_addr++, wbuf++) | 16767 | if (*charfields++) { |
17084 | { | 16768 | *wbuf = le16_to_cpu(*wbuf); |
17085 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); | 16769 | } |
17086 | if (*charfields++) { | 16770 | } |
17087 | *wbuf = le16_to_cpu(*wbuf); | 16771 | return chksum; |
17088 | } | ||
17089 | } | ||
17090 | return chksum; | ||
17091 | } | 16772 | } |
17092 | 16773 | ||
17093 | /* | 16774 | /* |
@@ -17095,46 +16776,42 @@ AdvGet3550EEPConfig(AdvPortAddr iop_base, ADVEEP_3550_CONFIG *cfg_buf) | |||
17095 | * | 16776 | * |
17096 | * Return a checksum based on the EEPROM configuration read. | 16777 | * Return a checksum based on the EEPROM configuration read. |
17097 | */ | 16778 | */ |
17098 | STATIC ushort __init | 16779 | static ushort __init |
17099 | AdvGet38C0800EEPConfig(AdvPortAddr iop_base, | 16780 | AdvGet38C0800EEPConfig(AdvPortAddr iop_base, ADVEEP_38C0800_CONFIG *cfg_buf) |
17100 | ADVEEP_38C0800_CONFIG *cfg_buf) | ||
17101 | { | 16781 | { |
17102 | ushort wval, chksum; | 16782 | ushort wval, chksum; |
17103 | ushort *wbuf; | 16783 | ushort *wbuf; |
17104 | int eep_addr; | 16784 | int eep_addr; |
17105 | ushort *charfields; | 16785 | ushort *charfields; |
17106 | 16786 | ||
17107 | charfields = (ushort *) &ADVEEP_38C0800_Config_Field_IsChar; | 16787 | charfields = (ushort *)&ADVEEP_38C0800_Config_Field_IsChar; |
17108 | wbuf = (ushort *) cfg_buf; | 16788 | wbuf = (ushort *)cfg_buf; |
17109 | chksum = 0; | 16789 | chksum = 0; |
17110 | 16790 | ||
17111 | for (eep_addr = ADV_EEP_DVC_CFG_BEGIN; | 16791 | for (eep_addr = ADV_EEP_DVC_CFG_BEGIN; |
17112 | eep_addr < ADV_EEP_DVC_CFG_END; | 16792 | eep_addr < ADV_EEP_DVC_CFG_END; eep_addr++, wbuf++) { |
17113 | eep_addr++, wbuf++) | 16793 | wval = AdvReadEEPWord(iop_base, eep_addr); |
17114 | { | 16794 | chksum += wval; /* Checksum is calculated from word values. */ |
17115 | wval = AdvReadEEPWord(iop_base, eep_addr); | 16795 | if (*charfields++) { |
17116 | chksum += wval; /* Checksum is calculated from word values. */ | 16796 | *wbuf = le16_to_cpu(wval); |
17117 | if (*charfields++) { | 16797 | } else { |
17118 | *wbuf = le16_to_cpu(wval); | 16798 | *wbuf = wval; |
17119 | } else { | 16799 | } |
17120 | *wbuf = wval; | 16800 | } |
17121 | } | 16801 | /* Read checksum word. */ |
17122 | } | 16802 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); |
17123 | /* Read checksum word. */ | 16803 | wbuf++; |
17124 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); | 16804 | charfields++; |
17125 | wbuf++; charfields++; | 16805 | |
17126 | 16806 | /* Read rest of EEPROM not covered by the checksum. */ | |
17127 | /* Read rest of EEPROM not covered by the checksum. */ | 16807 | for (eep_addr = ADV_EEP_DVC_CTL_BEGIN; |
17128 | for (eep_addr = ADV_EEP_DVC_CTL_BEGIN; | 16808 | eep_addr < ADV_EEP_MAX_WORD_ADDR; eep_addr++, wbuf++) { |
17129 | eep_addr < ADV_EEP_MAX_WORD_ADDR; | 16809 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); |
17130 | eep_addr++, wbuf++) | 16810 | if (*charfields++) { |
17131 | { | 16811 | *wbuf = le16_to_cpu(*wbuf); |
17132 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); | 16812 | } |
17133 | if (*charfields++) { | 16813 | } |
17134 | *wbuf = le16_to_cpu(*wbuf); | 16814 | return chksum; |
17135 | } | ||
17136 | } | ||
17137 | return chksum; | ||
17138 | } | 16815 | } |
17139 | 16816 | ||
17140 | /* | 16817 | /* |
@@ -17142,81 +16819,74 @@ AdvGet38C0800EEPConfig(AdvPortAddr iop_base, | |||
17142 | * | 16819 | * |
17143 | * Return a checksum based on the EEPROM configuration read. | 16820 | * Return a checksum based on the EEPROM configuration read. |
17144 | */ | 16821 | */ |
17145 | STATIC ushort __init | 16822 | static ushort __init |
17146 | AdvGet38C1600EEPConfig(AdvPortAddr iop_base, | 16823 | AdvGet38C1600EEPConfig(AdvPortAddr iop_base, ADVEEP_38C1600_CONFIG *cfg_buf) |
17147 | ADVEEP_38C1600_CONFIG *cfg_buf) | ||
17148 | { | 16824 | { |
17149 | ushort wval, chksum; | 16825 | ushort wval, chksum; |
17150 | ushort *wbuf; | 16826 | ushort *wbuf; |
17151 | int eep_addr; | 16827 | int eep_addr; |
17152 | ushort *charfields; | 16828 | ushort *charfields; |
17153 | 16829 | ||
17154 | charfields = (ushort*) &ADVEEP_38C1600_Config_Field_IsChar; | 16830 | charfields = (ushort *)&ADVEEP_38C1600_Config_Field_IsChar; |
17155 | wbuf = (ushort *) cfg_buf; | 16831 | wbuf = (ushort *)cfg_buf; |
17156 | chksum = 0; | 16832 | chksum = 0; |
17157 | 16833 | ||
17158 | for (eep_addr = ADV_EEP_DVC_CFG_BEGIN; | 16834 | for (eep_addr = ADV_EEP_DVC_CFG_BEGIN; |
17159 | eep_addr < ADV_EEP_DVC_CFG_END; | 16835 | eep_addr < ADV_EEP_DVC_CFG_END; eep_addr++, wbuf++) { |
17160 | eep_addr++, wbuf++) | 16836 | wval = AdvReadEEPWord(iop_base, eep_addr); |
17161 | { | 16837 | chksum += wval; /* Checksum is calculated from word values. */ |
17162 | wval = AdvReadEEPWord(iop_base, eep_addr); | 16838 | if (*charfields++) { |
17163 | chksum += wval; /* Checksum is calculated from word values. */ | 16839 | *wbuf = le16_to_cpu(wval); |
17164 | if (*charfields++) { | 16840 | } else { |
17165 | *wbuf = le16_to_cpu(wval); | 16841 | *wbuf = wval; |
17166 | } else { | 16842 | } |
17167 | *wbuf = wval; | 16843 | } |
17168 | } | 16844 | /* Read checksum word. */ |
17169 | } | 16845 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); |
17170 | /* Read checksum word. */ | 16846 | wbuf++; |
17171 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); | 16847 | charfields++; |
17172 | wbuf++; charfields++; | 16848 | |
17173 | 16849 | /* Read rest of EEPROM not covered by the checksum. */ | |
17174 | /* Read rest of EEPROM not covered by the checksum. */ | 16850 | for (eep_addr = ADV_EEP_DVC_CTL_BEGIN; |
17175 | for (eep_addr = ADV_EEP_DVC_CTL_BEGIN; | 16851 | eep_addr < ADV_EEP_MAX_WORD_ADDR; eep_addr++, wbuf++) { |
17176 | eep_addr < ADV_EEP_MAX_WORD_ADDR; | 16852 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); |
17177 | eep_addr++, wbuf++) | 16853 | if (*charfields++) { |
17178 | { | 16854 | *wbuf = le16_to_cpu(*wbuf); |
17179 | *wbuf = AdvReadEEPWord(iop_base, eep_addr); | 16855 | } |
17180 | if (*charfields++) { | 16856 | } |
17181 | *wbuf = le16_to_cpu(*wbuf); | 16857 | return chksum; |
17182 | } | ||
17183 | } | ||
17184 | return chksum; | ||
17185 | } | 16858 | } |
17186 | 16859 | ||
17187 | /* | 16860 | /* |
17188 | * Read the EEPROM from specified location | 16861 | * Read the EEPROM from specified location |
17189 | */ | 16862 | */ |
17190 | STATIC ushort __init | 16863 | static ushort __init AdvReadEEPWord(AdvPortAddr iop_base, int eep_word_addr) |
17191 | AdvReadEEPWord(AdvPortAddr iop_base, int eep_word_addr) | ||
17192 | { | 16864 | { |
17193 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, | 16865 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, |
17194 | ASC_EEP_CMD_READ | eep_word_addr); | 16866 | ASC_EEP_CMD_READ | eep_word_addr); |
17195 | AdvWaitEEPCmd(iop_base); | 16867 | AdvWaitEEPCmd(iop_base); |
17196 | return AdvReadWordRegister(iop_base, IOPW_EE_DATA); | 16868 | return AdvReadWordRegister(iop_base, IOPW_EE_DATA); |
17197 | } | 16869 | } |
17198 | 16870 | ||
17199 | /* | 16871 | /* |
17200 | * Wait for EEPROM command to complete | 16872 | * Wait for EEPROM command to complete |
17201 | */ | 16873 | */ |
17202 | STATIC void __init | 16874 | static void __init AdvWaitEEPCmd(AdvPortAddr iop_base) |
17203 | AdvWaitEEPCmd(AdvPortAddr iop_base) | ||
17204 | { | 16875 | { |
17205 | int eep_delay_ms; | 16876 | int eep_delay_ms; |
17206 | 16877 | ||
17207 | for (eep_delay_ms = 0; eep_delay_ms < ADV_EEP_DELAY_MS; eep_delay_ms++) | 16878 | for (eep_delay_ms = 0; eep_delay_ms < ADV_EEP_DELAY_MS; eep_delay_ms++) { |
17208 | { | 16879 | if (AdvReadWordRegister(iop_base, IOPW_EE_CMD) & |
17209 | if (AdvReadWordRegister(iop_base, IOPW_EE_CMD) & ASC_EEP_CMD_DONE) | 16880 | ASC_EEP_CMD_DONE) { |
17210 | { | 16881 | break; |
17211 | break; | 16882 | } |
17212 | } | 16883 | DvcSleepMilliSecond(1); |
17213 | DvcSleepMilliSecond(1); | 16884 | } |
17214 | } | 16885 | if ((AdvReadWordRegister(iop_base, IOPW_EE_CMD) & ASC_EEP_CMD_DONE) == |
17215 | if ((AdvReadWordRegister(iop_base, IOPW_EE_CMD) & ASC_EEP_CMD_DONE) == 0) | 16886 | 0) { |
17216 | { | 16887 | ASC_ASSERT(0); |
17217 | ASC_ASSERT(0); | 16888 | } |
17218 | } | 16889 | return; |
17219 | return; | ||
17220 | } | 16890 | } |
17221 | 16891 | ||
17222 | /* | 16892 | /* |
@@ -17225,201 +16895,202 @@ AdvWaitEEPCmd(AdvPortAddr iop_base) | |||
17225 | void __init | 16895 | void __init |
17226 | AdvSet3550EEPConfig(AdvPortAddr iop_base, ADVEEP_3550_CONFIG *cfg_buf) | 16896 | AdvSet3550EEPConfig(AdvPortAddr iop_base, ADVEEP_3550_CONFIG *cfg_buf) |
17227 | { | 16897 | { |
17228 | ushort *wbuf; | 16898 | ushort *wbuf; |
17229 | ushort addr, chksum; | 16899 | ushort addr, chksum; |
17230 | ushort *charfields; | 16900 | ushort *charfields; |
17231 | 16901 | ||
17232 | wbuf = (ushort *) cfg_buf; | 16902 | wbuf = (ushort *)cfg_buf; |
17233 | charfields = (ushort *) &ADVEEP_3550_Config_Field_IsChar; | 16903 | charfields = (ushort *)&ADVEEP_3550_Config_Field_IsChar; |
17234 | chksum = 0; | 16904 | chksum = 0; |
17235 | 16905 | ||
17236 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE); | 16906 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE); |
17237 | AdvWaitEEPCmd(iop_base); | 16907 | AdvWaitEEPCmd(iop_base); |
17238 | 16908 | ||
17239 | /* | 16909 | /* |
17240 | * Write EEPROM from word 0 to word 20. | 16910 | * Write EEPROM from word 0 to word 20. |
17241 | */ | 16911 | */ |
17242 | for (addr = ADV_EEP_DVC_CFG_BEGIN; | 16912 | for (addr = ADV_EEP_DVC_CFG_BEGIN; |
17243 | addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) | 16913 | addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) { |
17244 | { | 16914 | ushort word; |
17245 | ushort word; | 16915 | |
17246 | 16916 | if (*charfields++) { | |
17247 | if (*charfields++) { | 16917 | word = cpu_to_le16(*wbuf); |
17248 | word = cpu_to_le16(*wbuf); | 16918 | } else { |
17249 | } else { | 16919 | word = *wbuf; |
17250 | word = *wbuf; | 16920 | } |
17251 | } | 16921 | chksum += *wbuf; /* Checksum is calculated from word values. */ |
17252 | chksum += *wbuf; /* Checksum is calculated from word values. */ | 16922 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); |
17253 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | 16923 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, |
17254 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); | 16924 | ASC_EEP_CMD_WRITE | addr); |
17255 | AdvWaitEEPCmd(iop_base); | 16925 | AdvWaitEEPCmd(iop_base); |
17256 | DvcSleepMilliSecond(ADV_EEP_DELAY_MS); | 16926 | DvcSleepMilliSecond(ADV_EEP_DELAY_MS); |
17257 | } | 16927 | } |
17258 | |||
17259 | /* | ||
17260 | * Write EEPROM checksum at word 21. | ||
17261 | */ | ||
17262 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum); | ||
17263 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); | ||
17264 | AdvWaitEEPCmd(iop_base); | ||
17265 | wbuf++; charfields++; | ||
17266 | 16928 | ||
17267 | /* | 16929 | /* |
17268 | * Write EEPROM OEM name at words 22 to 29. | 16930 | * Write EEPROM checksum at word 21. |
17269 | */ | 16931 | */ |
17270 | for (addr = ADV_EEP_DVC_CTL_BEGIN; | 16932 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum); |
17271 | addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) | 16933 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); |
17272 | { | 16934 | AdvWaitEEPCmd(iop_base); |
17273 | ushort word; | 16935 | wbuf++; |
17274 | 16936 | charfields++; | |
17275 | if (*charfields++) { | 16937 | |
17276 | word = cpu_to_le16(*wbuf); | 16938 | /* |
17277 | } else { | 16939 | * Write EEPROM OEM name at words 22 to 29. |
17278 | word = *wbuf; | 16940 | */ |
17279 | } | 16941 | for (addr = ADV_EEP_DVC_CTL_BEGIN; |
17280 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | 16942 | addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) { |
17281 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); | 16943 | ushort word; |
17282 | AdvWaitEEPCmd(iop_base); | 16944 | |
17283 | } | 16945 | if (*charfields++) { |
17284 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE); | 16946 | word = cpu_to_le16(*wbuf); |
17285 | AdvWaitEEPCmd(iop_base); | 16947 | } else { |
17286 | return; | 16948 | word = *wbuf; |
16949 | } | ||
16950 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | ||
16951 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, | ||
16952 | ASC_EEP_CMD_WRITE | addr); | ||
16953 | AdvWaitEEPCmd(iop_base); | ||
16954 | } | ||
16955 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE); | ||
16956 | AdvWaitEEPCmd(iop_base); | ||
16957 | return; | ||
17287 | } | 16958 | } |
17288 | 16959 | ||
17289 | /* | 16960 | /* |
17290 | * Write the EEPROM from 'cfg_buf'. | 16961 | * Write the EEPROM from 'cfg_buf'. |
17291 | */ | 16962 | */ |
17292 | void __init | 16963 | void __init |
17293 | AdvSet38C0800EEPConfig(AdvPortAddr iop_base, | 16964 | AdvSet38C0800EEPConfig(AdvPortAddr iop_base, ADVEEP_38C0800_CONFIG *cfg_buf) |
17294 | ADVEEP_38C0800_CONFIG *cfg_buf) | ||
17295 | { | 16965 | { |
17296 | ushort *wbuf; | 16966 | ushort *wbuf; |
17297 | ushort *charfields; | 16967 | ushort *charfields; |
17298 | ushort addr, chksum; | 16968 | ushort addr, chksum; |
17299 | 16969 | ||
17300 | wbuf = (ushort *) cfg_buf; | 16970 | wbuf = (ushort *)cfg_buf; |
17301 | charfields = (ushort *) &ADVEEP_38C0800_Config_Field_IsChar; | 16971 | charfields = (ushort *)&ADVEEP_38C0800_Config_Field_IsChar; |
17302 | chksum = 0; | 16972 | chksum = 0; |
17303 | 16973 | ||
17304 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE); | 16974 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE); |
17305 | AdvWaitEEPCmd(iop_base); | 16975 | AdvWaitEEPCmd(iop_base); |
17306 | 16976 | ||
17307 | /* | 16977 | /* |
17308 | * Write EEPROM from word 0 to word 20. | 16978 | * Write EEPROM from word 0 to word 20. |
17309 | */ | 16979 | */ |
17310 | for (addr = ADV_EEP_DVC_CFG_BEGIN; | 16980 | for (addr = ADV_EEP_DVC_CFG_BEGIN; |
17311 | addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) | 16981 | addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) { |
17312 | { | 16982 | ushort word; |
17313 | ushort word; | 16983 | |
17314 | 16984 | if (*charfields++) { | |
17315 | if (*charfields++) { | 16985 | word = cpu_to_le16(*wbuf); |
17316 | word = cpu_to_le16(*wbuf); | 16986 | } else { |
17317 | } else { | 16987 | word = *wbuf; |
17318 | word = *wbuf; | 16988 | } |
17319 | } | 16989 | chksum += *wbuf; /* Checksum is calculated from word values. */ |
17320 | chksum += *wbuf; /* Checksum is calculated from word values. */ | 16990 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); |
17321 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | 16991 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, |
17322 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); | 16992 | ASC_EEP_CMD_WRITE | addr); |
17323 | AdvWaitEEPCmd(iop_base); | 16993 | AdvWaitEEPCmd(iop_base); |
17324 | DvcSleepMilliSecond(ADV_EEP_DELAY_MS); | 16994 | DvcSleepMilliSecond(ADV_EEP_DELAY_MS); |
17325 | } | 16995 | } |
17326 | |||
17327 | /* | ||
17328 | * Write EEPROM checksum at word 21. | ||
17329 | */ | ||
17330 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum); | ||
17331 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); | ||
17332 | AdvWaitEEPCmd(iop_base); | ||
17333 | wbuf++; charfields++; | ||
17334 | 16996 | ||
17335 | /* | 16997 | /* |
17336 | * Write EEPROM OEM name at words 22 to 29. | 16998 | * Write EEPROM checksum at word 21. |
17337 | */ | 16999 | */ |
17338 | for (addr = ADV_EEP_DVC_CTL_BEGIN; | 17000 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum); |
17339 | addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) | 17001 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); |
17340 | { | 17002 | AdvWaitEEPCmd(iop_base); |
17341 | ushort word; | 17003 | wbuf++; |
17342 | 17004 | charfields++; | |
17343 | if (*charfields++) { | 17005 | |
17344 | word = cpu_to_le16(*wbuf); | 17006 | /* |
17345 | } else { | 17007 | * Write EEPROM OEM name at words 22 to 29. |
17346 | word = *wbuf; | 17008 | */ |
17347 | } | 17009 | for (addr = ADV_EEP_DVC_CTL_BEGIN; |
17348 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | 17010 | addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) { |
17349 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); | 17011 | ushort word; |
17350 | AdvWaitEEPCmd(iop_base); | 17012 | |
17351 | } | 17013 | if (*charfields++) { |
17352 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE); | 17014 | word = cpu_to_le16(*wbuf); |
17353 | AdvWaitEEPCmd(iop_base); | 17015 | } else { |
17354 | return; | 17016 | word = *wbuf; |
17017 | } | ||
17018 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | ||
17019 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, | ||
17020 | ASC_EEP_CMD_WRITE | addr); | ||
17021 | AdvWaitEEPCmd(iop_base); | ||
17022 | } | ||
17023 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE); | ||
17024 | AdvWaitEEPCmd(iop_base); | ||
17025 | return; | ||
17355 | } | 17026 | } |
17356 | 17027 | ||
17357 | /* | 17028 | /* |
17358 | * Write the EEPROM from 'cfg_buf'. | 17029 | * Write the EEPROM from 'cfg_buf'. |
17359 | */ | 17030 | */ |
17360 | void __init | 17031 | void __init |
17361 | AdvSet38C1600EEPConfig(AdvPortAddr iop_base, | 17032 | AdvSet38C1600EEPConfig(AdvPortAddr iop_base, ADVEEP_38C1600_CONFIG *cfg_buf) |
17362 | ADVEEP_38C1600_CONFIG *cfg_buf) | ||
17363 | { | 17033 | { |
17364 | ushort *wbuf; | 17034 | ushort *wbuf; |
17365 | ushort *charfields; | 17035 | ushort *charfields; |
17366 | ushort addr, chksum; | 17036 | ushort addr, chksum; |
17367 | 17037 | ||
17368 | wbuf = (ushort *) cfg_buf; | 17038 | wbuf = (ushort *)cfg_buf; |
17369 | charfields = (ushort *) &ADVEEP_38C1600_Config_Field_IsChar; | 17039 | charfields = (ushort *)&ADVEEP_38C1600_Config_Field_IsChar; |
17370 | chksum = 0; | 17040 | chksum = 0; |
17371 | 17041 | ||
17372 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE); | 17042 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_ABLE); |
17373 | AdvWaitEEPCmd(iop_base); | 17043 | AdvWaitEEPCmd(iop_base); |
17374 | 17044 | ||
17375 | /* | 17045 | /* |
17376 | * Write EEPROM from word 0 to word 20. | 17046 | * Write EEPROM from word 0 to word 20. |
17377 | */ | 17047 | */ |
17378 | for (addr = ADV_EEP_DVC_CFG_BEGIN; | 17048 | for (addr = ADV_EEP_DVC_CFG_BEGIN; |
17379 | addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) | 17049 | addr < ADV_EEP_DVC_CFG_END; addr++, wbuf++) { |
17380 | { | 17050 | ushort word; |
17381 | ushort word; | 17051 | |
17382 | 17052 | if (*charfields++) { | |
17383 | if (*charfields++) { | 17053 | word = cpu_to_le16(*wbuf); |
17384 | word = cpu_to_le16(*wbuf); | 17054 | } else { |
17385 | } else { | 17055 | word = *wbuf; |
17386 | word = *wbuf; | 17056 | } |
17387 | } | 17057 | chksum += *wbuf; /* Checksum is calculated from word values. */ |
17388 | chksum += *wbuf; /* Checksum is calculated from word values. */ | 17058 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); |
17389 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | 17059 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, |
17390 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); | 17060 | ASC_EEP_CMD_WRITE | addr); |
17391 | AdvWaitEEPCmd(iop_base); | 17061 | AdvWaitEEPCmd(iop_base); |
17392 | DvcSleepMilliSecond(ADV_EEP_DELAY_MS); | 17062 | DvcSleepMilliSecond(ADV_EEP_DELAY_MS); |
17393 | } | 17063 | } |
17394 | |||
17395 | /* | ||
17396 | * Write EEPROM checksum at word 21. | ||
17397 | */ | ||
17398 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum); | ||
17399 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); | ||
17400 | AdvWaitEEPCmd(iop_base); | ||
17401 | wbuf++; charfields++; | ||
17402 | 17064 | ||
17403 | /* | 17065 | /* |
17404 | * Write EEPROM OEM name at words 22 to 29. | 17066 | * Write EEPROM checksum at word 21. |
17405 | */ | 17067 | */ |
17406 | for (addr = ADV_EEP_DVC_CTL_BEGIN; | 17068 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, chksum); |
17407 | addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) | 17069 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); |
17408 | { | 17070 | AdvWaitEEPCmd(iop_base); |
17409 | ushort word; | 17071 | wbuf++; |
17410 | 17072 | charfields++; | |
17411 | if (*charfields++) { | 17073 | |
17412 | word = cpu_to_le16(*wbuf); | 17074 | /* |
17413 | } else { | 17075 | * Write EEPROM OEM name at words 22 to 29. |
17414 | word = *wbuf; | 17076 | */ |
17415 | } | 17077 | for (addr = ADV_EEP_DVC_CTL_BEGIN; |
17416 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | 17078 | addr < ADV_EEP_MAX_WORD_ADDR; addr++, wbuf++) { |
17417 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE | addr); | 17079 | ushort word; |
17418 | AdvWaitEEPCmd(iop_base); | 17080 | |
17419 | } | 17081 | if (*charfields++) { |
17420 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE); | 17082 | word = cpu_to_le16(*wbuf); |
17421 | AdvWaitEEPCmd(iop_base); | 17083 | } else { |
17422 | return; | 17084 | word = *wbuf; |
17085 | } | ||
17086 | AdvWriteWordRegister(iop_base, IOPW_EE_DATA, word); | ||
17087 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, | ||
17088 | ASC_EEP_CMD_WRITE | addr); | ||
17089 | AdvWaitEEPCmd(iop_base); | ||
17090 | } | ||
17091 | AdvWriteWordRegister(iop_base, IOPW_EE_CMD, ASC_EEP_CMD_WRITE_DISABLE); | ||
17092 | AdvWaitEEPCmd(iop_base); | ||
17093 | return; | ||
17423 | } | 17094 | } |
17424 | 17095 | ||
17425 | /* a_advlib.c */ | 17096 | /* a_advlib.c */ |
@@ -17444,126 +17115,120 @@ AdvSet38C1600EEPConfig(AdvPortAddr iop_base, | |||
17444 | * ADV_ERROR(-1) - Invalid ADV_SCSI_REQ_Q request structure | 17115 | * ADV_ERROR(-1) - Invalid ADV_SCSI_REQ_Q request structure |
17445 | * host IC error. | 17116 | * host IC error. |
17446 | */ | 17117 | */ |
17447 | STATIC int | 17118 | static int AdvExeScsiQueue(ADV_DVC_VAR *asc_dvc, ADV_SCSI_REQ_Q *scsiq) |
17448 | AdvExeScsiQueue(ADV_DVC_VAR *asc_dvc, | ||
17449 | ADV_SCSI_REQ_Q *scsiq) | ||
17450 | { | 17119 | { |
17451 | ulong last_int_level; | 17120 | ulong last_int_level; |
17452 | AdvPortAddr iop_base; | 17121 | AdvPortAddr iop_base; |
17453 | ADV_DCNT req_size; | 17122 | ADV_DCNT req_size; |
17454 | ADV_PADDR req_paddr; | 17123 | ADV_PADDR req_paddr; |
17455 | ADV_CARR_T *new_carrp; | 17124 | ADV_CARR_T *new_carrp; |
17456 | 17125 | ||
17457 | ASC_ASSERT(scsiq != NULL); /* 'scsiq' should never be NULL. */ | 17126 | ASC_ASSERT(scsiq != NULL); /* 'scsiq' should never be NULL. */ |
17458 | 17127 | ||
17459 | /* | 17128 | /* |
17460 | * The ADV_SCSI_REQ_Q 'target_id' field should never exceed ADV_MAX_TID. | 17129 | * The ADV_SCSI_REQ_Q 'target_id' field should never exceed ADV_MAX_TID. |
17461 | */ | 17130 | */ |
17462 | if (scsiq->target_id > ADV_MAX_TID) | 17131 | if (scsiq->target_id > ADV_MAX_TID) { |
17463 | { | 17132 | scsiq->host_status = QHSTA_M_INVALID_DEVICE; |
17464 | scsiq->host_status = QHSTA_M_INVALID_DEVICE; | 17133 | scsiq->done_status = QD_WITH_ERROR; |
17465 | scsiq->done_status = QD_WITH_ERROR; | 17134 | return ADV_ERROR; |
17466 | return ADV_ERROR; | 17135 | } |
17467 | } | ||
17468 | |||
17469 | iop_base = asc_dvc->iop_base; | ||
17470 | |||
17471 | last_int_level = DvcEnterCritical(); | ||
17472 | |||
17473 | /* | ||
17474 | * Allocate a carrier ensuring at least one carrier always | ||
17475 | * remains on the freelist and initialize fields. | ||
17476 | */ | ||
17477 | if ((new_carrp = asc_dvc->carr_freelist) == NULL) | ||
17478 | { | ||
17479 | DvcLeaveCritical(last_int_level); | ||
17480 | return ADV_BUSY; | ||
17481 | } | ||
17482 | asc_dvc->carr_freelist = (ADV_CARR_T *) | ||
17483 | ADV_U32_TO_VADDR(le32_to_cpu(new_carrp->next_vpa)); | ||
17484 | asc_dvc->carr_pending_cnt++; | ||
17485 | |||
17486 | /* | ||
17487 | * Set the carrier to be a stopper by setting 'next_vpa' | ||
17488 | * to the stopper value. The current stopper will be changed | ||
17489 | * below to point to the new stopper. | ||
17490 | */ | ||
17491 | new_carrp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); | ||
17492 | |||
17493 | /* | ||
17494 | * Clear the ADV_SCSI_REQ_Q done flag. | ||
17495 | */ | ||
17496 | scsiq->a_flag &= ~ADV_SCSIQ_DONE; | ||
17497 | |||
17498 | req_size = sizeof(ADV_SCSI_REQ_Q); | ||
17499 | req_paddr = DvcGetPhyAddr(asc_dvc, scsiq, (uchar *) scsiq, | ||
17500 | (ADV_SDCNT *) &req_size, ADV_IS_SCSIQ_FLAG); | ||
17501 | |||
17502 | ASC_ASSERT(ADV_32BALIGN(req_paddr) == req_paddr); | ||
17503 | ASC_ASSERT(req_size >= sizeof(ADV_SCSI_REQ_Q)); | ||
17504 | |||
17505 | /* Wait for assertion before making little-endian */ | ||
17506 | req_paddr = cpu_to_le32(req_paddr); | ||
17507 | |||
17508 | /* Save virtual and physical address of ADV_SCSI_REQ_Q and carrier. */ | ||
17509 | scsiq->scsiq_ptr = cpu_to_le32(ADV_VADDR_TO_U32(scsiq)); | ||
17510 | scsiq->scsiq_rptr = req_paddr; | ||
17511 | 17136 | ||
17512 | scsiq->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->icq_sp)); | 17137 | iop_base = asc_dvc->iop_base; |
17513 | /* | ||
17514 | * Every ADV_CARR_T.carr_pa is byte swapped to little-endian | ||
17515 | * order during initialization. | ||
17516 | */ | ||
17517 | scsiq->carr_pa = asc_dvc->icq_sp->carr_pa; | ||
17518 | |||
17519 | /* | ||
17520 | * Use the current stopper to send the ADV_SCSI_REQ_Q command to | ||
17521 | * the microcode. The newly allocated stopper will become the new | ||
17522 | * stopper. | ||
17523 | */ | ||
17524 | asc_dvc->icq_sp->areq_vpa = req_paddr; | ||
17525 | 17138 | ||
17526 | /* | 17139 | last_int_level = DvcEnterCritical(); |
17527 | * Set the 'next_vpa' pointer for the old stopper to be the | ||
17528 | * physical address of the new stopper. The RISC can only | ||
17529 | * follow physical addresses. | ||
17530 | */ | ||
17531 | asc_dvc->icq_sp->next_vpa = new_carrp->carr_pa; | ||
17532 | 17140 | ||
17533 | /* | 17141 | /* |
17534 | * Set the host adapter stopper pointer to point to the new carrier. | 17142 | * Allocate a carrier ensuring at least one carrier always |
17535 | */ | 17143 | * remains on the freelist and initialize fields. |
17536 | asc_dvc->icq_sp = new_carrp; | 17144 | */ |
17537 | 17145 | if ((new_carrp = asc_dvc->carr_freelist) == NULL) { | |
17538 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550 || | 17146 | DvcLeaveCritical(last_int_level); |
17539 | asc_dvc->chip_type == ADV_CHIP_ASC38C0800) | 17147 | return ADV_BUSY; |
17540 | { | 17148 | } |
17541 | /* | 17149 | asc_dvc->carr_freelist = (ADV_CARR_T *) |
17542 | * Tickle the RISC to tell it to read its Command Queue Head pointer. | 17150 | ADV_U32_TO_VADDR(le32_to_cpu(new_carrp->next_vpa)); |
17543 | */ | 17151 | asc_dvc->carr_pending_cnt++; |
17544 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_A); | 17152 | |
17545 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550) | 17153 | /* |
17546 | { | 17154 | * Set the carrier to be a stopper by setting 'next_vpa' |
17547 | /* | 17155 | * to the stopper value. The current stopper will be changed |
17548 | * Clear the tickle value. In the ASC-3550 the RISC flag | 17156 | * below to point to the new stopper. |
17549 | * command 'clr_tickle_a' does not work unless the host | 17157 | */ |
17550 | * value is cleared. | 17158 | new_carrp->next_vpa = cpu_to_le32(ASC_CQ_STOPPER); |
17551 | */ | 17159 | |
17552 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_NOP); | 17160 | /* |
17553 | } | 17161 | * Clear the ADV_SCSI_REQ_Q done flag. |
17554 | } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) | 17162 | */ |
17555 | { | 17163 | scsiq->a_flag &= ~ADV_SCSIQ_DONE; |
17556 | /* | 17164 | |
17557 | * Notify the RISC a carrier is ready by writing the physical | 17165 | req_size = sizeof(ADV_SCSI_REQ_Q); |
17558 | * address of the new carrier stopper to the COMMA register. | 17166 | req_paddr = DvcGetPhyAddr(asc_dvc, scsiq, (uchar *)scsiq, |
17559 | */ | 17167 | (ADV_SDCNT *)&req_size, ADV_IS_SCSIQ_FLAG); |
17560 | AdvWriteDWordRegister(iop_base, IOPDW_COMMA, | 17168 | |
17561 | le32_to_cpu(new_carrp->carr_pa)); | 17169 | ASC_ASSERT(ADV_32BALIGN(req_paddr) == req_paddr); |
17562 | } | 17170 | ASC_ASSERT(req_size >= sizeof(ADV_SCSI_REQ_Q)); |
17171 | |||
17172 | /* Wait for assertion before making little-endian */ | ||
17173 | req_paddr = cpu_to_le32(req_paddr); | ||
17174 | |||
17175 | /* Save virtual and physical address of ADV_SCSI_REQ_Q and carrier. */ | ||
17176 | scsiq->scsiq_ptr = cpu_to_le32(ADV_VADDR_TO_U32(scsiq)); | ||
17177 | scsiq->scsiq_rptr = req_paddr; | ||
17178 | |||
17179 | scsiq->carr_va = cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->icq_sp)); | ||
17180 | /* | ||
17181 | * Every ADV_CARR_T.carr_pa is byte swapped to little-endian | ||
17182 | * order during initialization. | ||
17183 | */ | ||
17184 | scsiq->carr_pa = asc_dvc->icq_sp->carr_pa; | ||
17185 | |||
17186 | /* | ||
17187 | * Use the current stopper to send the ADV_SCSI_REQ_Q command to | ||
17188 | * the microcode. The newly allocated stopper will become the new | ||
17189 | * stopper. | ||
17190 | */ | ||
17191 | asc_dvc->icq_sp->areq_vpa = req_paddr; | ||
17192 | |||
17193 | /* | ||
17194 | * Set the 'next_vpa' pointer for the old stopper to be the | ||
17195 | * physical address of the new stopper. The RISC can only | ||
17196 | * follow physical addresses. | ||
17197 | */ | ||
17198 | asc_dvc->icq_sp->next_vpa = new_carrp->carr_pa; | ||
17199 | |||
17200 | /* | ||
17201 | * Set the host adapter stopper pointer to point to the new carrier. | ||
17202 | */ | ||
17203 | asc_dvc->icq_sp = new_carrp; | ||
17204 | |||
17205 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550 || | ||
17206 | asc_dvc->chip_type == ADV_CHIP_ASC38C0800) { | ||
17207 | /* | ||
17208 | * Tickle the RISC to tell it to read its Command Queue Head pointer. | ||
17209 | */ | ||
17210 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_A); | ||
17211 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550) { | ||
17212 | /* | ||
17213 | * Clear the tickle value. In the ASC-3550 the RISC flag | ||
17214 | * command 'clr_tickle_a' does not work unless the host | ||
17215 | * value is cleared. | ||
17216 | */ | ||
17217 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, | ||
17218 | ADV_TICKLE_NOP); | ||
17219 | } | ||
17220 | } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) { | ||
17221 | /* | ||
17222 | * Notify the RISC a carrier is ready by writing the physical | ||
17223 | * address of the new carrier stopper to the COMMA register. | ||
17224 | */ | ||
17225 | AdvWriteDWordRegister(iop_base, IOPDW_COMMA, | ||
17226 | le32_to_cpu(new_carrp->carr_pa)); | ||
17227 | } | ||
17563 | 17228 | ||
17564 | DvcLeaveCritical(last_int_level); | 17229 | DvcLeaveCritical(last_int_level); |
17565 | 17230 | ||
17566 | return ADV_SUCCESS; | 17231 | return ADV_SUCCESS; |
17567 | } | 17232 | } |
17568 | 17233 | ||
17569 | /* | 17234 | /* |
@@ -17575,42 +17240,39 @@ AdvExeScsiQueue(ADV_DVC_VAR *asc_dvc, | |||
17575 | * ADV_ERROR(-1) - Microcode command timed-out. Microcode or IC | 17240 | * ADV_ERROR(-1) - Microcode command timed-out. Microcode or IC |
17576 | * may be hung which requires driver recovery. | 17241 | * may be hung which requires driver recovery. |
17577 | */ | 17242 | */ |
17578 | STATIC int | 17243 | static int AdvResetSB(ADV_DVC_VAR *asc_dvc) |
17579 | AdvResetSB(ADV_DVC_VAR *asc_dvc) | ||
17580 | { | 17244 | { |
17581 | int status; | 17245 | int status; |
17582 | 17246 | ||
17583 | /* | 17247 | /* |
17584 | * Send the SCSI Bus Reset idle start idle command which asserts | 17248 | * Send the SCSI Bus Reset idle start idle command which asserts |
17585 | * the SCSI Bus Reset signal. | 17249 | * the SCSI Bus Reset signal. |
17586 | */ | 17250 | */ |
17587 | status = AdvSendIdleCmd(asc_dvc, (ushort) IDLE_CMD_SCSI_RESET_START, 0L); | 17251 | status = AdvSendIdleCmd(asc_dvc, (ushort)IDLE_CMD_SCSI_RESET_START, 0L); |
17588 | if (status != ADV_TRUE) | 17252 | if (status != ADV_TRUE) { |
17589 | { | 17253 | return status; |
17590 | return status; | 17254 | } |
17591 | } | ||
17592 | |||
17593 | /* | ||
17594 | * Delay for the specified SCSI Bus Reset hold time. | ||
17595 | * | ||
17596 | * The hold time delay is done on the host because the RISC has no | ||
17597 | * microsecond accurate timer. | ||
17598 | */ | ||
17599 | DvcDelayMicroSecond(asc_dvc, (ushort) ASC_SCSI_RESET_HOLD_TIME_US); | ||
17600 | 17255 | ||
17601 | /* | 17256 | /* |
17602 | * Send the SCSI Bus Reset end idle command which de-asserts | 17257 | * Delay for the specified SCSI Bus Reset hold time. |
17603 | * the SCSI Bus Reset signal and purges any pending requests. | 17258 | * |
17604 | */ | 17259 | * The hold time delay is done on the host because the RISC has no |
17605 | status = AdvSendIdleCmd(asc_dvc, (ushort) IDLE_CMD_SCSI_RESET_END, 0L); | 17260 | * microsecond accurate timer. |
17606 | if (status != ADV_TRUE) | 17261 | */ |
17607 | { | 17262 | DvcDelayMicroSecond(asc_dvc, (ushort)ASC_SCSI_RESET_HOLD_TIME_US); |
17608 | return status; | 17263 | |
17609 | } | 17264 | /* |
17265 | * Send the SCSI Bus Reset end idle command which de-asserts | ||
17266 | * the SCSI Bus Reset signal and purges any pending requests. | ||
17267 | */ | ||
17268 | status = AdvSendIdleCmd(asc_dvc, (ushort)IDLE_CMD_SCSI_RESET_END, 0L); | ||
17269 | if (status != ADV_TRUE) { | ||
17270 | return status; | ||
17271 | } | ||
17610 | 17272 | ||
17611 | DvcSleepMilliSecond((ADV_DCNT) asc_dvc->scsi_reset_wait * 1000); | 17273 | DvcSleepMilliSecond((ADV_DCNT)asc_dvc->scsi_reset_wait * 1000); |
17612 | 17274 | ||
17613 | return status; | 17275 | return status; |
17614 | } | 17276 | } |
17615 | 17277 | ||
17616 | /* | 17278 | /* |
@@ -17620,99 +17282,89 @@ AdvResetSB(ADV_DVC_VAR *asc_dvc) | |||
17620 | * ADV_TRUE(1) - Chip re-initialization and SCSI Bus Reset successful. | 17282 | * ADV_TRUE(1) - Chip re-initialization and SCSI Bus Reset successful. |
17621 | * ADV_FALSE(0) - Chip re-initialization and SCSI Bus Reset failure. | 17283 | * ADV_FALSE(0) - Chip re-initialization and SCSI Bus Reset failure. |
17622 | */ | 17284 | */ |
17623 | STATIC int | 17285 | static int AdvResetChipAndSB(ADV_DVC_VAR *asc_dvc) |
17624 | AdvResetChipAndSB(ADV_DVC_VAR *asc_dvc) | ||
17625 | { | 17286 | { |
17626 | int status; | 17287 | int status; |
17627 | ushort wdtr_able, sdtr_able, tagqng_able; | 17288 | ushort wdtr_able, sdtr_able, tagqng_able; |
17628 | ushort ppr_able = 0; | 17289 | ushort ppr_able = 0; |
17629 | uchar tid, max_cmd[ADV_MAX_TID + 1]; | 17290 | uchar tid, max_cmd[ADV_MAX_TID + 1]; |
17630 | AdvPortAddr iop_base; | 17291 | AdvPortAddr iop_base; |
17631 | ushort bios_sig; | 17292 | ushort bios_sig; |
17632 | 17293 | ||
17633 | iop_base = asc_dvc->iop_base; | 17294 | iop_base = asc_dvc->iop_base; |
17634 | 17295 | ||
17635 | /* | 17296 | /* |
17636 | * Save current per TID negotiated values. | 17297 | * Save current per TID negotiated values. |
17637 | */ | 17298 | */ |
17638 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | 17299 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); |
17639 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | 17300 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); |
17640 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) | 17301 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) { |
17641 | { | 17302 | AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); |
17642 | AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); | 17303 | } |
17643 | } | 17304 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); |
17644 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | 17305 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { |
17645 | for (tid = 0; tid <= ADV_MAX_TID; tid++) | 17306 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, |
17646 | { | 17307 | max_cmd[tid]); |
17647 | AdvReadByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | 17308 | } |
17648 | max_cmd[tid]); | ||
17649 | } | ||
17650 | |||
17651 | /* | ||
17652 | * Force the AdvInitAsc3550/38C0800Driver() function to | ||
17653 | * perform a SCSI Bus Reset by clearing the BIOS signature word. | ||
17654 | * The initialization functions assumes a SCSI Bus Reset is not | ||
17655 | * needed if the BIOS signature word is present. | ||
17656 | */ | ||
17657 | AdvReadWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, bios_sig); | ||
17658 | AdvWriteWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, 0); | ||
17659 | |||
17660 | /* | ||
17661 | * Stop chip and reset it. | ||
17662 | */ | ||
17663 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_STOP); | ||
17664 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, ADV_CTRL_REG_CMD_RESET); | ||
17665 | DvcSleepMilliSecond(100); | ||
17666 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, ADV_CTRL_REG_CMD_WR_IO_REG); | ||
17667 | |||
17668 | /* | ||
17669 | * Reset Adv Library error code, if any, and try | ||
17670 | * re-initializing the chip. | ||
17671 | */ | ||
17672 | asc_dvc->err_code = 0; | ||
17673 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) | ||
17674 | { | ||
17675 | status = AdvInitAsc38C1600Driver(asc_dvc); | ||
17676 | } | ||
17677 | else if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800) | ||
17678 | { | ||
17679 | status = AdvInitAsc38C0800Driver(asc_dvc); | ||
17680 | } else | ||
17681 | { | ||
17682 | status = AdvInitAsc3550Driver(asc_dvc); | ||
17683 | } | ||
17684 | 17309 | ||
17685 | /* Translate initialization return value to status value. */ | 17310 | /* |
17686 | if (status == 0) | 17311 | * Force the AdvInitAsc3550/38C0800Driver() function to |
17687 | { | 17312 | * perform a SCSI Bus Reset by clearing the BIOS signature word. |
17688 | status = ADV_TRUE; | 17313 | * The initialization functions assumes a SCSI Bus Reset is not |
17689 | } else | 17314 | * needed if the BIOS signature word is present. |
17690 | { | 17315 | */ |
17691 | status = ADV_FALSE; | 17316 | AdvReadWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, bios_sig); |
17692 | } | 17317 | AdvWriteWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, 0); |
17318 | |||
17319 | /* | ||
17320 | * Stop chip and reset it. | ||
17321 | */ | ||
17322 | AdvWriteWordRegister(iop_base, IOPW_RISC_CSR, ADV_RISC_CSR_STOP); | ||
17323 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, ADV_CTRL_REG_CMD_RESET); | ||
17324 | DvcSleepMilliSecond(100); | ||
17325 | AdvWriteWordRegister(iop_base, IOPW_CTRL_REG, | ||
17326 | ADV_CTRL_REG_CMD_WR_IO_REG); | ||
17327 | |||
17328 | /* | ||
17329 | * Reset Adv Library error code, if any, and try | ||
17330 | * re-initializing the chip. | ||
17331 | */ | ||
17332 | asc_dvc->err_code = 0; | ||
17333 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) { | ||
17334 | status = AdvInitAsc38C1600Driver(asc_dvc); | ||
17335 | } else if (asc_dvc->chip_type == ADV_CHIP_ASC38C0800) { | ||
17336 | status = AdvInitAsc38C0800Driver(asc_dvc); | ||
17337 | } else { | ||
17338 | status = AdvInitAsc3550Driver(asc_dvc); | ||
17339 | } | ||
17693 | 17340 | ||
17694 | /* | 17341 | /* Translate initialization return value to status value. */ |
17695 | * Restore the BIOS signature word. | 17342 | if (status == 0) { |
17696 | */ | 17343 | status = ADV_TRUE; |
17697 | AdvWriteWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, bios_sig); | 17344 | } else { |
17345 | status = ADV_FALSE; | ||
17346 | } | ||
17698 | 17347 | ||
17699 | /* | 17348 | /* |
17700 | * Restore per TID negotiated values. | 17349 | * Restore the BIOS signature word. |
17701 | */ | 17350 | */ |
17702 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); | 17351 | AdvWriteWordLram(iop_base, ASC_MC_BIOS_SIGNATURE, bios_sig); |
17703 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); | 17352 | |
17704 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) | 17353 | /* |
17705 | { | 17354 | * Restore per TID negotiated values. |
17706 | AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); | 17355 | */ |
17707 | } | 17356 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, wdtr_able); |
17708 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); | 17357 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able); |
17709 | for (tid = 0; tid <= ADV_MAX_TID; tid++) | 17358 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600) { |
17710 | { | 17359 | AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, ppr_able); |
17711 | AdvWriteByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | 17360 | } |
17712 | max_cmd[tid]); | 17361 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, tagqng_able); |
17713 | } | 17362 | for (tid = 0; tid <= ADV_MAX_TID; tid++) { |
17363 | AdvWriteByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
17364 | max_cmd[tid]); | ||
17365 | } | ||
17714 | 17366 | ||
17715 | return status; | 17367 | return status; |
17716 | } | 17368 | } |
17717 | 17369 | ||
17718 | /* | 17370 | /* |
@@ -17734,158 +17386,151 @@ AdvResetChipAndSB(ADV_DVC_VAR *asc_dvc) | |||
17734 | * ADV_TRUE(1) - interrupt was pending | 17386 | * ADV_TRUE(1) - interrupt was pending |
17735 | * ADV_FALSE(0) - no interrupt was pending | 17387 | * ADV_FALSE(0) - no interrupt was pending |
17736 | */ | 17388 | */ |
17737 | STATIC int | 17389 | static int AdvISR(ADV_DVC_VAR *asc_dvc) |
17738 | AdvISR(ADV_DVC_VAR *asc_dvc) | ||
17739 | { | 17390 | { |
17740 | AdvPortAddr iop_base; | 17391 | AdvPortAddr iop_base; |
17741 | uchar int_stat; | 17392 | uchar int_stat; |
17742 | ushort target_bit; | 17393 | ushort target_bit; |
17743 | ADV_CARR_T *free_carrp; | 17394 | ADV_CARR_T *free_carrp; |
17744 | ADV_VADDR irq_next_vpa; | 17395 | ADV_VADDR irq_next_vpa; |
17745 | int flags; | 17396 | int flags; |
17746 | ADV_SCSI_REQ_Q *scsiq; | 17397 | ADV_SCSI_REQ_Q *scsiq; |
17747 | |||
17748 | flags = DvcEnterCritical(); | ||
17749 | |||
17750 | iop_base = asc_dvc->iop_base; | ||
17751 | |||
17752 | /* Reading the register clears the interrupt. */ | ||
17753 | int_stat = AdvReadByteRegister(iop_base, IOPB_INTR_STATUS_REG); | ||
17754 | |||
17755 | if ((int_stat & (ADV_INTR_STATUS_INTRA | ADV_INTR_STATUS_INTRB | | ||
17756 | ADV_INTR_STATUS_INTRC)) == 0) | ||
17757 | { | ||
17758 | DvcLeaveCritical(flags); | ||
17759 | return ADV_FALSE; | ||
17760 | } | ||
17761 | 17398 | ||
17762 | /* | 17399 | flags = DvcEnterCritical(); |
17763 | * Notify the driver of an asynchronous microcode condition by | ||
17764 | * calling the ADV_DVC_VAR.async_callback function. The function | ||
17765 | * is passed the microcode ASC_MC_INTRB_CODE byte value. | ||
17766 | */ | ||
17767 | if (int_stat & ADV_INTR_STATUS_INTRB) | ||
17768 | { | ||
17769 | uchar intrb_code; | ||
17770 | |||
17771 | AdvReadByteLram(iop_base, ASC_MC_INTRB_CODE, intrb_code); | ||
17772 | |||
17773 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550 || | ||
17774 | asc_dvc->chip_type == ADV_CHIP_ASC38C0800) | ||
17775 | { | ||
17776 | if (intrb_code == ADV_ASYNC_CARRIER_READY_FAILURE && | ||
17777 | asc_dvc->carr_pending_cnt != 0) | ||
17778 | { | ||
17779 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_A); | ||
17780 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550) | ||
17781 | { | ||
17782 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_NOP); | ||
17783 | } | ||
17784 | } | ||
17785 | } | ||
17786 | |||
17787 | if (asc_dvc->async_callback != 0) | ||
17788 | { | ||
17789 | (*asc_dvc->async_callback)(asc_dvc, intrb_code); | ||
17790 | } | ||
17791 | } | ||
17792 | 17400 | ||
17793 | /* | 17401 | iop_base = asc_dvc->iop_base; |
17794 | * Check if the IRQ stopper carrier contains a completed request. | 17402 | |
17795 | */ | 17403 | /* Reading the register clears the interrupt. */ |
17796 | while (((irq_next_vpa = | 17404 | int_stat = AdvReadByteRegister(iop_base, IOPB_INTR_STATUS_REG); |
17797 | le32_to_cpu(asc_dvc->irq_sp->next_vpa)) & ASC_RQ_DONE) != 0) | 17405 | |
17798 | { | 17406 | if ((int_stat & (ADV_INTR_STATUS_INTRA | ADV_INTR_STATUS_INTRB | |
17799 | /* | 17407 | ADV_INTR_STATUS_INTRC)) == 0) { |
17800 | * Get a pointer to the newly completed ADV_SCSI_REQ_Q structure. | 17408 | DvcLeaveCritical(flags); |
17801 | * The RISC will have set 'areq_vpa' to a virtual address. | 17409 | return ADV_FALSE; |
17802 | * | 17410 | } |
17803 | * The firmware will have copied the ASC_SCSI_REQ_Q.scsiq_ptr | 17411 | |
17804 | * field to the carrier ADV_CARR_T.areq_vpa field. The conversion | 17412 | /* |
17805 | * below complements the conversion of ASC_SCSI_REQ_Q.scsiq_ptr' | 17413 | * Notify the driver of an asynchronous microcode condition by |
17806 | * in AdvExeScsiQueue(). | 17414 | * calling the ADV_DVC_VAR.async_callback function. The function |
17807 | */ | 17415 | * is passed the microcode ASC_MC_INTRB_CODE byte value. |
17808 | scsiq = (ADV_SCSI_REQ_Q *) | 17416 | */ |
17809 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->areq_vpa)); | 17417 | if (int_stat & ADV_INTR_STATUS_INTRB) { |
17810 | 17418 | uchar intrb_code; | |
17811 | /* | 17419 | |
17812 | * Request finished with good status and the queue was not | 17420 | AdvReadByteLram(iop_base, ASC_MC_INTRB_CODE, intrb_code); |
17813 | * DMAed to host memory by the firmware. Set all status fields | 17421 | |
17814 | * to indicate good status. | 17422 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550 || |
17815 | */ | 17423 | asc_dvc->chip_type == ADV_CHIP_ASC38C0800) { |
17816 | if ((irq_next_vpa & ASC_RQ_GOOD) != 0) | 17424 | if (intrb_code == ADV_ASYNC_CARRIER_READY_FAILURE && |
17817 | { | 17425 | asc_dvc->carr_pending_cnt != 0) { |
17818 | scsiq->done_status = QD_NO_ERROR; | 17426 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, |
17819 | scsiq->host_status = scsiq->scsi_status = 0; | 17427 | ADV_TICKLE_A); |
17820 | scsiq->data_cnt = 0L; | 17428 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550) { |
17821 | } | 17429 | AdvWriteByteRegister(iop_base, |
17822 | 17430 | IOPB_TICKLE, | |
17823 | /* | 17431 | ADV_TICKLE_NOP); |
17824 | * Advance the stopper pointer to the next carrier | 17432 | } |
17825 | * ignoring the lower four bits. Free the previous | 17433 | } |
17826 | * stopper carrier. | 17434 | } |
17827 | */ | 17435 | |
17828 | free_carrp = asc_dvc->irq_sp; | 17436 | if (asc_dvc->async_callback != 0) { |
17829 | asc_dvc->irq_sp = (ADV_CARR_T *) | 17437 | (*asc_dvc->async_callback) (asc_dvc, intrb_code); |
17830 | ADV_U32_TO_VADDR(ASC_GET_CARRP(irq_next_vpa)); | 17438 | } |
17831 | 17439 | } | |
17832 | free_carrp->next_vpa = | 17440 | |
17833 | cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist)); | 17441 | /* |
17834 | asc_dvc->carr_freelist = free_carrp; | 17442 | * Check if the IRQ stopper carrier contains a completed request. |
17835 | asc_dvc->carr_pending_cnt--; | 17443 | */ |
17836 | 17444 | while (((irq_next_vpa = | |
17837 | ASC_ASSERT(scsiq != NULL); | 17445 | le32_to_cpu(asc_dvc->irq_sp->next_vpa)) & ASC_RQ_DONE) != 0) { |
17838 | target_bit = ADV_TID_TO_TIDMASK(scsiq->target_id); | 17446 | /* |
17839 | 17447 | * Get a pointer to the newly completed ADV_SCSI_REQ_Q structure. | |
17840 | /* | 17448 | * The RISC will have set 'areq_vpa' to a virtual address. |
17841 | * Clear request microcode control flag. | 17449 | * |
17842 | */ | 17450 | * The firmware will have copied the ASC_SCSI_REQ_Q.scsiq_ptr |
17843 | scsiq->cntl = 0; | 17451 | * field to the carrier ADV_CARR_T.areq_vpa field. The conversion |
17844 | 17452 | * below complements the conversion of ASC_SCSI_REQ_Q.scsiq_ptr' | |
17845 | /* | 17453 | * in AdvExeScsiQueue(). |
17846 | * If the command that completed was a SCSI INQUIRY and | 17454 | */ |
17847 | * LUN 0 was sent the command, then process the INQUIRY | 17455 | scsiq = (ADV_SCSI_REQ_Q *) |
17848 | * command information for the device. | 17456 | ADV_U32_TO_VADDR(le32_to_cpu(asc_dvc->irq_sp->areq_vpa)); |
17849 | * | 17457 | |
17850 | * Note: If data returned were either VPD or CmdDt data, | 17458 | /* |
17851 | * don't process the INQUIRY command information for | 17459 | * Request finished with good status and the queue was not |
17852 | * the device, otherwise may erroneously set *_able bits. | 17460 | * DMAed to host memory by the firmware. Set all status fields |
17853 | */ | 17461 | * to indicate good status. |
17854 | if (scsiq->done_status == QD_NO_ERROR && | 17462 | */ |
17855 | scsiq->cdb[0] == INQUIRY && | 17463 | if ((irq_next_vpa & ASC_RQ_GOOD) != 0) { |
17856 | scsiq->target_lun == 0 && | 17464 | scsiq->done_status = QD_NO_ERROR; |
17857 | (scsiq->cdb[1] & ADV_INQ_RTN_VPD_AND_CMDDT) | 17465 | scsiq->host_status = scsiq->scsi_status = 0; |
17858 | == ADV_INQ_RTN_STD_INQUIRY_DATA) | 17466 | scsiq->data_cnt = 0L; |
17859 | { | 17467 | } |
17860 | AdvInquiryHandling(asc_dvc, scsiq); | 17468 | |
17861 | } | 17469 | /* |
17862 | 17470 | * Advance the stopper pointer to the next carrier | |
17863 | /* | 17471 | * ignoring the lower four bits. Free the previous |
17864 | * Notify the driver of the completed request by passing | 17472 | * stopper carrier. |
17865 | * the ADV_SCSI_REQ_Q pointer to its callback function. | 17473 | */ |
17866 | */ | 17474 | free_carrp = asc_dvc->irq_sp; |
17867 | scsiq->a_flag |= ADV_SCSIQ_DONE; | 17475 | asc_dvc->irq_sp = (ADV_CARR_T *) |
17868 | (*asc_dvc->isr_callback)(asc_dvc, scsiq); | 17476 | ADV_U32_TO_VADDR(ASC_GET_CARRP(irq_next_vpa)); |
17869 | /* | 17477 | |
17870 | * Note: After the driver callback function is called, 'scsiq' | 17478 | free_carrp->next_vpa = |
17871 | * can no longer be referenced. | 17479 | cpu_to_le32(ADV_VADDR_TO_U32(asc_dvc->carr_freelist)); |
17872 | * | 17480 | asc_dvc->carr_freelist = free_carrp; |
17873 | * Fall through and continue processing other completed | 17481 | asc_dvc->carr_pending_cnt--; |
17874 | * requests... | 17482 | |
17875 | */ | 17483 | ASC_ASSERT(scsiq != NULL); |
17876 | 17484 | target_bit = ADV_TID_TO_TIDMASK(scsiq->target_id); | |
17877 | /* | 17485 | |
17878 | * Disable interrupts again in case the driver inadvertently | 17486 | /* |
17879 | * enabled interrupts in its callback function. | 17487 | * Clear request microcode control flag. |
17880 | * | 17488 | */ |
17881 | * The DvcEnterCritical() return value is ignored, because | 17489 | scsiq->cntl = 0; |
17882 | * the 'flags' saved when AdvISR() was first entered will be | 17490 | |
17883 | * used to restore the interrupt flag on exit. | 17491 | /* |
17884 | */ | 17492 | * If the command that completed was a SCSI INQUIRY and |
17885 | (void) DvcEnterCritical(); | 17493 | * LUN 0 was sent the command, then process the INQUIRY |
17886 | } | 17494 | * command information for the device. |
17887 | DvcLeaveCritical(flags); | 17495 | * |
17888 | return ADV_TRUE; | 17496 | * Note: If data returned were either VPD or CmdDt data, |
17497 | * don't process the INQUIRY command information for | ||
17498 | * the device, otherwise may erroneously set *_able bits. | ||
17499 | */ | ||
17500 | if (scsiq->done_status == QD_NO_ERROR && | ||
17501 | scsiq->cdb[0] == INQUIRY && | ||
17502 | scsiq->target_lun == 0 && | ||
17503 | (scsiq->cdb[1] & ADV_INQ_RTN_VPD_AND_CMDDT) | ||
17504 | == ADV_INQ_RTN_STD_INQUIRY_DATA) { | ||
17505 | AdvInquiryHandling(asc_dvc, scsiq); | ||
17506 | } | ||
17507 | |||
17508 | /* | ||
17509 | * Notify the driver of the completed request by passing | ||
17510 | * the ADV_SCSI_REQ_Q pointer to its callback function. | ||
17511 | */ | ||
17512 | scsiq->a_flag |= ADV_SCSIQ_DONE; | ||
17513 | (*asc_dvc->isr_callback) (asc_dvc, scsiq); | ||
17514 | /* | ||
17515 | * Note: After the driver callback function is called, 'scsiq' | ||
17516 | * can no longer be referenced. | ||
17517 | * | ||
17518 | * Fall through and continue processing other completed | ||
17519 | * requests... | ||
17520 | */ | ||
17521 | |||
17522 | /* | ||
17523 | * Disable interrupts again in case the driver inadvertently | ||
17524 | * enabled interrupts in its callback function. | ||
17525 | * | ||
17526 | * The DvcEnterCritical() return value is ignored, because | ||
17527 | * the 'flags' saved when AdvISR() was first entered will be | ||
17528 | * used to restore the interrupt flag on exit. | ||
17529 | */ | ||
17530 | (void)DvcEnterCritical(); | ||
17531 | } | ||
17532 | DvcLeaveCritical(flags); | ||
17533 | return ADV_TRUE; | ||
17889 | } | 17534 | } |
17890 | 17535 | ||
17891 | /* | 17536 | /* |
@@ -17902,71 +17547,67 @@ AdvISR(ADV_DVC_VAR *asc_dvc) | |||
17902 | * ADV_FALSE - command failed | 17547 | * ADV_FALSE - command failed |
17903 | * ADV_ERROR - command timed out | 17548 | * ADV_ERROR - command timed out |
17904 | */ | 17549 | */ |
17905 | STATIC int | 17550 | static int |
17906 | AdvSendIdleCmd(ADV_DVC_VAR *asc_dvc, | 17551 | AdvSendIdleCmd(ADV_DVC_VAR *asc_dvc, |
17907 | ushort idle_cmd, | 17552 | ushort idle_cmd, ADV_DCNT idle_cmd_parameter) |
17908 | ADV_DCNT idle_cmd_parameter) | ||
17909 | { | 17553 | { |
17910 | ulong last_int_level; | 17554 | ulong last_int_level; |
17911 | int result; | 17555 | int result; |
17912 | ADV_DCNT i, j; | 17556 | ADV_DCNT i, j; |
17913 | AdvPortAddr iop_base; | 17557 | AdvPortAddr iop_base; |
17914 | 17558 | ||
17915 | last_int_level = DvcEnterCritical(); | 17559 | last_int_level = DvcEnterCritical(); |
17916 | 17560 | ||
17917 | iop_base = asc_dvc->iop_base; | 17561 | iop_base = asc_dvc->iop_base; |
17918 | 17562 | ||
17919 | /* | 17563 | /* |
17920 | * Clear the idle command status which is set by the microcode | 17564 | * Clear the idle command status which is set by the microcode |
17921 | * to a non-zero value to indicate when the command is completed. | 17565 | * to a non-zero value to indicate when the command is completed. |
17922 | * The non-zero result is one of the IDLE_CMD_STATUS_* values | 17566 | * The non-zero result is one of the IDLE_CMD_STATUS_* values |
17923 | * defined in a_advlib.h. | 17567 | * defined in a_advlib.h. |
17924 | */ | 17568 | */ |
17925 | AdvWriteWordLram(iop_base, ASC_MC_IDLE_CMD_STATUS, (ushort) 0); | 17569 | AdvWriteWordLram(iop_base, ASC_MC_IDLE_CMD_STATUS, (ushort)0); |
17926 | 17570 | ||
17927 | /* | 17571 | /* |
17928 | * Write the idle command value after the idle command parameter | 17572 | * Write the idle command value after the idle command parameter |
17929 | * has been written to avoid a race condition. If the order is not | 17573 | * has been written to avoid a race condition. If the order is not |
17930 | * followed, the microcode may process the idle command before the | 17574 | * followed, the microcode may process the idle command before the |
17931 | * parameters have been written to LRAM. | 17575 | * parameters have been written to LRAM. |
17932 | */ | 17576 | */ |
17933 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IDLE_CMD_PARAMETER, | 17577 | AdvWriteDWordLramNoSwap(iop_base, ASC_MC_IDLE_CMD_PARAMETER, |
17934 | cpu_to_le32(idle_cmd_parameter)); | 17578 | cpu_to_le32(idle_cmd_parameter)); |
17935 | AdvWriteWordLram(iop_base, ASC_MC_IDLE_CMD, idle_cmd); | 17579 | AdvWriteWordLram(iop_base, ASC_MC_IDLE_CMD, idle_cmd); |
17936 | 17580 | ||
17937 | /* | 17581 | /* |
17938 | * Tickle the RISC to tell it to process the idle command. | 17582 | * Tickle the RISC to tell it to process the idle command. |
17939 | */ | 17583 | */ |
17940 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_B); | 17584 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_B); |
17941 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550) | 17585 | if (asc_dvc->chip_type == ADV_CHIP_ASC3550) { |
17942 | { | 17586 | /* |
17943 | /* | 17587 | * Clear the tickle value. In the ASC-3550 the RISC flag |
17944 | * Clear the tickle value. In the ASC-3550 the RISC flag | 17588 | * command 'clr_tickle_b' does not work unless the host |
17945 | * command 'clr_tickle_b' does not work unless the host | 17589 | * value is cleared. |
17946 | * value is cleared. | 17590 | */ |
17947 | */ | 17591 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_NOP); |
17948 | AdvWriteByteRegister(iop_base, IOPB_TICKLE, ADV_TICKLE_NOP); | 17592 | } |
17949 | } | ||
17950 | 17593 | ||
17951 | /* Wait for up to 100 millisecond for the idle command to timeout. */ | 17594 | /* Wait for up to 100 millisecond for the idle command to timeout. */ |
17952 | for (i = 0; i < SCSI_WAIT_100_MSEC; i++) | 17595 | for (i = 0; i < SCSI_WAIT_100_MSEC; i++) { |
17953 | { | 17596 | /* Poll once each microsecond for command completion. */ |
17954 | /* Poll once each microsecond for command completion. */ | 17597 | for (j = 0; j < SCSI_US_PER_MSEC; j++) { |
17955 | for (j = 0; j < SCSI_US_PER_MSEC; j++) | 17598 | AdvReadWordLram(iop_base, ASC_MC_IDLE_CMD_STATUS, |
17956 | { | 17599 | result); |
17957 | AdvReadWordLram(iop_base, ASC_MC_IDLE_CMD_STATUS, result); | 17600 | if (result != 0) { |
17958 | if (result != 0) | 17601 | DvcLeaveCritical(last_int_level); |
17959 | { | 17602 | return result; |
17960 | DvcLeaveCritical(last_int_level); | 17603 | } |
17961 | return result; | 17604 | DvcDelayMicroSecond(asc_dvc, (ushort)1); |
17962 | } | 17605 | } |
17963 | DvcDelayMicroSecond(asc_dvc, (ushort) 1); | 17606 | } |
17964 | } | ||
17965 | } | ||
17966 | 17607 | ||
17967 | ASC_ASSERT(0); /* The idle command should never timeout. */ | 17608 | ASC_ASSERT(0); /* The idle command should never timeout. */ |
17968 | DvcLeaveCritical(last_int_level); | 17609 | DvcLeaveCritical(last_int_level); |
17969 | return ADV_ERROR; | 17610 | return ADV_ERROR; |
17970 | } | 17611 | } |
17971 | 17612 | ||
17972 | /* | 17613 | /* |
@@ -17976,179 +17617,1415 @@ AdvSendIdleCmd(ADV_DVC_VAR *asc_dvc, | |||
17976 | * microcode operating variables that affect WDTR, SDTR, and Tag | 17617 | * microcode operating variables that affect WDTR, SDTR, and Tag |
17977 | * Queuing. | 17618 | * Queuing. |
17978 | */ | 17619 | */ |
17979 | STATIC void | 17620 | static void AdvInquiryHandling(ADV_DVC_VAR *asc_dvc, ADV_SCSI_REQ_Q *scsiq) |
17980 | AdvInquiryHandling( | ||
17981 | ADV_DVC_VAR *asc_dvc, | ||
17982 | ADV_SCSI_REQ_Q *scsiq) | ||
17983 | { | 17621 | { |
17984 | AdvPortAddr iop_base; | 17622 | AdvPortAddr iop_base; |
17985 | uchar tid; | 17623 | uchar tid; |
17986 | ADV_SCSI_INQUIRY *inq; | 17624 | ADV_SCSI_INQUIRY *inq; |
17987 | ushort tidmask; | 17625 | ushort tidmask; |
17988 | ushort cfg_word; | 17626 | ushort cfg_word; |
17627 | |||
17628 | /* | ||
17629 | * AdvInquiryHandling() requires up to INQUIRY information Byte 7 | ||
17630 | * to be available. | ||
17631 | * | ||
17632 | * If less than 8 bytes of INQUIRY information were requested or less | ||
17633 | * than 8 bytes were transferred, then return. cdb[4] is the request | ||
17634 | * length and the ADV_SCSI_REQ_Q 'data_cnt' field is set by the | ||
17635 | * microcode to the transfer residual count. | ||
17636 | */ | ||
17637 | |||
17638 | if (scsiq->cdb[4] < 8 || | ||
17639 | (scsiq->cdb[4] - le32_to_cpu(scsiq->data_cnt)) < 8) { | ||
17640 | return; | ||
17641 | } | ||
17989 | 17642 | ||
17990 | /* | 17643 | iop_base = asc_dvc->iop_base; |
17991 | * AdvInquiryHandling() requires up to INQUIRY information Byte 7 | 17644 | tid = scsiq->target_id; |
17992 | * to be available. | ||
17993 | * | ||
17994 | * If less than 8 bytes of INQUIRY information were requested or less | ||
17995 | * than 8 bytes were transferred, then return. cdb[4] is the request | ||
17996 | * length and the ADV_SCSI_REQ_Q 'data_cnt' field is set by the | ||
17997 | * microcode to the transfer residual count. | ||
17998 | */ | ||
17999 | |||
18000 | if (scsiq->cdb[4] < 8 || | ||
18001 | (scsiq->cdb[4] - le32_to_cpu(scsiq->data_cnt)) < 8) | ||
18002 | { | ||
18003 | return; | ||
18004 | } | ||
18005 | 17645 | ||
18006 | iop_base = asc_dvc->iop_base; | 17646 | inq = (ADV_SCSI_INQUIRY *) scsiq->vdata_addr; |
18007 | tid = scsiq->target_id; | ||
18008 | 17647 | ||
18009 | inq = (ADV_SCSI_INQUIRY *) scsiq->vdata_addr; | 17648 | /* |
17649 | * WDTR, SDTR, and Tag Queuing cannot be enabled for old devices. | ||
17650 | */ | ||
17651 | if (ADV_INQ_RESPONSE_FMT(inq) < 2 && ADV_INQ_ANSI_VER(inq) < 2) { | ||
17652 | return; | ||
17653 | } else { | ||
17654 | /* | ||
17655 | * INQUIRY Byte 7 Handling | ||
17656 | * | ||
17657 | * Use a device's INQUIRY byte 7 to determine whether it | ||
17658 | * supports WDTR, SDTR, and Tag Queuing. If the feature | ||
17659 | * is enabled in the EEPROM and the device supports the | ||
17660 | * feature, then enable it in the microcode. | ||
17661 | */ | ||
18010 | 17662 | ||
18011 | /* | 17663 | tidmask = ADV_TID_TO_TIDMASK(tid); |
18012 | * WDTR, SDTR, and Tag Queuing cannot be enabled for old devices. | 17664 | |
18013 | */ | 17665 | /* |
18014 | if (ADV_INQ_RESPONSE_FMT(inq) < 2 && ADV_INQ_ANSI_VER(inq) < 2) | 17666 | * Wide Transfers |
18015 | { | 17667 | * |
18016 | return; | 17668 | * If the EEPROM enabled WDTR for the device and the device |
18017 | } else | 17669 | * supports wide bus (16 bit) transfers, then turn on the |
18018 | { | 17670 | * device's 'wdtr_able' bit and write the new value to the |
18019 | /* | 17671 | * microcode. |
18020 | * INQUIRY Byte 7 Handling | 17672 | */ |
18021 | * | 17673 | if ((asc_dvc->wdtr_able & tidmask) && ADV_INQ_WIDE16(inq)) { |
18022 | * Use a device's INQUIRY byte 7 to determine whether it | 17674 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, cfg_word); |
18023 | * supports WDTR, SDTR, and Tag Queuing. If the feature | 17675 | if ((cfg_word & tidmask) == 0) { |
18024 | * is enabled in the EEPROM and the device supports the | 17676 | cfg_word |= tidmask; |
18025 | * feature, then enable it in the microcode. | 17677 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, |
18026 | */ | 17678 | cfg_word); |
18027 | 17679 | ||
18028 | tidmask = ADV_TID_TO_TIDMASK(tid); | 17680 | /* |
18029 | 17681 | * Clear the microcode "SDTR negotiation" and "WDTR | |
18030 | /* | 17682 | * negotiation" done indicators for the target to cause |
18031 | * Wide Transfers | 17683 | * it to negotiate with the new setting set above. |
18032 | * | 17684 | * WDTR when accepted causes the target to enter |
18033 | * If the EEPROM enabled WDTR for the device and the device | 17685 | * asynchronous mode, so SDTR must be negotiated. |
18034 | * supports wide bus (16 bit) transfers, then turn on the | 17686 | */ |
18035 | * device's 'wdtr_able' bit and write the new value to the | 17687 | AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, |
18036 | * microcode. | 17688 | cfg_word); |
18037 | */ | 17689 | cfg_word &= ~tidmask; |
18038 | if ((asc_dvc->wdtr_able & tidmask) && ADV_INQ_WIDE16(inq)) | 17690 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_DONE, |
18039 | { | 17691 | cfg_word); |
18040 | AdvReadWordLram(iop_base, ASC_MC_WDTR_ABLE, cfg_word); | 17692 | AdvReadWordLram(iop_base, ASC_MC_WDTR_DONE, |
18041 | if ((cfg_word & tidmask) == 0) | 17693 | cfg_word); |
18042 | { | 17694 | cfg_word &= ~tidmask; |
18043 | cfg_word |= tidmask; | 17695 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_DONE, |
18044 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_ABLE, cfg_word); | 17696 | cfg_word); |
18045 | 17697 | } | |
18046 | /* | 17698 | } |
18047 | * Clear the microcode "SDTR negotiation" and "WDTR | 17699 | |
18048 | * negotiation" done indicators for the target to cause | 17700 | /* |
18049 | * it to negotiate with the new setting set above. | 17701 | * Synchronous Transfers |
18050 | * WDTR when accepted causes the target to enter | 17702 | * |
18051 | * asynchronous mode, so SDTR must be negotiated. | 17703 | * If the EEPROM enabled SDTR for the device and the device |
18052 | */ | 17704 | * supports synchronous transfers, then turn on the device's |
18053 | AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word); | 17705 | * 'sdtr_able' bit. Write the new value to the microcode. |
18054 | cfg_word &= ~tidmask; | 17706 | */ |
18055 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word); | 17707 | if ((asc_dvc->sdtr_able & tidmask) && ADV_INQ_SYNC(inq)) { |
18056 | AdvReadWordLram(iop_base, ASC_MC_WDTR_DONE, cfg_word); | 17708 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, cfg_word); |
18057 | cfg_word &= ~tidmask; | 17709 | if ((cfg_word & tidmask) == 0) { |
18058 | AdvWriteWordLram(iop_base, ASC_MC_WDTR_DONE, cfg_word); | 17710 | cfg_word |= tidmask; |
18059 | } | 17711 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, |
18060 | } | 17712 | cfg_word); |
18061 | 17713 | ||
18062 | /* | 17714 | /* |
18063 | * Synchronous Transfers | 17715 | * Clear the microcode "SDTR negotiation" done indicator |
18064 | * | 17716 | * for the target to cause it to negotiate with the new |
18065 | * If the EEPROM enabled SDTR for the device and the device | 17717 | * setting set above. |
18066 | * supports synchronous transfers, then turn on the device's | 17718 | */ |
18067 | * 'sdtr_able' bit. Write the new value to the microcode. | 17719 | AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, |
18068 | */ | 17720 | cfg_word); |
18069 | if ((asc_dvc->sdtr_able & tidmask) && ADV_INQ_SYNC(inq)) | 17721 | cfg_word &= ~tidmask; |
18070 | { | 17722 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_DONE, |
18071 | AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, cfg_word); | 17723 | cfg_word); |
18072 | if ((cfg_word & tidmask) == 0) | 17724 | } |
18073 | { | 17725 | } |
18074 | cfg_word |= tidmask; | 17726 | /* |
18075 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, cfg_word); | 17727 | * If the Inquiry data included enough space for the SPI-3 |
18076 | 17728 | * Clocking field, then check if DT mode is supported. | |
18077 | /* | 17729 | */ |
18078 | * Clear the microcode "SDTR negotiation" done indicator | 17730 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600 && |
18079 | * for the target to cause it to negotiate with the new | 17731 | (scsiq->cdb[4] >= 57 || |
18080 | * setting set above. | 17732 | (scsiq->cdb[4] - le32_to_cpu(scsiq->data_cnt)) >= 57)) { |
18081 | */ | 17733 | /* |
18082 | AdvReadWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word); | 17734 | * PPR (Parallel Protocol Request) Capable |
18083 | cfg_word &= ~tidmask; | 17735 | * |
18084 | AdvWriteWordLram(iop_base, ASC_MC_SDTR_DONE, cfg_word); | 17736 | * If the device supports DT mode, then it must be PPR capable. |
18085 | } | 17737 | * The PPR message will be used in place of the SDTR and WDTR |
18086 | } | 17738 | * messages to negotiate synchronous speed and offset, transfer |
18087 | /* | 17739 | * width, and protocol options. |
18088 | * If the Inquiry data included enough space for the SPI-3 | 17740 | */ |
18089 | * Clocking field, then check if DT mode is supported. | 17741 | if (ADV_INQ_CLOCKING(inq) & ADV_INQ_CLOCKING_DT_ONLY) { |
18090 | */ | 17742 | AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, |
18091 | if (asc_dvc->chip_type == ADV_CHIP_ASC38C1600 && | 17743 | asc_dvc->ppr_able); |
18092 | (scsiq->cdb[4] >= 57 || | 17744 | asc_dvc->ppr_able |= tidmask; |
18093 | (scsiq->cdb[4] - le32_to_cpu(scsiq->data_cnt)) >= 57)) | 17745 | AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, |
18094 | { | 17746 | asc_dvc->ppr_able); |
18095 | /* | 17747 | } |
18096 | * PPR (Parallel Protocol Request) Capable | 17748 | } |
18097 | * | 17749 | |
18098 | * If the device supports DT mode, then it must be PPR capable. | 17750 | /* |
18099 | * The PPR message will be used in place of the SDTR and WDTR | 17751 | * If the EEPROM enabled Tag Queuing for the device and the |
18100 | * messages to negotiate synchronous speed and offset, transfer | 17752 | * device supports Tag Queueing, then turn on the device's |
18101 | * width, and protocol options. | 17753 | * 'tagqng_enable' bit in the microcode and set the microcode |
18102 | */ | 17754 | * maximum command count to the ADV_DVC_VAR 'max_dvc_qng' |
18103 | if (ADV_INQ_CLOCKING(inq) & ADV_INQ_CLOCKING_DT_ONLY) | 17755 | * value. |
18104 | { | 17756 | * |
18105 | AdvReadWordLram(iop_base, ASC_MC_PPR_ABLE, asc_dvc->ppr_able); | 17757 | * Tag Queuing is disabled for the BIOS which runs in polled |
18106 | asc_dvc->ppr_able |= tidmask; | 17758 | * mode and would see no benefit from Tag Queuing. Also by |
18107 | AdvWriteWordLram(iop_base, ASC_MC_PPR_ABLE, asc_dvc->ppr_able); | 17759 | * disabling Tag Queuing in the BIOS devices with Tag Queuing |
18108 | } | 17760 | * bugs will at least work with the BIOS. |
18109 | } | 17761 | */ |
18110 | 17762 | if ((asc_dvc->tagqng_able & tidmask) && ADV_INQ_CMD_QUEUE(inq)) { | |
18111 | /* | 17763 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, cfg_word); |
18112 | * If the EEPROM enabled Tag Queuing for the device and the | 17764 | cfg_word |= tidmask; |
18113 | * device supports Tag Queueing, then turn on the device's | 17765 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, |
18114 | * 'tagqng_enable' bit in the microcode and set the microcode | 17766 | cfg_word); |
18115 | * maximum command count to the ADV_DVC_VAR 'max_dvc_qng' | 17767 | |
18116 | * value. | 17768 | AdvWriteByteLram(iop_base, |
18117 | * | 17769 | ASC_MC_NUMBER_OF_MAX_CMD + tid, |
18118 | * Tag Queuing is disabled for the BIOS which runs in polled | 17770 | asc_dvc->max_dvc_qng); |
18119 | * mode and would see no benefit from Tag Queuing. Also by | 17771 | } |
18120 | * disabling Tag Queuing in the BIOS devices with Tag Queuing | 17772 | } |
18121 | * bugs will at least work with the BIOS. | ||
18122 | */ | ||
18123 | if ((asc_dvc->tagqng_able & tidmask) && ADV_INQ_CMD_QUEUE(inq)) | ||
18124 | { | ||
18125 | AdvReadWordLram(iop_base, ASC_MC_TAGQNG_ABLE, cfg_word); | ||
18126 | cfg_word |= tidmask; | ||
18127 | AdvWriteWordLram(iop_base, ASC_MC_TAGQNG_ABLE, cfg_word); | ||
18128 | |||
18129 | AdvWriteByteLram(iop_base, ASC_MC_NUMBER_OF_MAX_CMD + tid, | ||
18130 | asc_dvc->max_dvc_qng); | ||
18131 | } | ||
18132 | } | ||
18133 | } | 17773 | } |
17774 | |||
18134 | MODULE_LICENSE("Dual BSD/GPL"); | 17775 | MODULE_LICENSE("Dual BSD/GPL"); |
18135 | 17776 | ||
17777 | static struct Scsi_Host *__devinit | ||
17778 | advansys_board_found(int iop, struct device *dev, int bus_type) | ||
17779 | { | ||
17780 | struct Scsi_Host *shost; | ||
17781 | struct pci_dev *pdev = bus_type == ASC_IS_PCI ? to_pci_dev(dev) : NULL; | ||
17782 | asc_board_t *boardp; | ||
17783 | ASC_DVC_VAR *asc_dvc_varp = NULL; | ||
17784 | ADV_DVC_VAR *adv_dvc_varp = NULL; | ||
17785 | adv_sgblk_t *sgp = NULL; | ||
17786 | int share_irq = FALSE; | ||
17787 | int iolen = 0; | ||
17788 | ADV_PADDR pci_memory_address; | ||
17789 | int warn_code, err_code; | ||
17790 | int ret; | ||
17791 | |||
17792 | /* | ||
17793 | * Adapter found. | ||
17794 | * | ||
17795 | * Register the adapter, get its configuration, and | ||
17796 | * initialize it. | ||
17797 | */ | ||
17798 | ASC_DBG(2, "advansys_board_found: scsi_register()\n"); | ||
17799 | shost = scsi_register(&driver_template, sizeof(asc_board_t)); | ||
17800 | |||
17801 | if (!shost) | ||
17802 | return NULL; | ||
17803 | |||
17804 | /* Save a pointer to the Scsi_Host of each board found. */ | ||
17805 | asc_host[asc_board_count++] = shost; | ||
17806 | |||
17807 | /* Initialize private per board data */ | ||
17808 | boardp = ASC_BOARDP(shost); | ||
17809 | memset(boardp, 0, sizeof(asc_board_t)); | ||
17810 | boardp->id = asc_board_count - 1; | ||
17811 | |||
17812 | /* Initialize spinlock. */ | ||
17813 | spin_lock_init(&boardp->lock); | ||
17814 | |||
17815 | /* | ||
17816 | * Handle both narrow and wide boards. | ||
17817 | * | ||
17818 | * If a Wide board was detected, set the board structure | ||
17819 | * wide board flag. Set-up the board structure based on | ||
17820 | * the board type. | ||
17821 | */ | ||
17822 | #ifdef CONFIG_PCI | ||
17823 | if (bus_type == ASC_IS_PCI && | ||
17824 | (pdev->device == PCI_DEVICE_ID_ASP_ABP940UW || | ||
17825 | pdev->device == PCI_DEVICE_ID_38C0800_REV1 || | ||
17826 | pdev->device == PCI_DEVICE_ID_38C1600_REV1)) { | ||
17827 | boardp->flags |= ASC_IS_WIDE_BOARD; | ||
17828 | } | ||
17829 | #endif /* CONFIG_PCI */ | ||
17830 | |||
17831 | if (ASC_NARROW_BOARD(boardp)) { | ||
17832 | ASC_DBG(1, "advansys_board_found: narrow board\n"); | ||
17833 | asc_dvc_varp = &boardp->dvc_var.asc_dvc_var; | ||
17834 | asc_dvc_varp->bus_type = bus_type; | ||
17835 | asc_dvc_varp->drv_ptr = boardp; | ||
17836 | asc_dvc_varp->cfg = &boardp->dvc_cfg.asc_dvc_cfg; | ||
17837 | asc_dvc_varp->cfg->overrun_buf = &overrun_buf[0]; | ||
17838 | asc_dvc_varp->iop_base = iop; | ||
17839 | asc_dvc_varp->isr_callback = asc_isr_callback; | ||
17840 | } else { | ||
17841 | ASC_DBG(1, "advansys_board_found: wide board\n"); | ||
17842 | adv_dvc_varp = &boardp->dvc_var.adv_dvc_var; | ||
17843 | adv_dvc_varp->drv_ptr = boardp; | ||
17844 | adv_dvc_varp->cfg = &boardp->dvc_cfg.adv_dvc_cfg; | ||
17845 | adv_dvc_varp->isr_callback = adv_isr_callback; | ||
17846 | adv_dvc_varp->async_callback = adv_async_callback; | ||
17847 | #ifdef CONFIG_PCI | ||
17848 | if (pdev->device == PCI_DEVICE_ID_ASP_ABP940UW) { | ||
17849 | ASC_DBG(1, "advansys_board_found: ASC-3550\n"); | ||
17850 | adv_dvc_varp->chip_type = ADV_CHIP_ASC3550; | ||
17851 | } else if (pdev->device == PCI_DEVICE_ID_38C0800_REV1) { | ||
17852 | ASC_DBG(1, "advansys_board_found: ASC-38C0800\n"); | ||
17853 | adv_dvc_varp->chip_type = ADV_CHIP_ASC38C0800; | ||
17854 | } else { | ||
17855 | ASC_DBG(1, "advansys_board_found: ASC-38C1600\n"); | ||
17856 | adv_dvc_varp->chip_type = ADV_CHIP_ASC38C1600; | ||
17857 | } | ||
17858 | #endif /* CONFIG_PCI */ | ||
17859 | |||
17860 | /* | ||
17861 | * Map the board's registers into virtual memory for | ||
17862 | * PCI slave access. Only memory accesses are used to | ||
17863 | * access the board's registers. | ||
17864 | * | ||
17865 | * Note: The PCI register base address is not always | ||
17866 | * page aligned, but the address passed to ioremap() | ||
17867 | * must be page aligned. It is guaranteed that the | ||
17868 | * PCI register base address will not cross a page | ||
17869 | * boundary. | ||
17870 | */ | ||
17871 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { | ||
17872 | iolen = ADV_3550_IOLEN; | ||
17873 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { | ||
17874 | iolen = ADV_38C0800_IOLEN; | ||
17875 | } else { | ||
17876 | iolen = ADV_38C1600_IOLEN; | ||
17877 | } | ||
17878 | #ifdef CONFIG_PCI | ||
17879 | pci_memory_address = pci_resource_start(pdev, 1); | ||
17880 | ASC_DBG1(1, | ||
17881 | "advansys_board_found: pci_memory_address: 0x%lx\n", | ||
17882 | (ulong)pci_memory_address); | ||
17883 | if ((boardp->ioremap_addr = | ||
17884 | ioremap(pci_memory_address & PAGE_MASK, PAGE_SIZE)) == 0) { | ||
17885 | ASC_PRINT3 | ||
17886 | ("advansys_board_found: board %d: ioremap(%x, %d) returned NULL\n", | ||
17887 | boardp->id, pci_memory_address, iolen); | ||
17888 | scsi_unregister(shost); | ||
17889 | asc_board_count--; | ||
17890 | return NULL; | ||
17891 | } | ||
17892 | ASC_DBG1(1, | ||
17893 | "advansys_board_found: ioremap_addr: 0x%lx\n", | ||
17894 | (ulong)boardp->ioremap_addr); | ||
17895 | adv_dvc_varp->iop_base = (AdvPortAddr) | ||
17896 | (boardp->ioremap_addr + | ||
17897 | (pci_memory_address - (pci_memory_address & PAGE_MASK))); | ||
17898 | ASC_DBG1(1, | ||
17899 | "advansys_board_found: iop_base: 0x%lx\n", | ||
17900 | adv_dvc_varp->iop_base); | ||
17901 | #endif /* CONFIG_PCI */ | ||
17902 | |||
17903 | /* | ||
17904 | * Even though it isn't used to access wide boards, other | ||
17905 | * than for the debug line below, save I/O Port address so | ||
17906 | * that it can be reported. | ||
17907 | */ | ||
17908 | boardp->ioport = iop; | ||
17909 | |||
17910 | ASC_DBG2(1, | ||
17911 | "advansys_board_found: iopb_chip_id_1 0x%x, iopw_chip_id_0 0x%x\n", | ||
17912 | (ushort)inp(iop + 1), (ushort)inpw(iop)); | ||
17913 | } | ||
17914 | |||
17915 | #ifdef CONFIG_PROC_FS | ||
17916 | /* | ||
17917 | * Allocate buffer for printing information from | ||
17918 | * /proc/scsi/advansys/[0...]. | ||
17919 | */ | ||
17920 | if ((boardp->prtbuf = kmalloc(ASC_PRTBUF_SIZE, GFP_ATOMIC)) == NULL) { | ||
17921 | ASC_PRINT3 | ||
17922 | ("advansys_board_found: board %d: kmalloc(%d, %d) returned NULL\n", | ||
17923 | boardp->id, ASC_PRTBUF_SIZE, GFP_ATOMIC); | ||
17924 | scsi_unregister(shost); | ||
17925 | asc_board_count--; | ||
17926 | return NULL; | ||
17927 | } | ||
17928 | #endif /* CONFIG_PROC_FS */ | ||
17929 | |||
17930 | if (ASC_NARROW_BOARD(boardp)) { | ||
17931 | asc_dvc_varp->cfg->dev = dev; | ||
17932 | /* | ||
17933 | * Set the board bus type and PCI IRQ before | ||
17934 | * calling AscInitGetConfig(). | ||
17935 | */ | ||
17936 | switch (asc_dvc_varp->bus_type) { | ||
17937 | #ifdef CONFIG_ISA | ||
17938 | case ASC_IS_ISA: | ||
17939 | shost->unchecked_isa_dma = TRUE; | ||
17940 | share_irq = FALSE; | ||
17941 | break; | ||
17942 | case ASC_IS_VL: | ||
17943 | shost->unchecked_isa_dma = FALSE; | ||
17944 | share_irq = FALSE; | ||
17945 | break; | ||
17946 | case ASC_IS_EISA: | ||
17947 | shost->unchecked_isa_dma = FALSE; | ||
17948 | share_irq = TRUE; | ||
17949 | break; | ||
17950 | #endif /* CONFIG_ISA */ | ||
17951 | #ifdef CONFIG_PCI | ||
17952 | case ASC_IS_PCI: | ||
17953 | shost->irq = asc_dvc_varp->irq_no = pdev->irq; | ||
17954 | asc_dvc_varp->cfg->pci_slot_info = | ||
17955 | ASC_PCI_MKID(pdev->bus->number, | ||
17956 | PCI_SLOT(pdev->devfn), | ||
17957 | PCI_FUNC(pdev->devfn)); | ||
17958 | shost->unchecked_isa_dma = FALSE; | ||
17959 | share_irq = TRUE; | ||
17960 | break; | ||
17961 | #endif /* CONFIG_PCI */ | ||
17962 | default: | ||
17963 | ASC_PRINT2 | ||
17964 | ("advansys_board_found: board %d: unknown adapter type: %d\n", | ||
17965 | boardp->id, asc_dvc_varp->bus_type); | ||
17966 | shost->unchecked_isa_dma = TRUE; | ||
17967 | share_irq = FALSE; | ||
17968 | break; | ||
17969 | } | ||
17970 | } else { | ||
17971 | adv_dvc_varp->cfg->dev = dev; | ||
17972 | /* | ||
17973 | * For Wide boards set PCI information before calling | ||
17974 | * AdvInitGetConfig(). | ||
17975 | */ | ||
17976 | #ifdef CONFIG_PCI | ||
17977 | shost->irq = adv_dvc_varp->irq_no = pdev->irq; | ||
17978 | adv_dvc_varp->cfg->pci_slot_info = | ||
17979 | ASC_PCI_MKID(pdev->bus->number, | ||
17980 | PCI_SLOT(pdev->devfn), | ||
17981 | PCI_FUNC(pdev->devfn)); | ||
17982 | shost->unchecked_isa_dma = FALSE; | ||
17983 | share_irq = TRUE; | ||
17984 | #endif /* CONFIG_PCI */ | ||
17985 | } | ||
17986 | |||
17987 | /* | ||
17988 | * Read the board configuration. | ||
17989 | */ | ||
17990 | if (ASC_NARROW_BOARD(boardp)) { | ||
17991 | /* | ||
17992 | * NOTE: AscInitGetConfig() may change the board's | ||
17993 | * bus_type value. The bus_type value should no | ||
17994 | * longer be used. If the bus_type field must be | ||
17995 | * referenced only use the bit-wise AND operator "&". | ||
17996 | */ | ||
17997 | ASC_DBG(2, "advansys_board_found: AscInitGetConfig()\n"); | ||
17998 | switch (ret = AscInitGetConfig(asc_dvc_varp)) { | ||
17999 | case 0: /* No error */ | ||
18000 | break; | ||
18001 | case ASC_WARN_IO_PORT_ROTATE: | ||
18002 | ASC_PRINT1 | ||
18003 | ("AscInitGetConfig: board %d: I/O port address modified\n", | ||
18004 | boardp->id); | ||
18005 | break; | ||
18006 | case ASC_WARN_AUTO_CONFIG: | ||
18007 | ASC_PRINT1 | ||
18008 | ("AscInitGetConfig: board %d: I/O port increment switch enabled\n", | ||
18009 | boardp->id); | ||
18010 | break; | ||
18011 | case ASC_WARN_EEPROM_CHKSUM: | ||
18012 | ASC_PRINT1 | ||
18013 | ("AscInitGetConfig: board %d: EEPROM checksum error\n", | ||
18014 | boardp->id); | ||
18015 | break; | ||
18016 | case ASC_WARN_IRQ_MODIFIED: | ||
18017 | ASC_PRINT1 | ||
18018 | ("AscInitGetConfig: board %d: IRQ modified\n", | ||
18019 | boardp->id); | ||
18020 | break; | ||
18021 | case ASC_WARN_CMD_QNG_CONFLICT: | ||
18022 | ASC_PRINT1 | ||
18023 | ("AscInitGetConfig: board %d: tag queuing enabled w/o disconnects\n", | ||
18024 | boardp->id); | ||
18025 | break; | ||
18026 | default: | ||
18027 | ASC_PRINT2 | ||
18028 | ("AscInitGetConfig: board %d: unknown warning: 0x%x\n", | ||
18029 | boardp->id, ret); | ||
18030 | break; | ||
18031 | } | ||
18032 | if ((err_code = asc_dvc_varp->err_code) != 0) { | ||
18033 | ASC_PRINT3 | ||
18034 | ("AscInitGetConfig: board %d error: init_state 0x%x, err_code 0x%x\n", | ||
18035 | boardp->id, | ||
18036 | asc_dvc_varp->init_state, asc_dvc_varp->err_code); | ||
18037 | } | ||
18038 | } else { | ||
18039 | ASC_DBG(2, "advansys_board_found: AdvInitGetConfig()\n"); | ||
18040 | if ((ret = AdvInitGetConfig(adv_dvc_varp)) != 0) { | ||
18041 | ASC_PRINT2 | ||
18042 | ("AdvInitGetConfig: board %d: warning: 0x%x\n", | ||
18043 | boardp->id, ret); | ||
18044 | } | ||
18045 | if ((err_code = adv_dvc_varp->err_code) != 0) { | ||
18046 | ASC_PRINT2 | ||
18047 | ("AdvInitGetConfig: board %d error: err_code 0x%x\n", | ||
18048 | boardp->id, adv_dvc_varp->err_code); | ||
18049 | } | ||
18050 | } | ||
18051 | |||
18052 | if (err_code != 0) { | ||
18053 | #ifdef CONFIG_PROC_FS | ||
18054 | kfree(boardp->prtbuf); | ||
18055 | #endif /* CONFIG_PROC_FS */ | ||
18056 | scsi_unregister(shost); | ||
18057 | asc_board_count--; | ||
18058 | return NULL; | ||
18059 | } | ||
18060 | |||
18061 | /* | ||
18062 | * Save the EEPROM configuration so that it can be displayed | ||
18063 | * from /proc/scsi/advansys/[0...]. | ||
18064 | */ | ||
18065 | if (ASC_NARROW_BOARD(boardp)) { | ||
18066 | |||
18067 | ASCEEP_CONFIG *ep; | ||
18068 | |||
18069 | /* | ||
18070 | * Set the adapter's target id bit in the 'init_tidmask' field. | ||
18071 | */ | ||
18072 | boardp->init_tidmask |= | ||
18073 | ADV_TID_TO_TIDMASK(asc_dvc_varp->cfg->chip_scsi_id); | ||
18074 | |||
18075 | /* | ||
18076 | * Save EEPROM settings for the board. | ||
18077 | */ | ||
18078 | ep = &boardp->eep_config.asc_eep; | ||
18079 | |||
18080 | ep->init_sdtr = asc_dvc_varp->cfg->sdtr_enable; | ||
18081 | ep->disc_enable = asc_dvc_varp->cfg->disc_enable; | ||
18082 | ep->use_cmd_qng = asc_dvc_varp->cfg->cmd_qng_enabled; | ||
18083 | ASC_EEP_SET_DMA_SPD(ep, asc_dvc_varp->cfg->isa_dma_speed); | ||
18084 | ep->start_motor = asc_dvc_varp->start_motor; | ||
18085 | ep->cntl = asc_dvc_varp->dvc_cntl; | ||
18086 | ep->no_scam = asc_dvc_varp->no_scam; | ||
18087 | ep->max_total_qng = asc_dvc_varp->max_total_qng; | ||
18088 | ASC_EEP_SET_CHIP_ID(ep, asc_dvc_varp->cfg->chip_scsi_id); | ||
18089 | /* 'max_tag_qng' is set to the same value for every device. */ | ||
18090 | ep->max_tag_qng = asc_dvc_varp->cfg->max_tag_qng[0]; | ||
18091 | ep->adapter_info[0] = asc_dvc_varp->cfg->adapter_info[0]; | ||
18092 | ep->adapter_info[1] = asc_dvc_varp->cfg->adapter_info[1]; | ||
18093 | ep->adapter_info[2] = asc_dvc_varp->cfg->adapter_info[2]; | ||
18094 | ep->adapter_info[3] = asc_dvc_varp->cfg->adapter_info[3]; | ||
18095 | ep->adapter_info[4] = asc_dvc_varp->cfg->adapter_info[4]; | ||
18096 | ep->adapter_info[5] = asc_dvc_varp->cfg->adapter_info[5]; | ||
18097 | |||
18098 | /* | ||
18099 | * Modify board configuration. | ||
18100 | */ | ||
18101 | ASC_DBG(2, "advansys_board_found: AscInitSetConfig()\n"); | ||
18102 | switch (ret = AscInitSetConfig(asc_dvc_varp)) { | ||
18103 | case 0: /* No error. */ | ||
18104 | break; | ||
18105 | case ASC_WARN_IO_PORT_ROTATE: | ||
18106 | ASC_PRINT1 | ||
18107 | ("AscInitSetConfig: board %d: I/O port address modified\n", | ||
18108 | boardp->id); | ||
18109 | break; | ||
18110 | case ASC_WARN_AUTO_CONFIG: | ||
18111 | ASC_PRINT1 | ||
18112 | ("AscInitSetConfig: board %d: I/O port increment switch enabled\n", | ||
18113 | boardp->id); | ||
18114 | break; | ||
18115 | case ASC_WARN_EEPROM_CHKSUM: | ||
18116 | ASC_PRINT1 | ||
18117 | ("AscInitSetConfig: board %d: EEPROM checksum error\n", | ||
18118 | boardp->id); | ||
18119 | break; | ||
18120 | case ASC_WARN_IRQ_MODIFIED: | ||
18121 | ASC_PRINT1 | ||
18122 | ("AscInitSetConfig: board %d: IRQ modified\n", | ||
18123 | boardp->id); | ||
18124 | break; | ||
18125 | case ASC_WARN_CMD_QNG_CONFLICT: | ||
18126 | ASC_PRINT1 | ||
18127 | ("AscInitSetConfig: board %d: tag queuing w/o disconnects\n", | ||
18128 | boardp->id); | ||
18129 | break; | ||
18130 | default: | ||
18131 | ASC_PRINT2 | ||
18132 | ("AscInitSetConfig: board %d: unknown warning: 0x%x\n", | ||
18133 | boardp->id, ret); | ||
18134 | break; | ||
18135 | } | ||
18136 | if (asc_dvc_varp->err_code != 0) { | ||
18137 | ASC_PRINT3 | ||
18138 | ("AscInitSetConfig: board %d error: init_state 0x%x, err_code 0x%x\n", | ||
18139 | boardp->id, | ||
18140 | asc_dvc_varp->init_state, asc_dvc_varp->err_code); | ||
18141 | #ifdef CONFIG_PROC_FS | ||
18142 | kfree(boardp->prtbuf); | ||
18143 | #endif /* CONFIG_PROC_FS */ | ||
18144 | scsi_unregister(shost); | ||
18145 | asc_board_count--; | ||
18146 | return NULL; | ||
18147 | } | ||
18148 | |||
18149 | /* | ||
18150 | * Finish initializing the 'Scsi_Host' structure. | ||
18151 | */ | ||
18152 | /* AscInitSetConfig() will set the IRQ for non-PCI boards. */ | ||
18153 | if ((asc_dvc_varp->bus_type & ASC_IS_PCI) == 0) { | ||
18154 | shost->irq = asc_dvc_varp->irq_no; | ||
18155 | } | ||
18156 | } else { | ||
18157 | ADVEEP_3550_CONFIG *ep_3550; | ||
18158 | ADVEEP_38C0800_CONFIG *ep_38C0800; | ||
18159 | ADVEEP_38C1600_CONFIG *ep_38C1600; | ||
18160 | |||
18161 | /* | ||
18162 | * Save Wide EEP Configuration Information. | ||
18163 | */ | ||
18164 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { | ||
18165 | ep_3550 = &boardp->eep_config.adv_3550_eep; | ||
18166 | |||
18167 | ep_3550->adapter_scsi_id = adv_dvc_varp->chip_scsi_id; | ||
18168 | ep_3550->max_host_qng = adv_dvc_varp->max_host_qng; | ||
18169 | ep_3550->max_dvc_qng = adv_dvc_varp->max_dvc_qng; | ||
18170 | ep_3550->termination = adv_dvc_varp->cfg->termination; | ||
18171 | ep_3550->disc_enable = adv_dvc_varp->cfg->disc_enable; | ||
18172 | ep_3550->bios_ctrl = adv_dvc_varp->bios_ctrl; | ||
18173 | ep_3550->wdtr_able = adv_dvc_varp->wdtr_able; | ||
18174 | ep_3550->sdtr_able = adv_dvc_varp->sdtr_able; | ||
18175 | ep_3550->ultra_able = adv_dvc_varp->ultra_able; | ||
18176 | ep_3550->tagqng_able = adv_dvc_varp->tagqng_able; | ||
18177 | ep_3550->start_motor = adv_dvc_varp->start_motor; | ||
18178 | ep_3550->scsi_reset_delay = | ||
18179 | adv_dvc_varp->scsi_reset_wait; | ||
18180 | ep_3550->serial_number_word1 = | ||
18181 | adv_dvc_varp->cfg->serial1; | ||
18182 | ep_3550->serial_number_word2 = | ||
18183 | adv_dvc_varp->cfg->serial2; | ||
18184 | ep_3550->serial_number_word3 = | ||
18185 | adv_dvc_varp->cfg->serial3; | ||
18186 | } else if (adv_dvc_varp->chip_type == ADV_CHIP_ASC38C0800) { | ||
18187 | ep_38C0800 = &boardp->eep_config.adv_38C0800_eep; | ||
18188 | |||
18189 | ep_38C0800->adapter_scsi_id = | ||
18190 | adv_dvc_varp->chip_scsi_id; | ||
18191 | ep_38C0800->max_host_qng = adv_dvc_varp->max_host_qng; | ||
18192 | ep_38C0800->max_dvc_qng = adv_dvc_varp->max_dvc_qng; | ||
18193 | ep_38C0800->termination_lvd = | ||
18194 | adv_dvc_varp->cfg->termination; | ||
18195 | ep_38C0800->disc_enable = | ||
18196 | adv_dvc_varp->cfg->disc_enable; | ||
18197 | ep_38C0800->bios_ctrl = adv_dvc_varp->bios_ctrl; | ||
18198 | ep_38C0800->wdtr_able = adv_dvc_varp->wdtr_able; | ||
18199 | ep_38C0800->tagqng_able = adv_dvc_varp->tagqng_able; | ||
18200 | ep_38C0800->sdtr_speed1 = adv_dvc_varp->sdtr_speed1; | ||
18201 | ep_38C0800->sdtr_speed2 = adv_dvc_varp->sdtr_speed2; | ||
18202 | ep_38C0800->sdtr_speed3 = adv_dvc_varp->sdtr_speed3; | ||
18203 | ep_38C0800->sdtr_speed4 = adv_dvc_varp->sdtr_speed4; | ||
18204 | ep_38C0800->tagqng_able = adv_dvc_varp->tagqng_able; | ||
18205 | ep_38C0800->start_motor = adv_dvc_varp->start_motor; | ||
18206 | ep_38C0800->scsi_reset_delay = | ||
18207 | adv_dvc_varp->scsi_reset_wait; | ||
18208 | ep_38C0800->serial_number_word1 = | ||
18209 | adv_dvc_varp->cfg->serial1; | ||
18210 | ep_38C0800->serial_number_word2 = | ||
18211 | adv_dvc_varp->cfg->serial2; | ||
18212 | ep_38C0800->serial_number_word3 = | ||
18213 | adv_dvc_varp->cfg->serial3; | ||
18214 | } else { | ||
18215 | ep_38C1600 = &boardp->eep_config.adv_38C1600_eep; | ||
18216 | |||
18217 | ep_38C1600->adapter_scsi_id = | ||
18218 | adv_dvc_varp->chip_scsi_id; | ||
18219 | ep_38C1600->max_host_qng = adv_dvc_varp->max_host_qng; | ||
18220 | ep_38C1600->max_dvc_qng = adv_dvc_varp->max_dvc_qng; | ||
18221 | ep_38C1600->termination_lvd = | ||
18222 | adv_dvc_varp->cfg->termination; | ||
18223 | ep_38C1600->disc_enable = | ||
18224 | adv_dvc_varp->cfg->disc_enable; | ||
18225 | ep_38C1600->bios_ctrl = adv_dvc_varp->bios_ctrl; | ||
18226 | ep_38C1600->wdtr_able = adv_dvc_varp->wdtr_able; | ||
18227 | ep_38C1600->tagqng_able = adv_dvc_varp->tagqng_able; | ||
18228 | ep_38C1600->sdtr_speed1 = adv_dvc_varp->sdtr_speed1; | ||
18229 | ep_38C1600->sdtr_speed2 = adv_dvc_varp->sdtr_speed2; | ||
18230 | ep_38C1600->sdtr_speed3 = adv_dvc_varp->sdtr_speed3; | ||
18231 | ep_38C1600->sdtr_speed4 = adv_dvc_varp->sdtr_speed4; | ||
18232 | ep_38C1600->tagqng_able = adv_dvc_varp->tagqng_able; | ||
18233 | ep_38C1600->start_motor = adv_dvc_varp->start_motor; | ||
18234 | ep_38C1600->scsi_reset_delay = | ||
18235 | adv_dvc_varp->scsi_reset_wait; | ||
18236 | ep_38C1600->serial_number_word1 = | ||
18237 | adv_dvc_varp->cfg->serial1; | ||
18238 | ep_38C1600->serial_number_word2 = | ||
18239 | adv_dvc_varp->cfg->serial2; | ||
18240 | ep_38C1600->serial_number_word3 = | ||
18241 | adv_dvc_varp->cfg->serial3; | ||
18242 | } | ||
18243 | |||
18244 | /* | ||
18245 | * Set the adapter's target id bit in the 'init_tidmask' field. | ||
18246 | */ | ||
18247 | boardp->init_tidmask |= | ||
18248 | ADV_TID_TO_TIDMASK(adv_dvc_varp->chip_scsi_id); | ||
18249 | |||
18250 | /* | ||
18251 | * Finish initializing the 'Scsi_Host' structure. | ||
18252 | */ | ||
18253 | shost->irq = adv_dvc_varp->irq_no; | ||
18254 | } | ||
18255 | |||
18256 | /* | ||
18257 | * Channels are numbered beginning with 0. For AdvanSys one host | ||
18258 | * structure supports one channel. Multi-channel boards have a | ||
18259 | * separate host structure for each channel. | ||
18260 | */ | ||
18261 | shost->max_channel = 0; | ||
18262 | if (ASC_NARROW_BOARD(boardp)) { | ||
18263 | shost->max_id = ASC_MAX_TID + 1; | ||
18264 | shost->max_lun = ASC_MAX_LUN + 1; | ||
18265 | |||
18266 | shost->io_port = asc_dvc_varp->iop_base; | ||
18267 | boardp->asc_n_io_port = ASC_IOADR_GAP; | ||
18268 | shost->this_id = asc_dvc_varp->cfg->chip_scsi_id; | ||
18269 | |||
18270 | /* Set maximum number of queues the adapter can handle. */ | ||
18271 | shost->can_queue = asc_dvc_varp->max_total_qng; | ||
18272 | } else { | ||
18273 | shost->max_id = ADV_MAX_TID + 1; | ||
18274 | shost->max_lun = ADV_MAX_LUN + 1; | ||
18275 | |||
18276 | /* | ||
18277 | * Save the I/O Port address and length even though | ||
18278 | * I/O ports are not used to access Wide boards. | ||
18279 | * Instead the Wide boards are accessed with | ||
18280 | * PCI Memory Mapped I/O. | ||
18281 | */ | ||
18282 | shost->io_port = iop; | ||
18283 | boardp->asc_n_io_port = iolen; | ||
18284 | |||
18285 | shost->this_id = adv_dvc_varp->chip_scsi_id; | ||
18286 | |||
18287 | /* Set maximum number of queues the adapter can handle. */ | ||
18288 | shost->can_queue = adv_dvc_varp->max_host_qng; | ||
18289 | } | ||
18290 | |||
18291 | /* | ||
18292 | * 'n_io_port' currently is one byte. | ||
18293 | * | ||
18294 | * Set a value to 'n_io_port', but never referenced it because | ||
18295 | * it may be truncated. | ||
18296 | */ | ||
18297 | shost->n_io_port = boardp->asc_n_io_port <= 255 ? | ||
18298 | boardp->asc_n_io_port : 255; | ||
18299 | |||
18300 | /* | ||
18301 | * Following v1.3.89, 'cmd_per_lun' is no longer needed | ||
18302 | * and should be set to zero. | ||
18303 | * | ||
18304 | * But because of a bug introduced in v1.3.89 if the driver is | ||
18305 | * compiled as a module and 'cmd_per_lun' is zero, the Mid-Level | ||
18306 | * SCSI function 'allocate_device' will panic. To allow the driver | ||
18307 | * to work as a module in these kernels set 'cmd_per_lun' to 1. | ||
18308 | * | ||
18309 | * Note: This is wrong. cmd_per_lun should be set to the depth | ||
18310 | * you want on untagged devices always. | ||
18311 | #ifdef MODULE | ||
18312 | */ | ||
18313 | shost->cmd_per_lun = 1; | ||
18314 | /* #else | ||
18315 | shost->cmd_per_lun = 0; | ||
18316 | #endif */ | ||
18317 | |||
18318 | /* | ||
18319 | * Set the maximum number of scatter-gather elements the | ||
18320 | * adapter can handle. | ||
18321 | */ | ||
18322 | if (ASC_NARROW_BOARD(boardp)) { | ||
18323 | /* | ||
18324 | * Allow two commands with 'sg_tablesize' scatter-gather | ||
18325 | * elements to be executed simultaneously. This value is | ||
18326 | * the theoretical hardware limit. It may be decreased | ||
18327 | * below. | ||
18328 | */ | ||
18329 | shost->sg_tablesize = | ||
18330 | (((asc_dvc_varp->max_total_qng - 2) / 2) * | ||
18331 | ASC_SG_LIST_PER_Q) + 1; | ||
18332 | } else { | ||
18333 | shost->sg_tablesize = ADV_MAX_SG_LIST; | ||
18334 | } | ||
18335 | |||
18336 | /* | ||
18337 | * The value of 'sg_tablesize' can not exceed the SCSI | ||
18338 | * mid-level driver definition of SG_ALL. SG_ALL also | ||
18339 | * must not be exceeded, because it is used to define the | ||
18340 | * size of the scatter-gather table in 'struct asc_sg_head'. | ||
18341 | */ | ||
18342 | if (shost->sg_tablesize > SG_ALL) { | ||
18343 | shost->sg_tablesize = SG_ALL; | ||
18344 | } | ||
18345 | |||
18346 | ASC_DBG1(1, "advansys_board_found: sg_tablesize: %d\n", shost->sg_tablesize); | ||
18347 | |||
18348 | /* BIOS start address. */ | ||
18349 | if (ASC_NARROW_BOARD(boardp)) { | ||
18350 | shost->base = ((ulong) | ||
18351 | AscGetChipBiosAddress(asc_dvc_varp-> | ||
18352 | iop_base, | ||
18353 | asc_dvc_varp->bus_type)); | ||
18354 | } else { | ||
18355 | /* | ||
18356 | * Fill-in BIOS board variables. The Wide BIOS saves | ||
18357 | * information in LRAM that is used by the driver. | ||
18358 | */ | ||
18359 | AdvReadWordLram(adv_dvc_varp->iop_base, | ||
18360 | BIOS_SIGNATURE, boardp->bios_signature); | ||
18361 | AdvReadWordLram(adv_dvc_varp->iop_base, | ||
18362 | BIOS_VERSION, boardp->bios_version); | ||
18363 | AdvReadWordLram(adv_dvc_varp->iop_base, | ||
18364 | BIOS_CODESEG, boardp->bios_codeseg); | ||
18365 | AdvReadWordLram(adv_dvc_varp->iop_base, | ||
18366 | BIOS_CODELEN, boardp->bios_codelen); | ||
18367 | |||
18368 | ASC_DBG2(1, | ||
18369 | "advansys_board_found: bios_signature 0x%x, bios_version 0x%x\n", | ||
18370 | boardp->bios_signature, boardp->bios_version); | ||
18371 | |||
18372 | ASC_DBG2(1, | ||
18373 | "advansys_board_found: bios_codeseg 0x%x, bios_codelen 0x%x\n", | ||
18374 | boardp->bios_codeseg, boardp->bios_codelen); | ||
18375 | |||
18376 | /* | ||
18377 | * If the BIOS saved a valid signature, then fill in | ||
18378 | * the BIOS code segment base address. | ||
18379 | */ | ||
18380 | if (boardp->bios_signature == 0x55AA) { | ||
18381 | /* | ||
18382 | * Convert x86 realmode code segment to a linear | ||
18383 | * address by shifting left 4. | ||
18384 | */ | ||
18385 | shost->base = ((ulong)boardp->bios_codeseg << 4); | ||
18386 | } else { | ||
18387 | shost->base = 0; | ||
18388 | } | ||
18389 | } | ||
18390 | |||
18391 | /* | ||
18392 | * Register Board Resources - I/O Port, DMA, IRQ | ||
18393 | */ | ||
18394 | |||
18395 | /* | ||
18396 | * Register I/O port range. | ||
18397 | * | ||
18398 | * For Wide boards the I/O ports are not used to access | ||
18399 | * the board, but request the region anyway. | ||
18400 | * | ||
18401 | * 'shost->n_io_port' is not referenced, because it may be truncated. | ||
18402 | */ | ||
18403 | ASC_DBG2(2, | ||
18404 | "advansys_board_found: request_region port 0x%lx, len 0x%x\n", | ||
18405 | (ulong)shost->io_port, boardp->asc_n_io_port); | ||
18406 | if (request_region(shost->io_port, boardp->asc_n_io_port, | ||
18407 | "advansys") == NULL) { | ||
18408 | ASC_PRINT3 | ||
18409 | ("advansys_board_found: board %d: request_region() failed, port 0x%lx, len 0x%x\n", | ||
18410 | boardp->id, (ulong)shost->io_port, boardp->asc_n_io_port); | ||
18411 | #ifdef CONFIG_PROC_FS | ||
18412 | kfree(boardp->prtbuf); | ||
18413 | #endif /* CONFIG_PROC_FS */ | ||
18414 | scsi_unregister(shost); | ||
18415 | asc_board_count--; | ||
18416 | return NULL; | ||
18417 | } | ||
18418 | |||
18419 | /* Register DMA Channel for Narrow boards. */ | ||
18420 | shost->dma_channel = NO_ISA_DMA; /* Default to no ISA DMA. */ | ||
18421 | #ifdef CONFIG_ISA | ||
18422 | if (ASC_NARROW_BOARD(boardp)) { | ||
18423 | /* Register DMA channel for ISA bus. */ | ||
18424 | if (asc_dvc_varp->bus_type & ASC_IS_ISA) { | ||
18425 | shost->dma_channel = asc_dvc_varp->cfg->isa_dma_channel; | ||
18426 | if ((ret = | ||
18427 | request_dma(shost->dma_channel, "advansys")) != 0) { | ||
18428 | ASC_PRINT3 | ||
18429 | ("advansys_board_found: board %d: request_dma() %d failed %d\n", | ||
18430 | boardp->id, shost->dma_channel, ret); | ||
18431 | release_region(shost->io_port, | ||
18432 | boardp->asc_n_io_port); | ||
18433 | #ifdef CONFIG_PROC_FS | ||
18434 | kfree(boardp->prtbuf); | ||
18435 | #endif /* CONFIG_PROC_FS */ | ||
18436 | scsi_unregister(shost); | ||
18437 | asc_board_count--; | ||
18438 | return NULL; | ||
18439 | } | ||
18440 | AscEnableIsaDma(shost->dma_channel); | ||
18441 | } | ||
18442 | } | ||
18443 | #endif /* CONFIG_ISA */ | ||
18444 | |||
18445 | /* Register IRQ Number. */ | ||
18446 | ASC_DBG1(2, "advansys_board_found: request_irq() %d\n", shost->irq); | ||
18447 | /* | ||
18448 | * If request_irq() fails with the IRQF_DISABLED flag set, | ||
18449 | * then try again without the IRQF_DISABLED flag set. This | ||
18450 | * allows IRQ sharing to work even with other drivers that | ||
18451 | * do not set the IRQF_DISABLED flag. | ||
18452 | * | ||
18453 | * If IRQF_DISABLED is not set, then interrupts are enabled | ||
18454 | * before the driver interrupt function is called. | ||
18455 | */ | ||
18456 | if (((ret = request_irq(shost->irq, advansys_interrupt, | ||
18457 | IRQF_DISABLED | (share_irq == | ||
18458 | TRUE ? | ||
18459 | IRQF_SHARED : | ||
18460 | 0), "advansys", boardp)) != 0) | ||
18461 | && | ||
18462 | ((ret = | ||
18463 | request_irq(shost->irq, advansys_interrupt, | ||
18464 | (share_irq == TRUE ? IRQF_SHARED : 0), | ||
18465 | "advansys", boardp)) != 0)) { | ||
18466 | if (ret == -EBUSY) { | ||
18467 | ASC_PRINT2 | ||
18468 | ("advansys_board_found: board %d: request_irq(): IRQ 0x%x already in use.\n", | ||
18469 | boardp->id, shost->irq); | ||
18470 | } else if (ret == -EINVAL) { | ||
18471 | ASC_PRINT2 | ||
18472 | ("advansys_board_found: board %d: request_irq(): IRQ 0x%x not valid.\n", | ||
18473 | boardp->id, shost->irq); | ||
18474 | } else { | ||
18475 | ASC_PRINT3 | ||
18476 | ("advansys_board_found: board %d: request_irq(): IRQ 0x%x failed with %d\n", | ||
18477 | boardp->id, shost->irq, ret); | ||
18478 | } | ||
18479 | release_region(shost->io_port, boardp->asc_n_io_port); | ||
18480 | iounmap(boardp->ioremap_addr); | ||
18481 | if (shost->dma_channel != NO_ISA_DMA) { | ||
18482 | free_dma(shost->dma_channel); | ||
18483 | } | ||
18484 | #ifdef CONFIG_PROC_FS | ||
18485 | kfree(boardp->prtbuf); | ||
18486 | #endif /* CONFIG_PROC_FS */ | ||
18487 | scsi_unregister(shost); | ||
18488 | asc_board_count--; | ||
18489 | return NULL; | ||
18490 | } | ||
18491 | |||
18492 | /* | ||
18493 | * Initialize board RISC chip and enable interrupts. | ||
18494 | */ | ||
18495 | if (ASC_NARROW_BOARD(boardp)) { | ||
18496 | ASC_DBG(2, "advansys_board_found: AscInitAsc1000Driver()\n"); | ||
18497 | warn_code = AscInitAsc1000Driver(asc_dvc_varp); | ||
18498 | err_code = asc_dvc_varp->err_code; | ||
18499 | |||
18500 | if (warn_code || err_code) { | ||
18501 | ASC_PRINT4 | ||
18502 | ("advansys_board_found: board %d error: init_state 0x%x, warn 0x%x, error 0x%x\n", | ||
18503 | boardp->id, | ||
18504 | asc_dvc_varp->init_state, warn_code, err_code); | ||
18505 | } | ||
18506 | } else { | ||
18507 | ADV_CARR_T *carrp; | ||
18508 | int req_cnt = 0; | ||
18509 | adv_req_t *reqp = NULL; | ||
18510 | int sg_cnt = 0; | ||
18511 | |||
18512 | /* | ||
18513 | * Allocate buffer carrier structures. The total size | ||
18514 | * is about 4 KB, so allocate all at once. | ||
18515 | */ | ||
18516 | carrp = (ADV_CARR_T *) kmalloc(ADV_CARRIER_BUFSIZE, GFP_ATOMIC); | ||
18517 | ASC_DBG1(1, "advansys_board_found: carrp 0x%lx\n", (ulong)carrp); | ||
18518 | |||
18519 | if (carrp == NULL) { | ||
18520 | goto kmalloc_error; | ||
18521 | } | ||
18522 | |||
18523 | /* | ||
18524 | * Allocate up to 'max_host_qng' request structures for | ||
18525 | * the Wide board. The total size is about 16 KB, so | ||
18526 | * allocate all at once. If the allocation fails decrement | ||
18527 | * and try again. | ||
18528 | */ | ||
18529 | for (req_cnt = adv_dvc_varp->max_host_qng; | ||
18530 | req_cnt > 0; req_cnt--) { | ||
18531 | |||
18532 | reqp = (adv_req_t *) | ||
18533 | kmalloc(sizeof(adv_req_t) * req_cnt, GFP_ATOMIC); | ||
18534 | |||
18535 | ASC_DBG3(1, | ||
18536 | "advansys_board_found: reqp 0x%lx, req_cnt %d, bytes %lu\n", | ||
18537 | (ulong)reqp, req_cnt, | ||
18538 | (ulong)sizeof(adv_req_t) * req_cnt); | ||
18539 | |||
18540 | if (reqp != NULL) { | ||
18541 | break; | ||
18542 | } | ||
18543 | } | ||
18544 | if (reqp == NULL) { | ||
18545 | goto kmalloc_error; | ||
18546 | } | ||
18547 | |||
18548 | /* | ||
18549 | * Allocate up to ADV_TOT_SG_BLOCK request structures for | ||
18550 | * the Wide board. Each structure is about 136 bytes. | ||
18551 | */ | ||
18552 | boardp->adv_sgblkp = NULL; | ||
18553 | for (sg_cnt = 0; sg_cnt < ADV_TOT_SG_BLOCK; sg_cnt++) { | ||
18554 | |||
18555 | sgp = (adv_sgblk_t *) | ||
18556 | kmalloc(sizeof(adv_sgblk_t), GFP_ATOMIC); | ||
18557 | |||
18558 | if (sgp == NULL) { | ||
18559 | break; | ||
18560 | } | ||
18561 | |||
18562 | sgp->next_sgblkp = boardp->adv_sgblkp; | ||
18563 | boardp->adv_sgblkp = sgp; | ||
18564 | |||
18565 | } | ||
18566 | ASC_DBG3(1, | ||
18567 | "advansys_board_found: sg_cnt %d * %u = %u bytes\n", | ||
18568 | sg_cnt, sizeof(adv_sgblk_t), | ||
18569 | (unsigned)(sizeof(adv_sgblk_t) * sg_cnt)); | ||
18570 | |||
18571 | /* | ||
18572 | * If no request structures or scatter-gather structures could | ||
18573 | * be allocated, then return an error. Otherwise continue with | ||
18574 | * initialization. | ||
18575 | */ | ||
18576 | kmalloc_error: | ||
18577 | if (carrp == NULL) { | ||
18578 | ASC_PRINT1 | ||
18579 | ("advansys_board_found: board %d error: failed to kmalloc() carrier buffer.\n", | ||
18580 | boardp->id); | ||
18581 | err_code = ADV_ERROR; | ||
18582 | } else if (reqp == NULL) { | ||
18583 | kfree(carrp); | ||
18584 | ASC_PRINT1 | ||
18585 | ("advansys_board_found: board %d error: failed to kmalloc() adv_req_t buffer.\n", | ||
18586 | boardp->id); | ||
18587 | err_code = ADV_ERROR; | ||
18588 | } else if (boardp->adv_sgblkp == NULL) { | ||
18589 | kfree(carrp); | ||
18590 | kfree(reqp); | ||
18591 | ASC_PRINT1 | ||
18592 | ("advansys_board_found: board %d error: failed to kmalloc() adv_sgblk_t buffers.\n", | ||
18593 | boardp->id); | ||
18594 | err_code = ADV_ERROR; | ||
18595 | } else { | ||
18596 | |||
18597 | /* Save carrier buffer pointer. */ | ||
18598 | boardp->orig_carrp = carrp; | ||
18599 | |||
18600 | /* | ||
18601 | * Save original pointer for kfree() in case the | ||
18602 | * driver is built as a module and can be unloaded. | ||
18603 | */ | ||
18604 | boardp->orig_reqp = reqp; | ||
18605 | |||
18606 | adv_dvc_varp->carrier_buf = carrp; | ||
18607 | |||
18608 | /* | ||
18609 | * Point 'adv_reqp' to the request structures and | ||
18610 | * link them together. | ||
18611 | */ | ||
18612 | req_cnt--; | ||
18613 | reqp[req_cnt].next_reqp = NULL; | ||
18614 | for (; req_cnt > 0; req_cnt--) { | ||
18615 | reqp[req_cnt - 1].next_reqp = &reqp[req_cnt]; | ||
18616 | } | ||
18617 | boardp->adv_reqp = &reqp[0]; | ||
18618 | |||
18619 | if (adv_dvc_varp->chip_type == ADV_CHIP_ASC3550) { | ||
18620 | ASC_DBG(2, | ||
18621 | "advansys_board_found: AdvInitAsc3550Driver()\n"); | ||
18622 | warn_code = AdvInitAsc3550Driver(adv_dvc_varp); | ||
18623 | } else if (adv_dvc_varp->chip_type == | ||
18624 | ADV_CHIP_ASC38C0800) { | ||
18625 | ASC_DBG(2, | ||
18626 | "advansys_board_found: AdvInitAsc38C0800Driver()\n"); | ||
18627 | warn_code = | ||
18628 | AdvInitAsc38C0800Driver(adv_dvc_varp); | ||
18629 | } else { | ||
18630 | ASC_DBG(2, | ||
18631 | "advansys_board_found: AdvInitAsc38C1600Driver()\n"); | ||
18632 | warn_code = | ||
18633 | AdvInitAsc38C1600Driver(adv_dvc_varp); | ||
18634 | } | ||
18635 | err_code = adv_dvc_varp->err_code; | ||
18636 | |||
18637 | if (warn_code || err_code) { | ||
18638 | ASC_PRINT3 | ||
18639 | ("advansys_board_found: board %d error: warn 0x%x, error 0x%x\n", | ||
18640 | boardp->id, warn_code, err_code); | ||
18641 | } | ||
18642 | } | ||
18643 | } | ||
18644 | |||
18645 | if (err_code != 0) { | ||
18646 | release_region(shost->io_port, boardp->asc_n_io_port); | ||
18647 | if (ASC_WIDE_BOARD(boardp)) { | ||
18648 | iounmap(boardp->ioremap_addr); | ||
18649 | kfree(boardp->orig_carrp); | ||
18650 | boardp->orig_carrp = NULL; | ||
18651 | if (boardp->orig_reqp) { | ||
18652 | kfree(boardp->orig_reqp); | ||
18653 | boardp->orig_reqp = boardp->adv_reqp = NULL; | ||
18654 | } | ||
18655 | while ((sgp = boardp->adv_sgblkp) != NULL) { | ||
18656 | boardp->adv_sgblkp = sgp->next_sgblkp; | ||
18657 | kfree(sgp); | ||
18658 | } | ||
18659 | } | ||
18660 | if (shost->dma_channel != NO_ISA_DMA) { | ||
18661 | free_dma(shost->dma_channel); | ||
18662 | } | ||
18663 | #ifdef CONFIG_PROC_FS | ||
18664 | kfree(boardp->prtbuf); | ||
18665 | #endif /* CONFIG_PROC_FS */ | ||
18666 | free_irq(shost->irq, boardp); | ||
18667 | scsi_unregister(shost); | ||
18668 | asc_board_count--; | ||
18669 | return NULL; | ||
18670 | } | ||
18671 | ASC_DBG_PRT_SCSI_HOST(2, shost); | ||
18672 | |||
18673 | return shost; | ||
18674 | } | ||
18675 | |||
18676 | /* | ||
18677 | * advansys_detect() | ||
18678 | * | ||
18679 | * Detect function for AdvanSys adapters. | ||
18680 | * | ||
18681 | * Argument is a pointer to the host driver's scsi_hosts entry. | ||
18682 | * | ||
18683 | * Return number of adapters found. | ||
18684 | * | ||
18685 | * Note: Because this function is called during system initialization | ||
18686 | * it must not call SCSI mid-level functions including scsi_malloc() | ||
18687 | * and scsi_free(). | ||
18688 | */ | ||
18689 | static int __init advansys_detect(struct scsi_host_template *tpnt) | ||
18690 | { | ||
18691 | static int detect_called = ASC_FALSE; | ||
18692 | int iop; | ||
18693 | int bus; | ||
18694 | int ioport = 0; | ||
18695 | struct device *dev = NULL; | ||
18696 | #ifdef CONFIG_PCI | ||
18697 | int pci_init_search = 0; | ||
18698 | struct pci_dev *pci_devicep[ASC_NUM_BOARD_SUPPORTED]; | ||
18699 | int pci_card_cnt_max = 0; | ||
18700 | int pci_card_cnt = 0; | ||
18701 | struct pci_dev *pdev = NULL; | ||
18702 | int pci_device_id_cnt = 0; | ||
18703 | unsigned int pci_device_id[ASC_PCI_DEVICE_ID_CNT] = { | ||
18704 | PCI_DEVICE_ID_ASP_1200A, | ||
18705 | PCI_DEVICE_ID_ASP_ABP940, | ||
18706 | PCI_DEVICE_ID_ASP_ABP940U, | ||
18707 | PCI_DEVICE_ID_ASP_ABP940UW, | ||
18708 | PCI_DEVICE_ID_38C0800_REV1, | ||
18709 | PCI_DEVICE_ID_38C1600_REV1 | ||
18710 | }; | ||
18711 | #endif /* CONFIG_PCI */ | ||
18712 | |||
18713 | if (detect_called == ASC_FALSE) { | ||
18714 | detect_called = ASC_TRUE; | ||
18715 | } else { | ||
18716 | printk | ||
18717 | ("AdvanSys SCSI: advansys_detect() multiple calls ignored\n"); | ||
18718 | return 0; | ||
18719 | } | ||
18720 | |||
18721 | ASC_DBG(1, "advansys_detect: begin\n"); | ||
18722 | |||
18723 | asc_board_count = 0; | ||
18724 | |||
18725 | /* | ||
18726 | * If I/O port probing has been modified, then verify and | ||
18727 | * clean-up the 'asc_ioport' list. | ||
18728 | */ | ||
18729 | if (asc_iopflag == ASC_TRUE) { | ||
18730 | for (ioport = 0; ioport < ASC_NUM_IOPORT_PROBE; ioport++) { | ||
18731 | ASC_DBG2(1, "advansys_detect: asc_ioport[%d] 0x%x\n", | ||
18732 | ioport, asc_ioport[ioport]); | ||
18733 | if (asc_ioport[ioport] != 0) { | ||
18734 | for (iop = 0; iop < ASC_IOADR_TABLE_MAX_IX; | ||
18735 | iop++) { | ||
18736 | if (_asc_def_iop_base[iop] == | ||
18737 | asc_ioport[ioport]) { | ||
18738 | break; | ||
18739 | } | ||
18740 | } | ||
18741 | if (iop == ASC_IOADR_TABLE_MAX_IX) { | ||
18742 | printk | ||
18743 | ("AdvanSys SCSI: specified I/O Port 0x%X is invalid\n", | ||
18744 | asc_ioport[ioport]); | ||
18745 | asc_ioport[ioport] = 0; | ||
18746 | } | ||
18747 | } | ||
18748 | } | ||
18749 | ioport = 0; | ||
18750 | } | ||
18751 | |||
18752 | for (bus = 0; bus < ASC_NUM_BUS; bus++) { | ||
18753 | |||
18754 | ASC_DBG2(1, "advansys_detect: bus search type %d (%s)\n", | ||
18755 | bus, asc_bus_name[bus]); | ||
18756 | iop = 0; | ||
18757 | |||
18758 | while (asc_board_count < ASC_NUM_BOARD_SUPPORTED) { | ||
18759 | |||
18760 | ASC_DBG1(2, "advansys_detect: asc_board_count %d\n", | ||
18761 | asc_board_count); | ||
18762 | |||
18763 | switch (asc_bus[bus]) { | ||
18764 | case ASC_IS_ISA: | ||
18765 | case ASC_IS_VL: | ||
18766 | #ifdef CONFIG_ISA | ||
18767 | if (asc_iopflag == ASC_FALSE) { | ||
18768 | iop = | ||
18769 | AscSearchIOPortAddr(iop, | ||
18770 | asc_bus[bus]); | ||
18771 | } else { | ||
18772 | /* | ||
18773 | * ISA and VL I/O port scanning has either been | ||
18774 | * eliminated or limited to selected ports on | ||
18775 | * the LILO command line, /etc/lilo.conf, or | ||
18776 | * by setting variables when the module was loaded. | ||
18777 | */ | ||
18778 | ASC_DBG(1, | ||
18779 | "advansys_detect: I/O port scanning modified\n"); | ||
18780 | ioport_try_again: | ||
18781 | iop = 0; | ||
18782 | for (; ioport < ASC_NUM_IOPORT_PROBE; | ||
18783 | ioport++) { | ||
18784 | if ((iop = | ||
18785 | asc_ioport[ioport]) != 0) { | ||
18786 | break; | ||
18787 | } | ||
18788 | } | ||
18789 | if (iop) { | ||
18790 | ASC_DBG1(1, | ||
18791 | "advansys_detect: probing I/O port 0x%x...\n", | ||
18792 | iop); | ||
18793 | if (!request_region | ||
18794 | (iop, ASC_IOADR_GAP, | ||
18795 | "advansys")) { | ||
18796 | printk | ||
18797 | ("AdvanSys SCSI: specified I/O Port 0x%X is busy\n", | ||
18798 | iop); | ||
18799 | /* Don't try this I/O port twice. */ | ||
18800 | asc_ioport[ioport] = 0; | ||
18801 | goto ioport_try_again; | ||
18802 | } else if (AscFindSignature(iop) | ||
18803 | == ASC_FALSE) { | ||
18804 | printk | ||
18805 | ("AdvanSys SCSI: specified I/O Port 0x%X has no adapter\n", | ||
18806 | iop); | ||
18807 | /* Don't try this I/O port twice. */ | ||
18808 | release_region(iop, | ||
18809 | ASC_IOADR_GAP); | ||
18810 | asc_ioport[ioport] = 0; | ||
18811 | goto ioport_try_again; | ||
18812 | } else { | ||
18813 | /* | ||
18814 | * If this isn't an ISA board, then it must be | ||
18815 | * a VL board. If currently looking an ISA | ||
18816 | * board is being looked for then try for | ||
18817 | * another ISA board in 'asc_ioport'. | ||
18818 | */ | ||
18819 | if (asc_bus[bus] == | ||
18820 | ASC_IS_ISA | ||
18821 | && | ||
18822 | (AscGetChipVersion | ||
18823 | (iop, | ||
18824 | ASC_IS_ISA) & | ||
18825 | ASC_CHIP_VER_ISA_BIT) | ||
18826 | == 0) { | ||
18827 | /* | ||
18828 | * Don't clear 'asc_ioport[ioport]'. Try | ||
18829 | * this board again for VL. Increment | ||
18830 | * 'ioport' past this board. | ||
18831 | */ | ||
18832 | ioport++; | ||
18833 | release_region | ||
18834 | (iop, | ||
18835 | ASC_IOADR_GAP); | ||
18836 | goto ioport_try_again; | ||
18837 | } | ||
18838 | } | ||
18839 | /* | ||
18840 | * This board appears good, don't try the I/O port | ||
18841 | * again by clearing its value. Increment 'ioport' | ||
18842 | * for the next iteration. | ||
18843 | */ | ||
18844 | asc_ioport[ioport++] = 0; | ||
18845 | } | ||
18846 | } | ||
18847 | #endif /* CONFIG_ISA */ | ||
18848 | break; | ||
18849 | |||
18850 | case ASC_IS_EISA: | ||
18851 | #ifdef CONFIG_ISA | ||
18852 | iop = AscSearchIOPortAddr(iop, asc_bus[bus]); | ||
18853 | #endif /* CONFIG_ISA */ | ||
18854 | break; | ||
18855 | |||
18856 | case ASC_IS_PCI: | ||
18857 | #ifdef CONFIG_PCI | ||
18858 | if (pci_init_search == 0) { | ||
18859 | int i, j; | ||
18860 | |||
18861 | pci_init_search = 1; | ||
18862 | |||
18863 | /* Find all PCI cards. */ | ||
18864 | while (pci_device_id_cnt < | ||
18865 | ASC_PCI_DEVICE_ID_CNT) { | ||
18866 | if ((pdev = | ||
18867 | pci_find_device | ||
18868 | (PCI_VENDOR_ID_ASP, | ||
18869 | pci_device_id | ||
18870 | [pci_device_id_cnt], | ||
18871 | pdev)) == NULL) { | ||
18872 | pci_device_id_cnt++; | ||
18873 | } else { | ||
18874 | if (pci_enable_device | ||
18875 | (pdev) == 0) { | ||
18876 | pci_devicep | ||
18877 | [pci_card_cnt_max++] | ||
18878 | = pdev; | ||
18879 | } | ||
18880 | } | ||
18881 | } | ||
18882 | |||
18883 | /* | ||
18884 | * Sort PCI cards in ascending order by PCI Bus, Slot, | ||
18885 | * and Device Number. | ||
18886 | */ | ||
18887 | for (i = 0; i < pci_card_cnt_max - 1; | ||
18888 | i++) { | ||
18889 | for (j = i + 1; | ||
18890 | j < pci_card_cnt_max; | ||
18891 | j++) { | ||
18892 | if ((pci_devicep[j]-> | ||
18893 | bus->number < | ||
18894 | pci_devicep[i]-> | ||
18895 | bus->number) | ||
18896 | || | ||
18897 | ((pci_devicep[j]-> | ||
18898 | bus->number == | ||
18899 | pci_devicep[i]-> | ||
18900 | bus->number) | ||
18901 | && | ||
18902 | (pci_devicep[j]-> | ||
18903 | devfn < | ||
18904 | pci_devicep[i]-> | ||
18905 | devfn))) { | ||
18906 | pdev = | ||
18907 | pci_devicep | ||
18908 | [i]; | ||
18909 | pci_devicep[i] = | ||
18910 | pci_devicep | ||
18911 | [j]; | ||
18912 | pci_devicep[j] = | ||
18913 | pdev; | ||
18914 | } | ||
18915 | } | ||
18916 | } | ||
18917 | |||
18918 | pci_card_cnt = 0; | ||
18919 | } else { | ||
18920 | pci_card_cnt++; | ||
18921 | } | ||
18922 | |||
18923 | if (pci_card_cnt == pci_card_cnt_max) { | ||
18924 | iop = 0; | ||
18925 | } else { | ||
18926 | pdev = pci_devicep[pci_card_cnt]; | ||
18927 | |||
18928 | ASC_DBG2(2, | ||
18929 | "advansys_detect: devfn %d, bus number %d\n", | ||
18930 | pdev->devfn, | ||
18931 | pdev->bus->number); | ||
18932 | iop = pci_resource_start(pdev, 0); | ||
18933 | ASC_DBG2(1, | ||
18934 | "advansys_detect: vendorID %X, deviceID %X\n", | ||
18935 | pdev->vendor, | ||
18936 | pdev->device); | ||
18937 | ASC_DBG2(2, | ||
18938 | "advansys_detect: iop %X, irqLine %d\n", | ||
18939 | iop, pdev->irq); | ||
18940 | } | ||
18941 | if (pdev) | ||
18942 | dev = &pdev->dev; | ||
18943 | |||
18944 | #endif /* CONFIG_PCI */ | ||
18945 | break; | ||
18946 | |||
18947 | default: | ||
18948 | ASC_PRINT1 | ||
18949 | ("advansys_detect: unknown bus type: %d\n", | ||
18950 | asc_bus[bus]); | ||
18951 | break; | ||
18952 | } | ||
18953 | ASC_DBG1(1, "advansys_detect: iop 0x%x\n", iop); | ||
18954 | |||
18955 | /* | ||
18956 | * Adapter not found, try next bus type. | ||
18957 | */ | ||
18958 | if (iop == 0) { | ||
18959 | break; | ||
18960 | } | ||
18961 | |||
18962 | advansys_board_found(iop, dev, asc_bus[bus]); | ||
18963 | } | ||
18964 | } | ||
18965 | |||
18966 | ASC_DBG1(1, "advansys_detect: done: asc_board_count %d\n", | ||
18967 | asc_board_count); | ||
18968 | return asc_board_count; | ||
18969 | } | ||
18970 | |||
18971 | /* | ||
18972 | * advansys_release() | ||
18973 | * | ||
18974 | * Release resources allocated for a single AdvanSys adapter. | ||
18975 | */ | ||
18976 | static int advansys_release(struct Scsi_Host *shost) | ||
18977 | { | ||
18978 | asc_board_t *boardp; | ||
18979 | |||
18980 | ASC_DBG(1, "advansys_release: begin\n"); | ||
18981 | boardp = ASC_BOARDP(shost); | ||
18982 | free_irq(shost->irq, boardp); | ||
18983 | if (shost->dma_channel != NO_ISA_DMA) { | ||
18984 | ASC_DBG(1, "advansys_release: free_dma()\n"); | ||
18985 | free_dma(shost->dma_channel); | ||
18986 | } | ||
18987 | release_region(shost->io_port, boardp->asc_n_io_port); | ||
18988 | if (ASC_WIDE_BOARD(boardp)) { | ||
18989 | adv_sgblk_t *sgp = NULL; | ||
18990 | |||
18991 | iounmap(boardp->ioremap_addr); | ||
18992 | kfree(boardp->orig_carrp); | ||
18993 | boardp->orig_carrp = NULL; | ||
18994 | if (boardp->orig_reqp) { | ||
18995 | kfree(boardp->orig_reqp); | ||
18996 | boardp->orig_reqp = boardp->adv_reqp = NULL; | ||
18997 | } | ||
18998 | while ((sgp = boardp->adv_sgblkp) != NULL) { | ||
18999 | boardp->adv_sgblkp = sgp->next_sgblkp; | ||
19000 | kfree(sgp); | ||
19001 | } | ||
19002 | } | ||
19003 | #ifdef CONFIG_PROC_FS | ||
19004 | ASC_ASSERT(boardp->prtbuf != NULL); | ||
19005 | kfree(boardp->prtbuf); | ||
19006 | #endif /* CONFIG_PROC_FS */ | ||
19007 | scsi_unregister(shost); | ||
19008 | ASC_DBG(1, "advansys_release: end\n"); | ||
19009 | return 0; | ||
19010 | } | ||
19011 | |||
18136 | #ifdef CONFIG_PCI | 19012 | #ifdef CONFIG_PCI |
18137 | /* PCI Devices supported by this driver */ | 19013 | /* PCI Devices supported by this driver */ |
18138 | static struct pci_device_id advansys_pci_tbl[] __devinitdata = { | 19014 | static struct pci_device_id advansys_pci_tbl[] __devinitdata = { |
18139 | { PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_1200A, | 19015 | {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_1200A, |
18140 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | 19016 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
18141 | { PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_ABP940, | 19017 | {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_ABP940, |
18142 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | 19018 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
18143 | { PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_ABP940U, | 19019 | {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_ABP940U, |
18144 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | 19020 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
18145 | { PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_ABP940UW, | 19021 | {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_ASP_ABP940UW, |
18146 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | 19022 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
18147 | { PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_38C0800_REV1, | 19023 | {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_38C0800_REV1, |
18148 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | 19024 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
18149 | { PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_38C1600_REV1, | 19025 | {PCI_VENDOR_ID_ASP, PCI_DEVICE_ID_38C1600_REV1, |
18150 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | 19026 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
18151 | { } | 19027 | {} |
18152 | }; | 19028 | }; |
19029 | |||
18153 | MODULE_DEVICE_TABLE(pci, advansys_pci_tbl); | 19030 | MODULE_DEVICE_TABLE(pci, advansys_pci_tbl); |
18154 | #endif /* CONFIG_PCI */ | 19031 | #endif /* CONFIG_PCI */ |
diff --git a/drivers/scsi/aic7xxx/aic79xx_osm.c b/drivers/scsi/aic7xxx/aic79xx_osm.c index 286ab83116f9..a055a96e3ad3 100644 --- a/drivers/scsi/aic7xxx/aic79xx_osm.c +++ b/drivers/scsi/aic7xxx/aic79xx_osm.c | |||
@@ -2284,9 +2284,12 @@ static void ahd_linux_set_period(struct scsi_target *starget, int period) | |||
2284 | if (period < 8) | 2284 | if (period < 8) |
2285 | period = 8; | 2285 | period = 8; |
2286 | if (period < 10) { | 2286 | if (period < 10) { |
2287 | ppr_options |= MSG_EXT_PPR_DT_REQ; | 2287 | if (spi_max_width(starget)) { |
2288 | if (period == 8) | 2288 | ppr_options |= MSG_EXT_PPR_DT_REQ; |
2289 | ppr_options |= MSG_EXT_PPR_IU_REQ; | 2289 | if (period == 8) |
2290 | ppr_options |= MSG_EXT_PPR_IU_REQ; | ||
2291 | } else | ||
2292 | period = 10; | ||
2290 | } | 2293 | } |
2291 | 2294 | ||
2292 | dt = ppr_options & MSG_EXT_PPR_DT_REQ; | 2295 | dt = ppr_options & MSG_EXT_PPR_DT_REQ; |
@@ -2365,7 +2368,7 @@ static void ahd_linux_set_dt(struct scsi_target *starget, int dt) | |||
2365 | printf("%s: %s DT\n", ahd_name(ahd), | 2368 | printf("%s: %s DT\n", ahd_name(ahd), |
2366 | dt ? "enabling" : "disabling"); | 2369 | dt ? "enabling" : "disabling"); |
2367 | #endif | 2370 | #endif |
2368 | if (dt) { | 2371 | if (dt && spi_max_width(starget)) { |
2369 | ppr_options |= MSG_EXT_PPR_DT_REQ; | 2372 | ppr_options |= MSG_EXT_PPR_DT_REQ; |
2370 | if (!width) | 2373 | if (!width) |
2371 | ahd_linux_set_width(starget, 1); | 2374 | ahd_linux_set_width(starget, 1); |
@@ -2447,7 +2450,7 @@ static void ahd_linux_set_iu(struct scsi_target *starget, int iu) | |||
2447 | iu ? "enabling" : "disabling"); | 2450 | iu ? "enabling" : "disabling"); |
2448 | #endif | 2451 | #endif |
2449 | 2452 | ||
2450 | if (iu) { | 2453 | if (iu && spi_max_width(starget)) { |
2451 | ppr_options |= MSG_EXT_PPR_IU_REQ; | 2454 | ppr_options |= MSG_EXT_PPR_IU_REQ; |
2452 | ppr_options |= MSG_EXT_PPR_DT_REQ; /* IU requires DT */ | 2455 | ppr_options |= MSG_EXT_PPR_DT_REQ; /* IU requires DT */ |
2453 | } | 2456 | } |
@@ -2487,7 +2490,7 @@ static void ahd_linux_set_rd_strm(struct scsi_target *starget, int rdstrm) | |||
2487 | rdstrm ? "enabling" : "disabling"); | 2490 | rdstrm ? "enabling" : "disabling"); |
2488 | #endif | 2491 | #endif |
2489 | 2492 | ||
2490 | if (rdstrm) | 2493 | if (rdstrm && spi_max_width(starget)) |
2491 | ppr_options |= MSG_EXT_PPR_RD_STRM; | 2494 | ppr_options |= MSG_EXT_PPR_RD_STRM; |
2492 | 2495 | ||
2493 | ahd_compile_devinfo(&devinfo, shost->this_id, starget->id, 0, | 2496 | ahd_compile_devinfo(&devinfo, shost->this_id, starget->id, 0, |
@@ -2523,7 +2526,7 @@ static void ahd_linux_set_wr_flow(struct scsi_target *starget, int wrflow) | |||
2523 | wrflow ? "enabling" : "disabling"); | 2526 | wrflow ? "enabling" : "disabling"); |
2524 | #endif | 2527 | #endif |
2525 | 2528 | ||
2526 | if (wrflow) | 2529 | if (wrflow && spi_max_width(starget)) |
2527 | ppr_options |= MSG_EXT_PPR_WR_FLOW; | 2530 | ppr_options |= MSG_EXT_PPR_WR_FLOW; |
2528 | 2531 | ||
2529 | ahd_compile_devinfo(&devinfo, shost->this_id, starget->id, 0, | 2532 | ahd_compile_devinfo(&devinfo, shost->this_id, starget->id, 0, |
@@ -2567,7 +2570,7 @@ static void ahd_linux_set_rti(struct scsi_target *starget, int rti) | |||
2567 | rti ? "enabling" : "disabling"); | 2570 | rti ? "enabling" : "disabling"); |
2568 | #endif | 2571 | #endif |
2569 | 2572 | ||
2570 | if (rti) | 2573 | if (rti && spi_max_width(starget)) |
2571 | ppr_options |= MSG_EXT_PPR_RTI; | 2574 | ppr_options |= MSG_EXT_PPR_RTI; |
2572 | 2575 | ||
2573 | ahd_compile_devinfo(&devinfo, shost->this_id, starget->id, 0, | 2576 | ahd_compile_devinfo(&devinfo, shost->this_id, starget->id, 0, |
@@ -2603,7 +2606,7 @@ static void ahd_linux_set_pcomp_en(struct scsi_target *starget, int pcomp) | |||
2603 | pcomp ? "Enable" : "Disable"); | 2606 | pcomp ? "Enable" : "Disable"); |
2604 | #endif | 2607 | #endif |
2605 | 2608 | ||
2606 | if (pcomp) { | 2609 | if (pcomp && spi_max_width(starget)) { |
2607 | uint8_t precomp; | 2610 | uint8_t precomp; |
2608 | 2611 | ||
2609 | if (ahd->unit < ARRAY_SIZE(aic79xx_iocell_info)) { | 2612 | if (ahd->unit < ARRAY_SIZE(aic79xx_iocell_info)) { |
@@ -2647,7 +2650,7 @@ static void ahd_linux_set_hold_mcs(struct scsi_target *starget, int hold) | |||
2647 | unsigned int dt = ppr_options & MSG_EXT_PPR_DT_REQ; | 2650 | unsigned int dt = ppr_options & MSG_EXT_PPR_DT_REQ; |
2648 | unsigned long flags; | 2651 | unsigned long flags; |
2649 | 2652 | ||
2650 | if (hold) | 2653 | if (hold && spi_max_width(starget)) |
2651 | ppr_options |= MSG_EXT_PPR_HOLD_MCS; | 2654 | ppr_options |= MSG_EXT_PPR_HOLD_MCS; |
2652 | 2655 | ||
2653 | ahd_compile_devinfo(&devinfo, shost->this_id, starget->id, 0, | 2656 | ahd_compile_devinfo(&devinfo, shost->this_id, starget->id, 0, |
diff --git a/drivers/scsi/aic7xxx/aic7xxx_osm.c b/drivers/scsi/aic7xxx/aic7xxx_osm.c index 1803ab6fc21c..2e9c38f2e8a6 100644 --- a/drivers/scsi/aic7xxx/aic7xxx_osm.c +++ b/drivers/scsi/aic7xxx/aic7xxx_osm.c | |||
@@ -2317,8 +2317,13 @@ static void ahc_linux_set_period(struct scsi_target *starget, int period) | |||
2317 | 2317 | ||
2318 | if (period < 9) | 2318 | if (period < 9) |
2319 | period = 9; /* 12.5ns is our minimum */ | 2319 | period = 9; /* 12.5ns is our minimum */ |
2320 | if (period == 9) | 2320 | if (period == 9) { |
2321 | ppr_options |= MSG_EXT_PPR_DT_REQ; | 2321 | if (spi_max_width(starget)) |
2322 | ppr_options |= MSG_EXT_PPR_DT_REQ; | ||
2323 | else | ||
2324 | /* need wide for DT and need DT for 12.5 ns */ | ||
2325 | period = 10; | ||
2326 | } | ||
2322 | 2327 | ||
2323 | ahc_compile_devinfo(&devinfo, shost->this_id, starget->id, 0, | 2328 | ahc_compile_devinfo(&devinfo, shost->this_id, starget->id, 0, |
2324 | starget->channel + 'A', ROLE_INITIATOR); | 2329 | starget->channel + 'A', ROLE_INITIATOR); |
@@ -2381,7 +2386,7 @@ static void ahc_linux_set_dt(struct scsi_target *starget, int dt) | |||
2381 | unsigned long flags; | 2386 | unsigned long flags; |
2382 | struct ahc_syncrate *syncrate; | 2387 | struct ahc_syncrate *syncrate; |
2383 | 2388 | ||
2384 | if (dt) { | 2389 | if (dt && spi_max_width(starget)) { |
2385 | ppr_options |= MSG_EXT_PPR_DT_REQ; | 2390 | ppr_options |= MSG_EXT_PPR_DT_REQ; |
2386 | if (!width) | 2391 | if (!width) |
2387 | ahc_linux_set_width(starget, 1); | 2392 | ahc_linux_set_width(starget, 1); |
diff --git a/drivers/scsi/aic94xx/aic94xx_init.c b/drivers/scsi/aic94xx/aic94xx_init.c index ab00aecc5466..63bcde246447 100644 --- a/drivers/scsi/aic94xx/aic94xx_init.c +++ b/drivers/scsi/aic94xx/aic94xx_init.c | |||
@@ -586,7 +586,7 @@ static int __devinit asd_pci_probe(struct pci_dev *dev, | |||
586 | goto Err; | 586 | goto Err; |
587 | } | 587 | } |
588 | asd_ha->pcidev = dev; | 588 | asd_ha->pcidev = dev; |
589 | asd_ha->sas_ha.pcidev = asd_ha->pcidev; | 589 | asd_ha->sas_ha.dev = &asd_ha->pcidev->dev; |
590 | asd_ha->sas_ha.lldd_ha = asd_ha; | 590 | asd_ha->sas_ha.lldd_ha = asd_ha; |
591 | 591 | ||
592 | asd_ha->name = asd_dev->name; | 592 | asd_ha->name = asd_dev->name; |
@@ -605,8 +605,6 @@ static int __devinit asd_pci_probe(struct pci_dev *dev, | |||
605 | goto Err_free; | 605 | goto Err_free; |
606 | } | 606 | } |
607 | 607 | ||
608 | |||
609 | |||
610 | err = asd_dev->setup(asd_ha); | 608 | err = asd_dev->setup(asd_ha); |
611 | if (err) | 609 | if (err) |
612 | goto Err_free; | 610 | goto Err_free; |
diff --git a/drivers/scsi/iscsi_tcp.c b/drivers/scsi/iscsi_tcp.c index 7829ab1e2fb4..a21455d0274c 100644 --- a/drivers/scsi/iscsi_tcp.c +++ b/drivers/scsi/iscsi_tcp.c | |||
@@ -2216,11 +2216,13 @@ static void iscsi_tcp_session_destroy(struct iscsi_cls_session *cls_session) | |||
2216 | 2216 | ||
2217 | static int iscsi_tcp_slave_configure(struct scsi_device *sdev) | 2217 | static int iscsi_tcp_slave_configure(struct scsi_device *sdev) |
2218 | { | 2218 | { |
2219 | blk_queue_bounce_limit(sdev->request_queue, BLK_BOUNCE_ANY); | ||
2219 | blk_queue_dma_alignment(sdev->request_queue, 0); | 2220 | blk_queue_dma_alignment(sdev->request_queue, 0); |
2220 | return 0; | 2221 | return 0; |
2221 | } | 2222 | } |
2222 | 2223 | ||
2223 | static struct scsi_host_template iscsi_sht = { | 2224 | static struct scsi_host_template iscsi_sht = { |
2225 | .module = THIS_MODULE, | ||
2224 | .name = "iSCSI Initiator over TCP/IP", | 2226 | .name = "iSCSI Initiator over TCP/IP", |
2225 | .queuecommand = iscsi_queuecommand, | 2227 | .queuecommand = iscsi_queuecommand, |
2226 | .change_queue_depth = iscsi_change_queue_depth, | 2228 | .change_queue_depth = iscsi_change_queue_depth, |
diff --git a/drivers/scsi/libiscsi.c b/drivers/scsi/libiscsi.c index 4d85ce100192..5606d1e62978 100644 --- a/drivers/scsi/libiscsi.c +++ b/drivers/scsi/libiscsi.c | |||
@@ -596,9 +596,16 @@ static void iscsi_prep_mtask(struct iscsi_conn *conn, | |||
596 | nop->cmdsn = cpu_to_be32(session->cmdsn); | 596 | nop->cmdsn = cpu_to_be32(session->cmdsn); |
597 | if (hdr->itt != RESERVED_ITT) { | 597 | if (hdr->itt != RESERVED_ITT) { |
598 | hdr->itt = build_itt(mtask->itt, conn->id, session->age); | 598 | hdr->itt = build_itt(mtask->itt, conn->id, session->age); |
599 | /* | ||
600 | * TODO: We always use immediate, so we never hit this. | ||
601 | * If we start to send tmfs or nops as non-immediate then | ||
602 | * we should start checking the cmdsn numbers for mgmt tasks. | ||
603 | */ | ||
599 | if (conn->c_stage == ISCSI_CONN_STARTED && | 604 | if (conn->c_stage == ISCSI_CONN_STARTED && |
600 | !(hdr->opcode & ISCSI_OP_IMMEDIATE)) | 605 | !(hdr->opcode & ISCSI_OP_IMMEDIATE)) { |
606 | session->queued_cmdsn++; | ||
601 | session->cmdsn++; | 607 | session->cmdsn++; |
608 | } | ||
602 | } | 609 | } |
603 | 610 | ||
604 | if (session->tt->init_mgmt_task) | 611 | if (session->tt->init_mgmt_task) |
@@ -641,9 +648,11 @@ static int iscsi_check_cmdsn_window_closed(struct iscsi_conn *conn) | |||
641 | /* | 648 | /* |
642 | * Check for iSCSI window and take care of CmdSN wrap-around | 649 | * Check for iSCSI window and take care of CmdSN wrap-around |
643 | */ | 650 | */ |
644 | if (!iscsi_sna_lte(session->cmdsn, session->max_cmdsn)) { | 651 | if (!iscsi_sna_lte(session->queued_cmdsn, session->max_cmdsn)) { |
645 | debug_scsi("iSCSI CmdSN closed. MaxCmdSN %u CmdSN %u\n", | 652 | debug_scsi("iSCSI CmdSN closed. ExpCmdSn %u MaxCmdSN %u " |
646 | session->max_cmdsn, session->cmdsn); | 653 | "CmdSN %u/%u\n", session->exp_cmdsn, |
654 | session->max_cmdsn, session->cmdsn, | ||
655 | session->queued_cmdsn); | ||
647 | return -ENOSPC; | 656 | return -ENOSPC; |
648 | } | 657 | } |
649 | return 0; | 658 | return 0; |
@@ -722,11 +731,6 @@ check_mgmt: | |||
722 | 731 | ||
723 | /* process command queue */ | 732 | /* process command queue */ |
724 | while (!list_empty(&conn->xmitqueue)) { | 733 | while (!list_empty(&conn->xmitqueue)) { |
725 | rc = iscsi_check_cmdsn_window_closed(conn); | ||
726 | if (rc) { | ||
727 | spin_unlock_bh(&conn->session->lock); | ||
728 | return rc; | ||
729 | } | ||
730 | /* | 734 | /* |
731 | * iscsi tcp may readd the task to the xmitqueue to send | 735 | * iscsi tcp may readd the task to the xmitqueue to send |
732 | * write data | 736 | * write data |
@@ -834,12 +838,6 @@ int iscsi_queuecommand(struct scsi_cmnd *sc, void (*done)(struct scsi_cmnd *)) | |||
834 | goto fault; | 838 | goto fault; |
835 | } | 839 | } |
836 | 840 | ||
837 | /* | ||
838 | * We check this here and in data xmit, because if we get to the point | ||
839 | * that this check is hitting the window then we have enough IO in | ||
840 | * flight and enough IO waiting to be transmitted it is better | ||
841 | * to let the scsi/block layer queue up. | ||
842 | */ | ||
843 | if (iscsi_check_cmdsn_window_closed(conn)) { | 841 | if (iscsi_check_cmdsn_window_closed(conn)) { |
844 | reason = FAILURE_WINDOW_CLOSED; | 842 | reason = FAILURE_WINDOW_CLOSED; |
845 | goto reject; | 843 | goto reject; |
@@ -850,6 +848,8 @@ int iscsi_queuecommand(struct scsi_cmnd *sc, void (*done)(struct scsi_cmnd *)) | |||
850 | reason = FAILURE_OOM; | 848 | reason = FAILURE_OOM; |
851 | goto reject; | 849 | goto reject; |
852 | } | 850 | } |
851 | session->queued_cmdsn++; | ||
852 | |||
853 | sc->SCp.phase = session->age; | 853 | sc->SCp.phase = session->age; |
854 | sc->SCp.ptr = (char *)ctask; | 854 | sc->SCp.ptr = (char *)ctask; |
855 | 855 | ||
@@ -1140,7 +1140,13 @@ static void fail_command(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask, | |||
1140 | if (!sc) | 1140 | if (!sc) |
1141 | return; | 1141 | return; |
1142 | 1142 | ||
1143 | if (ctask->state != ISCSI_TASK_PENDING) | 1143 | if (ctask->state == ISCSI_TASK_PENDING) |
1144 | /* | ||
1145 | * cmd never made it to the xmit thread, so we should not count | ||
1146 | * the cmd in the sequencing | ||
1147 | */ | ||
1148 | conn->session->queued_cmdsn--; | ||
1149 | else | ||
1144 | conn->session->tt->cleanup_cmd_task(conn, ctask); | 1150 | conn->session->tt->cleanup_cmd_task(conn, ctask); |
1145 | iscsi_ctask_mtask_cleanup(ctask); | 1151 | iscsi_ctask_mtask_cleanup(ctask); |
1146 | 1152 | ||
@@ -1392,7 +1398,7 @@ iscsi_session_setup(struct iscsi_transport *iscsit, | |||
1392 | session->state = ISCSI_STATE_FREE; | 1398 | session->state = ISCSI_STATE_FREE; |
1393 | session->mgmtpool_max = ISCSI_MGMT_CMDS_MAX; | 1399 | session->mgmtpool_max = ISCSI_MGMT_CMDS_MAX; |
1394 | session->cmds_max = cmds_max; | 1400 | session->cmds_max = cmds_max; |
1395 | session->cmdsn = initial_cmdsn; | 1401 | session->queued_cmdsn = session->cmdsn = initial_cmdsn; |
1396 | session->exp_cmdsn = initial_cmdsn + 1; | 1402 | session->exp_cmdsn = initial_cmdsn + 1; |
1397 | session->max_cmdsn = initial_cmdsn + 1; | 1403 | session->max_cmdsn = initial_cmdsn + 1; |
1398 | session->max_r2t = 1; | 1404 | session->max_r2t = 1; |
@@ -1473,6 +1479,7 @@ void iscsi_session_teardown(struct iscsi_cls_session *cls_session) | |||
1473 | struct iscsi_session *session = iscsi_hostdata(shost->hostdata); | 1479 | struct iscsi_session *session = iscsi_hostdata(shost->hostdata); |
1474 | struct module *owner = cls_session->transport->owner; | 1480 | struct module *owner = cls_session->transport->owner; |
1475 | 1481 | ||
1482 | iscsi_unblock_session(cls_session); | ||
1476 | scsi_remove_host(shost); | 1483 | scsi_remove_host(shost); |
1477 | 1484 | ||
1478 | iscsi_pool_free(&session->mgmtpool, (void**)session->mgmt_cmds); | 1485 | iscsi_pool_free(&session->mgmtpool, (void**)session->mgmt_cmds); |
@@ -1615,11 +1622,8 @@ void iscsi_conn_teardown(struct iscsi_cls_conn *cls_conn) | |||
1615 | kfree(conn->persistent_address); | 1622 | kfree(conn->persistent_address); |
1616 | __kfifo_put(session->mgmtpool.queue, (void*)&conn->login_mtask, | 1623 | __kfifo_put(session->mgmtpool.queue, (void*)&conn->login_mtask, |
1617 | sizeof(void*)); | 1624 | sizeof(void*)); |
1618 | if (session->leadconn == conn) { | 1625 | if (session->leadconn == conn) |
1619 | session->leadconn = NULL; | 1626 | session->leadconn = NULL; |
1620 | /* no connections exits.. reset sequencing */ | ||
1621 | session->cmdsn = session->max_cmdsn = session->exp_cmdsn = 1; | ||
1622 | } | ||
1623 | spin_unlock_bh(&session->lock); | 1627 | spin_unlock_bh(&session->lock); |
1624 | 1628 | ||
1625 | kfifo_free(conn->mgmtqueue); | 1629 | kfifo_free(conn->mgmtqueue); |
@@ -1649,6 +1653,7 @@ int iscsi_conn_start(struct iscsi_cls_conn *cls_conn) | |||
1649 | spin_lock_bh(&session->lock); | 1653 | spin_lock_bh(&session->lock); |
1650 | conn->c_stage = ISCSI_CONN_STARTED; | 1654 | conn->c_stage = ISCSI_CONN_STARTED; |
1651 | session->state = ISCSI_STATE_LOGGED_IN; | 1655 | session->state = ISCSI_STATE_LOGGED_IN; |
1656 | session->queued_cmdsn = session->cmdsn; | ||
1652 | 1657 | ||
1653 | switch(conn->stop_stage) { | 1658 | switch(conn->stop_stage) { |
1654 | case STOP_CONN_RECOVER: | 1659 | case STOP_CONN_RECOVER: |
diff --git a/drivers/scsi/libsas/sas_ata.c b/drivers/scsi/libsas/sas_ata.c index ced2de32c511..5e573efcf0a7 100644 --- a/drivers/scsi/libsas/sas_ata.c +++ b/drivers/scsi/libsas/sas_ata.c | |||
@@ -382,7 +382,7 @@ int sas_ata_init_host_and_port(struct domain_device *found_dev, | |||
382 | struct ata_port *ap; | 382 | struct ata_port *ap; |
383 | 383 | ||
384 | ata_host_init(&found_dev->sata_dev.ata_host, | 384 | ata_host_init(&found_dev->sata_dev.ata_host, |
385 | &ha->pcidev->dev, | 385 | ha->dev, |
386 | sata_port_info.flags, | 386 | sata_port_info.flags, |
387 | &sas_sata_ops); | 387 | &sas_sata_ops); |
388 | ap = ata_sas_port_alloc(&found_dev->sata_dev.ata_host, | 388 | ap = ata_sas_port_alloc(&found_dev->sata_dev.ata_host, |
@@ -448,10 +448,10 @@ static void sas_disc_task_done(struct sas_task *task) | |||
448 | * @task: the task to be executed | 448 | * @task: the task to be executed |
449 | * @buffer: pointer to buffer to do I/O | 449 | * @buffer: pointer to buffer to do I/O |
450 | * @size: size of @buffer | 450 | * @size: size of @buffer |
451 | * @pci_dma_dir: PCI_DMA_... | 451 | * @dma_dir: DMA direction. DMA_xxx |
452 | */ | 452 | */ |
453 | static int sas_execute_task(struct sas_task *task, void *buffer, int size, | 453 | static int sas_execute_task(struct sas_task *task, void *buffer, int size, |
454 | int pci_dma_dir) | 454 | enum dma_data_direction dma_dir) |
455 | { | 455 | { |
456 | int res = 0; | 456 | int res = 0; |
457 | struct scatterlist *scatter = NULL; | 457 | struct scatterlist *scatter = NULL; |
@@ -461,7 +461,7 @@ static int sas_execute_task(struct sas_task *task, void *buffer, int size, | |||
461 | struct sas_internal *i = | 461 | struct sas_internal *i = |
462 | to_sas_internal(task->dev->port->ha->core.shost->transportt); | 462 | to_sas_internal(task->dev->port->ha->core.shost->transportt); |
463 | 463 | ||
464 | if (pci_dma_dir != PCI_DMA_NONE) { | 464 | if (dma_dir != DMA_NONE) { |
465 | scatter = kzalloc(sizeof(*scatter), GFP_KERNEL); | 465 | scatter = kzalloc(sizeof(*scatter), GFP_KERNEL); |
466 | if (!scatter) | 466 | if (!scatter) |
467 | goto out; | 467 | goto out; |
@@ -474,11 +474,11 @@ static int sas_execute_task(struct sas_task *task, void *buffer, int size, | |||
474 | task->scatter = scatter; | 474 | task->scatter = scatter; |
475 | task->num_scatter = num_scatter; | 475 | task->num_scatter = num_scatter; |
476 | task->total_xfer_len = size; | 476 | task->total_xfer_len = size; |
477 | task->data_dir = pci_dma_dir; | 477 | task->data_dir = dma_dir; |
478 | task->task_done = sas_disc_task_done; | 478 | task->task_done = sas_disc_task_done; |
479 | if (pci_dma_dir != PCI_DMA_NONE && | 479 | if (dma_dir != DMA_NONE && |
480 | sas_protocol_ata(task->task_proto)) { | 480 | sas_protocol_ata(task->task_proto)) { |
481 | task->num_scatter = pci_map_sg(task->dev->port->ha->pcidev, | 481 | task->num_scatter = dma_map_sg(task->dev->port->ha->dev, |
482 | task->scatter, | 482 | task->scatter, |
483 | task->num_scatter, | 483 | task->num_scatter, |
484 | task->data_dir); | 484 | task->data_dir); |
@@ -565,9 +565,9 @@ static int sas_execute_task(struct sas_task *task, void *buffer, int size, | |||
565 | } | 565 | } |
566 | } | 566 | } |
567 | ex_err: | 567 | ex_err: |
568 | if (pci_dma_dir != PCI_DMA_NONE) { | 568 | if (dma_dir != DMA_NONE) { |
569 | if (sas_protocol_ata(task->task_proto)) | 569 | if (sas_protocol_ata(task->task_proto)) |
570 | pci_unmap_sg(task->dev->port->ha->pcidev, | 570 | dma_unmap_sg(task->dev->port->ha->dev, |
571 | task->scatter, task->num_scatter, | 571 | task->scatter, task->num_scatter, |
572 | task->data_dir); | 572 | task->data_dir); |
573 | kfree(scatter); | 573 | kfree(scatter); |
@@ -628,11 +628,11 @@ static void sas_get_ata_command_set(struct domain_device *dev) | |||
628 | * @features: the features register | 628 | * @features: the features register |
629 | * @buffer: pointer to buffer to do I/O | 629 | * @buffer: pointer to buffer to do I/O |
630 | * @size: size of @buffer | 630 | * @size: size of @buffer |
631 | * @pci_dma_dir: PCI_DMA_... | 631 | * @dma_dir: DMA direction. DMA_xxx |
632 | */ | 632 | */ |
633 | static int sas_issue_ata_cmd(struct domain_device *dev, u8 command, | 633 | static int sas_issue_ata_cmd(struct domain_device *dev, u8 command, |
634 | u8 features, void *buffer, int size, | 634 | u8 features, void *buffer, int size, |
635 | int pci_dma_dir) | 635 | enum dma_data_direction dma_dir) |
636 | { | 636 | { |
637 | int res = 0; | 637 | int res = 0; |
638 | struct sas_task *task; | 638 | struct sas_task *task; |
@@ -652,7 +652,7 @@ static int sas_issue_ata_cmd(struct domain_device *dev, u8 command, | |||
652 | task->ata_task.fis.device = d2h_fis->device; | 652 | task->ata_task.fis.device = d2h_fis->device; |
653 | task->ata_task.retry_count = 1; | 653 | task->ata_task.retry_count = 1; |
654 | 654 | ||
655 | res = sas_execute_task(task, buffer, size, pci_dma_dir); | 655 | res = sas_execute_task(task, buffer, size, dma_dir); |
656 | 656 | ||
657 | sas_free_task(task); | 657 | sas_free_task(task); |
658 | out: | 658 | out: |
@@ -707,7 +707,7 @@ static int sas_discover_sata_dev(struct domain_device *dev) | |||
707 | } | 707 | } |
708 | 708 | ||
709 | res = sas_issue_ata_cmd(dev, command, 0, identify_x, 512, | 709 | res = sas_issue_ata_cmd(dev, command, 0, identify_x, 512, |
710 | PCI_DMA_FROMDEVICE); | 710 | DMA_FROM_DEVICE); |
711 | if (res) | 711 | if (res) |
712 | goto out_err; | 712 | goto out_err; |
713 | 713 | ||
@@ -720,13 +720,13 @@ static int sas_discover_sata_dev(struct domain_device *dev) | |||
720 | goto cont1; | 720 | goto cont1; |
721 | res = sas_issue_ata_cmd(dev, ATA_SET_FEATURES, | 721 | res = sas_issue_ata_cmd(dev, ATA_SET_FEATURES, |
722 | ATA_FEATURE_PUP_STBY_SPIN_UP, | 722 | ATA_FEATURE_PUP_STBY_SPIN_UP, |
723 | NULL, 0, PCI_DMA_NONE); | 723 | NULL, 0, DMA_NONE); |
724 | if (res) | 724 | if (res) |
725 | goto cont1; | 725 | goto cont1; |
726 | 726 | ||
727 | schedule_timeout_interruptible(5*HZ); /* More time? */ | 727 | schedule_timeout_interruptible(5*HZ); /* More time? */ |
728 | res = sas_issue_ata_cmd(dev, command, 0, identify_x, 512, | 728 | res = sas_issue_ata_cmd(dev, command, 0, identify_x, 512, |
729 | PCI_DMA_FROMDEVICE); | 729 | DMA_FROM_DEVICE); |
730 | if (res) | 730 | if (res) |
731 | goto out_err; | 731 | goto out_err; |
732 | } | 732 | } |
diff --git a/drivers/scsi/libsas/sas_discover.c b/drivers/scsi/libsas/sas_discover.c index 6ac9f61d006a..7ef0afc3cd68 100644 --- a/drivers/scsi/libsas/sas_discover.c +++ b/drivers/scsi/libsas/sas_discover.c | |||
@@ -22,7 +22,6 @@ | |||
22 | * | 22 | * |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include <linux/pci.h> | ||
26 | #include <linux/scatterlist.h> | 25 | #include <linux/scatterlist.h> |
27 | #include <scsi/scsi_host.h> | 26 | #include <scsi/scsi_host.h> |
28 | #include <scsi/scsi_eh.h> | 27 | #include <scsi/scsi_eh.h> |
@@ -170,7 +169,7 @@ int sas_notify_lldd_dev_found(struct domain_device *dev) | |||
170 | if (res) { | 169 | if (res) { |
171 | printk("sas: driver on pcidev %s cannot handle " | 170 | printk("sas: driver on pcidev %s cannot handle " |
172 | "device %llx, error:%d\n", | 171 | "device %llx, error:%d\n", |
173 | pci_name(sas_ha->pcidev), | 172 | sas_ha->dev->bus_id, |
174 | SAS_ADDR(dev->sas_addr), res); | 173 | SAS_ADDR(dev->sas_addr), res); |
175 | } | 174 | } |
176 | } | 175 | } |
diff --git a/drivers/scsi/libsas/sas_dump.c b/drivers/scsi/libsas/sas_dump.c index f1246d2c9bef..bf34a236f946 100644 --- a/drivers/scsi/libsas/sas_dump.c +++ b/drivers/scsi/libsas/sas_dump.c | |||
@@ -56,7 +56,7 @@ void sas_dprint_phye(int phyid, enum phy_event pe) | |||
56 | 56 | ||
57 | void sas_dprint_hae(struct sas_ha_struct *sas_ha, enum ha_event he) | 57 | void sas_dprint_hae(struct sas_ha_struct *sas_ha, enum ha_event he) |
58 | { | 58 | { |
59 | SAS_DPRINTK("ha %s: %s event\n", pci_name(sas_ha->pcidev), | 59 | SAS_DPRINTK("ha %s: %s event\n", sas_ha->dev->bus_id, |
60 | sas_hae_str[he]); | 60 | sas_hae_str[he]); |
61 | } | 61 | } |
62 | 62 | ||
diff --git a/drivers/scsi/libsas/sas_expander.c b/drivers/scsi/libsas/sas_expander.c index b500f0c1449c..8727436b222d 100644 --- a/drivers/scsi/libsas/sas_expander.c +++ b/drivers/scsi/libsas/sas_expander.c | |||
@@ -507,14 +507,21 @@ static int sas_dev_present_in_domain(struct asd_sas_port *port, | |||
507 | int sas_smp_get_phy_events(struct sas_phy *phy) | 507 | int sas_smp_get_phy_events(struct sas_phy *phy) |
508 | { | 508 | { |
509 | int res; | 509 | int res; |
510 | u8 *req; | ||
511 | u8 *resp; | ||
510 | struct sas_rphy *rphy = dev_to_rphy(phy->dev.parent); | 512 | struct sas_rphy *rphy = dev_to_rphy(phy->dev.parent); |
511 | struct domain_device *dev = sas_find_dev_by_rphy(rphy); | 513 | struct domain_device *dev = sas_find_dev_by_rphy(rphy); |
512 | u8 *req = alloc_smp_req(RPEL_REQ_SIZE); | ||
513 | u8 *resp = kzalloc(RPEL_RESP_SIZE, GFP_KERNEL); | ||
514 | 514 | ||
515 | if (!resp) | 515 | req = alloc_smp_req(RPEL_REQ_SIZE); |
516 | if (!req) | ||
516 | return -ENOMEM; | 517 | return -ENOMEM; |
517 | 518 | ||
519 | resp = alloc_smp_resp(RPEL_RESP_SIZE); | ||
520 | if (!resp) { | ||
521 | kfree(req); | ||
522 | return -ENOMEM; | ||
523 | } | ||
524 | |||
518 | req[1] = SMP_REPORT_PHY_ERR_LOG; | 525 | req[1] = SMP_REPORT_PHY_ERR_LOG; |
519 | req[9] = phy->number; | 526 | req[9] = phy->number; |
520 | 527 | ||
@@ -1879,7 +1886,7 @@ int sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
1879 | struct request *req) | 1886 | struct request *req) |
1880 | { | 1887 | { |
1881 | struct domain_device *dev; | 1888 | struct domain_device *dev; |
1882 | int ret, type = rphy->identify.device_type; | 1889 | int ret, type; |
1883 | struct request *rsp = req->next_rq; | 1890 | struct request *rsp = req->next_rq; |
1884 | 1891 | ||
1885 | if (!rsp) { | 1892 | if (!rsp) { |
@@ -1888,12 +1895,13 @@ int sas_smp_handler(struct Scsi_Host *shost, struct sas_rphy *rphy, | |||
1888 | return -EINVAL; | 1895 | return -EINVAL; |
1889 | } | 1896 | } |
1890 | 1897 | ||
1891 | /* seems aic94xx doesn't support */ | 1898 | /* no rphy means no smp target support (ie aic94xx host) */ |
1892 | if (!rphy) { | 1899 | if (!rphy) { |
1893 | printk("%s: can we send a smp request to a host?\n", | 1900 | printk("%s: can we send a smp request to a host?\n", |
1894 | __FUNCTION__); | 1901 | __FUNCTION__); |
1895 | return -EINVAL; | 1902 | return -EINVAL; |
1896 | } | 1903 | } |
1904 | type = rphy->identify.device_type; | ||
1897 | 1905 | ||
1898 | if (type != SAS_EDGE_EXPANDER_DEVICE && | 1906 | if (type != SAS_EDGE_EXPANDER_DEVICE && |
1899 | type != SAS_FANOUT_EXPANDER_DEVICE) { | 1907 | type != SAS_FANOUT_EXPANDER_DEVICE) { |
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c index 1612f9200a52..0f2a9f5d801c 100644 --- a/drivers/scsi/qla2xxx/qla_attr.c +++ b/drivers/scsi/qla2xxx/qla_attr.c | |||
@@ -91,18 +91,20 @@ qla2x00_sysfs_read_nvram(struct kobject *kobj, | |||
91 | { | 91 | { |
92 | struct scsi_qla_host *ha = to_qla_host(dev_to_shost(container_of(kobj, | 92 | struct scsi_qla_host *ha = to_qla_host(dev_to_shost(container_of(kobj, |
93 | struct device, kobj))); | 93 | struct device, kobj))); |
94 | unsigned long flags; | 94 | int size = ha->nvram_size; |
95 | char *nvram_cache = ha->nvram; | ||
95 | 96 | ||
96 | if (!capable(CAP_SYS_ADMIN) || off != 0) | 97 | if (!capable(CAP_SYS_ADMIN) || off > size || count == 0) |
97 | return 0; | 98 | return 0; |
99 | if (off + count > size) { | ||
100 | size -= off; | ||
101 | count = size; | ||
102 | } | ||
98 | 103 | ||
99 | /* Read NVRAM. */ | 104 | /* Read NVRAM data from cache. */ |
100 | spin_lock_irqsave(&ha->hardware_lock, flags); | 105 | memcpy(buf, &nvram_cache[off], count); |
101 | ha->isp_ops->read_nvram(ha, (uint8_t *)buf, ha->nvram_base, | ||
102 | ha->nvram_size); | ||
103 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | ||
104 | 106 | ||
105 | return ha->nvram_size; | 107 | return count; |
106 | } | 108 | } |
107 | 109 | ||
108 | static ssize_t | 110 | static ssize_t |
@@ -144,6 +146,8 @@ qla2x00_sysfs_write_nvram(struct kobject *kobj, | |||
144 | /* Write NVRAM. */ | 146 | /* Write NVRAM. */ |
145 | spin_lock_irqsave(&ha->hardware_lock, flags); | 147 | spin_lock_irqsave(&ha->hardware_lock, flags); |
146 | ha->isp_ops->write_nvram(ha, (uint8_t *)buf, ha->nvram_base, count); | 148 | ha->isp_ops->write_nvram(ha, (uint8_t *)buf, ha->nvram_base, count); |
149 | ha->isp_ops->read_nvram(ha, (uint8_t *)&ha->nvram, ha->nvram_base, | ||
150 | count); | ||
147 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 151 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
148 | 152 | ||
149 | set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags); | 153 | set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags); |
@@ -298,18 +302,20 @@ qla2x00_sysfs_read_vpd(struct kobject *kobj, | |||
298 | { | 302 | { |
299 | struct scsi_qla_host *ha = to_qla_host(dev_to_shost(container_of(kobj, | 303 | struct scsi_qla_host *ha = to_qla_host(dev_to_shost(container_of(kobj, |
300 | struct device, kobj))); | 304 | struct device, kobj))); |
301 | unsigned long flags; | 305 | int size = ha->vpd_size; |
306 | char *vpd_cache = ha->vpd; | ||
302 | 307 | ||
303 | if (!capable(CAP_SYS_ADMIN) || off != 0) | 308 | if (!capable(CAP_SYS_ADMIN) || off > size || count == 0) |
304 | return 0; | 309 | return 0; |
310 | if (off + count > size) { | ||
311 | size -= off; | ||
312 | count = size; | ||
313 | } | ||
305 | 314 | ||
306 | /* Read NVRAM. */ | 315 | /* Read NVRAM data from cache. */ |
307 | spin_lock_irqsave(&ha->hardware_lock, flags); | 316 | memcpy(buf, &vpd_cache[off], count); |
308 | ha->isp_ops->read_nvram(ha, (uint8_t *)buf, ha->vpd_base, | ||
309 | ha->vpd_size); | ||
310 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | ||
311 | 317 | ||
312 | return ha->vpd_size; | 318 | return count; |
313 | } | 319 | } |
314 | 320 | ||
315 | static ssize_t | 321 | static ssize_t |
@@ -327,6 +333,7 @@ qla2x00_sysfs_write_vpd(struct kobject *kobj, | |||
327 | /* Write NVRAM. */ | 333 | /* Write NVRAM. */ |
328 | spin_lock_irqsave(&ha->hardware_lock, flags); | 334 | spin_lock_irqsave(&ha->hardware_lock, flags); |
329 | ha->isp_ops->write_nvram(ha, (uint8_t *)buf, ha->vpd_base, count); | 335 | ha->isp_ops->write_nvram(ha, (uint8_t *)buf, ha->vpd_base, count); |
336 | ha->isp_ops->read_nvram(ha, (uint8_t *)ha->vpd, ha->vpd_base, count); | ||
330 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | 337 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
331 | 338 | ||
332 | return count; | 339 | return count; |
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h index 0c9f36c8a248..27ae3a532a55 100644 --- a/drivers/scsi/qla2xxx/qla_def.h +++ b/drivers/scsi/qla2xxx/qla_def.h | |||
@@ -2340,10 +2340,14 @@ typedef struct scsi_qla_host { | |||
2340 | uint8_t serial2; | 2340 | uint8_t serial2; |
2341 | 2341 | ||
2342 | /* NVRAM configuration data */ | 2342 | /* NVRAM configuration data */ |
2343 | #define MAX_NVRAM_SIZE 4096 | ||
2344 | #define VPD_OFFSET MAX_NVRAM_SIZE / 2 | ||
2343 | uint16_t nvram_size; | 2345 | uint16_t nvram_size; |
2344 | uint16_t nvram_base; | 2346 | uint16_t nvram_base; |
2347 | void *nvram; | ||
2345 | uint16_t vpd_size; | 2348 | uint16_t vpd_size; |
2346 | uint16_t vpd_base; | 2349 | uint16_t vpd_base; |
2350 | void *vpd; | ||
2347 | 2351 | ||
2348 | uint16_t loop_reset_delay; | 2352 | uint16_t loop_reset_delay; |
2349 | uint8_t retry_count; | 2353 | uint8_t retry_count; |
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c index 5ec798c2bf13..374abe19b547 100644 --- a/drivers/scsi/qla2xxx/qla_init.c +++ b/drivers/scsi/qla2xxx/qla_init.c | |||
@@ -1461,8 +1461,8 @@ qla2x00_nvram_config(scsi_qla_host_t *ha) | |||
1461 | uint16_t cnt; | 1461 | uint16_t cnt; |
1462 | uint8_t *dptr1, *dptr2; | 1462 | uint8_t *dptr1, *dptr2; |
1463 | init_cb_t *icb = ha->init_cb; | 1463 | init_cb_t *icb = ha->init_cb; |
1464 | nvram_t *nv = (nvram_t *)ha->request_ring; | 1464 | nvram_t *nv = ha->nvram; |
1465 | uint8_t *ptr = (uint8_t *)ha->request_ring; | 1465 | uint8_t *ptr = ha->nvram; |
1466 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; | 1466 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1467 | 1467 | ||
1468 | rval = QLA_SUCCESS; | 1468 | rval = QLA_SUCCESS; |
@@ -1480,8 +1480,7 @@ qla2x00_nvram_config(scsi_qla_host_t *ha) | |||
1480 | chksum += *ptr++; | 1480 | chksum += *ptr++; |
1481 | 1481 | ||
1482 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no)); | 1482 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no)); |
1483 | DEBUG5(qla2x00_dump_buffer((uint8_t *)ha->request_ring, | 1483 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
1484 | ha->nvram_size)); | ||
1485 | 1484 | ||
1486 | /* Bad NVRAM data, set defaults parameters. */ | 1485 | /* Bad NVRAM data, set defaults parameters. */ |
1487 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || | 1486 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || |
@@ -3500,7 +3499,7 @@ qla24xx_nvram_config(scsi_qla_host_t *ha) | |||
3500 | 3499 | ||
3501 | rval = QLA_SUCCESS; | 3500 | rval = QLA_SUCCESS; |
3502 | icb = (struct init_cb_24xx *)ha->init_cb; | 3501 | icb = (struct init_cb_24xx *)ha->init_cb; |
3503 | nv = (struct nvram_24xx *)ha->request_ring; | 3502 | nv = ha->nvram; |
3504 | 3503 | ||
3505 | /* Determine NVRAM starting address. */ | 3504 | /* Determine NVRAM starting address. */ |
3506 | ha->nvram_size = sizeof(struct nvram_24xx); | 3505 | ha->nvram_size = sizeof(struct nvram_24xx); |
@@ -3512,7 +3511,12 @@ qla24xx_nvram_config(scsi_qla_host_t *ha) | |||
3512 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; | 3511 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; |
3513 | } | 3512 | } |
3514 | 3513 | ||
3515 | /* Get NVRAM data and calculate checksum. */ | 3514 | /* Get VPD data into cache */ |
3515 | ha->vpd = ha->nvram + VPD_OFFSET; | ||
3516 | ha->isp_ops->read_nvram(ha, (uint8_t *)ha->vpd, | ||
3517 | ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); | ||
3518 | |||
3519 | /* Get NVRAM data into cache and calculate checksum. */ | ||
3516 | dptr = (uint32_t *)nv; | 3520 | dptr = (uint32_t *)nv; |
3517 | ha->isp_ops->read_nvram(ha, (uint8_t *)dptr, ha->nvram_base, | 3521 | ha->isp_ops->read_nvram(ha, (uint8_t *)dptr, ha->nvram_base, |
3518 | ha->nvram_size); | 3522 | ha->nvram_size); |
@@ -3520,8 +3524,7 @@ qla24xx_nvram_config(scsi_qla_host_t *ha) | |||
3520 | chksum += le32_to_cpu(*dptr++); | 3524 | chksum += le32_to_cpu(*dptr++); |
3521 | 3525 | ||
3522 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no)); | 3526 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no)); |
3523 | DEBUG5(qla2x00_dump_buffer((uint8_t *)ha->request_ring, | 3527 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
3524 | ha->nvram_size)); | ||
3525 | 3528 | ||
3526 | /* Bad NVRAM data, set defaults parameters. */ | 3529 | /* Bad NVRAM data, set defaults parameters. */ |
3527 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | 3530 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' |
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c index b8f226ae2633..50539da467bf 100644 --- a/drivers/scsi/qla2xxx/qla_isr.c +++ b/drivers/scsi/qla2xxx/qla_isr.c | |||
@@ -1068,7 +1068,7 @@ qla2x00_status_entry(scsi_qla_host_t *ha, void *pkt) | |||
1068 | * values. | 1068 | * values. |
1069 | */ | 1069 | */ |
1070 | if (resid && | 1070 | if (resid && |
1071 | ((unsigned)(cp->request_bufflen - resid) < | 1071 | ((unsigned)(scsi_bufflen(cp) - resid) < |
1072 | cp->underflow)) { | 1072 | cp->underflow)) { |
1073 | DEBUG2(qla_printk(KERN_INFO, ha, | 1073 | DEBUG2(qla_printk(KERN_INFO, ha, |
1074 | "scsi(%ld:%d:%d:%d): Mid-layer underflow " | 1074 | "scsi(%ld:%d:%d:%d): Mid-layer underflow " |
@@ -1076,7 +1076,7 @@ qla2x00_status_entry(scsi_qla_host_t *ha, void *pkt) | |||
1076 | "error status.\n", ha->host_no, | 1076 | "error status.\n", ha->host_no, |
1077 | cp->device->channel, cp->device->id, | 1077 | cp->device->channel, cp->device->id, |
1078 | cp->device->lun, resid, | 1078 | cp->device->lun, resid, |
1079 | cp->request_bufflen)); | 1079 | scsi_bufflen(cp))); |
1080 | 1080 | ||
1081 | cp->result = DID_ERROR << 16 | lscsi_status; | 1081 | cp->result = DID_ERROR << 16 | lscsi_status; |
1082 | } | 1082 | } |
diff --git a/drivers/scsi/scsi_devinfo.c b/drivers/scsi/scsi_devinfo.c index 19c44f0781fd..e2ea739e33df 100644 --- a/drivers/scsi/scsi_devinfo.c +++ b/drivers/scsi/scsi_devinfo.c | |||
@@ -154,6 +154,9 @@ static struct { | |||
154 | {"EMC", "Invista", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, | 154 | {"EMC", "Invista", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, |
155 | {"EMC", "SYMMETRIX", NULL, BLIST_SPARSELUN | BLIST_LARGELUN | BLIST_FORCELUN}, | 155 | {"EMC", "SYMMETRIX", NULL, BLIST_SPARSELUN | BLIST_LARGELUN | BLIST_FORCELUN}, |
156 | {"EMULEX", "MD21/S2 ESDI", NULL, BLIST_SINGLELUN}, | 156 | {"EMULEX", "MD21/S2 ESDI", NULL, BLIST_SINGLELUN}, |
157 | {"easyRAID", "16P", NULL, BLIST_NOREPORTLUN}, | ||
158 | {"easyRAID", "X6P", NULL, BLIST_NOREPORTLUN}, | ||
159 | {"easyRAID", "F8", NULL, BLIST_NOREPORTLUN}, | ||
157 | {"FSC", "CentricStor", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, | 160 | {"FSC", "CentricStor", "*", BLIST_SPARSELUN | BLIST_LARGELUN}, |
158 | {"Generic", "USB SD Reader", "1.00", BLIST_FORCELUN | BLIST_INQUIRY_36}, | 161 | {"Generic", "USB SD Reader", "1.00", BLIST_FORCELUN | BLIST_INQUIRY_36}, |
159 | {"Generic", "USB Storage-SMC", "0180", BLIST_FORCELUN | BLIST_INQUIRY_36}, | 162 | {"Generic", "USB Storage-SMC", "0180", BLIST_FORCELUN | BLIST_INQUIRY_36}, |
diff --git a/drivers/scsi/sym53c8xx_2/sym_glue.c b/drivers/scsi/sym53c8xx_2/sym_glue.c index 15a51459c81f..3db22325ea2c 100644 --- a/drivers/scsi/sym53c8xx_2/sym_glue.c +++ b/drivers/scsi/sym53c8xx_2/sym_glue.c | |||
@@ -2033,7 +2033,7 @@ static struct pci_device_id sym2_id_table[] __devinitdata = { | |||
2033 | { PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_NCR_53C875, | 2033 | { PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_NCR_53C875, |
2034 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | 2034 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, |
2035 | { PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_NCR_53C1510, | 2035 | { PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_NCR_53C1510, |
2036 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, /* new */ | 2036 | PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_SCSI<<8, 0xffff00, 0UL }, /* new */ |
2037 | { PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_53C895A, | 2037 | { PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_53C895A, |
2038 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | 2038 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, |
2039 | { PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_53C875A, | 2039 | { PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_53C875A, |