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authorSascha Hauer <s.hauer@pengutronix.de>2005-05-05 18:14:15 -0400
committerJeff Garzik <jgarzik@pobox.com>2005-05-15 18:31:07 -0400
commita1365275e745bb0a173c918a52bcdfa6ce122f7e (patch)
tree81385d67fed6e10d177d1b26ae48966b33b037ef /drivers
parent88d7bd8cb9eb8d64bf7997600b0d64f7834047c5 (diff)
[PATCH] DM9000 network driver
This patch adds support for the davicom dm9000 network driver. The dm9000 is found on some embedded arm boards such as the pimx1 or the scb9328. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Andrew Morton <akpm@osdl.org> diff -puN /dev/null drivers/net/dm9000.c
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/Kconfig12
-rw-r--r--drivers/net/Makefile1
-rw-r--r--drivers/net/dm9000.c1219
-rw-r--r--drivers/net/dm9000.h135
4 files changed, 1367 insertions, 0 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 3a0a55b62aaf..4d0c1fb15c7c 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -824,6 +824,18 @@ config SMC9194
824 <file:Documentation/networking/net-modules.txt>. The module 824 <file:Documentation/networking/net-modules.txt>. The module
825 will be called smc9194. 825 will be called smc9194.
826 826
827config DM9000
828 tristate "DM9000 support"
829 depends on ARM && NET_ETHERNET
830 select CRC32
831 select MII
832 ---help---
833 Support for DM9000 chipset.
834
835 To compile this driver as a module, choose M here and read
836 <file:Documentation/networking/net-modules.txt>. The module will be
837 called dm9000.
838
827config NET_VENDOR_RACAL 839config NET_VENDOR_RACAL
828 bool "Racal-Interlan (Micom) NI cards" 840 bool "Racal-Interlan (Micom) NI cards"
829 depends on NET_ETHERNET && ISA 841 depends on NET_ETHERNET && ISA
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 6202b10dbb4d..cbd11688608e 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -179,6 +179,7 @@ obj-$(CONFIG_AMD8111_ETH) += amd8111e.o
179obj-$(CONFIG_IBMVETH) += ibmveth.o 179obj-$(CONFIG_IBMVETH) += ibmveth.o
180obj-$(CONFIG_S2IO) += s2io.o 180obj-$(CONFIG_S2IO) += s2io.o
181obj-$(CONFIG_SMC91X) += smc91x.o 181obj-$(CONFIG_SMC91X) += smc91x.o
182obj-$(CONFIG_DM9000) += dm9000.o
182obj-$(CONFIG_FEC_8XX) += fec_8xx/ 183obj-$(CONFIG_FEC_8XX) += fec_8xx/
183 184
184obj-$(CONFIG_ARM) += arm/ 185obj-$(CONFIG_ARM) += arm/
diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c
new file mode 100644
index 000000000000..f4ba0ffb8637
--- /dev/null
+++ b/drivers/net/dm9000.c
@@ -0,0 +1,1219 @@
1/*
2 * dm9000.c: Version 1.2 03/18/2003
3 *
4 * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
5 * Copyright (C) 1997 Sten Wang
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
18 *
19 * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
20 * 06/22/2001 Support DM9801 progrmming
21 * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
22 * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
23 * R17 = (R17 & 0xfff0) | NF + 3
24 * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
25 * R17 = (R17 & 0xfff0) | NF
26 *
27 * v1.00 modify by simon 2001.9.5
28 * change for kernel 2.4.x
29 *
30 * v1.1 11/09/2001 fix force mode bug
31 *
32 * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
33 * Fixed phy reset.
34 * Added tx/rx 32 bit mode.
35 * Cleaned up for kernel merge.
36 *
37 * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de>
38 * Port to 2.6 kernel
39 *
40 * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk>
41 * Cleanup of code to remove ifdefs
42 * Allowed platform device data to influence access width
43 * Reformatting areas of code
44 *
45 * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de>
46 * * removed 2.4 style module parameters
47 * * removed removed unused stat counter and fixed
48 * net_device_stats
49 * * introduced tx_timeout function
50 * * reworked locking
51 */
52
53#include <linux/module.h>
54#include <linux/ioport.h>
55#include <linux/netdevice.h>
56#include <linux/etherdevice.h>
57#include <linux/init.h>
58#include <linux/skbuff.h>
59#include <linux/version.h>
60#include <linux/spinlock.h>
61#include <linux/crc32.h>
62#include <linux/mii.h>
63#include <linux/dm9000.h>
64#include <linux/delay.h>
65
66#include <asm/delay.h>
67#include <asm/irq.h>
68#include <asm/io.h>
69
70#include "dm9000.h"
71
72/* Board/System/Debug information/definition ---------------- */
73
74#define DM9000_PHY 0x40 /* PHY address 0x01 */
75
76#define TRUE 1
77#define FALSE 0
78
79#define CARDNAME "dm9000"
80#define PFX CARDNAME ": "
81
82#define DM9000_TIMER_WUT jiffies+(HZ*2) /* timer wakeup time : 2 second */
83
84#define DM9000_DEBUG 0
85
86#if DM9000_DEBUG > 2
87#define PRINTK3(args...) printk(CARDNAME ": " args)
88#else
89#define PRINTK3(args...) do { } while(0)
90#endif
91
92#if DM9000_DEBUG > 1
93#define PRINTK2(args...) printk(CARDNAME ": " args)
94#else
95#define PRINTK2(args...) do { } while(0)
96#endif
97
98#if DM9000_DEBUG > 0
99#define PRINTK1(args...) printk(CARDNAME ": " args)
100#define PRINTK(args...) printk(CARDNAME ": " args)
101#else
102#define PRINTK1(args...) do { } while(0)
103#define PRINTK(args...) printk(KERN_DEBUG args)
104#endif
105
106/*
107 * Transmit timeout, default 5 seconds.
108 */
109static int watchdog = 5000;
110module_param(watchdog, int, 0400);
111MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
112
113/* Structure/enum declaration ------------------------------- */
114typedef struct board_info {
115
116 void __iomem *io_addr; /* Register I/O base address */
117 void __iomem *io_data; /* Data I/O address */
118 u16 irq; /* IRQ */
119
120 u16 tx_pkt_cnt;
121 u16 queue_pkt_len;
122 u16 queue_start_addr;
123 u16 dbug_cnt;
124 u8 io_mode; /* 0:word, 2:byte */
125 u8 phy_addr;
126
127 void (*inblk)(void __iomem *port, void *data, int length);
128 void (*outblk)(void __iomem *port, void *data, int length);
129 void (*dumpblk)(void __iomem *port, int length);
130
131 struct resource *addr_res; /* resources found */
132 struct resource *data_res;
133 struct resource *addr_req; /* resources requested */
134 struct resource *data_req;
135 struct resource *irq_res;
136
137 struct timer_list timer;
138 struct net_device_stats stats;
139 unsigned char srom[128];
140 spinlock_t lock;
141
142 struct mii_if_info mii;
143 u32 msg_enable;
144} board_info_t;
145
146/* function declaration ------------------------------------- */
147static int dm9000_probe(struct device *);
148static int dm9000_open(struct net_device *);
149static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
150static int dm9000_stop(struct net_device *);
151static int dm9000_do_ioctl(struct net_device *, struct ifreq *, int);
152
153
154static void dm9000_timer(unsigned long);
155static void dm9000_init_dm9000(struct net_device *);
156
157static struct net_device_stats *dm9000_get_stats(struct net_device *);
158
159static irqreturn_t dm9000_interrupt(int, void *, struct pt_regs *);
160
161static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
162static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
163 int value);
164static u16 read_srom_word(board_info_t *, int);
165static void dm9000_rx(struct net_device *);
166static void dm9000_hash_table(struct net_device *);
167
168//#define DM9000_PROGRAM_EEPROM
169#ifdef DM9000_PROGRAM_EEPROM
170static void program_eeprom(board_info_t * db);
171#endif
172/* DM9000 network board routine ---------------------------- */
173
174static void
175dm9000_reset(board_info_t * db)
176{
177 PRINTK1("dm9000x: resetting\n");
178 /* RESET device */
179 writeb(DM9000_NCR, db->io_addr);
180 udelay(200);
181 writeb(NCR_RST, db->io_data);
182 udelay(200);
183}
184
185/*
186 * Read a byte from I/O port
187 */
188static u8
189ior(board_info_t * db, int reg)
190{
191 writeb(reg, db->io_addr);
192 return readb(db->io_data);
193}
194
195/*
196 * Write a byte to I/O port
197 */
198
199static void
200iow(board_info_t * db, int reg, int value)
201{
202 writeb(reg, db->io_addr);
203 writeb(value, db->io_data);
204}
205
206/* routines for sending block to chip */
207
208static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
209{
210 writesb(reg, data, count);
211}
212
213static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
214{
215 writesw(reg, data, (count+1) >> 1);
216}
217
218static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
219{
220 writesl(reg, data, (count+3) >> 2);
221}
222
223/* input block from chip to memory */
224
225static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
226{
227 readsb(reg, data, count+1);
228}
229
230
231static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
232{
233 readsw(reg, data, (count+1) >> 1);
234}
235
236static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
237{
238 readsl(reg, data, (count+3) >> 2);
239}
240
241/* dump block from chip to null */
242
243static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
244{
245 int i;
246 int tmp;
247
248 for (i = 0; i < count; i++)
249 tmp = readb(reg);
250}
251
252static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
253{
254 int i;
255 int tmp;
256
257 count = (count + 1) >> 1;
258
259 for (i = 0; i < count; i++)
260 tmp = readw(reg);
261}
262
263static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
264{
265 int i;
266 int tmp;
267
268 count = (count + 3) >> 2;
269
270 for (i = 0; i < count; i++)
271 tmp = readl(reg);
272}
273
274/* dm9000_set_io
275 *
276 * select the specified set of io routines to use with the
277 * device
278 */
279
280static void dm9000_set_io(struct board_info *db, int byte_width)
281{
282 /* use the size of the data resource to work out what IO
283 * routines we want to use
284 */
285
286 switch (byte_width) {
287 case 1:
288 db->dumpblk = dm9000_dumpblk_8bit;
289 db->outblk = dm9000_outblk_8bit;
290 db->inblk = dm9000_inblk_8bit;
291 break;
292
293 case 2:
294 db->dumpblk = dm9000_dumpblk_16bit;
295 db->outblk = dm9000_outblk_16bit;
296 db->inblk = dm9000_inblk_16bit;
297 break;
298
299 case 3:
300 printk(KERN_ERR PFX ": 3 byte IO, falling back to 16bit\n");
301 db->dumpblk = dm9000_dumpblk_16bit;
302 db->outblk = dm9000_outblk_16bit;
303 db->inblk = dm9000_inblk_16bit;
304 break;
305
306 case 4:
307 default:
308 db->dumpblk = dm9000_dumpblk_32bit;
309 db->outblk = dm9000_outblk_32bit;
310 db->inblk = dm9000_inblk_32bit;
311 break;
312 }
313}
314
315
316/* Our watchdog timed out. Called by the networking layer */
317static void dm9000_timeout(struct net_device *dev)
318{
319 board_info_t *db = (board_info_t *) dev->priv;
320 u8 reg_save;
321 unsigned long flags;
322
323 /* Save previous register address */
324 reg_save = readb(db->io_addr);
325 spin_lock_irqsave(db->lock,flags);
326
327 netif_stop_queue(dev);
328 dm9000_reset(db);
329 dm9000_init_dm9000(dev);
330 /* We can accept TX packets again */
331 dev->trans_start = jiffies;
332 netif_wake_queue(dev);
333
334 /* Restore previous register address */
335 writeb(reg_save, db->io_addr);
336 spin_unlock_irqrestore(db->lock,flags);
337}
338
339
340/* dm9000_release_board
341 *
342 * release a board, and any mapped resources
343 */
344
345static void
346dm9000_release_board(struct platform_device *pdev, struct board_info *db)
347{
348 if (db->data_res == NULL) {
349 if (db->addr_res != NULL)
350 release_mem_region((unsigned long)db->io_addr, 4);
351 return;
352 }
353
354 /* unmap our resources */
355
356 iounmap(db->io_addr);
357 iounmap(db->io_data);
358
359 /* release the resources */
360
361 if (db->data_req != NULL) {
362 release_resource(db->data_req);
363 kfree(db->data_req);
364 }
365
366 if (db->addr_res != NULL) {
367 release_resource(db->data_req);
368 kfree(db->addr_req);
369 }
370}
371
372#define res_size(_r) (((_r)->end - (_r)->start) + 1)
373
374/*
375 * Search DM9000 board, allocate space and register it
376 */
377static int
378dm9000_probe(struct device *dev)
379{
380 struct platform_device *pdev = to_platform_device(dev);
381 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
382 struct board_info *db; /* Point a board information structure */
383 struct net_device *ndev;
384 unsigned long base;
385 int ret = 0;
386 int iosize;
387 int i;
388 u32 id_val;
389
390 printk(KERN_INFO "%s Ethernet Driver\n", CARDNAME);
391
392 /* Init network device */
393 ndev = alloc_etherdev(sizeof (struct board_info));
394 if (!ndev) {
395 printk("%s: could not allocate device.\n", CARDNAME);
396 return -ENOMEM;
397 }
398
399 SET_MODULE_OWNER(ndev);
400 SET_NETDEV_DEV(ndev, dev);
401
402 PRINTK2("dm9000_probe()");
403
404 /* setup board info structure */
405 db = (struct board_info *) ndev->priv;
406 memset(db, 0, sizeof (*db));
407
408 if (pdev->num_resources < 2) {
409 ret = -ENODEV;
410 goto out;
411 }
412
413 switch (pdev->num_resources) {
414 case 2:
415 base = pdev->resource[0].start;
416
417 if (!request_mem_region(base, 4, ndev->name)) {
418 ret = -EBUSY;
419 goto out;
420 }
421
422 ndev->base_addr = base;
423 ndev->irq = pdev->resource[1].start;
424 db->io_addr = (void *)base;
425 db->io_data = (void *)(base + 4);
426
427 break;
428
429 case 3:
430 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
431 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
432 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
433
434 if (db->addr_res == NULL || db->data_res == NULL) {
435 printk(KERN_ERR PFX "insufficient resources\n");
436 ret = -ENOENT;
437 goto out;
438 }
439
440 i = res_size(db->addr_res);
441 db->addr_req = request_mem_region(db->addr_res->start, i,
442 pdev->name);
443
444 if (db->addr_req == NULL) {
445 printk(KERN_ERR PFX "cannot claim address reg area\n");
446 ret = -EIO;
447 goto out;
448 }
449
450 db->io_addr = ioremap(db->addr_res->start, i);
451
452 if (db->io_addr == NULL) {
453 printk(KERN_ERR "failed to ioremap address reg\n");
454 ret = -EINVAL;
455 goto out;
456 }
457
458 iosize = res_size(db->data_res);
459 db->data_req = request_mem_region(db->data_res->start, iosize,
460 pdev->name);
461
462 if (db->data_req == NULL) {
463 printk(KERN_ERR PFX "cannot claim data reg area\n");
464 ret = -EIO;
465 goto out;
466 }
467
468 db->io_data = ioremap(db->data_res->start, iosize);
469
470 if (db->io_data == NULL) {
471 printk(KERN_ERR "failed to ioremap data reg\n");
472 ret = -EINVAL;
473 goto out;
474 }
475
476 /* fill in parameters for net-dev structure */
477
478 ndev->base_addr = (unsigned long)db->io_addr;
479 ndev->irq = db->irq_res->start;
480
481 /* ensure at least we have a default set of IO routines */
482 dm9000_set_io(db, iosize);
483
484 }
485
486 /* check to see if anything is being over-ridden */
487 if (pdata != NULL) {
488 /* check to see if the driver wants to over-ride the
489 * default IO width */
490
491 if (pdata->flags & DM9000_PLATF_8BITONLY)
492 dm9000_set_io(db, 1);
493
494 if (pdata->flags & DM9000_PLATF_16BITONLY)
495 dm9000_set_io(db, 2);
496
497 if (pdata->flags & DM9000_PLATF_32BITONLY)
498 dm9000_set_io(db, 4);
499
500 /* check to see if there are any IO routine
501 * over-rides */
502
503 if (pdata->inblk != NULL)
504 db->inblk = pdata->inblk;
505
506 if (pdata->outblk != NULL)
507 db->outblk = pdata->outblk;
508
509 if (pdata->dumpblk != NULL)
510 db->dumpblk = pdata->dumpblk;
511 }
512
513 dm9000_reset(db);
514
515 /* try two times, DM9000 sometimes gets the first read wrong */
516 for (i = 0; i < 2; i++) {
517 id_val = ior(db, DM9000_VIDL);
518 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
519 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
520 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
521
522 if (id_val == DM9000_ID)
523 break;
524 printk("%s: read wrong id 0x%08x\n", CARDNAME, id_val);
525 }
526
527 if (id_val != DM9000_ID) {
528 printk("%s: wrong id: 0x%08x\n", CARDNAME, id_val);
529 goto release;
530 }
531
532 /* from this point we assume that we have found a DM9000 */
533
534 /* driver system function */
535 ether_setup(ndev);
536
537 ndev->open = &dm9000_open;
538 ndev->hard_start_xmit = &dm9000_start_xmit;
539 ndev->tx_timeout = &dm9000_timeout;
540 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
541 ndev->stop = &dm9000_stop;
542 ndev->get_stats = &dm9000_get_stats;
543 ndev->set_multicast_list = &dm9000_hash_table;
544 ndev->do_ioctl = &dm9000_do_ioctl;
545
546#ifdef DM9000_PROGRAM_EEPROM
547 program_eeprom(db);
548#endif
549 db->msg_enable = NETIF_MSG_LINK;
550 db->mii.phy_id_mask = 0x1f;
551 db->mii.reg_num_mask = 0x1f;
552 db->mii.force_media = 0;
553 db->mii.full_duplex = 0;
554 db->mii.dev = ndev;
555 db->mii.mdio_read = dm9000_phy_read;
556 db->mii.mdio_write = dm9000_phy_write;
557
558 /* Read SROM content */
559 for (i = 0; i < 64; i++)
560 ((u16 *) db->srom)[i] = read_srom_word(db, i);
561
562 /* Set Node Address */
563 for (i = 0; i < 6; i++)
564 ndev->dev_addr[i] = db->srom[i];
565
566 if (!is_valid_ether_addr(ndev->dev_addr))
567 printk("%s: Invalid ethernet MAC address. Please "
568 "set using ifconfig\n", ndev->name);
569
570 dev_set_drvdata(dev, ndev);
571 ret = register_netdev(ndev);
572
573 if (ret == 0) {
574 printk("%s: dm9000 at %p,%p IRQ %d MAC: ",
575 ndev->name, db->io_addr, db->io_data, ndev->irq);
576 for (i = 0; i < 5; i++)
577 printk("%02x:", ndev->dev_addr[i]);
578 printk("%02x\n", ndev->dev_addr[5]);
579 }
580 return 0;
581
582 release:
583 out:
584 printk("%s: not found (%d).\n", CARDNAME, ret);
585
586 dm9000_release_board(pdev, db);
587 kfree(ndev);
588
589 return ret;
590}
591
592/*
593 * Open the interface.
594 * The interface is opened whenever "ifconfig" actives it.
595 */
596static int
597dm9000_open(struct net_device *dev)
598{
599 board_info_t *db = (board_info_t *) dev->priv;
600
601 PRINTK2("entering dm9000_open\n");
602
603 if (request_irq(dev->irq, &dm9000_interrupt, SA_SHIRQ, dev->name, dev))
604 return -EAGAIN;
605
606 /* Initialize DM9000 board */
607 dm9000_reset(db);
608 dm9000_init_dm9000(dev);
609
610 /* Init driver variable */
611 db->dbug_cnt = 0;
612
613 /* set and active a timer process */
614 init_timer(&db->timer);
615 db->timer.expires = DM9000_TIMER_WUT * 2;
616 db->timer.data = (unsigned long) dev;
617 db->timer.function = &dm9000_timer;
618 add_timer(&db->timer);
619
620 mii_check_media(&db->mii, netif_msg_link(db), 1);
621 netif_start_queue(dev);
622
623 return 0;
624}
625
626/*
627 * Initilize dm9000 board
628 */
629static void
630dm9000_init_dm9000(struct net_device *dev)
631{
632 board_info_t *db = (board_info_t *) dev->priv;
633
634 PRINTK1("entering %s\n",__FUNCTION__);
635
636 /* I/O mode */
637 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
638
639 /* GPIO0 on pre-activate PHY */
640 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
641 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
642 iow(db, DM9000_GPR, 0); /* Enable PHY */
643
644 /* Program operating register */
645 iow(db, DM9000_TCR, 0); /* TX Polling clear */
646 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
647 iow(db, DM9000_FCR, 0xff); /* Flow Control */
648 iow(db, DM9000_SMCR, 0); /* Special Mode */
649 /* clear TX status */
650 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
651 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
652
653 /* Set address filter table */
654 dm9000_hash_table(dev);
655
656 /* Activate DM9000 */
657 iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
658 /* Enable TX/RX interrupt mask */
659 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
660
661 /* Init Driver variable */
662 db->tx_pkt_cnt = 0;
663 db->queue_pkt_len = 0;
664 dev->trans_start = 0;
665 spin_lock_init(&db->lock);
666}
667
668/*
669 * Hardware start transmission.
670 * Send a packet to media from the upper layer.
671 */
672static int
673dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
674{
675 board_info_t *db = (board_info_t *) dev->priv;
676
677 PRINTK3("dm9000_start_xmit\n");
678
679 if (db->tx_pkt_cnt > 1)
680 return 1;
681
682 netif_stop_queue(dev);
683
684 /* Disable all interrupts */
685 iow(db, DM9000_IMR, IMR_PAR);
686
687 /* Move data to DM9000 TX RAM */
688 writeb(DM9000_MWCMD, db->io_addr);
689
690 (db->outblk)(db->io_data, skb->data, skb->len);
691 db->stats.tx_bytes += skb->len;
692
693 /* TX control: First packet immediately send, second packet queue */
694 if (db->tx_pkt_cnt == 0) {
695
696 /* First Packet */
697 db->tx_pkt_cnt++;
698
699 /* Set TX length to DM9000 */
700 iow(db, DM9000_TXPLL, skb->len & 0xff);
701 iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
702
703 /* Issue TX polling command */
704 iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
705
706 dev->trans_start = jiffies; /* save the time stamp */
707
708 } else {
709 /* Second packet */
710 db->tx_pkt_cnt++;
711 db->queue_pkt_len = skb->len;
712 }
713
714 /* free this SKB */
715 dev_kfree_skb(skb);
716
717 /* Re-enable resource check */
718 if (db->tx_pkt_cnt == 1)
719 netif_wake_queue(dev);
720
721 /* Re-enable interrupt */
722 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
723
724 return 0;
725}
726
727static void
728dm9000_shutdown(struct net_device *dev)
729{
730 board_info_t *db = (board_info_t *) dev->priv;
731
732 /* RESET device */
733 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
734 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
735 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
736 iow(db, DM9000_RCR, 0x00); /* Disable RX */
737}
738
739/*
740 * Stop the interface.
741 * The interface is stopped when it is brought.
742 */
743static int
744dm9000_stop(struct net_device *ndev)
745{
746 board_info_t *db = (board_info_t *) ndev->priv;
747
748 PRINTK1("entering %s\n",__FUNCTION__);
749
750 /* deleted timer */
751 del_timer(&db->timer);
752
753 netif_stop_queue(ndev);
754 netif_carrier_off(ndev);
755
756 /* free interrupt */
757 free_irq(ndev->irq, ndev);
758
759 dm9000_shutdown(ndev);
760
761 return 0;
762}
763
764/*
765 * DM9000 interrupt handler
766 * receive the packet to upper layer, free the transmitted packet
767 */
768
769void
770dm9000_tx_done(struct net_device *dev, board_info_t * db)
771{
772 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
773
774 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
775 /* One packet sent complete */
776 db->tx_pkt_cnt--;
777 db->stats.tx_packets++;
778
779 /* Queue packet check & send */
780 if (db->tx_pkt_cnt > 0) {
781 iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff);
782 iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff);
783 iow(db, DM9000_TCR, TCR_TXREQ);
784 dev->trans_start = jiffies;
785 }
786 netif_wake_queue(dev);
787 }
788}
789
790static irqreturn_t
791dm9000_interrupt(int irq, void *dev_id, struct pt_regs *regs)
792{
793 struct net_device *dev = dev_id;
794 board_info_t *db;
795 int int_status;
796 u8 reg_save;
797
798 PRINTK3("entering %s\n",__FUNCTION__);
799
800 if (!dev) {
801 PRINTK1("dm9000_interrupt() without DEVICE arg\n");
802 return IRQ_HANDLED;
803 }
804
805 /* A real interrupt coming */
806 db = (board_info_t *) dev->priv;
807 spin_lock(&db->lock);
808
809 /* Save previous register address */
810 reg_save = readb(db->io_addr);
811
812 /* Disable all interrupts */
813 iow(db, DM9000_IMR, IMR_PAR);
814
815 /* Got DM9000 interrupt status */
816 int_status = ior(db, DM9000_ISR); /* Got ISR */
817 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
818
819 /* Received the coming packet */
820 if (int_status & ISR_PRS)
821 dm9000_rx(dev);
822
823 /* Trnasmit Interrupt check */
824 if (int_status & ISR_PTS)
825 dm9000_tx_done(dev, db);
826
827 /* Re-enable interrupt mask */
828 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
829
830 /* Restore previous register address */
831 writeb(reg_save, db->io_addr);
832
833 spin_unlock(&db->lock);
834
835 return IRQ_HANDLED;
836}
837
838/*
839 * Get statistics from driver.
840 */
841static struct net_device_stats *
842dm9000_get_stats(struct net_device *dev)
843{
844 board_info_t *db = (board_info_t *) dev->priv;
845 return &db->stats;
846}
847
848/*
849 * Process the upper socket ioctl command
850 */
851static int
852dm9000_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
853{
854 PRINTK1("entering %s\n",__FUNCTION__);
855 return 0;
856}
857
858/*
859 * A periodic timer routine
860 * Dynamic media sense, allocated Rx buffer...
861 */
862static void
863dm9000_timer(unsigned long data)
864{
865 struct net_device *dev = (struct net_device *) data;
866 board_info_t *db = (board_info_t *) dev->priv;
867 u8 reg_save;
868 unsigned long flags;
869
870 PRINTK3("dm9000_timer()\n");
871
872 spin_lock_irqsave(db->lock,flags);
873 /* Save previous register address */
874 reg_save = readb(db->io_addr);
875
876 mii_check_media(&db->mii, netif_msg_link(db), 0);
877
878 /* Restore previous register address */
879 writeb(reg_save, db->io_addr);
880 spin_unlock_irqrestore(db->lock,flags);
881
882 /* Set timer again */
883 db->timer.expires = DM9000_TIMER_WUT;
884 add_timer(&db->timer);
885}
886
887struct dm9000_rxhdr {
888 u16 RxStatus;
889 u16 RxLen;
890} __attribute__((__packed__));
891
892/*
893 * Received a packet and pass to upper layer
894 */
895static void
896dm9000_rx(struct net_device *dev)
897{
898 board_info_t *db = (board_info_t *) dev->priv;
899 struct dm9000_rxhdr rxhdr;
900 struct sk_buff *skb;
901 u8 rxbyte, *rdptr;
902 int GoodPacket;
903 int RxLen;
904
905 /* Check packet ready or not */
906 do {
907 ior(db, DM9000_MRCMDX); /* Dummy read */
908
909 /* Get most updated data */
910 rxbyte = readb(db->io_data);
911
912 /* Status check: this byte must be 0 or 1 */
913 if (rxbyte > DM9000_PKT_RDY) {
914 printk("status check failed: %d\n", rxbyte);
915 iow(db, DM9000_RCR, 0x00); /* Stop Device */
916 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
917 return;
918 }
919
920 if (rxbyte != DM9000_PKT_RDY)
921 return;
922
923 /* A packet ready now & Get status/length */
924 GoodPacket = TRUE;
925 writeb(DM9000_MRCMD, db->io_addr);
926
927 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
928
929 RxLen = rxhdr.RxLen;
930
931 /* Packet Status check */
932 if (RxLen < 0x40) {
933 GoodPacket = FALSE;
934 PRINTK1("Bad Packet received (runt)\n");
935 }
936
937 if (RxLen > DM9000_PKT_MAX) {
938 PRINTK1("RST: RX Len:%x\n", RxLen);
939 }
940
941 if (rxhdr.RxStatus & 0xbf00) {
942 GoodPacket = FALSE;
943 if (rxhdr.RxStatus & 0x100) {
944 PRINTK1("fifo error\n");
945 db->stats.rx_fifo_errors++;
946 }
947 if (rxhdr.RxStatus & 0x200) {
948 PRINTK1("crc error\n");
949 db->stats.rx_crc_errors++;
950 }
951 if (rxhdr.RxStatus & 0x8000) {
952 PRINTK1("length error\n");
953 db->stats.rx_length_errors++;
954 }
955 }
956
957 /* Move data from DM9000 */
958 if (GoodPacket
959 && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
960 skb->dev = dev;
961 skb_reserve(skb, 2);
962 rdptr = (u8 *) skb_put(skb, RxLen - 4);
963
964 /* Read received packet from RX SRAM */
965
966 (db->inblk)(db->io_data, rdptr, RxLen);
967 db->stats.rx_bytes += RxLen;
968
969 /* Pass to upper layer */
970 skb->protocol = eth_type_trans(skb, dev);
971 netif_rx(skb);
972 db->stats.rx_packets++;
973
974 } else {
975 /* need to dump the packet's data */
976
977 (db->dumpblk)(db->io_data, RxLen);
978 }
979 } while (rxbyte == DM9000_PKT_RDY);
980}
981
982/*
983 * Read a word data from SROM
984 */
985static u16
986read_srom_word(board_info_t * db, int offset)
987{
988 iow(db, DM9000_EPAR, offset);
989 iow(db, DM9000_EPCR, EPCR_ERPRR);
990 mdelay(8); /* according to the datasheet 200us should be enough,
991 but it doesn't work */
992 iow(db, DM9000_EPCR, 0x0);
993 return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8));
994}
995
996#ifdef DM9000_PROGRAM_EEPROM
997/*
998 * Write a word data to SROM
999 */
1000static void
1001write_srom_word(board_info_t * db, int offset, u16 val)
1002{
1003 iow(db, DM9000_EPAR, offset);
1004 iow(db, DM9000_EPDRH, ((val >> 8) & 0xff));
1005 iow(db, DM9000_EPDRL, (val & 0xff));
1006 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
1007 mdelay(8); /* same shit */
1008 iow(db, DM9000_EPCR, 0);
1009}
1010
1011/*
1012 * Only for development:
1013 * Here we write static data to the eeprom in case
1014 * we don't have valid content on a new board
1015 */
1016static void
1017program_eeprom(board_info_t * db)
1018{
1019 u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */
1020 0x0000, /* Autoload: accept nothing */
1021 0x0a46, 0x9000, /* Vendor / Product ID */
1022 0x0000, /* pin control */
1023 0x0000,
1024 }; /* Wake-up mode control */
1025 int i;
1026 for (i = 0; i < 8; i++)
1027 write_srom_word(db, i, eeprom[i]);
1028}
1029#endif
1030
1031
1032/*
1033 * Calculate the CRC valude of the Rx packet
1034 * flag = 1 : return the reverse CRC (for the received packet CRC)
1035 * 0 : return the normal CRC (for Hash Table index)
1036 */
1037
1038static unsigned long
1039cal_CRC(unsigned char *Data, unsigned int Len, u8 flag)
1040{
1041
1042 u32 crc = ether_crc_le(Len, Data);
1043
1044 if (flag)
1045 return ~crc;
1046
1047 return crc;
1048}
1049
1050/*
1051 * Set DM9000 multicast address
1052 */
1053static void
1054dm9000_hash_table(struct net_device *dev)
1055{
1056 board_info_t *db = (board_info_t *) dev->priv;
1057 struct dev_mc_list *mcptr = dev->mc_list;
1058 int mc_cnt = dev->mc_count;
1059 u32 hash_val;
1060 u16 i, oft, hash_table[4];
1061 unsigned long flags;
1062
1063 PRINTK2("dm9000_hash_table()\n");
1064
1065 spin_lock_irqsave(&db->lock,flags);
1066
1067 for (i = 0, oft = 0x10; i < 6; i++, oft++)
1068 iow(db, oft, dev->dev_addr[i]);
1069
1070 /* Clear Hash Table */
1071 for (i = 0; i < 4; i++)
1072 hash_table[i] = 0x0;
1073
1074 /* broadcast address */
1075 hash_table[3] = 0x8000;
1076
1077 /* the multicast address in Hash Table : 64 bits */
1078 for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
1079 hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f;
1080 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
1081 }
1082
1083 /* Write the hash table to MAC MD table */
1084 for (i = 0, oft = 0x16; i < 4; i++) {
1085 iow(db, oft++, hash_table[i] & 0xff);
1086 iow(db, oft++, (hash_table[i] >> 8) & 0xff);
1087 }
1088
1089 spin_unlock_irqrestore(&db->lock,flags);
1090}
1091
1092
1093/*
1094 * Read a word from phyxcer
1095 */
1096static int
1097dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1098{
1099 board_info_t *db = (board_info_t *) dev->priv;
1100 unsigned long flags;
1101 int ret;
1102
1103 spin_lock_irqsave(&db->lock,flags);
1104 /* Fill the phyxcer register into REG_0C */
1105 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1106
1107 iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
1108 udelay(100); /* Wait read complete */
1109 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1110
1111 /* The read data keeps on REG_0D & REG_0E */
1112 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1113
1114 spin_unlock_irqrestore(&db->lock,flags);
1115
1116 return ret;
1117}
1118
1119/*
1120 * Write a word to phyxcer
1121 */
1122static void
1123dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
1124{
1125 board_info_t *db = (board_info_t *) dev->priv;
1126 unsigned long flags;
1127
1128 spin_lock_irqsave(&db->lock,flags);
1129
1130 /* Fill the phyxcer register into REG_0C */
1131 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1132
1133 /* Fill the written data into REG_0D & REG_0E */
1134 iow(db, DM9000_EPDRL, (value & 0xff));
1135 iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
1136
1137 iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
1138 udelay(500); /* Wait write complete */
1139 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1140
1141 spin_unlock_irqrestore(&db->lock,flags);
1142}
1143
1144static int
1145dm9000_drv_suspend(struct device *dev, u32 state, u32 level)
1146{
1147 struct net_device *ndev = dev_get_drvdata(dev);
1148
1149 if (ndev && level == SUSPEND_DISABLE) {
1150 if (netif_running(ndev)) {
1151 netif_device_detach(ndev);
1152 dm9000_shutdown(ndev);
1153 }
1154 }
1155 return 0;
1156}
1157
1158static int
1159dm9000_drv_resume(struct device *dev, u32 level)
1160{
1161 struct net_device *ndev = dev_get_drvdata(dev);
1162 board_info_t *db = (board_info_t *) ndev->priv;
1163
1164 if (ndev && level == RESUME_ENABLE) {
1165
1166 if (netif_running(ndev)) {
1167 dm9000_reset(db);
1168 dm9000_init_dm9000(ndev);
1169
1170 netif_device_attach(ndev);
1171 }
1172 }
1173 return 0;
1174}
1175
1176static int
1177dm9000_drv_remove(struct device *dev)
1178{
1179 struct platform_device *pdev = to_platform_device(dev);
1180 struct net_device *ndev = dev_get_drvdata(dev);
1181
1182 dev_set_drvdata(dev, NULL);
1183
1184 unregister_netdev(ndev);
1185 dm9000_release_board(pdev, (board_info_t *) ndev->priv);
1186 kfree(ndev); /* free device structure */
1187
1188 PRINTK1("clean_module() exit\n");
1189
1190 return 0;
1191}
1192
1193static struct device_driver dm9000_driver = {
1194 .name = "dm9000",
1195 .bus = &platform_bus_type,
1196 .probe = dm9000_probe,
1197 .remove = dm9000_drv_remove,
1198 .suspend = dm9000_drv_suspend,
1199 .resume = dm9000_drv_resume,
1200};
1201
1202static int __init
1203dm9000_init(void)
1204{
1205 return driver_register(&dm9000_driver); /* search board and register */
1206}
1207
1208static void __exit
1209dm9000_cleanup(void)
1210{
1211 driver_unregister(&dm9000_driver);
1212}
1213
1214module_init(dm9000_init);
1215module_exit(dm9000_cleanup);
1216
1217MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1218MODULE_DESCRIPTION("Davicom DM9000 network driver");
1219MODULE_LICENSE("GPL");
diff --git a/drivers/net/dm9000.h b/drivers/net/dm9000.h
new file mode 100644
index 000000000000..82cad360bafc
--- /dev/null
+++ b/drivers/net/dm9000.h
@@ -0,0 +1,135 @@
1/*
2 * dm9000 Ethernet
3 */
4
5#ifndef _DM9000X_H_
6#define _DM9000X_H_
7
8#define DM9000_ID 0x90000A46
9
10/* although the registers are 16 bit, they are 32-bit aligned.
11 */
12
13#define DM9000_NCR 0x00
14#define DM9000_NSR 0x01
15#define DM9000_TCR 0x02
16#define DM9000_TSR1 0x03
17#define DM9000_TSR2 0x04
18#define DM9000_RCR 0x05
19#define DM9000_RSR 0x06
20#define DM9000_ROCR 0x07
21#define DM9000_BPTR 0x08
22#define DM9000_FCTR 0x09
23#define DM9000_FCR 0x0A
24#define DM9000_EPCR 0x0B
25#define DM9000_EPAR 0x0C
26#define DM9000_EPDRL 0x0D
27#define DM9000_EPDRH 0x0E
28#define DM9000_WCR 0x0F
29
30#define DM9000_PAR 0x10
31#define DM9000_MAR 0x16
32
33#define DM9000_GPCR 0x1e
34#define DM9000_GPR 0x1f
35#define DM9000_TRPAL 0x22
36#define DM9000_TRPAH 0x23
37#define DM9000_RWPAL 0x24
38#define DM9000_RWPAH 0x25
39
40#define DM9000_VIDL 0x28
41#define DM9000_VIDH 0x29
42#define DM9000_PIDL 0x2A
43#define DM9000_PIDH 0x2B
44
45#define DM9000_CHIPR 0x2C
46#define DM9000_SMCR 0x2F
47
48#define DM9000_MRCMDX 0xF0
49#define DM9000_MRCMD 0xF2
50#define DM9000_MRRL 0xF4
51#define DM9000_MRRH 0xF5
52#define DM9000_MWCMDX 0xF6
53#define DM9000_MWCMD 0xF8
54#define DM9000_MWRL 0xFA
55#define DM9000_MWRH 0xFB
56#define DM9000_TXPLL 0xFC
57#define DM9000_TXPLH 0xFD
58#define DM9000_ISR 0xFE
59#define DM9000_IMR 0xFF
60
61#define NCR_EXT_PHY (1<<7)
62#define NCR_WAKEEN (1<<6)
63#define NCR_FCOL (1<<4)
64#define NCR_FDX (1<<3)
65#define NCR_LBK (3<<1)
66#define NCR_RST (1<<0)
67
68#define NSR_SPEED (1<<7)
69#define NSR_LINKST (1<<6)
70#define NSR_WAKEST (1<<5)
71#define NSR_TX2END (1<<3)
72#define NSR_TX1END (1<<2)
73#define NSR_RXOV (1<<1)
74
75#define TCR_TJDIS (1<<6)
76#define TCR_EXCECM (1<<5)
77#define TCR_PAD_DIS2 (1<<4)
78#define TCR_CRC_DIS2 (1<<3)
79#define TCR_PAD_DIS1 (1<<2)
80#define TCR_CRC_DIS1 (1<<1)
81#define TCR_TXREQ (1<<0)
82
83#define TSR_TJTO (1<<7)
84#define TSR_LC (1<<6)
85#define TSR_NC (1<<5)
86#define TSR_LCOL (1<<4)
87#define TSR_COL (1<<3)
88#define TSR_EC (1<<2)
89
90#define RCR_WTDIS (1<<6)
91#define RCR_DIS_LONG (1<<5)
92#define RCR_DIS_CRC (1<<4)
93#define RCR_ALL (1<<3)
94#define RCR_RUNT (1<<2)
95#define RCR_PRMSC (1<<1)
96#define RCR_RXEN (1<<0)
97
98#define RSR_RF (1<<7)
99#define RSR_MF (1<<6)
100#define RSR_LCS (1<<5)
101#define RSR_RWTO (1<<4)
102#define RSR_PLE (1<<3)
103#define RSR_AE (1<<2)
104#define RSR_CE (1<<1)
105#define RSR_FOE (1<<0)
106
107#define FCTR_HWOT(ot) (( ot & 0xf ) << 4 )
108#define FCTR_LWOT(ot) ( ot & 0xf )
109
110#define IMR_PAR (1<<7)
111#define IMR_ROOM (1<<3)
112#define IMR_ROM (1<<2)
113#define IMR_PTM (1<<1)
114#define IMR_PRM (1<<0)
115
116#define ISR_ROOS (1<<3)
117#define ISR_ROS (1<<2)
118#define ISR_PTS (1<<1)
119#define ISR_PRS (1<<0)
120#define ISR_CLR_STATUS (ISR_ROOS | ISR_ROS | ISR_PTS | ISR_PRS)
121
122#define EPCR_REEP (1<<5)
123#define EPCR_WEP (1<<4)
124#define EPCR_EPOS (1<<3)
125#define EPCR_ERPRR (1<<2)
126#define EPCR_ERPRW (1<<1)
127#define EPCR_ERRE (1<<0)
128
129#define GPCR_GEP_CNTL (1<<0)
130
131#define DM9000_PKT_RDY 0x01 /* Packet ready to receive */
132#define DM9000_PKT_MAX 1536 /* Received packet max size */
133
134#endif /* _DM9000X_H_ */
135
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