diff options
author | David S. Miller <davem@davemloft.net> | 2008-05-08 05:35:54 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-05-08 05:35:54 -0400 |
commit | 33f9936b2b73dba6c8685994c441c4fd30b04814 (patch) | |
tree | 9ce8105bc1e44ba66276695927b15df0d3fc185d /drivers | |
parent | aca51397d01474f80cab8fc978559b45f2e453ad (diff) | |
parent | f227ec3ca2b7be449fb2156e82b40cceed87a34a (diff) |
Merge branch 'upstream-davem' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/3c59x.c | 73 | ||||
-rw-r--r-- | drivers/net/Kconfig | 14 | ||||
-rw-r--r-- | drivers/net/appletalk/cops.c | 16 | ||||
-rw-r--r-- | drivers/net/bonding/bond_main.c | 24 | ||||
-rw-r--r-- | drivers/net/bonding/bond_sysfs.c | 16 | ||||
-rw-r--r-- | drivers/net/cxgb3/cxgb3_main.c | 4 | ||||
-rw-r--r-- | drivers/net/e1000e/defines.h | 10 | ||||
-rw-r--r-- | drivers/net/e1000e/e1000.h | 7 | ||||
-rw-r--r-- | drivers/net/e1000e/ethtool.c | 45 | ||||
-rw-r--r-- | drivers/net/e1000e/hw.h | 22 | ||||
-rw-r--r-- | drivers/net/e1000e/ich8lan.c | 83 | ||||
-rw-r--r-- | drivers/net/e1000e/netdev.c | 330 | ||||
-rw-r--r-- | drivers/net/e1000e/phy.c | 278 | ||||
-rw-r--r-- | drivers/net/eexpress.c | 11 | ||||
-rw-r--r-- | drivers/net/fs_enet/mii-fec.c | 3 | ||||
-rw-r--r-- | drivers/net/gianfar.c | 5 | ||||
-rw-r--r-- | drivers/net/gianfar.h | 3 | ||||
-rw-r--r-- | drivers/net/gianfar_sysfs.c | 10 | ||||
-rw-r--r-- | drivers/net/mv643xx_eth.c | 160 | ||||
-rw-r--r-- | drivers/net/pcnet32.c | 61 | ||||
-rw-r--r-- | drivers/net/phy/phy.c | 2 | ||||
-rw-r--r-- | drivers/net/tulip/uli526x.c | 38 | ||||
-rw-r--r-- | drivers/net/ucc_geth.c | 278 | ||||
-rw-r--r-- | drivers/net/ucc_geth.h | 48 | ||||
-rw-r--r-- | drivers/net/ucc_geth_ethtool.c | 6 | ||||
-rw-r--r-- | drivers/net/ucc_geth_mii.c | 4 |
26 files changed, 1163 insertions, 388 deletions
diff --git a/drivers/net/3c59x.c b/drivers/net/3c59x.c index 6f8e7d4cf74d..2edda8cc7f99 100644 --- a/drivers/net/3c59x.c +++ b/drivers/net/3c59x.c | |||
@@ -319,7 +319,7 @@ static struct vortex_chip_info { | |||
319 | {"3c920B-EMB-WNM (ATI Radeon 9100 IGP)", | 319 | {"3c920B-EMB-WNM (ATI Radeon 9100 IGP)", |
320 | PCI_USES_MASTER, IS_TORNADO|HAS_MII|HAS_HWCKSM, 128, }, | 320 | PCI_USES_MASTER, IS_TORNADO|HAS_MII|HAS_HWCKSM, 128, }, |
321 | {"3c980 Cyclone", | 321 | {"3c980 Cyclone", |
322 | PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, }, | 322 | PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM|EXTRA_PREAMBLE, 128, }, |
323 | 323 | ||
324 | {"3c980C Python-T", | 324 | {"3c980C Python-T", |
325 | PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, }, | 325 | PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, }, |
@@ -600,7 +600,6 @@ struct vortex_private { | |||
600 | struct sk_buff* tx_skbuff[TX_RING_SIZE]; | 600 | struct sk_buff* tx_skbuff[TX_RING_SIZE]; |
601 | unsigned int cur_rx, cur_tx; /* The next free ring entry */ | 601 | unsigned int cur_rx, cur_tx; /* The next free ring entry */ |
602 | unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */ | 602 | unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */ |
603 | struct net_device_stats stats; /* Generic stats */ | ||
604 | struct vortex_extra_stats xstats; /* NIC-specific extra stats */ | 603 | struct vortex_extra_stats xstats; /* NIC-specific extra stats */ |
605 | struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */ | 604 | struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */ |
606 | dma_addr_t tx_skb_dma; /* Allocated DMA address for bus master ctrl DMA. */ | 605 | dma_addr_t tx_skb_dma; /* Allocated DMA address for bus master ctrl DMA. */ |
@@ -1875,7 +1874,7 @@ static void vortex_tx_timeout(struct net_device *dev) | |||
1875 | 1874 | ||
1876 | issue_and_wait(dev, TxReset); | 1875 | issue_and_wait(dev, TxReset); |
1877 | 1876 | ||
1878 | vp->stats.tx_errors++; | 1877 | dev->stats.tx_errors++; |
1879 | if (vp->full_bus_master_tx) { | 1878 | if (vp->full_bus_master_tx) { |
1880 | printk(KERN_DEBUG "%s: Resetting the Tx ring pointer.\n", dev->name); | 1879 | printk(KERN_DEBUG "%s: Resetting the Tx ring pointer.\n", dev->name); |
1881 | if (vp->cur_tx - vp->dirty_tx > 0 && ioread32(ioaddr + DownListPtr) == 0) | 1880 | if (vp->cur_tx - vp->dirty_tx > 0 && ioread32(ioaddr + DownListPtr) == 0) |
@@ -1887,7 +1886,7 @@ static void vortex_tx_timeout(struct net_device *dev) | |||
1887 | iowrite8(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold); | 1886 | iowrite8(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold); |
1888 | iowrite16(DownUnstall, ioaddr + EL3_CMD); | 1887 | iowrite16(DownUnstall, ioaddr + EL3_CMD); |
1889 | } else { | 1888 | } else { |
1890 | vp->stats.tx_dropped++; | 1889 | dev->stats.tx_dropped++; |
1891 | netif_wake_queue(dev); | 1890 | netif_wake_queue(dev); |
1892 | } | 1891 | } |
1893 | 1892 | ||
@@ -1928,8 +1927,8 @@ vortex_error(struct net_device *dev, int status) | |||
1928 | } | 1927 | } |
1929 | dump_tx_ring(dev); | 1928 | dump_tx_ring(dev); |
1930 | } | 1929 | } |
1931 | if (tx_status & 0x14) vp->stats.tx_fifo_errors++; | 1930 | if (tx_status & 0x14) dev->stats.tx_fifo_errors++; |
1932 | if (tx_status & 0x38) vp->stats.tx_aborted_errors++; | 1931 | if (tx_status & 0x38) dev->stats.tx_aborted_errors++; |
1933 | if (tx_status & 0x08) vp->xstats.tx_max_collisions++; | 1932 | if (tx_status & 0x08) vp->xstats.tx_max_collisions++; |
1934 | iowrite8(0, ioaddr + TxStatus); | 1933 | iowrite8(0, ioaddr + TxStatus); |
1935 | if (tx_status & 0x30) { /* txJabber or txUnderrun */ | 1934 | if (tx_status & 0x30) { /* txJabber or txUnderrun */ |
@@ -2051,8 +2050,8 @@ vortex_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
2051 | if (vortex_debug > 2) | 2050 | if (vortex_debug > 2) |
2052 | printk(KERN_DEBUG "%s: Tx error, status %2.2x.\n", | 2051 | printk(KERN_DEBUG "%s: Tx error, status %2.2x.\n", |
2053 | dev->name, tx_status); | 2052 | dev->name, tx_status); |
2054 | if (tx_status & 0x04) vp->stats.tx_fifo_errors++; | 2053 | if (tx_status & 0x04) dev->stats.tx_fifo_errors++; |
2055 | if (tx_status & 0x38) vp->stats.tx_aborted_errors++; | 2054 | if (tx_status & 0x38) dev->stats.tx_aborted_errors++; |
2056 | if (tx_status & 0x30) { | 2055 | if (tx_status & 0x30) { |
2057 | issue_and_wait(dev, TxReset); | 2056 | issue_and_wait(dev, TxReset); |
2058 | } | 2057 | } |
@@ -2350,7 +2349,7 @@ boomerang_interrupt(int irq, void *dev_id) | |||
2350 | } else { | 2349 | } else { |
2351 | printk(KERN_DEBUG "boomerang_interrupt: no skb!\n"); | 2350 | printk(KERN_DEBUG "boomerang_interrupt: no skb!\n"); |
2352 | } | 2351 | } |
2353 | /* vp->stats.tx_packets++; Counted below. */ | 2352 | /* dev->stats.tx_packets++; Counted below. */ |
2354 | dirty_tx++; | 2353 | dirty_tx++; |
2355 | } | 2354 | } |
2356 | vp->dirty_tx = dirty_tx; | 2355 | vp->dirty_tx = dirty_tx; |
@@ -2409,12 +2408,12 @@ static int vortex_rx(struct net_device *dev) | |||
2409 | unsigned char rx_error = ioread8(ioaddr + RxErrors); | 2408 | unsigned char rx_error = ioread8(ioaddr + RxErrors); |
2410 | if (vortex_debug > 2) | 2409 | if (vortex_debug > 2) |
2411 | printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error); | 2410 | printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error); |
2412 | vp->stats.rx_errors++; | 2411 | dev->stats.rx_errors++; |
2413 | if (rx_error & 0x01) vp->stats.rx_over_errors++; | 2412 | if (rx_error & 0x01) dev->stats.rx_over_errors++; |
2414 | if (rx_error & 0x02) vp->stats.rx_length_errors++; | 2413 | if (rx_error & 0x02) dev->stats.rx_length_errors++; |
2415 | if (rx_error & 0x04) vp->stats.rx_frame_errors++; | 2414 | if (rx_error & 0x04) dev->stats.rx_frame_errors++; |
2416 | if (rx_error & 0x08) vp->stats.rx_crc_errors++; | 2415 | if (rx_error & 0x08) dev->stats.rx_crc_errors++; |
2417 | if (rx_error & 0x10) vp->stats.rx_length_errors++; | 2416 | if (rx_error & 0x10) dev->stats.rx_length_errors++; |
2418 | } else { | 2417 | } else { |
2419 | /* The packet length: up to 4.5K!. */ | 2418 | /* The packet length: up to 4.5K!. */ |
2420 | int pkt_len = rx_status & 0x1fff; | 2419 | int pkt_len = rx_status & 0x1fff; |
@@ -2446,7 +2445,7 @@ static int vortex_rx(struct net_device *dev) | |||
2446 | skb->protocol = eth_type_trans(skb, dev); | 2445 | skb->protocol = eth_type_trans(skb, dev); |
2447 | netif_rx(skb); | 2446 | netif_rx(skb); |
2448 | dev->last_rx = jiffies; | 2447 | dev->last_rx = jiffies; |
2449 | vp->stats.rx_packets++; | 2448 | dev->stats.rx_packets++; |
2450 | /* Wait a limited time to go to next packet. */ | 2449 | /* Wait a limited time to go to next packet. */ |
2451 | for (i = 200; i >= 0; i--) | 2450 | for (i = 200; i >= 0; i--) |
2452 | if ( ! (ioread16(ioaddr + EL3_STATUS) & CmdInProgress)) | 2451 | if ( ! (ioread16(ioaddr + EL3_STATUS) & CmdInProgress)) |
@@ -2455,7 +2454,7 @@ static int vortex_rx(struct net_device *dev) | |||
2455 | } else if (vortex_debug > 0) | 2454 | } else if (vortex_debug > 0) |
2456 | printk(KERN_NOTICE "%s: No memory to allocate a sk_buff of " | 2455 | printk(KERN_NOTICE "%s: No memory to allocate a sk_buff of " |
2457 | "size %d.\n", dev->name, pkt_len); | 2456 | "size %d.\n", dev->name, pkt_len); |
2458 | vp->stats.rx_dropped++; | 2457 | dev->stats.rx_dropped++; |
2459 | } | 2458 | } |
2460 | issue_and_wait(dev, RxDiscard); | 2459 | issue_and_wait(dev, RxDiscard); |
2461 | } | 2460 | } |
@@ -2482,12 +2481,12 @@ boomerang_rx(struct net_device *dev) | |||
2482 | unsigned char rx_error = rx_status >> 16; | 2481 | unsigned char rx_error = rx_status >> 16; |
2483 | if (vortex_debug > 2) | 2482 | if (vortex_debug > 2) |
2484 | printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error); | 2483 | printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error); |
2485 | vp->stats.rx_errors++; | 2484 | dev->stats.rx_errors++; |
2486 | if (rx_error & 0x01) vp->stats.rx_over_errors++; | 2485 | if (rx_error & 0x01) dev->stats.rx_over_errors++; |
2487 | if (rx_error & 0x02) vp->stats.rx_length_errors++; | 2486 | if (rx_error & 0x02) dev->stats.rx_length_errors++; |
2488 | if (rx_error & 0x04) vp->stats.rx_frame_errors++; | 2487 | if (rx_error & 0x04) dev->stats.rx_frame_errors++; |
2489 | if (rx_error & 0x08) vp->stats.rx_crc_errors++; | 2488 | if (rx_error & 0x08) dev->stats.rx_crc_errors++; |
2490 | if (rx_error & 0x10) vp->stats.rx_length_errors++; | 2489 | if (rx_error & 0x10) dev->stats.rx_length_errors++; |
2491 | } else { | 2490 | } else { |
2492 | /* The packet length: up to 4.5K!. */ | 2491 | /* The packet length: up to 4.5K!. */ |
2493 | int pkt_len = rx_status & 0x1fff; | 2492 | int pkt_len = rx_status & 0x1fff; |
@@ -2529,7 +2528,7 @@ boomerang_rx(struct net_device *dev) | |||
2529 | } | 2528 | } |
2530 | netif_rx(skb); | 2529 | netif_rx(skb); |
2531 | dev->last_rx = jiffies; | 2530 | dev->last_rx = jiffies; |
2532 | vp->stats.rx_packets++; | 2531 | dev->stats.rx_packets++; |
2533 | } | 2532 | } |
2534 | entry = (++vp->cur_rx) % RX_RING_SIZE; | 2533 | entry = (++vp->cur_rx) % RX_RING_SIZE; |
2535 | } | 2534 | } |
@@ -2591,7 +2590,7 @@ vortex_down(struct net_device *dev, int final_down) | |||
2591 | del_timer_sync(&vp->rx_oom_timer); | 2590 | del_timer_sync(&vp->rx_oom_timer); |
2592 | del_timer_sync(&vp->timer); | 2591 | del_timer_sync(&vp->timer); |
2593 | 2592 | ||
2594 | /* Turn off statistics ASAP. We update vp->stats below. */ | 2593 | /* Turn off statistics ASAP. We update dev->stats below. */ |
2595 | iowrite16(StatsDisable, ioaddr + EL3_CMD); | 2594 | iowrite16(StatsDisable, ioaddr + EL3_CMD); |
2596 | 2595 | ||
2597 | /* Disable the receiver and transmitter. */ | 2596 | /* Disable the receiver and transmitter. */ |
@@ -2728,7 +2727,7 @@ static struct net_device_stats *vortex_get_stats(struct net_device *dev) | |||
2728 | update_stats(ioaddr, dev); | 2727 | update_stats(ioaddr, dev); |
2729 | spin_unlock_irqrestore (&vp->lock, flags); | 2728 | spin_unlock_irqrestore (&vp->lock, flags); |
2730 | } | 2729 | } |
2731 | return &vp->stats; | 2730 | return &dev->stats; |
2732 | } | 2731 | } |
2733 | 2732 | ||
2734 | /* Update statistics. | 2733 | /* Update statistics. |
@@ -2748,18 +2747,18 @@ static void update_stats(void __iomem *ioaddr, struct net_device *dev) | |||
2748 | /* Unlike the 3c5x9 we need not turn off stats updates while reading. */ | 2747 | /* Unlike the 3c5x9 we need not turn off stats updates while reading. */ |
2749 | /* Switch to the stats window, and read everything. */ | 2748 | /* Switch to the stats window, and read everything. */ |
2750 | EL3WINDOW(6); | 2749 | EL3WINDOW(6); |
2751 | vp->stats.tx_carrier_errors += ioread8(ioaddr + 0); | 2750 | dev->stats.tx_carrier_errors += ioread8(ioaddr + 0); |
2752 | vp->stats.tx_heartbeat_errors += ioread8(ioaddr + 1); | 2751 | dev->stats.tx_heartbeat_errors += ioread8(ioaddr + 1); |
2753 | vp->stats.tx_window_errors += ioread8(ioaddr + 4); | 2752 | dev->stats.tx_window_errors += ioread8(ioaddr + 4); |
2754 | vp->stats.rx_fifo_errors += ioread8(ioaddr + 5); | 2753 | dev->stats.rx_fifo_errors += ioread8(ioaddr + 5); |
2755 | vp->stats.tx_packets += ioread8(ioaddr + 6); | 2754 | dev->stats.tx_packets += ioread8(ioaddr + 6); |
2756 | vp->stats.tx_packets += (ioread8(ioaddr + 9)&0x30) << 4; | 2755 | dev->stats.tx_packets += (ioread8(ioaddr + 9)&0x30) << 4; |
2757 | /* Rx packets */ ioread8(ioaddr + 7); /* Must read to clear */ | 2756 | /* Rx packets */ ioread8(ioaddr + 7); /* Must read to clear */ |
2758 | /* Don't bother with register 9, an extension of registers 6&7. | 2757 | /* Don't bother with register 9, an extension of registers 6&7. |
2759 | If we do use the 6&7 values the atomic update assumption above | 2758 | If we do use the 6&7 values the atomic update assumption above |
2760 | is invalid. */ | 2759 | is invalid. */ |
2761 | vp->stats.rx_bytes += ioread16(ioaddr + 10); | 2760 | dev->stats.rx_bytes += ioread16(ioaddr + 10); |
2762 | vp->stats.tx_bytes += ioread16(ioaddr + 12); | 2761 | dev->stats.tx_bytes += ioread16(ioaddr + 12); |
2763 | /* Extra stats for get_ethtool_stats() */ | 2762 | /* Extra stats for get_ethtool_stats() */ |
2764 | vp->xstats.tx_multiple_collisions += ioread8(ioaddr + 2); | 2763 | vp->xstats.tx_multiple_collisions += ioread8(ioaddr + 2); |
2765 | vp->xstats.tx_single_collisions += ioread8(ioaddr + 3); | 2764 | vp->xstats.tx_single_collisions += ioread8(ioaddr + 3); |
@@ -2767,14 +2766,14 @@ static void update_stats(void __iomem *ioaddr, struct net_device *dev) | |||
2767 | EL3WINDOW(4); | 2766 | EL3WINDOW(4); |
2768 | vp->xstats.rx_bad_ssd += ioread8(ioaddr + 12); | 2767 | vp->xstats.rx_bad_ssd += ioread8(ioaddr + 12); |
2769 | 2768 | ||
2770 | vp->stats.collisions = vp->xstats.tx_multiple_collisions | 2769 | dev->stats.collisions = vp->xstats.tx_multiple_collisions |
2771 | + vp->xstats.tx_single_collisions | 2770 | + vp->xstats.tx_single_collisions |
2772 | + vp->xstats.tx_max_collisions; | 2771 | + vp->xstats.tx_max_collisions; |
2773 | 2772 | ||
2774 | { | 2773 | { |
2775 | u8 up = ioread8(ioaddr + 13); | 2774 | u8 up = ioread8(ioaddr + 13); |
2776 | vp->stats.rx_bytes += (up & 0x0f) << 16; | 2775 | dev->stats.rx_bytes += (up & 0x0f) << 16; |
2777 | vp->stats.tx_bytes += (up & 0xf0) << 12; | 2776 | dev->stats.tx_bytes += (up & 0xf0) << 12; |
2778 | } | 2777 | } |
2779 | 2778 | ||
2780 | EL3WINDOW(old_window >> 13); | 2779 | EL3WINDOW(old_window >> 13); |
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index af46341827f2..d27f54a2df77 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -1273,20 +1273,6 @@ config PCNET32 | |||
1273 | To compile this driver as a module, choose M here. The module | 1273 | To compile this driver as a module, choose M here. The module |
1274 | will be called pcnet32. | 1274 | will be called pcnet32. |
1275 | 1275 | ||
1276 | config PCNET32_NAPI | ||
1277 | bool "Use RX polling (NAPI)" | ||
1278 | depends on PCNET32 | ||
1279 | help | ||
1280 | NAPI is a new driver API designed to reduce CPU and interrupt load | ||
1281 | when the driver is receiving lots of packets from the card. It is | ||
1282 | still somewhat experimental and thus not yet enabled by default. | ||
1283 | |||
1284 | If your estimated Rx load is 10kpps or more, or if the card will be | ||
1285 | deployed on potentially unfriendly networks (e.g. in a firewall), | ||
1286 | then say Y here. | ||
1287 | |||
1288 | If in doubt, say N. | ||
1289 | |||
1290 | config AMD8111_ETH | 1276 | config AMD8111_ETH |
1291 | tristate "AMD 8111 (new PCI lance) support" | 1277 | tristate "AMD 8111 (new PCI lance) support" |
1292 | depends on NET_PCI && PCI | 1278 | depends on NET_PCI && PCI |
diff --git a/drivers/net/appletalk/cops.c b/drivers/net/appletalk/cops.c index 82e9a5bd0dd2..a0b4c8516073 100644 --- a/drivers/net/appletalk/cops.c +++ b/drivers/net/appletalk/cops.c | |||
@@ -499,19 +499,13 @@ static void cops_reset(struct net_device *dev, int sleep) | |||
499 | { | 499 | { |
500 | outb(0, ioaddr+DAYNA_RESET); /* Assert the reset port */ | 500 | outb(0, ioaddr+DAYNA_RESET); /* Assert the reset port */ |
501 | inb(ioaddr+DAYNA_RESET); /* Clear the reset */ | 501 | inb(ioaddr+DAYNA_RESET); /* Clear the reset */ |
502 | if(sleep) | 502 | if (sleep) |
503 | { | 503 | msleep(333); |
504 | long snap=jiffies; | 504 | else |
505 | 505 | mdelay(333); | |
506 | /* Let card finish initializing, about 1/3 second */ | ||
507 | while (time_before(jiffies, snap + HZ/3)) | ||
508 | schedule(); | ||
509 | } | ||
510 | else | ||
511 | mdelay(333); | ||
512 | } | 506 | } |
507 | |||
513 | netif_wake_queue(dev); | 508 | netif_wake_queue(dev); |
514 | return; | ||
515 | } | 509 | } |
516 | 510 | ||
517 | static void cops_load (struct net_device *dev) | 511 | static void cops_load (struct net_device *dev) |
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c index 6425603bc379..50a40e433154 100644 --- a/drivers/net/bonding/bond_main.c +++ b/drivers/net/bonding/bond_main.c | |||
@@ -1425,13 +1425,13 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev) | |||
1425 | res = netdev_set_master(slave_dev, bond_dev); | 1425 | res = netdev_set_master(slave_dev, bond_dev); |
1426 | if (res) { | 1426 | if (res) { |
1427 | dprintk("Error %d calling netdev_set_master\n", res); | 1427 | dprintk("Error %d calling netdev_set_master\n", res); |
1428 | goto err_close; | 1428 | goto err_restore_mac; |
1429 | } | 1429 | } |
1430 | /* open the slave since the application closed it */ | 1430 | /* open the slave since the application closed it */ |
1431 | res = dev_open(slave_dev); | 1431 | res = dev_open(slave_dev); |
1432 | if (res) { | 1432 | if (res) { |
1433 | dprintk("Openning slave %s failed\n", slave_dev->name); | 1433 | dprintk("Openning slave %s failed\n", slave_dev->name); |
1434 | goto err_restore_mac; | 1434 | goto err_unset_master; |
1435 | } | 1435 | } |
1436 | 1436 | ||
1437 | new_slave->dev = slave_dev; | 1437 | new_slave->dev = slave_dev; |
@@ -1444,7 +1444,7 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev) | |||
1444 | */ | 1444 | */ |
1445 | res = bond_alb_init_slave(bond, new_slave); | 1445 | res = bond_alb_init_slave(bond, new_slave); |
1446 | if (res) { | 1446 | if (res) { |
1447 | goto err_unset_master; | 1447 | goto err_close; |
1448 | } | 1448 | } |
1449 | } | 1449 | } |
1450 | 1450 | ||
@@ -1619,7 +1619,7 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev) | |||
1619 | 1619 | ||
1620 | res = bond_create_slave_symlinks(bond_dev, slave_dev); | 1620 | res = bond_create_slave_symlinks(bond_dev, slave_dev); |
1621 | if (res) | 1621 | if (res) |
1622 | goto err_unset_master; | 1622 | goto err_close; |
1623 | 1623 | ||
1624 | printk(KERN_INFO DRV_NAME | 1624 | printk(KERN_INFO DRV_NAME |
1625 | ": %s: enslaving %s as a%s interface with a%s link.\n", | 1625 | ": %s: enslaving %s as a%s interface with a%s link.\n", |
@@ -1631,12 +1631,12 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev) | |||
1631 | return 0; | 1631 | return 0; |
1632 | 1632 | ||
1633 | /* Undo stages on error */ | 1633 | /* Undo stages on error */ |
1634 | err_unset_master: | ||
1635 | netdev_set_master(slave_dev, NULL); | ||
1636 | |||
1637 | err_close: | 1634 | err_close: |
1638 | dev_close(slave_dev); | 1635 | dev_close(slave_dev); |
1639 | 1636 | ||
1637 | err_unset_master: | ||
1638 | netdev_set_master(slave_dev, NULL); | ||
1639 | |||
1640 | err_restore_mac: | 1640 | err_restore_mac: |
1641 | if (!bond->params.fail_over_mac) { | 1641 | if (!bond->params.fail_over_mac) { |
1642 | memcpy(addr.sa_data, new_slave->perm_hwaddr, ETH_ALEN); | 1642 | memcpy(addr.sa_data, new_slave->perm_hwaddr, ETH_ALEN); |
@@ -4936,7 +4936,9 @@ int bond_create(char *name, struct bond_params *params, struct bonding **newbond | |||
4936 | if (res < 0) { | 4936 | if (res < 0) { |
4937 | rtnl_lock(); | 4937 | rtnl_lock(); |
4938 | down_write(&bonding_rwsem); | 4938 | down_write(&bonding_rwsem); |
4939 | goto out_bond; | 4939 | bond_deinit(bond_dev); |
4940 | unregister_netdevice(bond_dev); | ||
4941 | goto out_rtnl; | ||
4940 | } | 4942 | } |
4941 | 4943 | ||
4942 | return 0; | 4944 | return 0; |
@@ -4990,9 +4992,10 @@ err: | |||
4990 | destroy_workqueue(bond->wq); | 4992 | destroy_workqueue(bond->wq); |
4991 | } | 4993 | } |
4992 | 4994 | ||
4995 | bond_destroy_sysfs(); | ||
4996 | |||
4993 | rtnl_lock(); | 4997 | rtnl_lock(); |
4994 | bond_free_all(); | 4998 | bond_free_all(); |
4995 | bond_destroy_sysfs(); | ||
4996 | rtnl_unlock(); | 4999 | rtnl_unlock(); |
4997 | out: | 5000 | out: |
4998 | return res; | 5001 | return res; |
@@ -5004,9 +5007,10 @@ static void __exit bonding_exit(void) | |||
5004 | unregister_netdevice_notifier(&bond_netdev_notifier); | 5007 | unregister_netdevice_notifier(&bond_netdev_notifier); |
5005 | unregister_inetaddr_notifier(&bond_inetaddr_notifier); | 5008 | unregister_inetaddr_notifier(&bond_inetaddr_notifier); |
5006 | 5009 | ||
5010 | bond_destroy_sysfs(); | ||
5011 | |||
5007 | rtnl_lock(); | 5012 | rtnl_lock(); |
5008 | bond_free_all(); | 5013 | bond_free_all(); |
5009 | bond_destroy_sysfs(); | ||
5010 | rtnl_unlock(); | 5014 | rtnl_unlock(); |
5011 | } | 5015 | } |
5012 | 5016 | ||
diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c index 979c2d05ff9c..68c41a00d93d 100644 --- a/drivers/net/bonding/bond_sysfs.c +++ b/drivers/net/bonding/bond_sysfs.c | |||
@@ -146,29 +146,29 @@ static ssize_t bonding_store_bonds(struct class *cls, const char *buffer, size_t | |||
146 | ": Unable remove bond %s due to open references.\n", | 146 | ": Unable remove bond %s due to open references.\n", |
147 | ifname); | 147 | ifname); |
148 | res = -EPERM; | 148 | res = -EPERM; |
149 | goto out; | 149 | goto out_unlock; |
150 | } | 150 | } |
151 | printk(KERN_INFO DRV_NAME | 151 | printk(KERN_INFO DRV_NAME |
152 | ": %s is being deleted...\n", | 152 | ": %s is being deleted...\n", |
153 | bond->dev->name); | 153 | bond->dev->name); |
154 | bond_destroy(bond); | 154 | bond_destroy(bond); |
155 | up_write(&bonding_rwsem); | 155 | goto out_unlock; |
156 | rtnl_unlock(); | ||
157 | goto out; | ||
158 | } | 156 | } |
159 | 157 | ||
160 | printk(KERN_ERR DRV_NAME | 158 | printk(KERN_ERR DRV_NAME |
161 | ": unable to delete non-existent bond %s\n", ifname); | 159 | ": unable to delete non-existent bond %s\n", ifname); |
162 | res = -ENODEV; | 160 | res = -ENODEV; |
163 | up_write(&bonding_rwsem); | 161 | goto out_unlock; |
164 | rtnl_unlock(); | ||
165 | goto out; | ||
166 | } | 162 | } |
167 | 163 | ||
168 | err_no_cmd: | 164 | err_no_cmd: |
169 | printk(KERN_ERR DRV_NAME | 165 | printk(KERN_ERR DRV_NAME |
170 | ": no command found in bonding_masters. Use +ifname or -ifname.\n"); | 166 | ": no command found in bonding_masters. Use +ifname or -ifname.\n"); |
171 | res = -EPERM; | 167 | return -EPERM; |
168 | |||
169 | out_unlock: | ||
170 | up_write(&bonding_rwsem); | ||
171 | rtnl_unlock(); | ||
172 | 172 | ||
173 | /* Always return either count or an error. If you return 0, you'll | 173 | /* Always return either count or an error. If you return 0, you'll |
174 | * get called forever, which is bad. | 174 | * get called forever, which is bad. |
diff --git a/drivers/net/cxgb3/cxgb3_main.c b/drivers/net/cxgb3/cxgb3_main.c index 05e5f59e87fa..ce949d5fae39 100644 --- a/drivers/net/cxgb3/cxgb3_main.c +++ b/drivers/net/cxgb3/cxgb3_main.c | |||
@@ -1894,11 +1894,11 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr) | |||
1894 | u8 *fw_data; | 1894 | u8 *fw_data; |
1895 | struct ch_mem_range t; | 1895 | struct ch_mem_range t; |
1896 | 1896 | ||
1897 | if (!capable(CAP_NET_ADMIN)) | 1897 | if (!capable(CAP_SYS_RAWIO)) |
1898 | return -EPERM; | 1898 | return -EPERM; |
1899 | if (copy_from_user(&t, useraddr, sizeof(t))) | 1899 | if (copy_from_user(&t, useraddr, sizeof(t))) |
1900 | return -EFAULT; | 1900 | return -EFAULT; |
1901 | 1901 | /* Check t.len sanity ? */ | |
1902 | fw_data = kmalloc(t.len, GFP_KERNEL); | 1902 | fw_data = kmalloc(t.len, GFP_KERNEL); |
1903 | if (!fw_data) | 1903 | if (!fw_data) |
1904 | return -ENOMEM; | 1904 | return -ENOMEM; |
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h index 2a53875cddbf..f823b8ba5785 100644 --- a/drivers/net/e1000e/defines.h +++ b/drivers/net/e1000e/defines.h | |||
@@ -648,6 +648,8 @@ | |||
648 | #define IFE_E_PHY_ID 0x02A80330 | 648 | #define IFE_E_PHY_ID 0x02A80330 |
649 | #define IFE_PLUS_E_PHY_ID 0x02A80320 | 649 | #define IFE_PLUS_E_PHY_ID 0x02A80320 |
650 | #define IFE_C_E_PHY_ID 0x02A80310 | 650 | #define IFE_C_E_PHY_ID 0x02A80310 |
651 | #define BME1000_E_PHY_ID 0x01410CB0 | ||
652 | #define BME1000_E_PHY_ID_R2 0x01410CB1 | ||
651 | 653 | ||
652 | /* M88E1000 Specific Registers */ | 654 | /* M88E1000 Specific Registers */ |
653 | #define M88E1000_PHY_SPEC_CTRL 0x10 /* PHY Specific Control Register */ | 655 | #define M88E1000_PHY_SPEC_CTRL 0x10 /* PHY Specific Control Register */ |
@@ -701,6 +703,14 @@ | |||
701 | #define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK 0x0E00 | 703 | #define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK 0x0E00 |
702 | #define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X 0x0800 | 704 | #define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X 0x0800 |
703 | 705 | ||
706 | /* BME1000 PHY Specific Control Register */ | ||
707 | #define BME1000_PSCR_ENABLE_DOWNSHIFT 0x0800 /* 1 = enable downshift */ | ||
708 | |||
709 | |||
710 | #define PHY_PAGE_SHIFT 5 | ||
711 | #define PHY_REG(page, reg) (((page) << PHY_PAGE_SHIFT) | \ | ||
712 | ((reg) & MAX_PHY_REG_ADDRESS)) | ||
713 | |||
704 | /* | 714 | /* |
705 | * Bits... | 715 | * Bits... |
706 | * 15-5: page | 716 | * 15-5: page |
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h index 38bfd0d261fe..d3bc6f8101fa 100644 --- a/drivers/net/e1000e/e1000.h +++ b/drivers/net/e1000e/e1000.h | |||
@@ -127,7 +127,7 @@ struct e1000_buffer { | |||
127 | /* arrays of page information for packet split */ | 127 | /* arrays of page information for packet split */ |
128 | struct e1000_ps_page *ps_pages; | 128 | struct e1000_ps_page *ps_pages; |
129 | }; | 129 | }; |
130 | 130 | struct page *page; | |
131 | }; | 131 | }; |
132 | 132 | ||
133 | struct e1000_ring { | 133 | struct e1000_ring { |
@@ -304,6 +304,7 @@ struct e1000_info { | |||
304 | #define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5) | 304 | #define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5) |
305 | #define FLAG_HAS_SWSM_ON_LOAD (1 << 6) | 305 | #define FLAG_HAS_SWSM_ON_LOAD (1 << 6) |
306 | #define FLAG_HAS_JUMBO_FRAMES (1 << 7) | 306 | #define FLAG_HAS_JUMBO_FRAMES (1 << 7) |
307 | #define FLAG_IS_ICH (1 << 9) | ||
307 | #define FLAG_HAS_SMART_POWER_DOWN (1 << 11) | 308 | #define FLAG_HAS_SMART_POWER_DOWN (1 << 11) |
308 | #define FLAG_IS_QUAD_PORT_A (1 << 12) | 309 | #define FLAG_IS_QUAD_PORT_A (1 << 12) |
309 | #define FLAG_IS_QUAD_PORT (1 << 13) | 310 | #define FLAG_IS_QUAD_PORT (1 << 13) |
@@ -386,6 +387,7 @@ extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw, | |||
386 | bool state); | 387 | bool state); |
387 | extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw); | 388 | extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw); |
388 | extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw); | 389 | extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw); |
390 | extern void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw); | ||
389 | 391 | ||
390 | extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw); | 392 | extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw); |
391 | extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw); | 393 | extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw); |
@@ -443,6 +445,9 @@ extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw); | |||
443 | extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data); | 445 | extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data); |
444 | extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data); | 446 | extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data); |
445 | extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id); | 447 | extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id); |
448 | extern s32 e1000e_determine_phy_address(struct e1000_hw *hw); | ||
449 | extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data); | ||
450 | extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data); | ||
446 | extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); | 451 | extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); |
447 | extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data); | 452 | extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data); |
448 | extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data); | 453 | extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data); |
diff --git a/drivers/net/e1000e/ethtool.c b/drivers/net/e1000e/ethtool.c index ce045acce63e..a14561f40db0 100644 --- a/drivers/net/e1000e/ethtool.c +++ b/drivers/net/e1000e/ethtool.c | |||
@@ -494,8 +494,12 @@ static int e1000_get_eeprom(struct net_device *netdev, | |||
494 | for (i = 0; i < last_word - first_word + 1; i++) { | 494 | for (i = 0; i < last_word - first_word + 1; i++) { |
495 | ret_val = e1000_read_nvm(hw, first_word + i, 1, | 495 | ret_val = e1000_read_nvm(hw, first_word + i, 1, |
496 | &eeprom_buff[i]); | 496 | &eeprom_buff[i]); |
497 | if (ret_val) | 497 | if (ret_val) { |
498 | /* a read error occurred, throw away the | ||
499 | * result */ | ||
500 | memset(eeprom_buff, 0xff, sizeof(eeprom_buff)); | ||
498 | break; | 501 | break; |
502 | } | ||
499 | } | 503 | } |
500 | } | 504 | } |
501 | 505 | ||
@@ -803,8 +807,7 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data) | |||
803 | /* restore previous status */ | 807 | /* restore previous status */ |
804 | ew32(STATUS, before); | 808 | ew32(STATUS, before); |
805 | 809 | ||
806 | if ((mac->type != e1000_ich8lan) && | 810 | if (!(adapter->flags & FLAG_IS_ICH)) { |
807 | (mac->type != e1000_ich9lan)) { | ||
808 | REG_PATTERN_TEST(E1000_FCAL, 0xFFFFFFFF, 0xFFFFFFFF); | 811 | REG_PATTERN_TEST(E1000_FCAL, 0xFFFFFFFF, 0xFFFFFFFF); |
809 | REG_PATTERN_TEST(E1000_FCAH, 0x0000FFFF, 0xFFFFFFFF); | 812 | REG_PATTERN_TEST(E1000_FCAH, 0x0000FFFF, 0xFFFFFFFF); |
810 | REG_PATTERN_TEST(E1000_FCT, 0x0000FFFF, 0xFFFFFFFF); | 813 | REG_PATTERN_TEST(E1000_FCT, 0x0000FFFF, 0xFFFFFFFF); |
@@ -824,15 +827,13 @@ static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data) | |||
824 | 827 | ||
825 | REG_SET_AND_CHECK(E1000_RCTL, 0xFFFFFFFF, 0x00000000); | 828 | REG_SET_AND_CHECK(E1000_RCTL, 0xFFFFFFFF, 0x00000000); |
826 | 829 | ||
827 | before = (((mac->type == e1000_ich8lan) || | 830 | before = ((adapter->flags & FLAG_IS_ICH) ? 0x06C3B33E : 0x06DFB3FE); |
828 | (mac->type == e1000_ich9lan)) ? 0x06C3B33E : 0x06DFB3FE); | ||
829 | REG_SET_AND_CHECK(E1000_RCTL, before, 0x003FFFFB); | 831 | REG_SET_AND_CHECK(E1000_RCTL, before, 0x003FFFFB); |
830 | REG_SET_AND_CHECK(E1000_TCTL, 0xFFFFFFFF, 0x00000000); | 832 | REG_SET_AND_CHECK(E1000_TCTL, 0xFFFFFFFF, 0x00000000); |
831 | 833 | ||
832 | REG_SET_AND_CHECK(E1000_RCTL, before, 0xFFFFFFFF); | 834 | REG_SET_AND_CHECK(E1000_RCTL, before, 0xFFFFFFFF); |
833 | REG_PATTERN_TEST(E1000_RDBAL, 0xFFFFFFF0, 0xFFFFFFFF); | 835 | REG_PATTERN_TEST(E1000_RDBAL, 0xFFFFFFF0, 0xFFFFFFFF); |
834 | if ((mac->type != e1000_ich8lan) && | 836 | if (!(adapter->flags & FLAG_IS_ICH)) |
835 | (mac->type != e1000_ich9lan)) | ||
836 | REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF); | 837 | REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF); |
837 | REG_PATTERN_TEST(E1000_TDBAL, 0xFFFFFFF0, 0xFFFFFFFF); | 838 | REG_PATTERN_TEST(E1000_TDBAL, 0xFFFFFFF0, 0xFFFFFFFF); |
838 | REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF); | 839 | REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF); |
@@ -911,9 +912,7 @@ static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data) | |||
911 | 912 | ||
912 | /* Test each interrupt */ | 913 | /* Test each interrupt */ |
913 | for (i = 0; i < 10; i++) { | 914 | for (i = 0; i < 10; i++) { |
914 | 915 | if ((adapter->flags & FLAG_IS_ICH) && (i == 8)) | |
915 | if (((adapter->hw.mac.type == e1000_ich8lan) || | ||
916 | (adapter->hw.mac.type == e1000_ich9lan)) && i == 8) | ||
917 | continue; | 916 | continue; |
918 | 917 | ||
919 | /* Interrupt to test */ | 918 | /* Interrupt to test */ |
@@ -1184,6 +1183,7 @@ static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter) | |||
1184 | struct e1000_hw *hw = &adapter->hw; | 1183 | struct e1000_hw *hw = &adapter->hw; |
1185 | u32 ctrl_reg = 0; | 1184 | u32 ctrl_reg = 0; |
1186 | u32 stat_reg = 0; | 1185 | u32 stat_reg = 0; |
1186 | u16 phy_reg = 0; | ||
1187 | 1187 | ||
1188 | hw->mac.autoneg = 0; | 1188 | hw->mac.autoneg = 0; |
1189 | 1189 | ||
@@ -1211,6 +1211,28 @@ static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter) | |||
1211 | E1000_CTRL_SPD_100 |/* Force Speed to 100 */ | 1211 | E1000_CTRL_SPD_100 |/* Force Speed to 100 */ |
1212 | E1000_CTRL_FD); /* Force Duplex to FULL */ | 1212 | E1000_CTRL_FD); /* Force Duplex to FULL */ |
1213 | break; | 1213 | break; |
1214 | case e1000_phy_bm: | ||
1215 | /* Set Default MAC Interface speed to 1GB */ | ||
1216 | e1e_rphy(hw, PHY_REG(2, 21), &phy_reg); | ||
1217 | phy_reg &= ~0x0007; | ||
1218 | phy_reg |= 0x006; | ||
1219 | e1e_wphy(hw, PHY_REG(2, 21), phy_reg); | ||
1220 | /* Assert SW reset for above settings to take effect */ | ||
1221 | e1000e_commit_phy(hw); | ||
1222 | mdelay(1); | ||
1223 | /* Force Full Duplex */ | ||
1224 | e1e_rphy(hw, PHY_REG(769, 16), &phy_reg); | ||
1225 | e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x000C); | ||
1226 | /* Set Link Up (in force link) */ | ||
1227 | e1e_rphy(hw, PHY_REG(776, 16), &phy_reg); | ||
1228 | e1e_wphy(hw, PHY_REG(776, 16), phy_reg | 0x0040); | ||
1229 | /* Force Link */ | ||
1230 | e1e_rphy(hw, PHY_REG(769, 16), &phy_reg); | ||
1231 | e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x0040); | ||
1232 | /* Set Early Link Enable */ | ||
1233 | e1e_rphy(hw, PHY_REG(769, 20), &phy_reg); | ||
1234 | e1e_wphy(hw, PHY_REG(769, 20), phy_reg | 0x0400); | ||
1235 | /* fall through */ | ||
1214 | default: | 1236 | default: |
1215 | /* force 1000, set loopback */ | 1237 | /* force 1000, set loopback */ |
1216 | e1e_wphy(hw, PHY_CONTROL, 0x4140); | 1238 | e1e_wphy(hw, PHY_CONTROL, 0x4140); |
@@ -1224,8 +1246,7 @@ static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter) | |||
1224 | E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */ | 1246 | E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */ |
1225 | E1000_CTRL_FD); /* Force Duplex to FULL */ | 1247 | E1000_CTRL_FD); /* Force Duplex to FULL */ |
1226 | 1248 | ||
1227 | if ((adapter->hw.mac.type == e1000_ich8lan) || | 1249 | if (adapter->flags & FLAG_IS_ICH) |
1228 | (adapter->hw.mac.type == e1000_ich9lan)) | ||
1229 | ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */ | 1250 | ctrl_reg |= E1000_CTRL_SLU; /* Set Link Up */ |
1230 | } | 1251 | } |
1231 | 1252 | ||
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h index a930e6d9cf02..74f263acb172 100644 --- a/drivers/net/e1000e/hw.h +++ b/drivers/net/e1000e/hw.h | |||
@@ -216,6 +216,21 @@ enum e1e_registers { | |||
216 | #define IGP01E1000_PHY_LINK_HEALTH 0x13 /* PHY Link Health */ | 216 | #define IGP01E1000_PHY_LINK_HEALTH 0x13 /* PHY Link Health */ |
217 | #define IGP02E1000_PHY_POWER_MGMT 0x19 /* Power Management */ | 217 | #define IGP02E1000_PHY_POWER_MGMT 0x19 /* Power Management */ |
218 | #define IGP01E1000_PHY_PAGE_SELECT 0x1F /* Page Select */ | 218 | #define IGP01E1000_PHY_PAGE_SELECT 0x1F /* Page Select */ |
219 | #define BM_PHY_PAGE_SELECT 22 /* Page Select for BM */ | ||
220 | #define IGP_PAGE_SHIFT 5 | ||
221 | #define PHY_REG_MASK 0x1F | ||
222 | |||
223 | #define BM_WUC_PAGE 800 | ||
224 | #define BM_WUC_ADDRESS_OPCODE 0x11 | ||
225 | #define BM_WUC_DATA_OPCODE 0x12 | ||
226 | #define BM_WUC_ENABLE_PAGE 769 | ||
227 | #define BM_WUC_ENABLE_REG 17 | ||
228 | #define BM_WUC_ENABLE_BIT (1 << 2) | ||
229 | #define BM_WUC_HOST_WU_BIT (1 << 4) | ||
230 | |||
231 | #define BM_WUC PHY_REG(BM_WUC_PAGE, 1) | ||
232 | #define BM_WUFC PHY_REG(BM_WUC_PAGE, 2) | ||
233 | #define BM_WUS PHY_REG(BM_WUC_PAGE, 3) | ||
219 | 234 | ||
220 | #define IGP01E1000_PHY_PCS_INIT_REG 0x00B4 | 235 | #define IGP01E1000_PHY_PCS_INIT_REG 0x00B4 |
221 | #define IGP01E1000_PHY_POLARITY_MASK 0x0078 | 236 | #define IGP01E1000_PHY_POLARITY_MASK 0x0078 |
@@ -331,10 +346,16 @@ enum e1e_registers { | |||
331 | #define E1000_DEV_ID_ICH8_IFE_G 0x10C5 | 346 | #define E1000_DEV_ID_ICH8_IFE_G 0x10C5 |
332 | #define E1000_DEV_ID_ICH8_IGP_M 0x104D | 347 | #define E1000_DEV_ID_ICH8_IGP_M 0x104D |
333 | #define E1000_DEV_ID_ICH9_IGP_AMT 0x10BD | 348 | #define E1000_DEV_ID_ICH9_IGP_AMT 0x10BD |
349 | #define E1000_DEV_ID_ICH9_IGP_M_AMT 0x10F5 | ||
350 | #define E1000_DEV_ID_ICH9_IGP_M 0x10BF | ||
351 | #define E1000_DEV_ID_ICH9_IGP_M_V 0x10CB | ||
334 | #define E1000_DEV_ID_ICH9_IGP_C 0x294C | 352 | #define E1000_DEV_ID_ICH9_IGP_C 0x294C |
335 | #define E1000_DEV_ID_ICH9_IFE 0x10C0 | 353 | #define E1000_DEV_ID_ICH9_IFE 0x10C0 |
336 | #define E1000_DEV_ID_ICH9_IFE_GT 0x10C3 | 354 | #define E1000_DEV_ID_ICH9_IFE_GT 0x10C3 |
337 | #define E1000_DEV_ID_ICH9_IFE_G 0x10C2 | 355 | #define E1000_DEV_ID_ICH9_IFE_G 0x10C2 |
356 | #define E1000_DEV_ID_ICH10_R_BM_LM 0x10CC | ||
357 | #define E1000_DEV_ID_ICH10_R_BM_LF 0x10CD | ||
358 | #define E1000_DEV_ID_ICH10_R_BM_V 0x10CE | ||
338 | 359 | ||
339 | #define E1000_FUNC_1 1 | 360 | #define E1000_FUNC_1 1 |
340 | 361 | ||
@@ -378,6 +399,7 @@ enum e1000_phy_type { | |||
378 | e1000_phy_gg82563, | 399 | e1000_phy_gg82563, |
379 | e1000_phy_igp_3, | 400 | e1000_phy_igp_3, |
380 | e1000_phy_ife, | 401 | e1000_phy_ife, |
402 | e1000_phy_bm, | ||
381 | }; | 403 | }; |
382 | 404 | ||
383 | enum e1000_bus_width { | 405 | enum e1000_bus_width { |
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c index 768485dbb2c6..9e38452a738c 100644 --- a/drivers/net/e1000e/ich8lan.c +++ b/drivers/net/e1000e/ich8lan.c | |||
@@ -38,6 +38,12 @@ | |||
38 | * 82566DM Gigabit Network Connection | 38 | * 82566DM Gigabit Network Connection |
39 | * 82566MC Gigabit Network Connection | 39 | * 82566MC Gigabit Network Connection |
40 | * 82566MM Gigabit Network Connection | 40 | * 82566MM Gigabit Network Connection |
41 | * 82567LM Gigabit Network Connection | ||
42 | * 82567LF Gigabit Network Connection | ||
43 | * 82567LM-2 Gigabit Network Connection | ||
44 | * 82567LF-2 Gigabit Network Connection | ||
45 | * 82567V-2 Gigabit Network Connection | ||
46 | * 82562GT-3 10/100 Network Connection | ||
41 | */ | 47 | */ |
42 | 48 | ||
43 | #include <linux/netdevice.h> | 49 | #include <linux/netdevice.h> |
@@ -198,6 +204,19 @@ static s32 e1000_init_phy_params_ich8lan(struct e1000_hw *hw) | |||
198 | phy->addr = 1; | 204 | phy->addr = 1; |
199 | phy->reset_delay_us = 100; | 205 | phy->reset_delay_us = 100; |
200 | 206 | ||
207 | /* | ||
208 | * We may need to do this twice - once for IGP and if that fails, | ||
209 | * we'll set BM func pointers and try again | ||
210 | */ | ||
211 | ret_val = e1000e_determine_phy_address(hw); | ||
212 | if (ret_val) { | ||
213 | hw->phy.ops.write_phy_reg = e1000e_write_phy_reg_bm; | ||
214 | hw->phy.ops.read_phy_reg = e1000e_read_phy_reg_bm; | ||
215 | ret_val = e1000e_determine_phy_address(hw); | ||
216 | if (ret_val) | ||
217 | return ret_val; | ||
218 | } | ||
219 | |||
201 | phy->id = 0; | 220 | phy->id = 0; |
202 | while ((e1000_phy_unknown == e1000e_get_phy_type_from_id(phy->id)) && | 221 | while ((e1000_phy_unknown == e1000e_get_phy_type_from_id(phy->id)) && |
203 | (i++ < 100)) { | 222 | (i++ < 100)) { |
@@ -219,6 +238,13 @@ static s32 e1000_init_phy_params_ich8lan(struct e1000_hw *hw) | |||
219 | phy->type = e1000_phy_ife; | 238 | phy->type = e1000_phy_ife; |
220 | phy->autoneg_mask = E1000_ALL_NOT_GIG; | 239 | phy->autoneg_mask = E1000_ALL_NOT_GIG; |
221 | break; | 240 | break; |
241 | case BME1000_E_PHY_ID: | ||
242 | phy->type = e1000_phy_bm; | ||
243 | phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; | ||
244 | hw->phy.ops.read_phy_reg = e1000e_read_phy_reg_bm; | ||
245 | hw->phy.ops.write_phy_reg = e1000e_write_phy_reg_bm; | ||
246 | hw->phy.ops.commit_phy = e1000e_phy_sw_reset; | ||
247 | break; | ||
222 | default: | 248 | default: |
223 | return -E1000_ERR_PHY; | 249 | return -E1000_ERR_PHY; |
224 | break; | 250 | break; |
@@ -664,6 +690,7 @@ static s32 e1000_get_phy_info_ich8lan(struct e1000_hw *hw) | |||
664 | return e1000_get_phy_info_ife_ich8lan(hw); | 690 | return e1000_get_phy_info_ife_ich8lan(hw); |
665 | break; | 691 | break; |
666 | case e1000_phy_igp_3: | 692 | case e1000_phy_igp_3: |
693 | case e1000_phy_bm: | ||
667 | return e1000e_get_phy_info_igp(hw); | 694 | return e1000e_get_phy_info_igp(hw); |
668 | break; | 695 | break; |
669 | default: | 696 | default: |
@@ -728,7 +755,7 @@ static s32 e1000_set_d0_lplu_state_ich8lan(struct e1000_hw *hw, bool active) | |||
728 | s32 ret_val = 0; | 755 | s32 ret_val = 0; |
729 | u16 data; | 756 | u16 data; |
730 | 757 | ||
731 | if (phy->type != e1000_phy_igp_3) | 758 | if (phy->type == e1000_phy_ife) |
732 | return ret_val; | 759 | return ret_val; |
733 | 760 | ||
734 | phy_ctrl = er32(PHY_CTRL); | 761 | phy_ctrl = er32(PHY_CTRL); |
@@ -1918,8 +1945,35 @@ static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw) | |||
1918 | ret_val = e1000e_copper_link_setup_igp(hw); | 1945 | ret_val = e1000e_copper_link_setup_igp(hw); |
1919 | if (ret_val) | 1946 | if (ret_val) |
1920 | return ret_val; | 1947 | return ret_val; |
1948 | } else if (hw->phy.type == e1000_phy_bm) { | ||
1949 | ret_val = e1000e_copper_link_setup_m88(hw); | ||
1950 | if (ret_val) | ||
1951 | return ret_val; | ||
1921 | } | 1952 | } |
1922 | 1953 | ||
1954 | if (hw->phy.type == e1000_phy_ife) { | ||
1955 | ret_val = e1e_rphy(hw, IFE_PHY_MDIX_CONTROL, ®_data); | ||
1956 | if (ret_val) | ||
1957 | return ret_val; | ||
1958 | |||
1959 | reg_data &= ~IFE_PMC_AUTO_MDIX; | ||
1960 | |||
1961 | switch (hw->phy.mdix) { | ||
1962 | case 1: | ||
1963 | reg_data &= ~IFE_PMC_FORCE_MDIX; | ||
1964 | break; | ||
1965 | case 2: | ||
1966 | reg_data |= IFE_PMC_FORCE_MDIX; | ||
1967 | break; | ||
1968 | case 0: | ||
1969 | default: | ||
1970 | reg_data |= IFE_PMC_AUTO_MDIX; | ||
1971 | break; | ||
1972 | } | ||
1973 | ret_val = e1e_wphy(hw, IFE_PHY_MDIX_CONTROL, reg_data); | ||
1974 | if (ret_val) | ||
1975 | return ret_val; | ||
1976 | } | ||
1923 | return e1000e_setup_copper_link(hw); | 1977 | return e1000e_setup_copper_link(hw); |
1924 | } | 1978 | } |
1925 | 1979 | ||
@@ -2127,6 +2181,31 @@ void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw) | |||
2127 | } | 2181 | } |
2128 | 2182 | ||
2129 | /** | 2183 | /** |
2184 | * e1000e_disable_gig_wol_ich8lan - disable gig during WoL | ||
2185 | * @hw: pointer to the HW structure | ||
2186 | * | ||
2187 | * During S0 to Sx transition, it is possible the link remains at gig | ||
2188 | * instead of negotiating to a lower speed. Before going to Sx, set | ||
2189 | * 'LPLU Enabled' and 'Gig Disable' to force link speed negotiation | ||
2190 | * to a lower speed. | ||
2191 | * | ||
2192 | * Should only be called for ICH9 devices. | ||
2193 | **/ | ||
2194 | void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw) | ||
2195 | { | ||
2196 | u32 phy_ctrl; | ||
2197 | |||
2198 | if (hw->mac.type == e1000_ich9lan) { | ||
2199 | phy_ctrl = er32(PHY_CTRL); | ||
2200 | phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU | | ||
2201 | E1000_PHY_CTRL_GBE_DISABLE; | ||
2202 | ew32(PHY_CTRL, phy_ctrl); | ||
2203 | } | ||
2204 | |||
2205 | return; | ||
2206 | } | ||
2207 | |||
2208 | /** | ||
2130 | * e1000_cleanup_led_ich8lan - Restore the default LED operation | 2209 | * e1000_cleanup_led_ich8lan - Restore the default LED operation |
2131 | * @hw: pointer to the HW structure | 2210 | * @hw: pointer to the HW structure |
2132 | * | 2211 | * |
@@ -2247,6 +2326,7 @@ static struct e1000_nvm_operations ich8_nvm_ops = { | |||
2247 | struct e1000_info e1000_ich8_info = { | 2326 | struct e1000_info e1000_ich8_info = { |
2248 | .mac = e1000_ich8lan, | 2327 | .mac = e1000_ich8lan, |
2249 | .flags = FLAG_HAS_WOL | 2328 | .flags = FLAG_HAS_WOL |
2329 | | FLAG_IS_ICH | ||
2250 | | FLAG_RX_CSUM_ENABLED | 2330 | | FLAG_RX_CSUM_ENABLED |
2251 | | FLAG_HAS_CTRLEXT_ON_LOAD | 2331 | | FLAG_HAS_CTRLEXT_ON_LOAD |
2252 | | FLAG_HAS_AMT | 2332 | | FLAG_HAS_AMT |
@@ -2262,6 +2342,7 @@ struct e1000_info e1000_ich8_info = { | |||
2262 | struct e1000_info e1000_ich9_info = { | 2342 | struct e1000_info e1000_ich9_info = { |
2263 | .mac = e1000_ich9lan, | 2343 | .mac = e1000_ich9lan, |
2264 | .flags = FLAG_HAS_JUMBO_FRAMES | 2344 | .flags = FLAG_HAS_JUMBO_FRAMES |
2345 | | FLAG_IS_ICH | ||
2265 | | FLAG_HAS_WOL | 2346 | | FLAG_HAS_WOL |
2266 | | FLAG_RX_CSUM_ENABLED | 2347 | | FLAG_RX_CSUM_ENABLED |
2267 | | FLAG_HAS_CTRLEXT_ON_LOAD | 2348 | | FLAG_HAS_CTRLEXT_ON_LOAD |
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c index 8991ab8911e2..8cbb40f3a506 100644 --- a/drivers/net/e1000e/netdev.c +++ b/drivers/net/e1000e/netdev.c | |||
@@ -43,10 +43,11 @@ | |||
43 | #include <linux/if_vlan.h> | 43 | #include <linux/if_vlan.h> |
44 | #include <linux/cpu.h> | 44 | #include <linux/cpu.h> |
45 | #include <linux/smp.h> | 45 | #include <linux/smp.h> |
46 | #include <linux/pm_qos_params.h> | ||
46 | 47 | ||
47 | #include "e1000.h" | 48 | #include "e1000.h" |
48 | 49 | ||
49 | #define DRV_VERSION "0.2.1" | 50 | #define DRV_VERSION "0.3.3.3-k2" |
50 | char e1000e_driver_name[] = "e1000e"; | 51 | char e1000e_driver_name[] = "e1000e"; |
51 | const char e1000e_driver_version[] = DRV_VERSION; | 52 | const char e1000e_driver_version[] = DRV_VERSION; |
52 | 53 | ||
@@ -341,6 +342,89 @@ no_buffers: | |||
341 | } | 342 | } |
342 | 343 | ||
343 | /** | 344 | /** |
345 | * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers | ||
346 | * @adapter: address of board private structure | ||
347 | * @rx_ring: pointer to receive ring structure | ||
348 | * @cleaned_count: number of buffers to allocate this pass | ||
349 | **/ | ||
350 | |||
351 | static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter, | ||
352 | int cleaned_count) | ||
353 | { | ||
354 | struct net_device *netdev = adapter->netdev; | ||
355 | struct pci_dev *pdev = adapter->pdev; | ||
356 | struct e1000_rx_desc *rx_desc; | ||
357 | struct e1000_ring *rx_ring = adapter->rx_ring; | ||
358 | struct e1000_buffer *buffer_info; | ||
359 | struct sk_buff *skb; | ||
360 | unsigned int i; | ||
361 | unsigned int bufsz = 256 - | ||
362 | 16 /* for skb_reserve */ - | ||
363 | NET_IP_ALIGN; | ||
364 | |||
365 | i = rx_ring->next_to_use; | ||
366 | buffer_info = &rx_ring->buffer_info[i]; | ||
367 | |||
368 | while (cleaned_count--) { | ||
369 | skb = buffer_info->skb; | ||
370 | if (skb) { | ||
371 | skb_trim(skb, 0); | ||
372 | goto check_page; | ||
373 | } | ||
374 | |||
375 | skb = netdev_alloc_skb(netdev, bufsz); | ||
376 | if (unlikely(!skb)) { | ||
377 | /* Better luck next round */ | ||
378 | adapter->alloc_rx_buff_failed++; | ||
379 | break; | ||
380 | } | ||
381 | |||
382 | /* Make buffer alignment 2 beyond a 16 byte boundary | ||
383 | * this will result in a 16 byte aligned IP header after | ||
384 | * the 14 byte MAC header is removed | ||
385 | */ | ||
386 | skb_reserve(skb, NET_IP_ALIGN); | ||
387 | |||
388 | buffer_info->skb = skb; | ||
389 | check_page: | ||
390 | /* allocate a new page if necessary */ | ||
391 | if (!buffer_info->page) { | ||
392 | buffer_info->page = alloc_page(GFP_ATOMIC); | ||
393 | if (unlikely(!buffer_info->page)) { | ||
394 | adapter->alloc_rx_buff_failed++; | ||
395 | break; | ||
396 | } | ||
397 | } | ||
398 | |||
399 | if (!buffer_info->dma) | ||
400 | buffer_info->dma = pci_map_page(pdev, | ||
401 | buffer_info->page, 0, | ||
402 | PAGE_SIZE, | ||
403 | PCI_DMA_FROMDEVICE); | ||
404 | |||
405 | rx_desc = E1000_RX_DESC(*rx_ring, i); | ||
406 | rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); | ||
407 | |||
408 | if (unlikely(++i == rx_ring->count)) | ||
409 | i = 0; | ||
410 | buffer_info = &rx_ring->buffer_info[i]; | ||
411 | } | ||
412 | |||
413 | if (likely(rx_ring->next_to_use != i)) { | ||
414 | rx_ring->next_to_use = i; | ||
415 | if (unlikely(i-- == 0)) | ||
416 | i = (rx_ring->count - 1); | ||
417 | |||
418 | /* Force memory writes to complete before letting h/w | ||
419 | * know there are new descriptors to fetch. (Only | ||
420 | * applicable for weak-ordered memory model archs, | ||
421 | * such as IA-64). */ | ||
422 | wmb(); | ||
423 | writel(i, adapter->hw.hw_addr + rx_ring->tail); | ||
424 | } | ||
425 | } | ||
426 | |||
427 | /** | ||
344 | * e1000_clean_rx_irq - Send received data up the network stack; legacy | 428 | * e1000_clean_rx_irq - Send received data up the network stack; legacy |
345 | * @adapter: board private structure | 429 | * @adapter: board private structure |
346 | * | 430 | * |
@@ -783,6 +867,186 @@ next_desc: | |||
783 | } | 867 | } |
784 | 868 | ||
785 | /** | 869 | /** |
870 | * e1000_consume_page - helper function | ||
871 | **/ | ||
872 | static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb, | ||
873 | u16 length) | ||
874 | { | ||
875 | bi->page = NULL; | ||
876 | skb->len += length; | ||
877 | skb->data_len += length; | ||
878 | skb->truesize += length; | ||
879 | } | ||
880 | |||
881 | /** | ||
882 | * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy | ||
883 | * @adapter: board private structure | ||
884 | * | ||
885 | * the return value indicates whether actual cleaning was done, there | ||
886 | * is no guarantee that everything was cleaned | ||
887 | **/ | ||
888 | |||
889 | static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter, | ||
890 | int *work_done, int work_to_do) | ||
891 | { | ||
892 | struct net_device *netdev = adapter->netdev; | ||
893 | struct pci_dev *pdev = adapter->pdev; | ||
894 | struct e1000_ring *rx_ring = adapter->rx_ring; | ||
895 | struct e1000_rx_desc *rx_desc, *next_rxd; | ||
896 | struct e1000_buffer *buffer_info, *next_buffer; | ||
897 | u32 length; | ||
898 | unsigned int i; | ||
899 | int cleaned_count = 0; | ||
900 | bool cleaned = false; | ||
901 | unsigned int total_rx_bytes=0, total_rx_packets=0; | ||
902 | |||
903 | i = rx_ring->next_to_clean; | ||
904 | rx_desc = E1000_RX_DESC(*rx_ring, i); | ||
905 | buffer_info = &rx_ring->buffer_info[i]; | ||
906 | |||
907 | while (rx_desc->status & E1000_RXD_STAT_DD) { | ||
908 | struct sk_buff *skb; | ||
909 | u8 status; | ||
910 | |||
911 | if (*work_done >= work_to_do) | ||
912 | break; | ||
913 | (*work_done)++; | ||
914 | |||
915 | status = rx_desc->status; | ||
916 | skb = buffer_info->skb; | ||
917 | buffer_info->skb = NULL; | ||
918 | |||
919 | ++i; | ||
920 | if (i == rx_ring->count) | ||
921 | i = 0; | ||
922 | next_rxd = E1000_RX_DESC(*rx_ring, i); | ||
923 | prefetch(next_rxd); | ||
924 | |||
925 | next_buffer = &rx_ring->buffer_info[i]; | ||
926 | |||
927 | cleaned = true; | ||
928 | cleaned_count++; | ||
929 | pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE, | ||
930 | PCI_DMA_FROMDEVICE); | ||
931 | buffer_info->dma = 0; | ||
932 | |||
933 | length = le16_to_cpu(rx_desc->length); | ||
934 | |||
935 | /* errors is only valid for DD + EOP descriptors */ | ||
936 | if (unlikely((status & E1000_RXD_STAT_EOP) && | ||
937 | (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) { | ||
938 | /* recycle both page and skb */ | ||
939 | buffer_info->skb = skb; | ||
940 | /* an error means any chain goes out the window | ||
941 | * too */ | ||
942 | if (rx_ring->rx_skb_top) | ||
943 | dev_kfree_skb(rx_ring->rx_skb_top); | ||
944 | rx_ring->rx_skb_top = NULL; | ||
945 | goto next_desc; | ||
946 | } | ||
947 | |||
948 | #define rxtop rx_ring->rx_skb_top | ||
949 | if (!(status & E1000_RXD_STAT_EOP)) { | ||
950 | /* this descriptor is only the beginning (or middle) */ | ||
951 | if (!rxtop) { | ||
952 | /* this is the beginning of a chain */ | ||
953 | rxtop = skb; | ||
954 | skb_fill_page_desc(rxtop, 0, buffer_info->page, | ||
955 | 0, length); | ||
956 | } else { | ||
957 | /* this is the middle of a chain */ | ||
958 | skb_fill_page_desc(rxtop, | ||
959 | skb_shinfo(rxtop)->nr_frags, | ||
960 | buffer_info->page, 0, length); | ||
961 | /* re-use the skb, only consumed the page */ | ||
962 | buffer_info->skb = skb; | ||
963 | } | ||
964 | e1000_consume_page(buffer_info, rxtop, length); | ||
965 | goto next_desc; | ||
966 | } else { | ||
967 | if (rxtop) { | ||
968 | /* end of the chain */ | ||
969 | skb_fill_page_desc(rxtop, | ||
970 | skb_shinfo(rxtop)->nr_frags, | ||
971 | buffer_info->page, 0, length); | ||
972 | /* re-use the current skb, we only consumed the | ||
973 | * page */ | ||
974 | buffer_info->skb = skb; | ||
975 | skb = rxtop; | ||
976 | rxtop = NULL; | ||
977 | e1000_consume_page(buffer_info, skb, length); | ||
978 | } else { | ||
979 | /* no chain, got EOP, this buf is the packet | ||
980 | * copybreak to save the put_page/alloc_page */ | ||
981 | if (length <= copybreak && | ||
982 | skb_tailroom(skb) >= length) { | ||
983 | u8 *vaddr; | ||
984 | vaddr = kmap_atomic(buffer_info->page, | ||
985 | KM_SKB_DATA_SOFTIRQ); | ||
986 | memcpy(skb_tail_pointer(skb), vaddr, | ||
987 | length); | ||
988 | kunmap_atomic(vaddr, | ||
989 | KM_SKB_DATA_SOFTIRQ); | ||
990 | /* re-use the page, so don't erase | ||
991 | * buffer_info->page */ | ||
992 | skb_put(skb, length); | ||
993 | } else { | ||
994 | skb_fill_page_desc(skb, 0, | ||
995 | buffer_info->page, 0, | ||
996 | length); | ||
997 | e1000_consume_page(buffer_info, skb, | ||
998 | length); | ||
999 | } | ||
1000 | } | ||
1001 | } | ||
1002 | |||
1003 | /* Receive Checksum Offload XXX recompute due to CRC strip? */ | ||
1004 | e1000_rx_checksum(adapter, | ||
1005 | (u32)(status) | | ||
1006 | ((u32)(rx_desc->errors) << 24), | ||
1007 | le16_to_cpu(rx_desc->csum), skb); | ||
1008 | |||
1009 | /* probably a little skewed due to removing CRC */ | ||
1010 | total_rx_bytes += skb->len; | ||
1011 | total_rx_packets++; | ||
1012 | |||
1013 | /* eth type trans needs skb->data to point to something */ | ||
1014 | if (!pskb_may_pull(skb, ETH_HLEN)) { | ||
1015 | ndev_err(netdev, "pskb_may_pull failed.\n"); | ||
1016 | dev_kfree_skb(skb); | ||
1017 | goto next_desc; | ||
1018 | } | ||
1019 | |||
1020 | e1000_receive_skb(adapter, netdev, skb, status, | ||
1021 | rx_desc->special); | ||
1022 | |||
1023 | next_desc: | ||
1024 | rx_desc->status = 0; | ||
1025 | |||
1026 | /* return some buffers to hardware, one at a time is too slow */ | ||
1027 | if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { | ||
1028 | adapter->alloc_rx_buf(adapter, cleaned_count); | ||
1029 | cleaned_count = 0; | ||
1030 | } | ||
1031 | |||
1032 | /* use prefetched values */ | ||
1033 | rx_desc = next_rxd; | ||
1034 | buffer_info = next_buffer; | ||
1035 | } | ||
1036 | rx_ring->next_to_clean = i; | ||
1037 | |||
1038 | cleaned_count = e1000_desc_unused(rx_ring); | ||
1039 | if (cleaned_count) | ||
1040 | adapter->alloc_rx_buf(adapter, cleaned_count); | ||
1041 | |||
1042 | adapter->total_rx_bytes += total_rx_bytes; | ||
1043 | adapter->total_rx_packets += total_rx_packets; | ||
1044 | adapter->net_stats.rx_bytes += total_rx_bytes; | ||
1045 | adapter->net_stats.rx_packets += total_rx_packets; | ||
1046 | return cleaned; | ||
1047 | } | ||
1048 | |||
1049 | /** | ||
786 | * e1000_clean_rx_ring - Free Rx Buffers per Queue | 1050 | * e1000_clean_rx_ring - Free Rx Buffers per Queue |
787 | * @adapter: board private structure | 1051 | * @adapter: board private structure |
788 | **/ | 1052 | **/ |
@@ -802,6 +1066,10 @@ static void e1000_clean_rx_ring(struct e1000_adapter *adapter) | |||
802 | pci_unmap_single(pdev, buffer_info->dma, | 1066 | pci_unmap_single(pdev, buffer_info->dma, |
803 | adapter->rx_buffer_len, | 1067 | adapter->rx_buffer_len, |
804 | PCI_DMA_FROMDEVICE); | 1068 | PCI_DMA_FROMDEVICE); |
1069 | else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) | ||
1070 | pci_unmap_page(pdev, buffer_info->dma, | ||
1071 | PAGE_SIZE, | ||
1072 | PCI_DMA_FROMDEVICE); | ||
805 | else if (adapter->clean_rx == e1000_clean_rx_irq_ps) | 1073 | else if (adapter->clean_rx == e1000_clean_rx_irq_ps) |
806 | pci_unmap_single(pdev, buffer_info->dma, | 1074 | pci_unmap_single(pdev, buffer_info->dma, |
807 | adapter->rx_ps_bsize0, | 1075 | adapter->rx_ps_bsize0, |
@@ -809,6 +1077,11 @@ static void e1000_clean_rx_ring(struct e1000_adapter *adapter) | |||
809 | buffer_info->dma = 0; | 1077 | buffer_info->dma = 0; |
810 | } | 1078 | } |
811 | 1079 | ||
1080 | if (buffer_info->page) { | ||
1081 | put_page(buffer_info->page); | ||
1082 | buffer_info->page = NULL; | ||
1083 | } | ||
1084 | |||
812 | if (buffer_info->skb) { | 1085 | if (buffer_info->skb) { |
813 | dev_kfree_skb(buffer_info->skb); | 1086 | dev_kfree_skb(buffer_info->skb); |
814 | buffer_info->skb = NULL; | 1087 | buffer_info->skb = NULL; |
@@ -1755,10 +2028,12 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter) | |||
1755 | * a lot of memory, since we allocate 3 pages at all times | 2028 | * a lot of memory, since we allocate 3 pages at all times |
1756 | * per packet. | 2029 | * per packet. |
1757 | */ | 2030 | */ |
1758 | adapter->rx_ps_pages = 0; | ||
1759 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); | 2031 | pages = PAGE_USE_COUNT(adapter->netdev->mtu); |
1760 | if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE)) | 2032 | if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) && |
2033 | (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE)) | ||
1761 | adapter->rx_ps_pages = pages; | 2034 | adapter->rx_ps_pages = pages; |
2035 | else | ||
2036 | adapter->rx_ps_pages = 0; | ||
1762 | 2037 | ||
1763 | if (adapter->rx_ps_pages) { | 2038 | if (adapter->rx_ps_pages) { |
1764 | /* Configure extra packet-split registers */ | 2039 | /* Configure extra packet-split registers */ |
@@ -1819,9 +2094,12 @@ static void e1000_configure_rx(struct e1000_adapter *adapter) | |||
1819 | sizeof(union e1000_rx_desc_packet_split); | 2094 | sizeof(union e1000_rx_desc_packet_split); |
1820 | adapter->clean_rx = e1000_clean_rx_irq_ps; | 2095 | adapter->clean_rx = e1000_clean_rx_irq_ps; |
1821 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; | 2096 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; |
2097 | } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) { | ||
2098 | rdlen = rx_ring->count * sizeof(struct e1000_rx_desc); | ||
2099 | adapter->clean_rx = e1000_clean_jumbo_rx_irq; | ||
2100 | adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers; | ||
1822 | } else { | 2101 | } else { |
1823 | rdlen = rx_ring->count * | 2102 | rdlen = rx_ring->count * sizeof(struct e1000_rx_desc); |
1824 | sizeof(struct e1000_rx_desc); | ||
1825 | adapter->clean_rx = e1000_clean_rx_irq; | 2103 | adapter->clean_rx = e1000_clean_rx_irq; |
1826 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers; | 2104 | adapter->alloc_rx_buf = e1000_alloc_rx_buffers; |
1827 | } | 2105 | } |
@@ -1885,8 +2163,21 @@ static void e1000_configure_rx(struct e1000_adapter *adapter) | |||
1885 | * units), e.g. using jumbo frames when setting to E1000_ERT_2048 | 2163 | * units), e.g. using jumbo frames when setting to E1000_ERT_2048 |
1886 | */ | 2164 | */ |
1887 | if ((adapter->flags & FLAG_HAS_ERT) && | 2165 | if ((adapter->flags & FLAG_HAS_ERT) && |
1888 | (adapter->netdev->mtu > ETH_DATA_LEN)) | 2166 | (adapter->netdev->mtu > ETH_DATA_LEN)) { |
1889 | ew32(ERT, E1000_ERT_2048); | 2167 | u32 rxdctl = er32(RXDCTL(0)); |
2168 | ew32(RXDCTL(0), rxdctl | 0x3); | ||
2169 | ew32(ERT, E1000_ERT_2048 | (1 << 13)); | ||
2170 | /* | ||
2171 | * With jumbo frames and early-receive enabled, excessive | ||
2172 | * C4->C2 latencies result in dropped transactions. | ||
2173 | */ | ||
2174 | pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY, | ||
2175 | e1000e_driver_name, 55); | ||
2176 | } else { | ||
2177 | pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY, | ||
2178 | e1000e_driver_name, | ||
2179 | PM_QOS_DEFAULT_VALUE); | ||
2180 | } | ||
1890 | 2181 | ||
1891 | /* Enable Receives */ | 2182 | /* Enable Receives */ |
1892 | ew32(RCTL, rctl); | 2183 | ew32(RCTL, rctl); |
@@ -2155,6 +2446,14 @@ void e1000e_reset(struct e1000_adapter *adapter) | |||
2155 | 2446 | ||
2156 | /* Allow time for pending master requests to run */ | 2447 | /* Allow time for pending master requests to run */ |
2157 | mac->ops.reset_hw(hw); | 2448 | mac->ops.reset_hw(hw); |
2449 | |||
2450 | /* | ||
2451 | * For parts with AMT enabled, let the firmware know | ||
2452 | * that the network interface is in control | ||
2453 | */ | ||
2454 | if ((adapter->flags & FLAG_HAS_AMT) && e1000e_check_mng_mode(hw)) | ||
2455 | e1000_get_hw_control(adapter); | ||
2456 | |||
2158 | ew32(WUC, 0); | 2457 | ew32(WUC, 0); |
2159 | 2458 | ||
2160 | if (mac->ops.init_hw(hw)) | 2459 | if (mac->ops.init_hw(hw)) |
@@ -3469,6 +3768,8 @@ static int e1000_change_mtu(struct net_device *netdev, int new_mtu) | |||
3469 | * means we reserve 2 more, this pushes us to allocate from the next | 3768 | * means we reserve 2 more, this pushes us to allocate from the next |
3470 | * larger slab size. | 3769 | * larger slab size. |
3471 | * i.e. RXBUFFER_2048 --> size-4096 slab | 3770 | * i.e. RXBUFFER_2048 --> size-4096 slab |
3771 | * However with the new *_jumbo_rx* routines, jumbo receives will use | ||
3772 | * fragmented skbs | ||
3472 | */ | 3773 | */ |
3473 | 3774 | ||
3474 | if (max_frame <= 256) | 3775 | if (max_frame <= 256) |
@@ -3626,6 +3927,9 @@ static int e1000_suspend(struct pci_dev *pdev, pm_message_t state) | |||
3626 | ew32(CTRL_EXT, ctrl_ext); | 3927 | ew32(CTRL_EXT, ctrl_ext); |
3627 | } | 3928 | } |
3628 | 3929 | ||
3930 | if (adapter->flags & FLAG_IS_ICH) | ||
3931 | e1000e_disable_gig_wol_ich8lan(&adapter->hw); | ||
3932 | |||
3629 | /* Allow time for pending master requests to run */ | 3933 | /* Allow time for pending master requests to run */ |
3630 | e1000e_disable_pcie_master(&adapter->hw); | 3934 | e1000e_disable_pcie_master(&adapter->hw); |
3631 | 3935 | ||
@@ -4292,6 +4596,13 @@ static struct pci_device_id e1000_pci_tbl[] = { | |||
4292 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, | 4596 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan }, |
4293 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, | 4597 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan }, |
4294 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, | 4598 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan }, |
4599 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan }, | ||
4600 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan }, | ||
4601 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan }, | ||
4602 | |||
4603 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan }, | ||
4604 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan }, | ||
4605 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan }, | ||
4295 | 4606 | ||
4296 | { } /* terminate list */ | 4607 | { } /* terminate list */ |
4297 | }; | 4608 | }; |
@@ -4326,7 +4637,9 @@ static int __init e1000_init_module(void) | |||
4326 | printk(KERN_INFO "%s: Copyright (c) 1999-2008 Intel Corporation.\n", | 4637 | printk(KERN_INFO "%s: Copyright (c) 1999-2008 Intel Corporation.\n", |
4327 | e1000e_driver_name); | 4638 | e1000e_driver_name); |
4328 | ret = pci_register_driver(&e1000_driver); | 4639 | ret = pci_register_driver(&e1000_driver); |
4329 | 4640 | pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name, | |
4641 | PM_QOS_DEFAULT_VALUE); | ||
4642 | |||
4330 | return ret; | 4643 | return ret; |
4331 | } | 4644 | } |
4332 | module_init(e1000_init_module); | 4645 | module_init(e1000_init_module); |
@@ -4340,6 +4653,7 @@ module_init(e1000_init_module); | |||
4340 | static void __exit e1000_exit_module(void) | 4653 | static void __exit e1000_exit_module(void) |
4341 | { | 4654 | { |
4342 | pci_unregister_driver(&e1000_driver); | 4655 | pci_unregister_driver(&e1000_driver); |
4656 | pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name); | ||
4343 | } | 4657 | } |
4344 | module_exit(e1000_exit_module); | 4658 | module_exit(e1000_exit_module); |
4345 | 4659 | ||
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c index e102332a6bee..b133dcf0e950 100644 --- a/drivers/net/e1000e/phy.c +++ b/drivers/net/e1000e/phy.c | |||
@@ -34,6 +34,9 @@ static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw); | |||
34 | static s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw); | 34 | static s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw); |
35 | static s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active); | 35 | static s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active); |
36 | static s32 e1000_wait_autoneg(struct e1000_hw *hw); | 36 | static s32 e1000_wait_autoneg(struct e1000_hw *hw); |
37 | static u32 e1000_get_phy_addr_for_bm_page(u32 page, u32 reg); | ||
38 | static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, | ||
39 | u16 *data, bool read); | ||
37 | 40 | ||
38 | /* Cable length tables */ | 41 | /* Cable length tables */ |
39 | static const u16 e1000_m88_cable_length_table[] = | 42 | static const u16 e1000_m88_cable_length_table[] = |
@@ -465,6 +468,10 @@ s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw) | |||
465 | if (phy->disable_polarity_correction == 1) | 468 | if (phy->disable_polarity_correction == 1) |
466 | phy_data |= M88E1000_PSCR_POLARITY_REVERSAL; | 469 | phy_data |= M88E1000_PSCR_POLARITY_REVERSAL; |
467 | 470 | ||
471 | /* Enable downshift on BM (disabled by default) */ | ||
472 | if (phy->type == e1000_phy_bm) | ||
473 | phy_data |= BME1000_PSCR_ENABLE_DOWNSHIFT; | ||
474 | |||
468 | ret_val = e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, phy_data); | 475 | ret_val = e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, phy_data); |
469 | if (ret_val) | 476 | if (ret_val) |
470 | return ret_val; | 477 | return ret_val; |
@@ -1776,6 +1783,10 @@ enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id) | |||
1776 | case IFE_C_E_PHY_ID: | 1783 | case IFE_C_E_PHY_ID: |
1777 | phy_type = e1000_phy_ife; | 1784 | phy_type = e1000_phy_ife; |
1778 | break; | 1785 | break; |
1786 | case BME1000_E_PHY_ID: | ||
1787 | case BME1000_E_PHY_ID_R2: | ||
1788 | phy_type = e1000_phy_bm; | ||
1789 | break; | ||
1779 | default: | 1790 | default: |
1780 | phy_type = e1000_phy_unknown; | 1791 | phy_type = e1000_phy_unknown; |
1781 | break; | 1792 | break; |
@@ -1784,6 +1795,273 @@ enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id) | |||
1784 | } | 1795 | } |
1785 | 1796 | ||
1786 | /** | 1797 | /** |
1798 | * e1000e_determine_phy_address - Determines PHY address. | ||
1799 | * @hw: pointer to the HW structure | ||
1800 | * | ||
1801 | * This uses a trial and error method to loop through possible PHY | ||
1802 | * addresses. It tests each by reading the PHY ID registers and | ||
1803 | * checking for a match. | ||
1804 | **/ | ||
1805 | s32 e1000e_determine_phy_address(struct e1000_hw *hw) | ||
1806 | { | ||
1807 | s32 ret_val = -E1000_ERR_PHY_TYPE; | ||
1808 | u32 phy_addr= 0; | ||
1809 | u32 i = 0; | ||
1810 | enum e1000_phy_type phy_type = e1000_phy_unknown; | ||
1811 | |||
1812 | do { | ||
1813 | for (phy_addr = 0; phy_addr < 4; phy_addr++) { | ||
1814 | hw->phy.addr = phy_addr; | ||
1815 | e1000e_get_phy_id(hw); | ||
1816 | phy_type = e1000e_get_phy_type_from_id(hw->phy.id); | ||
1817 | |||
1818 | /* | ||
1819 | * If phy_type is valid, break - we found our | ||
1820 | * PHY address | ||
1821 | */ | ||
1822 | if (phy_type != e1000_phy_unknown) { | ||
1823 | ret_val = 0; | ||
1824 | break; | ||
1825 | } | ||
1826 | } | ||
1827 | i++; | ||
1828 | } while ((ret_val != 0) && (i < 100)); | ||
1829 | |||
1830 | return ret_val; | ||
1831 | } | ||
1832 | |||
1833 | /** | ||
1834 | * e1000_get_phy_addr_for_bm_page - Retrieve PHY page address | ||
1835 | * @page: page to access | ||
1836 | * | ||
1837 | * Returns the phy address for the page requested. | ||
1838 | **/ | ||
1839 | static u32 e1000_get_phy_addr_for_bm_page(u32 page, u32 reg) | ||
1840 | { | ||
1841 | u32 phy_addr = 2; | ||
1842 | |||
1843 | if ((page >= 768) || (page == 0 && reg == 25) || (reg == 31)) | ||
1844 | phy_addr = 1; | ||
1845 | |||
1846 | return phy_addr; | ||
1847 | } | ||
1848 | |||
1849 | /** | ||
1850 | * e1000e_write_phy_reg_bm - Write BM PHY register | ||
1851 | * @hw: pointer to the HW structure | ||
1852 | * @offset: register offset to write to | ||
1853 | * @data: data to write at register offset | ||
1854 | * | ||
1855 | * Acquires semaphore, if necessary, then writes the data to PHY register | ||
1856 | * at the offset. Release any acquired semaphores before exiting. | ||
1857 | **/ | ||
1858 | s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data) | ||
1859 | { | ||
1860 | s32 ret_val; | ||
1861 | u32 page_select = 0; | ||
1862 | u32 page = offset >> IGP_PAGE_SHIFT; | ||
1863 | u32 page_shift = 0; | ||
1864 | |||
1865 | /* Page 800 works differently than the rest so it has its own func */ | ||
1866 | if (page == BM_WUC_PAGE) { | ||
1867 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data, | ||
1868 | false); | ||
1869 | goto out; | ||
1870 | } | ||
1871 | |||
1872 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
1873 | if (ret_val) | ||
1874 | goto out; | ||
1875 | |||
1876 | hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset); | ||
1877 | |||
1878 | if (offset > MAX_PHY_MULTI_PAGE_REG) { | ||
1879 | /* | ||
1880 | * Page select is register 31 for phy address 1 and 22 for | ||
1881 | * phy address 2 and 3. Page select is shifted only for | ||
1882 | * phy address 1. | ||
1883 | */ | ||
1884 | if (hw->phy.addr == 1) { | ||
1885 | page_shift = IGP_PAGE_SHIFT; | ||
1886 | page_select = IGP01E1000_PHY_PAGE_SELECT; | ||
1887 | } else { | ||
1888 | page_shift = 0; | ||
1889 | page_select = BM_PHY_PAGE_SELECT; | ||
1890 | } | ||
1891 | |||
1892 | /* Page is shifted left, PHY expects (page x 32) */ | ||
1893 | ret_val = e1000e_write_phy_reg_mdic(hw, page_select, | ||
1894 | (page << page_shift)); | ||
1895 | if (ret_val) { | ||
1896 | hw->phy.ops.release_phy(hw); | ||
1897 | goto out; | ||
1898 | } | ||
1899 | } | ||
1900 | |||
1901 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | ||
1902 | data); | ||
1903 | |||
1904 | hw->phy.ops.release_phy(hw); | ||
1905 | |||
1906 | out: | ||
1907 | return ret_val; | ||
1908 | } | ||
1909 | |||
1910 | /** | ||
1911 | * e1000e_read_phy_reg_bm - Read BM PHY register | ||
1912 | * @hw: pointer to the HW structure | ||
1913 | * @offset: register offset to be read | ||
1914 | * @data: pointer to the read data | ||
1915 | * | ||
1916 | * Acquires semaphore, if necessary, then reads the PHY register at offset | ||
1917 | * and storing the retrieved information in data. Release any acquired | ||
1918 | * semaphores before exiting. | ||
1919 | **/ | ||
1920 | s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data) | ||
1921 | { | ||
1922 | s32 ret_val; | ||
1923 | u32 page_select = 0; | ||
1924 | u32 page = offset >> IGP_PAGE_SHIFT; | ||
1925 | u32 page_shift = 0; | ||
1926 | |||
1927 | /* Page 800 works differently than the rest so it has its own func */ | ||
1928 | if (page == BM_WUC_PAGE) { | ||
1929 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data, | ||
1930 | true); | ||
1931 | goto out; | ||
1932 | } | ||
1933 | |||
1934 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
1935 | if (ret_val) | ||
1936 | goto out; | ||
1937 | |||
1938 | hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset); | ||
1939 | |||
1940 | if (offset > MAX_PHY_MULTI_PAGE_REG) { | ||
1941 | /* | ||
1942 | * Page select is register 31 for phy address 1 and 22 for | ||
1943 | * phy address 2 and 3. Page select is shifted only for | ||
1944 | * phy address 1. | ||
1945 | */ | ||
1946 | if (hw->phy.addr == 1) { | ||
1947 | page_shift = IGP_PAGE_SHIFT; | ||
1948 | page_select = IGP01E1000_PHY_PAGE_SELECT; | ||
1949 | } else { | ||
1950 | page_shift = 0; | ||
1951 | page_select = BM_PHY_PAGE_SELECT; | ||
1952 | } | ||
1953 | |||
1954 | /* Page is shifted left, PHY expects (page x 32) */ | ||
1955 | ret_val = e1000e_write_phy_reg_mdic(hw, page_select, | ||
1956 | (page << page_shift)); | ||
1957 | if (ret_val) { | ||
1958 | hw->phy.ops.release_phy(hw); | ||
1959 | goto out; | ||
1960 | } | ||
1961 | } | ||
1962 | |||
1963 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | ||
1964 | data); | ||
1965 | hw->phy.ops.release_phy(hw); | ||
1966 | |||
1967 | out: | ||
1968 | return ret_val; | ||
1969 | } | ||
1970 | |||
1971 | /** | ||
1972 | * e1000_access_phy_wakeup_reg_bm - Read BM PHY wakeup register | ||
1973 | * @hw: pointer to the HW structure | ||
1974 | * @offset: register offset to be read or written | ||
1975 | * @data: pointer to the data to read or write | ||
1976 | * @read: determines if operation is read or write | ||
1977 | * | ||
1978 | * Acquires semaphore, if necessary, then reads the PHY register at offset | ||
1979 | * and storing the retrieved information in data. Release any acquired | ||
1980 | * semaphores before exiting. Note that procedure to read the wakeup | ||
1981 | * registers are different. It works as such: | ||
1982 | * 1) Set page 769, register 17, bit 2 = 1 | ||
1983 | * 2) Set page to 800 for host (801 if we were manageability) | ||
1984 | * 3) Write the address using the address opcode (0x11) | ||
1985 | * 4) Read or write the data using the data opcode (0x12) | ||
1986 | * 5) Restore 769_17.2 to its original value | ||
1987 | **/ | ||
1988 | static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, | ||
1989 | u16 *data, bool read) | ||
1990 | { | ||
1991 | s32 ret_val; | ||
1992 | u16 reg = ((u16)offset) & PHY_REG_MASK; | ||
1993 | u16 phy_reg = 0; | ||
1994 | u8 phy_acquired = 1; | ||
1995 | |||
1996 | |||
1997 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
1998 | if (ret_val) { | ||
1999 | phy_acquired = 0; | ||
2000 | goto out; | ||
2001 | } | ||
2002 | |||
2003 | /* All operations in this function are phy address 1 */ | ||
2004 | hw->phy.addr = 1; | ||
2005 | |||
2006 | /* Set page 769 */ | ||
2007 | e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, | ||
2008 | (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT)); | ||
2009 | |||
2010 | ret_val = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg); | ||
2011 | if (ret_val) | ||
2012 | goto out; | ||
2013 | |||
2014 | /* First clear bit 4 to avoid a power state change */ | ||
2015 | phy_reg &= ~(BM_WUC_HOST_WU_BIT); | ||
2016 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg); | ||
2017 | if (ret_val) | ||
2018 | goto out; | ||
2019 | |||
2020 | /* Write bit 2 = 1, and clear bit 4 to 769_17 */ | ||
2021 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, | ||
2022 | phy_reg | BM_WUC_ENABLE_BIT); | ||
2023 | if (ret_val) | ||
2024 | goto out; | ||
2025 | |||
2026 | /* Select page 800 */ | ||
2027 | ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, | ||
2028 | (BM_WUC_PAGE << IGP_PAGE_SHIFT)); | ||
2029 | |||
2030 | /* Write the page 800 offset value using opcode 0x11 */ | ||
2031 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ADDRESS_OPCODE, reg); | ||
2032 | if (ret_val) | ||
2033 | goto out; | ||
2034 | |||
2035 | if (read) { | ||
2036 | /* Read the page 800 value using opcode 0x12 */ | ||
2037 | ret_val = e1000e_read_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE, | ||
2038 | data); | ||
2039 | } else { | ||
2040 | /* Read the page 800 value using opcode 0x12 */ | ||
2041 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE, | ||
2042 | *data); | ||
2043 | } | ||
2044 | |||
2045 | if (ret_val) | ||
2046 | goto out; | ||
2047 | |||
2048 | /* | ||
2049 | * Restore 769_17.2 to its original value | ||
2050 | * Set page 769 | ||
2051 | */ | ||
2052 | e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, | ||
2053 | (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT)); | ||
2054 | |||
2055 | /* Clear 769_17.2 */ | ||
2056 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg); | ||
2057 | |||
2058 | out: | ||
2059 | if (phy_acquired == 1) | ||
2060 | hw->phy.ops.release_phy(hw); | ||
2061 | return ret_val; | ||
2062 | } | ||
2063 | |||
2064 | /** | ||
1787 | * e1000e_commit_phy - Soft PHY reset | 2065 | * e1000e_commit_phy - Soft PHY reset |
1788 | * @hw: pointer to the HW structure | 2066 | * @hw: pointer to the HW structure |
1789 | * | 2067 | * |
diff --git a/drivers/net/eexpress.c b/drivers/net/eexpress.c index 2eb82aba4a8b..795c594a4b7c 100644 --- a/drivers/net/eexpress.c +++ b/drivers/net/eexpress.c | |||
@@ -202,7 +202,7 @@ static unsigned short start_code[] = { | |||
202 | 0x0000,Cmd_MCast, | 202 | 0x0000,Cmd_MCast, |
203 | 0x0076, /* link to next command */ | 203 | 0x0076, /* link to next command */ |
204 | #define CONF_NR_MULTICAST 0x44 | 204 | #define CONF_NR_MULTICAST 0x44 |
205 | 0x0000, /* number of multicast addresses */ | 205 | 0x0000, /* number of bytes in multicast address(es) */ |
206 | #define CONF_MULTICAST 0x46 | 206 | #define CONF_MULTICAST 0x46 |
207 | 0x0000, 0x0000, 0x0000, /* some addresses */ | 207 | 0x0000, 0x0000, 0x0000, /* some addresses */ |
208 | 0x0000, 0x0000, 0x0000, | 208 | 0x0000, 0x0000, 0x0000, |
@@ -1569,7 +1569,7 @@ static void eexp_hw_init586(struct net_device *dev) | |||
1569 | 1569 | ||
1570 | static void eexp_setup_filter(struct net_device *dev) | 1570 | static void eexp_setup_filter(struct net_device *dev) |
1571 | { | 1571 | { |
1572 | struct dev_mc_list *dmi = dev->mc_list; | 1572 | struct dev_mc_list *dmi; |
1573 | unsigned short ioaddr = dev->base_addr; | 1573 | unsigned short ioaddr = dev->base_addr; |
1574 | int count = dev->mc_count; | 1574 | int count = dev->mc_count; |
1575 | int i; | 1575 | int i; |
@@ -1580,9 +1580,9 @@ static void eexp_setup_filter(struct net_device *dev) | |||
1580 | } | 1580 | } |
1581 | 1581 | ||
1582 | outw(CONF_NR_MULTICAST & ~31, ioaddr+SM_PTR); | 1582 | outw(CONF_NR_MULTICAST & ~31, ioaddr+SM_PTR); |
1583 | outw(count, ioaddr+SHADOW(CONF_NR_MULTICAST)); | 1583 | outw(6*count, ioaddr+SHADOW(CONF_NR_MULTICAST)); |
1584 | for (i = 0; i < count; i++) { | 1584 | for (i = 0, dmi = dev->mc_list; i < count; i++, dmi = dmi->next) { |
1585 | unsigned short *data = (unsigned short *)dmi->dmi_addr; | 1585 | unsigned short *data; |
1586 | if (!dmi) { | 1586 | if (!dmi) { |
1587 | printk(KERN_INFO "%s: too few multicast addresses\n", dev->name); | 1587 | printk(KERN_INFO "%s: too few multicast addresses\n", dev->name); |
1588 | break; | 1588 | break; |
@@ -1591,6 +1591,7 @@ static void eexp_setup_filter(struct net_device *dev) | |||
1591 | printk(KERN_INFO "%s: invalid multicast address length given.\n", dev->name); | 1591 | printk(KERN_INFO "%s: invalid multicast address length given.\n", dev->name); |
1592 | continue; | 1592 | continue; |
1593 | } | 1593 | } |
1594 | data = (unsigned short *)dmi->dmi_addr; | ||
1594 | outw((CONF_MULTICAST+(6*i)) & ~31, ioaddr+SM_PTR); | 1595 | outw((CONF_MULTICAST+(6*i)) & ~31, ioaddr+SM_PTR); |
1595 | outw(data[0], ioaddr+SHADOW(CONF_MULTICAST+(6*i))); | 1596 | outw(data[0], ioaddr+SHADOW(CONF_MULTICAST+(6*i))); |
1596 | outw((CONF_MULTICAST+(6*i)+2) & ~31, ioaddr+SM_PTR); | 1597 | outw((CONF_MULTICAST+(6*i)+2) & ~31, ioaddr+SM_PTR); |
diff --git a/drivers/net/fs_enet/mii-fec.c b/drivers/net/fs_enet/mii-fec.c index ba75efc9f5b5..f0014cfbb275 100644 --- a/drivers/net/fs_enet/mii-fec.c +++ b/drivers/net/fs_enet/mii-fec.c | |||
@@ -194,7 +194,7 @@ static int __devinit fs_enet_mdio_probe(struct of_device *ofdev, | |||
194 | 194 | ||
195 | ret = of_address_to_resource(ofdev->node, 0, &res); | 195 | ret = of_address_to_resource(ofdev->node, 0, &res); |
196 | if (ret) | 196 | if (ret) |
197 | return ret; | 197 | goto out_res; |
198 | 198 | ||
199 | snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", res.start); | 199 | snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", res.start); |
200 | 200 | ||
@@ -236,6 +236,7 @@ out_free_irqs: | |||
236 | kfree(new_bus->irq); | 236 | kfree(new_bus->irq); |
237 | out_unmap_regs: | 237 | out_unmap_regs: |
238 | iounmap(fec->fecp); | 238 | iounmap(fec->fecp); |
239 | out_res: | ||
239 | out_fec: | 240 | out_fec: |
240 | kfree(fec); | 241 | kfree(fec); |
241 | out_mii: | 242 | out_mii: |
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c index 587afe7be689..6f22f068d6ee 100644 --- a/drivers/net/gianfar.c +++ b/drivers/net/gianfar.c | |||
@@ -138,6 +138,7 @@ static int gfar_poll(struct napi_struct *napi, int budget); | |||
138 | static void gfar_netpoll(struct net_device *dev); | 138 | static void gfar_netpoll(struct net_device *dev); |
139 | #endif | 139 | #endif |
140 | int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit); | 140 | int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit); |
141 | static int gfar_clean_tx_ring(struct net_device *dev); | ||
141 | static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb, int length); | 142 | static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb, int length); |
142 | static void gfar_vlan_rx_register(struct net_device *netdev, | 143 | static void gfar_vlan_rx_register(struct net_device *netdev, |
143 | struct vlan_group *grp); | 144 | struct vlan_group *grp); |
@@ -1141,7 +1142,7 @@ static int gfar_close(struct net_device *dev) | |||
1141 | } | 1142 | } |
1142 | 1143 | ||
1143 | /* Changes the mac address if the controller is not running. */ | 1144 | /* Changes the mac address if the controller is not running. */ |
1144 | int gfar_set_mac_address(struct net_device *dev) | 1145 | static int gfar_set_mac_address(struct net_device *dev) |
1145 | { | 1146 | { |
1146 | gfar_set_mac_for_addr(dev, 0, dev->dev_addr); | 1147 | gfar_set_mac_for_addr(dev, 0, dev->dev_addr); |
1147 | 1148 | ||
@@ -1260,7 +1261,7 @@ static void gfar_timeout(struct net_device *dev) | |||
1260 | } | 1261 | } |
1261 | 1262 | ||
1262 | /* Interrupt Handler for Transmit complete */ | 1263 | /* Interrupt Handler for Transmit complete */ |
1263 | int gfar_clean_tx_ring(struct net_device *dev) | 1264 | static int gfar_clean_tx_ring(struct net_device *dev) |
1264 | { | 1265 | { |
1265 | struct txbd8 *bdp; | 1266 | struct txbd8 *bdp; |
1266 | struct gfar_private *priv = netdev_priv(dev); | 1267 | struct gfar_private *priv = netdev_priv(dev); |
diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h index fd487be3993e..27f37c81e52c 100644 --- a/drivers/net/gianfar.h +++ b/drivers/net/gianfar.h | |||
@@ -782,5 +782,8 @@ extern void gfar_halt(struct net_device *dev); | |||
782 | extern void gfar_phy_test(struct mii_bus *bus, struct phy_device *phydev, | 782 | extern void gfar_phy_test(struct mii_bus *bus, struct phy_device *phydev, |
783 | int enable, u32 regnum, u32 read); | 783 | int enable, u32 regnum, u32 read); |
784 | void gfar_init_sysfs(struct net_device *dev); | 784 | void gfar_init_sysfs(struct net_device *dev); |
785 | int gfar_local_mdio_write(struct gfar_mii __iomem *regs, int mii_id, | ||
786 | int regnum, u16 value); | ||
787 | int gfar_local_mdio_read(struct gfar_mii __iomem *regs, int mii_id, int regnum); | ||
785 | 788 | ||
786 | #endif /* __GIANFAR_H */ | 789 | #endif /* __GIANFAR_H */ |
diff --git a/drivers/net/gianfar_sysfs.c b/drivers/net/gianfar_sysfs.c index 230878b94190..5116f68e01b9 100644 --- a/drivers/net/gianfar_sysfs.c +++ b/drivers/net/gianfar_sysfs.c | |||
@@ -103,10 +103,10 @@ static ssize_t gfar_set_rx_stash_size(struct device *dev, | |||
103 | 103 | ||
104 | spin_lock_irqsave(&priv->rxlock, flags); | 104 | spin_lock_irqsave(&priv->rxlock, flags); |
105 | if (length > priv->rx_buffer_size) | 105 | if (length > priv->rx_buffer_size) |
106 | return count; | 106 | goto out; |
107 | 107 | ||
108 | if (length == priv->rx_stash_size) | 108 | if (length == priv->rx_stash_size) |
109 | return count; | 109 | goto out; |
110 | 110 | ||
111 | priv->rx_stash_size = length; | 111 | priv->rx_stash_size = length; |
112 | 112 | ||
@@ -125,6 +125,7 @@ static ssize_t gfar_set_rx_stash_size(struct device *dev, | |||
125 | 125 | ||
126 | gfar_write(&priv->regs->attr, temp); | 126 | gfar_write(&priv->regs->attr, temp); |
127 | 127 | ||
128 | out: | ||
128 | spin_unlock_irqrestore(&priv->rxlock, flags); | 129 | spin_unlock_irqrestore(&priv->rxlock, flags); |
129 | 130 | ||
130 | return count; | 131 | return count; |
@@ -154,10 +155,10 @@ static ssize_t gfar_set_rx_stash_index(struct device *dev, | |||
154 | 155 | ||
155 | spin_lock_irqsave(&priv->rxlock, flags); | 156 | spin_lock_irqsave(&priv->rxlock, flags); |
156 | if (index > priv->rx_stash_size) | 157 | if (index > priv->rx_stash_size) |
157 | return count; | 158 | goto out; |
158 | 159 | ||
159 | if (index == priv->rx_stash_index) | 160 | if (index == priv->rx_stash_index) |
160 | return count; | 161 | goto out; |
161 | 162 | ||
162 | priv->rx_stash_index = index; | 163 | priv->rx_stash_index = index; |
163 | 164 | ||
@@ -166,6 +167,7 @@ static ssize_t gfar_set_rx_stash_index(struct device *dev, | |||
166 | temp |= ATTRELI_EI(index); | 167 | temp |= ATTRELI_EI(index); |
167 | gfar_write(&priv->regs->attreli, flags); | 168 | gfar_write(&priv->regs->attreli, flags); |
168 | 169 | ||
170 | out: | ||
169 | spin_unlock_irqrestore(&priv->rxlock, flags); | 171 | spin_unlock_irqrestore(&priv->rxlock, flags); |
170 | 172 | ||
171 | return count; | 173 | return count; |
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c index 381b36e5f64c..b7915cdcc6a5 100644 --- a/drivers/net/mv643xx_eth.c +++ b/drivers/net/mv643xx_eth.c | |||
@@ -91,6 +91,11 @@ | |||
91 | */ | 91 | */ |
92 | #define PHY_ADDR_REG 0x0000 | 92 | #define PHY_ADDR_REG 0x0000 |
93 | #define SMI_REG 0x0004 | 93 | #define SMI_REG 0x0004 |
94 | #define WINDOW_BASE(i) (0x0200 + ((i) << 3)) | ||
95 | #define WINDOW_SIZE(i) (0x0204 + ((i) << 3)) | ||
96 | #define WINDOW_REMAP_HIGH(i) (0x0280 + ((i) << 2)) | ||
97 | #define WINDOW_BAR_ENABLE 0x0290 | ||
98 | #define WINDOW_PROTECT(i) (0x0294 + ((i) << 4)) | ||
94 | 99 | ||
95 | /* | 100 | /* |
96 | * Per-port registers. | 101 | * Per-port registers. |
@@ -507,9 +512,23 @@ struct mv643xx_mib_counters { | |||
507 | u32 late_collision; | 512 | u32 late_collision; |
508 | }; | 513 | }; |
509 | 514 | ||
515 | struct mv643xx_shared_private { | ||
516 | void __iomem *eth_base; | ||
517 | |||
518 | /* used to protect SMI_REG, which is shared across ports */ | ||
519 | spinlock_t phy_lock; | ||
520 | |||
521 | u32 win_protect; | ||
522 | |||
523 | unsigned int t_clk; | ||
524 | }; | ||
525 | |||
510 | struct mv643xx_private { | 526 | struct mv643xx_private { |
527 | struct mv643xx_shared_private *shared; | ||
511 | int port_num; /* User Ethernet port number */ | 528 | int port_num; /* User Ethernet port number */ |
512 | 529 | ||
530 | struct mv643xx_shared_private *shared_smi; | ||
531 | |||
513 | u32 rx_sram_addr; /* Base address of rx sram area */ | 532 | u32 rx_sram_addr; /* Base address of rx sram area */ |
514 | u32 rx_sram_size; /* Size of rx sram area */ | 533 | u32 rx_sram_size; /* Size of rx sram area */ |
515 | u32 tx_sram_addr; /* Base address of tx sram area */ | 534 | u32 tx_sram_addr; /* Base address of tx sram area */ |
@@ -614,19 +633,14 @@ static const struct ethtool_ops mv643xx_ethtool_ops; | |||
614 | static char mv643xx_driver_name[] = "mv643xx_eth"; | 633 | static char mv643xx_driver_name[] = "mv643xx_eth"; |
615 | static char mv643xx_driver_version[] = "1.0"; | 634 | static char mv643xx_driver_version[] = "1.0"; |
616 | 635 | ||
617 | static void __iomem *mv643xx_eth_base; | ||
618 | |||
619 | /* used to protect SMI_REG, which is shared across ports */ | ||
620 | static DEFINE_SPINLOCK(mv643xx_eth_phy_lock); | ||
621 | |||
622 | static inline u32 rdl(struct mv643xx_private *mp, int offset) | 636 | static inline u32 rdl(struct mv643xx_private *mp, int offset) |
623 | { | 637 | { |
624 | return readl(mv643xx_eth_base + offset); | 638 | return readl(mp->shared->eth_base + offset); |
625 | } | 639 | } |
626 | 640 | ||
627 | static inline void wrl(struct mv643xx_private *mp, int offset, u32 data) | 641 | static inline void wrl(struct mv643xx_private *mp, int offset, u32 data) |
628 | { | 642 | { |
629 | writel(data, mv643xx_eth_base + offset); | 643 | writel(data, mp->shared->eth_base + offset); |
630 | } | 644 | } |
631 | 645 | ||
632 | /* | 646 | /* |
@@ -1119,7 +1133,6 @@ static irqreturn_t mv643xx_eth_int_handler(int irq, void *dev_id) | |||
1119 | * | 1133 | * |
1120 | * INPUT: | 1134 | * INPUT: |
1121 | * struct mv643xx_private *mp Ethernet port | 1135 | * struct mv643xx_private *mp Ethernet port |
1122 | * unsigned int t_clk t_clk of the MV-643xx chip in HZ units | ||
1123 | * unsigned int delay Delay in usec | 1136 | * unsigned int delay Delay in usec |
1124 | * | 1137 | * |
1125 | * OUTPUT: | 1138 | * OUTPUT: |
@@ -1130,10 +1143,10 @@ static irqreturn_t mv643xx_eth_int_handler(int irq, void *dev_id) | |||
1130 | * | 1143 | * |
1131 | */ | 1144 | */ |
1132 | static unsigned int eth_port_set_rx_coal(struct mv643xx_private *mp, | 1145 | static unsigned int eth_port_set_rx_coal(struct mv643xx_private *mp, |
1133 | unsigned int t_clk, unsigned int delay) | 1146 | unsigned int delay) |
1134 | { | 1147 | { |
1135 | unsigned int port_num = mp->port_num; | 1148 | unsigned int port_num = mp->port_num; |
1136 | unsigned int coal = ((t_clk / 1000000) * delay) / 64; | 1149 | unsigned int coal = ((mp->shared->t_clk / 1000000) * delay) / 64; |
1137 | 1150 | ||
1138 | /* Set RX Coalescing mechanism */ | 1151 | /* Set RX Coalescing mechanism */ |
1139 | wrl(mp, SDMA_CONFIG_REG(port_num), | 1152 | wrl(mp, SDMA_CONFIG_REG(port_num), |
@@ -1158,7 +1171,6 @@ static unsigned int eth_port_set_rx_coal(struct mv643xx_private *mp, | |||
1158 | * | 1171 | * |
1159 | * INPUT: | 1172 | * INPUT: |
1160 | * struct mv643xx_private *mp Ethernet port | 1173 | * struct mv643xx_private *mp Ethernet port |
1161 | * unsigned int t_clk t_clk of the MV-643xx chip in HZ units | ||
1162 | * unsigned int delay Delay in uSeconds | 1174 | * unsigned int delay Delay in uSeconds |
1163 | * | 1175 | * |
1164 | * OUTPUT: | 1176 | * OUTPUT: |
@@ -1169,9 +1181,9 @@ static unsigned int eth_port_set_rx_coal(struct mv643xx_private *mp, | |||
1169 | * | 1181 | * |
1170 | */ | 1182 | */ |
1171 | static unsigned int eth_port_set_tx_coal(struct mv643xx_private *mp, | 1183 | static unsigned int eth_port_set_tx_coal(struct mv643xx_private *mp, |
1172 | unsigned int t_clk, unsigned int delay) | 1184 | unsigned int delay) |
1173 | { | 1185 | { |
1174 | unsigned int coal = ((t_clk / 1000000) * delay) / 64; | 1186 | unsigned int coal = ((mp->shared->t_clk / 1000000) * delay) / 64; |
1175 | 1187 | ||
1176 | /* Set TX Coalescing mechanism */ | 1188 | /* Set TX Coalescing mechanism */ |
1177 | wrl(mp, TX_FIFO_URGENT_THRESHOLD_REG(mp->port_num), coal << 4); | 1189 | wrl(mp, TX_FIFO_URGENT_THRESHOLD_REG(mp->port_num), coal << 4); |
@@ -1413,11 +1425,11 @@ static int mv643xx_eth_open(struct net_device *dev) | |||
1413 | 1425 | ||
1414 | #ifdef MV643XX_COAL | 1426 | #ifdef MV643XX_COAL |
1415 | mp->rx_int_coal = | 1427 | mp->rx_int_coal = |
1416 | eth_port_set_rx_coal(mp, 133000000, MV643XX_RX_COAL); | 1428 | eth_port_set_rx_coal(mp, MV643XX_RX_COAL); |
1417 | #endif | 1429 | #endif |
1418 | 1430 | ||
1419 | mp->tx_int_coal = | 1431 | mp->tx_int_coal = |
1420 | eth_port_set_tx_coal(mp, 133000000, MV643XX_TX_COAL); | 1432 | eth_port_set_tx_coal(mp, MV643XX_TX_COAL); |
1421 | 1433 | ||
1422 | /* Unmask phy and link status changes interrupts */ | 1434 | /* Unmask phy and link status changes interrupts */ |
1423 | wrl(mp, INTERRUPT_EXTEND_MASK_REG(port_num), ETH_INT_UNMASK_ALL_EXT); | 1435 | wrl(mp, INTERRUPT_EXTEND_MASK_REG(port_num), ETH_INT_UNMASK_ALL_EXT); |
@@ -1827,6 +1839,11 @@ static int mv643xx_eth_probe(struct platform_device *pdev) | |||
1827 | return -ENODEV; | 1839 | return -ENODEV; |
1828 | } | 1840 | } |
1829 | 1841 | ||
1842 | if (pd->shared == NULL) { | ||
1843 | printk(KERN_ERR "No mv643xx_eth_platform_data->shared\n"); | ||
1844 | return -ENODEV; | ||
1845 | } | ||
1846 | |||
1830 | dev = alloc_etherdev(sizeof(struct mv643xx_private)); | 1847 | dev = alloc_etherdev(sizeof(struct mv643xx_private)); |
1831 | if (!dev) | 1848 | if (!dev) |
1832 | return -ENOMEM; | 1849 | return -ENOMEM; |
@@ -1877,8 +1894,16 @@ static int mv643xx_eth_probe(struct platform_device *pdev) | |||
1877 | 1894 | ||
1878 | spin_lock_init(&mp->lock); | 1895 | spin_lock_init(&mp->lock); |
1879 | 1896 | ||
1897 | mp->shared = platform_get_drvdata(pd->shared); | ||
1880 | port_num = mp->port_num = pd->port_number; | 1898 | port_num = mp->port_num = pd->port_number; |
1881 | 1899 | ||
1900 | if (mp->shared->win_protect) | ||
1901 | wrl(mp, WINDOW_PROTECT(port_num), mp->shared->win_protect); | ||
1902 | |||
1903 | mp->shared_smi = mp->shared; | ||
1904 | if (pd->shared_smi != NULL) | ||
1905 | mp->shared_smi = platform_get_drvdata(pd->shared_smi); | ||
1906 | |||
1882 | /* set default config values */ | 1907 | /* set default config values */ |
1883 | eth_port_uc_addr_get(mp, dev->dev_addr); | 1908 | eth_port_uc_addr_get(mp, dev->dev_addr); |
1884 | mp->rx_ring_size = PORT_DEFAULT_RECEIVE_QUEUE_SIZE; | 1909 | mp->rx_ring_size = PORT_DEFAULT_RECEIVE_QUEUE_SIZE; |
@@ -1983,30 +2008,91 @@ static int mv643xx_eth_remove(struct platform_device *pdev) | |||
1983 | return 0; | 2008 | return 0; |
1984 | } | 2009 | } |
1985 | 2010 | ||
2011 | static void mv643xx_eth_conf_mbus_windows(struct mv643xx_shared_private *msp, | ||
2012 | struct mbus_dram_target_info *dram) | ||
2013 | { | ||
2014 | void __iomem *base = msp->eth_base; | ||
2015 | u32 win_enable; | ||
2016 | u32 win_protect; | ||
2017 | int i; | ||
2018 | |||
2019 | for (i = 0; i < 6; i++) { | ||
2020 | writel(0, base + WINDOW_BASE(i)); | ||
2021 | writel(0, base + WINDOW_SIZE(i)); | ||
2022 | if (i < 4) | ||
2023 | writel(0, base + WINDOW_REMAP_HIGH(i)); | ||
2024 | } | ||
2025 | |||
2026 | win_enable = 0x3f; | ||
2027 | win_protect = 0; | ||
2028 | |||
2029 | for (i = 0; i < dram->num_cs; i++) { | ||
2030 | struct mbus_dram_window *cs = dram->cs + i; | ||
2031 | |||
2032 | writel((cs->base & 0xffff0000) | | ||
2033 | (cs->mbus_attr << 8) | | ||
2034 | dram->mbus_dram_target_id, base + WINDOW_BASE(i)); | ||
2035 | writel((cs->size - 1) & 0xffff0000, base + WINDOW_SIZE(i)); | ||
2036 | |||
2037 | win_enable &= ~(1 << i); | ||
2038 | win_protect |= 3 << (2 * i); | ||
2039 | } | ||
2040 | |||
2041 | writel(win_enable, base + WINDOW_BAR_ENABLE); | ||
2042 | msp->win_protect = win_protect; | ||
2043 | } | ||
2044 | |||
1986 | static int mv643xx_eth_shared_probe(struct platform_device *pdev) | 2045 | static int mv643xx_eth_shared_probe(struct platform_device *pdev) |
1987 | { | 2046 | { |
1988 | static int mv643xx_version_printed = 0; | 2047 | static int mv643xx_version_printed = 0; |
2048 | struct mv643xx_eth_shared_platform_data *pd = pdev->dev.platform_data; | ||
2049 | struct mv643xx_shared_private *msp; | ||
1989 | struct resource *res; | 2050 | struct resource *res; |
2051 | int ret; | ||
1990 | 2052 | ||
1991 | if (!mv643xx_version_printed++) | 2053 | if (!mv643xx_version_printed++) |
1992 | printk(KERN_NOTICE "MV-643xx 10/100/1000 Ethernet Driver\n"); | 2054 | printk(KERN_NOTICE "MV-643xx 10/100/1000 Ethernet Driver\n"); |
1993 | 2055 | ||
2056 | ret = -EINVAL; | ||
1994 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 2057 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1995 | if (res == NULL) | 2058 | if (res == NULL) |
1996 | return -ENODEV; | 2059 | goto out; |
1997 | 2060 | ||
1998 | mv643xx_eth_base = ioremap(res->start, res->end - res->start + 1); | 2061 | ret = -ENOMEM; |
1999 | if (mv643xx_eth_base == NULL) | 2062 | msp = kmalloc(sizeof(*msp), GFP_KERNEL); |
2000 | return -ENOMEM; | 2063 | if (msp == NULL) |
2064 | goto out; | ||
2065 | memset(msp, 0, sizeof(*msp)); | ||
2066 | |||
2067 | msp->eth_base = ioremap(res->start, res->end - res->start + 1); | ||
2068 | if (msp->eth_base == NULL) | ||
2069 | goto out_free; | ||
2070 | |||
2071 | spin_lock_init(&msp->phy_lock); | ||
2072 | msp->t_clk = (pd != NULL && pd->t_clk != 0) ? pd->t_clk : 133000000; | ||
2073 | |||
2074 | platform_set_drvdata(pdev, msp); | ||
2075 | |||
2076 | /* | ||
2077 | * (Re-)program MBUS remapping windows if we are asked to. | ||
2078 | */ | ||
2079 | if (pd != NULL && pd->dram != NULL) | ||
2080 | mv643xx_eth_conf_mbus_windows(msp, pd->dram); | ||
2001 | 2081 | ||
2002 | return 0; | 2082 | return 0; |
2003 | 2083 | ||
2084 | out_free: | ||
2085 | kfree(msp); | ||
2086 | out: | ||
2087 | return ret; | ||
2004 | } | 2088 | } |
2005 | 2089 | ||
2006 | static int mv643xx_eth_shared_remove(struct platform_device *pdev) | 2090 | static int mv643xx_eth_shared_remove(struct platform_device *pdev) |
2007 | { | 2091 | { |
2008 | iounmap(mv643xx_eth_base); | 2092 | struct mv643xx_shared_private *msp = platform_get_drvdata(pdev); |
2009 | mv643xx_eth_base = NULL; | 2093 | |
2094 | iounmap(msp->eth_base); | ||
2095 | kfree(msp); | ||
2010 | 2096 | ||
2011 | return 0; | 2097 | return 0; |
2012 | } | 2098 | } |
@@ -2906,15 +2992,16 @@ static void eth_port_reset(struct mv643xx_private *mp) | |||
2906 | static void eth_port_read_smi_reg(struct mv643xx_private *mp, | 2992 | static void eth_port_read_smi_reg(struct mv643xx_private *mp, |
2907 | unsigned int phy_reg, unsigned int *value) | 2993 | unsigned int phy_reg, unsigned int *value) |
2908 | { | 2994 | { |
2995 | void __iomem *smi_reg = mp->shared_smi->eth_base + SMI_REG; | ||
2909 | int phy_addr = ethernet_phy_get(mp); | 2996 | int phy_addr = ethernet_phy_get(mp); |
2910 | unsigned long flags; | 2997 | unsigned long flags; |
2911 | int i; | 2998 | int i; |
2912 | 2999 | ||
2913 | /* the SMI register is a shared resource */ | 3000 | /* the SMI register is a shared resource */ |
2914 | spin_lock_irqsave(&mv643xx_eth_phy_lock, flags); | 3001 | spin_lock_irqsave(&mp->shared_smi->phy_lock, flags); |
2915 | 3002 | ||
2916 | /* wait for the SMI register to become available */ | 3003 | /* wait for the SMI register to become available */ |
2917 | for (i = 0; rdl(mp, SMI_REG) & ETH_SMI_BUSY; i++) { | 3004 | for (i = 0; readl(smi_reg) & ETH_SMI_BUSY; i++) { |
2918 | if (i == PHY_WAIT_ITERATIONS) { | 3005 | if (i == PHY_WAIT_ITERATIONS) { |
2919 | printk("%s: PHY busy timeout\n", mp->dev->name); | 3006 | printk("%s: PHY busy timeout\n", mp->dev->name); |
2920 | goto out; | 3007 | goto out; |
@@ -2922,11 +3009,11 @@ static void eth_port_read_smi_reg(struct mv643xx_private *mp, | |||
2922 | udelay(PHY_WAIT_MICRO_SECONDS); | 3009 | udelay(PHY_WAIT_MICRO_SECONDS); |
2923 | } | 3010 | } |
2924 | 3011 | ||
2925 | wrl(mp, SMI_REG, | 3012 | writel((phy_addr << 16) | (phy_reg << 21) | ETH_SMI_OPCODE_READ, |
2926 | (phy_addr << 16) | (phy_reg << 21) | ETH_SMI_OPCODE_READ); | 3013 | smi_reg); |
2927 | 3014 | ||
2928 | /* now wait for the data to be valid */ | 3015 | /* now wait for the data to be valid */ |
2929 | for (i = 0; !(rdl(mp, SMI_REG) & ETH_SMI_READ_VALID); i++) { | 3016 | for (i = 0; !(readl(smi_reg) & ETH_SMI_READ_VALID); i++) { |
2930 | if (i == PHY_WAIT_ITERATIONS) { | 3017 | if (i == PHY_WAIT_ITERATIONS) { |
2931 | printk("%s: PHY read timeout\n", mp->dev->name); | 3018 | printk("%s: PHY read timeout\n", mp->dev->name); |
2932 | goto out; | 3019 | goto out; |
@@ -2934,9 +3021,9 @@ static void eth_port_read_smi_reg(struct mv643xx_private *mp, | |||
2934 | udelay(PHY_WAIT_MICRO_SECONDS); | 3021 | udelay(PHY_WAIT_MICRO_SECONDS); |
2935 | } | 3022 | } |
2936 | 3023 | ||
2937 | *value = rdl(mp, SMI_REG) & 0xffff; | 3024 | *value = readl(smi_reg) & 0xffff; |
2938 | out: | 3025 | out: |
2939 | spin_unlock_irqrestore(&mv643xx_eth_phy_lock, flags); | 3026 | spin_unlock_irqrestore(&mp->shared_smi->phy_lock, flags); |
2940 | } | 3027 | } |
2941 | 3028 | ||
2942 | /* | 3029 | /* |
@@ -2962,17 +3049,16 @@ out: | |||
2962 | static void eth_port_write_smi_reg(struct mv643xx_private *mp, | 3049 | static void eth_port_write_smi_reg(struct mv643xx_private *mp, |
2963 | unsigned int phy_reg, unsigned int value) | 3050 | unsigned int phy_reg, unsigned int value) |
2964 | { | 3051 | { |
2965 | int phy_addr; | 3052 | void __iomem *smi_reg = mp->shared_smi->eth_base + SMI_REG; |
2966 | int i; | 3053 | int phy_addr = ethernet_phy_get(mp); |
2967 | unsigned long flags; | 3054 | unsigned long flags; |
2968 | 3055 | int i; | |
2969 | phy_addr = ethernet_phy_get(mp); | ||
2970 | 3056 | ||
2971 | /* the SMI register is a shared resource */ | 3057 | /* the SMI register is a shared resource */ |
2972 | spin_lock_irqsave(&mv643xx_eth_phy_lock, flags); | 3058 | spin_lock_irqsave(&mp->shared_smi->phy_lock, flags); |
2973 | 3059 | ||
2974 | /* wait for the SMI register to become available */ | 3060 | /* wait for the SMI register to become available */ |
2975 | for (i = 0; rdl(mp, SMI_REG) & ETH_SMI_BUSY; i++) { | 3061 | for (i = 0; readl(smi_reg) & ETH_SMI_BUSY; i++) { |
2976 | if (i == PHY_WAIT_ITERATIONS) { | 3062 | if (i == PHY_WAIT_ITERATIONS) { |
2977 | printk("%s: PHY busy timeout\n", mp->dev->name); | 3063 | printk("%s: PHY busy timeout\n", mp->dev->name); |
2978 | goto out; | 3064 | goto out; |
@@ -2980,10 +3066,10 @@ static void eth_port_write_smi_reg(struct mv643xx_private *mp, | |||
2980 | udelay(PHY_WAIT_MICRO_SECONDS); | 3066 | udelay(PHY_WAIT_MICRO_SECONDS); |
2981 | } | 3067 | } |
2982 | 3068 | ||
2983 | wrl(mp, SMI_REG, (phy_addr << 16) | (phy_reg << 21) | | 3069 | writel((phy_addr << 16) | (phy_reg << 21) | |
2984 | ETH_SMI_OPCODE_WRITE | (value & 0xffff)); | 3070 | ETH_SMI_OPCODE_WRITE | (value & 0xffff), smi_reg); |
2985 | out: | 3071 | out: |
2986 | spin_unlock_irqrestore(&mv643xx_eth_phy_lock, flags); | 3072 | spin_unlock_irqrestore(&mp->shared_smi->phy_lock, flags); |
2987 | } | 3073 | } |
2988 | 3074 | ||
2989 | /* | 3075 | /* |
diff --git a/drivers/net/pcnet32.c b/drivers/net/pcnet32.c index 4eb322e5273d..a1c454dbc164 100644 --- a/drivers/net/pcnet32.c +++ b/drivers/net/pcnet32.c | |||
@@ -22,12 +22,8 @@ | |||
22 | *************************************************************************/ | 22 | *************************************************************************/ |
23 | 23 | ||
24 | #define DRV_NAME "pcnet32" | 24 | #define DRV_NAME "pcnet32" |
25 | #ifdef CONFIG_PCNET32_NAPI | 25 | #define DRV_VERSION "1.35" |
26 | #define DRV_VERSION "1.34-NAPI" | 26 | #define DRV_RELDATE "21.Apr.2008" |
27 | #else | ||
28 | #define DRV_VERSION "1.34" | ||
29 | #endif | ||
30 | #define DRV_RELDATE "14.Aug.2007" | ||
31 | #define PFX DRV_NAME ": " | 27 | #define PFX DRV_NAME ": " |
32 | 28 | ||
33 | static const char *const version = | 29 | static const char *const version = |
@@ -445,30 +441,24 @@ static struct pcnet32_access pcnet32_dwio = { | |||
445 | 441 | ||
446 | static void pcnet32_netif_stop(struct net_device *dev) | 442 | static void pcnet32_netif_stop(struct net_device *dev) |
447 | { | 443 | { |
448 | #ifdef CONFIG_PCNET32_NAPI | ||
449 | struct pcnet32_private *lp = netdev_priv(dev); | 444 | struct pcnet32_private *lp = netdev_priv(dev); |
450 | #endif | 445 | |
451 | dev->trans_start = jiffies; | 446 | dev->trans_start = jiffies; |
452 | #ifdef CONFIG_PCNET32_NAPI | ||
453 | napi_disable(&lp->napi); | 447 | napi_disable(&lp->napi); |
454 | #endif | ||
455 | netif_tx_disable(dev); | 448 | netif_tx_disable(dev); |
456 | } | 449 | } |
457 | 450 | ||
458 | static void pcnet32_netif_start(struct net_device *dev) | 451 | static void pcnet32_netif_start(struct net_device *dev) |
459 | { | 452 | { |
460 | #ifdef CONFIG_PCNET32_NAPI | ||
461 | struct pcnet32_private *lp = netdev_priv(dev); | 453 | struct pcnet32_private *lp = netdev_priv(dev); |
462 | ulong ioaddr = dev->base_addr; | 454 | ulong ioaddr = dev->base_addr; |
463 | u16 val; | 455 | u16 val; |
464 | #endif | 456 | |
465 | netif_wake_queue(dev); | 457 | netif_wake_queue(dev); |
466 | #ifdef CONFIG_PCNET32_NAPI | ||
467 | val = lp->a.read_csr(ioaddr, CSR3); | 458 | val = lp->a.read_csr(ioaddr, CSR3); |
468 | val &= 0x00ff; | 459 | val &= 0x00ff; |
469 | lp->a.write_csr(ioaddr, CSR3, val); | 460 | lp->a.write_csr(ioaddr, CSR3, val); |
470 | napi_enable(&lp->napi); | 461 | napi_enable(&lp->napi); |
471 | #endif | ||
472 | } | 462 | } |
473 | 463 | ||
474 | /* | 464 | /* |
@@ -911,11 +901,7 @@ static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1) | |||
911 | rc = 1; /* default to fail */ | 901 | rc = 1; /* default to fail */ |
912 | 902 | ||
913 | if (netif_running(dev)) | 903 | if (netif_running(dev)) |
914 | #ifdef CONFIG_PCNET32_NAPI | ||
915 | pcnet32_netif_stop(dev); | 904 | pcnet32_netif_stop(dev); |
916 | #else | ||
917 | pcnet32_close(dev); | ||
918 | #endif | ||
919 | 905 | ||
920 | spin_lock_irqsave(&lp->lock, flags); | 906 | spin_lock_irqsave(&lp->lock, flags); |
921 | lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */ | 907 | lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */ |
@@ -1046,7 +1032,6 @@ static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1) | |||
1046 | x = a->read_bcr(ioaddr, 32); /* reset internal loopback */ | 1032 | x = a->read_bcr(ioaddr, 32); /* reset internal loopback */ |
1047 | a->write_bcr(ioaddr, 32, (x & ~0x0002)); | 1033 | a->write_bcr(ioaddr, 32, (x & ~0x0002)); |
1048 | 1034 | ||
1049 | #ifdef CONFIG_PCNET32_NAPI | ||
1050 | if (netif_running(dev)) { | 1035 | if (netif_running(dev)) { |
1051 | pcnet32_netif_start(dev); | 1036 | pcnet32_netif_start(dev); |
1052 | pcnet32_restart(dev, CSR0_NORMAL); | 1037 | pcnet32_restart(dev, CSR0_NORMAL); |
@@ -1055,16 +1040,6 @@ static int pcnet32_loopback_test(struct net_device *dev, uint64_t * data1) | |||
1055 | lp->a.write_bcr(ioaddr, 20, 4); /* return to 16bit mode */ | 1040 | lp->a.write_bcr(ioaddr, 20, 4); /* return to 16bit mode */ |
1056 | } | 1041 | } |
1057 | spin_unlock_irqrestore(&lp->lock, flags); | 1042 | spin_unlock_irqrestore(&lp->lock, flags); |
1058 | #else | ||
1059 | if (netif_running(dev)) { | ||
1060 | spin_unlock_irqrestore(&lp->lock, flags); | ||
1061 | pcnet32_open(dev); | ||
1062 | } else { | ||
1063 | pcnet32_purge_rx_ring(dev); | ||
1064 | lp->a.write_bcr(ioaddr, 20, 4); /* return to 16bit mode */ | ||
1065 | spin_unlock_irqrestore(&lp->lock, flags); | ||
1066 | } | ||
1067 | #endif | ||
1068 | 1043 | ||
1069 | return (rc); | 1044 | return (rc); |
1070 | } /* end pcnet32_loopback_test */ | 1045 | } /* end pcnet32_loopback_test */ |
@@ -1270,11 +1245,7 @@ static void pcnet32_rx_entry(struct net_device *dev, | |||
1270 | } | 1245 | } |
1271 | dev->stats.rx_bytes += skb->len; | 1246 | dev->stats.rx_bytes += skb->len; |
1272 | skb->protocol = eth_type_trans(skb, dev); | 1247 | skb->protocol = eth_type_trans(skb, dev); |
1273 | #ifdef CONFIG_PCNET32_NAPI | ||
1274 | netif_receive_skb(skb); | 1248 | netif_receive_skb(skb); |
1275 | #else | ||
1276 | netif_rx(skb); | ||
1277 | #endif | ||
1278 | dev->last_rx = jiffies; | 1249 | dev->last_rx = jiffies; |
1279 | dev->stats.rx_packets++; | 1250 | dev->stats.rx_packets++; |
1280 | return; | 1251 | return; |
@@ -1403,7 +1374,6 @@ static int pcnet32_tx(struct net_device *dev) | |||
1403 | return must_restart; | 1374 | return must_restart; |
1404 | } | 1375 | } |
1405 | 1376 | ||
1406 | #ifdef CONFIG_PCNET32_NAPI | ||
1407 | static int pcnet32_poll(struct napi_struct *napi, int budget) | 1377 | static int pcnet32_poll(struct napi_struct *napi, int budget) |
1408 | { | 1378 | { |
1409 | struct pcnet32_private *lp = container_of(napi, struct pcnet32_private, napi); | 1379 | struct pcnet32_private *lp = container_of(napi, struct pcnet32_private, napi); |
@@ -1442,7 +1412,6 @@ static int pcnet32_poll(struct napi_struct *napi, int budget) | |||
1442 | } | 1412 | } |
1443 | return work_done; | 1413 | return work_done; |
1444 | } | 1414 | } |
1445 | #endif | ||
1446 | 1415 | ||
1447 | #define PCNET32_REGS_PER_PHY 32 | 1416 | #define PCNET32_REGS_PER_PHY 32 |
1448 | #define PCNET32_MAX_PHYS 32 | 1417 | #define PCNET32_MAX_PHYS 32 |
@@ -1864,9 +1833,7 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev) | |||
1864 | /* napi.weight is used in both the napi and non-napi cases */ | 1833 | /* napi.weight is used in both the napi and non-napi cases */ |
1865 | lp->napi.weight = lp->rx_ring_size / 2; | 1834 | lp->napi.weight = lp->rx_ring_size / 2; |
1866 | 1835 | ||
1867 | #ifdef CONFIG_PCNET32_NAPI | ||
1868 | netif_napi_add(dev, &lp->napi, pcnet32_poll, lp->rx_ring_size / 2); | 1836 | netif_napi_add(dev, &lp->napi, pcnet32_poll, lp->rx_ring_size / 2); |
1869 | #endif | ||
1870 | 1837 | ||
1871 | if (fdx && !(lp->options & PCNET32_PORT_ASEL) && | 1838 | if (fdx && !(lp->options & PCNET32_PORT_ASEL) && |
1872 | ((cards_found >= MAX_UNITS) || full_duplex[cards_found])) | 1839 | ((cards_found >= MAX_UNITS) || full_duplex[cards_found])) |
@@ -2297,9 +2264,7 @@ static int pcnet32_open(struct net_device *dev) | |||
2297 | goto err_free_ring; | 2264 | goto err_free_ring; |
2298 | } | 2265 | } |
2299 | 2266 | ||
2300 | #ifdef CONFIG_PCNET32_NAPI | ||
2301 | napi_enable(&lp->napi); | 2267 | napi_enable(&lp->napi); |
2302 | #endif | ||
2303 | 2268 | ||
2304 | /* Re-initialize the PCNET32, and start it when done. */ | 2269 | /* Re-initialize the PCNET32, and start it when done. */ |
2305 | lp->a.write_csr(ioaddr, 1, (lp->init_dma_addr & 0xffff)); | 2270 | lp->a.write_csr(ioaddr, 1, (lp->init_dma_addr & 0xffff)); |
@@ -2623,7 +2588,6 @@ pcnet32_interrupt(int irq, void *dev_id) | |||
2623 | dev->name, csr0); | 2588 | dev->name, csr0); |
2624 | /* unlike for the lance, there is no restart needed */ | 2589 | /* unlike for the lance, there is no restart needed */ |
2625 | } | 2590 | } |
2626 | #ifdef CONFIG_PCNET32_NAPI | ||
2627 | if (netif_rx_schedule_prep(dev, &lp->napi)) { | 2591 | if (netif_rx_schedule_prep(dev, &lp->napi)) { |
2628 | u16 val; | 2592 | u16 val; |
2629 | /* set interrupt masks */ | 2593 | /* set interrupt masks */ |
@@ -2634,24 +2598,9 @@ pcnet32_interrupt(int irq, void *dev_id) | |||
2634 | __netif_rx_schedule(dev, &lp->napi); | 2598 | __netif_rx_schedule(dev, &lp->napi); |
2635 | break; | 2599 | break; |
2636 | } | 2600 | } |
2637 | #else | ||
2638 | pcnet32_rx(dev, lp->napi.weight); | ||
2639 | if (pcnet32_tx(dev)) { | ||
2640 | /* reset the chip to clear the error condition, then restart */ | ||
2641 | lp->a.reset(ioaddr); | ||
2642 | lp->a.write_csr(ioaddr, CSR4, 0x0915); /* auto tx pad */ | ||
2643 | pcnet32_restart(dev, CSR0_START); | ||
2644 | netif_wake_queue(dev); | ||
2645 | } | ||
2646 | #endif | ||
2647 | csr0 = lp->a.read_csr(ioaddr, CSR0); | 2601 | csr0 = lp->a.read_csr(ioaddr, CSR0); |
2648 | } | 2602 | } |
2649 | 2603 | ||
2650 | #ifndef CONFIG_PCNET32_NAPI | ||
2651 | /* Set interrupt enable. */ | ||
2652 | lp->a.write_csr(ioaddr, CSR0, CSR0_INTEN); | ||
2653 | #endif | ||
2654 | |||
2655 | if (netif_msg_intr(lp)) | 2604 | if (netif_msg_intr(lp)) |
2656 | printk(KERN_DEBUG "%s: exiting interrupt, csr0=%#4.4x.\n", | 2605 | printk(KERN_DEBUG "%s: exiting interrupt, csr0=%#4.4x.\n", |
2657 | dev->name, lp->a.read_csr(ioaddr, CSR0)); | 2606 | dev->name, lp->a.read_csr(ioaddr, CSR0)); |
@@ -2670,9 +2619,7 @@ static int pcnet32_close(struct net_device *dev) | |||
2670 | del_timer_sync(&lp->watchdog_timer); | 2619 | del_timer_sync(&lp->watchdog_timer); |
2671 | 2620 | ||
2672 | netif_stop_queue(dev); | 2621 | netif_stop_queue(dev); |
2673 | #ifdef CONFIG_PCNET32_NAPI | ||
2674 | napi_disable(&lp->napi); | 2622 | napi_disable(&lp->napi); |
2675 | #endif | ||
2676 | 2623 | ||
2677 | spin_lock_irqsave(&lp->lock, flags); | 2624 | spin_lock_irqsave(&lp->lock, flags); |
2678 | 2625 | ||
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index 3c18bb594957..45cc2914d347 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c | |||
@@ -547,7 +547,7 @@ static void phy_force_reduction(struct phy_device *phydev) | |||
547 | * Must not be called from interrupt context, or while the | 547 | * Must not be called from interrupt context, or while the |
548 | * phydev->lock is held. | 548 | * phydev->lock is held. |
549 | */ | 549 | */ |
550 | void phy_error(struct phy_device *phydev) | 550 | static void phy_error(struct phy_device *phydev) |
551 | { | 551 | { |
552 | mutex_lock(&phydev->lock); | 552 | mutex_lock(&phydev->lock); |
553 | phydev->state = PHY_HALTED; | 553 | phydev->state = PHY_HALTED; |
diff --git a/drivers/net/tulip/uli526x.c b/drivers/net/tulip/uli526x.c index a59c1f224aa8..2511ca7a12aa 100644 --- a/drivers/net/tulip/uli526x.c +++ b/drivers/net/tulip/uli526x.c | |||
@@ -434,10 +434,6 @@ static int uli526x_open(struct net_device *dev) | |||
434 | 434 | ||
435 | ULI526X_DBUG(0, "uli526x_open", 0); | 435 | ULI526X_DBUG(0, "uli526x_open", 0); |
436 | 436 | ||
437 | ret = request_irq(dev->irq, &uli526x_interrupt, IRQF_SHARED, dev->name, dev); | ||
438 | if (ret) | ||
439 | return ret; | ||
440 | |||
441 | /* system variable init */ | 437 | /* system variable init */ |
442 | db->cr6_data = CR6_DEFAULT | uli526x_cr6_user_set; | 438 | db->cr6_data = CR6_DEFAULT | uli526x_cr6_user_set; |
443 | db->tx_packet_cnt = 0; | 439 | db->tx_packet_cnt = 0; |
@@ -456,6 +452,10 @@ static int uli526x_open(struct net_device *dev) | |||
456 | /* Initialize ULI526X board */ | 452 | /* Initialize ULI526X board */ |
457 | uli526x_init(dev); | 453 | uli526x_init(dev); |
458 | 454 | ||
455 | ret = request_irq(dev->irq, &uli526x_interrupt, IRQF_SHARED, dev->name, dev); | ||
456 | if (ret) | ||
457 | return ret; | ||
458 | |||
459 | /* Active System Interface */ | 459 | /* Active System Interface */ |
460 | netif_wake_queue(dev); | 460 | netif_wake_queue(dev); |
461 | 461 | ||
@@ -1368,6 +1368,12 @@ static void update_cr6(u32 cr6_data, unsigned long ioaddr) | |||
1368 | * This setup frame initialize ULI526X address filter mode | 1368 | * This setup frame initialize ULI526X address filter mode |
1369 | */ | 1369 | */ |
1370 | 1370 | ||
1371 | #ifdef __BIG_ENDIAN | ||
1372 | #define FLT_SHIFT 16 | ||
1373 | #else | ||
1374 | #define FLT_SHIFT 0 | ||
1375 | #endif | ||
1376 | |||
1371 | static void send_filter_frame(struct net_device *dev, int mc_cnt) | 1377 | static void send_filter_frame(struct net_device *dev, int mc_cnt) |
1372 | { | 1378 | { |
1373 | struct uli526x_board_info *db = netdev_priv(dev); | 1379 | struct uli526x_board_info *db = netdev_priv(dev); |
@@ -1384,27 +1390,27 @@ static void send_filter_frame(struct net_device *dev, int mc_cnt) | |||
1384 | 1390 | ||
1385 | /* Node address */ | 1391 | /* Node address */ |
1386 | addrptr = (u16 *) dev->dev_addr; | 1392 | addrptr = (u16 *) dev->dev_addr; |
1387 | *suptr++ = addrptr[0]; | 1393 | *suptr++ = addrptr[0] << FLT_SHIFT; |
1388 | *suptr++ = addrptr[1]; | 1394 | *suptr++ = addrptr[1] << FLT_SHIFT; |
1389 | *suptr++ = addrptr[2]; | 1395 | *suptr++ = addrptr[2] << FLT_SHIFT; |
1390 | 1396 | ||
1391 | /* broadcast address */ | 1397 | /* broadcast address */ |
1392 | *suptr++ = 0xffff; | 1398 | *suptr++ = 0xffff << FLT_SHIFT; |
1393 | *suptr++ = 0xffff; | 1399 | *suptr++ = 0xffff << FLT_SHIFT; |
1394 | *suptr++ = 0xffff; | 1400 | *suptr++ = 0xffff << FLT_SHIFT; |
1395 | 1401 | ||
1396 | /* fit the multicast address */ | 1402 | /* fit the multicast address */ |
1397 | for (mcptr = dev->mc_list, i = 0; i < mc_cnt; i++, mcptr = mcptr->next) { | 1403 | for (mcptr = dev->mc_list, i = 0; i < mc_cnt; i++, mcptr = mcptr->next) { |
1398 | addrptr = (u16 *) mcptr->dmi_addr; | 1404 | addrptr = (u16 *) mcptr->dmi_addr; |
1399 | *suptr++ = addrptr[0]; | 1405 | *suptr++ = addrptr[0] << FLT_SHIFT; |
1400 | *suptr++ = addrptr[1]; | 1406 | *suptr++ = addrptr[1] << FLT_SHIFT; |
1401 | *suptr++ = addrptr[2]; | 1407 | *suptr++ = addrptr[2] << FLT_SHIFT; |
1402 | } | 1408 | } |
1403 | 1409 | ||
1404 | for (; i<14; i++) { | 1410 | for (; i<14; i++) { |
1405 | *suptr++ = 0xffff; | 1411 | *suptr++ = 0xffff << FLT_SHIFT; |
1406 | *suptr++ = 0xffff; | 1412 | *suptr++ = 0xffff << FLT_SHIFT; |
1407 | *suptr++ = 0xffff; | 1413 | *suptr++ = 0xffff << FLT_SHIFT; |
1408 | } | 1414 | } |
1409 | 1415 | ||
1410 | /* prepare the setup frame */ | 1416 | /* prepare the setup frame */ |
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c index 281ce3d39532..ca0bdac07a78 100644 --- a/drivers/net/ucc_geth.c +++ b/drivers/net/ucc_geth.c | |||
@@ -62,7 +62,6 @@ | |||
62 | #endif /* UGETH_VERBOSE_DEBUG */ | 62 | #endif /* UGETH_VERBOSE_DEBUG */ |
63 | #define UGETH_MSG_DEFAULT (NETIF_MSG_IFUP << 1 ) - 1 | 63 | #define UGETH_MSG_DEFAULT (NETIF_MSG_IFUP << 1 ) - 1 |
64 | 64 | ||
65 | void uec_set_ethtool_ops(struct net_device *netdev); | ||
66 | 65 | ||
67 | static DEFINE_SPINLOCK(ugeth_lock); | 66 | static DEFINE_SPINLOCK(ugeth_lock); |
68 | 67 | ||
@@ -216,7 +215,8 @@ static struct list_head *dequeue(struct list_head *lh) | |||
216 | } | 215 | } |
217 | } | 216 | } |
218 | 217 | ||
219 | static struct sk_buff *get_new_skb(struct ucc_geth_private *ugeth, u8 *bd) | 218 | static struct sk_buff *get_new_skb(struct ucc_geth_private *ugeth, |
219 | u8 __iomem *bd) | ||
220 | { | 220 | { |
221 | struct sk_buff *skb = NULL; | 221 | struct sk_buff *skb = NULL; |
222 | 222 | ||
@@ -236,21 +236,22 @@ static struct sk_buff *get_new_skb(struct ucc_geth_private *ugeth, u8 *bd) | |||
236 | 236 | ||
237 | skb->dev = ugeth->dev; | 237 | skb->dev = ugeth->dev; |
238 | 238 | ||
239 | out_be32(&((struct qe_bd *)bd)->buf, | 239 | out_be32(&((struct qe_bd __iomem *)bd)->buf, |
240 | dma_map_single(NULL, | 240 | dma_map_single(NULL, |
241 | skb->data, | 241 | skb->data, |
242 | ugeth->ug_info->uf_info.max_rx_buf_length + | 242 | ugeth->ug_info->uf_info.max_rx_buf_length + |
243 | UCC_GETH_RX_DATA_BUF_ALIGNMENT, | 243 | UCC_GETH_RX_DATA_BUF_ALIGNMENT, |
244 | DMA_FROM_DEVICE)); | 244 | DMA_FROM_DEVICE)); |
245 | 245 | ||
246 | out_be32((u32 *)bd, (R_E | R_I | (in_be32((u32 *)bd) & R_W))); | 246 | out_be32((u32 __iomem *)bd, |
247 | (R_E | R_I | (in_be32((u32 __iomem*)bd) & R_W))); | ||
247 | 248 | ||
248 | return skb; | 249 | return skb; |
249 | } | 250 | } |
250 | 251 | ||
251 | static int rx_bd_buffer_set(struct ucc_geth_private *ugeth, u8 rxQ) | 252 | static int rx_bd_buffer_set(struct ucc_geth_private *ugeth, u8 rxQ) |
252 | { | 253 | { |
253 | u8 *bd; | 254 | u8 __iomem *bd; |
254 | u32 bd_status; | 255 | u32 bd_status; |
255 | struct sk_buff *skb; | 256 | struct sk_buff *skb; |
256 | int i; | 257 | int i; |
@@ -259,7 +260,7 @@ static int rx_bd_buffer_set(struct ucc_geth_private *ugeth, u8 rxQ) | |||
259 | i = 0; | 260 | i = 0; |
260 | 261 | ||
261 | do { | 262 | do { |
262 | bd_status = in_be32((u32*)bd); | 263 | bd_status = in_be32((u32 __iomem *)bd); |
263 | skb = get_new_skb(ugeth, bd); | 264 | skb = get_new_skb(ugeth, bd); |
264 | 265 | ||
265 | if (!skb) /* If can not allocate data buffer, | 266 | if (!skb) /* If can not allocate data buffer, |
@@ -277,7 +278,7 @@ static int rx_bd_buffer_set(struct ucc_geth_private *ugeth, u8 rxQ) | |||
277 | } | 278 | } |
278 | 279 | ||
279 | static int fill_init_enet_entries(struct ucc_geth_private *ugeth, | 280 | static int fill_init_enet_entries(struct ucc_geth_private *ugeth, |
280 | volatile u32 *p_start, | 281 | u32 *p_start, |
281 | u8 num_entries, | 282 | u8 num_entries, |
282 | u32 thread_size, | 283 | u32 thread_size, |
283 | u32 thread_alignment, | 284 | u32 thread_alignment, |
@@ -316,7 +317,7 @@ static int fill_init_enet_entries(struct ucc_geth_private *ugeth, | |||
316 | } | 317 | } |
317 | 318 | ||
318 | static int return_init_enet_entries(struct ucc_geth_private *ugeth, | 319 | static int return_init_enet_entries(struct ucc_geth_private *ugeth, |
319 | volatile u32 *p_start, | 320 | u32 *p_start, |
320 | u8 num_entries, | 321 | u8 num_entries, |
321 | enum qe_risc_allocation risc, | 322 | enum qe_risc_allocation risc, |
322 | int skip_page_for_first_entry) | 323 | int skip_page_for_first_entry) |
@@ -326,21 +327,22 @@ static int return_init_enet_entries(struct ucc_geth_private *ugeth, | |||
326 | int snum; | 327 | int snum; |
327 | 328 | ||
328 | for (i = 0; i < num_entries; i++) { | 329 | for (i = 0; i < num_entries; i++) { |
330 | u32 val = *p_start; | ||
331 | |||
329 | /* Check that this entry was actually valid -- | 332 | /* Check that this entry was actually valid -- |
330 | needed in case failed in allocations */ | 333 | needed in case failed in allocations */ |
331 | if ((*p_start & ENET_INIT_PARAM_RISC_MASK) == risc) { | 334 | if ((val & ENET_INIT_PARAM_RISC_MASK) == risc) { |
332 | snum = | 335 | snum = |
333 | (u32) (*p_start & ENET_INIT_PARAM_SNUM_MASK) >> | 336 | (u32) (val & ENET_INIT_PARAM_SNUM_MASK) >> |
334 | ENET_INIT_PARAM_SNUM_SHIFT; | 337 | ENET_INIT_PARAM_SNUM_SHIFT; |
335 | qe_put_snum((u8) snum); | 338 | qe_put_snum((u8) snum); |
336 | if (!((i == 0) && skip_page_for_first_entry)) { | 339 | if (!((i == 0) && skip_page_for_first_entry)) { |
337 | /* First entry of Rx does not have page */ | 340 | /* First entry of Rx does not have page */ |
338 | init_enet_offset = | 341 | init_enet_offset = |
339 | (in_be32(p_start) & | 342 | (val & ENET_INIT_PARAM_PTR_MASK); |
340 | ENET_INIT_PARAM_PTR_MASK); | ||
341 | qe_muram_free(init_enet_offset); | 343 | qe_muram_free(init_enet_offset); |
342 | } | 344 | } |
343 | *(p_start++) = 0; /* Just for cosmetics */ | 345 | *p_start++ = 0; |
344 | } | 346 | } |
345 | } | 347 | } |
346 | 348 | ||
@@ -349,7 +351,7 @@ static int return_init_enet_entries(struct ucc_geth_private *ugeth, | |||
349 | 351 | ||
350 | #ifdef DEBUG | 352 | #ifdef DEBUG |
351 | static int dump_init_enet_entries(struct ucc_geth_private *ugeth, | 353 | static int dump_init_enet_entries(struct ucc_geth_private *ugeth, |
352 | volatile u32 *p_start, | 354 | u32 __iomem *p_start, |
353 | u8 num_entries, | 355 | u8 num_entries, |
354 | u32 thread_size, | 356 | u32 thread_size, |
355 | enum qe_risc_allocation risc, | 357 | enum qe_risc_allocation risc, |
@@ -360,11 +362,13 @@ static int dump_init_enet_entries(struct ucc_geth_private *ugeth, | |||
360 | int snum; | 362 | int snum; |
361 | 363 | ||
362 | for (i = 0; i < num_entries; i++) { | 364 | for (i = 0; i < num_entries; i++) { |
365 | u32 val = in_be32(p_start); | ||
366 | |||
363 | /* Check that this entry was actually valid -- | 367 | /* Check that this entry was actually valid -- |
364 | needed in case failed in allocations */ | 368 | needed in case failed in allocations */ |
365 | if ((*p_start & ENET_INIT_PARAM_RISC_MASK) == risc) { | 369 | if ((val & ENET_INIT_PARAM_RISC_MASK) == risc) { |
366 | snum = | 370 | snum = |
367 | (u32) (*p_start & ENET_INIT_PARAM_SNUM_MASK) >> | 371 | (u32) (val & ENET_INIT_PARAM_SNUM_MASK) >> |
368 | ENET_INIT_PARAM_SNUM_SHIFT; | 372 | ENET_INIT_PARAM_SNUM_SHIFT; |
369 | qe_put_snum((u8) snum); | 373 | qe_put_snum((u8) snum); |
370 | if (!((i == 0) && skip_page_for_first_entry)) { | 374 | if (!((i == 0) && skip_page_for_first_entry)) { |
@@ -440,7 +444,7 @@ static int hw_add_addr_in_paddr(struct ucc_geth_private *ugeth, | |||
440 | 444 | ||
441 | static int hw_clear_addr_in_paddr(struct ucc_geth_private *ugeth, u8 paddr_num) | 445 | static int hw_clear_addr_in_paddr(struct ucc_geth_private *ugeth, u8 paddr_num) |
442 | { | 446 | { |
443 | struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; | 447 | struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt; |
444 | 448 | ||
445 | if (!(paddr_num < NUM_OF_PADDRS)) { | 449 | if (!(paddr_num < NUM_OF_PADDRS)) { |
446 | ugeth_warn("%s: Illagel paddr_num.", __FUNCTION__); | 450 | ugeth_warn("%s: Illagel paddr_num.", __FUNCTION__); |
@@ -448,7 +452,7 @@ static int hw_clear_addr_in_paddr(struct ucc_geth_private *ugeth, u8 paddr_num) | |||
448 | } | 452 | } |
449 | 453 | ||
450 | p_82xx_addr_filt = | 454 | p_82xx_addr_filt = |
451 | (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram-> | 455 | (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth->p_rx_glbl_pram-> |
452 | addressfiltering; | 456 | addressfiltering; |
453 | 457 | ||
454 | /* Writing address ff.ff.ff.ff.ff.ff disables address | 458 | /* Writing address ff.ff.ff.ff.ff.ff disables address |
@@ -463,11 +467,11 @@ static int hw_clear_addr_in_paddr(struct ucc_geth_private *ugeth, u8 paddr_num) | |||
463 | static void hw_add_addr_in_hash(struct ucc_geth_private *ugeth, | 467 | static void hw_add_addr_in_hash(struct ucc_geth_private *ugeth, |
464 | u8 *p_enet_addr) | 468 | u8 *p_enet_addr) |
465 | { | 469 | { |
466 | struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; | 470 | struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt; |
467 | u32 cecr_subblock; | 471 | u32 cecr_subblock; |
468 | 472 | ||
469 | p_82xx_addr_filt = | 473 | p_82xx_addr_filt = |
470 | (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram-> | 474 | (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth->p_rx_glbl_pram-> |
471 | addressfiltering; | 475 | addressfiltering; |
472 | 476 | ||
473 | cecr_subblock = | 477 | cecr_subblock = |
@@ -487,7 +491,7 @@ static void hw_add_addr_in_hash(struct ucc_geth_private *ugeth, | |||
487 | static void magic_packet_detection_enable(struct ucc_geth_private *ugeth) | 491 | static void magic_packet_detection_enable(struct ucc_geth_private *ugeth) |
488 | { | 492 | { |
489 | struct ucc_fast_private *uccf; | 493 | struct ucc_fast_private *uccf; |
490 | struct ucc_geth *ug_regs; | 494 | struct ucc_geth __iomem *ug_regs; |
491 | u32 maccfg2, uccm; | 495 | u32 maccfg2, uccm; |
492 | 496 | ||
493 | uccf = ugeth->uccf; | 497 | uccf = ugeth->uccf; |
@@ -507,7 +511,7 @@ static void magic_packet_detection_enable(struct ucc_geth_private *ugeth) | |||
507 | static void magic_packet_detection_disable(struct ucc_geth_private *ugeth) | 511 | static void magic_packet_detection_disable(struct ucc_geth_private *ugeth) |
508 | { | 512 | { |
509 | struct ucc_fast_private *uccf; | 513 | struct ucc_fast_private *uccf; |
510 | struct ucc_geth *ug_regs; | 514 | struct ucc_geth __iomem *ug_regs; |
511 | u32 maccfg2, uccm; | 515 | u32 maccfg2, uccm; |
512 | 516 | ||
513 | uccf = ugeth->uccf; | 517 | uccf = ugeth->uccf; |
@@ -538,13 +542,13 @@ static void get_statistics(struct ucc_geth_private *ugeth, | |||
538 | rx_firmware_statistics, | 542 | rx_firmware_statistics, |
539 | struct ucc_geth_hardware_statistics *hardware_statistics) | 543 | struct ucc_geth_hardware_statistics *hardware_statistics) |
540 | { | 544 | { |
541 | struct ucc_fast *uf_regs; | 545 | struct ucc_fast __iomem *uf_regs; |
542 | struct ucc_geth *ug_regs; | 546 | struct ucc_geth __iomem *ug_regs; |
543 | struct ucc_geth_tx_firmware_statistics_pram *p_tx_fw_statistics_pram; | 547 | struct ucc_geth_tx_firmware_statistics_pram *p_tx_fw_statistics_pram; |
544 | struct ucc_geth_rx_firmware_statistics_pram *p_rx_fw_statistics_pram; | 548 | struct ucc_geth_rx_firmware_statistics_pram *p_rx_fw_statistics_pram; |
545 | 549 | ||
546 | ug_regs = ugeth->ug_regs; | 550 | ug_regs = ugeth->ug_regs; |
547 | uf_regs = (struct ucc_fast *) ug_regs; | 551 | uf_regs = (struct ucc_fast __iomem *) ug_regs; |
548 | p_tx_fw_statistics_pram = ugeth->p_tx_fw_statistics_pram; | 552 | p_tx_fw_statistics_pram = ugeth->p_tx_fw_statistics_pram; |
549 | p_rx_fw_statistics_pram = ugeth->p_rx_fw_statistics_pram; | 553 | p_rx_fw_statistics_pram = ugeth->p_rx_fw_statistics_pram; |
550 | 554 | ||
@@ -1132,9 +1136,9 @@ static void dump_regs(struct ucc_geth_private *ugeth) | |||
1132 | } | 1136 | } |
1133 | #endif /* DEBUG */ | 1137 | #endif /* DEBUG */ |
1134 | 1138 | ||
1135 | static void init_default_reg_vals(volatile u32 *upsmr_register, | 1139 | static void init_default_reg_vals(u32 __iomem *upsmr_register, |
1136 | volatile u32 *maccfg1_register, | 1140 | u32 __iomem *maccfg1_register, |
1137 | volatile u32 *maccfg2_register) | 1141 | u32 __iomem *maccfg2_register) |
1138 | { | 1142 | { |
1139 | out_be32(upsmr_register, UCC_GETH_UPSMR_INIT); | 1143 | out_be32(upsmr_register, UCC_GETH_UPSMR_INIT); |
1140 | out_be32(maccfg1_register, UCC_GETH_MACCFG1_INIT); | 1144 | out_be32(maccfg1_register, UCC_GETH_MACCFG1_INIT); |
@@ -1148,7 +1152,7 @@ static int init_half_duplex_params(int alt_beb, | |||
1148 | u8 alt_beb_truncation, | 1152 | u8 alt_beb_truncation, |
1149 | u8 max_retransmissions, | 1153 | u8 max_retransmissions, |
1150 | u8 collision_window, | 1154 | u8 collision_window, |
1151 | volatile u32 *hafdup_register) | 1155 | u32 __iomem *hafdup_register) |
1152 | { | 1156 | { |
1153 | u32 value = 0; | 1157 | u32 value = 0; |
1154 | 1158 | ||
@@ -1180,7 +1184,7 @@ static int init_inter_frame_gap_params(u8 non_btb_cs_ipg, | |||
1180 | u8 non_btb_ipg, | 1184 | u8 non_btb_ipg, |
1181 | u8 min_ifg, | 1185 | u8 min_ifg, |
1182 | u8 btb_ipg, | 1186 | u8 btb_ipg, |
1183 | volatile u32 *ipgifg_register) | 1187 | u32 __iomem *ipgifg_register) |
1184 | { | 1188 | { |
1185 | u32 value = 0; | 1189 | u32 value = 0; |
1186 | 1190 | ||
@@ -1215,9 +1219,9 @@ int init_flow_control_params(u32 automatic_flow_control_mode, | |||
1215 | int tx_flow_control_enable, | 1219 | int tx_flow_control_enable, |
1216 | u16 pause_period, | 1220 | u16 pause_period, |
1217 | u16 extension_field, | 1221 | u16 extension_field, |
1218 | volatile u32 *upsmr_register, | 1222 | u32 __iomem *upsmr_register, |
1219 | volatile u32 *uempr_register, | 1223 | u32 __iomem *uempr_register, |
1220 | volatile u32 *maccfg1_register) | 1224 | u32 __iomem *maccfg1_register) |
1221 | { | 1225 | { |
1222 | u32 value = 0; | 1226 | u32 value = 0; |
1223 | 1227 | ||
@@ -1243,8 +1247,8 @@ int init_flow_control_params(u32 automatic_flow_control_mode, | |||
1243 | 1247 | ||
1244 | static int init_hw_statistics_gathering_mode(int enable_hardware_statistics, | 1248 | static int init_hw_statistics_gathering_mode(int enable_hardware_statistics, |
1245 | int auto_zero_hardware_statistics, | 1249 | int auto_zero_hardware_statistics, |
1246 | volatile u32 *upsmr_register, | 1250 | u32 __iomem *upsmr_register, |
1247 | volatile u16 *uescr_register) | 1251 | u16 __iomem *uescr_register) |
1248 | { | 1252 | { |
1249 | u32 upsmr_value = 0; | 1253 | u32 upsmr_value = 0; |
1250 | u16 uescr_value = 0; | 1254 | u16 uescr_value = 0; |
@@ -1270,12 +1274,12 @@ static int init_hw_statistics_gathering_mode(int enable_hardware_statistics, | |||
1270 | static int init_firmware_statistics_gathering_mode(int | 1274 | static int init_firmware_statistics_gathering_mode(int |
1271 | enable_tx_firmware_statistics, | 1275 | enable_tx_firmware_statistics, |
1272 | int enable_rx_firmware_statistics, | 1276 | int enable_rx_firmware_statistics, |
1273 | volatile u32 *tx_rmon_base_ptr, | 1277 | u32 __iomem *tx_rmon_base_ptr, |
1274 | u32 tx_firmware_statistics_structure_address, | 1278 | u32 tx_firmware_statistics_structure_address, |
1275 | volatile u32 *rx_rmon_base_ptr, | 1279 | u32 __iomem *rx_rmon_base_ptr, |
1276 | u32 rx_firmware_statistics_structure_address, | 1280 | u32 rx_firmware_statistics_structure_address, |
1277 | volatile u16 *temoder_register, | 1281 | u16 __iomem *temoder_register, |
1278 | volatile u32 *remoder_register) | 1282 | u32 __iomem *remoder_register) |
1279 | { | 1283 | { |
1280 | /* Note: this function does not check if */ | 1284 | /* Note: this function does not check if */ |
1281 | /* the parameters it receives are NULL */ | 1285 | /* the parameters it receives are NULL */ |
@@ -1307,8 +1311,8 @@ static int init_mac_station_addr_regs(u8 address_byte_0, | |||
1307 | u8 address_byte_3, | 1311 | u8 address_byte_3, |
1308 | u8 address_byte_4, | 1312 | u8 address_byte_4, |
1309 | u8 address_byte_5, | 1313 | u8 address_byte_5, |
1310 | volatile u32 *macstnaddr1_register, | 1314 | u32 __iomem *macstnaddr1_register, |
1311 | volatile u32 *macstnaddr2_register) | 1315 | u32 __iomem *macstnaddr2_register) |
1312 | { | 1316 | { |
1313 | u32 value = 0; | 1317 | u32 value = 0; |
1314 | 1318 | ||
@@ -1344,7 +1348,7 @@ static int init_mac_station_addr_regs(u8 address_byte_0, | |||
1344 | } | 1348 | } |
1345 | 1349 | ||
1346 | static int init_check_frame_length_mode(int length_check, | 1350 | static int init_check_frame_length_mode(int length_check, |
1347 | volatile u32 *maccfg2_register) | 1351 | u32 __iomem *maccfg2_register) |
1348 | { | 1352 | { |
1349 | u32 value = 0; | 1353 | u32 value = 0; |
1350 | 1354 | ||
@@ -1360,7 +1364,7 @@ static int init_check_frame_length_mode(int length_check, | |||
1360 | } | 1364 | } |
1361 | 1365 | ||
1362 | static int init_preamble_length(u8 preamble_length, | 1366 | static int init_preamble_length(u8 preamble_length, |
1363 | volatile u32 *maccfg2_register) | 1367 | u32 __iomem *maccfg2_register) |
1364 | { | 1368 | { |
1365 | u32 value = 0; | 1369 | u32 value = 0; |
1366 | 1370 | ||
@@ -1376,7 +1380,7 @@ static int init_preamble_length(u8 preamble_length, | |||
1376 | 1380 | ||
1377 | static int init_rx_parameters(int reject_broadcast, | 1381 | static int init_rx_parameters(int reject_broadcast, |
1378 | int receive_short_frames, | 1382 | int receive_short_frames, |
1379 | int promiscuous, volatile u32 *upsmr_register) | 1383 | int promiscuous, u32 __iomem *upsmr_register) |
1380 | { | 1384 | { |
1381 | u32 value = 0; | 1385 | u32 value = 0; |
1382 | 1386 | ||
@@ -1403,7 +1407,7 @@ static int init_rx_parameters(int reject_broadcast, | |||
1403 | } | 1407 | } |
1404 | 1408 | ||
1405 | static int init_max_rx_buff_len(u16 max_rx_buf_len, | 1409 | static int init_max_rx_buff_len(u16 max_rx_buf_len, |
1406 | volatile u16 *mrblr_register) | 1410 | u16 __iomem *mrblr_register) |
1407 | { | 1411 | { |
1408 | /* max_rx_buf_len value must be a multiple of 128 */ | 1412 | /* max_rx_buf_len value must be a multiple of 128 */ |
1409 | if ((max_rx_buf_len == 0) | 1413 | if ((max_rx_buf_len == 0) |
@@ -1415,8 +1419,8 @@ static int init_max_rx_buff_len(u16 max_rx_buf_len, | |||
1415 | } | 1419 | } |
1416 | 1420 | ||
1417 | static int init_min_frame_len(u16 min_frame_length, | 1421 | static int init_min_frame_len(u16 min_frame_length, |
1418 | volatile u16 *minflr_register, | 1422 | u16 __iomem *minflr_register, |
1419 | volatile u16 *mrblr_register) | 1423 | u16 __iomem *mrblr_register) |
1420 | { | 1424 | { |
1421 | u16 mrblr_value = 0; | 1425 | u16 mrblr_value = 0; |
1422 | 1426 | ||
@@ -1431,8 +1435,8 @@ static int init_min_frame_len(u16 min_frame_length, | |||
1431 | static int adjust_enet_interface(struct ucc_geth_private *ugeth) | 1435 | static int adjust_enet_interface(struct ucc_geth_private *ugeth) |
1432 | { | 1436 | { |
1433 | struct ucc_geth_info *ug_info; | 1437 | struct ucc_geth_info *ug_info; |
1434 | struct ucc_geth *ug_regs; | 1438 | struct ucc_geth __iomem *ug_regs; |
1435 | struct ucc_fast *uf_regs; | 1439 | struct ucc_fast __iomem *uf_regs; |
1436 | int ret_val; | 1440 | int ret_val; |
1437 | u32 upsmr, maccfg2, tbiBaseAddress; | 1441 | u32 upsmr, maccfg2, tbiBaseAddress; |
1438 | u16 value; | 1442 | u16 value; |
@@ -1517,8 +1521,8 @@ static int adjust_enet_interface(struct ucc_geth_private *ugeth) | |||
1517 | static void adjust_link(struct net_device *dev) | 1521 | static void adjust_link(struct net_device *dev) |
1518 | { | 1522 | { |
1519 | struct ucc_geth_private *ugeth = netdev_priv(dev); | 1523 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
1520 | struct ucc_geth *ug_regs; | 1524 | struct ucc_geth __iomem *ug_regs; |
1521 | struct ucc_fast *uf_regs; | 1525 | struct ucc_fast __iomem *uf_regs; |
1522 | struct phy_device *phydev = ugeth->phydev; | 1526 | struct phy_device *phydev = ugeth->phydev; |
1523 | unsigned long flags; | 1527 | unsigned long flags; |
1524 | int new_state = 0; | 1528 | int new_state = 0; |
@@ -1678,9 +1682,9 @@ static int ugeth_graceful_stop_rx(struct ucc_geth_private * ugeth) | |||
1678 | uccf = ugeth->uccf; | 1682 | uccf = ugeth->uccf; |
1679 | 1683 | ||
1680 | /* Clear acknowledge bit */ | 1684 | /* Clear acknowledge bit */ |
1681 | temp = ugeth->p_rx_glbl_pram->rxgstpack; | 1685 | temp = in_8(&ugeth->p_rx_glbl_pram->rxgstpack); |
1682 | temp &= ~GRACEFUL_STOP_ACKNOWLEDGE_RX; | 1686 | temp &= ~GRACEFUL_STOP_ACKNOWLEDGE_RX; |
1683 | ugeth->p_rx_glbl_pram->rxgstpack = temp; | 1687 | out_8(&ugeth->p_rx_glbl_pram->rxgstpack, temp); |
1684 | 1688 | ||
1685 | /* Keep issuing command and checking acknowledge bit until | 1689 | /* Keep issuing command and checking acknowledge bit until |
1686 | it is asserted, according to spec */ | 1690 | it is asserted, according to spec */ |
@@ -1692,7 +1696,7 @@ static int ugeth_graceful_stop_rx(struct ucc_geth_private * ugeth) | |||
1692 | qe_issue_cmd(QE_GRACEFUL_STOP_RX, cecr_subblock, | 1696 | qe_issue_cmd(QE_GRACEFUL_STOP_RX, cecr_subblock, |
1693 | QE_CR_PROTOCOL_ETHERNET, 0); | 1697 | QE_CR_PROTOCOL_ETHERNET, 0); |
1694 | 1698 | ||
1695 | temp = ugeth->p_rx_glbl_pram->rxgstpack; | 1699 | temp = in_8(&ugeth->p_rx_glbl_pram->rxgstpack); |
1696 | } while (!(temp & GRACEFUL_STOP_ACKNOWLEDGE_RX)); | 1700 | } while (!(temp & GRACEFUL_STOP_ACKNOWLEDGE_RX)); |
1697 | 1701 | ||
1698 | uccf->stopped_rx = 1; | 1702 | uccf->stopped_rx = 1; |
@@ -1991,19 +1995,20 @@ static int ugeth_82xx_filtering_clear_all_addr_in_hash(struct ucc_geth_private * | |||
1991 | enum enet_addr_type | 1995 | enum enet_addr_type |
1992 | enet_addr_type) | 1996 | enet_addr_type) |
1993 | { | 1997 | { |
1994 | struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; | 1998 | struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt; |
1995 | struct ucc_fast_private *uccf; | 1999 | struct ucc_fast_private *uccf; |
1996 | enum comm_dir comm_dir; | 2000 | enum comm_dir comm_dir; |
1997 | struct list_head *p_lh; | 2001 | struct list_head *p_lh; |
1998 | u16 i, num; | 2002 | u16 i, num; |
1999 | u32 *addr_h, *addr_l; | 2003 | u32 __iomem *addr_h; |
2004 | u32 __iomem *addr_l; | ||
2000 | u8 *p_counter; | 2005 | u8 *p_counter; |
2001 | 2006 | ||
2002 | uccf = ugeth->uccf; | 2007 | uccf = ugeth->uccf; |
2003 | 2008 | ||
2004 | p_82xx_addr_filt = | 2009 | p_82xx_addr_filt = |
2005 | (struct ucc_geth_82xx_address_filtering_pram *) ugeth->p_rx_glbl_pram-> | 2010 | (struct ucc_geth_82xx_address_filtering_pram __iomem *) |
2006 | addressfiltering; | 2011 | ugeth->p_rx_glbl_pram->addressfiltering; |
2007 | 2012 | ||
2008 | if (enet_addr_type == ENET_ADDR_TYPE_GROUP) { | 2013 | if (enet_addr_type == ENET_ADDR_TYPE_GROUP) { |
2009 | addr_h = &(p_82xx_addr_filt->gaddr_h); | 2014 | addr_h = &(p_82xx_addr_filt->gaddr_h); |
@@ -2079,7 +2084,7 @@ static int ugeth_82xx_filtering_clear_addr_in_paddr(struct ucc_geth_private *uge | |||
2079 | static void ucc_geth_memclean(struct ucc_geth_private *ugeth) | 2084 | static void ucc_geth_memclean(struct ucc_geth_private *ugeth) |
2080 | { | 2085 | { |
2081 | u16 i, j; | 2086 | u16 i, j; |
2082 | u8 *bd; | 2087 | u8 __iomem *bd; |
2083 | 2088 | ||
2084 | if (!ugeth) | 2089 | if (!ugeth) |
2085 | return; | 2090 | return; |
@@ -2154,8 +2159,8 @@ static void ucc_geth_memclean(struct ucc_geth_private *ugeth) | |||
2154 | for (j = 0; j < ugeth->ug_info->bdRingLenTx[i]; j++) { | 2159 | for (j = 0; j < ugeth->ug_info->bdRingLenTx[i]; j++) { |
2155 | if (ugeth->tx_skbuff[i][j]) { | 2160 | if (ugeth->tx_skbuff[i][j]) { |
2156 | dma_unmap_single(NULL, | 2161 | dma_unmap_single(NULL, |
2157 | ((struct qe_bd *)bd)->buf, | 2162 | in_be32(&((struct qe_bd __iomem *)bd)->buf), |
2158 | (in_be32((u32 *)bd) & | 2163 | (in_be32((u32 __iomem *)bd) & |
2159 | BD_LENGTH_MASK), | 2164 | BD_LENGTH_MASK), |
2160 | DMA_TO_DEVICE); | 2165 | DMA_TO_DEVICE); |
2161 | dev_kfree_skb_any(ugeth->tx_skbuff[i][j]); | 2166 | dev_kfree_skb_any(ugeth->tx_skbuff[i][j]); |
@@ -2182,7 +2187,7 @@ static void ucc_geth_memclean(struct ucc_geth_private *ugeth) | |||
2182 | for (j = 0; j < ugeth->ug_info->bdRingLenRx[i]; j++) { | 2187 | for (j = 0; j < ugeth->ug_info->bdRingLenRx[i]; j++) { |
2183 | if (ugeth->rx_skbuff[i][j]) { | 2188 | if (ugeth->rx_skbuff[i][j]) { |
2184 | dma_unmap_single(NULL, | 2189 | dma_unmap_single(NULL, |
2185 | ((struct qe_bd *)bd)->buf, | 2190 | in_be32(&((struct qe_bd __iomem *)bd)->buf), |
2186 | ugeth->ug_info-> | 2191 | ugeth->ug_info-> |
2187 | uf_info.max_rx_buf_length + | 2192 | uf_info.max_rx_buf_length + |
2188 | UCC_GETH_RX_DATA_BUF_ALIGNMENT, | 2193 | UCC_GETH_RX_DATA_BUF_ALIGNMENT, |
@@ -2218,8 +2223,8 @@ static void ucc_geth_set_multi(struct net_device *dev) | |||
2218 | { | 2223 | { |
2219 | struct ucc_geth_private *ugeth; | 2224 | struct ucc_geth_private *ugeth; |
2220 | struct dev_mc_list *dmi; | 2225 | struct dev_mc_list *dmi; |
2221 | struct ucc_fast *uf_regs; | 2226 | struct ucc_fast __iomem *uf_regs; |
2222 | struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; | 2227 | struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt; |
2223 | int i; | 2228 | int i; |
2224 | 2229 | ||
2225 | ugeth = netdev_priv(dev); | 2230 | ugeth = netdev_priv(dev); |
@@ -2228,14 +2233,14 @@ static void ucc_geth_set_multi(struct net_device *dev) | |||
2228 | 2233 | ||
2229 | if (dev->flags & IFF_PROMISC) { | 2234 | if (dev->flags & IFF_PROMISC) { |
2230 | 2235 | ||
2231 | uf_regs->upsmr |= UPSMR_PRO; | 2236 | out_be32(&uf_regs->upsmr, in_be32(&uf_regs->upsmr) | UPSMR_PRO); |
2232 | 2237 | ||
2233 | } else { | 2238 | } else { |
2234 | 2239 | ||
2235 | uf_regs->upsmr &= ~UPSMR_PRO; | 2240 | out_be32(&uf_regs->upsmr, in_be32(&uf_regs->upsmr)&~UPSMR_PRO); |
2236 | 2241 | ||
2237 | p_82xx_addr_filt = | 2242 | p_82xx_addr_filt = |
2238 | (struct ucc_geth_82xx_address_filtering_pram *) ugeth-> | 2243 | (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth-> |
2239 | p_rx_glbl_pram->addressfiltering; | 2244 | p_rx_glbl_pram->addressfiltering; |
2240 | 2245 | ||
2241 | if (dev->flags & IFF_ALLMULTI) { | 2246 | if (dev->flags & IFF_ALLMULTI) { |
@@ -2270,7 +2275,7 @@ static void ucc_geth_set_multi(struct net_device *dev) | |||
2270 | 2275 | ||
2271 | static void ucc_geth_stop(struct ucc_geth_private *ugeth) | 2276 | static void ucc_geth_stop(struct ucc_geth_private *ugeth) |
2272 | { | 2277 | { |
2273 | struct ucc_geth *ug_regs = ugeth->ug_regs; | 2278 | struct ucc_geth __iomem *ug_regs = ugeth->ug_regs; |
2274 | struct phy_device *phydev = ugeth->phydev; | 2279 | struct phy_device *phydev = ugeth->phydev; |
2275 | u32 tempval; | 2280 | u32 tempval; |
2276 | 2281 | ||
@@ -2419,20 +2424,20 @@ static int ucc_struct_init(struct ucc_geth_private *ugeth) | |||
2419 | return -ENOMEM; | 2424 | return -ENOMEM; |
2420 | } | 2425 | } |
2421 | 2426 | ||
2422 | ugeth->ug_regs = (struct ucc_geth *) ioremap(uf_info->regs, sizeof(struct ucc_geth)); | 2427 | ugeth->ug_regs = (struct ucc_geth __iomem *) ioremap(uf_info->regs, sizeof(struct ucc_geth)); |
2423 | 2428 | ||
2424 | return 0; | 2429 | return 0; |
2425 | } | 2430 | } |
2426 | 2431 | ||
2427 | static int ucc_geth_startup(struct ucc_geth_private *ugeth) | 2432 | static int ucc_geth_startup(struct ucc_geth_private *ugeth) |
2428 | { | 2433 | { |
2429 | struct ucc_geth_82xx_address_filtering_pram *p_82xx_addr_filt; | 2434 | struct ucc_geth_82xx_address_filtering_pram __iomem *p_82xx_addr_filt; |
2430 | struct ucc_geth_init_pram *p_init_enet_pram; | 2435 | struct ucc_geth_init_pram __iomem *p_init_enet_pram; |
2431 | struct ucc_fast_private *uccf; | 2436 | struct ucc_fast_private *uccf; |
2432 | struct ucc_geth_info *ug_info; | 2437 | struct ucc_geth_info *ug_info; |
2433 | struct ucc_fast_info *uf_info; | 2438 | struct ucc_fast_info *uf_info; |
2434 | struct ucc_fast *uf_regs; | 2439 | struct ucc_fast __iomem *uf_regs; |
2435 | struct ucc_geth *ug_regs; | 2440 | struct ucc_geth __iomem *ug_regs; |
2436 | int ret_val = -EINVAL; | 2441 | int ret_val = -EINVAL; |
2437 | u32 remoder = UCC_GETH_REMODER_INIT; | 2442 | u32 remoder = UCC_GETH_REMODER_INIT; |
2438 | u32 init_enet_pram_offset, cecr_subblock, command, maccfg1; | 2443 | u32 init_enet_pram_offset, cecr_subblock, command, maccfg1; |
@@ -2440,7 +2445,8 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2440 | u16 temoder = UCC_GETH_TEMODER_INIT; | 2445 | u16 temoder = UCC_GETH_TEMODER_INIT; |
2441 | u16 test; | 2446 | u16 test; |
2442 | u8 function_code = 0; | 2447 | u8 function_code = 0; |
2443 | u8 *bd, *endOfRing; | 2448 | u8 __iomem *bd; |
2449 | u8 __iomem *endOfRing; | ||
2444 | u8 numThreadsRxNumerical, numThreadsTxNumerical; | 2450 | u8 numThreadsRxNumerical, numThreadsTxNumerical; |
2445 | 2451 | ||
2446 | ugeth_vdbg("%s: IN", __FUNCTION__); | 2452 | ugeth_vdbg("%s: IN", __FUNCTION__); |
@@ -2602,11 +2608,11 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2602 | if (UCC_GETH_TX_BD_RING_ALIGNMENT > 4) | 2608 | if (UCC_GETH_TX_BD_RING_ALIGNMENT > 4) |
2603 | align = UCC_GETH_TX_BD_RING_ALIGNMENT; | 2609 | align = UCC_GETH_TX_BD_RING_ALIGNMENT; |
2604 | ugeth->tx_bd_ring_offset[j] = | 2610 | ugeth->tx_bd_ring_offset[j] = |
2605 | kmalloc((u32) (length + align), GFP_KERNEL); | 2611 | (u32) kmalloc((u32) (length + align), GFP_KERNEL); |
2606 | 2612 | ||
2607 | if (ugeth->tx_bd_ring_offset[j] != 0) | 2613 | if (ugeth->tx_bd_ring_offset[j] != 0) |
2608 | ugeth->p_tx_bd_ring[j] = | 2614 | ugeth->p_tx_bd_ring[j] = |
2609 | (void*)((ugeth->tx_bd_ring_offset[j] + | 2615 | (u8 __iomem *)((ugeth->tx_bd_ring_offset[j] + |
2610 | align) & ~(align - 1)); | 2616 | align) & ~(align - 1)); |
2611 | } else if (uf_info->bd_mem_part == MEM_PART_MURAM) { | 2617 | } else if (uf_info->bd_mem_part == MEM_PART_MURAM) { |
2612 | ugeth->tx_bd_ring_offset[j] = | 2618 | ugeth->tx_bd_ring_offset[j] = |
@@ -2614,7 +2620,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2614 | UCC_GETH_TX_BD_RING_ALIGNMENT); | 2620 | UCC_GETH_TX_BD_RING_ALIGNMENT); |
2615 | if (!IS_ERR_VALUE(ugeth->tx_bd_ring_offset[j])) | 2621 | if (!IS_ERR_VALUE(ugeth->tx_bd_ring_offset[j])) |
2616 | ugeth->p_tx_bd_ring[j] = | 2622 | ugeth->p_tx_bd_ring[j] = |
2617 | (u8 *) qe_muram_addr(ugeth-> | 2623 | (u8 __iomem *) qe_muram_addr(ugeth-> |
2618 | tx_bd_ring_offset[j]); | 2624 | tx_bd_ring_offset[j]); |
2619 | } | 2625 | } |
2620 | if (!ugeth->p_tx_bd_ring[j]) { | 2626 | if (!ugeth->p_tx_bd_ring[j]) { |
@@ -2626,8 +2632,8 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2626 | return -ENOMEM; | 2632 | return -ENOMEM; |
2627 | } | 2633 | } |
2628 | /* Zero unused end of bd ring, according to spec */ | 2634 | /* Zero unused end of bd ring, according to spec */ |
2629 | memset(ugeth->p_tx_bd_ring[j] + | 2635 | memset_io((void __iomem *)(ugeth->p_tx_bd_ring[j] + |
2630 | ug_info->bdRingLenTx[j] * sizeof(struct qe_bd), 0, | 2636 | ug_info->bdRingLenTx[j] * sizeof(struct qe_bd)), 0, |
2631 | length - ug_info->bdRingLenTx[j] * sizeof(struct qe_bd)); | 2637 | length - ug_info->bdRingLenTx[j] * sizeof(struct qe_bd)); |
2632 | } | 2638 | } |
2633 | 2639 | ||
@@ -2639,10 +2645,10 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2639 | if (UCC_GETH_RX_BD_RING_ALIGNMENT > 4) | 2645 | if (UCC_GETH_RX_BD_RING_ALIGNMENT > 4) |
2640 | align = UCC_GETH_RX_BD_RING_ALIGNMENT; | 2646 | align = UCC_GETH_RX_BD_RING_ALIGNMENT; |
2641 | ugeth->rx_bd_ring_offset[j] = | 2647 | ugeth->rx_bd_ring_offset[j] = |
2642 | kmalloc((u32) (length + align), GFP_KERNEL); | 2648 | (u32) kmalloc((u32) (length + align), GFP_KERNEL); |
2643 | if (ugeth->rx_bd_ring_offset[j] != 0) | 2649 | if (ugeth->rx_bd_ring_offset[j] != 0) |
2644 | ugeth->p_rx_bd_ring[j] = | 2650 | ugeth->p_rx_bd_ring[j] = |
2645 | (void*)((ugeth->rx_bd_ring_offset[j] + | 2651 | (u8 __iomem *)((ugeth->rx_bd_ring_offset[j] + |
2646 | align) & ~(align - 1)); | 2652 | align) & ~(align - 1)); |
2647 | } else if (uf_info->bd_mem_part == MEM_PART_MURAM) { | 2653 | } else if (uf_info->bd_mem_part == MEM_PART_MURAM) { |
2648 | ugeth->rx_bd_ring_offset[j] = | 2654 | ugeth->rx_bd_ring_offset[j] = |
@@ -2650,7 +2656,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2650 | UCC_GETH_RX_BD_RING_ALIGNMENT); | 2656 | UCC_GETH_RX_BD_RING_ALIGNMENT); |
2651 | if (!IS_ERR_VALUE(ugeth->rx_bd_ring_offset[j])) | 2657 | if (!IS_ERR_VALUE(ugeth->rx_bd_ring_offset[j])) |
2652 | ugeth->p_rx_bd_ring[j] = | 2658 | ugeth->p_rx_bd_ring[j] = |
2653 | (u8 *) qe_muram_addr(ugeth-> | 2659 | (u8 __iomem *) qe_muram_addr(ugeth-> |
2654 | rx_bd_ring_offset[j]); | 2660 | rx_bd_ring_offset[j]); |
2655 | } | 2661 | } |
2656 | if (!ugeth->p_rx_bd_ring[j]) { | 2662 | if (!ugeth->p_rx_bd_ring[j]) { |
@@ -2685,14 +2691,14 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2685 | bd = ugeth->confBd[j] = ugeth->txBd[j] = ugeth->p_tx_bd_ring[j]; | 2691 | bd = ugeth->confBd[j] = ugeth->txBd[j] = ugeth->p_tx_bd_ring[j]; |
2686 | for (i = 0; i < ug_info->bdRingLenTx[j]; i++) { | 2692 | for (i = 0; i < ug_info->bdRingLenTx[j]; i++) { |
2687 | /* clear bd buffer */ | 2693 | /* clear bd buffer */ |
2688 | out_be32(&((struct qe_bd *)bd)->buf, 0); | 2694 | out_be32(&((struct qe_bd __iomem *)bd)->buf, 0); |
2689 | /* set bd status and length */ | 2695 | /* set bd status and length */ |
2690 | out_be32((u32 *)bd, 0); | 2696 | out_be32((u32 __iomem *)bd, 0); |
2691 | bd += sizeof(struct qe_bd); | 2697 | bd += sizeof(struct qe_bd); |
2692 | } | 2698 | } |
2693 | bd -= sizeof(struct qe_bd); | 2699 | bd -= sizeof(struct qe_bd); |
2694 | /* set bd status and length */ | 2700 | /* set bd status and length */ |
2695 | out_be32((u32 *)bd, T_W); /* for last BD set Wrap bit */ | 2701 | out_be32((u32 __iomem *)bd, T_W); /* for last BD set Wrap bit */ |
2696 | } | 2702 | } |
2697 | 2703 | ||
2698 | /* Init Rx bds */ | 2704 | /* Init Rx bds */ |
@@ -2717,14 +2723,14 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2717 | bd = ugeth->rxBd[j] = ugeth->p_rx_bd_ring[j]; | 2723 | bd = ugeth->rxBd[j] = ugeth->p_rx_bd_ring[j]; |
2718 | for (i = 0; i < ug_info->bdRingLenRx[j]; i++) { | 2724 | for (i = 0; i < ug_info->bdRingLenRx[j]; i++) { |
2719 | /* set bd status and length */ | 2725 | /* set bd status and length */ |
2720 | out_be32((u32 *)bd, R_I); | 2726 | out_be32((u32 __iomem *)bd, R_I); |
2721 | /* clear bd buffer */ | 2727 | /* clear bd buffer */ |
2722 | out_be32(&((struct qe_bd *)bd)->buf, 0); | 2728 | out_be32(&((struct qe_bd __iomem *)bd)->buf, 0); |
2723 | bd += sizeof(struct qe_bd); | 2729 | bd += sizeof(struct qe_bd); |
2724 | } | 2730 | } |
2725 | bd -= sizeof(struct qe_bd); | 2731 | bd -= sizeof(struct qe_bd); |
2726 | /* set bd status and length */ | 2732 | /* set bd status and length */ |
2727 | out_be32((u32 *)bd, R_W); /* for last BD set Wrap bit */ | 2733 | out_be32((u32 __iomem *)bd, R_W); /* for last BD set Wrap bit */ |
2728 | } | 2734 | } |
2729 | 2735 | ||
2730 | /* | 2736 | /* |
@@ -2744,10 +2750,10 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2744 | return -ENOMEM; | 2750 | return -ENOMEM; |
2745 | } | 2751 | } |
2746 | ugeth->p_tx_glbl_pram = | 2752 | ugeth->p_tx_glbl_pram = |
2747 | (struct ucc_geth_tx_global_pram *) qe_muram_addr(ugeth-> | 2753 | (struct ucc_geth_tx_global_pram __iomem *) qe_muram_addr(ugeth-> |
2748 | tx_glbl_pram_offset); | 2754 | tx_glbl_pram_offset); |
2749 | /* Zero out p_tx_glbl_pram */ | 2755 | /* Zero out p_tx_glbl_pram */ |
2750 | memset(ugeth->p_tx_glbl_pram, 0, sizeof(struct ucc_geth_tx_global_pram)); | 2756 | memset_io((void __iomem *)ugeth->p_tx_glbl_pram, 0, sizeof(struct ucc_geth_tx_global_pram)); |
2751 | 2757 | ||
2752 | /* Fill global PRAM */ | 2758 | /* Fill global PRAM */ |
2753 | 2759 | ||
@@ -2768,7 +2774,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2768 | } | 2774 | } |
2769 | 2775 | ||
2770 | ugeth->p_thread_data_tx = | 2776 | ugeth->p_thread_data_tx = |
2771 | (struct ucc_geth_thread_data_tx *) qe_muram_addr(ugeth-> | 2777 | (struct ucc_geth_thread_data_tx __iomem *) qe_muram_addr(ugeth-> |
2772 | thread_dat_tx_offset); | 2778 | thread_dat_tx_offset); |
2773 | out_be32(&ugeth->p_tx_glbl_pram->tqptr, ugeth->thread_dat_tx_offset); | 2779 | out_be32(&ugeth->p_tx_glbl_pram->tqptr, ugeth->thread_dat_tx_offset); |
2774 | 2780 | ||
@@ -2779,7 +2785,8 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2779 | 2785 | ||
2780 | /* iphoffset */ | 2786 | /* iphoffset */ |
2781 | for (i = 0; i < TX_IP_OFFSET_ENTRY_MAX; i++) | 2787 | for (i = 0; i < TX_IP_OFFSET_ENTRY_MAX; i++) |
2782 | ugeth->p_tx_glbl_pram->iphoffset[i] = ug_info->iphoffset[i]; | 2788 | out_8(&ugeth->p_tx_glbl_pram->iphoffset[i], |
2789 | ug_info->iphoffset[i]); | ||
2783 | 2790 | ||
2784 | /* SQPTR */ | 2791 | /* SQPTR */ |
2785 | /* Size varies with number of Tx queues */ | 2792 | /* Size varies with number of Tx queues */ |
@@ -2797,7 +2804,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2797 | } | 2804 | } |
2798 | 2805 | ||
2799 | ugeth->p_send_q_mem_reg = | 2806 | ugeth->p_send_q_mem_reg = |
2800 | (struct ucc_geth_send_queue_mem_region *) qe_muram_addr(ugeth-> | 2807 | (struct ucc_geth_send_queue_mem_region __iomem *) qe_muram_addr(ugeth-> |
2801 | send_q_mem_reg_offset); | 2808 | send_q_mem_reg_offset); |
2802 | out_be32(&ugeth->p_tx_glbl_pram->sqptr, ugeth->send_q_mem_reg_offset); | 2809 | out_be32(&ugeth->p_tx_glbl_pram->sqptr, ugeth->send_q_mem_reg_offset); |
2803 | 2810 | ||
@@ -2841,25 +2848,26 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2841 | } | 2848 | } |
2842 | 2849 | ||
2843 | ugeth->p_scheduler = | 2850 | ugeth->p_scheduler = |
2844 | (struct ucc_geth_scheduler *) qe_muram_addr(ugeth-> | 2851 | (struct ucc_geth_scheduler __iomem *) qe_muram_addr(ugeth-> |
2845 | scheduler_offset); | 2852 | scheduler_offset); |
2846 | out_be32(&ugeth->p_tx_glbl_pram->schedulerbasepointer, | 2853 | out_be32(&ugeth->p_tx_glbl_pram->schedulerbasepointer, |
2847 | ugeth->scheduler_offset); | 2854 | ugeth->scheduler_offset); |
2848 | /* Zero out p_scheduler */ | 2855 | /* Zero out p_scheduler */ |
2849 | memset(ugeth->p_scheduler, 0, sizeof(struct ucc_geth_scheduler)); | 2856 | memset_io((void __iomem *)ugeth->p_scheduler, 0, sizeof(struct ucc_geth_scheduler)); |
2850 | 2857 | ||
2851 | /* Set values in scheduler */ | 2858 | /* Set values in scheduler */ |
2852 | out_be32(&ugeth->p_scheduler->mblinterval, | 2859 | out_be32(&ugeth->p_scheduler->mblinterval, |
2853 | ug_info->mblinterval); | 2860 | ug_info->mblinterval); |
2854 | out_be16(&ugeth->p_scheduler->nortsrbytetime, | 2861 | out_be16(&ugeth->p_scheduler->nortsrbytetime, |
2855 | ug_info->nortsrbytetime); | 2862 | ug_info->nortsrbytetime); |
2856 | ugeth->p_scheduler->fracsiz = ug_info->fracsiz; | 2863 | out_8(&ugeth->p_scheduler->fracsiz, ug_info->fracsiz); |
2857 | ugeth->p_scheduler->strictpriorityq = ug_info->strictpriorityq; | 2864 | out_8(&ugeth->p_scheduler->strictpriorityq, |
2858 | ugeth->p_scheduler->txasap = ug_info->txasap; | 2865 | ug_info->strictpriorityq); |
2859 | ugeth->p_scheduler->extrabw = ug_info->extrabw; | 2866 | out_8(&ugeth->p_scheduler->txasap, ug_info->txasap); |
2867 | out_8(&ugeth->p_scheduler->extrabw, ug_info->extrabw); | ||
2860 | for (i = 0; i < NUM_TX_QUEUES; i++) | 2868 | for (i = 0; i < NUM_TX_QUEUES; i++) |
2861 | ugeth->p_scheduler->weightfactor[i] = | 2869 | out_8(&ugeth->p_scheduler->weightfactor[i], |
2862 | ug_info->weightfactor[i]; | 2870 | ug_info->weightfactor[i]); |
2863 | 2871 | ||
2864 | /* Set pointers to cpucount registers in scheduler */ | 2872 | /* Set pointers to cpucount registers in scheduler */ |
2865 | ugeth->p_cpucount[0] = &(ugeth->p_scheduler->cpucount0); | 2873 | ugeth->p_cpucount[0] = &(ugeth->p_scheduler->cpucount0); |
@@ -2890,10 +2898,10 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2890 | return -ENOMEM; | 2898 | return -ENOMEM; |
2891 | } | 2899 | } |
2892 | ugeth->p_tx_fw_statistics_pram = | 2900 | ugeth->p_tx_fw_statistics_pram = |
2893 | (struct ucc_geth_tx_firmware_statistics_pram *) | 2901 | (struct ucc_geth_tx_firmware_statistics_pram __iomem *) |
2894 | qe_muram_addr(ugeth->tx_fw_statistics_pram_offset); | 2902 | qe_muram_addr(ugeth->tx_fw_statistics_pram_offset); |
2895 | /* Zero out p_tx_fw_statistics_pram */ | 2903 | /* Zero out p_tx_fw_statistics_pram */ |
2896 | memset(ugeth->p_tx_fw_statistics_pram, | 2904 | memset_io((void __iomem *)ugeth->p_tx_fw_statistics_pram, |
2897 | 0, sizeof(struct ucc_geth_tx_firmware_statistics_pram)); | 2905 | 0, sizeof(struct ucc_geth_tx_firmware_statistics_pram)); |
2898 | } | 2906 | } |
2899 | 2907 | ||
@@ -2930,10 +2938,10 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2930 | return -ENOMEM; | 2938 | return -ENOMEM; |
2931 | } | 2939 | } |
2932 | ugeth->p_rx_glbl_pram = | 2940 | ugeth->p_rx_glbl_pram = |
2933 | (struct ucc_geth_rx_global_pram *) qe_muram_addr(ugeth-> | 2941 | (struct ucc_geth_rx_global_pram __iomem *) qe_muram_addr(ugeth-> |
2934 | rx_glbl_pram_offset); | 2942 | rx_glbl_pram_offset); |
2935 | /* Zero out p_rx_glbl_pram */ | 2943 | /* Zero out p_rx_glbl_pram */ |
2936 | memset(ugeth->p_rx_glbl_pram, 0, sizeof(struct ucc_geth_rx_global_pram)); | 2944 | memset_io((void __iomem *)ugeth->p_rx_glbl_pram, 0, sizeof(struct ucc_geth_rx_global_pram)); |
2937 | 2945 | ||
2938 | /* Fill global PRAM */ | 2946 | /* Fill global PRAM */ |
2939 | 2947 | ||
@@ -2953,7 +2961,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2953 | } | 2961 | } |
2954 | 2962 | ||
2955 | ugeth->p_thread_data_rx = | 2963 | ugeth->p_thread_data_rx = |
2956 | (struct ucc_geth_thread_data_rx *) qe_muram_addr(ugeth-> | 2964 | (struct ucc_geth_thread_data_rx __iomem *) qe_muram_addr(ugeth-> |
2957 | thread_dat_rx_offset); | 2965 | thread_dat_rx_offset); |
2958 | out_be32(&ugeth->p_rx_glbl_pram->rqptr, ugeth->thread_dat_rx_offset); | 2966 | out_be32(&ugeth->p_rx_glbl_pram->rqptr, ugeth->thread_dat_rx_offset); |
2959 | 2967 | ||
@@ -2976,10 +2984,10 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
2976 | return -ENOMEM; | 2984 | return -ENOMEM; |
2977 | } | 2985 | } |
2978 | ugeth->p_rx_fw_statistics_pram = | 2986 | ugeth->p_rx_fw_statistics_pram = |
2979 | (struct ucc_geth_rx_firmware_statistics_pram *) | 2987 | (struct ucc_geth_rx_firmware_statistics_pram __iomem *) |
2980 | qe_muram_addr(ugeth->rx_fw_statistics_pram_offset); | 2988 | qe_muram_addr(ugeth->rx_fw_statistics_pram_offset); |
2981 | /* Zero out p_rx_fw_statistics_pram */ | 2989 | /* Zero out p_rx_fw_statistics_pram */ |
2982 | memset(ugeth->p_rx_fw_statistics_pram, 0, | 2990 | memset_io((void __iomem *)ugeth->p_rx_fw_statistics_pram, 0, |
2983 | sizeof(struct ucc_geth_rx_firmware_statistics_pram)); | 2991 | sizeof(struct ucc_geth_rx_firmware_statistics_pram)); |
2984 | } | 2992 | } |
2985 | 2993 | ||
@@ -3000,7 +3008,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
3000 | } | 3008 | } |
3001 | 3009 | ||
3002 | ugeth->p_rx_irq_coalescing_tbl = | 3010 | ugeth->p_rx_irq_coalescing_tbl = |
3003 | (struct ucc_geth_rx_interrupt_coalescing_table *) | 3011 | (struct ucc_geth_rx_interrupt_coalescing_table __iomem *) |
3004 | qe_muram_addr(ugeth->rx_irq_coalescing_tbl_offset); | 3012 | qe_muram_addr(ugeth->rx_irq_coalescing_tbl_offset); |
3005 | out_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr, | 3013 | out_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr, |
3006 | ugeth->rx_irq_coalescing_tbl_offset); | 3014 | ugeth->rx_irq_coalescing_tbl_offset); |
@@ -3069,11 +3077,11 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
3069 | } | 3077 | } |
3070 | 3078 | ||
3071 | ugeth->p_rx_bd_qs_tbl = | 3079 | ugeth->p_rx_bd_qs_tbl = |
3072 | (struct ucc_geth_rx_bd_queues_entry *) qe_muram_addr(ugeth-> | 3080 | (struct ucc_geth_rx_bd_queues_entry __iomem *) qe_muram_addr(ugeth-> |
3073 | rx_bd_qs_tbl_offset); | 3081 | rx_bd_qs_tbl_offset); |
3074 | out_be32(&ugeth->p_rx_glbl_pram->rbdqptr, ugeth->rx_bd_qs_tbl_offset); | 3082 | out_be32(&ugeth->p_rx_glbl_pram->rbdqptr, ugeth->rx_bd_qs_tbl_offset); |
3075 | /* Zero out p_rx_bd_qs_tbl */ | 3083 | /* Zero out p_rx_bd_qs_tbl */ |
3076 | memset(ugeth->p_rx_bd_qs_tbl, | 3084 | memset_io((void __iomem *)ugeth->p_rx_bd_qs_tbl, |
3077 | 0, | 3085 | 0, |
3078 | ug_info->numQueuesRx * (sizeof(struct ucc_geth_rx_bd_queues_entry) + | 3086 | ug_info->numQueuesRx * (sizeof(struct ucc_geth_rx_bd_queues_entry) + |
3079 | sizeof(struct ucc_geth_rx_prefetched_bds))); | 3087 | sizeof(struct ucc_geth_rx_prefetched_bds))); |
@@ -3133,7 +3141,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
3133 | &ugeth->p_rx_glbl_pram->remoder); | 3141 | &ugeth->p_rx_glbl_pram->remoder); |
3134 | 3142 | ||
3135 | /* function code register */ | 3143 | /* function code register */ |
3136 | ugeth->p_rx_glbl_pram->rstate = function_code; | 3144 | out_8(&ugeth->p_rx_glbl_pram->rstate, function_code); |
3137 | 3145 | ||
3138 | /* initialize extended filtering */ | 3146 | /* initialize extended filtering */ |
3139 | if (ug_info->rxExtendedFiltering) { | 3147 | if (ug_info->rxExtendedFiltering) { |
@@ -3160,7 +3168,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
3160 | } | 3168 | } |
3161 | 3169 | ||
3162 | ugeth->p_exf_glbl_param = | 3170 | ugeth->p_exf_glbl_param = |
3163 | (struct ucc_geth_exf_global_pram *) qe_muram_addr(ugeth-> | 3171 | (struct ucc_geth_exf_global_pram __iomem *) qe_muram_addr(ugeth-> |
3164 | exf_glbl_param_offset); | 3172 | exf_glbl_param_offset); |
3165 | out_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam, | 3173 | out_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam, |
3166 | ugeth->exf_glbl_param_offset); | 3174 | ugeth->exf_glbl_param_offset); |
@@ -3175,7 +3183,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
3175 | ugeth_82xx_filtering_clear_addr_in_paddr(ugeth, (u8) j); | 3183 | ugeth_82xx_filtering_clear_addr_in_paddr(ugeth, (u8) j); |
3176 | 3184 | ||
3177 | p_82xx_addr_filt = | 3185 | p_82xx_addr_filt = |
3178 | (struct ucc_geth_82xx_address_filtering_pram *) ugeth-> | 3186 | (struct ucc_geth_82xx_address_filtering_pram __iomem *) ugeth-> |
3179 | p_rx_glbl_pram->addressfiltering; | 3187 | p_rx_glbl_pram->addressfiltering; |
3180 | 3188 | ||
3181 | ugeth_82xx_filtering_clear_all_addr_in_hash(ugeth, | 3189 | ugeth_82xx_filtering_clear_all_addr_in_hash(ugeth, |
@@ -3307,17 +3315,21 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth) | |||
3307 | return -ENOMEM; | 3315 | return -ENOMEM; |
3308 | } | 3316 | } |
3309 | p_init_enet_pram = | 3317 | p_init_enet_pram = |
3310 | (struct ucc_geth_init_pram *) qe_muram_addr(init_enet_pram_offset); | 3318 | (struct ucc_geth_init_pram __iomem *) qe_muram_addr(init_enet_pram_offset); |
3311 | 3319 | ||
3312 | /* Copy shadow InitEnet command parameter structure into PRAM */ | 3320 | /* Copy shadow InitEnet command parameter structure into PRAM */ |
3313 | p_init_enet_pram->resinit1 = ugeth->p_init_enet_param_shadow->resinit1; | 3321 | out_8(&p_init_enet_pram->resinit1, |
3314 | p_init_enet_pram->resinit2 = ugeth->p_init_enet_param_shadow->resinit2; | 3322 | ugeth->p_init_enet_param_shadow->resinit1); |
3315 | p_init_enet_pram->resinit3 = ugeth->p_init_enet_param_shadow->resinit3; | 3323 | out_8(&p_init_enet_pram->resinit2, |
3316 | p_init_enet_pram->resinit4 = ugeth->p_init_enet_param_shadow->resinit4; | 3324 | ugeth->p_init_enet_param_shadow->resinit2); |
3325 | out_8(&p_init_enet_pram->resinit3, | ||
3326 | ugeth->p_init_enet_param_shadow->resinit3); | ||
3327 | out_8(&p_init_enet_pram->resinit4, | ||
3328 | ugeth->p_init_enet_param_shadow->resinit4); | ||
3317 | out_be16(&p_init_enet_pram->resinit5, | 3329 | out_be16(&p_init_enet_pram->resinit5, |
3318 | ugeth->p_init_enet_param_shadow->resinit5); | 3330 | ugeth->p_init_enet_param_shadow->resinit5); |
3319 | p_init_enet_pram->largestexternallookupkeysize = | 3331 | out_8(&p_init_enet_pram->largestexternallookupkeysize, |
3320 | ugeth->p_init_enet_param_shadow->largestexternallookupkeysize; | 3332 | ugeth->p_init_enet_param_shadow->largestexternallookupkeysize); |
3321 | out_be32(&p_init_enet_pram->rgftgfrxglobal, | 3333 | out_be32(&p_init_enet_pram->rgftgfrxglobal, |
3322 | ugeth->p_init_enet_param_shadow->rgftgfrxglobal); | 3334 | ugeth->p_init_enet_param_shadow->rgftgfrxglobal); |
3323 | for (i = 0; i < ENET_INIT_PARAM_MAX_ENTRIES_RX; i++) | 3335 | for (i = 0; i < ENET_INIT_PARAM_MAX_ENTRIES_RX; i++) |
@@ -3371,7 +3383,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3371 | #ifdef CONFIG_UGETH_TX_ON_DEMAND | 3383 | #ifdef CONFIG_UGETH_TX_ON_DEMAND |
3372 | struct ucc_fast_private *uccf; | 3384 | struct ucc_fast_private *uccf; |
3373 | #endif | 3385 | #endif |
3374 | u8 *bd; /* BD pointer */ | 3386 | u8 __iomem *bd; /* BD pointer */ |
3375 | u32 bd_status; | 3387 | u32 bd_status; |
3376 | u8 txQ = 0; | 3388 | u8 txQ = 0; |
3377 | 3389 | ||
@@ -3383,7 +3395,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3383 | 3395 | ||
3384 | /* Start from the next BD that should be filled */ | 3396 | /* Start from the next BD that should be filled */ |
3385 | bd = ugeth->txBd[txQ]; | 3397 | bd = ugeth->txBd[txQ]; |
3386 | bd_status = in_be32((u32 *)bd); | 3398 | bd_status = in_be32((u32 __iomem *)bd); |
3387 | /* Save the skb pointer so we can free it later */ | 3399 | /* Save the skb pointer so we can free it later */ |
3388 | ugeth->tx_skbuff[txQ][ugeth->skb_curtx[txQ]] = skb; | 3400 | ugeth->tx_skbuff[txQ][ugeth->skb_curtx[txQ]] = skb; |
3389 | 3401 | ||
@@ -3393,7 +3405,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3393 | 1) & TX_RING_MOD_MASK(ugeth->ug_info->bdRingLenTx[txQ]); | 3405 | 1) & TX_RING_MOD_MASK(ugeth->ug_info->bdRingLenTx[txQ]); |
3394 | 3406 | ||
3395 | /* set up the buffer descriptor */ | 3407 | /* set up the buffer descriptor */ |
3396 | out_be32(&((struct qe_bd *)bd)->buf, | 3408 | out_be32(&((struct qe_bd __iomem *)bd)->buf, |
3397 | dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE)); | 3409 | dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE)); |
3398 | 3410 | ||
3399 | /* printk(KERN_DEBUG"skb->data is 0x%x\n",skb->data); */ | 3411 | /* printk(KERN_DEBUG"skb->data is 0x%x\n",skb->data); */ |
@@ -3401,7 +3413,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3401 | bd_status = (bd_status & T_W) | T_R | T_I | T_L | skb->len; | 3413 | bd_status = (bd_status & T_W) | T_R | T_I | T_L | skb->len; |
3402 | 3414 | ||
3403 | /* set bd status and length */ | 3415 | /* set bd status and length */ |
3404 | out_be32((u32 *)bd, bd_status); | 3416 | out_be32((u32 __iomem *)bd, bd_status); |
3405 | 3417 | ||
3406 | dev->trans_start = jiffies; | 3418 | dev->trans_start = jiffies; |
3407 | 3419 | ||
@@ -3441,7 +3453,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3441 | static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit) | 3453 | static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit) |
3442 | { | 3454 | { |
3443 | struct sk_buff *skb; | 3455 | struct sk_buff *skb; |
3444 | u8 *bd; | 3456 | u8 __iomem *bd; |
3445 | u16 length, howmany = 0; | 3457 | u16 length, howmany = 0; |
3446 | u32 bd_status; | 3458 | u32 bd_status; |
3447 | u8 *bdBuffer; | 3459 | u8 *bdBuffer; |
@@ -3454,11 +3466,11 @@ static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit | |||
3454 | /* collect received buffers */ | 3466 | /* collect received buffers */ |
3455 | bd = ugeth->rxBd[rxQ]; | 3467 | bd = ugeth->rxBd[rxQ]; |
3456 | 3468 | ||
3457 | bd_status = in_be32((u32 *)bd); | 3469 | bd_status = in_be32((u32 __iomem *)bd); |
3458 | 3470 | ||
3459 | /* while there are received buffers and BD is full (~R_E) */ | 3471 | /* while there are received buffers and BD is full (~R_E) */ |
3460 | while (!((bd_status & (R_E)) || (--rx_work_limit < 0))) { | 3472 | while (!((bd_status & (R_E)) || (--rx_work_limit < 0))) { |
3461 | bdBuffer = (u8 *) in_be32(&((struct qe_bd *)bd)->buf); | 3473 | bdBuffer = (u8 *) in_be32(&((struct qe_bd __iomem *)bd)->buf); |
3462 | length = (u16) ((bd_status & BD_LENGTH_MASK) - 4); | 3474 | length = (u16) ((bd_status & BD_LENGTH_MASK) - 4); |
3463 | skb = ugeth->rx_skbuff[rxQ][ugeth->skb_currx[rxQ]]; | 3475 | skb = ugeth->rx_skbuff[rxQ][ugeth->skb_currx[rxQ]]; |
3464 | 3476 | ||
@@ -3516,7 +3528,7 @@ static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit | |||
3516 | else | 3528 | else |
3517 | bd += sizeof(struct qe_bd); | 3529 | bd += sizeof(struct qe_bd); |
3518 | 3530 | ||
3519 | bd_status = in_be32((u32 *)bd); | 3531 | bd_status = in_be32((u32 __iomem *)bd); |
3520 | } | 3532 | } |
3521 | 3533 | ||
3522 | ugeth->rxBd[rxQ] = bd; | 3534 | ugeth->rxBd[rxQ] = bd; |
@@ -3527,11 +3539,11 @@ static int ucc_geth_tx(struct net_device *dev, u8 txQ) | |||
3527 | { | 3539 | { |
3528 | /* Start from the next BD that should be filled */ | 3540 | /* Start from the next BD that should be filled */ |
3529 | struct ucc_geth_private *ugeth = netdev_priv(dev); | 3541 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
3530 | u8 *bd; /* BD pointer */ | 3542 | u8 __iomem *bd; /* BD pointer */ |
3531 | u32 bd_status; | 3543 | u32 bd_status; |
3532 | 3544 | ||
3533 | bd = ugeth->confBd[txQ]; | 3545 | bd = ugeth->confBd[txQ]; |
3534 | bd_status = in_be32((u32 *)bd); | 3546 | bd_status = in_be32((u32 __iomem *)bd); |
3535 | 3547 | ||
3536 | /* Normal processing. */ | 3548 | /* Normal processing. */ |
3537 | while ((bd_status & T_R) == 0) { | 3549 | while ((bd_status & T_R) == 0) { |
@@ -3561,7 +3573,7 @@ static int ucc_geth_tx(struct net_device *dev, u8 txQ) | |||
3561 | bd += sizeof(struct qe_bd); | 3573 | bd += sizeof(struct qe_bd); |
3562 | else | 3574 | else |
3563 | bd = ugeth->p_tx_bd_ring[txQ]; | 3575 | bd = ugeth->p_tx_bd_ring[txQ]; |
3564 | bd_status = in_be32((u32 *)bd); | 3576 | bd_status = in_be32((u32 __iomem *)bd); |
3565 | } | 3577 | } |
3566 | ugeth->confBd[txQ] = bd; | 3578 | ugeth->confBd[txQ] = bd; |
3567 | return 0; | 3579 | return 0; |
@@ -3910,7 +3922,7 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma | |||
3910 | return -EINVAL; | 3922 | return -EINVAL; |
3911 | } | 3923 | } |
3912 | } else { | 3924 | } else { |
3913 | prop = of_get_property(np, "rx-clock", NULL); | 3925 | prop = of_get_property(np, "tx-clock", NULL); |
3914 | if (!prop) { | 3926 | if (!prop) { |
3915 | printk(KERN_ERR | 3927 | printk(KERN_ERR |
3916 | "ucc_geth: mising tx-clock-name property\n"); | 3928 | "ucc_geth: mising tx-clock-name property\n"); |
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h index 9f8b7580a3a4..abc0e2242634 100644 --- a/drivers/net/ucc_geth.h +++ b/drivers/net/ucc_geth.h | |||
@@ -700,8 +700,8 @@ struct ucc_geth_82xx_address_filtering_pram { | |||
700 | u32 iaddr_l; /* individual address filter, low */ | 700 | u32 iaddr_l; /* individual address filter, low */ |
701 | u32 gaddr_h; /* group address filter, high */ | 701 | u32 gaddr_h; /* group address filter, high */ |
702 | u32 gaddr_l; /* group address filter, low */ | 702 | u32 gaddr_l; /* group address filter, low */ |
703 | struct ucc_geth_82xx_enet_address taddr; | 703 | struct ucc_geth_82xx_enet_address __iomem taddr; |
704 | struct ucc_geth_82xx_enet_address paddr[NUM_OF_PADDRS]; | 704 | struct ucc_geth_82xx_enet_address __iomem paddr[NUM_OF_PADDRS]; |
705 | u8 res0[0x40 - 0x38]; | 705 | u8 res0[0x40 - 0x38]; |
706 | } __attribute__ ((packed)); | 706 | } __attribute__ ((packed)); |
707 | 707 | ||
@@ -1186,40 +1186,40 @@ struct ucc_geth_private { | |||
1186 | struct ucc_fast_private *uccf; | 1186 | struct ucc_fast_private *uccf; |
1187 | struct net_device *dev; | 1187 | struct net_device *dev; |
1188 | struct napi_struct napi; | 1188 | struct napi_struct napi; |
1189 | struct ucc_geth *ug_regs; | 1189 | struct ucc_geth __iomem *ug_regs; |
1190 | struct ucc_geth_init_pram *p_init_enet_param_shadow; | 1190 | struct ucc_geth_init_pram *p_init_enet_param_shadow; |
1191 | struct ucc_geth_exf_global_pram *p_exf_glbl_param; | 1191 | struct ucc_geth_exf_global_pram __iomem *p_exf_glbl_param; |
1192 | u32 exf_glbl_param_offset; | 1192 | u32 exf_glbl_param_offset; |
1193 | struct ucc_geth_rx_global_pram *p_rx_glbl_pram; | 1193 | struct ucc_geth_rx_global_pram __iomem *p_rx_glbl_pram; |
1194 | u32 rx_glbl_pram_offset; | 1194 | u32 rx_glbl_pram_offset; |
1195 | struct ucc_geth_tx_global_pram *p_tx_glbl_pram; | 1195 | struct ucc_geth_tx_global_pram __iomem *p_tx_glbl_pram; |
1196 | u32 tx_glbl_pram_offset; | 1196 | u32 tx_glbl_pram_offset; |
1197 | struct ucc_geth_send_queue_mem_region *p_send_q_mem_reg; | 1197 | struct ucc_geth_send_queue_mem_region __iomem *p_send_q_mem_reg; |
1198 | u32 send_q_mem_reg_offset; | 1198 | u32 send_q_mem_reg_offset; |
1199 | struct ucc_geth_thread_data_tx *p_thread_data_tx; | 1199 | struct ucc_geth_thread_data_tx __iomem *p_thread_data_tx; |
1200 | u32 thread_dat_tx_offset; | 1200 | u32 thread_dat_tx_offset; |
1201 | struct ucc_geth_thread_data_rx *p_thread_data_rx; | 1201 | struct ucc_geth_thread_data_rx __iomem *p_thread_data_rx; |
1202 | u32 thread_dat_rx_offset; | 1202 | u32 thread_dat_rx_offset; |
1203 | struct ucc_geth_scheduler *p_scheduler; | 1203 | struct ucc_geth_scheduler __iomem *p_scheduler; |
1204 | u32 scheduler_offset; | 1204 | u32 scheduler_offset; |
1205 | struct ucc_geth_tx_firmware_statistics_pram *p_tx_fw_statistics_pram; | 1205 | struct ucc_geth_tx_firmware_statistics_pram __iomem *p_tx_fw_statistics_pram; |
1206 | u32 tx_fw_statistics_pram_offset; | 1206 | u32 tx_fw_statistics_pram_offset; |
1207 | struct ucc_geth_rx_firmware_statistics_pram *p_rx_fw_statistics_pram; | 1207 | struct ucc_geth_rx_firmware_statistics_pram __iomem *p_rx_fw_statistics_pram; |
1208 | u32 rx_fw_statistics_pram_offset; | 1208 | u32 rx_fw_statistics_pram_offset; |
1209 | struct ucc_geth_rx_interrupt_coalescing_table *p_rx_irq_coalescing_tbl; | 1209 | struct ucc_geth_rx_interrupt_coalescing_table __iomem *p_rx_irq_coalescing_tbl; |
1210 | u32 rx_irq_coalescing_tbl_offset; | 1210 | u32 rx_irq_coalescing_tbl_offset; |
1211 | struct ucc_geth_rx_bd_queues_entry *p_rx_bd_qs_tbl; | 1211 | struct ucc_geth_rx_bd_queues_entry __iomem *p_rx_bd_qs_tbl; |
1212 | u32 rx_bd_qs_tbl_offset; | 1212 | u32 rx_bd_qs_tbl_offset; |
1213 | u8 *p_tx_bd_ring[NUM_TX_QUEUES]; | 1213 | u8 __iomem *p_tx_bd_ring[NUM_TX_QUEUES]; |
1214 | u32 tx_bd_ring_offset[NUM_TX_QUEUES]; | 1214 | u32 tx_bd_ring_offset[NUM_TX_QUEUES]; |
1215 | u8 *p_rx_bd_ring[NUM_RX_QUEUES]; | 1215 | u8 __iomem *p_rx_bd_ring[NUM_RX_QUEUES]; |
1216 | u32 rx_bd_ring_offset[NUM_RX_QUEUES]; | 1216 | u32 rx_bd_ring_offset[NUM_RX_QUEUES]; |
1217 | u8 *confBd[NUM_TX_QUEUES]; | 1217 | u8 __iomem *confBd[NUM_TX_QUEUES]; |
1218 | u8 *txBd[NUM_TX_QUEUES]; | 1218 | u8 __iomem *txBd[NUM_TX_QUEUES]; |
1219 | u8 *rxBd[NUM_RX_QUEUES]; | 1219 | u8 __iomem *rxBd[NUM_RX_QUEUES]; |
1220 | int badFrame[NUM_RX_QUEUES]; | 1220 | int badFrame[NUM_RX_QUEUES]; |
1221 | u16 cpucount[NUM_TX_QUEUES]; | 1221 | u16 cpucount[NUM_TX_QUEUES]; |
1222 | volatile u16 *p_cpucount[NUM_TX_QUEUES]; | 1222 | u16 __iomem *p_cpucount[NUM_TX_QUEUES]; |
1223 | int indAddrRegUsed[NUM_OF_PADDRS]; | 1223 | int indAddrRegUsed[NUM_OF_PADDRS]; |
1224 | u8 paddr[NUM_OF_PADDRS][ENET_NUM_OCTETS_PER_ADDRESS]; /* ethernet address */ | 1224 | u8 paddr[NUM_OF_PADDRS][ENET_NUM_OCTETS_PER_ADDRESS]; /* ethernet address */ |
1225 | u8 numGroupAddrInHash; | 1225 | u8 numGroupAddrInHash; |
@@ -1251,4 +1251,12 @@ struct ucc_geth_private { | |||
1251 | int oldlink; | 1251 | int oldlink; |
1252 | }; | 1252 | }; |
1253 | 1253 | ||
1254 | void uec_set_ethtool_ops(struct net_device *netdev); | ||
1255 | int init_flow_control_params(u32 automatic_flow_control_mode, | ||
1256 | int rx_flow_control_enable, int tx_flow_control_enable, | ||
1257 | u16 pause_period, u16 extension_field, | ||
1258 | u32 __iomem *upsmr_register, u32 __iomem *uempr_register, | ||
1259 | u32 __iomem *maccfg1_register); | ||
1260 | |||
1261 | |||
1254 | #endif /* __UCC_GETH_H__ */ | 1262 | #endif /* __UCC_GETH_H__ */ |
diff --git a/drivers/net/ucc_geth_ethtool.c b/drivers/net/ucc_geth_ethtool.c index 9a9622c13e2b..299b7f176950 100644 --- a/drivers/net/ucc_geth_ethtool.c +++ b/drivers/net/ucc_geth_ethtool.c | |||
@@ -108,12 +108,6 @@ static char rx_fw_stat_gstrings[][ETH_GSTRING_LEN] = { | |||
108 | #define UEC_TX_FW_STATS_LEN ARRAY_SIZE(tx_fw_stat_gstrings) | 108 | #define UEC_TX_FW_STATS_LEN ARRAY_SIZE(tx_fw_stat_gstrings) |
109 | #define UEC_RX_FW_STATS_LEN ARRAY_SIZE(rx_fw_stat_gstrings) | 109 | #define UEC_RX_FW_STATS_LEN ARRAY_SIZE(rx_fw_stat_gstrings) |
110 | 110 | ||
111 | extern int init_flow_control_params(u32 automatic_flow_control_mode, | ||
112 | int rx_flow_control_enable, | ||
113 | int tx_flow_control_enable, u16 pause_period, | ||
114 | u16 extension_field, volatile u32 *upsmr_register, | ||
115 | volatile u32 *uempr_register, volatile u32 *maccfg1_register); | ||
116 | |||
117 | static int | 111 | static int |
118 | uec_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | 112 | uec_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) |
119 | { | 113 | { |
diff --git a/drivers/net/ucc_geth_mii.c b/drivers/net/ucc_geth_mii.c index 2af490781005..940474736922 100644 --- a/drivers/net/ucc_geth_mii.c +++ b/drivers/net/ucc_geth_mii.c | |||
@@ -104,7 +104,7 @@ int uec_mdio_read(struct mii_bus *bus, int mii_id, int regnum) | |||
104 | } | 104 | } |
105 | 105 | ||
106 | /* Reset the MIIM registers, and wait for the bus to free */ | 106 | /* Reset the MIIM registers, and wait for the bus to free */ |
107 | int uec_mdio_reset(struct mii_bus *bus) | 107 | static int uec_mdio_reset(struct mii_bus *bus) |
108 | { | 108 | { |
109 | struct ucc_mii_mng __iomem *regs = (void __iomem *)bus->priv; | 109 | struct ucc_mii_mng __iomem *regs = (void __iomem *)bus->priv; |
110 | unsigned int timeout = PHY_INIT_TIMEOUT; | 110 | unsigned int timeout = PHY_INIT_TIMEOUT; |
@@ -240,7 +240,7 @@ reg_map_fail: | |||
240 | return err; | 240 | return err; |
241 | } | 241 | } |
242 | 242 | ||
243 | int uec_mdio_remove(struct of_device *ofdev) | 243 | static int uec_mdio_remove(struct of_device *ofdev) |
244 | { | 244 | { |
245 | struct device *device = &ofdev->dev; | 245 | struct device *device = &ofdev->dev; |
246 | struct mii_bus *bus = dev_get_drvdata(device); | 246 | struct mii_bus *bus = dev_get_drvdata(device); |