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authorPaul Mundt <lethal@linux-sh.org>2010-10-27 01:33:39 -0400
committerPaul Mundt <lethal@linux-sh.org>2010-10-27 01:33:39 -0400
commit9eb79bb3f54ce1843d579ef42ded61e0c607e850 (patch)
tree1d2fb59d54e90a9c477359690a10aef41990a9ee /drivers
parent9cc1cf380e15f7314f8defb849b8e926d5755f8b (diff)
cdrom: gdrom: ctrl_in/outX to __raw_read/writeX conversion.
The ctrl_xxx routines are deprecated, switch over to the __raw_xxx versions. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/cdrom/gdrom.c76
1 files changed, 38 insertions, 38 deletions
diff --git a/drivers/cdrom/gdrom.c b/drivers/cdrom/gdrom.c
index 3af6516919b7..de65915308fb 100644
--- a/drivers/cdrom/gdrom.c
+++ b/drivers/cdrom/gdrom.c
@@ -142,18 +142,18 @@ static int gdrom_hardreset(struct cdrom_device_info *cd_info);
142 142
143static bool gdrom_is_busy(void) 143static bool gdrom_is_busy(void)
144{ 144{
145 return (ctrl_inb(GDROM_ALTSTATUS_REG) & 0x80) != 0; 145 return (__raw_readb(GDROM_ALTSTATUS_REG) & 0x80) != 0;
146} 146}
147 147
148static bool gdrom_data_request(void) 148static bool gdrom_data_request(void)
149{ 149{
150 return (ctrl_inb(GDROM_ALTSTATUS_REG) & 0x88) == 8; 150 return (__raw_readb(GDROM_ALTSTATUS_REG) & 0x88) == 8;
151} 151}
152 152
153static bool gdrom_wait_clrbusy(void) 153static bool gdrom_wait_clrbusy(void)
154{ 154{
155 unsigned long timeout = jiffies + GDROM_DEFAULT_TIMEOUT; 155 unsigned long timeout = jiffies + GDROM_DEFAULT_TIMEOUT;
156 while ((ctrl_inb(GDROM_ALTSTATUS_REG) & 0x80) && 156 while ((__raw_readb(GDROM_ALTSTATUS_REG) & 0x80) &&
157 (time_before(jiffies, timeout))) 157 (time_before(jiffies, timeout)))
158 cpu_relax(); 158 cpu_relax();
159 return time_before(jiffies, timeout + 1); 159 return time_before(jiffies, timeout + 1);
@@ -181,14 +181,14 @@ static void gdrom_identifydevice(void *buf)
181 gdrom_getsense(NULL); 181 gdrom_getsense(NULL);
182 return; 182 return;
183 } 183 }
184 ctrl_outb(GDROM_COM_IDDEV, GDROM_STATUSCOMMAND_REG); 184 __raw_writeb(GDROM_COM_IDDEV, GDROM_STATUSCOMMAND_REG);
185 if (!gdrom_wait_busy_sleeps()) { 185 if (!gdrom_wait_busy_sleeps()) {
186 gdrom_getsense(NULL); 186 gdrom_getsense(NULL);
187 return; 187 return;
188 } 188 }
189 /* now read in the data */ 189 /* now read in the data */
190 for (c = 0; c < 40; c++) 190 for (c = 0; c < 40; c++)
191 data[c] = ctrl_inw(GDROM_DATA_REG); 191 data[c] = __raw_readw(GDROM_DATA_REG);
192} 192}
193 193
194static void gdrom_spicommand(void *spi_string, int buflen) 194static void gdrom_spicommand(void *spi_string, int buflen)
@@ -197,21 +197,21 @@ static void gdrom_spicommand(void *spi_string, int buflen)
197 unsigned long timeout; 197 unsigned long timeout;
198 198
199 /* ensure IRQ_WAIT is set */ 199 /* ensure IRQ_WAIT is set */
200 ctrl_outb(0x08, GDROM_ALTSTATUS_REG); 200 __raw_writeb(0x08, GDROM_ALTSTATUS_REG);
201 /* specify how many bytes we expect back */ 201 /* specify how many bytes we expect back */
202 ctrl_outb(buflen & 0xFF, GDROM_BCL_REG); 202 __raw_writeb(buflen & 0xFF, GDROM_BCL_REG);
203 ctrl_outb((buflen >> 8) & 0xFF, GDROM_BCH_REG); 203 __raw_writeb((buflen >> 8) & 0xFF, GDROM_BCH_REG);
204 /* other parameters */ 204 /* other parameters */
205 ctrl_outb(0, GDROM_INTSEC_REG); 205 __raw_writeb(0, GDROM_INTSEC_REG);
206 ctrl_outb(0, GDROM_SECNUM_REG); 206 __raw_writeb(0, GDROM_SECNUM_REG);
207 ctrl_outb(0, GDROM_ERROR_REG); 207 __raw_writeb(0, GDROM_ERROR_REG);
208 /* Wait until we can go */ 208 /* Wait until we can go */
209 if (!gdrom_wait_clrbusy()) { 209 if (!gdrom_wait_clrbusy()) {
210 gdrom_getsense(NULL); 210 gdrom_getsense(NULL);
211 return; 211 return;
212 } 212 }
213 timeout = jiffies + GDROM_DEFAULT_TIMEOUT; 213 timeout = jiffies + GDROM_DEFAULT_TIMEOUT;
214 ctrl_outb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG); 214 __raw_writeb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG);
215 while (!gdrom_data_request() && time_before(jiffies, timeout)) 215 while (!gdrom_data_request() && time_before(jiffies, timeout))
216 cpu_relax(); 216 cpu_relax();
217 if (!time_before(jiffies, timeout + 1)) { 217 if (!time_before(jiffies, timeout + 1)) {
@@ -233,10 +233,10 @@ static char gdrom_execute_diagnostic(void)
233 gdrom_hardreset(gd.cd_info); 233 gdrom_hardreset(gd.cd_info);
234 if (!gdrom_wait_clrbusy()) 234 if (!gdrom_wait_clrbusy())
235 return 0; 235 return 0;
236 ctrl_outb(GDROM_COM_EXECDIAG, GDROM_STATUSCOMMAND_REG); 236 __raw_writeb(GDROM_COM_EXECDIAG, GDROM_STATUSCOMMAND_REG);
237 if (!gdrom_wait_busy_sleeps()) 237 if (!gdrom_wait_busy_sleeps())
238 return 0; 238 return 0;
239 return ctrl_inb(GDROM_ERROR_REG); 239 return __raw_readb(GDROM_ERROR_REG);
240} 240}
241 241
242/* 242/*
@@ -385,7 +385,7 @@ static void gdrom_release(struct cdrom_device_info *cd_info)
385static int gdrom_drivestatus(struct cdrom_device_info *cd_info, int ignore) 385static int gdrom_drivestatus(struct cdrom_device_info *cd_info, int ignore)
386{ 386{
387 /* read the sense key */ 387 /* read the sense key */
388 char sense = ctrl_inb(GDROM_ERROR_REG); 388 char sense = __raw_readb(GDROM_ERROR_REG);
389 sense &= 0xF0; 389 sense &= 0xF0;
390 if (sense == 0) 390 if (sense == 0)
391 return CDS_DISC_OK; 391 return CDS_DISC_OK;
@@ -398,16 +398,16 @@ static int gdrom_drivestatus(struct cdrom_device_info *cd_info, int ignore)
398static int gdrom_mediachanged(struct cdrom_device_info *cd_info, int ignore) 398static int gdrom_mediachanged(struct cdrom_device_info *cd_info, int ignore)
399{ 399{
400 /* check the sense key */ 400 /* check the sense key */
401 return (ctrl_inb(GDROM_ERROR_REG) & 0xF0) == 0x60; 401 return (__raw_readb(GDROM_ERROR_REG) & 0xF0) == 0x60;
402} 402}
403 403
404/* reset the G1 bus */ 404/* reset the G1 bus */
405static int gdrom_hardreset(struct cdrom_device_info *cd_info) 405static int gdrom_hardreset(struct cdrom_device_info *cd_info)
406{ 406{
407 int count; 407 int count;
408 ctrl_outl(0x1fffff, GDROM_RESET_REG); 408 __raw_writel(0x1fffff, GDROM_RESET_REG);
409 for (count = 0xa0000000; count < 0xa0200000; count += 4) 409 for (count = 0xa0000000; count < 0xa0200000; count += 4)
410 ctrl_inl(count); 410 __raw_readl(count);
411 return 0; 411 return 0;
412} 412}
413 413
@@ -536,7 +536,7 @@ static const struct block_device_operations gdrom_bdops = {
536 536
537static irqreturn_t gdrom_command_interrupt(int irq, void *dev_id) 537static irqreturn_t gdrom_command_interrupt(int irq, void *dev_id)
538{ 538{
539 gd.status = ctrl_inb(GDROM_STATUSCOMMAND_REG); 539 gd.status = __raw_readb(GDROM_STATUSCOMMAND_REG);
540 if (gd.pending != 1) 540 if (gd.pending != 1)
541 return IRQ_HANDLED; 541 return IRQ_HANDLED;
542 gd.pending = 0; 542 gd.pending = 0;
@@ -546,7 +546,7 @@ static irqreturn_t gdrom_command_interrupt(int irq, void *dev_id)
546 546
547static irqreturn_t gdrom_dma_interrupt(int irq, void *dev_id) 547static irqreturn_t gdrom_dma_interrupt(int irq, void *dev_id)
548{ 548{
549 gd.status = ctrl_inb(GDROM_STATUSCOMMAND_REG); 549 gd.status = __raw_readb(GDROM_STATUSCOMMAND_REG);
550 if (gd.transfer != 1) 550 if (gd.transfer != 1)
551 return IRQ_HANDLED; 551 return IRQ_HANDLED;
552 gd.transfer = 0; 552 gd.transfer = 0;
@@ -600,10 +600,10 @@ static void gdrom_readdisk_dma(struct work_struct *work)
600 spin_unlock(&gdrom_lock); 600 spin_unlock(&gdrom_lock);
601 block = blk_rq_pos(req)/GD_TO_BLK + GD_SESSION_OFFSET; 601 block = blk_rq_pos(req)/GD_TO_BLK + GD_SESSION_OFFSET;
602 block_cnt = blk_rq_sectors(req)/GD_TO_BLK; 602 block_cnt = blk_rq_sectors(req)/GD_TO_BLK;
603 ctrl_outl(virt_to_phys(req->buffer), GDROM_DMA_STARTADDR_REG); 603 __raw_writel(virt_to_phys(req->buffer), GDROM_DMA_STARTADDR_REG);
604 ctrl_outl(block_cnt * GDROM_HARD_SECTOR, GDROM_DMA_LENGTH_REG); 604 __raw_writel(block_cnt * GDROM_HARD_SECTOR, GDROM_DMA_LENGTH_REG);
605 ctrl_outl(1, GDROM_DMA_DIRECTION_REG); 605 __raw_writel(1, GDROM_DMA_DIRECTION_REG);
606 ctrl_outl(1, GDROM_DMA_ENABLE_REG); 606 __raw_writel(1, GDROM_DMA_ENABLE_REG);
607 read_command->cmd[2] = (block >> 16) & 0xFF; 607 read_command->cmd[2] = (block >> 16) & 0xFF;
608 read_command->cmd[3] = (block >> 8) & 0xFF; 608 read_command->cmd[3] = (block >> 8) & 0xFF;
609 read_command->cmd[4] = block & 0xFF; 609 read_command->cmd[4] = block & 0xFF;
@@ -611,18 +611,18 @@ static void gdrom_readdisk_dma(struct work_struct *work)
611 read_command->cmd[9] = (block_cnt >> 8) & 0xFF; 611 read_command->cmd[9] = (block_cnt >> 8) & 0xFF;
612 read_command->cmd[10] = block_cnt & 0xFF; 612 read_command->cmd[10] = block_cnt & 0xFF;
613 /* set for DMA */ 613 /* set for DMA */
614 ctrl_outb(1, GDROM_ERROR_REG); 614 __raw_writeb(1, GDROM_ERROR_REG);
615 /* other registers */ 615 /* other registers */
616 ctrl_outb(0, GDROM_SECNUM_REG); 616 __raw_writeb(0, GDROM_SECNUM_REG);
617 ctrl_outb(0, GDROM_BCL_REG); 617 __raw_writeb(0, GDROM_BCL_REG);
618 ctrl_outb(0, GDROM_BCH_REG); 618 __raw_writeb(0, GDROM_BCH_REG);
619 ctrl_outb(0, GDROM_DSEL_REG); 619 __raw_writeb(0, GDROM_DSEL_REG);
620 ctrl_outb(0, GDROM_INTSEC_REG); 620 __raw_writeb(0, GDROM_INTSEC_REG);
621 /* Wait for registers to reset after any previous activity */ 621 /* Wait for registers to reset after any previous activity */
622 timeout = jiffies + HZ / 2; 622 timeout = jiffies + HZ / 2;
623 while (gdrom_is_busy() && time_before(jiffies, timeout)) 623 while (gdrom_is_busy() && time_before(jiffies, timeout))
624 cpu_relax(); 624 cpu_relax();
625 ctrl_outb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG); 625 __raw_writeb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG);
626 timeout = jiffies + HZ / 2; 626 timeout = jiffies + HZ / 2;
627 /* Wait for packet command to finish */ 627 /* Wait for packet command to finish */
628 while (gdrom_is_busy() && time_before(jiffies, timeout)) 628 while (gdrom_is_busy() && time_before(jiffies, timeout))
@@ -632,11 +632,11 @@ static void gdrom_readdisk_dma(struct work_struct *work)
632 outsw(GDROM_DATA_REG, &read_command->cmd, 6); 632 outsw(GDROM_DATA_REG, &read_command->cmd, 6);
633 timeout = jiffies + HZ / 2; 633 timeout = jiffies + HZ / 2;
634 /* Wait for any pending DMA to finish */ 634 /* Wait for any pending DMA to finish */
635 while (ctrl_inb(GDROM_DMA_STATUS_REG) && 635 while (__raw_readb(GDROM_DMA_STATUS_REG) &&
636 time_before(jiffies, timeout)) 636 time_before(jiffies, timeout))
637 cpu_relax(); 637 cpu_relax();
638 /* start transfer */ 638 /* start transfer */
639 ctrl_outb(1, GDROM_DMA_STATUS_REG); 639 __raw_writeb(1, GDROM_DMA_STATUS_REG);
640 wait_event_interruptible_timeout(request_queue, 640 wait_event_interruptible_timeout(request_queue,
641 gd.transfer == 0, GDROM_DEFAULT_TIMEOUT); 641 gd.transfer == 0, GDROM_DEFAULT_TIMEOUT);
642 err = gd.transfer ? -EIO : 0; 642 err = gd.transfer ? -EIO : 0;
@@ -714,11 +714,11 @@ free_id:
714/* set the default mode for DMA transfer */ 714/* set the default mode for DMA transfer */
715static int __devinit gdrom_init_dma_mode(void) 715static int __devinit gdrom_init_dma_mode(void)
716{ 716{
717 ctrl_outb(0x13, GDROM_ERROR_REG); 717 __raw_writeb(0x13, GDROM_ERROR_REG);
718 ctrl_outb(0x22, GDROM_INTSEC_REG); 718 __raw_writeb(0x22, GDROM_INTSEC_REG);
719 if (!gdrom_wait_clrbusy()) 719 if (!gdrom_wait_clrbusy())
720 return -EBUSY; 720 return -EBUSY;
721 ctrl_outb(0xEF, GDROM_STATUSCOMMAND_REG); 721 __raw_writeb(0xEF, GDROM_STATUSCOMMAND_REG);
722 if (!gdrom_wait_busy_sleeps()) 722 if (!gdrom_wait_busy_sleeps())
723 return -EBUSY; 723 return -EBUSY;
724 /* Memory protection setting for GDROM DMA 724 /* Memory protection setting for GDROM DMA
@@ -728,8 +728,8 @@ static int __devinit gdrom_init_dma_mode(void)
728 * Bits 6 - 0 end of transfer range in 1 MB blocks OR'ed with 0x80 728 * Bits 6 - 0 end of transfer range in 1 MB blocks OR'ed with 0x80
729 * (0x40 | 0x80) = start range at 0x0C000000 729 * (0x40 | 0x80) = start range at 0x0C000000
730 * (0x7F | 0x80) = end range at 0x0FFFFFFF */ 730 * (0x7F | 0x80) = end range at 0x0FFFFFFF */
731 ctrl_outl(0x8843407F, GDROM_DMA_ACCESS_CTRL_REG); 731 __raw_writel(0x8843407F, GDROM_DMA_ACCESS_CTRL_REG);
732 ctrl_outl(9, GDROM_DMA_WAIT_REG); /* DMA word setting */ 732 __raw_writel(9, GDROM_DMA_WAIT_REG); /* DMA word setting */
733 return 0; 733 return 0;
734} 734}
735 735