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authorMauro Carvalho Chehab <mchehab@redhat.com>2011-07-20 20:01:48 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-01-04 19:16:23 -0500
commitcfde89258a4bf2d9767113d97eed72317b610511 (patch)
tree152e4a0503f9fcfe8426f552fbf803071587075d /drivers
parentb675668aaf33eeb0e8cbf4e9ce75f99cbf695977 (diff)
[media] mt2063: Use standard Linux types, instead of redefining them
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/media/common/tuners/mt2063.c666
-rw-r--r--drivers/media/common/tuners/mt2063.h158
2 files changed, 406 insertions, 418 deletions
diff --git a/drivers/media/common/tuners/mt2063.c b/drivers/media/common/tuners/mt2063.c
index cd3b206adf1a..c8f0bfae95af 100644
--- a/drivers/media/common/tuners/mt2063.c
+++ b/drivers/media/common/tuners/mt2063.c
@@ -16,8 +16,8 @@ module_param(verbose, int, 0644);
16/*****************/ 16/*****************/
17/* From drivers/media/common/tuners/mt2063_cfg.h */ 17/* From drivers/media/common/tuners/mt2063_cfg.h */
18 18
19static unsigned int mt2063_setTune(struct dvb_frontend *fe, UData_t f_in, 19static unsigned int mt2063_setTune(struct dvb_frontend *fe, u32 f_in,
20 UData_t bw_in, 20 u32 bw_in,
21 enum MTTune_atv_standard tv_type) 21 enum MTTune_atv_standard tv_type)
22{ 22{
23 //return (int)MT_Tune_atv(h, f_in, bw_in, tv_type); 23 //return (int)MT_Tune_atv(h, f_in, bw_in, tv_type);
@@ -233,11 +233,11 @@ static int mt2063_read_regs(struct mt2063_state *state, u8 reg1, u8 * b, u8 len)
233** N/A 03-25-2004 DAD Original 233** N/A 03-25-2004 DAD Original
234** 234**
235*****************************************************************************/ 235*****************************************************************************/
236UData_t MT2063_WriteSub(Handle_t hUserData, 236u32 MT2063_WriteSub(void *hUserData,
237 UData_t addr, 237 u32 addr,
238 U8Data subAddress, U8Data * pData, UData_t cnt) 238 u8 subAddress, u8 * pData, u32 cnt)
239{ 239{
240 UData_t status = MT2063_OK; /* Status to be returned */ 240 u32 status = MT2063_OK; /* Status to be returned */
241 struct dvb_frontend *fe = hUserData; 241 struct dvb_frontend *fe = hUserData;
242 struct mt2063_state *state = fe->tuner_priv; 242 struct mt2063_state *state = fe->tuner_priv;
243 /* 243 /*
@@ -300,9 +300,9 @@ UData_t MT2063_WriteSub(Handle_t hUserData,
300** N/A 03-25-2004 DAD Original 300** N/A 03-25-2004 DAD Original
301** 301**
302*****************************************************************************/ 302*****************************************************************************/
303UData_t MT2063_ReadSub(Handle_t hUserData, 303u32 MT2063_ReadSub(void *hUserData,
304 UData_t addr, 304 u32 addr,
305 U8Data subAddress, U8Data * pData, UData_t cnt) 305 u8 subAddress, u8 * pData, u32 cnt)
306{ 306{
307 /* 307 /*
308 ** ToDo: Add code here to implement a serial-bus read 308 ** ToDo: Add code here to implement a serial-bus read
@@ -310,10 +310,10 @@ UData_t MT2063_ReadSub(Handle_t hUserData,
310 ** return MT_OK. 310 ** return MT_OK.
311 */ 311 */
312/* return status; */ 312/* return status; */
313 UData_t status = MT2063_OK; /* Status to be returned */ 313 u32 status = MT2063_OK; /* Status to be returned */
314 struct dvb_frontend *fe = hUserData; 314 struct dvb_frontend *fe = hUserData;
315 struct mt2063_state *state = fe->tuner_priv; 315 struct mt2063_state *state = fe->tuner_priv;
316 UData_t i = 0; 316 u32 i = 0;
317//#if !TUNER_CONTROL_BY_DRXK_DRIVER 317//#if !TUNER_CONTROL_BY_DRXK_DRIVER
318 fe->ops.i2c_gate_ctrl(fe, 1); //I2C bypass drxk3926 close i2c bridge 318 fe->ops.i2c_gate_ctrl(fe, 1); //I2C bypass drxk3926 close i2c bridge
319//#endif 319//#endif
@@ -355,7 +355,7 @@ UData_t MT2063_ReadSub(Handle_t hUserData,
355** N/A 03-25-2004 DAD Original 355** N/A 03-25-2004 DAD Original
356** 356**
357*****************************************************************************/ 357*****************************************************************************/
358void MT2063_Sleep(Handle_t hUserData, UData_t nMinDelayTime) 358void MT2063_Sleep(void *hUserData, u32 nMinDelayTime)
359{ 359{
360 /* 360 /*
361 ** ToDo: Add code here to implement a OS blocking 361 ** ToDo: Add code here to implement a OS blocking
@@ -396,9 +396,9 @@ void MT2063_Sleep(Handle_t hUserData, UData_t nMinDelayTime)
396** better describes what this function does. 396** better describes what this function does.
397** 397**
398*****************************************************************************/ 398*****************************************************************************/
399UData_t MT2060_TunerGain(Handle_t hUserData, SData_t * pMeas) 399u32 MT2060_TunerGain(void *hUserData, s32 * pMeas)
400{ 400{
401 UData_t status = MT2063_OK; /* Status to be returned */ 401 u32 status = MT2063_OK; /* Status to be returned */
402 402
403 /* 403 /*
404 ** ToDo: Add code here to return the gain / power level measured 404 ** ToDo: Add code here to return the gain / power level measured
@@ -476,22 +476,22 @@ UData_t MT2060_TunerGain(Handle_t hUserData, SData_t * pMeas)
476#define ufloor(n, d) ((n)/(d)) 476#define ufloor(n, d) ((n)/(d))
477 477
478struct MT2063_FIFZone_t { 478struct MT2063_FIFZone_t {
479 SData_t min_; 479 s32 min_;
480 SData_t max_; 480 s32 max_;
481}; 481};
482 482
483#if MT2063_TUNER_CNT > 1 483#if MT2063_TUNER_CNT > 1
484static struct MT2063_AvoidSpursData_t *TunerList[MT2063_TUNER_CNT]; 484static struct MT2063_AvoidSpursData_t *TunerList[MT2063_TUNER_CNT];
485static UData_t TunerCount = 0; 485static u32 TunerCount = 0;
486#endif 486#endif
487 487
488UData_t MT2063_RegisterTuner(struct MT2063_AvoidSpursData_t *pAS_Info) 488u32 MT2063_RegisterTuner(struct MT2063_AvoidSpursData_t *pAS_Info)
489{ 489{
490#if MT2063_TUNER_CNT == 1 490#if MT2063_TUNER_CNT == 1
491 pAS_Info->nAS_Algorithm = 1; 491 pAS_Info->nAS_Algorithm = 1;
492 return MT2063_OK; 492 return MT2063_OK;
493#else 493#else
494 UData_t index; 494 u32 index;
495 495
496 pAS_Info->nAS_Algorithm = 2; 496 pAS_Info->nAS_Algorithm = 2;
497 497
@@ -522,7 +522,7 @@ void MT2063_UnRegisterTuner(struct MT2063_AvoidSpursData_t *pAS_Info)
522 pAS_Info; 522 pAS_Info;
523#else 523#else
524 524
525 UData_t index; 525 u32 index;
526 526
527 for (index = 0; index < TunerCount; index++) { 527 for (index = 0; index < TunerCount; index++) {
528 if (TunerList[index] == pAS_Info) { 528 if (TunerList[index] == pAS_Info) {
@@ -541,9 +541,9 @@ void MT2063_UnRegisterTuner(struct MT2063_AvoidSpursData_t *pAS_Info)
541*/ 541*/
542void MT2063_ResetExclZones(struct MT2063_AvoidSpursData_t *pAS_Info) 542void MT2063_ResetExclZones(struct MT2063_AvoidSpursData_t *pAS_Info)
543{ 543{
544 UData_t center; 544 u32 center;
545#if MT2063_TUNER_CNT > 1 545#if MT2063_TUNER_CNT > 1
546 UData_t index; 546 u32 index;
547 struct MT2063_AvoidSpursData_t *adj; 547 struct MT2063_AvoidSpursData_t *adj;
548#endif 548#endif
549 549
@@ -706,7 +706,7 @@ static struct MT2063_ExclZone_t *RemoveNode(struct MT2063_AvoidSpursData_t
706** 706**
707*****************************************************************************/ 707*****************************************************************************/
708void MT2063_AddExclZone(struct MT2063_AvoidSpursData_t *pAS_Info, 708void MT2063_AddExclZone(struct MT2063_AvoidSpursData_t *pAS_Info,
709 UData_t f_min, UData_t f_max) 709 u32 f_min, u32 f_max)
710{ 710{
711 struct MT2063_ExclZone_t *pNode = pAS_Info->usedZones; 711 struct MT2063_ExclZone_t *pNode = pAS_Info->usedZones;
712 struct MT2063_ExclZone_t *pPrev = NULL; 712 struct MT2063_ExclZone_t *pPrev = NULL;
@@ -771,7 +771,7 @@ void MT2063_AddExclZone(struct MT2063_AvoidSpursData_t *pAS_Info,
771** Added logic to force f_Center within 1/2 f_Step. 771** Added logic to force f_Center within 1/2 f_Step.
772** 772**
773*****************************************************************************/ 773*****************************************************************************/
774UData_t MT2063_ChooseFirstIF(struct MT2063_AvoidSpursData_t *pAS_Info) 774u32 MT2063_ChooseFirstIF(struct MT2063_AvoidSpursData_t *pAS_Info)
775{ 775{
776 /* 776 /*
777 ** Update "f_Desired" to be the nearest "combinational-multiple" of "f_LO1_Step". 777 ** Update "f_Desired" to be the nearest "combinational-multiple" of "f_LO1_Step".
@@ -779,23 +779,23 @@ UData_t MT2063_ChooseFirstIF(struct MT2063_AvoidSpursData_t *pAS_Info)
779 ** of f_in + f_Center. Neither f_in, nor f_Center must be a multiple of f_LO1_Step. 779 ** of f_in + f_Center. Neither f_in, nor f_Center must be a multiple of f_LO1_Step.
780 ** However, the sum must be. 780 ** However, the sum must be.
781 */ 781 */
782 const UData_t f_Desired = 782 const u32 f_Desired =
783 pAS_Info->f_LO1_Step * 783 pAS_Info->f_LO1_Step *
784 ((pAS_Info->f_if1_Request + pAS_Info->f_in + 784 ((pAS_Info->f_if1_Request + pAS_Info->f_in +
785 pAS_Info->f_LO1_Step / 2) / pAS_Info->f_LO1_Step) - 785 pAS_Info->f_LO1_Step / 2) / pAS_Info->f_LO1_Step) -
786 pAS_Info->f_in; 786 pAS_Info->f_in;
787 const UData_t f_Step = 787 const u32 f_Step =
788 (pAS_Info->f_LO1_Step > 788 (pAS_Info->f_LO1_Step >
789 pAS_Info->f_LO2_Step) ? pAS_Info->f_LO1_Step : pAS_Info-> 789 pAS_Info->f_LO2_Step) ? pAS_Info->f_LO1_Step : pAS_Info->
790 f_LO2_Step; 790 f_LO2_Step;
791 UData_t f_Center; 791 u32 f_Center;
792 792
793 SData_t i; 793 s32 i;
794 SData_t j = 0; 794 s32 j = 0;
795 UData_t bDesiredExcluded = 0; 795 u32 bDesiredExcluded = 0;
796 UData_t bZeroExcluded = 0; 796 u32 bZeroExcluded = 0;
797 SData_t tmpMin, tmpMax; 797 s32 tmpMin, tmpMax;
798 SData_t bestDiff; 798 s32 bestDiff;
799 struct MT2063_ExclZone_t *pNode = pAS_Info->usedZones; 799 struct MT2063_ExclZone_t *pNode = pAS_Info->usedZones;
800 struct MT2063_FIFZone_t zones[MT2063_MAX_ZONES]; 800 struct MT2063_FIFZone_t zones[MT2063_MAX_ZONES];
801 801
@@ -817,18 +817,18 @@ UData_t MT2063_ChooseFirstIF(struct MT2063_AvoidSpursData_t *pAS_Info)
817 f_Step / 2) / f_Step); 817 f_Step / 2) / f_Step);
818 818
819 //assert; 819 //assert;
820 //if (!abs((SData_t) f_Center - (SData_t) pAS_Info->f_if1_Center) <= (SData_t) (f_Step/2)) 820 //if (!abs((s32) f_Center - (s32) pAS_Info->f_if1_Center) <= (s32) (f_Step/2))
821 // return 0; 821 // return 0;
822 822
823 /* Take MT_ExclZones, center around f_Center and change the resolution to f_Step */ 823 /* Take MT_ExclZones, center around f_Center and change the resolution to f_Step */
824 while (pNode != NULL) { 824 while (pNode != NULL) {
825 /* floor function */ 825 /* floor function */
826 tmpMin = 826 tmpMin =
827 floor((SData_t) (pNode->min_ - f_Center), (SData_t) f_Step); 827 floor((s32) (pNode->min_ - f_Center), (s32) f_Step);
828 828
829 /* ceil function */ 829 /* ceil function */
830 tmpMax = 830 tmpMax =
831 ceil((SData_t) (pNode->max_ - f_Center), (SData_t) f_Step); 831 ceil((s32) (pNode->max_ - f_Center), (s32) f_Step);
832 832
833 if ((pNode->min_ < f_Desired) && (pNode->max_ > f_Desired)) 833 if ((pNode->min_ < f_Desired) && (pNode->max_ > f_Desired))
834 bDesiredExcluded = 1; 834 bDesiredExcluded = 1;
@@ -874,7 +874,7 @@ UData_t MT2063_ChooseFirstIF(struct MT2063_AvoidSpursData_t *pAS_Info)
874 } 874 }
875 875
876 if (bestDiff < 0) 876 if (bestDiff < 0)
877 return f_Center - ((UData_t) (-bestDiff) * f_Step); 877 return f_Center - ((u32) (-bestDiff) * f_Step);
878 878
879 return f_Center + (bestDiff * f_Step); 879 return f_Center + (bestDiff * f_Step);
880} 880}
@@ -903,9 +903,9 @@ UData_t MT2063_ChooseFirstIF(struct MT2063_AvoidSpursData_t *pAS_Info)
903** unsigned numbers. 903** unsigned numbers.
904** 904**
905****************************************************************************/ 905****************************************************************************/
906static UData_t MT2063_gcd(UData_t u, UData_t v) 906static u32 MT2063_gcd(u32 u, u32 v)
907{ 907{
908 UData_t r; 908 u32 r;
909 909
910 while (v != 0) { 910 while (v != 0) {
911 r = u % v; 911 r = u % v;
@@ -939,13 +939,13 @@ static UData_t MT2063_gcd(UData_t u, UData_t v)
939** N/A 06-02-2004 JWS Original 939** N/A 06-02-2004 JWS Original
940** 940**
941****************************************************************************/ 941****************************************************************************/
942static UData_t MT2063_umax(UData_t a, UData_t b) 942static u32 MT2063_umax(u32 a, u32 b)
943{ 943{
944 return (a >= b) ? a : b; 944 return (a >= b) ? a : b;
945} 945}
946 946
947#if MT2063_TUNER_CNT > 1 947#if MT2063_TUNER_CNT > 1
948static SData_t RoundAwayFromZero(SData_t n, SData_t d) 948static s32 RoundAwayFromZero(s32 n, s32 d)
949{ 949{
950 return (n < 0) ? floor(n, d) : ceil(n, d); 950 return (n < 0) ? floor(n, d) : ceil(n, d);
951} 951}
@@ -1003,23 +1003,23 @@ static SData_t RoundAwayFromZero(SData_t n, SData_t d)
1003** Type casts added to preserve correct sign. 1003** Type casts added to preserve correct sign.
1004** 1004**
1005****************************************************************************/ 1005****************************************************************************/
1006static UData_t IsSpurInAdjTunerBand(UData_t bIsMyOutput, 1006static u32 IsSpurInAdjTunerBand(u32 bIsMyOutput,
1007 UData_t f1, 1007 u32 f1,
1008 UData_t f2, 1008 u32 f2,
1009 UData_t fOffset, 1009 u32 fOffset,
1010 UData_t fIFOut, 1010 u32 fIFOut,
1011 UData_t fIFBW, 1011 u32 fIFBW,
1012 UData_t fZIFBW, 1012 u32 fZIFBW,
1013 UData_t nMaxH, UData_t * fp, UData_t * fm) 1013 u32 nMaxH, u32 * fp, u32 * fm)
1014{ 1014{
1015 UData_t bSpurFound = 0; 1015 u32 bSpurFound = 0;
1016 1016
1017 const UData_t fHalf_IFBW = fIFBW / 2; 1017 const u32 fHalf_IFBW = fIFBW / 2;
1018 const UData_t fHalf_ZIFBW = fZIFBW / 2; 1018 const u32 fHalf_ZIFBW = fZIFBW / 2;
1019 1019
1020 /* Calculate a scale factor for all frequencies, so that our 1020 /* Calculate a scale factor for all frequencies, so that our
1021 calculations all stay within 31 bits */ 1021 calculations all stay within 31 bits */
1022 const UData_t f_Scale = 1022 const u32 f_Scale =
1023 ((f1 + 1023 ((f1 +
1024 (fOffset + fIFOut + 1024 (fOffset + fIFOut +
1025 fHalf_IFBW) / nMaxH) / (MAX_UDATA / 2 / nMaxH)) + 1; 1025 fHalf_IFBW) / nMaxH) / (MAX_UDATA / 2 / nMaxH)) + 1;
@@ -1028,19 +1028,19 @@ static UData_t IsSpurInAdjTunerBand(UData_t bIsMyOutput,
1028 ** After this scaling, _f1, _f2, and _f3 are guaranteed to fit into 1028 ** After this scaling, _f1, _f2, and _f3 are guaranteed to fit into
1029 ** signed data types (smaller than MAX_UDATA/2) 1029 ** signed data types (smaller than MAX_UDATA/2)
1030 */ 1030 */
1031 const SData_t _f1 = (SData_t) (f1 / f_Scale); 1031 const s32 _f1 = (s32) (f1 / f_Scale);
1032 const SData_t _f2 = (SData_t) (f2 / f_Scale); 1032 const s32 _f2 = (s32) (f2 / f_Scale);
1033 const SData_t _f3 = (SData_t) (fOffset / f_Scale); 1033 const s32 _f3 = (s32) (fOffset / f_Scale);
1034 1034
1035 const SData_t c = (SData_t) (fIFOut - fHalf_IFBW) / (SData_t) f_Scale; 1035 const s32 c = (s32) (fIFOut - fHalf_IFBW) / (s32) f_Scale;
1036 const SData_t d = (SData_t) ((fIFOut + fHalf_IFBW) / f_Scale); 1036 const s32 d = (s32) ((fIFOut + fHalf_IFBW) / f_Scale);
1037 const SData_t f = (SData_t) (fHalf_ZIFBW / f_Scale); 1037 const s32 f = (s32) (fHalf_ZIFBW / f_Scale);
1038 1038
1039 SData_t ma, mb, mc, md, me, mf; 1039 s32 ma, mb, mc, md, me, mf;
1040 1040
1041 SData_t fp_ = 0; 1041 s32 fp_ = 0;
1042 SData_t fm_ = 0; 1042 s32 fm_ = 0;
1043 SData_t n; 1043 s32 n;
1044 1044
1045 /* 1045 /*
1046 ** If the other tuner does not have an LO frequency defined, 1046 ** If the other tuner does not have an LO frequency defined,
@@ -1050,36 +1050,36 @@ static UData_t IsSpurInAdjTunerBand(UData_t bIsMyOutput,
1050 return 0; 1050 return 0;
1051 1051
1052 /* Check out all multiples of f1 from -nMaxH to +nMaxH */ 1052 /* Check out all multiples of f1 from -nMaxH to +nMaxH */
1053 for (n = -(SData_t) nMaxH; n <= (SData_t) nMaxH; ++n) { 1053 for (n = -(s32) nMaxH; n <= (s32) nMaxH; ++n) {
1054 const SData_t nf1 = n * _f1; 1054 const s32 nf1 = n * _f1;
1055 md = (_f3 + d - nf1) / _f2; 1055 md = (_f3 + d - nf1) / _f2;
1056 1056
1057 /* If # f2 harmonics > nMaxH, then no spurs present */ 1057 /* If # f2 harmonics > nMaxH, then no spurs present */
1058 if (md <= -(SData_t) nMaxH) 1058 if (md <= -(s32) nMaxH)
1059 break; 1059 break;
1060 1060
1061 ma = (_f3 - d - nf1) / _f2; 1061 ma = (_f3 - d - nf1) / _f2;
1062 if ((ma == md) || (ma >= (SData_t) (nMaxH))) 1062 if ((ma == md) || (ma >= (s32) (nMaxH)))
1063 continue; 1063 continue;
1064 1064
1065 mc = (_f3 + c - nf1) / _f2; 1065 mc = (_f3 + c - nf1) / _f2;
1066 if (mc != md) { 1066 if (mc != md) {
1067 const SData_t m = (n < 0) ? md : mc; 1067 const s32 m = (n < 0) ? md : mc;
1068 const SData_t fspur = (nf1 + m * _f2 - _f3); 1068 const s32 fspur = (nf1 + m * _f2 - _f3);
1069 const SData_t den = (bIsMyOutput ? n - 1 : n); 1069 const s32 den = (bIsMyOutput ? n - 1 : n);
1070 if (den == 0) { 1070 if (den == 0) {
1071 fp_ = (d - fspur) * f_Scale; 1071 fp_ = (d - fspur) * f_Scale;
1072 fm_ = (fspur - c) * f_Scale; 1072 fm_ = (fspur - c) * f_Scale;
1073 } else { 1073 } else {
1074 fp_ = 1074 fp_ =
1075 (SData_t) RoundAwayFromZero((d - fspur) * 1075 (s32) RoundAwayFromZero((d - fspur) *
1076 f_Scale, den); 1076 f_Scale, den);
1077 fm_ = 1077 fm_ =
1078 (SData_t) RoundAwayFromZero((fspur - c) * 1078 (s32) RoundAwayFromZero((fspur - c) *
1079 f_Scale, den); 1079 f_Scale, den);
1080 } 1080 }
1081 if (((UData_t) abs(fm_) >= f_Scale) 1081 if (((u32) abs(fm_) >= f_Scale)
1082 && ((UData_t) abs(fp_) >= f_Scale)) { 1082 && ((u32) abs(fp_) >= f_Scale)) {
1083 bSpurFound = 1; 1083 bSpurFound = 1;
1084 break; 1084 break;
1085 } 1085 }
@@ -1089,22 +1089,22 @@ static UData_t IsSpurInAdjTunerBand(UData_t bIsMyOutput,
1089 mf = (_f3 + f - nf1) / _f2; 1089 mf = (_f3 + f - nf1) / _f2;
1090 me = (_f3 - f - nf1) / _f2; 1090 me = (_f3 - f - nf1) / _f2;
1091 if (me != mf) { 1091 if (me != mf) {
1092 const SData_t m = (n < 0) ? mf : me; 1092 const s32 m = (n < 0) ? mf : me;
1093 const SData_t fspur = (nf1 + m * _f2 - _f3); 1093 const s32 fspur = (nf1 + m * _f2 - _f3);
1094 const SData_t den = (bIsMyOutput ? n - 1 : n); 1094 const s32 den = (bIsMyOutput ? n - 1 : n);
1095 if (den == 0) { 1095 if (den == 0) {
1096 fp_ = (d - fspur) * f_Scale; 1096 fp_ = (d - fspur) * f_Scale;
1097 fm_ = (fspur - c) * f_Scale; 1097 fm_ = (fspur - c) * f_Scale;
1098 } else { 1098 } else {
1099 fp_ = 1099 fp_ =
1100 (SData_t) RoundAwayFromZero((f - fspur) * 1100 (s32) RoundAwayFromZero((f - fspur) *
1101 f_Scale, den); 1101 f_Scale, den);
1102 fm_ = 1102 fm_ =
1103 (SData_t) RoundAwayFromZero((fspur + f) * 1103 (s32) RoundAwayFromZero((fspur + f) *
1104 f_Scale, den); 1104 f_Scale, den);
1105 } 1105 }
1106 if (((UData_t) abs(fm_) >= f_Scale) 1106 if (((u32) abs(fm_) >= f_Scale)
1107 && ((UData_t) abs(fp_) >= f_Scale)) { 1107 && ((u32) abs(fp_) >= f_Scale)) {
1108 bSpurFound = 1; 1108 bSpurFound = 1;
1109 break; 1109 break;
1110 } 1110 }
@@ -1112,22 +1112,22 @@ static UData_t IsSpurInAdjTunerBand(UData_t bIsMyOutput,
1112 1112
1113 mb = (_f3 - c - nf1) / _f2; 1113 mb = (_f3 - c - nf1) / _f2;
1114 if (ma != mb) { 1114 if (ma != mb) {
1115 const SData_t m = (n < 0) ? mb : ma; 1115 const s32 m = (n < 0) ? mb : ma;
1116 const SData_t fspur = (nf1 + m * _f2 - _f3); 1116 const s32 fspur = (nf1 + m * _f2 - _f3);
1117 const SData_t den = (bIsMyOutput ? n - 1 : n); 1117 const s32 den = (bIsMyOutput ? n - 1 : n);
1118 if (den == 0) { 1118 if (den == 0) {
1119 fp_ = (d - fspur) * f_Scale; 1119 fp_ = (d - fspur) * f_Scale;
1120 fm_ = (fspur - c) * f_Scale; 1120 fm_ = (fspur - c) * f_Scale;
1121 } else { 1121 } else {
1122 fp_ = 1122 fp_ =
1123 (SData_t) RoundAwayFromZero((-c - fspur) * 1123 (s32) RoundAwayFromZero((-c - fspur) *
1124 f_Scale, den); 1124 f_Scale, den);
1125 fm_ = 1125 fm_ =
1126 (SData_t) RoundAwayFromZero((fspur + d) * 1126 (s32) RoundAwayFromZero((fspur + d) *
1127 f_Scale, den); 1127 f_Scale, den);
1128 } 1128 }
1129 if (((UData_t) abs(fm_) >= f_Scale) 1129 if (((u32) abs(fm_) >= f_Scale)
1130 && ((UData_t) abs(fp_) >= f_Scale)) { 1130 && ((u32) abs(fp_) >= f_Scale)) {
1131 bSpurFound = 1; 1131 bSpurFound = 1;
1132 break; 1132 break;
1133 } 1133 }
@@ -1186,25 +1186,25 @@ static UData_t IsSpurInAdjTunerBand(UData_t bIsMyOutput,
1186** N/A 11-28-2002 DAD Implemented algorithm from applied patent 1186** N/A 11-28-2002 DAD Implemented algorithm from applied patent
1187** 1187**
1188****************************************************************************/ 1188****************************************************************************/
1189static UData_t IsSpurInBand(struct MT2063_AvoidSpursData_t *pAS_Info, 1189static u32 IsSpurInBand(struct MT2063_AvoidSpursData_t *pAS_Info,
1190 UData_t * fm, UData_t * fp) 1190 u32 * fm, u32 * fp)
1191{ 1191{
1192 /* 1192 /*
1193 ** Calculate LO frequency settings. 1193 ** Calculate LO frequency settings.
1194 */ 1194 */
1195 UData_t n, n0; 1195 u32 n, n0;
1196 const UData_t f_LO1 = pAS_Info->f_LO1; 1196 const u32 f_LO1 = pAS_Info->f_LO1;
1197 const UData_t f_LO2 = pAS_Info->f_LO2; 1197 const u32 f_LO2 = pAS_Info->f_LO2;
1198 const UData_t d = pAS_Info->f_out + pAS_Info->f_out_bw / 2; 1198 const u32 d = pAS_Info->f_out + pAS_Info->f_out_bw / 2;
1199 const UData_t c = d - pAS_Info->f_out_bw; 1199 const u32 c = d - pAS_Info->f_out_bw;
1200 const UData_t f = pAS_Info->f_zif_bw / 2; 1200 const u32 f = pAS_Info->f_zif_bw / 2;
1201 const UData_t f_Scale = (f_LO1 / (MAX_UDATA / 2 / pAS_Info->maxH1)) + 1; 1201 const u32 f_Scale = (f_LO1 / (MAX_UDATA / 2 / pAS_Info->maxH1)) + 1;
1202 SData_t f_nsLO1, f_nsLO2; 1202 s32 f_nsLO1, f_nsLO2;
1203 SData_t f_Spur; 1203 s32 f_Spur;
1204 UData_t ma, mb, mc, md, me, mf; 1204 u32 ma, mb, mc, md, me, mf;
1205 UData_t lo_gcd, gd_Scale, gc_Scale, gf_Scale, hgds, hgfs, hgcs; 1205 u32 lo_gcd, gd_Scale, gc_Scale, gf_Scale, hgds, hgfs, hgcs;
1206#if MT2063_TUNER_CNT > 1 1206#if MT2063_TUNER_CNT > 1
1207 UData_t index; 1207 u32 index;
1208 1208
1209 struct MT2063_AvoidSpursData_t *adj; 1209 struct MT2063_AvoidSpursData_t *adj;
1210#endif 1210#endif
@@ -1216,11 +1216,11 @@ static UData_t IsSpurInBand(struct MT2063_AvoidSpursData_t *pAS_Info,
1216 ** gcd-based scale factor or f_Scale. 1216 ** gcd-based scale factor or f_Scale.
1217 */ 1217 */
1218 lo_gcd = MT2063_gcd(f_LO1, f_LO2); 1218 lo_gcd = MT2063_gcd(f_LO1, f_LO2);
1219 gd_Scale = MT2063_umax((UData_t) MT2063_gcd(lo_gcd, d), f_Scale); 1219 gd_Scale = MT2063_umax((u32) MT2063_gcd(lo_gcd, d), f_Scale);
1220 hgds = gd_Scale / 2; 1220 hgds = gd_Scale / 2;
1221 gc_Scale = MT2063_umax((UData_t) MT2063_gcd(lo_gcd, c), f_Scale); 1221 gc_Scale = MT2063_umax((u32) MT2063_gcd(lo_gcd, c), f_Scale);
1222 hgcs = gc_Scale / 2; 1222 hgcs = gc_Scale / 2;
1223 gf_Scale = MT2063_umax((UData_t) MT2063_gcd(lo_gcd, f), f_Scale); 1223 gf_Scale = MT2063_umax((u32) MT2063_gcd(lo_gcd, f), f_Scale);
1224 hgfs = gf_Scale / 2; 1224 hgfs = gf_Scale / 2;
1225 1225
1226 n0 = uceil(f_LO2 - d, f_LO1 - f_LO2); 1226 n0 = uceil(f_LO2 - d, f_LO1 - f_LO2);
@@ -1244,14 +1244,14 @@ static UData_t IsSpurInBand(struct MT2063_AvoidSpursData_t *pAS_Info,
1244 mc = (n * ((f_LO1 + hgcs) / gc_Scale) - 1244 mc = (n * ((f_LO1 + hgcs) / gc_Scale) -
1245 ((c + hgcs) / gc_Scale)) / ((f_LO2 + hgcs) / gc_Scale); 1245 ((c + hgcs) / gc_Scale)) / ((f_LO2 + hgcs) / gc_Scale);
1246 if (mc != md) { 1246 if (mc != md) {
1247 f_nsLO1 = (SData_t) (n * (f_LO1 / gc_Scale)); 1247 f_nsLO1 = (s32) (n * (f_LO1 / gc_Scale));
1248 f_nsLO2 = (SData_t) (mc * (f_LO2 / gc_Scale)); 1248 f_nsLO2 = (s32) (mc * (f_LO2 / gc_Scale));
1249 f_Spur = 1249 f_Spur =
1250 (gc_Scale * (f_nsLO1 - f_nsLO2)) + 1250 (gc_Scale * (f_nsLO1 - f_nsLO2)) +
1251 n * (f_LO1 % gc_Scale) - mc * (f_LO2 % gc_Scale); 1251 n * (f_LO1 % gc_Scale) - mc * (f_LO2 % gc_Scale);
1252 1252
1253 *fp = ((f_Spur - (SData_t) c) / (mc - n)) + 1; 1253 *fp = ((f_Spur - (s32) c) / (mc - n)) + 1;
1254 *fm = (((SData_t) d - f_Spur) / (mc - n)) + 1; 1254 *fm = (((s32) d - f_Spur) / (mc - n)) + 1;
1255 return 1; 1255 return 1;
1256 } 1256 }
1257 1257
@@ -1267,8 +1267,8 @@ static UData_t IsSpurInBand(struct MT2063_AvoidSpursData_t *pAS_Info,
1267 (gf_Scale * (f_nsLO1 - f_nsLO2)) + 1267 (gf_Scale * (f_nsLO1 - f_nsLO2)) +
1268 n * (f_LO1 % gf_Scale) - me * (f_LO2 % gf_Scale); 1268 n * (f_LO1 % gf_Scale) - me * (f_LO2 % gf_Scale);
1269 1269
1270 *fp = ((f_Spur + (SData_t) f) / (me - n)) + 1; 1270 *fp = ((f_Spur + (s32) f) / (me - n)) + 1;
1271 *fm = (((SData_t) f - f_Spur) / (me - n)) + 1; 1271 *fm = (((s32) f - f_Spur) / (me - n)) + 1;
1272 return 1; 1272 return 1;
1273 } 1273 }
1274 1274
@@ -1281,8 +1281,8 @@ static UData_t IsSpurInBand(struct MT2063_AvoidSpursData_t *pAS_Info,
1281 (gc_Scale * (f_nsLO1 - f_nsLO2)) + 1281 (gc_Scale * (f_nsLO1 - f_nsLO2)) +
1282 n * (f_LO1 % gc_Scale) - ma * (f_LO2 % gc_Scale); 1282 n * (f_LO1 % gc_Scale) - ma * (f_LO2 % gc_Scale);
1283 1283
1284 *fp = (((SData_t) d + f_Spur) / (ma - n)) + 1; 1284 *fp = (((s32) d + f_Spur) / (ma - n)) + 1;
1285 *fm = (-(f_Spur + (SData_t) c) / (ma - n)) + 1; 1285 *fm = (-(f_Spur + (s32) c) / (ma - n)) + 1;
1286 return 1; 1286 return 1;
1287 } 1287 }
1288 } 1288 }
@@ -1338,10 +1338,10 @@ static UData_t IsSpurInBand(struct MT2063_AvoidSpursData_t *pAS_Info,
1338** 096 04-06-2005 DAD Ver 1.11: Fix divide by 0 error if maxH==0. 1338** 096 04-06-2005 DAD Ver 1.11: Fix divide by 0 error if maxH==0.
1339** 1339**
1340*****************************************************************************/ 1340*****************************************************************************/
1341UData_t MT2063_AvoidSpurs(Handle_t h, struct MT2063_AvoidSpursData_t * pAS_Info) 1341u32 MT2063_AvoidSpurs(void *h, struct MT2063_AvoidSpursData_t * pAS_Info)
1342{ 1342{
1343 UData_t status = MT2063_OK; 1343 u32 status = MT2063_OK;
1344 UData_t fm, fp; /* restricted range on LO's */ 1344 u32 fm, fp; /* restricted range on LO's */
1345 pAS_Info->bSpurAvoided = 0; 1345 pAS_Info->bSpurAvoided = 0;
1346 pAS_Info->nSpursFound = 0; 1346 pAS_Info->nSpursFound = 0;
1347 1347
@@ -1361,11 +1361,11 @@ UData_t MT2063_AvoidSpurs(Handle_t h, struct MT2063_AvoidSpursData_t * pAS_Info)
1361 */ 1361 */
1362 pAS_Info->bSpurPresent = IsSpurInBand(pAS_Info, &fm, &fp); 1362 pAS_Info->bSpurPresent = IsSpurInBand(pAS_Info, &fm, &fp);
1363 if (pAS_Info->bSpurPresent) { 1363 if (pAS_Info->bSpurPresent) {
1364 UData_t zfIF1 = pAS_Info->f_LO1 - pAS_Info->f_in; /* current attempt at a 1st IF */ 1364 u32 zfIF1 = pAS_Info->f_LO1 - pAS_Info->f_in; /* current attempt at a 1st IF */
1365 UData_t zfLO1 = pAS_Info->f_LO1; /* current attempt at an LO1 freq */ 1365 u32 zfLO1 = pAS_Info->f_LO1; /* current attempt at an LO1 freq */
1366 UData_t zfLO2 = pAS_Info->f_LO2; /* current attempt at an LO2 freq */ 1366 u32 zfLO2 = pAS_Info->f_LO2; /* current attempt at an LO2 freq */
1367 UData_t delta_IF1; 1367 u32 delta_IF1;
1368 UData_t new_IF1; 1368 u32 new_IF1;
1369 1369
1370 /* 1370 /*
1371 ** Spur was found, attempt to find a spur-free 1st IF 1371 ** Spur was found, attempt to find a spur-free 1st IF
@@ -1422,7 +1422,7 @@ UData_t MT2063_AvoidSpurs(Handle_t h, struct MT2063_AvoidSpursData_t * pAS_Info)
1422 return (status); 1422 return (status);
1423} 1423}
1424 1424
1425UData_t MT2063_AvoidSpursVersion(void) 1425u32 MT2063_AvoidSpursVersion(void)
1426{ 1426{
1427 return (MT2063_SPUR_VERSION); 1427 return (MT2063_SPUR_VERSION);
1428} 1428}
@@ -1489,14 +1489,14 @@ typedef enum {
1489/* 1489/*
1490** The number of Tuner Registers 1490** The number of Tuner Registers
1491*/ 1491*/
1492static const UData_t MT2063_Num_Registers = MT2063_REG_END_REGS; 1492static const u32 MT2063_Num_Registers = MT2063_REG_END_REGS;
1493 1493
1494#define USE_GLOBAL_TUNER 0 1494#define USE_GLOBAL_TUNER 0
1495 1495
1496static UData_t nMT2063MaxTuners = MT2063_CNT; 1496static u32 nMT2063MaxTuners = MT2063_CNT;
1497static struct MT2063_Info_t MT2063_Info[MT2063_CNT]; 1497static struct MT2063_Info_t MT2063_Info[MT2063_CNT];
1498static struct MT2063_Info_t *MT2063_Avail[MT2063_CNT]; 1498static struct MT2063_Info_t *MT2063_Avail[MT2063_CNT];
1499static UData_t nMT2063OpenTuners = 0; 1499static u32 nMT2063OpenTuners = 0;
1500 1500
1501/* 1501/*
1502** Constants for setting receiver modes. 1502** Constants for setting receiver modes.
@@ -1520,32 +1520,32 @@ static UData_t nMT2063OpenTuners = 0;
1520** 1520**
1521** 1521**
1522*/ 1522*/
1523static const U8Data RFAGCEN[] = { 0, 0, 0, 0, 0, 0 }; 1523static const u8 RFAGCEN[] = { 0, 0, 0, 0, 0, 0 };
1524static const U8Data LNARIN[] = { 0, 0, 3, 3, 3, 3 }; 1524static const u8 LNARIN[] = { 0, 0, 3, 3, 3, 3 };
1525static const U8Data FIFFQEN[] = { 1, 1, 1, 1, 1, 1 }; 1525static const u8 FIFFQEN[] = { 1, 1, 1, 1, 1, 1 };
1526static const U8Data FIFFQ[] = { 0, 0, 0, 0, 0, 0 }; 1526static const u8 FIFFQ[] = { 0, 0, 0, 0, 0, 0 };
1527static const U8Data DNC1GC[] = { 0, 0, 0, 0, 0, 0 }; 1527static const u8 DNC1GC[] = { 0, 0, 0, 0, 0, 0 };
1528static const U8Data DNC2GC[] = { 0, 0, 0, 0, 0, 0 }; 1528static const u8 DNC2GC[] = { 0, 0, 0, 0, 0, 0 };
1529static const U8Data ACLNAMAX[] = { 31, 31, 31, 31, 31, 31 }; 1529static const u8 ACLNAMAX[] = { 31, 31, 31, 31, 31, 31 };
1530static const U8Data LNATGT[] = { 44, 43, 43, 43, 43, 43 }; 1530static const u8 LNATGT[] = { 44, 43, 43, 43, 43, 43 };
1531static const U8Data RFOVDIS[] = { 0, 0, 0, 0, 0, 0 }; 1531static const u8 RFOVDIS[] = { 0, 0, 0, 0, 0, 0 };
1532static const U8Data ACRFMAX[] = { 31, 31, 31, 31, 31, 31 }; 1532static const u8 ACRFMAX[] = { 31, 31, 31, 31, 31, 31 };
1533static const U8Data PD1TGT[] = { 36, 36, 38, 38, 36, 38 }; 1533static const u8 PD1TGT[] = { 36, 36, 38, 38, 36, 38 };
1534static const U8Data FIFOVDIS[] = { 0, 0, 0, 0, 0, 0 }; 1534static const u8 FIFOVDIS[] = { 0, 0, 0, 0, 0, 0 };
1535static const U8Data ACFIFMAX[] = { 29, 29, 29, 29, 29, 29 }; 1535static const u8 ACFIFMAX[] = { 29, 29, 29, 29, 29, 29 };
1536static const U8Data PD2TGT[] = { 40, 33, 38, 42, 30, 38 }; 1536static const u8 PD2TGT[] = { 40, 33, 38, 42, 30, 38 };
1537 1537
1538/* 1538/*
1539** Local Function Prototypes - not available for external access. 1539** Local Function Prototypes - not available for external access.
1540*/ 1540*/
1541 1541
1542/* Forward declaration(s): */ 1542/* Forward declaration(s): */
1543static UData_t MT2063_CalcLO1Mult(UData_t * Div, UData_t * FracN, UData_t f_LO, 1543static u32 MT2063_CalcLO1Mult(u32 * Div, u32 * FracN, u32 f_LO,
1544 UData_t f_LO_Step, UData_t f_Ref); 1544 u32 f_LO_Step, u32 f_Ref);
1545static UData_t MT2063_CalcLO2Mult(UData_t * Div, UData_t * FracN, UData_t f_LO, 1545static u32 MT2063_CalcLO2Mult(u32 * Div, u32 * FracN, u32 f_LO,
1546 UData_t f_LO_Step, UData_t f_Ref); 1546 u32 f_LO_Step, u32 f_Ref);
1547static UData_t MT2063_fLO_FractionalTerm(UData_t f_ref, UData_t num, 1547static u32 MT2063_fLO_FractionalTerm(u32 f_ref, u32 num,
1548 UData_t denom); 1548 u32 denom);
1549 1549
1550/****************************************************************************** 1550/******************************************************************************
1551** 1551**
@@ -1576,10 +1576,10 @@ static UData_t MT2063_fLO_FractionalTerm(UData_t f_ref, UData_t num,
1576** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 1576** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
1577** 1577**
1578******************************************************************************/ 1578******************************************************************************/
1579UData_t MT2063_Open(UData_t MT2063_Addr, Handle_t * hMT2063, Handle_t hUserData) 1579u32 MT2063_Open(u32 MT2063_Addr, void ** hMT2063, void *hUserData)
1580{ 1580{
1581 UData_t status = MT2063_OK; /* Status to be returned. */ 1581 u32 status = MT2063_OK; /* Status to be returned. */
1582 SData_t i; 1582 s32 i;
1583 struct MT2063_Info_t *pInfo = NULL; 1583 struct MT2063_Info_t *pInfo = NULL;
1584 struct dvb_frontend *fe = (struct dvb_frontend *)hUserData; 1584 struct dvb_frontend *fe = (struct dvb_frontend *)hUserData;
1585 struct mt2063_state *state = fe->tuner_priv; 1585 struct mt2063_state *state = fe->tuner_priv;
@@ -1636,7 +1636,7 @@ UData_t MT2063_Open(UData_t MT2063_Addr, Handle_t * hMT2063, Handle_t hUserData)
1636 nMT2063OpenTuners++; 1636 nMT2063OpenTuners++;
1637 } 1637 }
1638#else 1638#else
1639 if (state->MT2063_init == FALSE) { 1639 if (state->MT2063_init == false) {
1640 pInfo = kzalloc(sizeof(struct MT2063_Info_t), GFP_KERNEL); 1640 pInfo = kzalloc(sizeof(struct MT2063_Info_t), GFP_KERNEL);
1641 if (pInfo == NULL) { 1641 if (pInfo == NULL) {
1642 return MT2063_TUNER_OPEN_ERR; 1642 return MT2063_TUNER_OPEN_ERR;
@@ -1655,19 +1655,19 @@ UData_t MT2063_Open(UData_t MT2063_Addr, Handle_t * hMT2063, Handle_t hUserData)
1655 } 1655 }
1656 1656
1657 if (MT2063_NO_ERROR(status)) { 1657 if (MT2063_NO_ERROR(status)) {
1658 pInfo->handle = (Handle_t) pInfo; 1658 pInfo->handle = (void *) pInfo;
1659 1659
1660 pInfo->hUserData = hUserData; 1660 pInfo->hUserData = hUserData;
1661 pInfo->address = MT2063_Addr; 1661 pInfo->address = MT2063_Addr;
1662 pInfo->rcvr_mode = MT2063_CABLE_QAM; 1662 pInfo->rcvr_mode = MT2063_CABLE_QAM;
1663 status |= MT2063_ReInit((Handle_t) pInfo); 1663 status |= MT2063_ReInit((void *) pInfo);
1664 } 1664 }
1665 1665
1666 if (MT2063_IS_ERROR(status)) 1666 if (MT2063_IS_ERROR(status))
1667 /* MT2063_Close handles the un-registration of the tuner */ 1667 /* MT2063_Close handles the un-registration of the tuner */
1668 MT2063_Close((Handle_t) pInfo); 1668 MT2063_Close((void *) pInfo);
1669 else { 1669 else {
1670 state->MT2063_init = TRUE; 1670 state->MT2063_init = true;
1671 *hMT2063 = pInfo->handle; 1671 *hMT2063 = pInfo->handle;
1672 1672
1673 } 1673 }
@@ -1675,7 +1675,7 @@ UData_t MT2063_Open(UData_t MT2063_Addr, Handle_t * hMT2063, Handle_t hUserData)
1675 return (status); 1675 return (status);
1676} 1676}
1677 1677
1678static UData_t MT2063_IsValidHandle(struct MT2063_Info_t *handle) 1678static u32 MT2063_IsValidHandle(struct MT2063_Info_t *handle)
1679{ 1679{
1680 return ((handle != NULL) && (handle->handle == handle)) ? 1 : 0; 1680 return ((handle != NULL) && (handle->handle == handle)) ? 1 : 0;
1681} 1681}
@@ -1701,7 +1701,7 @@ static UData_t MT2063_IsValidHandle(struct MT2063_Info_t *handle)
1701** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 1701** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
1702** 1702**
1703******************************************************************************/ 1703******************************************************************************/
1704UData_t MT2063_Close(Handle_t hMT2063) 1704u32 MT2063_Close(void *hMT2063)
1705{ 1705{
1706 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)hMT2063; 1706 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)hMT2063;
1707 1707
@@ -1753,13 +1753,13 @@ UData_t MT2063_Close(Handle_t hMT2063)
1753** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 1753** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
1754** 1754**
1755******************************************************************************/ 1755******************************************************************************/
1756UData_t MT2063_GetGPIO(Handle_t h, enum MT2063_GPIO_ID gpio_id, 1756u32 MT2063_GetGPIO(void *h, enum MT2063_GPIO_ID gpio_id,
1757 enum MT2063_GPIO_Attr attr, UData_t * value) 1757 enum MT2063_GPIO_Attr attr, u32 * value)
1758{ 1758{
1759 UData_t status = MT2063_OK; /* Status to be returned */ 1759 u32 status = MT2063_OK; /* Status to be returned */
1760 U8Data regno; 1760 u8 regno;
1761 SData_t shift; 1761 s32 shift;
1762 static U8Data GPIOreg[3] = 1762 static u8 GPIOreg[3] =
1763 { MT2063_REG_RF_STATUS, MT2063_REG_FIF_OV, MT2063_REG_RF_OV }; 1763 { MT2063_REG_RF_STATUS, MT2063_REG_FIF_OV, MT2063_REG_RF_OV };
1764 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 1764 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
1765 1765
@@ -1807,15 +1807,15 @@ UData_t MT2063_GetGPIO(Handle_t h, enum MT2063_GPIO_ID gpio_id,
1807** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 1807** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
1808** 1808**
1809****************************************************************************/ 1809****************************************************************************/
1810UData_t MT2063_GetLocked(Handle_t h) 1810u32 MT2063_GetLocked(void *h)
1811{ 1811{
1812 const UData_t nMaxWait = 100; /* wait a maximum of 100 msec */ 1812 const u32 nMaxWait = 100; /* wait a maximum of 100 msec */
1813 const UData_t nPollRate = 2; /* poll status bits every 2 ms */ 1813 const u32 nPollRate = 2; /* poll status bits every 2 ms */
1814 const UData_t nMaxLoops = nMaxWait / nPollRate; 1814 const u32 nMaxLoops = nMaxWait / nPollRate;
1815 const U8Data LO1LK = 0x80; 1815 const u8 LO1LK = 0x80;
1816 U8Data LO2LK = 0x08; 1816 u8 LO2LK = 0x08;
1817 UData_t status = MT2063_OK; /* Status to be returned */ 1817 u32 status = MT2063_OK; /* Status to be returned */
1818 UData_t nDelays = 0; 1818 u32 nDelays = 0;
1819 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 1819 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
1820 1820
1821 if (MT2063_IsValidHandle(pInfo) == 0) 1821 if (MT2063_IsValidHandle(pInfo) == 0)
@@ -1942,12 +1942,12 @@ UData_t MT2063_GetLocked(Handle_t h)
1942** 06-24-2008 PINZ Ver 1.18: Add Get/SetParam CTFILT_SW 1942** 06-24-2008 PINZ Ver 1.18: Add Get/SetParam CTFILT_SW
1943** 1943**
1944****************************************************************************/ 1944****************************************************************************/
1945UData_t MT2063_GetParam(Handle_t h, enum MT2063_Param param, UData_t * pValue) 1945u32 MT2063_GetParam(void *h, enum MT2063_Param param, u32 * pValue)
1946{ 1946{
1947 UData_t status = MT2063_OK; /* Status to be returned */ 1947 u32 status = MT2063_OK; /* Status to be returned */
1948 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 1948 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
1949 UData_t Div; 1949 u32 Div;
1950 UData_t Num; 1950 u32 Num;
1951 1951
1952 if (pValue == NULL) 1952 if (pValue == NULL)
1953 status |= MT2063_ARG_NULL; 1953 status |= MT2063_ARG_NULL;
@@ -2139,9 +2139,9 @@ UData_t MT2063_GetParam(Handle_t h, enum MT2063_Param param, UData_t * pValue)
2139 case MT2063_PD1: 2139 case MT2063_PD1:
2140 case MT2063_PD2: 2140 case MT2063_PD2:
2141 { 2141 {
2142 U8Data mask = (param == MT2063_PD1 ? 0x01 : 0x03); /* PD1 vs PD2 */ 2142 u8 mask = (param == MT2063_PD1 ? 0x01 : 0x03); /* PD1 vs PD2 */
2143 U8Data orig = (pInfo->reg[MT2063_REG_BYP_CTRL]); 2143 u8 orig = (pInfo->reg[MT2063_REG_BYP_CTRL]);
2144 U8Data reg = (orig & 0xF1) | mask; /* Only set 3 bits (not 5) */ 2144 u8 reg = (orig & 0xF1) | mask; /* Only set 3 bits (not 5) */
2145 int i; 2145 int i;
2146 2146
2147 *pValue = 0; 2147 *pValue = 0;
@@ -2193,7 +2193,7 @@ UData_t MT2063_GetParam(Handle_t h, enum MT2063_Param param, UData_t * pValue)
2193 /* Get LNA attenuator code */ 2193 /* Get LNA attenuator code */
2194 case MT2063_ACLNA: 2194 case MT2063_ACLNA:
2195 { 2195 {
2196 U8Data val; 2196 u8 val;
2197 status |= 2197 status |=
2198 MT2063_GetReg(pInfo, MT2063_REG_XO_STATUS, 2198 MT2063_GetReg(pInfo, MT2063_REG_XO_STATUS,
2199 &val); 2199 &val);
@@ -2204,7 +2204,7 @@ UData_t MT2063_GetParam(Handle_t h, enum MT2063_Param param, UData_t * pValue)
2204 /* Get RF attenuator code */ 2204 /* Get RF attenuator code */
2205 case MT2063_ACRF: 2205 case MT2063_ACRF:
2206 { 2206 {
2207 U8Data val; 2207 u8 val;
2208 status |= 2208 status |=
2209 MT2063_GetReg(pInfo, MT2063_REG_RF_STATUS, 2209 MT2063_GetReg(pInfo, MT2063_REG_RF_STATUS,
2210 &val); 2210 &val);
@@ -2215,7 +2215,7 @@ UData_t MT2063_GetParam(Handle_t h, enum MT2063_Param param, UData_t * pValue)
2215 /* Get FIF attenuator code */ 2215 /* Get FIF attenuator code */
2216 case MT2063_ACFIF: 2216 case MT2063_ACFIF:
2217 { 2217 {
2218 U8Data val; 2218 u8 val;
2219 status |= 2219 status |=
2220 MT2063_GetReg(pInfo, MT2063_REG_FIF_STATUS, 2220 MT2063_GetReg(pInfo, MT2063_REG_FIF_STATUS,
2221 &val); 2221 &val);
@@ -2226,7 +2226,7 @@ UData_t MT2063_GetParam(Handle_t h, enum MT2063_Param param, UData_t * pValue)
2226 /* Get LNA attenuator limit */ 2226 /* Get LNA attenuator limit */
2227 case MT2063_ACLNA_MAX: 2227 case MT2063_ACLNA_MAX:
2228 { 2228 {
2229 U8Data val; 2229 u8 val;
2230 status |= 2230 status |=
2231 MT2063_GetReg(pInfo, MT2063_REG_LNA_OV, 2231 MT2063_GetReg(pInfo, MT2063_REG_LNA_OV,
2232 &val); 2232 &val);
@@ -2237,7 +2237,7 @@ UData_t MT2063_GetParam(Handle_t h, enum MT2063_Param param, UData_t * pValue)
2237 /* Get RF attenuator limit */ 2237 /* Get RF attenuator limit */
2238 case MT2063_ACRF_MAX: 2238 case MT2063_ACRF_MAX:
2239 { 2239 {
2240 U8Data val; 2240 u8 val;
2241 status |= 2241 status |=
2242 MT2063_GetReg(pInfo, MT2063_REG_RF_OV, 2242 MT2063_GetReg(pInfo, MT2063_REG_RF_OV,
2243 &val); 2243 &val);
@@ -2248,7 +2248,7 @@ UData_t MT2063_GetParam(Handle_t h, enum MT2063_Param param, UData_t * pValue)
2248 /* Get FIF attenuator limit */ 2248 /* Get FIF attenuator limit */
2249 case MT2063_ACFIF_MAX: 2249 case MT2063_ACFIF_MAX:
2250 { 2250 {
2251 U8Data val; 2251 u8 val;
2252 status |= 2252 status |=
2253 MT2063_GetReg(pInfo, MT2063_REG_FIF_OV, 2253 MT2063_GetReg(pInfo, MT2063_REG_FIF_OV,
2254 &val); 2254 &val);
@@ -2262,18 +2262,18 @@ UData_t MT2063_GetParam(Handle_t h, enum MT2063_Param param, UData_t * pValue)
2262 if ((pInfo->reg[MT2063_REG_DNC_GAIN] & 0x03) == 0x03) { /* if DNC1 is off */ 2262 if ((pInfo->reg[MT2063_REG_DNC_GAIN] & 0x03) == 0x03) { /* if DNC1 is off */
2263 if ((pInfo->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03) /* if DNC2 is off */ 2263 if ((pInfo->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03) /* if DNC2 is off */
2264 *pValue = 2264 *pValue =
2265 (UData_t) MT2063_DNC_NONE; 2265 (u32) MT2063_DNC_NONE;
2266 else 2266 else
2267 *pValue = 2267 *pValue =
2268 (UData_t) MT2063_DNC_2; 2268 (u32) MT2063_DNC_2;
2269 } else { /* DNC1 is on */ 2269 } else { /* DNC1 is on */
2270 2270
2271 if ((pInfo->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03) /* if DNC2 is off */ 2271 if ((pInfo->reg[MT2063_REG_VGA_GAIN] & 0x03) == 0x03) /* if DNC2 is off */
2272 *pValue = 2272 *pValue =
2273 (UData_t) MT2063_DNC_1; 2273 (u32) MT2063_DNC_1;
2274 else 2274 else
2275 *pValue = 2275 *pValue =
2276 (UData_t) MT2063_DNC_BOTH; 2276 (u32) MT2063_DNC_BOTH;
2277 } 2277 }
2278 } 2278 }
2279 break; 2279 break;
@@ -2346,9 +2346,9 @@ UData_t MT2063_GetParam(Handle_t h, enum MT2063_Param param, UData_t * pValue)
2346** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 2346** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
2347** 2347**
2348****************************************************************************/ 2348****************************************************************************/
2349UData_t MT2063_GetReg(Handle_t h, U8Data reg, U8Data * val) 2349u32 MT2063_GetReg(void *h, u8 reg, u8 * val)
2350{ 2350{
2351 UData_t status = MT2063_OK; /* Status to be returned */ 2351 u32 status = MT2063_OK; /* Status to be returned */
2352 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 2352 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
2353 2353
2354 /* Verify that the handle passed points to a valid tuner */ 2354 /* Verify that the handle passed points to a valid tuner */
@@ -2418,9 +2418,9 @@ UData_t MT2063_GetReg(Handle_t h, U8Data reg, U8Data * val)
2418** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 2418** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
2419** 2419**
2420******************************************************************************/ 2420******************************************************************************/
2421UData_t MT2063_GetTemp(Handle_t h, enum MT2063_Temperature * value) 2421u32 MT2063_GetTemp(void *h, enum MT2063_Temperature * value)
2422{ 2422{
2423 UData_t status = MT2063_OK; /* Status to be returned */ 2423 u32 status = MT2063_OK; /* Status to be returned */
2424 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 2424 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
2425 2425
2426 if (MT2063_IsValidHandle(pInfo) == 0) 2426 if (MT2063_IsValidHandle(pInfo) == 0)
@@ -2489,9 +2489,9 @@ UData_t MT2063_GetTemp(Handle_t h, enum MT2063_Temperature * value)
2489** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 2489** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
2490** 2490**
2491****************************************************************************/ 2491****************************************************************************/
2492UData_t MT2063_GetUserData(Handle_t h, Handle_t * hUserData) 2492u32 MT2063_GetUserData(void *h, void ** hUserData)
2493{ 2493{
2494 UData_t status = MT2063_OK; /* Status to be returned */ 2494 u32 status = MT2063_OK; /* Status to be returned */
2495 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 2495 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
2496 2496
2497 /* Verify that the handle passed points to a valid tuner */ 2497 /* Verify that the handle passed points to a valid tuner */
@@ -2590,12 +2590,12 @@ UData_t MT2063_GetUserData(Handle_t h, Handle_t * hUserData)
2590** removed GCUAUTO / BYPATNDN/UP 2590** removed GCUAUTO / BYPATNDN/UP
2591** 2591**
2592******************************************************************************/ 2592******************************************************************************/
2593static UData_t MT2063_SetReceiverMode(struct MT2063_Info_t *pInfo, 2593static u32 MT2063_SetReceiverMode(struct MT2063_Info_t *pInfo,
2594 enum MT2063_RCVR_MODES Mode) 2594 enum MT2063_RCVR_MODES Mode)
2595{ 2595{
2596 UData_t status = MT2063_OK; /* Status to be returned */ 2596 u32 status = MT2063_OK; /* Status to be returned */
2597 U8Data val; 2597 u8 val;
2598 UData_t longval; 2598 u32 longval;
2599 2599
2600 if (Mode >= MT2063_NUM_RCVR_MODES) 2600 if (Mode >= MT2063_NUM_RCVR_MODES)
2601 status = MT2063_ARG_RANGE; 2601 status = MT2063_ARG_RANGE;
@@ -2604,7 +2604,7 @@ static UData_t MT2063_SetReceiverMode(struct MT2063_Info_t *pInfo,
2604 if (MT2063_NO_ERROR(status)) { 2604 if (MT2063_NO_ERROR(status)) {
2605 val = 2605 val =
2606 (pInfo-> 2606 (pInfo->
2607 reg[MT2063_REG_PD1_TGT] & (U8Data) ~ 0x40) | (RFAGCEN[Mode] 2607 reg[MT2063_REG_PD1_TGT] & (u8) ~ 0x40) | (RFAGCEN[Mode]
2608 ? 0x40 : 2608 ? 0x40 :
2609 0x00); 2609 0x00);
2610 if (pInfo->reg[MT2063_REG_PD1_TGT] != val) { 2610 if (pInfo->reg[MT2063_REG_PD1_TGT] != val) {
@@ -2621,19 +2621,19 @@ static UData_t MT2063_SetReceiverMode(struct MT2063_Info_t *pInfo,
2621 if (MT2063_NO_ERROR(status)) { 2621 if (MT2063_NO_ERROR(status)) {
2622 val = 2622 val =
2623 (pInfo-> 2623 (pInfo->
2624 reg[MT2063_REG_FIFF_CTRL2] & (U8Data) ~ 0xF0) | 2624 reg[MT2063_REG_FIFF_CTRL2] & (u8) ~ 0xF0) |
2625 (FIFFQEN[Mode] << 7) | (FIFFQ[Mode] << 4); 2625 (FIFFQEN[Mode] << 7) | (FIFFQ[Mode] << 4);
2626 if (pInfo->reg[MT2063_REG_FIFF_CTRL2] != val) { 2626 if (pInfo->reg[MT2063_REG_FIFF_CTRL2] != val) {
2627 status |= 2627 status |=
2628 MT2063_SetReg(pInfo, MT2063_REG_FIFF_CTRL2, val); 2628 MT2063_SetReg(pInfo, MT2063_REG_FIFF_CTRL2, val);
2629 /* trigger FIFF calibration, needed after changing FIFFQ */ 2629 /* trigger FIFF calibration, needed after changing FIFFQ */
2630 val = 2630 val =
2631 (pInfo->reg[MT2063_REG_FIFF_CTRL] | (U8Data) 0x01); 2631 (pInfo->reg[MT2063_REG_FIFF_CTRL] | (u8) 0x01);
2632 status |= 2632 status |=
2633 MT2063_SetReg(pInfo, MT2063_REG_FIFF_CTRL, val); 2633 MT2063_SetReg(pInfo, MT2063_REG_FIFF_CTRL, val);
2634 val = 2634 val =
2635 (pInfo-> 2635 (pInfo->
2636 reg[MT2063_REG_FIFF_CTRL] & (U8Data) ~ 0x01); 2636 reg[MT2063_REG_FIFF_CTRL] & (u8) ~ 0x01);
2637 status |= 2637 status |=
2638 MT2063_SetReg(pInfo, MT2063_REG_FIFF_CTRL, val); 2638 MT2063_SetReg(pInfo, MT2063_REG_FIFF_CTRL, val);
2639 } 2639 }
@@ -2680,7 +2680,7 @@ static UData_t MT2063_SetReceiverMode(struct MT2063_Info_t *pInfo,
2680 if (MT2063_NO_ERROR(status)) { 2680 if (MT2063_NO_ERROR(status)) {
2681 val = 2681 val =
2682 (pInfo-> 2682 (pInfo->
2683 reg[MT2063_REG_LNA_TGT] & (U8Data) ~ 0x80) | (RFOVDIS[Mode] 2683 reg[MT2063_REG_LNA_TGT] & (u8) ~ 0x80) | (RFOVDIS[Mode]
2684 ? 0x80 : 2684 ? 0x80 :
2685 0x00); 2685 0x00);
2686 if (pInfo->reg[MT2063_REG_LNA_TGT] != val) { 2686 if (pInfo->reg[MT2063_REG_LNA_TGT] != val) {
@@ -2692,7 +2692,7 @@ static UData_t MT2063_SetReceiverMode(struct MT2063_Info_t *pInfo,
2692 if (MT2063_NO_ERROR(status)) { 2692 if (MT2063_NO_ERROR(status)) {
2693 val = 2693 val =
2694 (pInfo-> 2694 (pInfo->
2695 reg[MT2063_REG_PD1_TGT] & (U8Data) ~ 0x80) | 2695 reg[MT2063_REG_PD1_TGT] & (u8) ~ 0x80) |
2696 (FIFOVDIS[Mode] ? 0x80 : 0x00); 2696 (FIFOVDIS[Mode] ? 0x80 : 0x00);
2697 if (pInfo->reg[MT2063_REG_PD1_TGT] != val) { 2697 if (pInfo->reg[MT2063_REG_PD1_TGT] != val) {
2698 status |= MT2063_SetReg(pInfo, MT2063_REG_PD1_TGT, val); 2698 status |= MT2063_SetReg(pInfo, MT2063_REG_PD1_TGT, val);
@@ -2739,14 +2739,14 @@ static UData_t MT2063_SetReceiverMode(struct MT2063_Info_t *pInfo,
2739** 06-24-2008 PINZ Ver 1.18: Add Get/SetParam CTFILT_SW 2739** 06-24-2008 PINZ Ver 1.18: Add Get/SetParam CTFILT_SW
2740** 2740**
2741******************************************************************************/ 2741******************************************************************************/
2742UData_t MT2063_ReInit(Handle_t h) 2742u32 MT2063_ReInit(void *h)
2743{ 2743{
2744 U8Data all_resets = 0xF0; /* reset/load bits */ 2744 u8 all_resets = 0xF0; /* reset/load bits */
2745 UData_t status = MT2063_OK; /* Status to be returned */ 2745 u32 status = MT2063_OK; /* Status to be returned */
2746 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 2746 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
2747 U8Data *def; 2747 u8 *def;
2748 2748
2749 U8Data MT2063B0_defaults[] = { /* Reg, Value */ 2749 u8 MT2063B0_defaults[] = { /* Reg, Value */
2750 0x19, 0x05, 2750 0x19, 0x05,
2751 0x1B, 0x1D, 2751 0x1B, 0x1D,
2752 0x1C, 0x1F, 2752 0x1C, 0x1F,
@@ -2770,7 +2770,7 @@ UData_t MT2063_ReInit(Handle_t h)
2770 }; 2770 };
2771 2771
2772 /* writing 0x05 0xf0 sw-resets all registers, so we write only needed changes */ 2772 /* writing 0x05 0xf0 sw-resets all registers, so we write only needed changes */
2773 U8Data MT2063B1_defaults[] = { /* Reg, Value */ 2773 u8 MT2063B1_defaults[] = { /* Reg, Value */
2774 0x05, 0xF0, 2774 0x05, 0xF0,
2775 0x11, 0x10, /* New Enable AFCsd */ 2775 0x11, 0x10, /* New Enable AFCsd */
2776 0x19, 0x05, 2776 0x19, 0x05,
@@ -2796,7 +2796,7 @@ UData_t MT2063_ReInit(Handle_t h)
2796 }; 2796 };
2797 2797
2798 /* writing 0x05 0xf0 sw-resets all registers, so we write only needed changes */ 2798 /* writing 0x05 0xf0 sw-resets all registers, so we write only needed changes */
2799 U8Data MT2063B3_defaults[] = { /* Reg, Value */ 2799 u8 MT2063B3_defaults[] = { /* Reg, Value */
2800 0x05, 0xF0, 2800 0x05, 0xF0,
2801 0x19, 0x3D, 2801 0x19, 0x3D,
2802 0x2C, 0x24, /* bit at 0x20 is cleared below */ 2802 0x2C, 0x24, /* bit at 0x20 is cleared below */
@@ -2861,8 +2861,8 @@ UData_t MT2063_ReInit(Handle_t h)
2861 } 2861 }
2862 2862
2863 while (MT2063_NO_ERROR(status) && *def) { 2863 while (MT2063_NO_ERROR(status) && *def) {
2864 U8Data reg = *def++; 2864 u8 reg = *def++;
2865 U8Data val = *def++; 2865 u8 val = *def++;
2866 status |= 2866 status |=
2867 MT2063_WriteSub(pInfo->hUserData, pInfo->address, reg, &val, 2867 MT2063_WriteSub(pInfo->hUserData, pInfo->address, reg, &val,
2868 1); 2868 1);
@@ -2870,8 +2870,8 @@ UData_t MT2063_ReInit(Handle_t h)
2870 2870
2871 /* Wait for FIFF location to complete. */ 2871 /* Wait for FIFF location to complete. */
2872 if (MT2063_NO_ERROR(status)) { 2872 if (MT2063_NO_ERROR(status)) {
2873 UData_t FCRUN = 1; 2873 u32 FCRUN = 1;
2874 SData_t maxReads = 10; 2874 s32 maxReads = 10;
2875 while (MT2063_NO_ERROR(status) && (FCRUN != 0) 2875 while (MT2063_NO_ERROR(status) && (FCRUN != 0)
2876 && (maxReads-- > 0)) { 2876 && (maxReads-- > 0)) {
2877 MT2063_Sleep(pInfo->hUserData, 2); 2877 MT2063_Sleep(pInfo->hUserData, 2);
@@ -2907,7 +2907,7 @@ UData_t MT2063_ReInit(Handle_t h)
2907 pInfo->AS_Data.f_ref = MT2063_REF_FREQ; 2907 pInfo->AS_Data.f_ref = MT2063_REF_FREQ;
2908 pInfo->AS_Data.f_if1_Center = 2908 pInfo->AS_Data.f_if1_Center =
2909 (pInfo->AS_Data.f_ref / 8) * 2909 (pInfo->AS_Data.f_ref / 8) *
2910 ((UData_t) pInfo->reg[MT2063_REG_FIFFC] + 640); 2910 ((u32) pInfo->reg[MT2063_REG_FIFFC] + 640);
2911 pInfo->AS_Data.f_if1_bw = MT2063_IF1_BW; 2911 pInfo->AS_Data.f_if1_bw = MT2063_IF1_BW;
2912 pInfo->AS_Data.f_out = 43750000UL; 2912 pInfo->AS_Data.f_out = 43750000UL;
2913 pInfo->AS_Data.f_out_bw = 6750000UL; 2913 pInfo->AS_Data.f_out_bw = 6750000UL;
@@ -2969,8 +2969,8 @@ UData_t MT2063_ReInit(Handle_t h)
2969 ** scale all of the Band Max values 2969 ** scale all of the Band Max values
2970 */ 2970 */
2971 if (MT2063_NO_ERROR(status)) { 2971 if (MT2063_NO_ERROR(status)) {
2972 UData_t fcu_osc; 2972 u32 fcu_osc;
2973 UData_t i; 2973 u32 i;
2974 2974
2975 pInfo->reg[MT2063_REG_CTUNE_CTRL] = 0x0A; 2975 pInfo->reg[MT2063_REG_CTUNE_CTRL] = 0x0A;
2976 status |= 2976 status |=
@@ -3028,13 +3028,13 @@ UData_t MT2063_ReInit(Handle_t h)
3028** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 3028** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
3029** 3029**
3030******************************************************************************/ 3030******************************************************************************/
3031UData_t MT2063_SetGPIO(Handle_t h, enum MT2063_GPIO_ID gpio_id, 3031u32 MT2063_SetGPIO(void *h, enum MT2063_GPIO_ID gpio_id,
3032 enum MT2063_GPIO_Attr attr, UData_t value) 3032 enum MT2063_GPIO_Attr attr, u32 value)
3033{ 3033{
3034 UData_t status = MT2063_OK; /* Status to be returned */ 3034 u32 status = MT2063_OK; /* Status to be returned */
3035 U8Data regno; 3035 u8 regno;
3036 SData_t shift; 3036 s32 shift;
3037 static U8Data GPIOreg[3] = { 0x15, 0x19, 0x18 }; 3037 static u8 GPIOreg[3] = { 0x15, 0x19, 0x18 };
3038 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 3038 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
3039 3039
3040 if (MT2063_IsValidHandle(pInfo) == 0) 3040 if (MT2063_IsValidHandle(pInfo) == 0)
@@ -3138,10 +3138,10 @@ UData_t MT2063_SetGPIO(Handle_t h, enum MT2063_GPIO_ID gpio_id,
3138** 06-24-2008 PINZ Ver 1.18: Add Get/SetParam CTFILT_SW 3138** 06-24-2008 PINZ Ver 1.18: Add Get/SetParam CTFILT_SW
3139** 3139**
3140****************************************************************************/ 3140****************************************************************************/
3141UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue) 3141u32 MT2063_SetParam(void *h, enum MT2063_Param param, u32 nValue)
3142{ 3142{
3143 UData_t status = MT2063_OK; /* Status to be returned */ 3143 u32 status = MT2063_OK; /* Status to be returned */
3144 U8Data val = 0; 3144 u8 val = 0;
3145 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 3145 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
3146 3146
3147 /* Verify that the handle passed points to a valid tuner */ 3147 /* Verify that the handle passed points to a valid tuner */
@@ -3171,11 +3171,11 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3171 { 3171 {
3172 /* Note: LO1 and LO2 are BOTH written at toggle of LDLOos */ 3172 /* Note: LO1 and LO2 are BOTH written at toggle of LDLOos */
3173 /* Capture the Divider and Numerator portions of other LO */ 3173 /* Capture the Divider and Numerator portions of other LO */
3174 U8Data tempLO2CQ[3]; 3174 u8 tempLO2CQ[3];
3175 U8Data tempLO2C[3]; 3175 u8 tempLO2C[3];
3176 U8Data tmpOneShot; 3176 u8 tmpOneShot;
3177 UData_t Div, FracN; 3177 u32 Div, FracN;
3178 U8Data restore = 0; 3178 u8 restore = 0;
3179 3179
3180 /* Buffer the queue for restoration later and get actual LO2 values. */ 3180 /* Buffer the queue for restoration later and get actual LO2 values. */
3181 status |= 3181 status |=
@@ -3223,9 +3223,9 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3223 64, 3223 64,
3224 pInfo->AS_Data.f_ref); 3224 pInfo->AS_Data.f_ref);
3225 pInfo->reg[MT2063_REG_LO1CQ_1] = 3225 pInfo->reg[MT2063_REG_LO1CQ_1] =
3226 (U8Data) (Div & 0x00FF); 3226 (u8) (Div & 0x00FF);
3227 pInfo->reg[MT2063_REG_LO1CQ_2] = 3227 pInfo->reg[MT2063_REG_LO1CQ_2] =
3228 (U8Data) (FracN); 3228 (u8) (FracN);
3229 status |= 3229 status |=
3230 MT2063_WriteSub(pInfo->hUserData, 3230 MT2063_WriteSub(pInfo->hUserData,
3231 pInfo->address, 3231 pInfo->address,
@@ -3290,12 +3290,12 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3290 { 3290 {
3291 /* Note: LO1 and LO2 are BOTH written at toggle of LDLOos */ 3291 /* Note: LO1 and LO2 are BOTH written at toggle of LDLOos */
3292 /* Capture the Divider and Numerator portions of other LO */ 3292 /* Capture the Divider and Numerator portions of other LO */
3293 U8Data tempLO1CQ[2]; 3293 u8 tempLO1CQ[2];
3294 U8Data tempLO1C[2]; 3294 u8 tempLO1C[2];
3295 UData_t Div2; 3295 u32 Div2;
3296 UData_t FracN2; 3296 u32 FracN2;
3297 U8Data tmpOneShot; 3297 u8 tmpOneShot;
3298 U8Data restore = 0; 3298 u8 restore = 0;
3299 3299
3300 /* Buffer the queue for restoration later and get actual LO2 values. */ 3300 /* Buffer the queue for restoration later and get actual LO2 values. */
3301 status |= 3301 status |=
@@ -3334,12 +3334,12 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3334 8191, 3334 8191,
3335 pInfo->AS_Data.f_ref); 3335 pInfo->AS_Data.f_ref);
3336 pInfo->reg[MT2063_REG_LO2CQ_1] = 3336 pInfo->reg[MT2063_REG_LO2CQ_1] =
3337 (U8Data) ((Div2 << 1) | 3337 (u8) ((Div2 << 1) |
3338 ((FracN2 >> 12) & 0x01)) & 0xFF; 3338 ((FracN2 >> 12) & 0x01)) & 0xFF;
3339 pInfo->reg[MT2063_REG_LO2CQ_2] = 3339 pInfo->reg[MT2063_REG_LO2CQ_2] =
3340 (U8Data) ((FracN2 >> 4) & 0xFF); 3340 (u8) ((FracN2 >> 4) & 0xFF);
3341 pInfo->reg[MT2063_REG_LO2CQ_3] = 3341 pInfo->reg[MT2063_REG_LO2CQ_3] =
3342 (U8Data) ((FracN2 & 0x0F)); 3342 (u8) ((FracN2 & 0x0F));
3343 status |= 3343 status |=
3344 MT2063_WriteSub(pInfo->hUserData, 3344 MT2063_WriteSub(pInfo->hUserData,
3345 pInfo->address, 3345 pInfo->address,
@@ -3424,7 +3424,7 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3424 case MT2063_LNA_RIN: 3424 case MT2063_LNA_RIN:
3425 val = 3425 val =
3426 (pInfo-> 3426 (pInfo->
3427 reg[MT2063_REG_CTRL_2C] & (U8Data) ~ 0x03) | 3427 reg[MT2063_REG_CTRL_2C] & (u8) ~ 0x03) |
3428 (nValue & 0x03); 3428 (nValue & 0x03);
3429 if (pInfo->reg[MT2063_REG_CTRL_2C] != val) { 3429 if (pInfo->reg[MT2063_REG_CTRL_2C] != val) {
3430 status |= 3430 status |=
@@ -3437,7 +3437,7 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3437 case MT2063_LNA_TGT: 3437 case MT2063_LNA_TGT:
3438 val = 3438 val =
3439 (pInfo-> 3439 (pInfo->
3440 reg[MT2063_REG_LNA_TGT] & (U8Data) ~ 0x3F) | 3440 reg[MT2063_REG_LNA_TGT] & (u8) ~ 0x3F) |
3441 (nValue & 0x3F); 3441 (nValue & 0x3F);
3442 if (pInfo->reg[MT2063_REG_LNA_TGT] != val) { 3442 if (pInfo->reg[MT2063_REG_LNA_TGT] != val) {
3443 status |= 3443 status |=
@@ -3450,7 +3450,7 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3450 case MT2063_PD1_TGT: 3450 case MT2063_PD1_TGT:
3451 val = 3451 val =
3452 (pInfo-> 3452 (pInfo->
3453 reg[MT2063_REG_PD1_TGT] & (U8Data) ~ 0x3F) | 3453 reg[MT2063_REG_PD1_TGT] & (u8) ~ 0x3F) |
3454 (nValue & 0x3F); 3454 (nValue & 0x3F);
3455 if (pInfo->reg[MT2063_REG_PD1_TGT] != val) { 3455 if (pInfo->reg[MT2063_REG_PD1_TGT] != val) {
3456 status |= 3456 status |=
@@ -3463,7 +3463,7 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3463 case MT2063_PD2_TGT: 3463 case MT2063_PD2_TGT:
3464 val = 3464 val =
3465 (pInfo-> 3465 (pInfo->
3466 reg[MT2063_REG_PD2_TGT] & (U8Data) ~ 0x3F) | 3466 reg[MT2063_REG_PD2_TGT] & (u8) ~ 0x3F) |
3467 (nValue & 0x3F); 3467 (nValue & 0x3F);
3468 if (pInfo->reg[MT2063_REG_PD2_TGT] != val) { 3468 if (pInfo->reg[MT2063_REG_PD2_TGT] != val) {
3469 status |= 3469 status |=
@@ -3476,7 +3476,7 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3476 case MT2063_ACLNA_MAX: 3476 case MT2063_ACLNA_MAX:
3477 val = 3477 val =
3478 (pInfo-> 3478 (pInfo->
3479 reg[MT2063_REG_LNA_OV] & (U8Data) ~ 0x1F) | (nValue 3479 reg[MT2063_REG_LNA_OV] & (u8) ~ 0x1F) | (nValue
3480 & 3480 &
3481 0x1F); 3481 0x1F);
3482 if (pInfo->reg[MT2063_REG_LNA_OV] != val) { 3482 if (pInfo->reg[MT2063_REG_LNA_OV] != val) {
@@ -3490,7 +3490,7 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3490 case MT2063_ACRF_MAX: 3490 case MT2063_ACRF_MAX:
3491 val = 3491 val =
3492 (pInfo-> 3492 (pInfo->
3493 reg[MT2063_REG_RF_OV] & (U8Data) ~ 0x1F) | (nValue 3493 reg[MT2063_REG_RF_OV] & (u8) ~ 0x1F) | (nValue
3494 & 3494 &
3495 0x1F); 3495 0x1F);
3496 if (pInfo->reg[MT2063_REG_RF_OV] != val) { 3496 if (pInfo->reg[MT2063_REG_RF_OV] != val) {
@@ -3506,7 +3506,7 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3506 nValue = 5; 3506 nValue = 5;
3507 val = 3507 val =
3508 (pInfo-> 3508 (pInfo->
3509 reg[MT2063_REG_FIF_OV] & (U8Data) ~ 0x1F) | (nValue 3509 reg[MT2063_REG_FIF_OV] & (u8) ~ 0x1F) | (nValue
3510 & 3510 &
3511 0x1F); 3511 0x1F);
3512 if (pInfo->reg[MT2063_REG_FIF_OV] != val) { 3512 if (pInfo->reg[MT2063_REG_FIF_OV] != val) {
@@ -3640,7 +3640,7 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3640 /* Set VGA gain code */ 3640 /* Set VGA gain code */
3641 val = 3641 val =
3642 (pInfo-> 3642 (pInfo->
3643 reg[MT2063_REG_VGA_GAIN] & (U8Data) ~ 0x0C) | 3643 reg[MT2063_REG_VGA_GAIN] & (u8) ~ 0x0C) |
3644 ((nValue & 0x03) << 2); 3644 ((nValue & 0x03) << 2);
3645 if (pInfo->reg[MT2063_REG_VGA_GAIN] != val) { 3645 if (pInfo->reg[MT2063_REG_VGA_GAIN] != val) {
3646 status |= 3646 status |=
@@ -3653,7 +3653,7 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3653 /* Set VGA bias current */ 3653 /* Set VGA bias current */
3654 val = 3654 val =
3655 (pInfo-> 3655 (pInfo->
3656 reg[MT2063_REG_RSVD_31] & (U8Data) ~ 0x07) | 3656 reg[MT2063_REG_RSVD_31] & (u8) ~ 0x07) |
3657 (nValue & 0x07); 3657 (nValue & 0x07);
3658 if (pInfo->reg[MT2063_REG_RSVD_31] != val) { 3658 if (pInfo->reg[MT2063_REG_RSVD_31] != val) {
3659 status |= 3659 status |=
@@ -3666,7 +3666,7 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3666 /* Set TAGC */ 3666 /* Set TAGC */
3667 val = 3667 val =
3668 (pInfo-> 3668 (pInfo->
3669 reg[MT2063_REG_RSVD_1E] & (U8Data) ~ 0x03) | 3669 reg[MT2063_REG_RSVD_1E] & (u8) ~ 0x03) |
3670 (nValue & 0x03); 3670 (nValue & 0x03);
3671 if (pInfo->reg[MT2063_REG_RSVD_1E] != val) { 3671 if (pInfo->reg[MT2063_REG_RSVD_1E] != val) {
3672 status |= 3672 status |=
@@ -3679,7 +3679,7 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3679 /* Set Amp gain code */ 3679 /* Set Amp gain code */
3680 val = 3680 val =
3681 (pInfo-> 3681 (pInfo->
3682 reg[MT2063_REG_TEMP_SEL] & (U8Data) ~ 0x03) | 3682 reg[MT2063_REG_TEMP_SEL] & (u8) ~ 0x03) |
3683 (nValue & 0x03); 3683 (nValue & 0x03);
3684 if (pInfo->reg[MT2063_REG_TEMP_SEL] != val) { 3684 if (pInfo->reg[MT2063_REG_TEMP_SEL] != val) {
3685 status |= 3685 status |=
@@ -3758,9 +3758,9 @@ UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue)
3758** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 3758** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
3759** 3759**
3760****************************************************************************/ 3760****************************************************************************/
3761UData_t MT2063_SetPowerMaskBits(Handle_t h, enum MT2063_Mask_Bits Bits) 3761u32 MT2063_SetPowerMaskBits(void *h, enum MT2063_Mask_Bits Bits)
3762{ 3762{
3763 UData_t status = MT2063_OK; /* Status to be returned */ 3763 u32 status = MT2063_OK; /* Status to be returned */
3764 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 3764 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
3765 3765
3766 /* Verify that the handle passed points to a valid tuner */ 3766 /* Verify that the handle passed points to a valid tuner */
@@ -3770,14 +3770,14 @@ UData_t MT2063_SetPowerMaskBits(Handle_t h, enum MT2063_Mask_Bits Bits)
3770 Bits = (enum MT2063_Mask_Bits)(Bits & MT2063_ALL_SD); /* Only valid bits for this tuner */ 3770 Bits = (enum MT2063_Mask_Bits)(Bits & MT2063_ALL_SD); /* Only valid bits for this tuner */
3771 if ((Bits & 0xFF00) != 0) { 3771 if ((Bits & 0xFF00) != 0) {
3772 pInfo->reg[MT2063_REG_PWR_2] |= 3772 pInfo->reg[MT2063_REG_PWR_2] |=
3773 (U8Data) ((Bits & 0xFF00) >> 8); 3773 (u8) ((Bits & 0xFF00) >> 8);
3774 status |= 3774 status |=
3775 MT2063_WriteSub(pInfo->hUserData, pInfo->address, 3775 MT2063_WriteSub(pInfo->hUserData, pInfo->address,
3776 MT2063_REG_PWR_2, 3776 MT2063_REG_PWR_2,
3777 &pInfo->reg[MT2063_REG_PWR_2], 1); 3777 &pInfo->reg[MT2063_REG_PWR_2], 1);
3778 } 3778 }
3779 if ((Bits & 0xFF) != 0) { 3779 if ((Bits & 0xFF) != 0) {
3780 pInfo->reg[MT2063_REG_PWR_1] |= ((U8Data) Bits & 0xFF); 3780 pInfo->reg[MT2063_REG_PWR_1] |= ((u8) Bits & 0xFF);
3781 status |= 3781 status |=
3782 MT2063_WriteSub(pInfo->hUserData, pInfo->address, 3782 MT2063_WriteSub(pInfo->hUserData, pInfo->address,
3783 MT2063_REG_PWR_1, 3783 MT2063_REG_PWR_1,
@@ -3815,9 +3815,9 @@ UData_t MT2063_SetPowerMaskBits(Handle_t h, enum MT2063_Mask_Bits Bits)
3815** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 3815** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
3816** 3816**
3817****************************************************************************/ 3817****************************************************************************/
3818UData_t MT2063_ClearPowerMaskBits(Handle_t h, enum MT2063_Mask_Bits Bits) 3818u32 MT2063_ClearPowerMaskBits(void *h, enum MT2063_Mask_Bits Bits)
3819{ 3819{
3820 UData_t status = MT2063_OK; /* Status to be returned */ 3820 u32 status = MT2063_OK; /* Status to be returned */
3821 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 3821 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
3822 3822
3823 /* Verify that the handle passed points to a valid tuner */ 3823 /* Verify that the handle passed points to a valid tuner */
@@ -3826,14 +3826,14 @@ UData_t MT2063_ClearPowerMaskBits(Handle_t h, enum MT2063_Mask_Bits Bits)
3826 else { 3826 else {
3827 Bits = (enum MT2063_Mask_Bits)(Bits & MT2063_ALL_SD); /* Only valid bits for this tuner */ 3827 Bits = (enum MT2063_Mask_Bits)(Bits & MT2063_ALL_SD); /* Only valid bits for this tuner */
3828 if ((Bits & 0xFF00) != 0) { 3828 if ((Bits & 0xFF00) != 0) {
3829 pInfo->reg[MT2063_REG_PWR_2] &= ~(U8Data) (Bits >> 8); 3829 pInfo->reg[MT2063_REG_PWR_2] &= ~(u8) (Bits >> 8);
3830 status |= 3830 status |=
3831 MT2063_WriteSub(pInfo->hUserData, pInfo->address, 3831 MT2063_WriteSub(pInfo->hUserData, pInfo->address,
3832 MT2063_REG_PWR_2, 3832 MT2063_REG_PWR_2,
3833 &pInfo->reg[MT2063_REG_PWR_2], 1); 3833 &pInfo->reg[MT2063_REG_PWR_2], 1);
3834 } 3834 }
3835 if ((Bits & 0xFF) != 0) { 3835 if ((Bits & 0xFF) != 0) {
3836 pInfo->reg[MT2063_REG_PWR_1] &= ~(U8Data) (Bits & 0xFF); 3836 pInfo->reg[MT2063_REG_PWR_1] &= ~(u8) (Bits & 0xFF);
3837 status |= 3837 status |=
3838 MT2063_WriteSub(pInfo->hUserData, pInfo->address, 3838 MT2063_WriteSub(pInfo->hUserData, pInfo->address,
3839 MT2063_REG_PWR_1, 3839 MT2063_REG_PWR_1,
@@ -3871,9 +3871,9 @@ UData_t MT2063_ClearPowerMaskBits(Handle_t h, enum MT2063_Mask_Bits Bits)
3871** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 3871** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
3872** 3872**
3873****************************************************************************/ 3873****************************************************************************/
3874UData_t MT2063_GetPowerMaskBits(Handle_t h, enum MT2063_Mask_Bits * Bits) 3874u32 MT2063_GetPowerMaskBits(void *h, enum MT2063_Mask_Bits * Bits)
3875{ 3875{
3876 UData_t status = MT2063_OK; /* Status to be returned */ 3876 u32 status = MT2063_OK; /* Status to be returned */
3877 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 3877 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
3878 3878
3879 /* Verify that the handle passed points to a valid tuner */ 3879 /* Verify that the handle passed points to a valid tuner */
@@ -3892,7 +3892,7 @@ UData_t MT2063_GetPowerMaskBits(Handle_t h, enum MT2063_Mask_Bits * Bits)
3892 if (MT2063_NO_ERROR(status)) { 3892 if (MT2063_NO_ERROR(status)) {
3893 *Bits = 3893 *Bits =
3894 (enum 3894 (enum
3895 MT2063_Mask_Bits)(((SData_t) pInfo-> 3895 MT2063_Mask_Bits)(((s32) pInfo->
3896 reg[MT2063_REG_PWR_2] << 8) + 3896 reg[MT2063_REG_PWR_2] << 8) +
3897 pInfo->reg[MT2063_REG_PWR_1]); 3897 pInfo->reg[MT2063_REG_PWR_1]);
3898 *Bits = (enum MT2063_Mask_Bits)(*Bits & MT2063_ALL_SD); /* Only valid bits for this tuner */ 3898 *Bits = (enum MT2063_Mask_Bits)(*Bits & MT2063_ALL_SD); /* Only valid bits for this tuner */
@@ -3926,9 +3926,9 @@ UData_t MT2063_GetPowerMaskBits(Handle_t h, enum MT2063_Mask_Bits * Bits)
3926** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 3926** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
3927** 3927**
3928****************************************************************************/ 3928****************************************************************************/
3929UData_t MT2063_EnableExternalShutdown(Handle_t h, U8Data Enabled) 3929u32 MT2063_EnableExternalShutdown(void *h, u8 Enabled)
3930{ 3930{
3931 UData_t status = MT2063_OK; /* Status to be returned */ 3931 u32 status = MT2063_OK; /* Status to be returned */
3932 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 3932 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
3933 3933
3934 /* Verify that the handle passed points to a valid tuner */ 3934 /* Verify that the handle passed points to a valid tuner */
@@ -3977,9 +3977,9 @@ UData_t MT2063_EnableExternalShutdown(Handle_t h, U8Data Enabled)
3977** correct wakeup of the LNA 3977** correct wakeup of the LNA
3978** 3978**
3979****************************************************************************/ 3979****************************************************************************/
3980UData_t MT2063_SoftwareShutdown(Handle_t h, U8Data Shutdown) 3980u32 MT2063_SoftwareShutdown(void *h, u8 Shutdown)
3981{ 3981{
3982 UData_t status = MT2063_OK; /* Status to be returned */ 3982 u32 status = MT2063_OK; /* Status to be returned */
3983 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 3983 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
3984 3984
3985 /* Verify that the handle passed points to a valid tuner */ 3985 /* Verify that the handle passed points to a valid tuner */
@@ -4049,9 +4049,9 @@ UData_t MT2063_SoftwareShutdown(Handle_t h, U8Data Shutdown)
4049** 189 S 05-13-2008 RSK Ver 1.16: Correct location for ExtSRO control. 4049** 189 S 05-13-2008 RSK Ver 1.16: Correct location for ExtSRO control.
4050** 4050**
4051****************************************************************************/ 4051****************************************************************************/
4052UData_t MT2063_SetExtSRO(Handle_t h, enum MT2063_Ext_SRO Ext_SRO_Setting) 4052u32 MT2063_SetExtSRO(void *h, enum MT2063_Ext_SRO Ext_SRO_Setting)
4053{ 4053{
4054 UData_t status = MT2063_OK; /* Status to be returned */ 4054 u32 status = MT2063_OK; /* Status to be returned */
4055 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 4055 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
4056 4056
4057 /* Verify that the handle passed points to a valid tuner */ 4057 /* Verify that the handle passed points to a valid tuner */
@@ -4060,7 +4060,7 @@ UData_t MT2063_SetExtSRO(Handle_t h, enum MT2063_Ext_SRO Ext_SRO_Setting)
4060 else { 4060 else {
4061 pInfo->reg[MT2063_REG_CTRL_2C] = 4061 pInfo->reg[MT2063_REG_CTRL_2C] =
4062 (pInfo-> 4062 (pInfo->
4063 reg[MT2063_REG_CTRL_2C] & 0x3F) | ((U8Data) Ext_SRO_Setting 4063 reg[MT2063_REG_CTRL_2C] & 0x3F) | ((u8) Ext_SRO_Setting
4064 << 6); 4064 << 6);
4065 status = 4065 status =
4066 MT2063_WriteSub(pInfo->hUserData, pInfo->address, 4066 MT2063_WriteSub(pInfo->hUserData, pInfo->address,
@@ -4099,9 +4099,9 @@ UData_t MT2063_SetExtSRO(Handle_t h, enum MT2063_Ext_SRO Ext_SRO_Setting)
4099** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 4099** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
4100** 4100**
4101****************************************************************************/ 4101****************************************************************************/
4102UData_t MT2063_SetReg(Handle_t h, U8Data reg, U8Data val) 4102u32 MT2063_SetReg(void *h, u8 reg, u8 val)
4103{ 4103{
4104 UData_t status = MT2063_OK; /* Status to be returned */ 4104 u32 status = MT2063_OK; /* Status to be returned */
4105 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 4105 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
4106 4106
4107 /* Verify that the handle passed points to a valid tuner */ 4107 /* Verify that the handle passed points to a valid tuner */
@@ -4122,7 +4122,7 @@ UData_t MT2063_SetReg(Handle_t h, U8Data reg, U8Data val)
4122 return (status); 4122 return (status);
4123} 4123}
4124 4124
4125static UData_t MT2063_Round_fLO(UData_t f_LO, UData_t f_LO_Step, UData_t f_ref) 4125static u32 MT2063_Round_fLO(u32 f_LO, u32 f_LO_Step, u32 f_ref)
4126{ 4126{
4127 return f_ref * (f_LO / f_ref) 4127 return f_ref * (f_LO / f_ref)
4128 + f_LO_Step * (((f_LO % f_ref) + (f_LO_Step / 2)) / f_LO_Step); 4128 + f_LO_Step * (((f_LO % f_ref) + (f_LO_Step / 2)) / f_LO_Step);
@@ -4158,13 +4158,13 @@ static UData_t MT2063_Round_fLO(UData_t f_LO, UData_t f_LO_Step, UData_t f_ref)
4158** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 4158** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
4159** 4159**
4160****************************************************************************/ 4160****************************************************************************/
4161static UData_t MT2063_fLO_FractionalTerm(UData_t f_ref, 4161static u32 MT2063_fLO_FractionalTerm(u32 f_ref,
4162 UData_t num, UData_t denom) 4162 u32 num, u32 denom)
4163{ 4163{
4164 UData_t t1 = (f_ref >> 14) * num; 4164 u32 t1 = (f_ref >> 14) * num;
4165 UData_t term1 = t1 / denom; 4165 u32 term1 = t1 / denom;
4166 UData_t loss = t1 % denom; 4166 u32 loss = t1 % denom;
4167 UData_t term2 = 4167 u32 term2 =
4168 (((f_ref & 0x00003FFF) * num + (loss << 14)) + (denom / 2)) / denom; 4168 (((f_ref & 0x00003FFF) * num + (loss << 14)) + (denom / 2)) / denom;
4169 return ((term1 << 14) + term2); 4169 return ((term1 << 14) + term2);
4170} 4170}
@@ -4196,10 +4196,10 @@ static UData_t MT2063_fLO_FractionalTerm(UData_t f_ref,
4196** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 4196** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
4197** 4197**
4198****************************************************************************/ 4198****************************************************************************/
4199static UData_t MT2063_CalcLO1Mult(UData_t * Div, 4199static u32 MT2063_CalcLO1Mult(u32 * Div,
4200 UData_t * FracN, 4200 u32 * FracN,
4201 UData_t f_LO, 4201 u32 f_LO,
4202 UData_t f_LO_Step, UData_t f_Ref) 4202 u32 f_LO_Step, u32 f_Ref)
4203{ 4203{
4204 /* Calculate the whole number portion of the divider */ 4204 /* Calculate the whole number portion of the divider */
4205 *Div = f_LO / f_Ref; 4205 *Div = f_LO / f_Ref;
@@ -4239,10 +4239,10 @@ static UData_t MT2063_CalcLO1Mult(UData_t * Div,
4239** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b. 4239** 138 06-19-2007 DAD Ver 1.00: Initial, derived from mt2067_b.
4240** 4240**
4241****************************************************************************/ 4241****************************************************************************/
4242static UData_t MT2063_CalcLO2Mult(UData_t * Div, 4242static u32 MT2063_CalcLO2Mult(u32 * Div,
4243 UData_t * FracN, 4243 u32 * FracN,
4244 UData_t f_LO, 4244 u32 f_LO,
4245 UData_t f_LO_Step, UData_t f_Ref) 4245 u32 f_LO_Step, u32 f_Ref)
4246{ 4246{
4247 /* Calculate the whole number portion of the divider */ 4247 /* Calculate the whole number portion of the divider */
4248 *Div = f_LO / f_Ref; 4248 *Div = f_LO / f_Ref;
@@ -4278,10 +4278,10 @@ static UData_t MT2063_CalcLO2Mult(UData_t * Div,
4278** cross-over frequency values. 4278** cross-over frequency values.
4279** 4279**
4280****************************************************************************/ 4280****************************************************************************/
4281static UData_t FindClearTuneFilter(struct MT2063_Info_t *pInfo, UData_t f_in) 4281static u32 FindClearTuneFilter(struct MT2063_Info_t *pInfo, u32 f_in)
4282{ 4282{
4283 UData_t RFBand; 4283 u32 RFBand;
4284 UData_t idx; /* index loop */ 4284 u32 idx; /* index loop */
4285 4285
4286 /* 4286 /*
4287 ** Find RF Band setting 4287 ** Find RF Band setting
@@ -4337,24 +4337,24 @@ static UData_t FindClearTuneFilter(struct MT2063_Info_t *pInfo, UData_t f_in)
4337** 06-24-2008 PINZ Ver 1.18: Add Get/SetParam CTFILT_SW 4337** 06-24-2008 PINZ Ver 1.18: Add Get/SetParam CTFILT_SW
4338** 4338**
4339****************************************************************************/ 4339****************************************************************************/
4340UData_t MT2063_Tune(Handle_t h, UData_t f_in) 4340u32 MT2063_Tune(void *h, u32 f_in)
4341{ /* RF input center frequency */ 4341{ /* RF input center frequency */
4342 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 4342 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
4343 4343
4344 UData_t status = MT2063_OK; /* status of operation */ 4344 u32 status = MT2063_OK; /* status of operation */
4345 UData_t LO1; /* 1st LO register value */ 4345 u32 LO1; /* 1st LO register value */
4346 UData_t Num1; /* Numerator for LO1 reg. value */ 4346 u32 Num1; /* Numerator for LO1 reg. value */
4347 UData_t f_IF1; /* 1st IF requested */ 4347 u32 f_IF1; /* 1st IF requested */
4348 UData_t LO2; /* 2nd LO register value */ 4348 u32 LO2; /* 2nd LO register value */
4349 UData_t Num2; /* Numerator for LO2 reg. value */ 4349 u32 Num2; /* Numerator for LO2 reg. value */
4350 UData_t ofLO1, ofLO2; /* last time's LO frequencies */ 4350 u32 ofLO1, ofLO2; /* last time's LO frequencies */
4351 UData_t ofin, ofout; /* last time's I/O frequencies */ 4351 u32 ofin, ofout; /* last time's I/O frequencies */
4352 U8Data fiffc = 0x80; /* FIFF center freq from tuner */ 4352 u8 fiffc = 0x80; /* FIFF center freq from tuner */
4353 UData_t fiffof; /* Offset from FIFF center freq */ 4353 u32 fiffof; /* Offset from FIFF center freq */
4354 const U8Data LO1LK = 0x80; /* Mask for LO1 Lock bit */ 4354 const u8 LO1LK = 0x80; /* Mask for LO1 Lock bit */
4355 U8Data LO2LK = 0x08; /* Mask for LO2 Lock bit */ 4355 u8 LO2LK = 0x08; /* Mask for LO2 Lock bit */
4356 U8Data val; 4356 u8 val;
4357 UData_t RFBand; 4357 u32 RFBand;
4358 4358
4359 /* Verify that the handle passed points to a valid tuner */ 4359 /* Verify that the handle passed points to a valid tuner */
4360 if (MT2063_IsValidHandle(pInfo) == 0) 4360 if (MT2063_IsValidHandle(pInfo) == 0)
@@ -4388,7 +4388,7 @@ UData_t MT2063_Tune(Handle_t h, UData_t f_in)
4388 val = pInfo->reg[MT2063_REG_CTUNE_OV]; 4388 val = pInfo->reg[MT2063_REG_CTUNE_OV];
4389 RFBand = FindClearTuneFilter(pInfo, f_in); 4389 RFBand = FindClearTuneFilter(pInfo, f_in);
4390 pInfo->reg[MT2063_REG_CTUNE_OV] = 4390 pInfo->reg[MT2063_REG_CTUNE_OV] =
4391 (U8Data) ((pInfo->reg[MT2063_REG_CTUNE_OV] & ~0x1F) 4391 (u8) ((pInfo->reg[MT2063_REG_CTUNE_OV] & ~0x1F)
4392 | RFBand); 4392 | RFBand);
4393 if (pInfo->reg[MT2063_REG_CTUNE_OV] != val) { 4393 if (pInfo->reg[MT2063_REG_CTUNE_OV] != val) {
4394 status |= 4394 status |=
@@ -4482,7 +4482,7 @@ UData_t MT2063_Tune(Handle_t h, UData_t f_in)
4482 */ 4482 */
4483 fiffof = 4483 fiffof =
4484 (pInfo->AS_Data.f_LO1 - 4484 (pInfo->AS_Data.f_LO1 -
4485 f_in) / (pInfo->AS_Data.f_ref / 64) - 8 * (UData_t) fiffc - 4485 f_in) / (pInfo->AS_Data.f_ref / 64) - 8 * (u32) fiffc -
4486 4992; 4486 4992;
4487 if (fiffof > 0xFF) 4487 if (fiffof > 0xFF)
4488 fiffof = 0xFF; 4488 fiffof = 0xFF;
@@ -4492,12 +4492,12 @@ UData_t MT2063_Tune(Handle_t h, UData_t f_in)
4492 ** register fields. 4492 ** register fields.
4493 */ 4493 */
4494 if (MT2063_NO_ERROR(status)) { 4494 if (MT2063_NO_ERROR(status)) {
4495 pInfo->reg[MT2063_REG_LO1CQ_1] = (U8Data) (LO1 & 0xFF); /* DIV1q */ 4495 pInfo->reg[MT2063_REG_LO1CQ_1] = (u8) (LO1 & 0xFF); /* DIV1q */
4496 pInfo->reg[MT2063_REG_LO1CQ_2] = (U8Data) (Num1 & 0x3F); /* NUM1q */ 4496 pInfo->reg[MT2063_REG_LO1CQ_2] = (u8) (Num1 & 0x3F); /* NUM1q */
4497 pInfo->reg[MT2063_REG_LO2CQ_1] = (U8Data) (((LO2 & 0x7F) << 1) /* DIV2q */ 4497 pInfo->reg[MT2063_REG_LO2CQ_1] = (u8) (((LO2 & 0x7F) << 1) /* DIV2q */
4498 |(Num2 >> 12)); /* NUM2q (hi) */ 4498 |(Num2 >> 12)); /* NUM2q (hi) */
4499 pInfo->reg[MT2063_REG_LO2CQ_2] = (U8Data) ((Num2 & 0x0FF0) >> 4); /* NUM2q (mid) */ 4499 pInfo->reg[MT2063_REG_LO2CQ_2] = (u8) ((Num2 & 0x0FF0) >> 4); /* NUM2q (mid) */
4500 pInfo->reg[MT2063_REG_LO2CQ_3] = (U8Data) (0xE0 | (Num2 & 0x000F)); /* NUM2q (lo) */ 4500 pInfo->reg[MT2063_REG_LO2CQ_3] = (u8) (0xE0 | (Num2 & 0x000F)); /* NUM2q (lo) */
4501 4501
4502 /* 4502 /*
4503 ** Now write out the computed register values 4503 ** Now write out the computed register values
@@ -4511,9 +4511,9 @@ UData_t MT2063_Tune(Handle_t h, UData_t f_in)
4511 } 4511 }
4512 /* Write out the FIFF offset only if it's changing */ 4512 /* Write out the FIFF offset only if it's changing */
4513 if (pInfo->reg[MT2063_REG_FIFF_OFFSET] != 4513 if (pInfo->reg[MT2063_REG_FIFF_OFFSET] !=
4514 (U8Data) fiffof) { 4514 (u8) fiffof) {
4515 pInfo->reg[MT2063_REG_FIFF_OFFSET] = 4515 pInfo->reg[MT2063_REG_FIFF_OFFSET] =
4516 (U8Data) fiffof; 4516 (u8) fiffof;
4517 status |= 4517 status |=
4518 MT2063_WriteSub(pInfo->hUserData, 4518 MT2063_WriteSub(pInfo->hUserData,
4519 pInfo->address, 4519 pInfo->address,
@@ -4542,25 +4542,25 @@ UData_t MT2063_Tune(Handle_t h, UData_t f_in)
4542 return (status); 4542 return (status);
4543} 4543}
4544 4544
4545UData_t MT_Tune_atv(Handle_t h, UData_t f_in, UData_t bw_in, 4545u32 MT_Tune_atv(void *h, u32 f_in, u32 bw_in,
4546 enum MTTune_atv_standard tv_type) 4546 enum MTTune_atv_standard tv_type)
4547{ 4547{
4548 4548
4549 UData_t status = MT2063_OK; 4549 u32 status = MT2063_OK;
4550 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h; 4550 struct MT2063_Info_t *pInfo = (struct MT2063_Info_t *)h;
4551 struct dvb_frontend *fe = (struct dvb_frontend *)pInfo->hUserData; 4551 struct dvb_frontend *fe = (struct dvb_frontend *)pInfo->hUserData;
4552 struct mt2063_state *state = fe->tuner_priv; 4552 struct mt2063_state *state = fe->tuner_priv;
4553 4553
4554 SData_t pict_car = 0; 4554 s32 pict_car = 0;
4555 SData_t pict2chanb_vsb = 0; 4555 s32 pict2chanb_vsb = 0;
4556 SData_t pict2chanb_snd = 0; 4556 s32 pict2chanb_snd = 0;
4557 SData_t pict2snd1 = 0; 4557 s32 pict2snd1 = 0;
4558 SData_t pict2snd2 = 0; 4558 s32 pict2snd2 = 0;
4559 SData_t ch_bw = 0; 4559 s32 ch_bw = 0;
4560 4560
4561 SData_t if_mid = 0; 4561 s32 if_mid = 0;
4562 SData_t rcvr_mode = 0; 4562 s32 rcvr_mode = 0;
4563 UData_t mode_get = 0; 4563 u32 mode_get = 0;
4564 4564
4565 switch (tv_type) { 4565 switch (tv_type) {
4566 case MTTUNEA_PAL_B:{ 4566 case MTTUNEA_PAL_B:{
@@ -4672,12 +4672,12 @@ UData_t MT_Tune_atv(Handle_t h, UData_t f_in, UData_t bw_in,
4672 status |= MT2063_Tune(h, (f_in + (pict2chanb_vsb + (ch_bw / 2)))); 4672 status |= MT2063_Tune(h, (f_in + (pict2chanb_vsb + (ch_bw / 2))));
4673 status |= MT2063_GetParam(h, MT2063_RCVR_MODE, &mode_get); 4673 status |= MT2063_GetParam(h, MT2063_RCVR_MODE, &mode_get);
4674 4674
4675 return (UData_t) status; 4675 return (u32) status;
4676} 4676}
4677 4677
4678static int mt2063_init(struct dvb_frontend *fe) 4678static int mt2063_init(struct dvb_frontend *fe)
4679{ 4679{
4680 UData_t status = MT2063_ERROR; 4680 u32 status = MT2063_ERROR;
4681 struct mt2063_state *state = fe->tuner_priv; 4681 struct mt2063_state *state = fe->tuner_priv;
4682 4682
4683 status = MT2063_Open(0xC0, &(state->MT2063_ht), fe); 4683 status = MT2063_Open(0xC0, &(state->MT2063_ht), fe);
@@ -4726,8 +4726,8 @@ static int mt2063_get_state(struct dvb_frontend *fe,
4726 break; 4726 break;
4727 case DVBFE_TUNER_REFCLOCK: 4727 case DVBFE_TUNER_REFCLOCK:
4728 state->refclock = 4728 state->refclock =
4729 (u32_t) 4729 (u32)
4730 MT2063_GetLocked((Handle_t) (mt2063State->MT2063_ht)); 4730 MT2063_GetLocked((void *) (mt2063State->MT2063_ht));
4731 break; 4731 break;
4732 default: 4732 default:
4733 break; 4733 break;
@@ -4740,14 +4740,14 @@ static int mt2063_set_state(struct dvb_frontend *fe,
4740 enum tuner_param param, struct tuner_state *state) 4740 enum tuner_param param, struct tuner_state *state)
4741{ 4741{
4742 struct mt2063_state *mt2063State = fe->tuner_priv; 4742 struct mt2063_state *mt2063State = fe->tuner_priv;
4743 UData_t status = MT2063_OK; 4743 u32 status = MT2063_OK;
4744 4744
4745 switch (param) { 4745 switch (param) {
4746 case DVBFE_TUNER_FREQUENCY: 4746 case DVBFE_TUNER_FREQUENCY:
4747 //set frequency 4747 //set frequency
4748 4748
4749 status = 4749 status =
4750 MT_Tune_atv((Handle_t) (mt2063State->MT2063_ht), 4750 MT_Tune_atv((void *) (mt2063State->MT2063_ht),
4751 state->frequency, state->bandwidth, 4751 state->frequency, state->bandwidth,
4752 mt2063State->tv_type); 4752 mt2063State->tv_type);
4753 4753
@@ -4822,7 +4822,7 @@ struct dvb_frontend *mt2063_attach(struct dvb_frontend *fe,
4822 state->i2c = i2c; 4822 state->i2c = i2c;
4823 state->frontend = fe; 4823 state->frontend = fe;
4824 state->reference = config->refclock / 1000; /* kHz */ 4824 state->reference = config->refclock / 1000; /* kHz */
4825 state->MT2063_init = FALSE; 4825 state->MT2063_init = false;
4826 fe->tuner_priv = state; 4826 fe->tuner_priv = state;
4827 fe->ops.tuner_ops = mt2063_ops; 4827 fe->ops.tuner_ops = mt2063_ops;
4828 4828
diff --git a/drivers/media/common/tuners/mt2063.h b/drivers/media/common/tuners/mt2063.h
index 80af9afc69b0..7fb5b743d4d2 100644
--- a/drivers/media/common/tuners/mt2063.h
+++ b/drivers/media/common/tuners/mt2063.h
@@ -3,13 +3,6 @@
3 3
4#include "dvb_frontend.h" 4#include "dvb_frontend.h"
5 5
6enum Bool_t {
7 FALSE = 0,
8 TRUE
9};
10
11typedef unsigned long u32_t;
12
13#define DVBFE_TUNER_OPEN 99 6#define DVBFE_TUNER_OPEN 99
14#define DVBFE_TUNER_SOFTWARE_SHUTDOWN 100 7#define DVBFE_TUNER_SOFTWARE_SHUTDOWN 100
15#define DVBFE_TUNER_CLEAR_POWER_MASKBITS 101 8#define DVBFE_TUNER_CLEAR_POWER_MASKBITS 101
@@ -90,12 +83,7 @@ typedef unsigned long u32_t;
90 */ 83 */
91#define MT2060_CNT 10 84#define MT2060_CNT 10
92 85
93typedef unsigned char U8Data; /* type corresponds to 8 bits */ 86#define MAX_UDATA (4294967295) /* max value storable in u32 */
94typedef unsigned int UData_t; /* type must be at least 32 bits */
95typedef int SData_t; /* type must be at least 32 bits */
96typedef void *Handle_t; /* memory pointer type */
97
98#define MAX_UDATA (4294967295) /* max value storable in UData_t */
99 87
100/* 88/*
101 * Define an MTxxxx_CNT macro for each type of tuner that will be built 89 * Define an MTxxxx_CNT macro for each type of tuner that will be built
@@ -115,19 +103,19 @@ typedef void *Handle_t; /* memory pointer type */
115#endif 103#endif
116#define MT2063_I2C (0xC0) 104#define MT2063_I2C (0xC0)
117 105
118UData_t MT2063_WriteSub(Handle_t hUserData, 106u32 MT2063_WriteSub(void *hUserData,
119 UData_t addr, 107 u32 addr,
120 U8Data subAddress, U8Data * pData, UData_t cnt); 108 u8 subAddress, u8 * pData, u32 cnt);
121 109
122UData_t MT2063_ReadSub(Handle_t hUserData, 110u32 MT2063_ReadSub(void *hUserData,
123 UData_t addr, 111 u32 addr,
124 U8Data subAddress, U8Data * pData, UData_t cnt); 112 u8 subAddress, u8 * pData, u32 cnt);
125 113
126void MT2063_Sleep(Handle_t hUserData, UData_t nMinDelayTime); 114void MT2063_Sleep(void *hUserData, u32 nMinDelayTime);
127 115
128#if defined(MT2060_CNT) 116#if defined(MT2060_CNT)
129#if MT2060_CNT > 0 117#if MT2060_CNT > 0
130UData_t MT2060_TunerGain(Handle_t hUserData, SData_t * pMeas); 118u32 MT2060_TunerGain(void *hUserData, s32 * pMeas);
131#endif 119#endif
132#endif 120#endif
133 121
@@ -163,8 +151,8 @@ enum MT2063_DECT_Avoid_Type {
163struct MT2063_ExclZone_t; 151struct MT2063_ExclZone_t;
164 152
165struct MT2063_ExclZone_t { 153struct MT2063_ExclZone_t {
166 UData_t min_; 154 u32 min_;
167 UData_t max_; 155 u32 max_;
168 struct MT2063_ExclZone_t *next_; 156 struct MT2063_ExclZone_t *next_;
169}; 157};
170 158
@@ -172,48 +160,48 @@ struct MT2063_ExclZone_t {
172 * Structure of data needed for Spur Avoidance 160 * Structure of data needed for Spur Avoidance
173 */ 161 */
174struct MT2063_AvoidSpursData_t { 162struct MT2063_AvoidSpursData_t {
175 UData_t nAS_Algorithm; 163 u32 nAS_Algorithm;
176 UData_t f_ref; 164 u32 f_ref;
177 UData_t f_in; 165 u32 f_in;
178 UData_t f_LO1; 166 u32 f_LO1;
179 UData_t f_if1_Center; 167 u32 f_if1_Center;
180 UData_t f_if1_Request; 168 u32 f_if1_Request;
181 UData_t f_if1_bw; 169 u32 f_if1_bw;
182 UData_t f_LO2; 170 u32 f_LO2;
183 UData_t f_out; 171 u32 f_out;
184 UData_t f_out_bw; 172 u32 f_out_bw;
185 UData_t f_LO1_Step; 173 u32 f_LO1_Step;
186 UData_t f_LO2_Step; 174 u32 f_LO2_Step;
187 UData_t f_LO1_FracN_Avoid; 175 u32 f_LO1_FracN_Avoid;
188 UData_t f_LO2_FracN_Avoid; 176 u32 f_LO2_FracN_Avoid;
189 UData_t f_zif_bw; 177 u32 f_zif_bw;
190 UData_t f_min_LO_Separation; 178 u32 f_min_LO_Separation;
191 UData_t maxH1; 179 u32 maxH1;
192 UData_t maxH2; 180 u32 maxH2;
193 enum MT2063_DECT_Avoid_Type avoidDECT; 181 enum MT2063_DECT_Avoid_Type avoidDECT;
194 UData_t bSpurPresent; 182 u32 bSpurPresent;
195 UData_t bSpurAvoided; 183 u32 bSpurAvoided;
196 UData_t nSpursFound; 184 u32 nSpursFound;
197 UData_t nZones; 185 u32 nZones;
198 struct MT2063_ExclZone_t *freeZones; 186 struct MT2063_ExclZone_t *freeZones;
199 struct MT2063_ExclZone_t *usedZones; 187 struct MT2063_ExclZone_t *usedZones;
200 struct MT2063_ExclZone_t MT2063_ExclZones[MT2063_MAX_ZONES]; 188 struct MT2063_ExclZone_t MT2063_ExclZones[MT2063_MAX_ZONES];
201}; 189};
202 190
203UData_t MT2063_RegisterTuner(struct MT2063_AvoidSpursData_t *pAS_Info); 191u32 MT2063_RegisterTuner(struct MT2063_AvoidSpursData_t *pAS_Info);
204 192
205void MT2063_UnRegisterTuner(struct MT2063_AvoidSpursData_t *pAS_Info); 193void MT2063_UnRegisterTuner(struct MT2063_AvoidSpursData_t *pAS_Info);
206 194
207void MT2063_ResetExclZones(struct MT2063_AvoidSpursData_t *pAS_Info); 195void MT2063_ResetExclZones(struct MT2063_AvoidSpursData_t *pAS_Info);
208 196
209void MT2063_AddExclZone(struct MT2063_AvoidSpursData_t *pAS_Info, 197void MT2063_AddExclZone(struct MT2063_AvoidSpursData_t *pAS_Info,
210 UData_t f_min, UData_t f_max); 198 u32 f_min, u32 f_max);
211 199
212UData_t MT2063_ChooseFirstIF(struct MT2063_AvoidSpursData_t *pAS_Info); 200u32 MT2063_ChooseFirstIF(struct MT2063_AvoidSpursData_t *pAS_Info);
213 201
214UData_t MT2063_AvoidSpurs(Handle_t h, struct MT2063_AvoidSpursData_t *pAS_Info); 202u32 MT2063_AvoidSpurs(void *h, struct MT2063_AvoidSpursData_t *pAS_Info);
215 203
216UData_t MT2063_AvoidSpursVersion(void); 204u32 MT2063_AvoidSpursVersion(void);
217 205
218 206
219/* 207/*
@@ -531,18 +519,18 @@ enum MT2063_Register_Offsets {
531}; 519};
532 520
533struct MT2063_Info_t { 521struct MT2063_Info_t {
534 Handle_t handle; 522 void *handle;
535 Handle_t hUserData; 523 void *hUserData;
536 UData_t address; 524 u32 address;
537 UData_t version; 525 u32 version;
538 UData_t tuner_id; 526 u32 tuner_id;
539 struct MT2063_AvoidSpursData_t AS_Data; 527 struct MT2063_AvoidSpursData_t AS_Data;
540 UData_t f_IF1_actual; 528 u32 f_IF1_actual;
541 UData_t rcvr_mode; 529 u32 rcvr_mode;
542 UData_t ctfilt_sw; 530 u32 ctfilt_sw;
543 UData_t CTFiltMax[31]; 531 u32 CTFiltMax[31];
544 UData_t num_regs; 532 u32 num_regs;
545 U8Data reg[MT2063_REG_END_REGS]; 533 u8 reg[MT2063_REG_END_REGS];
546}; 534};
547typedef struct MT2063_Info_t *pMT2063_Info_t; 535typedef struct MT2063_Info_t *pMT2063_Info_t;
548 536
@@ -562,48 +550,48 @@ enum MTTune_atv_standard {
562 550
563/* ====== Functions which are declared in MT2063.c File ======= */ 551/* ====== Functions which are declared in MT2063.c File ======= */
564 552
565UData_t MT2063_Open(UData_t MT2063_Addr, 553u32 MT2063_Open(u32 MT2063_Addr,
566 Handle_t * hMT2063, Handle_t hUserData); 554 void ** hMT2063, void *hUserData);
567 555
568UData_t MT2063_Close(Handle_t hMT2063); 556u32 MT2063_Close(void *hMT2063);
569 557
570UData_t MT2063_Tune(Handle_t h, UData_t f_in); /* RF input center frequency */ 558u32 MT2063_Tune(void *h, u32 f_in); /* RF input center frequency */
571 559
572UData_t MT2063_GetGPIO(Handle_t h, enum MT2063_GPIO_ID gpio_id, 560u32 MT2063_GetGPIO(void *h, enum MT2063_GPIO_ID gpio_id,
573 enum MT2063_GPIO_Attr attr, UData_t * value); 561 enum MT2063_GPIO_Attr attr, u32 * value);
574 562
575UData_t MT2063_GetLocked(Handle_t h); 563u32 MT2063_GetLocked(void *h);
576 564
577UData_t MT2063_GetParam(Handle_t h, enum MT2063_Param param, UData_t * pValue); 565u32 MT2063_GetParam(void *h, enum MT2063_Param param, u32 * pValue);
578 566
579UData_t MT2063_GetReg(Handle_t h, U8Data reg, U8Data * val); 567u32 MT2063_GetReg(void *h, u8 reg, u8 * val);
580 568
581UData_t MT2063_GetTemp(Handle_t h, enum MT2063_Temperature *value); 569u32 MT2063_GetTemp(void *h, enum MT2063_Temperature *value);
582 570
583UData_t MT2063_GetUserData(Handle_t h, Handle_t * hUserData); 571u32 MT2063_GetUserData(void *h, void ** hUserData);
584 572
585UData_t MT2063_ReInit(Handle_t h); 573u32 MT2063_ReInit(void *h);
586 574
587UData_t MT2063_SetGPIO(Handle_t h, enum MT2063_GPIO_ID gpio_id, 575u32 MT2063_SetGPIO(void *h, enum MT2063_GPIO_ID gpio_id,
588 enum MT2063_GPIO_Attr attr, UData_t value); 576 enum MT2063_GPIO_Attr attr, u32 value);
589 577
590UData_t MT2063_SetParam(Handle_t h, enum MT2063_Param param, UData_t nValue); 578u32 MT2063_SetParam(void *h, enum MT2063_Param param, u32 nValue);
591 579
592UData_t MT2063_SetPowerMaskBits(Handle_t h, enum MT2063_Mask_Bits Bits); 580u32 MT2063_SetPowerMaskBits(void *h, enum MT2063_Mask_Bits Bits);
593 581
594UData_t MT2063_ClearPowerMaskBits(Handle_t h, enum MT2063_Mask_Bits Bits); 582u32 MT2063_ClearPowerMaskBits(void *h, enum MT2063_Mask_Bits Bits);
595 583
596UData_t MT2063_GetPowerMaskBits(Handle_t h, enum MT2063_Mask_Bits *Bits); 584u32 MT2063_GetPowerMaskBits(void *h, enum MT2063_Mask_Bits *Bits);
597 585
598UData_t MT2063_EnableExternalShutdown(Handle_t h, U8Data Enabled); 586u32 MT2063_EnableExternalShutdown(void *h, u8 Enabled);
599 587
600UData_t MT2063_SoftwareShutdown(Handle_t h, U8Data Shutdown); 588u32 MT2063_SoftwareShutdown(void *h, u8 Shutdown);
601 589
602UData_t MT2063_SetExtSRO(Handle_t h, enum MT2063_Ext_SRO Ext_SRO_Setting); 590u32 MT2063_SetExtSRO(void *h, enum MT2063_Ext_SRO Ext_SRO_Setting);
603 591
604UData_t MT2063_SetReg(Handle_t h, U8Data reg, U8Data val); 592u32 MT2063_SetReg(void *h, u8 reg, u8 val);
605 593
606UData_t MT_Tune_atv(Handle_t h, UData_t f_in, UData_t bw_in, 594u32 MT_Tune_atv(void *h, u32 f_in, u32 bw_in,
607 enum MTTune_atv_standard tv_type); 595 enum MTTune_atv_standard tv_type);
608 596
609struct mt2063_config { 597struct mt2063_config {
@@ -619,7 +607,7 @@ struct mt2063_state {
619 struct dvb_frontend *frontend; 607 struct dvb_frontend *frontend;
620 struct tuner_state status; 608 struct tuner_state status;
621 const struct MT2063_Info_t *MT2063_ht; 609 const struct MT2063_Info_t *MT2063_ht;
622 enum Bool_t MT2063_init; 610 bool MT2063_init;
623 611
624 enum MTTune_atv_standard tv_type; 612 enum MTTune_atv_standard tv_type;
625 u32 frequency; 613 u32 frequency;