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authorLinus Torvalds <torvalds@linux-foundation.org>2011-03-22 13:05:27 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-03-22 13:05:27 -0400
commit75ea6358bc7d97630a8edc2b89c930de118cf7eb (patch)
treee77a60e46844adf71758bad41d77d40658acd7eb /drivers
parent14577beb8293c187a12d2e78ac6250d5dcec2190 (diff)
parent97491ba3f64c2137101efdfe7593305d692d7d63 (diff)
Merge branch 'for-linus/2639/i2c-2' of git://git.fluff.org/bjdooks/linux
* 'for-linus/2639/i2c-2' of git://git.fluff.org/bjdooks/linux: i2c-pxa2xx: Don't clear isr bits too early i2c-pxa2xx: Fix register offsets i2c-pxa2xx: pass of_node from platform driver to adapter and publish i2c-pxa2xx: check timeout correctly i2c-pxa2xx: add support for shared IRQ handler i2c-pxa2xx: Add PCI support for PXA I2C controller ARM: pxa2xx: reorganize I2C files i2c-pxa2xx: use dynamic register layout i2c-mxs: set controller to pio queue mode after reset i2c-eg20t: support new device OKI SEMICONDUCTOR ML7213 IOH i2c/busses: Add support for Diolan U2C-12 USB-I2C adapter
Diffstat (limited to 'drivers')
-rw-r--r--drivers/i2c/busses/Kconfig32
-rw-r--r--drivers/i2c/busses/Makefile2
-rw-r--r--drivers/i2c/busses/i2c-diolan-u2c.c535
-rw-r--r--drivers/i2c/busses/i2c-eg20t.c161
-rw-r--r--drivers/i2c/busses/i2c-mxs.c4
-rw-r--r--drivers/i2c/busses/i2c-pxa-pci.c176
-rw-r--r--drivers/i2c/busses/i2c-pxa.c115
7 files changed, 927 insertions, 98 deletions
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index ad415e6ec5a1..326652f673f7 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -547,15 +547,18 @@ config I2C_PUV3
547 547
548config I2C_PXA 548config I2C_PXA
549 tristate "Intel PXA2XX I2C adapter" 549 tristate "Intel PXA2XX I2C adapter"
550 depends on ARCH_PXA || ARCH_MMP 550 depends on ARCH_PXA || ARCH_MMP || (X86_32 && PCI && OF)
551 help 551 help
552 If you have devices in the PXA I2C bus, say yes to this option. 552 If you have devices in the PXA I2C bus, say yes to this option.
553 This driver can also be built as a module. If so, the module 553 This driver can also be built as a module. If so, the module
554 will be called i2c-pxa. 554 will be called i2c-pxa.
555 555
556config I2C_PXA_PCI
557 def_bool I2C_PXA && X86_32 && PCI && OF
558
556config I2C_PXA_SLAVE 559config I2C_PXA_SLAVE
557 bool "Intel PXA2XX I2C Slave comms support" 560 bool "Intel PXA2XX I2C Slave comms support"
558 depends on I2C_PXA 561 depends on I2C_PXA && !X86_32
559 help 562 help
560 Support I2C slave mode communications on the PXA I2C bus. This 563 Support I2C slave mode communications on the PXA I2C bus. This
561 is necessary for systems where the PXA may be a target on the 564 is necessary for systems where the PXA may be a target on the
@@ -668,15 +671,28 @@ config I2C_XILINX
668 will be called xilinx_i2c. 671 will be called xilinx_i2c.
669 672
670config I2C_EG20T 673config I2C_EG20T
671 tristate "PCH I2C of Intel EG20T" 674 tristate "Intel EG20T PCH/OKI SEMICONDUCTOR ML7213 IOH"
672 depends on PCI 675 depends on PCI
673 help 676 help
674 This driver is for PCH(Platform controller Hub) I2C of EG20T which 677 This driver is for PCH(Platform controller Hub) I2C of EG20T which
675 is an IOH(Input/Output Hub) for x86 embedded processor. 678 is an IOH(Input/Output Hub) for x86 embedded processor.
676 This driver can access PCH I2C bus device. 679 This driver can access PCH I2C bus device.
680
681 This driver also supports the ML7213, a companion chip for the
682 Atom E6xx series and compatible with the Intel EG20T PCH.
677 683
678comment "External I2C/SMBus adapter drivers" 684comment "External I2C/SMBus adapter drivers"
679 685
686config I2C_DIOLAN_U2C
687 tristate "Diolan U2C-12 USB adapter"
688 depends on USB
689 help
690 If you say yes to this option, support will be included for Diolan
691 U2C-12, a USB to I2C interface.
692
693 This driver can also be built as a module. If so, the module
694 will be called i2c-diolan-u2c.
695
680config I2C_PARPORT 696config I2C_PARPORT
681 tristate "Parallel port adapter" 697 tristate "Parallel port adapter"
682 depends on PARPORT 698 depends on PARPORT
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 3878c959d4fa..e6cf294d3729 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -54,6 +54,7 @@ obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o
54obj-$(CONFIG_I2C_PNX) += i2c-pnx.o 54obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
55obj-$(CONFIG_I2C_PUV3) += i2c-puv3.o 55obj-$(CONFIG_I2C_PUV3) += i2c-puv3.o
56obj-$(CONFIG_I2C_PXA) += i2c-pxa.o 56obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
57obj-$(CONFIG_I2C_PXA_PCI) += i2c-pxa-pci.o
57obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o 58obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o
58obj-$(CONFIG_I2C_S6000) += i2c-s6000.o 59obj-$(CONFIG_I2C_S6000) += i2c-s6000.o
59obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o 60obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o
@@ -67,6 +68,7 @@ obj-$(CONFIG_I2C_XILINX) += i2c-xiic.o
67obj-$(CONFIG_I2C_EG20T) += i2c-eg20t.o 68obj-$(CONFIG_I2C_EG20T) += i2c-eg20t.o
68 69
69# External I2C/SMBus adapter drivers 70# External I2C/SMBus adapter drivers
71obj-$(CONFIG_I2C_DIOLAN_U2C) += i2c-diolan-u2c.o
70obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o 72obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o
71obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o 73obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o
72obj-$(CONFIG_I2C_TAOS_EVM) += i2c-taos-evm.o 74obj-$(CONFIG_I2C_TAOS_EVM) += i2c-taos-evm.o
diff --git a/drivers/i2c/busses/i2c-diolan-u2c.c b/drivers/i2c/busses/i2c-diolan-u2c.c
new file mode 100644
index 000000000000..76366716a854
--- /dev/null
+++ b/drivers/i2c/busses/i2c-diolan-u2c.c
@@ -0,0 +1,535 @@
1/*
2 * Driver for the Diolan u2c-12 USB-I2C adapter
3 *
4 * Copyright (c) 2010-2011 Ericsson AB
5 *
6 * Derived from:
7 * i2c-tiny-usb.c
8 * Copyright (C) 2006-2007 Till Harbaum (Till@Harbaum.org)
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation, version 2.
13 */
14
15#include <linux/kernel.h>
16#include <linux/errno.h>
17#include <linux/module.h>
18#include <linux/types.h>
19#include <linux/slab.h>
20#include <linux/usb.h>
21#include <linux/i2c.h>
22
23#define DRIVER_NAME "i2c-diolan-u2c"
24
25#define USB_VENDOR_ID_DIOLAN 0x0abf
26#define USB_DEVICE_ID_DIOLAN_U2C 0x3370
27
28#define DIOLAN_OUT_EP 0x02
29#define DIOLAN_IN_EP 0x84
30
31/* commands via USB, must match command ids in the firmware */
32#define CMD_I2C_READ 0x01
33#define CMD_I2C_WRITE 0x02
34#define CMD_I2C_SCAN 0x03 /* Returns list of detected devices */
35#define CMD_I2C_RELEASE_SDA 0x04
36#define CMD_I2C_RELEASE_SCL 0x05
37#define CMD_I2C_DROP_SDA 0x06
38#define CMD_I2C_DROP_SCL 0x07
39#define CMD_I2C_READ_SDA 0x08
40#define CMD_I2C_READ_SCL 0x09
41#define CMD_GET_FW_VERSION 0x0a
42#define CMD_GET_SERIAL 0x0b
43#define CMD_I2C_START 0x0c
44#define CMD_I2C_STOP 0x0d
45#define CMD_I2C_REPEATED_START 0x0e
46#define CMD_I2C_PUT_BYTE 0x0f
47#define CMD_I2C_GET_BYTE 0x10
48#define CMD_I2C_PUT_ACK 0x11
49#define CMD_I2C_GET_ACK 0x12
50#define CMD_I2C_PUT_BYTE_ACK 0x13
51#define CMD_I2C_GET_BYTE_ACK 0x14
52#define CMD_I2C_SET_SPEED 0x1b
53#define CMD_I2C_GET_SPEED 0x1c
54#define CMD_I2C_SET_CLK_SYNC 0x24
55#define CMD_I2C_GET_CLK_SYNC 0x25
56#define CMD_I2C_SET_CLK_SYNC_TO 0x26
57#define CMD_I2C_GET_CLK_SYNC_TO 0x27
58
59#define RESP_OK 0x00
60#define RESP_FAILED 0x01
61#define RESP_BAD_MEMADDR 0x04
62#define RESP_DATA_ERR 0x05
63#define RESP_NOT_IMPLEMENTED 0x06
64#define RESP_NACK 0x07
65#define RESP_TIMEOUT 0x09
66
67#define U2C_I2C_SPEED_FAST 0 /* 400 kHz */
68#define U2C_I2C_SPEED_STD 1 /* 100 kHz */
69#define U2C_I2C_SPEED_2KHZ 242 /* 2 kHz, minimum speed */
70#define U2C_I2C_SPEED(f) ((DIV_ROUND_UP(1000000, (f)) - 10) / 2 + 1)
71
72#define U2C_I2C_FREQ_FAST 400000
73#define U2C_I2C_FREQ_STD 100000
74#define U2C_I2C_FREQ(s) (1000000 / (2 * (s - 1) + 10))
75
76#define DIOLAN_USB_TIMEOUT 100 /* in ms */
77#define DIOLAN_SYNC_TIMEOUT 20 /* in ms */
78
79#define DIOLAN_OUTBUF_LEN 128
80#define DIOLAN_FLUSH_LEN (DIOLAN_OUTBUF_LEN - 4)
81#define DIOLAN_INBUF_LEN 256 /* Maximum supported receive length */
82
83/* Structure to hold all of our device specific stuff */
84struct i2c_diolan_u2c {
85 u8 obuffer[DIOLAN_OUTBUF_LEN]; /* output buffer */
86 u8 ibuffer[DIOLAN_INBUF_LEN]; /* input buffer */
87 struct usb_device *usb_dev; /* the usb device for this device */
88 struct usb_interface *interface;/* the interface for this device */
89 struct i2c_adapter adapter; /* i2c related things */
90 int olen; /* Output buffer length */
91 int ocount; /* Number of enqueued messages */
92};
93
94static uint frequency = U2C_I2C_FREQ_STD; /* I2C clock frequency in Hz */
95
96module_param(frequency, uint, S_IRUGO | S_IWUSR);
97MODULE_PARM_DESC(frequency, "I2C clock frequency in hertz");
98
99/* usb layer */
100
101/* Send command to device, and get response. */
102static int diolan_usb_transfer(struct i2c_diolan_u2c *dev)
103{
104 int ret = 0;
105 int actual;
106 int i;
107
108 if (!dev->olen || !dev->ocount)
109 return -EINVAL;
110
111 ret = usb_bulk_msg(dev->usb_dev,
112 usb_sndbulkpipe(dev->usb_dev, DIOLAN_OUT_EP),
113 dev->obuffer, dev->olen, &actual,
114 DIOLAN_USB_TIMEOUT);
115 if (!ret) {
116 for (i = 0; i < dev->ocount; i++) {
117 int tmpret;
118
119 tmpret = usb_bulk_msg(dev->usb_dev,
120 usb_rcvbulkpipe(dev->usb_dev,
121 DIOLAN_IN_EP),
122 dev->ibuffer,
123 sizeof(dev->ibuffer), &actual,
124 DIOLAN_USB_TIMEOUT);
125 /*
126 * Stop command processing if a previous command
127 * returned an error.
128 * Note that we still need to retrieve all messages.
129 */
130 if (ret < 0)
131 continue;
132 ret = tmpret;
133 if (ret == 0 && actual > 0) {
134 switch (dev->ibuffer[actual - 1]) {
135 case RESP_NACK:
136 /*
137 * Return ENXIO if NACK was received as
138 * response to the address phase,
139 * EIO otherwise
140 */
141 ret = i == 1 ? -ENXIO : -EIO;
142 break;
143 case RESP_TIMEOUT:
144 ret = -ETIMEDOUT;
145 break;
146 case RESP_OK:
147 /* strip off return code */
148 ret = actual - 1;
149 break;
150 default:
151 ret = -EIO;
152 break;
153 }
154 }
155 }
156 }
157 dev->olen = 0;
158 dev->ocount = 0;
159 return ret;
160}
161
162static int diolan_write_cmd(struct i2c_diolan_u2c *dev, bool flush)
163{
164 if (flush || dev->olen >= DIOLAN_FLUSH_LEN)
165 return diolan_usb_transfer(dev);
166 return 0;
167}
168
169/* Send command (no data) */
170static int diolan_usb_cmd(struct i2c_diolan_u2c *dev, u8 command, bool flush)
171{
172 dev->obuffer[dev->olen++] = command;
173 dev->ocount++;
174 return diolan_write_cmd(dev, flush);
175}
176
177/* Send command with one byte of data */
178static int diolan_usb_cmd_data(struct i2c_diolan_u2c *dev, u8 command, u8 data,
179 bool flush)
180{
181 dev->obuffer[dev->olen++] = command;
182 dev->obuffer[dev->olen++] = data;
183 dev->ocount++;
184 return diolan_write_cmd(dev, flush);
185}
186
187/* Send command with two bytes of data */
188static int diolan_usb_cmd_data2(struct i2c_diolan_u2c *dev, u8 command, u8 d1,
189 u8 d2, bool flush)
190{
191 dev->obuffer[dev->olen++] = command;
192 dev->obuffer[dev->olen++] = d1;
193 dev->obuffer[dev->olen++] = d2;
194 dev->ocount++;
195 return diolan_write_cmd(dev, flush);
196}
197
198/*
199 * Flush input queue.
200 * If we don't do this at startup and the controller has queued up
201 * messages which were not retrieved, it will stop responding
202 * at some point.
203 */
204static void diolan_flush_input(struct i2c_diolan_u2c *dev)
205{
206 int i;
207
208 for (i = 0; i < 10; i++) {
209 int actual = 0;
210 int ret;
211
212 ret = usb_bulk_msg(dev->usb_dev,
213 usb_rcvbulkpipe(dev->usb_dev, DIOLAN_IN_EP),
214 dev->ibuffer, sizeof(dev->ibuffer), &actual,
215 DIOLAN_USB_TIMEOUT);
216 if (ret < 0 || actual == 0)
217 break;
218 }
219 if (i == 10)
220 dev_err(&dev->interface->dev, "Failed to flush input buffer\n");
221}
222
223static int diolan_i2c_start(struct i2c_diolan_u2c *dev)
224{
225 return diolan_usb_cmd(dev, CMD_I2C_START, false);
226}
227
228static int diolan_i2c_repeated_start(struct i2c_diolan_u2c *dev)
229{
230 return diolan_usb_cmd(dev, CMD_I2C_REPEATED_START, false);
231}
232
233static int diolan_i2c_stop(struct i2c_diolan_u2c *dev)
234{
235 return diolan_usb_cmd(dev, CMD_I2C_STOP, true);
236}
237
238static int diolan_i2c_get_byte_ack(struct i2c_diolan_u2c *dev, bool ack,
239 u8 *byte)
240{
241 int ret;
242
243 ret = diolan_usb_cmd_data(dev, CMD_I2C_GET_BYTE_ACK, ack, true);
244 if (ret > 0)
245 *byte = dev->ibuffer[0];
246 else if (ret == 0)
247 ret = -EIO;
248
249 return ret;
250}
251
252static int diolan_i2c_put_byte_ack(struct i2c_diolan_u2c *dev, u8 byte)
253{
254 return diolan_usb_cmd_data(dev, CMD_I2C_PUT_BYTE_ACK, byte, false);
255}
256
257static int diolan_set_speed(struct i2c_diolan_u2c *dev, u8 speed)
258{
259 return diolan_usb_cmd_data(dev, CMD_I2C_SET_SPEED, speed, true);
260}
261
262/* Enable or disable clock synchronization (stretching) */
263static int diolan_set_clock_synch(struct i2c_diolan_u2c *dev, bool enable)
264{
265 return diolan_usb_cmd_data(dev, CMD_I2C_SET_CLK_SYNC, enable, true);
266}
267
268/* Set clock synchronization timeout in ms */
269static int diolan_set_clock_synch_timeout(struct i2c_diolan_u2c *dev, int ms)
270{
271 int to_val = ms * 10;
272
273 return diolan_usb_cmd_data2(dev, CMD_I2C_SET_CLK_SYNC_TO,
274 to_val & 0xff, (to_val >> 8) & 0xff, true);
275}
276
277static void diolan_fw_version(struct i2c_diolan_u2c *dev)
278{
279 int ret;
280
281 ret = diolan_usb_cmd(dev, CMD_GET_FW_VERSION, true);
282 if (ret >= 2)
283 dev_info(&dev->interface->dev,
284 "Diolan U2C firmware version %u.%u\n",
285 (unsigned int)dev->ibuffer[0],
286 (unsigned int)dev->ibuffer[1]);
287}
288
289static void diolan_get_serial(struct i2c_diolan_u2c *dev)
290{
291 int ret;
292 u32 serial;
293
294 ret = diolan_usb_cmd(dev, CMD_GET_SERIAL, true);
295 if (ret >= 4) {
296 serial = le32_to_cpu(*(u32 *)dev->ibuffer);
297 dev_info(&dev->interface->dev,
298 "Diolan U2C serial number %u\n", serial);
299 }
300}
301
302static int diolan_init(struct i2c_diolan_u2c *dev)
303{
304 int speed, ret;
305
306 if (frequency >= 200000) {
307 speed = U2C_I2C_SPEED_FAST;
308 frequency = U2C_I2C_FREQ_FAST;
309 } else if (frequency >= 100000 || frequency == 0) {
310 speed = U2C_I2C_SPEED_STD;
311 frequency = U2C_I2C_FREQ_STD;
312 } else {
313 speed = U2C_I2C_SPEED(frequency);
314 if (speed > U2C_I2C_SPEED_2KHZ)
315 speed = U2C_I2C_SPEED_2KHZ;
316 frequency = U2C_I2C_FREQ(speed);
317 }
318
319 dev_info(&dev->interface->dev,
320 "Diolan U2C at USB bus %03d address %03d speed %d Hz\n",
321 dev->usb_dev->bus->busnum, dev->usb_dev->devnum, frequency);
322
323 diolan_flush_input(dev);
324 diolan_fw_version(dev);
325 diolan_get_serial(dev);
326
327 /* Set I2C speed */
328 ret = diolan_set_speed(dev, speed);
329 if (ret < 0)
330 return ret;
331
332 /* Configure I2C clock synchronization */
333 ret = diolan_set_clock_synch(dev, speed != U2C_I2C_SPEED_FAST);
334 if (ret < 0)
335 return ret;
336
337 if (speed != U2C_I2C_SPEED_FAST)
338 ret = diolan_set_clock_synch_timeout(dev, DIOLAN_SYNC_TIMEOUT);
339
340 return ret;
341}
342
343/* i2c layer */
344
345static int diolan_usb_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
346 int num)
347{
348 struct i2c_diolan_u2c *dev = i2c_get_adapdata(adapter);
349 struct i2c_msg *pmsg;
350 int i, j;
351 int ret, sret;
352
353 ret = diolan_i2c_start(dev);
354 if (ret < 0)
355 return ret;
356
357 for (i = 0; i < num; i++) {
358 pmsg = &msgs[i];
359 if (i) {
360 ret = diolan_i2c_repeated_start(dev);
361 if (ret < 0)
362 goto abort;
363 }
364 if (pmsg->flags & I2C_M_RD) {
365 ret =
366 diolan_i2c_put_byte_ack(dev, (pmsg->addr << 1) | 1);
367 if (ret < 0)
368 goto abort;
369 for (j = 0; j < pmsg->len; j++) {
370 u8 byte;
371 bool ack = j < pmsg->len - 1;
372
373 /*
374 * Don't send NACK if this is the first byte
375 * of a SMBUS_BLOCK message.
376 */
377 if (j == 0 && (pmsg->flags & I2C_M_RECV_LEN))
378 ack = true;
379
380 ret = diolan_i2c_get_byte_ack(dev, ack, &byte);
381 if (ret < 0)
382 goto abort;
383 /*
384 * Adjust count if first received byte is length
385 */
386 if (j == 0 && (pmsg->flags & I2C_M_RECV_LEN)) {
387 if (byte == 0
388 || byte > I2C_SMBUS_BLOCK_MAX) {
389 ret = -EPROTO;
390 goto abort;
391 }
392 pmsg->len += byte;
393 }
394 pmsg->buf[j] = byte;
395 }
396 } else {
397 ret = diolan_i2c_put_byte_ack(dev, pmsg->addr << 1);
398 if (ret < 0)
399 goto abort;
400 for (j = 0; j < pmsg->len; j++) {
401 ret = diolan_i2c_put_byte_ack(dev,
402 pmsg->buf[j]);
403 if (ret < 0)
404 goto abort;
405 }
406 }
407 }
408abort:
409 sret = diolan_i2c_stop(dev);
410 if (sret < 0 && ret >= 0)
411 ret = sret;
412 return ret;
413}
414
415/*
416 * Return list of supported functionality.
417 */
418static u32 diolan_usb_func(struct i2c_adapter *a)
419{
420 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
421 I2C_FUNC_SMBUS_READ_BLOCK_DATA | I2C_FUNC_SMBUS_BLOCK_PROC_CALL;
422}
423
424static const struct i2c_algorithm diolan_usb_algorithm = {
425 .master_xfer = diolan_usb_xfer,
426 .functionality = diolan_usb_func,
427};
428
429/* device layer */
430
431static const struct usb_device_id diolan_u2c_table[] = {
432 { USB_DEVICE(USB_VENDOR_ID_DIOLAN, USB_DEVICE_ID_DIOLAN_U2C) },
433 { }
434};
435
436MODULE_DEVICE_TABLE(usb, diolan_u2c_table);
437
438static void diolan_u2c_free(struct i2c_diolan_u2c *dev)
439{
440 usb_put_dev(dev->usb_dev);
441 kfree(dev);
442}
443
444static int diolan_u2c_probe(struct usb_interface *interface,
445 const struct usb_device_id *id)
446{
447 struct i2c_diolan_u2c *dev;
448 int ret;
449
450 /* allocate memory for our device state and initialize it */
451 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
452 if (dev == NULL) {
453 dev_err(&interface->dev, "no memory for device state\n");
454 ret = -ENOMEM;
455 goto error;
456 }
457
458 dev->usb_dev = usb_get_dev(interface_to_usbdev(interface));
459 dev->interface = interface;
460
461 /* save our data pointer in this interface device */
462 usb_set_intfdata(interface, dev);
463
464 /* setup i2c adapter description */
465 dev->adapter.owner = THIS_MODULE;
466 dev->adapter.class = I2C_CLASS_HWMON;
467 dev->adapter.algo = &diolan_usb_algorithm;
468 i2c_set_adapdata(&dev->adapter, dev);
469 snprintf(dev->adapter.name, sizeof(dev->adapter.name),
470 DRIVER_NAME " at bus %03d device %03d",
471 dev->usb_dev->bus->busnum, dev->usb_dev->devnum);
472
473 dev->adapter.dev.parent = &dev->interface->dev;
474
475 /* initialize diolan i2c interface */
476 ret = diolan_init(dev);
477 if (ret < 0) {
478 dev_err(&interface->dev, "failed to initialize adapter\n");
479 goto error_free;
480 }
481
482 /* and finally attach to i2c layer */
483 ret = i2c_add_adapter(&dev->adapter);
484 if (ret < 0) {
485 dev_err(&interface->dev, "failed to add I2C adapter\n");
486 goto error_free;
487 }
488
489 dev_dbg(&interface->dev, "connected " DRIVER_NAME "\n");
490
491 return 0;
492
493error_free:
494 usb_set_intfdata(interface, NULL);
495 diolan_u2c_free(dev);
496error:
497 return ret;
498}
499
500static void diolan_u2c_disconnect(struct usb_interface *interface)
501{
502 struct i2c_diolan_u2c *dev = usb_get_intfdata(interface);
503
504 i2c_del_adapter(&dev->adapter);
505 usb_set_intfdata(interface, NULL);
506 diolan_u2c_free(dev);
507
508 dev_dbg(&interface->dev, "disconnected\n");
509}
510
511static struct usb_driver diolan_u2c_driver = {
512 .name = DRIVER_NAME,
513 .probe = diolan_u2c_probe,
514 .disconnect = diolan_u2c_disconnect,
515 .id_table = diolan_u2c_table,
516};
517
518static int __init diolan_u2c_init(void)
519{
520 /* register this driver with the USB subsystem */
521 return usb_register(&diolan_u2c_driver);
522}
523
524static void __exit diolan_u2c_exit(void)
525{
526 /* deregister this driver with the USB subsystem */
527 usb_deregister(&diolan_u2c_driver);
528}
529
530module_init(diolan_u2c_init);
531module_exit(diolan_u2c_exit);
532
533MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>");
534MODULE_DESCRIPTION(DRIVER_NAME " driver");
535MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index 50ea1f43bdc1..878a12026af2 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -132,6 +132,13 @@
132#define pch_pci_dbg(pdev, fmt, arg...) \ 132#define pch_pci_dbg(pdev, fmt, arg...) \
133 dev_dbg(&pdev->dev, "%s :" fmt, __func__, ##arg) 133 dev_dbg(&pdev->dev, "%s :" fmt, __func__, ##arg)
134 134
135/*
136Set the number of I2C instance max
137Intel EG20T PCH : 1ch
138OKI SEMICONDUCTOR ML7213 IOH : 2ch
139*/
140#define PCH_I2C_MAX_DEV 2
141
135/** 142/**
136 * struct i2c_algo_pch_data - for I2C driver functionalities 143 * struct i2c_algo_pch_data - for I2C driver functionalities
137 * @pch_adapter: stores the reference to i2c_adapter structure 144 * @pch_adapter: stores the reference to i2c_adapter structure
@@ -156,12 +163,14 @@ struct i2c_algo_pch_data {
156 * @pch_data: stores a list of i2c_algo_pch_data 163 * @pch_data: stores a list of i2c_algo_pch_data
157 * @pch_i2c_suspended: specifies whether the system is suspended or not 164 * @pch_i2c_suspended: specifies whether the system is suspended or not
158 * perhaps with more lines and words. 165 * perhaps with more lines and words.
166 * @ch_num: specifies the number of i2c instance
159 * 167 *
160 * pch_data has as many elements as maximum I2C channels 168 * pch_data has as many elements as maximum I2C channels
161 */ 169 */
162struct adapter_info { 170struct adapter_info {
163 struct i2c_algo_pch_data pch_data; 171 struct i2c_algo_pch_data pch_data[PCH_I2C_MAX_DEV];
164 bool pch_i2c_suspended; 172 bool pch_i2c_suspended;
173 int ch_num;
165}; 174};
166 175
167 176
@@ -170,8 +179,13 @@ static int pch_clk = 50000; /* specifies I2C clock speed in KHz */
170static wait_queue_head_t pch_event; 179static wait_queue_head_t pch_event;
171static DEFINE_MUTEX(pch_mutex); 180static DEFINE_MUTEX(pch_mutex);
172 181
182/* Definition for ML7213 by OKI SEMICONDUCTOR */
183#define PCI_VENDOR_ID_ROHM 0x10DB
184#define PCI_DEVICE_ID_ML7213_I2C 0x802D
185
173static struct pci_device_id __devinitdata pch_pcidev_id[] = { 186static struct pci_device_id __devinitdata pch_pcidev_id[] = {
174 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PCH_I2C)}, 187 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PCH_I2C), 1, },
188 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_I2C), 2, },
175 {0,} 189 {0,}
176}; 190};
177 191
@@ -212,8 +226,7 @@ static void pch_i2c_init(struct i2c_algo_pch_data *adap)
212 /* Initialize I2C registers */ 226 /* Initialize I2C registers */
213 iowrite32(0x21, p + PCH_I2CNF); 227 iowrite32(0x21, p + PCH_I2CNF);
214 228
215 pch_setbit(adap->pch_base_address, PCH_I2CCTL, 229 pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_I2CCTL_I2CMEN);
216 PCH_I2CCTL_I2CMEN);
217 230
218 if (pch_i2c_speed != 400) 231 if (pch_i2c_speed != 400)
219 pch_i2c_speed = 100; 232 pch_i2c_speed = 100;
@@ -255,7 +268,7 @@ static inline bool ktime_lt(const ktime_t cmp1, const ktime_t cmp2)
255 * @timeout: waiting time counter (us). 268 * @timeout: waiting time counter (us).
256 */ 269 */
257static s32 pch_i2c_wait_for_bus_idle(struct i2c_algo_pch_data *adap, 270static s32 pch_i2c_wait_for_bus_idle(struct i2c_algo_pch_data *adap,
258 s32 timeout) 271 s32 timeout)
259{ 272{
260 void __iomem *p = adap->pch_base_address; 273 void __iomem *p = adap->pch_base_address;
261 274
@@ -475,8 +488,8 @@ static void pch_i2c_sendnack(struct i2c_algo_pch_data *adap)
475 * @last: specifies whether last message or not. 488 * @last: specifies whether last message or not.
476 * @first: specifies whether first message or not. 489 * @first: specifies whether first message or not.
477 */ 490 */
478s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, 491static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
479 u32 last, u32 first) 492 u32 last, u32 first)
480{ 493{
481 struct i2c_algo_pch_data *adap = i2c_adap->algo_data; 494 struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
482 495
@@ -569,10 +582,10 @@ s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
569} 582}
570 583
571/** 584/**
572 * pch_i2c_cb_ch0() - Interrupt handler Call back function 585 * pch_i2c_cb() - Interrupt handler Call back function
573 * @adap: Pointer to struct i2c_algo_pch_data. 586 * @adap: Pointer to struct i2c_algo_pch_data.
574 */ 587 */
575static void pch_i2c_cb_ch0(struct i2c_algo_pch_data *adap) 588static void pch_i2c_cb(struct i2c_algo_pch_data *adap)
576{ 589{
577 u32 sts; 590 u32 sts;
578 void __iomem *p = adap->pch_base_address; 591 void __iomem *p = adap->pch_base_address;
@@ -600,24 +613,30 @@ static void pch_i2c_cb_ch0(struct i2c_algo_pch_data *adap)
600 */ 613 */
601static irqreturn_t pch_i2c_handler(int irq, void *pData) 614static irqreturn_t pch_i2c_handler(int irq, void *pData)
602{ 615{
603 s32 reg_val; 616 u32 reg_val;
604 617 int flag;
605 struct i2c_algo_pch_data *adap_data = (struct i2c_algo_pch_data *)pData; 618 int i;
606 void __iomem *p = adap_data->pch_base_address; 619 struct adapter_info *adap_info = pData;
607 u32 mode = ioread32(p + PCH_I2CMOD) & (BUFFER_MODE | EEPROM_SR_MODE); 620 void __iomem *p;
608 621 u32 mode;
609 if (mode != NORMAL_MODE) { 622
610 pch_err(adap_data, "I2C mode is not supported\n"); 623 for (i = 0, flag = 0; i < adap_info->ch_num; i++) {
611 return IRQ_NONE; 624 p = adap_info->pch_data[i].pch_base_address;
625 mode = ioread32(p + PCH_I2CMOD);
626 mode &= BUFFER_MODE | EEPROM_SR_MODE;
627 if (mode != NORMAL_MODE) {
628 pch_err(adap_info->pch_data,
629 "I2C-%d mode(%d) is not supported\n", mode, i);
630 continue;
631 }
632 reg_val = ioread32(p + PCH_I2CSR);
633 if (reg_val & (I2CMAL_BIT | I2CMCF_BIT | I2CMIF_BIT)) {
634 pch_i2c_cb(&adap_info->pch_data[i]);
635 flag = 1;
636 }
612 } 637 }
613 638
614 reg_val = ioread32(p + PCH_I2CSR); 639 return flag ? IRQ_HANDLED : IRQ_NONE;
615 if (reg_val & (I2CMAL_BIT | I2CMCF_BIT | I2CMIF_BIT))
616 pch_i2c_cb_ch0(adap_data);
617 else
618 return IRQ_NONE;
619
620 return IRQ_HANDLED;
621} 640}
622 641
623/** 642/**
@@ -627,7 +646,7 @@ static irqreturn_t pch_i2c_handler(int irq, void *pData)
627 * @num: number of messages. 646 * @num: number of messages.
628 */ 647 */
629static s32 pch_i2c_xfer(struct i2c_adapter *i2c_adap, 648static s32 pch_i2c_xfer(struct i2c_adapter *i2c_adap,
630 struct i2c_msg *msgs, s32 num) 649 struct i2c_msg *msgs, s32 num)
631{ 650{
632 struct i2c_msg *pmsg; 651 struct i2c_msg *pmsg;
633 u32 i = 0; 652 u32 i = 0;
@@ -710,11 +729,13 @@ static void pch_i2c_disbl_int(struct i2c_algo_pch_data *adap)
710} 729}
711 730
712static int __devinit pch_i2c_probe(struct pci_dev *pdev, 731static int __devinit pch_i2c_probe(struct pci_dev *pdev,
713 const struct pci_device_id *id) 732 const struct pci_device_id *id)
714{ 733{
715 void __iomem *base_addr; 734 void __iomem *base_addr;
716 s32 ret; 735 int ret;
736 int i, j;
717 struct adapter_info *adap_info; 737 struct adapter_info *adap_info;
738 struct i2c_adapter *pch_adap;
718 739
719 pch_pci_dbg(pdev, "Entered.\n"); 740 pch_pci_dbg(pdev, "Entered.\n");
720 741
@@ -744,44 +765,48 @@ static int __devinit pch_i2c_probe(struct pci_dev *pdev,
744 goto err_pci_iomap; 765 goto err_pci_iomap;
745 } 766 }
746 767
747 adap_info->pch_i2c_suspended = false; 768 /* Set the number of I2C channel instance */
769 adap_info->ch_num = id->driver_data;
748 770
749 adap_info->pch_data.p_adapter_info = adap_info; 771 for (i = 0; i < adap_info->ch_num; i++) {
772 pch_adap = &adap_info->pch_data[i].pch_adapter;
773 adap_info->pch_i2c_suspended = false;
750 774
751 adap_info->pch_data.pch_adapter.owner = THIS_MODULE; 775 adap_info->pch_data[i].p_adapter_info = adap_info;
752 adap_info->pch_data.pch_adapter.class = I2C_CLASS_HWMON;
753 strcpy(adap_info->pch_data.pch_adapter.name, KBUILD_MODNAME);
754 adap_info->pch_data.pch_adapter.algo = &pch_algorithm;
755 adap_info->pch_data.pch_adapter.algo_data =
756 &adap_info->pch_data;
757 776
758 /* (i * 0x80) + base_addr; */ 777 pch_adap->owner = THIS_MODULE;
759 adap_info->pch_data.pch_base_address = base_addr; 778 pch_adap->class = I2C_CLASS_HWMON;
779 strcpy(pch_adap->name, KBUILD_MODNAME);
780 pch_adap->algo = &pch_algorithm;
781 pch_adap->algo_data = &adap_info->pch_data[i];
760 782
761 adap_info->pch_data.pch_adapter.dev.parent = &pdev->dev; 783 /* base_addr + offset; */
784 adap_info->pch_data[i].pch_base_address = base_addr + 0x100 * i;
762 785
763 ret = i2c_add_adapter(&(adap_info->pch_data.pch_adapter)); 786 pch_adap->dev.parent = &pdev->dev;
764 787
765 if (ret) { 788 ret = i2c_add_adapter(pch_adap);
766 pch_pci_err(pdev, "i2c_add_adapter FAILED\n"); 789 if (ret) {
767 goto err_i2c_add_adapter; 790 pch_pci_err(pdev, "i2c_add_adapter[ch:%d] FAILED\n", i);
768 } 791 goto err_i2c_add_adapter;
792 }
769 793
770 pch_i2c_init(&adap_info->pch_data); 794 pch_i2c_init(&adap_info->pch_data[i]);
795 }
771 ret = request_irq(pdev->irq, pch_i2c_handler, IRQF_SHARED, 796 ret = request_irq(pdev->irq, pch_i2c_handler, IRQF_SHARED,
772 KBUILD_MODNAME, &adap_info->pch_data); 797 KBUILD_MODNAME, adap_info);
773 if (ret) { 798 if (ret) {
774 pch_pci_err(pdev, "request_irq FAILED\n"); 799 pch_pci_err(pdev, "request_irq FAILED\n");
775 goto err_request_irq; 800 goto err_i2c_add_adapter;
776 } 801 }
777 802
778 pci_set_drvdata(pdev, adap_info); 803 pci_set_drvdata(pdev, adap_info);
779 pch_pci_dbg(pdev, "returns %d.\n", ret); 804 pch_pci_dbg(pdev, "returns %d.\n", ret);
780 return 0; 805 return 0;
781 806
782err_request_irq:
783 i2c_del_adapter(&(adap_info->pch_data.pch_adapter));
784err_i2c_add_adapter: 807err_i2c_add_adapter:
808 for (j = 0; j < i; j++)
809 i2c_del_adapter(&adap_info->pch_data[j].pch_adapter);
785 pci_iounmap(pdev, base_addr); 810 pci_iounmap(pdev, base_addr);
786err_pci_iomap: 811err_pci_iomap:
787 pci_release_regions(pdev); 812 pci_release_regions(pdev);
@@ -794,17 +819,22 @@ err_pci_enable:
794 819
795static void __devexit pch_i2c_remove(struct pci_dev *pdev) 820static void __devexit pch_i2c_remove(struct pci_dev *pdev)
796{ 821{
822 int i;
797 struct adapter_info *adap_info = pci_get_drvdata(pdev); 823 struct adapter_info *adap_info = pci_get_drvdata(pdev);
798 824
799 pch_i2c_disbl_int(&adap_info->pch_data); 825 free_irq(pdev->irq, adap_info);
800 free_irq(pdev->irq, &adap_info->pch_data);
801 i2c_del_adapter(&(adap_info->pch_data.pch_adapter));
802 826
803 if (adap_info->pch_data.pch_base_address) { 827 for (i = 0; i < adap_info->ch_num; i++) {
804 pci_iounmap(pdev, adap_info->pch_data.pch_base_address); 828 pch_i2c_disbl_int(&adap_info->pch_data[i]);
805 adap_info->pch_data.pch_base_address = 0; 829 i2c_del_adapter(&adap_info->pch_data[i].pch_adapter);
806 } 830 }
807 831
832 if (adap_info->pch_data[0].pch_base_address)
833 pci_iounmap(pdev, adap_info->pch_data[0].pch_base_address);
834
835 for (i = 0; i < adap_info->ch_num; i++)
836 adap_info->pch_data[i].pch_base_address = 0;
837
808 pci_set_drvdata(pdev, NULL); 838 pci_set_drvdata(pdev, NULL);
809 839
810 pci_release_regions(pdev); 840 pci_release_regions(pdev);
@@ -817,17 +847,22 @@ static void __devexit pch_i2c_remove(struct pci_dev *pdev)
817static int pch_i2c_suspend(struct pci_dev *pdev, pm_message_t state) 847static int pch_i2c_suspend(struct pci_dev *pdev, pm_message_t state)
818{ 848{
819 int ret; 849 int ret;
850 int i;
820 struct adapter_info *adap_info = pci_get_drvdata(pdev); 851 struct adapter_info *adap_info = pci_get_drvdata(pdev);
821 void __iomem *p = adap_info->pch_data.pch_base_address; 852 void __iomem *p = adap_info->pch_data[0].pch_base_address;
822 853
823 adap_info->pch_i2c_suspended = true; 854 adap_info->pch_i2c_suspended = true;
824 855
825 while ((adap_info->pch_data.pch_i2c_xfer_in_progress)) { 856 for (i = 0; i < adap_info->ch_num; i++) {
826 /* Wait until all channel transfers are completed */ 857 while ((adap_info->pch_data[i].pch_i2c_xfer_in_progress)) {
827 msleep(20); 858 /* Wait until all channel transfers are completed */
859 msleep(20);
860 }
828 } 861 }
862
829 /* Disable the i2c interrupts */ 863 /* Disable the i2c interrupts */
830 pch_i2c_disbl_int(&adap_info->pch_data); 864 for (i = 0; i < adap_info->ch_num; i++)
865 pch_i2c_disbl_int(&adap_info->pch_data[i]);
831 866
832 pch_pci_dbg(pdev, "I2CSR = %x I2CBUFSTA = %x I2CESRSTA = %x " 867 pch_pci_dbg(pdev, "I2CSR = %x I2CBUFSTA = %x I2CESRSTA = %x "
833 "invoked function pch_i2c_disbl_int successfully\n", 868 "invoked function pch_i2c_disbl_int successfully\n",
@@ -850,6 +885,7 @@ static int pch_i2c_suspend(struct pci_dev *pdev, pm_message_t state)
850 885
851static int pch_i2c_resume(struct pci_dev *pdev) 886static int pch_i2c_resume(struct pci_dev *pdev)
852{ 887{
888 int i;
853 struct adapter_info *adap_info = pci_get_drvdata(pdev); 889 struct adapter_info *adap_info = pci_get_drvdata(pdev);
854 890
855 pci_set_power_state(pdev, PCI_D0); 891 pci_set_power_state(pdev, PCI_D0);
@@ -862,7 +898,8 @@ static int pch_i2c_resume(struct pci_dev *pdev)
862 898
863 pci_enable_wake(pdev, PCI_D3hot, 0); 899 pci_enable_wake(pdev, PCI_D3hot, 0);
864 900
865 pch_i2c_init(&adap_info->pch_data); 901 for (i = 0; i < adap_info->ch_num; i++)
902 pch_i2c_init(&adap_info->pch_data[i]);
866 903
867 adap_info->pch_i2c_suspended = false; 904 adap_info->pch_i2c_suspended = false;
868 905
@@ -894,7 +931,7 @@ static void __exit pch_pci_exit(void)
894} 931}
895module_exit(pch_pci_exit); 932module_exit(pch_pci_exit);
896 933
897MODULE_DESCRIPTION("PCH I2C PCI Driver"); 934MODULE_DESCRIPTION("Intel EG20T PCH/OKI SEMICONDUCTOR ML7213 IOH I2C Driver");
898MODULE_LICENSE("GPL"); 935MODULE_LICENSE("GPL");
899MODULE_AUTHOR("Tomoya MORINAGA. <tomoya-linux@dsn.okisemi.com>"); 936MODULE_AUTHOR("Tomoya MORINAGA. <tomoya-linux@dsn.okisemi.com>");
900module_param(pch_i2c_speed, int, (S_IRUSR | S_IWUSR)); 937module_param(pch_i2c_speed, int, (S_IRUSR | S_IWUSR));
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
index 8022e2390a5a..caf96dc8ca1b 100644
--- a/drivers/i2c/busses/i2c-mxs.c
+++ b/drivers/i2c/busses/i2c-mxs.c
@@ -118,6 +118,8 @@ static void mxs_i2c_reset(struct mxs_i2c_dev *i2c)
118{ 118{
119 mxs_reset_block(i2c->regs); 119 mxs_reset_block(i2c->regs);
120 writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET); 120 writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET);
121 writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE,
122 i2c->regs + MXS_I2C_QUEUECTRL_SET);
121} 123}
122 124
123static void mxs_i2c_pioq_setup_read(struct mxs_i2c_dev *i2c, u8 addr, int len, 125static void mxs_i2c_pioq_setup_read(struct mxs_i2c_dev *i2c, u8 addr, int len,
@@ -347,8 +349,6 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev)
347 349
348 /* Do reset to enforce correct startup after pinmuxing */ 350 /* Do reset to enforce correct startup after pinmuxing */
349 mxs_i2c_reset(i2c); 351 mxs_i2c_reset(i2c);
350 writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE,
351 i2c->regs + MXS_I2C_QUEUECTRL_SET);
352 352
353 adap = &i2c->adapter; 353 adap = &i2c->adapter;
354 strlcpy(adap->name, "MXS I2C adapter", sizeof(adap->name)); 354 strlcpy(adap->name, "MXS I2C adapter", sizeof(adap->name));
diff --git a/drivers/i2c/busses/i2c-pxa-pci.c b/drivers/i2c/busses/i2c-pxa-pci.c
new file mode 100644
index 000000000000..6659d269b841
--- /dev/null
+++ b/drivers/i2c/busses/i2c-pxa-pci.c
@@ -0,0 +1,176 @@
1/*
2 * The CE4100's I2C device is more or less the same one as found on PXA.
3 * It does not support slave mode, the register slightly moved. This PCI
4 * device provides three bars, every contains a single I2C controller.
5 */
6#include <linux/pci.h>
7#include <linux/platform_device.h>
8#include <linux/i2c/pxa-i2c.h>
9#include <linux/of.h>
10#include <linux/of_device.h>
11#include <linux/of_address.h>
12
13#define CE4100_PCI_I2C_DEVS 3
14
15struct ce4100_devices {
16 struct platform_device *pdev[CE4100_PCI_I2C_DEVS];
17};
18
19static struct platform_device *add_i2c_device(struct pci_dev *dev, int bar)
20{
21 struct platform_device *pdev;
22 struct i2c_pxa_platform_data pdata;
23 struct resource res[2];
24 struct device_node *child;
25 static int devnum;
26 int ret;
27
28 memset(&pdata, 0, sizeof(struct i2c_pxa_platform_data));
29 memset(&res, 0, sizeof(res));
30
31 res[0].flags = IORESOURCE_MEM;
32 res[0].start = pci_resource_start(dev, bar);
33 res[0].end = pci_resource_end(dev, bar);
34
35 res[1].flags = IORESOURCE_IRQ;
36 res[1].start = dev->irq;
37 res[1].end = dev->irq;
38
39 for_each_child_of_node(dev->dev.of_node, child) {
40 const void *prop;
41 struct resource r;
42 int ret;
43
44 ret = of_address_to_resource(child, 0, &r);
45 if (ret < 0)
46 continue;
47 if (r.start != res[0].start)
48 continue;
49 if (r.end != res[0].end)
50 continue;
51 if (r.flags != res[0].flags)
52 continue;
53
54 prop = of_get_property(child, "fast-mode", NULL);
55 if (prop)
56 pdata.fast_mode = 1;
57
58 break;
59 }
60
61 if (!child) {
62 dev_err(&dev->dev, "failed to match a DT node for bar %d.\n",
63 bar);
64 ret = -EINVAL;
65 goto out;
66 }
67
68 pdev = platform_device_alloc("ce4100-i2c", devnum);
69 if (!pdev) {
70 of_node_put(child);
71 ret = -ENOMEM;
72 goto out;
73 }
74 pdev->dev.parent = &dev->dev;
75 pdev->dev.of_node = child;
76
77 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
78 if (ret)
79 goto err;
80
81 ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
82 if (ret)
83 goto err;
84
85 ret = platform_device_add(pdev);
86 if (ret)
87 goto err;
88 devnum++;
89 return pdev;
90err:
91 platform_device_put(pdev);
92out:
93 return ERR_PTR(ret);
94}
95
96static int __devinit ce4100_i2c_probe(struct pci_dev *dev,
97 const struct pci_device_id *ent)
98{
99 int ret;
100 int i;
101 struct ce4100_devices *sds;
102
103 ret = pci_enable_device_mem(dev);
104 if (ret)
105 return ret;
106
107 if (!dev->dev.of_node) {
108 dev_err(&dev->dev, "Missing device tree node.\n");
109 return -EINVAL;
110 }
111 sds = kzalloc(sizeof(*sds), GFP_KERNEL);
112 if (!sds)
113 goto err_mem;
114
115 for (i = 0; i < ARRAY_SIZE(sds->pdev); i++) {
116 sds->pdev[i] = add_i2c_device(dev, i);
117 if (IS_ERR(sds->pdev[i])) {
118 while (--i >= 0)
119 platform_device_unregister(sds->pdev[i]);
120 goto err_dev_add;
121 }
122 }
123 pci_set_drvdata(dev, sds);
124 return 0;
125
126err_dev_add:
127 pci_set_drvdata(dev, NULL);
128 kfree(sds);
129err_mem:
130 pci_disable_device(dev);
131 return ret;
132}
133
134static void __devexit ce4100_i2c_remove(struct pci_dev *dev)
135{
136 struct ce4100_devices *sds;
137 unsigned int i;
138
139 sds = pci_get_drvdata(dev);
140 pci_set_drvdata(dev, NULL);
141
142 for (i = 0; i < ARRAY_SIZE(sds->pdev); i++)
143 platform_device_unregister(sds->pdev[i]);
144
145 pci_disable_device(dev);
146 kfree(sds);
147}
148
149static struct pci_device_id ce4100_i2c_devices[] __devinitdata = {
150 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x2e68)},
151 { },
152};
153MODULE_DEVICE_TABLE(pci, ce4100_i2c_devices);
154
155static struct pci_driver ce4100_i2c_driver = {
156 .name = "ce4100_i2c",
157 .id_table = ce4100_i2c_devices,
158 .probe = ce4100_i2c_probe,
159 .remove = __devexit_p(ce4100_i2c_remove),
160};
161
162static int __init ce4100_i2c_init(void)
163{
164 return pci_register_driver(&ce4100_i2c_driver);
165}
166module_init(ce4100_i2c_init);
167
168static void __exit ce4100_i2c_exit(void)
169{
170 pci_unregister_driver(&ce4100_i2c_driver);
171}
172module_exit(ce4100_i2c_exit);
173
174MODULE_DESCRIPTION("CE4100 PCI-I2C glue code for PXA's driver");
175MODULE_LICENSE("GPL v2");
176MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index f4c19a97e0b3..f59224a5c761 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -29,38 +29,75 @@
29#include <linux/errno.h> 29#include <linux/errno.h>
30#include <linux/interrupt.h> 30#include <linux/interrupt.h>
31#include <linux/i2c-pxa.h> 31#include <linux/i2c-pxa.h>
32#include <linux/of_i2c.h>
32#include <linux/platform_device.h> 33#include <linux/platform_device.h>
33#include <linux/err.h> 34#include <linux/err.h>
34#include <linux/clk.h> 35#include <linux/clk.h>
35#include <linux/slab.h> 36#include <linux/slab.h>
36#include <linux/io.h> 37#include <linux/io.h>
38#include <linux/i2c/pxa-i2c.h>
37 39
38#include <asm/irq.h> 40#include <asm/irq.h>
39#include <plat/i2c.h> 41
42#ifndef CONFIG_HAVE_CLK
43#define clk_get(dev, id) NULL
44#define clk_put(clk) do { } while (0)
45#define clk_disable(clk) do { } while (0)
46#define clk_enable(clk) do { } while (0)
47#endif
48
49struct pxa_reg_layout {
50 u32 ibmr;
51 u32 idbr;
52 u32 icr;
53 u32 isr;
54 u32 isar;
55};
56
57enum pxa_i2c_types {
58 REGS_PXA2XX,
59 REGS_PXA3XX,
60 REGS_CE4100,
61};
40 62
41/* 63/*
42 * I2C register offsets will be shifted 0 or 1 bit left, depending on 64 * I2C registers definitions
43 * different SoCs
44 */ 65 */
45#define REG_SHIFT_0 (0 << 0) 66static struct pxa_reg_layout pxa_reg_layout[] = {
46#define REG_SHIFT_1 (1 << 0) 67 [REGS_PXA2XX] = {
47#define REG_SHIFT(d) ((d) & 0x1) 68 .ibmr = 0x00,
69 .idbr = 0x08,
70 .icr = 0x10,
71 .isr = 0x18,
72 .isar = 0x20,
73 },
74 [REGS_PXA3XX] = {
75 .ibmr = 0x00,
76 .idbr = 0x04,
77 .icr = 0x08,
78 .isr = 0x0c,
79 .isar = 0x10,
80 },
81 [REGS_CE4100] = {
82 .ibmr = 0x14,
83 .idbr = 0x0c,
84 .icr = 0x00,
85 .isr = 0x04,
86 /* no isar register */
87 },
88};
48 89
49static const struct platform_device_id i2c_pxa_id_table[] = { 90static const struct platform_device_id i2c_pxa_id_table[] = {
50 { "pxa2xx-i2c", REG_SHIFT_1 }, 91 { "pxa2xx-i2c", REGS_PXA2XX },
51 { "pxa3xx-pwri2c", REG_SHIFT_0 }, 92 { "pxa3xx-pwri2c", REGS_PXA3XX },
93 { "ce4100-i2c", REGS_CE4100 },
52 { }, 94 { },
53}; 95};
54MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table); 96MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table);
55 97
56/* 98/*
57 * I2C registers and bit definitions 99 * I2C bit definitions
58 */ 100 */
59#define IBMR (0x00)
60#define IDBR (0x08)
61#define ICR (0x10)
62#define ISR (0x18)
63#define ISAR (0x20)
64 101
65#define ICR_START (1 << 0) /* start bit */ 102#define ICR_START (1 << 0) /* start bit */
66#define ICR_STOP (1 << 1) /* stop bit */ 103#define ICR_STOP (1 << 1) /* stop bit */
@@ -111,7 +148,11 @@ struct pxa_i2c {
111 u32 icrlog[32]; 148 u32 icrlog[32];
112 149
113 void __iomem *reg_base; 150 void __iomem *reg_base;
114 unsigned int reg_shift; 151 void __iomem *reg_ibmr;
152 void __iomem *reg_idbr;
153 void __iomem *reg_icr;
154 void __iomem *reg_isr;
155 void __iomem *reg_isar;
115 156
116 unsigned long iobase; 157 unsigned long iobase;
117 unsigned long iosize; 158 unsigned long iosize;
@@ -121,11 +162,11 @@ struct pxa_i2c {
121 unsigned int fast_mode :1; 162 unsigned int fast_mode :1;
122}; 163};
123 164
124#define _IBMR(i2c) ((i2c)->reg_base + (0x0 << (i2c)->reg_shift)) 165#define _IBMR(i2c) ((i2c)->reg_ibmr)
125#define _IDBR(i2c) ((i2c)->reg_base + (0x4 << (i2c)->reg_shift)) 166#define _IDBR(i2c) ((i2c)->reg_idbr)
126#define _ICR(i2c) ((i2c)->reg_base + (0x8 << (i2c)->reg_shift)) 167#define _ICR(i2c) ((i2c)->reg_icr)
127#define _ISR(i2c) ((i2c)->reg_base + (0xc << (i2c)->reg_shift)) 168#define _ISR(i2c) ((i2c)->reg_isr)
128#define _ISAR(i2c) ((i2c)->reg_base + (0x10 << (i2c)->reg_shift)) 169#define _ISAR(i2c) ((i2c)->reg_isar)
129 170
130/* 171/*
131 * I2C Slave mode address 172 * I2C Slave mode address
@@ -418,7 +459,8 @@ static void i2c_pxa_reset(struct pxa_i2c *i2c)
418 writel(I2C_ISR_INIT, _ISR(i2c)); 459 writel(I2C_ISR_INIT, _ISR(i2c));
419 writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c)); 460 writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c));
420 461
421 writel(i2c->slave_addr, _ISAR(i2c)); 462 if (i2c->reg_isar)
463 writel(i2c->slave_addr, _ISAR(i2c));
422 464
423 /* set control register values */ 465 /* set control register values */
424 writel(I2C_ICR_INIT | (i2c->fast_mode ? ICR_FM : 0), _ICR(i2c)); 466 writel(I2C_ICR_INIT | (i2c->fast_mode ? ICR_FM : 0), _ICR(i2c));
@@ -729,8 +771,10 @@ static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
729 */ 771 */
730 ret = i2c->msg_idx; 772 ret = i2c->msg_idx;
731 773
732 if (timeout == 0) 774 if (!timeout && i2c->msg_num) {
733 i2c_pxa_scream_blue_murder(i2c, "timeout"); 775 i2c_pxa_scream_blue_murder(i2c, "timeout");
776 ret = I2C_RETRY;
777 }
734 778
735 out: 779 out:
736 return ret; 780 return ret;
@@ -915,11 +959,16 @@ static void i2c_pxa_irq_rxfull(struct pxa_i2c *i2c, u32 isr)
915 writel(icr, _ICR(i2c)); 959 writel(icr, _ICR(i2c));
916} 960}
917 961
962#define VALID_INT_SOURCE (ISR_SSD | ISR_ALD | ISR_ITE | ISR_IRF | \
963 ISR_SAD | ISR_BED)
918static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id) 964static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id)
919{ 965{
920 struct pxa_i2c *i2c = dev_id; 966 struct pxa_i2c *i2c = dev_id;
921 u32 isr = readl(_ISR(i2c)); 967 u32 isr = readl(_ISR(i2c));
922 968
969 if (!(isr & VALID_INT_SOURCE))
970 return IRQ_NONE;
971
923 if (i2c_debug > 2 && 0) { 972 if (i2c_debug > 2 && 0) {
924 dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n", 973 dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n",
925 __func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c))); 974 __func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c)));
@@ -934,7 +983,7 @@ static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id)
934 /* 983 /*
935 * Always clear all pending IRQs. 984 * Always clear all pending IRQs.
936 */ 985 */
937 writel(isr & (ISR_SSD|ISR_ALD|ISR_ITE|ISR_IRF|ISR_SAD|ISR_BED), _ISR(i2c)); 986 writel(isr & VALID_INT_SOURCE, _ISR(i2c));
938 987
939 if (isr & ISR_SAD) 988 if (isr & ISR_SAD)
940 i2c_pxa_slave_start(i2c, isr); 989 i2c_pxa_slave_start(i2c, isr);
@@ -1001,6 +1050,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
1001 struct resource *res; 1050 struct resource *res;
1002 struct i2c_pxa_platform_data *plat = dev->dev.platform_data; 1051 struct i2c_pxa_platform_data *plat = dev->dev.platform_data;
1003 const struct platform_device_id *id = platform_get_device_id(dev); 1052 const struct platform_device_id *id = platform_get_device_id(dev);
1053 enum pxa_i2c_types i2c_type = id->driver_data;
1004 int ret; 1054 int ret;
1005 int irq; 1055 int irq;
1006 1056
@@ -1044,7 +1094,13 @@ static int i2c_pxa_probe(struct platform_device *dev)
1044 ret = -EIO; 1094 ret = -EIO;
1045 goto eremap; 1095 goto eremap;
1046 } 1096 }
1047 i2c->reg_shift = REG_SHIFT(id->driver_data); 1097
1098 i2c->reg_ibmr = i2c->reg_base + pxa_reg_layout[i2c_type].ibmr;
1099 i2c->reg_idbr = i2c->reg_base + pxa_reg_layout[i2c_type].idbr;
1100 i2c->reg_icr = i2c->reg_base + pxa_reg_layout[i2c_type].icr;
1101 i2c->reg_isr = i2c->reg_base + pxa_reg_layout[i2c_type].isr;
1102 if (i2c_type != REGS_CE4100)
1103 i2c->reg_isar = i2c->reg_base + pxa_reg_layout[i2c_type].isar;
1048 1104
1049 i2c->iobase = res->start; 1105 i2c->iobase = res->start;
1050 i2c->iosize = resource_size(res); 1106 i2c->iosize = resource_size(res);
@@ -1072,7 +1128,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
1072 i2c->adap.algo = &i2c_pxa_pio_algorithm; 1128 i2c->adap.algo = &i2c_pxa_pio_algorithm;
1073 } else { 1129 } else {
1074 i2c->adap.algo = &i2c_pxa_algorithm; 1130 i2c->adap.algo = &i2c_pxa_algorithm;
1075 ret = request_irq(irq, i2c_pxa_handler, IRQF_DISABLED, 1131 ret = request_irq(irq, i2c_pxa_handler, IRQF_SHARED,
1076 i2c->adap.name, i2c); 1132 i2c->adap.name, i2c);
1077 if (ret) 1133 if (ret)
1078 goto ereqirq; 1134 goto ereqirq;
@@ -1082,12 +1138,19 @@ static int i2c_pxa_probe(struct platform_device *dev)
1082 1138
1083 i2c->adap.algo_data = i2c; 1139 i2c->adap.algo_data = i2c;
1084 i2c->adap.dev.parent = &dev->dev; 1140 i2c->adap.dev.parent = &dev->dev;
1141#ifdef CONFIG_OF
1142 i2c->adap.dev.of_node = dev->dev.of_node;
1143#endif
1085 1144
1086 ret = i2c_add_numbered_adapter(&i2c->adap); 1145 if (i2c_type == REGS_CE4100)
1146 ret = i2c_add_adapter(&i2c->adap);
1147 else
1148 ret = i2c_add_numbered_adapter(&i2c->adap);
1087 if (ret < 0) { 1149 if (ret < 0) {
1088 printk(KERN_INFO "I2C: Failed to add bus\n"); 1150 printk(KERN_INFO "I2C: Failed to add bus\n");
1089 goto eadapt; 1151 goto eadapt;
1090 } 1152 }
1153 of_i2c_register_devices(&i2c->adap);
1091 1154
1092 platform_set_drvdata(dev, i2c); 1155 platform_set_drvdata(dev, i2c);
1093 1156