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authorLior Levy <lior.levy@intel.com>2011-06-25 03:09:08 -0400
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2011-06-25 03:10:34 -0400
commit7555e83df399ef35e031b137442eac2b1894b993 (patch)
tree1181b29beb0470cd5c419d1036c123d64049563d /drivers
parenta535c30e9e98d201089503a0ffa0093cba16e796 (diff)
ixgbe: A fix to VF TX rate limit
There is a need to configure MMW_SIZE in register RTTBCNRM with a correct value (0x4 for non jumbo frames and 0x14 for jumbo frames support). For 82599 the value is 0x4 and for X540 the value is 0x14. Signed-off-by: Lior Levy <lior.levy@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ixgbe/ixgbe_sriov.c16
-rw-r--r--drivers/net/ixgbe/ixgbe_type.h2
2 files changed, 17 insertions, 1 deletions
diff --git a/drivers/net/ixgbe/ixgbe_sriov.c b/drivers/net/ixgbe/ixgbe_sriov.c
index ac99b0458fe2..d99d01e21326 100644
--- a/drivers/net/ixgbe/ixgbe_sriov.c
+++ b/drivers/net/ixgbe/ixgbe_sriov.c
@@ -605,6 +605,22 @@ static void ixgbe_set_vf_rate_limit(struct ixgbe_hw *hw, int vf, int tx_rate,
605 } 605 }
606 606
607 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, 2*vf); /* vf Y uses queue 2*Y */ 607 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, 2*vf); /* vf Y uses queue 2*Y */
608 /*
609 * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
610 * register. Typically MMW_SIZE=0x014 if 9728-byte jumbo is supported
611 * and 0x004 otherwise.
612 */
613 switch (hw->mac.type) {
614 case ixgbe_mac_82599EB:
615 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRM, 0x4);
616 break;
617 case ixgbe_mac_X540:
618 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRM, 0x14);
619 break;
620 default:
621 break;
622 }
623
608 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val); 624 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
609} 625}
610 626
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index 1eefc0c68409..e0d970ebab7a 100644
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -534,7 +534,7 @@
534#define IXGBE_RTTBCNRC_RF_INT_SHIFT 14 534#define IXGBE_RTTBCNRC_RF_INT_SHIFT 14
535#define IXGBE_RTTBCNRC_RF_INT_MASK \ 535#define IXGBE_RTTBCNRC_RF_INT_MASK \
536 (IXGBE_RTTBCNRC_RF_DEC_MASK << IXGBE_RTTBCNRC_RF_INT_SHIFT) 536 (IXGBE_RTTBCNRC_RF_DEC_MASK << IXGBE_RTTBCNRC_RF_INT_SHIFT)
537 537#define IXGBE_RTTBCNRM 0x04980
538 538
539/* FCoE DMA Context Registers */ 539/* FCoE DMA Context Registers */
540#define IXGBE_FCPTRL 0x02410 /* FC User Desc. PTR Low */ 540#define IXGBE_FCPTRL 0x02410 /* FC User Desc. PTR Low */