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authorMauro Carvalho Chehab <mchehab@redhat.com>2010-08-27 07:56:48 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2010-08-30 13:56:50 -0400
commitd7de2bdb0e15c594aefbc71d899c4684a5ce6559 (patch)
treed83813daa216c3bcc3069ff378420883f18bf9a3 /drivers
parent86002324cf8809c72858741ab20bb7a855654b4c (diff)
i7300_edac: Adds detection for enhanced scrub mode on x8
While here, do some cleanup by adding some macros to check for device features. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/edac/i7300_edac.c21
1 files changed, 17 insertions, 4 deletions
diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c
index f2f171d0356a..27088af79672 100644
--- a/drivers/edac/i7300_edac.c
+++ b/drivers/edac/i7300_edac.c
@@ -93,6 +93,12 @@
93 /* OFFSETS for Function 1 */ 93 /* OFFSETS for Function 1 */
94#define MC_SETTINGS 0x40 94#define MC_SETTINGS 0x40
95 95
96#define IS_MIRRORED(mc) ((mc) & (1 << 16))
97#define IS_ECC_ENABLED(mc) ((mc) & (1 << 5))
98#define IS_RETRY_ENABLED(mc) ((mc) & (1 << 31))
99#define IS_SCRBALGO_ENHANCED(mc) ((mc) & (1 << 8))
100
101
96#define TOLM 0x6C 102#define TOLM 0x6C
97#define REDMEMB 0x7C 103#define REDMEMB 0x7C
98 104
@@ -451,9 +457,13 @@ static int decode_mtr(struct i7300_pvt *pvt,
451 p_csrow->edac_mode = EDAC_S8ECD8ED; 457 p_csrow->edac_mode = EDAC_S8ECD8ED;
452 458
453 /* ask what device type on this row */ 459 /* ask what device type on this row */
454 if (MTR_DRAM_WIDTH(mtr)) 460 if (MTR_DRAM_WIDTH(mtr)) {
461 debugf0("Scrub algorithm for x8 is on %s mode\n",
462 IS_SCRBALGO_ENHANCED(pvt->mc_settings) ?
463 "enhanced" : "normal");
464
455 p_csrow->dtype = DEV_X8; 465 p_csrow->dtype = DEV_X8;
456 else 466 } else
457 p_csrow->dtype = DEV_X4; 467 p_csrow->dtype = DEV_X4;
458 468
459 return mtr; 469 return mtr;
@@ -643,10 +653,13 @@ static int i7300_get_mc_regs(struct mem_ctl_info *mci)
643 /* Get memory controller settings */ 653 /* Get memory controller settings */
644 pci_read_config_dword(pvt->pci_dev_16_1_fsb_addr_map, MC_SETTINGS, 654 pci_read_config_dword(pvt->pci_dev_16_1_fsb_addr_map, MC_SETTINGS,
645 &pvt->mc_settings); 655 &pvt->mc_settings);
656
646 debugf0("Memory controller operating on %s mode\n", 657 debugf0("Memory controller operating on %s mode\n",
647 pvt->mc_settings & (1 << 16)? "mirrored" : "non-mirrored"); 658 IS_MIRRORED(pvt->mc_settings) ? "mirrored" : "non-mirrored");
648 debugf0("Error detection is %s\n", 659 debugf0("Error detection is %s\n",
649 pvt->mc_settings & (1 << 5)? "enabled" : "disabled"); 660 IS_ECC_ENABLED(pvt->mc_settings) ? "enabled" : "disabled");
661 debugf0("Retry is %s\n",
662 IS_RETRY_ENABLED(pvt->mc_settings) ? "enabled" : "disabled");
650 663
651 /* Get Memory Interleave Range registers */ 664 /* Get Memory Interleave Range registers */
652 pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, MIR0, &pvt->mir[0]); 665 pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, MIR0, &pvt->mir[0]);