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authorDavid Woodhouse <dwmw2@infradead.org>2006-10-27 07:50:04 -0400
committerDavid Woodhouse <dwmw2@infradead.org>2006-10-27 07:50:04 -0400
commitb478c775a0c306c84215a1138e49fab540b94a5d (patch)
tree9e7874588db2c4fdc0321ecc2555189c72bdf6bf /drivers
parentdcc41bc81c872862652d68af8993b9fa32ce56a4 (diff)
[MTD] CAFÉ NAND: Add 'slowtiming' parameter, default usedma and checkecc on
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mtd/nand/cafe.c26
1 files changed, 15 insertions, 11 deletions
diff --git a/drivers/mtd/nand/cafe.c b/drivers/mtd/nand/cafe.c
index dd274c877b5e..d894c7286aab 100644
--- a/drivers/mtd/nand/cafe.c
+++ b/drivers/mtd/nand/cafe.c
@@ -58,7 +58,7 @@ struct cafe_priv {
58 58
59}; 59};
60 60
61static int usedma = 0; 61static int usedma = 1;
62module_param(usedma, int, 0644); 62module_param(usedma, int, 0644);
63 63
64static int skipbbt = 0; 64static int skipbbt = 0;
@@ -67,9 +67,12 @@ module_param(skipbbt, int, 0644);
67static int debug = 0; 67static int debug = 0;
68module_param(debug, int, 0644); 68module_param(debug, int, 0644);
69 69
70static int checkecc = 0; 70static int checkecc = 1;
71module_param(checkecc, int, 0644); 71module_param(checkecc, int, 0644);
72 72
73static int slowtiming = 0;
74module_param(slowtiming, int, 0644);
75
73/* Hrm. Why isn't this already conditional on something in the struct device? */ 76/* Hrm. Why isn't this already conditional on something in the struct device? */
74#define cafe_dev_dbg(dev, args...) do { if (debug) dev_dbg(dev, ##args); } while(0) 77#define cafe_dev_dbg(dev, args...) do { if (debug) dev_dbg(dev, ##args); } while(0)
75 78
@@ -604,15 +607,16 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
604 607
605 /* Timings from Marvell's test code (not verified or calculated by us) */ 608 /* Timings from Marvell's test code (not verified or calculated by us) */
606 writel(0xffffffff, cafe->mmio + CAFE_NAND_IRQ_MASK); 609 writel(0xffffffff, cafe->mmio + CAFE_NAND_IRQ_MASK);
607#if 1 610
608 writel(0x01010a0a, cafe->mmio + CAFE_NAND_TIMING1); 611 if (!slowtiming) {
609 writel(0x24121212, cafe->mmio + CAFE_NAND_TIMING2); 612 writel(0x01010a0a, cafe->mmio + CAFE_NAND_TIMING1);
610 writel(0x11000000, cafe->mmio + CAFE_NAND_TIMING3); 613 writel(0x24121212, cafe->mmio + CAFE_NAND_TIMING2);
611#else 614 writel(0x11000000, cafe->mmio + CAFE_NAND_TIMING3);
612 writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING1); 615 } else {
613 writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING2); 616 writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING1);
614 writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING3); 617 writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING2);
615#endif 618 writel(0xffffffff, cafe->mmio + CAFE_NAND_TIMING3);
619 }
616 writel(0xffffffff, cafe->mmio + CAFE_NAND_IRQ_MASK); 620 writel(0xffffffff, cafe->mmio + CAFE_NAND_IRQ_MASK);
617 err = request_irq(pdev->irq, &cafe_nand_interrupt, SA_SHIRQ, "CAFE NAND", mtd); 621 err = request_irq(pdev->irq, &cafe_nand_interrupt, SA_SHIRQ, "CAFE NAND", mtd);
618 if (err) { 622 if (err) {