diff options
author | Sathya Perla <sathyap@serverengines.com> | 2009-07-27 18:52:56 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-08-02 02:06:31 -0400 |
commit | 5f0b849eb35d09cd2f332d5031051c1a8976c30b (patch) | |
tree | 99501417eec2bfd46597827ddfd3de457d9d6da9 /drivers | |
parent | eec368fb3ce3ee9e7bb042bbafb03f297d96e55e (diff) |
be2net: replace some printks with dev_err()/dev_warn()
And get rid of some unnecessary printks.
Signed-off-by: Sathya Perla <sathyap@serverengines.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/benet/be_cmds.c | 26 | ||||
-rw-r--r-- | drivers/net/benet/be_main.c | 17 |
2 files changed, 15 insertions, 28 deletions
diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c index daa2fe82b64a..7c1724eaf761 100644 --- a/drivers/net/benet/be_cmds.c +++ b/drivers/net/benet/be_cmds.c | |||
@@ -62,8 +62,8 @@ static int be_mcc_compl_process(struct be_adapter *adapter, | |||
62 | if (compl_status != MCC_STATUS_SUCCESS) { | 62 | if (compl_status != MCC_STATUS_SUCCESS) { |
63 | extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) & | 63 | extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) & |
64 | CQE_STATUS_EXTD_MASK; | 64 | CQE_STATUS_EXTD_MASK; |
65 | printk(KERN_WARNING DRV_NAME | 65 | dev_warn(&adapter->pdev->dev, |
66 | " error in cmd completion: status(compl/extd)=%d/%d\n", | 66 | "Error in cmd completion: status(compl/extd)=%d/%d\n", |
67 | compl_status, extd_status); | 67 | compl_status, extd_status); |
68 | return -1; | 68 | return -1; |
69 | } | 69 | } |
@@ -135,7 +135,7 @@ static void be_mcc_wait_compl(struct be_adapter *adapter) | |||
135 | udelay(100); | 135 | udelay(100); |
136 | } | 136 | } |
137 | if (i == mcc_timeout) | 137 | if (i == mcc_timeout) |
138 | printk(KERN_WARNING DRV_NAME "mcc poll timed out\n"); | 138 | dev_err(&adapter->pdev->dev, "mccq poll timed out\n"); |
139 | } | 139 | } |
140 | 140 | ||
141 | /* Notify MCC requests and wait for completion */ | 141 | /* Notify MCC requests and wait for completion */ |
@@ -145,7 +145,7 @@ static void be_mcc_notify_wait(struct be_adapter *adapter) | |||
145 | be_mcc_wait_compl(adapter); | 145 | be_mcc_wait_compl(adapter); |
146 | } | 146 | } |
147 | 147 | ||
148 | static int be_mbox_db_ready_wait(void __iomem *db) | 148 | static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) |
149 | { | 149 | { |
150 | int cnt = 0, wait = 5; | 150 | int cnt = 0, wait = 5; |
151 | u32 ready; | 151 | u32 ready; |
@@ -156,8 +156,7 @@ static int be_mbox_db_ready_wait(void __iomem *db) | |||
156 | break; | 156 | break; |
157 | 157 | ||
158 | if (cnt > 200000) { | 158 | if (cnt > 200000) { |
159 | printk(KERN_WARNING DRV_NAME | 159 | dev_err(&adapter->pdev->dev, "mbox poll timed out\n"); |
160 | ": mbox_db poll timed out\n"); | ||
161 | return -1; | 160 | return -1; |
162 | } | 161 | } |
163 | 162 | ||
@@ -185,25 +184,22 @@ static int be_mbox_db_ring(struct be_adapter *adapter) | |||
185 | 184 | ||
186 | memset(cqe, 0, sizeof(*cqe)); | 185 | memset(cqe, 0, sizeof(*cqe)); |
187 | 186 | ||
188 | val &= ~MPU_MAILBOX_DB_RDY_MASK; | ||
189 | val |= MPU_MAILBOX_DB_HI_MASK; | 187 | val |= MPU_MAILBOX_DB_HI_MASK; |
190 | /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ | 188 | /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ |
191 | val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; | 189 | val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; |
192 | iowrite32(val, db); | 190 | iowrite32(val, db); |
193 | 191 | ||
194 | /* wait for ready to be set */ | 192 | /* wait for ready to be set */ |
195 | status = be_mbox_db_ready_wait(db); | 193 | status = be_mbox_db_ready_wait(adapter, db); |
196 | if (status != 0) | 194 | if (status != 0) |
197 | return status; | 195 | return status; |
198 | 196 | ||
199 | val = 0; | 197 | val = 0; |
200 | val &= ~MPU_MAILBOX_DB_RDY_MASK; | ||
201 | val &= ~MPU_MAILBOX_DB_HI_MASK; | ||
202 | /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ | 198 | /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */ |
203 | val |= (u32)(mbox_mem->dma >> 4) << 2; | 199 | val |= (u32)(mbox_mem->dma >> 4) << 2; |
204 | iowrite32(val, db); | 200 | iowrite32(val, db); |
205 | 201 | ||
206 | status = be_mbox_db_ready_wait(db); | 202 | status = be_mbox_db_ready_wait(adapter, db); |
207 | if (status != 0) | 203 | if (status != 0) |
208 | return status; | 204 | return status; |
209 | 205 | ||
@@ -214,7 +210,7 @@ static int be_mbox_db_ring(struct be_adapter *adapter) | |||
214 | if (status) | 210 | if (status) |
215 | return status; | 211 | return status; |
216 | } else { | 212 | } else { |
217 | printk(KERN_WARNING DRV_NAME "invalid mailbox completion\n"); | 213 | dev_err(&adapter->pdev->dev, "invalid mailbox completion\n"); |
218 | return -1; | 214 | return -1; |
219 | } | 215 | } |
220 | return 0; | 216 | return 0; |
@@ -705,15 +701,13 @@ int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, | |||
705 | opcode = OPCODE_COMMON_MCC_DESTROY; | 701 | opcode = OPCODE_COMMON_MCC_DESTROY; |
706 | break; | 702 | break; |
707 | default: | 703 | default: |
708 | printk(KERN_WARNING DRV_NAME ":bad Q type in Q destroy cmd\n"); | 704 | BUG(); |
709 | status = -1; | ||
710 | goto err; | ||
711 | } | 705 | } |
712 | be_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req)); | 706 | be_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req)); |
713 | req->id = cpu_to_le16(q->id); | 707 | req->id = cpu_to_le16(q->id); |
714 | 708 | ||
715 | status = be_mbox_db_ring(adapter); | 709 | status = be_mbox_db_ring(adapter); |
716 | err: | 710 | |
717 | spin_unlock(&adapter->mbox_lock); | 711 | spin_unlock(&adapter->mbox_lock); |
718 | 712 | ||
719 | return status; | 713 | return status; |
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c index 9c8654d9c508..ab5fcc0c5b19 100644 --- a/drivers/net/benet/be_main.c +++ b/drivers/net/benet/be_main.c | |||
@@ -66,15 +66,14 @@ static void be_intr_set(struct be_adapter *adapter, bool enable) | |||
66 | u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET; | 66 | u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET; |
67 | u32 reg = ioread32(addr); | 67 | u32 reg = ioread32(addr); |
68 | u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK; | 68 | u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK; |
69 | if (!enabled && enable) { | 69 | |
70 | if (!enabled && enable) | ||
70 | reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK; | 71 | reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK; |
71 | } else if (enabled && !enable) { | 72 | else if (enabled && !enable) |
72 | reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK; | 73 | reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK; |
73 | } else { | 74 | else |
74 | printk(KERN_WARNING DRV_NAME | ||
75 | ": bad value in membar_int_ctrl reg=0x%x\n", reg); | ||
76 | return; | 75 | return; |
77 | } | 76 | |
78 | iowrite32(reg, addr); | 77 | iowrite32(reg, addr); |
79 | } | 78 | } |
80 | 79 | ||
@@ -1981,12 +1980,6 @@ static int __init be_init_module(void) | |||
1981 | " Using 2048\n"); | 1980 | " Using 2048\n"); |
1982 | rx_frag_size = 2048; | 1981 | rx_frag_size = 2048; |
1983 | } | 1982 | } |
1984 | /* Ensure rx_frag_size is aligned to chache line */ | ||
1985 | if (SKB_DATA_ALIGN(rx_frag_size) != rx_frag_size) { | ||
1986 | printk(KERN_WARNING DRV_NAME | ||
1987 | " : Bad module param rx_frag_size. Using 2048\n"); | ||
1988 | rx_frag_size = 2048; | ||
1989 | } | ||
1990 | 1983 | ||
1991 | return pci_register_driver(&be_driver); | 1984 | return pci_register_driver(&be_driver); |
1992 | } | 1985 | } |