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authorChris Wilson <chris@chris-wilson.co.uk>2010-10-22 12:02:41 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2010-10-22 12:57:43 -0400
commit297b0c5be3b6e08890cbd7149313408847e81715 (patch)
tree0a7dd5febbe0904eed9424bc861c807dba76be95 /drivers
parent85ccc35b7e4a5e7894570fe9b4e4b56d82fc3181 (diff)
drm/i915/ringbuffer: Write the value passed in to the tail register
This should fix the error along the reset path were we tried to clear the tail register by setting it to 0, but were in fact setting it to the current value and complaining when it did not reset to 0. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c26
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.h6
2 files changed, 16 insertions, 16 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 0c6eb97d60fd..4b53ca81ea4d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -119,12 +119,12 @@ render_ring_flush(struct drm_device *dev,
119 } 119 }
120} 120}
121 121
122static void ring_set_tail(struct drm_device *dev, 122static void ring_write_tail(struct drm_device *dev,
123 struct intel_ring_buffer *ring, 123 struct intel_ring_buffer *ring,
124 u32 value) 124 u32 value)
125{ 125{
126 drm_i915_private_t *dev_priv = dev->dev_private; 126 drm_i915_private_t *dev_priv = dev->dev_private;
127 I915_WRITE_TAIL(ring, ring->tail); 127 I915_WRITE_TAIL(ring, value);
128} 128}
129 129
130u32 intel_ring_get_active_head(struct drm_device *dev, 130u32 intel_ring_get_active_head(struct drm_device *dev,
@@ -148,7 +148,7 @@ static int init_ring_common(struct drm_device *dev,
148 /* Stop the ring if it's running. */ 148 /* Stop the ring if it's running. */
149 I915_WRITE_CTL(ring, 0); 149 I915_WRITE_CTL(ring, 0);
150 I915_WRITE_HEAD(ring, 0); 150 I915_WRITE_HEAD(ring, 0);
151 ring->set_tail(dev, ring, 0); 151 ring->write_tail(dev, ring, 0);
152 152
153 /* Initialize the ring. */ 153 /* Initialize the ring. */
154 I915_WRITE_START(ring, obj_priv->gtt_offset); 154 I915_WRITE_START(ring, obj_priv->gtt_offset);
@@ -729,7 +729,7 @@ void intel_ring_advance(struct drm_device *dev,
729 struct intel_ring_buffer *ring) 729 struct intel_ring_buffer *ring)
730{ 730{
731 ring->tail &= ring->size - 1; 731 ring->tail &= ring->size - 1;
732 ring->set_tail(dev, ring, ring->tail); 732 ring->write_tail(dev, ring, ring->tail);
733} 733}
734 734
735static const struct intel_ring_buffer render_ring = { 735static const struct intel_ring_buffer render_ring = {
@@ -738,7 +738,7 @@ static const struct intel_ring_buffer render_ring = {
738 .mmio_base = RENDER_RING_BASE, 738 .mmio_base = RENDER_RING_BASE,
739 .size = 32 * PAGE_SIZE, 739 .size = 32 * PAGE_SIZE,
740 .init = init_render_ring, 740 .init = init_render_ring,
741 .set_tail = ring_set_tail, 741 .write_tail = ring_write_tail,
742 .flush = render_ring_flush, 742 .flush = render_ring_flush,
743 .add_request = render_ring_add_request, 743 .add_request = render_ring_add_request,
744 .get_seqno = render_ring_get_seqno, 744 .get_seqno = render_ring_get_seqno,
@@ -755,7 +755,7 @@ static const struct intel_ring_buffer bsd_ring = {
755 .mmio_base = BSD_RING_BASE, 755 .mmio_base = BSD_RING_BASE,
756 .size = 32 * PAGE_SIZE, 756 .size = 32 * PAGE_SIZE,
757 .init = init_bsd_ring, 757 .init = init_bsd_ring,
758 .set_tail = ring_set_tail, 758 .write_tail = ring_write_tail,
759 .flush = bsd_ring_flush, 759 .flush = bsd_ring_flush,
760 .add_request = ring_add_request, 760 .add_request = ring_add_request,
761 .get_seqno = ring_status_page_get_seqno, 761 .get_seqno = ring_status_page_get_seqno,
@@ -765,9 +765,9 @@ static const struct intel_ring_buffer bsd_ring = {
765}; 765};
766 766
767 767
768static void gen6_bsd_ring_set_tail(struct drm_device *dev, 768static void gen6_bsd_ring_write_tail(struct drm_device *dev,
769 struct intel_ring_buffer *ring, 769 struct intel_ring_buffer *ring,
770 u32 value) 770 u32 value)
771{ 771{
772 drm_i915_private_t *dev_priv = dev->dev_private; 772 drm_i915_private_t *dev_priv = dev->dev_private;
773 773
@@ -829,7 +829,7 @@ static const struct intel_ring_buffer gen6_bsd_ring = {
829 .mmio_base = GEN6_BSD_RING_BASE, 829 .mmio_base = GEN6_BSD_RING_BASE,
830 .size = 32 * PAGE_SIZE, 830 .size = 32 * PAGE_SIZE,
831 .init = init_bsd_ring, 831 .init = init_bsd_ring,
832 .set_tail = gen6_bsd_ring_set_tail, 832 .write_tail = gen6_bsd_ring_write_tail,
833 .flush = gen6_ring_flush, 833 .flush = gen6_ring_flush,
834 .add_request = ring_add_request, 834 .add_request = ring_add_request,
835 .get_seqno = ring_status_page_get_seqno, 835 .get_seqno = ring_status_page_get_seqno,
@@ -859,7 +859,7 @@ static const struct intel_ring_buffer gen6_blt_ring = {
859 .mmio_base = BLT_RING_BASE, 859 .mmio_base = BLT_RING_BASE,
860 .size = 32 * PAGE_SIZE, 860 .size = 32 * PAGE_SIZE,
861 .init = init_ring_common, 861 .init = init_ring_common,
862 .set_tail = ring_set_tail, 862 .write_tail = ring_write_tail,
863 .flush = gen6_ring_flush, 863 .flush = gen6_ring_flush,
864 .add_request = ring_add_request, 864 .add_request = ring_add_request,
865 .get_seqno = ring_status_page_get_seqno, 865 .get_seqno = ring_status_page_get_seqno,
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 9e81ff3b39cd..6ab40c6058f7 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -46,9 +46,9 @@ struct intel_ring_buffer {
46 int (*init)(struct drm_device *dev, 46 int (*init)(struct drm_device *dev,
47 struct intel_ring_buffer *ring); 47 struct intel_ring_buffer *ring);
48 48
49 void (*set_tail)(struct drm_device *dev, 49 void (*write_tail)(struct drm_device *dev,
50 struct intel_ring_buffer *ring, 50 struct intel_ring_buffer *ring,
51 u32 value); 51 u32 value);
52 void (*flush)(struct drm_device *dev, 52 void (*flush)(struct drm_device *dev,
53 struct intel_ring_buffer *ring, 53 struct intel_ring_buffer *ring,
54 u32 invalidate_domains, 54 u32 invalidate_domains,