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authorJeff Garzik <jeff@garzik.org>2007-09-26 00:02:41 -0400
committerJeff Garzik <jeff@garzik.org>2007-10-12 14:55:42 -0400
commit3cc3eb1148e4b2dfabf7a1dcf36fd8be1331ca95 (patch)
tree5f987f613eb8dae6c170f97fe9acb47379902a32 /drivers
parentb90fe23bd51c6b1c298159591c833bdd24f55002 (diff)
[libata] AHCI: enable AHCI mode, before using AHCI reset
AHCI spec says host-reset bit may only be set when the ahci-enable bit is also set. Noticed by Peer Chen <peerchen@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ata/ahci.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 9f3c591c7214..b615390b6b8a 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -827,8 +827,14 @@ static int ahci_reset_controller(struct ata_host *host)
827 void __iomem *mmio = host->iomap[AHCI_PCI_BAR]; 827 void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
828 u32 tmp; 828 u32 tmp;
829 829
830 /* global controller reset */ 830 /* we must be in AHCI mode, before using anything
831 * AHCI-specific, such as HOST_RESET.
832 */
831 tmp = readl(mmio + HOST_CTL); 833 tmp = readl(mmio + HOST_CTL);
834 if (!(tmp & HOST_AHCI_EN))
835 writel(tmp | HOST_AHCI_EN, mmio + HOST_CTL);
836
837 /* global controller reset */
832 if ((tmp & HOST_RESET) == 0) { 838 if ((tmp & HOST_RESET) == 0) {
833 writel(tmp | HOST_RESET, mmio + HOST_CTL); 839 writel(tmp | HOST_RESET, mmio + HOST_CTL);
834 readl(mmio + HOST_CTL); /* flush */ 840 readl(mmio + HOST_CTL); /* flush */