diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2011-06-08 13:01:11 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2011-06-09 00:33:19 -0400 |
commit | b20f9bef8d9ff54be266062eae365ebf4b12ca64 (patch) | |
tree | a57a2d106d7b4a80f918224bd15e276b6ddcb02b /drivers | |
parent | 618c75e491a5a50cd3819eaf5f853fd87df3ae42 (diff) |
drm/radeon/kms: check modes against max pixel clock
Filter out modes that are higher than the max pixel
clock.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_atombios.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_clocks.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_combios.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_connectors.c | 13 |
5 files changed, 27 insertions, 4 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index ba643b576054..27f45579e64b 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -165,6 +165,7 @@ struct radeon_clock { | |||
165 | uint32_t default_sclk; | 165 | uint32_t default_sclk; |
166 | uint32_t default_dispclk; | 166 | uint32_t default_dispclk; |
167 | uint32_t dp_extclk; | 167 | uint32_t dp_extclk; |
168 | uint32_t max_pixel_clock; | ||
168 | }; | 169 | }; |
169 | 170 | ||
170 | /* | 171 | /* |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 90dfb2b8cf03..fa62a503ae70 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -1246,6 +1246,10 @@ bool radeon_atom_get_clock_info(struct drm_device *dev) | |||
1246 | } | 1246 | } |
1247 | *dcpll = *p1pll; | 1247 | *dcpll = *p1pll; |
1248 | 1248 | ||
1249 | rdev->clock.max_pixel_clock = le16_to_cpu(firmware_info->info.usMaxPixelClock); | ||
1250 | if (rdev->clock.max_pixel_clock == 0) | ||
1251 | rdev->clock.max_pixel_clock = 40000; | ||
1252 | |||
1249 | return true; | 1253 | return true; |
1250 | } | 1254 | } |
1251 | 1255 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c index 5249af8931e6..2d48e7a1474b 100644 --- a/drivers/gpu/drm/radeon/radeon_clocks.c +++ b/drivers/gpu/drm/radeon/radeon_clocks.c | |||
@@ -117,7 +117,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev) | |||
117 | p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff; | 117 | p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff; |
118 | if (p1pll->reference_div < 2) | 118 | if (p1pll->reference_div < 2) |
119 | p1pll->reference_div = 12; | 119 | p1pll->reference_div = 12; |
120 | p2pll->reference_div = p1pll->reference_div; | 120 | p2pll->reference_div = p1pll->reference_div; |
121 | 121 | ||
122 | /* These aren't in the device-tree */ | 122 | /* These aren't in the device-tree */ |
123 | if (rdev->family >= CHIP_R420) { | 123 | if (rdev->family >= CHIP_R420) { |
@@ -139,6 +139,8 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev) | |||
139 | p2pll->pll_out_min = 12500; | 139 | p2pll->pll_out_min = 12500; |
140 | p2pll->pll_out_max = 35000; | 140 | p2pll->pll_out_max = 35000; |
141 | } | 141 | } |
142 | /* not sure what the max should be in all cases */ | ||
143 | rdev->clock.max_pixel_clock = 35000; | ||
142 | 144 | ||
143 | spll->reference_freq = mpll->reference_freq = p1pll->reference_freq; | 145 | spll->reference_freq = mpll->reference_freq = p1pll->reference_freq; |
144 | spll->reference_div = mpll->reference_div = | 146 | spll->reference_div = mpll->reference_div = |
@@ -151,7 +153,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev) | |||
151 | else | 153 | else |
152 | rdev->clock.default_sclk = | 154 | rdev->clock.default_sclk = |
153 | radeon_legacy_get_engine_clock(rdev); | 155 | radeon_legacy_get_engine_clock(rdev); |
154 | 156 | ||
155 | val = of_get_property(dp, "ATY,MCLK", NULL); | 157 | val = of_get_property(dp, "ATY,MCLK", NULL); |
156 | if (val && *val) | 158 | if (val && *val) |
157 | rdev->clock.default_mclk = (*val) / 10; | 159 | rdev->clock.default_mclk = (*val) / 10; |
@@ -160,7 +162,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev) | |||
160 | radeon_legacy_get_memory_clock(rdev); | 162 | radeon_legacy_get_memory_clock(rdev); |
161 | 163 | ||
162 | DRM_INFO("Using device-tree clock info\n"); | 164 | DRM_INFO("Using device-tree clock info\n"); |
163 | 165 | ||
164 | return true; | 166 | return true; |
165 | } | 167 | } |
166 | #else | 168 | #else |
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index 5b991f7c6e2a..d1b95b70af61 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c | |||
@@ -866,6 +866,11 @@ bool radeon_combios_get_clock_info(struct drm_device *dev) | |||
866 | rdev->clock.default_sclk = sclk; | 866 | rdev->clock.default_sclk = sclk; |
867 | rdev->clock.default_mclk = mclk; | 867 | rdev->clock.default_mclk = mclk; |
868 | 868 | ||
869 | if (RBIOS32(pll_info + 0x16)) | ||
870 | rdev->clock.max_pixel_clock = RBIOS32(pll_info + 0x16); | ||
871 | else | ||
872 | rdev->clock.max_pixel_clock = 35000; /* might need something asic specific */ | ||
873 | |||
869 | return true; | 874 | return true; |
870 | } | 875 | } |
871 | return false; | 876 | return false; |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index ee1dccb3fec9..9c2929c7e79f 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
@@ -626,8 +626,14 @@ static int radeon_vga_get_modes(struct drm_connector *connector) | |||
626 | static int radeon_vga_mode_valid(struct drm_connector *connector, | 626 | static int radeon_vga_mode_valid(struct drm_connector *connector, |
627 | struct drm_display_mode *mode) | 627 | struct drm_display_mode *mode) |
628 | { | 628 | { |
629 | struct drm_device *dev = connector->dev; | ||
630 | struct radeon_device *rdev = dev->dev_private; | ||
631 | |||
629 | /* XXX check mode bandwidth */ | 632 | /* XXX check mode bandwidth */ |
630 | /* XXX verify against max DAC output frequency */ | 633 | |
634 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | ||
635 | return MODE_CLOCK_HIGH; | ||
636 | |||
631 | return MODE_OK; | 637 | return MODE_OK; |
632 | } | 638 | } |
633 | 639 | ||
@@ -1015,6 +1021,11 @@ static int radeon_dvi_mode_valid(struct drm_connector *connector, | |||
1015 | } else | 1021 | } else |
1016 | return MODE_CLOCK_HIGH; | 1022 | return MODE_CLOCK_HIGH; |
1017 | } | 1023 | } |
1024 | |||
1025 | /* check against the max pixel clock */ | ||
1026 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | ||
1027 | return MODE_CLOCK_HIGH; | ||
1028 | |||
1018 | return MODE_OK; | 1029 | return MODE_OK; |
1019 | } | 1030 | } |
1020 | 1031 | ||