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authorMichael S. Tsirkin <mst@mellanox.co.il>2006-05-24 11:27:07 -0400
committerRoland Dreier <rolandd@cisco.com>2006-05-24 16:43:37 -0400
commitab28b171eabc0a414e0404844453c11af3caed10 (patch)
tree35c7037516ec32da168468823c1fbba96a930eb2 /drivers
parentda8bacf6d59288ef3e41389db24886c928dcbd33 (diff)
IB/mthca: Fix posting lists of 256 receive requests to SRQ for Tavor
If we post a list of length exactly a multiple of 256, nreq in doorbell gets set to 256 which is wrong: it should be encoded by 0. This is because we only zero it out on the next WR, which may not be there. The solution is to ring the doorbell after posting a WQE, not before posting the next one. This is the same bug that we just fixed for QPs with non-shared RQ. Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/infiniband/hw/mthca/mthca_srq.c41
1 files changed, 21 insertions, 20 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_srq.c b/drivers/infiniband/hw/mthca/mthca_srq.c
index 1ea433291fa7..b292fefa3b41 100644
--- a/drivers/infiniband/hw/mthca/mthca_srq.c
+++ b/drivers/infiniband/hw/mthca/mthca_srq.c
@@ -490,26 +490,7 @@ int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
490 490
491 first_ind = srq->first_free; 491 first_ind = srq->first_free;
492 492
493 for (nreq = 0; wr; ++nreq, wr = wr->next) { 493 for (nreq = 0; wr; wr = wr->next) {
494 if (unlikely(nreq == MTHCA_TAVOR_MAX_WQES_PER_RECV_DB)) {
495 nreq = 0;
496
497 doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift);
498 doorbell[1] = cpu_to_be32(srq->srqn << 8);
499
500 /*
501 * Make sure that descriptors are written
502 * before doorbell is rung.
503 */
504 wmb();
505
506 mthca_write64(doorbell,
507 dev->kar + MTHCA_RECEIVE_DOORBELL,
508 MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock));
509
510 first_ind = srq->first_free;
511 }
512
513 ind = srq->first_free; 494 ind = srq->first_free;
514 495
515 if (ind < 0) { 496 if (ind < 0) {
@@ -569,6 +550,26 @@ int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
569 550
570 srq->wrid[ind] = wr->wr_id; 551 srq->wrid[ind] = wr->wr_id;
571 srq->first_free = next_ind; 552 srq->first_free = next_ind;
553
554 ++nreq;
555 if (unlikely(nreq == MTHCA_TAVOR_MAX_WQES_PER_RECV_DB)) {
556 nreq = 0;
557
558 doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift);
559 doorbell[1] = cpu_to_be32(srq->srqn << 8);
560
561 /*
562 * Make sure that descriptors are written
563 * before doorbell is rung.
564 */
565 wmb();
566
567 mthca_write64(doorbell,
568 dev->kar + MTHCA_RECEIVE_DOORBELL,
569 MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock));
570
571 first_ind = srq->first_free;
572 }
572 } 573 }
573 574
574 if (likely(nreq)) { 575 if (likely(nreq)) {