diff options
author | Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com> | 2011-09-06 04:16:35 -0400 |
---|---|---|
committer | Grant Likely <grant.likely@secretlab.ca> | 2011-10-04 12:10:50 -0400 |
commit | 8b7aa961a815dad389525dcd1c36a44c249b1760 (patch) | |
tree | e984e84c309d9c44ffac333783f65638a42c4743 /drivers | |
parent | 27504be5c10bdc61761ec0126b3645428598ad91 (diff) |
spi-topcliff-pch: Fix SSN Control issue
During processing 1 command/data series,
SSN should keep LOW.
However, currently, SSN becomes HIGH.
This patch fixes the issue.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/spi/spi-topcliff-pch.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c index 7a98caa3aed2..c36d51657066 100644 --- a/drivers/spi/spi-topcliff-pch.c +++ b/drivers/spi/spi-topcliff-pch.c | |||
@@ -58,6 +58,7 @@ | |||
58 | #define PCH_SLEEP_TIME 10 | 58 | #define PCH_SLEEP_TIME 10 |
59 | 59 | ||
60 | #define SSN_LOW 0x02U | 60 | #define SSN_LOW 0x02U |
61 | #define SSN_HIGH 0x03U | ||
61 | #define SSN_NO_CONTROL 0x00U | 62 | #define SSN_NO_CONTROL 0x00U |
62 | #define PCH_MAX_CS 0xFF | 63 | #define PCH_MAX_CS 0xFF |
63 | #define PCI_DEVICE_ID_GE_SPI 0x8816 | 64 | #define PCI_DEVICE_ID_GE_SPI 0x8816 |
@@ -756,10 +757,6 @@ static void pch_spi_set_ir(struct pch_spi_data *data) | |||
756 | 757 | ||
757 | wait_event_interruptible(data->wait, data->transfer_complete); | 758 | wait_event_interruptible(data->wait, data->transfer_complete); |
758 | 759 | ||
759 | pch_spi_writereg(data->master, PCH_SSNXCR, SSN_NO_CONTROL); | ||
760 | dev_dbg(&data->master->dev, | ||
761 | "%s:no more control over SSN-writing 0 to SSNXCR.", __func__); | ||
762 | |||
763 | /* clear all interrupts */ | 760 | /* clear all interrupts */ |
764 | pch_spi_writereg(data->master, PCH_SPSR, | 761 | pch_spi_writereg(data->master, PCH_SPSR, |
765 | pch_spi_readreg(data->master, PCH_SPSR)); | 762 | pch_spi_readreg(data->master, PCH_SPSR)); |
@@ -848,9 +845,6 @@ static void pch_spi_start_transfer(struct pch_spi_data *data) | |||
848 | kfree(dma->sg_rx_p); | 845 | kfree(dma->sg_rx_p); |
849 | 846 | ||
850 | spin_lock_irqsave(&data->lock, flags); | 847 | spin_lock_irqsave(&data->lock, flags); |
851 | pch_spi_writereg(data->master, PCH_SSNXCR, SSN_NO_CONTROL); | ||
852 | dev_dbg(&data->master->dev, | ||
853 | "%s:no more control over SSN-writing 0 to SSNXCR.", __func__); | ||
854 | 848 | ||
855 | /* clear fifo threshold, disable interrupts, disable SPI transfer */ | 849 | /* clear fifo threshold, disable interrupts, disable SPI transfer */ |
856 | pch_spi_setclr_reg(data->master, PCH_SPCR, 0, | 850 | pch_spi_setclr_reg(data->master, PCH_SPCR, 0, |
@@ -1167,6 +1161,7 @@ static void pch_spi_process_messages(struct work_struct *pwork) | |||
1167 | if (data->use_dma) | 1161 | if (data->use_dma) |
1168 | pch_spi_request_dma(data, | 1162 | pch_spi_request_dma(data, |
1169 | data->current_msg->spi->bits_per_word); | 1163 | data->current_msg->spi->bits_per_word); |
1164 | pch_spi_writereg(data->master, PCH_SSNXCR, SSN_NO_CONTROL); | ||
1170 | do { | 1165 | do { |
1171 | /* If we are already processing a message get the next | 1166 | /* If we are already processing a message get the next |
1172 | transfer structure from the message otherwise retrieve | 1167 | transfer structure from the message otherwise retrieve |
@@ -1227,6 +1222,7 @@ static void pch_spi_process_messages(struct work_struct *pwork) | |||
1227 | 1222 | ||
1228 | } while (data->cur_trans != NULL); | 1223 | } while (data->cur_trans != NULL); |
1229 | 1224 | ||
1225 | pch_spi_writereg(data->master, PCH_SSNXCR, SSN_HIGH); | ||
1230 | if (data->use_dma) | 1226 | if (data->use_dma) |
1231 | pch_spi_release_dma(data); | 1227 | pch_spi_release_dma(data); |
1232 | } | 1228 | } |