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authorAl Viro <viro@ftp.linux.org.uk>2007-12-11 14:49:39 -0500
committerDavid S. Miller <davem@davemloft.net>2008-01-28 18:07:11 -0500
commit3e18826c73735eee5fca92584137824d9a387008 (patch)
tree032178c6c51dcb03459cbdc1ab7b7b7f442d1108 /drivers
parenta39fe742e71257aaae1bdddcd453877d91e681ad (diff)
e1000 endianness annotations
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/e1000/e1000_hw.h86
-rw-r--r--drivers/net/e1000/e1000_main.c10
2 files changed, 48 insertions, 48 deletions
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h
index a2a86c54a75c..8c0e046d1dd8 100644
--- a/drivers/net/e1000/e1000_hw.h
+++ b/drivers/net/e1000/e1000_hw.h
@@ -595,35 +595,35 @@ int32_t e1000_check_phy_reset_block(struct e1000_hw *hw);
595 595
596/* Receive Descriptor */ 596/* Receive Descriptor */
597struct e1000_rx_desc { 597struct e1000_rx_desc {
598 uint64_t buffer_addr; /* Address of the descriptor's data buffer */ 598 __le64 buffer_addr; /* Address of the descriptor's data buffer */
599 uint16_t length; /* Length of data DMAed into data buffer */ 599 __le16 length; /* Length of data DMAed into data buffer */
600 uint16_t csum; /* Packet checksum */ 600 __le16 csum; /* Packet checksum */
601 uint8_t status; /* Descriptor status */ 601 uint8_t status; /* Descriptor status */
602 uint8_t errors; /* Descriptor Errors */ 602 uint8_t errors; /* Descriptor Errors */
603 uint16_t special; 603 __le16 special;
604}; 604};
605 605
606/* Receive Descriptor - Extended */ 606/* Receive Descriptor - Extended */
607union e1000_rx_desc_extended { 607union e1000_rx_desc_extended {
608 struct { 608 struct {
609 uint64_t buffer_addr; 609 __le64 buffer_addr;
610 uint64_t reserved; 610 __le64 reserved;
611 } read; 611 } read;
612 struct { 612 struct {
613 struct { 613 struct {
614 uint32_t mrq; /* Multiple Rx Queues */ 614 __le32 mrq; /* Multiple Rx Queues */
615 union { 615 union {
616 uint32_t rss; /* RSS Hash */ 616 __le32 rss; /* RSS Hash */
617 struct { 617 struct {
618 uint16_t ip_id; /* IP id */ 618 __le16 ip_id; /* IP id */
619 uint16_t csum; /* Packet Checksum */ 619 __le16 csum; /* Packet Checksum */
620 } csum_ip; 620 } csum_ip;
621 } hi_dword; 621 } hi_dword;
622 } lower; 622 } lower;
623 struct { 623 struct {
624 uint32_t status_error; /* ext status/error */ 624 __le32 status_error; /* ext status/error */
625 uint16_t length; 625 __le16 length;
626 uint16_t vlan; /* VLAN tag */ 626 __le16 vlan; /* VLAN tag */
627 } upper; 627 } upper;
628 } wb; /* writeback */ 628 } wb; /* writeback */
629}; 629};
@@ -633,29 +633,29 @@ union e1000_rx_desc_extended {
633union e1000_rx_desc_packet_split { 633union e1000_rx_desc_packet_split {
634 struct { 634 struct {
635 /* one buffer for protocol header(s), three data buffers */ 635 /* one buffer for protocol header(s), three data buffers */
636 uint64_t buffer_addr[MAX_PS_BUFFERS]; 636 __le64 buffer_addr[MAX_PS_BUFFERS];
637 } read; 637 } read;
638 struct { 638 struct {
639 struct { 639 struct {
640 uint32_t mrq; /* Multiple Rx Queues */ 640 __le32 mrq; /* Multiple Rx Queues */
641 union { 641 union {
642 uint32_t rss; /* RSS Hash */ 642 __le32 rss; /* RSS Hash */
643 struct { 643 struct {
644 uint16_t ip_id; /* IP id */ 644 __le16 ip_id; /* IP id */
645 uint16_t csum; /* Packet Checksum */ 645 __le16 csum; /* Packet Checksum */
646 } csum_ip; 646 } csum_ip;
647 } hi_dword; 647 } hi_dword;
648 } lower; 648 } lower;
649 struct { 649 struct {
650 uint32_t status_error; /* ext status/error */ 650 __le32 status_error; /* ext status/error */
651 uint16_t length0; /* length of buffer 0 */ 651 __le16 length0; /* length of buffer 0 */
652 uint16_t vlan; /* VLAN tag */ 652 __le16 vlan; /* VLAN tag */
653 } middle; 653 } middle;
654 struct { 654 struct {
655 uint16_t header_status; 655 __le16 header_status;
656 uint16_t length[3]; /* length of buffers 1-3 */ 656 __le16 length[3]; /* length of buffers 1-3 */
657 } upper; 657 } upper;
658 uint64_t reserved; 658 __le64 reserved;
659 } wb; /* writeback */ 659 } wb; /* writeback */
660}; 660};
661 661
@@ -715,21 +715,21 @@ union e1000_rx_desc_packet_split {
715 715
716/* Transmit Descriptor */ 716/* Transmit Descriptor */
717struct e1000_tx_desc { 717struct e1000_tx_desc {
718 uint64_t buffer_addr; /* Address of the descriptor's data buffer */ 718 __le64 buffer_addr; /* Address of the descriptor's data buffer */
719 union { 719 union {
720 uint32_t data; 720 __le32 data;
721 struct { 721 struct {
722 uint16_t length; /* Data buffer length */ 722 __le16 length; /* Data buffer length */
723 uint8_t cso; /* Checksum offset */ 723 uint8_t cso; /* Checksum offset */
724 uint8_t cmd; /* Descriptor control */ 724 uint8_t cmd; /* Descriptor control */
725 } flags; 725 } flags;
726 } lower; 726 } lower;
727 union { 727 union {
728 uint32_t data; 728 __le32 data;
729 struct { 729 struct {
730 uint8_t status; /* Descriptor status */ 730 uint8_t status; /* Descriptor status */
731 uint8_t css; /* Checksum start */ 731 uint8_t css; /* Checksum start */
732 uint16_t special; 732 __le16 special;
733 } fields; 733 } fields;
734 } upper; 734 } upper;
735}; 735};
@@ -759,49 +759,49 @@ struct e1000_tx_desc {
759/* Offload Context Descriptor */ 759/* Offload Context Descriptor */
760struct e1000_context_desc { 760struct e1000_context_desc {
761 union { 761 union {
762 uint32_t ip_config; 762 __le32 ip_config;
763 struct { 763 struct {
764 uint8_t ipcss; /* IP checksum start */ 764 uint8_t ipcss; /* IP checksum start */
765 uint8_t ipcso; /* IP checksum offset */ 765 uint8_t ipcso; /* IP checksum offset */
766 uint16_t ipcse; /* IP checksum end */ 766 __le16 ipcse; /* IP checksum end */
767 } ip_fields; 767 } ip_fields;
768 } lower_setup; 768 } lower_setup;
769 union { 769 union {
770 uint32_t tcp_config; 770 __le32 tcp_config;
771 struct { 771 struct {
772 uint8_t tucss; /* TCP checksum start */ 772 uint8_t tucss; /* TCP checksum start */
773 uint8_t tucso; /* TCP checksum offset */ 773 uint8_t tucso; /* TCP checksum offset */
774 uint16_t tucse; /* TCP checksum end */ 774 __le16 tucse; /* TCP checksum end */
775 } tcp_fields; 775 } tcp_fields;
776 } upper_setup; 776 } upper_setup;
777 uint32_t cmd_and_length; /* */ 777 __le32 cmd_and_length; /* */
778 union { 778 union {
779 uint32_t data; 779 __le32 data;
780 struct { 780 struct {
781 uint8_t status; /* Descriptor status */ 781 uint8_t status; /* Descriptor status */
782 uint8_t hdr_len; /* Header length */ 782 uint8_t hdr_len; /* Header length */
783 uint16_t mss; /* Maximum segment size */ 783 __le16 mss; /* Maximum segment size */
784 } fields; 784 } fields;
785 } tcp_seg_setup; 785 } tcp_seg_setup;
786}; 786};
787 787
788/* Offload data descriptor */ 788/* Offload data descriptor */
789struct e1000_data_desc { 789struct e1000_data_desc {
790 uint64_t buffer_addr; /* Address of the descriptor's buffer address */ 790 __le64 buffer_addr; /* Address of the descriptor's buffer address */
791 union { 791 union {
792 uint32_t data; 792 __le32 data;
793 struct { 793 struct {
794 uint16_t length; /* Data buffer length */ 794 __le16 length; /* Data buffer length */
795 uint8_t typ_len_ext; /* */ 795 uint8_t typ_len_ext; /* */
796 uint8_t cmd; /* */ 796 uint8_t cmd; /* */
797 } flags; 797 } flags;
798 } lower; 798 } lower;
799 union { 799 union {
800 uint32_t data; 800 __le32 data;
801 struct { 801 struct {
802 uint8_t status; /* Descriptor status */ 802 uint8_t status; /* Descriptor status */
803 uint8_t popts; /* Packet Options */ 803 uint8_t popts; /* Packet Options */
804 uint16_t special; /* */ 804 __le16 special; /* */
805 } fields; 805 } fields;
806 } upper; 806 } upper;
807}; 807};
@@ -817,8 +817,8 @@ struct e1000_data_desc {
817 817
818/* Receive Address Register */ 818/* Receive Address Register */
819struct e1000_rar { 819struct e1000_rar {
820 volatile uint32_t low; /* receive address low */ 820 volatile __le32 low; /* receive address low */
821 volatile uint32_t high; /* receive address high */ 821 volatile __le32 high; /* receive address high */
822}; 822};
823 823
824/* Number of entries in the Multicast Table Array (MTA). */ 824/* Number of entries in the Multicast Table Array (MTA). */
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c
index ade483e6e6d0..d3665bc9bd40 100644
--- a/drivers/net/e1000/e1000_main.c
+++ b/drivers/net/e1000/e1000_main.c
@@ -272,14 +272,14 @@ module_exit(e1000_exit_module);
272static int e1000_request_irq(struct e1000_adapter *adapter) 272static int e1000_request_irq(struct e1000_adapter *adapter)
273{ 273{
274 struct net_device *netdev = adapter->netdev; 274 struct net_device *netdev = adapter->netdev;
275 void (*handler) = &e1000_intr; 275 irq_handler_t handler = e1000_intr;
276 int irq_flags = IRQF_SHARED; 276 int irq_flags = IRQF_SHARED;
277 int err; 277 int err;
278 278
279 if (adapter->hw.mac_type >= e1000_82571) { 279 if (adapter->hw.mac_type >= e1000_82571) {
280 adapter->have_msi = !pci_enable_msi(adapter->pdev); 280 adapter->have_msi = !pci_enable_msi(adapter->pdev);
281 if (adapter->have_msi) { 281 if (adapter->have_msi) {
282 handler = &e1000_intr_msi; 282 handler = e1000_intr_msi;
283 irq_flags = 0; 283 irq_flags = 0;
284 } 284 }
285 } 285 }
@@ -4092,8 +4092,8 @@ e1000_rx_checksum(struct e1000_adapter *adapter,
4092 /* Hardware complements the payload checksum, so we undo it 4092 /* Hardware complements the payload checksum, so we undo it
4093 * and then put the value in host order for further stack use. 4093 * and then put the value in host order for further stack use.
4094 */ 4094 */
4095 csum = ntohl(csum ^ 0xFFFF); 4095 __sum16 sum = (__force __sum16)htons(csum);
4096 skb->csum = csum; 4096 skb->csum = csum_unfold(~sum);
4097 skb->ip_summed = CHECKSUM_COMPLETE; 4097 skb->ip_summed = CHECKSUM_COMPLETE;
4098 } 4098 }
4099 adapter->hw_csum_good++; 4099 adapter->hw_csum_good++;
@@ -4621,7 +4621,7 @@ e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4621 rx_desc->read.buffer_addr[j+1] = 4621 rx_desc->read.buffer_addr[j+1] =
4622 cpu_to_le64(ps_page_dma->ps_page_dma[j]); 4622 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4623 } else 4623 } else
4624 rx_desc->read.buffer_addr[j+1] = ~0; 4624 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
4625 } 4625 }
4626 4626
4627 skb = netdev_alloc_skb(netdev, 4627 skb = netdev_alloc_skb(netdev,