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authorDaniel Lezcano <daniel.lezcano@linaro.org>2012-02-28 16:46:09 -0500
committerSamuel Ortiz <sameo@linux.intel.com>2012-03-06 12:46:56 -0500
commit34fe6f107eab096ac2f70a51763e9978b4abbeb6 (patch)
tree481a045f80276c3a0e0d512fefe1eeabb058588d /drivers
parent9ab492e12d588af7b05892c3744e8bdc2eace6d0 (diff)
mfd : Check if the other db8500 core is in WFI
This patch allows to check if the other core is in WFI mode. It is the last check the idle routine has to do before entering into the retention state. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mfd/db8500-prcmu.c12
-rw-r--r--drivers/mfd/dbx500-prcmu-regs.h2
2 files changed, 14 insertions, 0 deletions
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index 4e27db841fab..a1b3464cdba3 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -904,6 +904,18 @@ bool db8500_prcmu_pending_irq(void)
904} 904}
905 905
906/* 906/*
907 * This function checks if the specified cpu is in in WFI. It's usage
908 * makes sense only if the gic is decoupled with the db8500_prcmu_gic_decouple
909 * function. Of course passing smp_processor_id() to this function will
910 * always return false...
911 */
912bool db8500_prcmu_is_cpu_in_wfi(int cpu)
913{
914 return readl(PRCM_ARM_WFI_STANDBY) & cpu ? PRCM_ARM_WFI_STANDBY_WFI1 :
915 PRCM_ARM_WFI_STANDBY_WFI0;
916}
917
918/*
907 * This function copies the gic SPI settings to the prcmu in order to 919 * This function copies the gic SPI settings to the prcmu in order to
908 * monitor them and abort/finish the retention/off sequence or state. 920 * monitor them and abort/finish the retention/off sequence or state.
909 */ 921 */
diff --git a/drivers/mfd/dbx500-prcmu-regs.h b/drivers/mfd/dbx500-prcmu-regs.h
index b9ab4ce62654..3a0bf91d7780 100644
--- a/drivers/mfd/dbx500-prcmu-regs.h
+++ b/drivers/mfd/dbx500-prcmu-regs.h
@@ -79,6 +79,8 @@
79 79
80/* ARM WFI Standby signal register */ 80/* ARM WFI Standby signal register */
81#define PRCM_ARM_WFI_STANDBY (_PRCMU_BASE + 0x130) 81#define PRCM_ARM_WFI_STANDBY (_PRCMU_BASE + 0x130)
82#define PRCM_ARM_WFI_STANDBY_WFI0 0x08
83#define PRCM_ARM_WFI_STANDBY_WFI1 0x10
82#define PRCM_IOCR (_PRCMU_BASE + 0x310) 84#define PRCM_IOCR (_PRCMU_BASE + 0x310)
83#define PRCM_IOCR_IOFORCE 0x1 85#define PRCM_IOCR_IOFORCE 0x1
84 86