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authorViresh Kumar <viresh.kumar@st.com>2011-03-22 07:57:25 -0400
committerDan Williams <dan.j.williams@intel.com>2011-03-22 14:12:29 -0400
commitd42efe6bfb4eed8314c8ce3547f21954a4140399 (patch)
tree180057c663bf6bbfdbdcc7561254d9b86db5c0a1 /drivers
parent5b9a4f98b2e29fb92a4a54ef12b2e3940f941ed9 (diff)
dmaengine/dmatest: Pass timeout via module params
When we try to test all channels present on our controller together, some channels of lower priority may be very slow as compared to others. If number of transfers is unlimited, some channels may timeout and will not finish within 3 seconds. Thus, while doing such regress testing we may need to have higher value of timeouts. This patch adds support for passing timeout value via module parameters. Default value is 3 msec, a negative value means max timeout possible. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/dma/dmatest.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c
index 7e1b0aa0ca50..e0888cb538d4 100644
--- a/drivers/dma/dmatest.c
+++ b/drivers/dma/dmatest.c
@@ -54,6 +54,11 @@ module_param(pq_sources, uint, S_IRUGO);
54MODULE_PARM_DESC(pq_sources, 54MODULE_PARM_DESC(pq_sources,
55 "Number of p+q source buffers (default: 3)"); 55 "Number of p+q source buffers (default: 3)");
56 56
57static int timeout = 3000;
58module_param(timeout, uint, S_IRUGO);
59MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), \
60 Pass -1 for infinite timeout");
61
57/* 62/*
58 * Initialization patterns. All bytes in the source buffer has bit 7 63 * Initialization patterns. All bytes in the source buffer has bit 7
59 * set, all bytes in the destination buffer has bit 7 cleared. 64 * set, all bytes in the destination buffer has bit 7 cleared.
@@ -299,7 +304,7 @@ static int dmatest_func(void *data)
299 dma_addr_t dma_srcs[src_cnt]; 304 dma_addr_t dma_srcs[src_cnt];
300 dma_addr_t dma_dsts[dst_cnt]; 305 dma_addr_t dma_dsts[dst_cnt];
301 struct completion cmp; 306 struct completion cmp;
302 unsigned long tmo = msecs_to_jiffies(3000); 307 unsigned long tmo = msecs_to_jiffies(timeout);
303 u8 align = 0; 308 u8 align = 0;
304 309
305 total_tests++; 310 total_tests++;