diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-08-12 13:27:09 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-08-17 04:10:00 -0400 |
commit | a37b9b349ef26cb44f0e8d59c3efbcd9485018b4 (patch) | |
tree | 4cfcba7f41720c47b26b20ea237221fe6532d27b /drivers | |
parent | dcdaed6eae0d7ed0c68aaa1ebfceb242625b3bf0 (diff) |
drm/i915/ns2501: kill pll A enabling hack
With the pipe A quirk properly fixed up for i830M, this shouldn't be
required any longer.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/i915/dvo_ns2501.c | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 2 |
2 files changed, 1 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/dvo_ns2501.c b/drivers/gpu/drm/i915/dvo_ns2501.c index 1a0bad9a5fab..6bd383dfbb09 100644 --- a/drivers/gpu/drm/i915/dvo_ns2501.c +++ b/drivers/gpu/drm/i915/dvo_ns2501.c | |||
@@ -75,11 +75,6 @@ struct ns2501_priv { | |||
75 | #define NSPTR(d) ((NS2501Ptr)(d->DriverPrivate.ptr)) | 75 | #define NSPTR(d) ((NS2501Ptr)(d->DriverPrivate.ptr)) |
76 | 76 | ||
77 | /* | 77 | /* |
78 | * Include the PLL launcher prototype | ||
79 | */ | ||
80 | extern void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe); | ||
81 | |||
82 | /* | ||
83 | * For reasons unclear to me, the ns2501 at least on the Fujitsu/Siemens | 78 | * For reasons unclear to me, the ns2501 at least on the Fujitsu/Siemens |
84 | * laptops does not react on the i2c bus unless | 79 | * laptops does not react on the i2c bus unless |
85 | * both the PLL is running and the display is configured in its native | 80 | * both the PLL is running and the display is configured in its native |
@@ -113,8 +108,6 @@ static void enable_dvo(struct intel_dvo_device *dvo) | |||
113 | I915_WRITE(DVOC_SRCDIM, 0x400300); // 1024x768 | 108 | I915_WRITE(DVOC_SRCDIM, 0x400300); // 1024x768 |
114 | I915_WRITE(FW_BLC, 0x1080304); | 109 | I915_WRITE(FW_BLC, 0x1080304); |
115 | 110 | ||
116 | intel_enable_pll(dev_priv, 0); | ||
117 | |||
118 | I915_WRITE(DVOC, 0x90004084); | 111 | I915_WRITE(DVOC, 0x90004084); |
119 | } | 112 | } |
120 | 113 | ||
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index dd760f43f577..a55f6642be20 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -1432,7 +1432,7 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv, | |||
1432 | * | 1432 | * |
1433 | * Unfortunately needed by dvo_ns2501 since the dvo depends on it running. | 1433 | * Unfortunately needed by dvo_ns2501 since the dvo depends on it running. |
1434 | */ | 1434 | */ |
1435 | void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) | 1435 | static void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) |
1436 | { | 1436 | { |
1437 | int reg; | 1437 | int reg; |
1438 | u32 val; | 1438 | u32 val; |