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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-08-12 13:27:10 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-08-17 04:10:01 -0400
commit6306cb4f809ccf92c1b7bf446635c571e33f5151 (patch)
tree9844c338b2184028fe7ff0a742ec5529e3c7673b /drivers
parenta37b9b349ef26cb44f0e8d59c3efbcd9485018b4 (diff)
drm/i915: rip out the overlay pipe A workaround
Now that all affected i830M systems have the pipe A quirk set, we don't need to do any special dances in the overlay code any longer. And reading through the code I'm rather dubios that it actually does what it claims to do ... As a nice benefit this rips out a users of the crtc helper dpms callback. v2: As suggested by Chris Wilson, replace the code by an appropriate WARN to ensure that the pipe A is indeed running. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_overlay.c58
1 files changed, 1 insertions, 57 deletions
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 830d0dd610e1..c0f48580405a 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -235,54 +235,6 @@ static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
235 return 0; 235 return 0;
236} 236}
237 237
238/* Workaround for i830 bug where pipe a must be enable to change control regs */
239static int
240i830_activate_pipe_a(struct drm_device *dev)
241{
242 drm_i915_private_t *dev_priv = dev->dev_private;
243 struct intel_crtc *crtc;
244 struct drm_crtc_helper_funcs *crtc_funcs;
245 struct drm_display_mode vesa_640x480 = {
246 DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
247 752, 800, 0, 480, 489, 492, 525, 0,
248 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC)
249 }, *mode;
250
251 crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[0]);
252 if (crtc->dpms_mode == DRM_MODE_DPMS_ON)
253 return 0;
254
255 /* most i8xx have pipe a forced on, so don't trust dpms mode */
256 if (I915_READ(_PIPEACONF) & PIPECONF_ENABLE)
257 return 0;
258
259 crtc_funcs = crtc->base.helper_private;
260 if (crtc_funcs->dpms == NULL)
261 return 0;
262
263 DRM_DEBUG_DRIVER("Enabling pipe A in order to enable overlay\n");
264
265 mode = drm_mode_duplicate(dev, &vesa_640x480);
266
267 if (!drm_crtc_helper_set_mode(&crtc->base, mode,
268 crtc->base.x, crtc->base.y,
269 crtc->base.fb))
270 return 0;
271
272 crtc_funcs->dpms(&crtc->base, DRM_MODE_DPMS_ON);
273 return 1;
274}
275
276static void
277i830_deactivate_pipe_a(struct drm_device *dev)
278{
279 drm_i915_private_t *dev_priv = dev->dev_private;
280 struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[0];
281 struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
282
283 crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
284}
285
286/* overlay needs to be disable in OCMD reg */ 238/* overlay needs to be disable in OCMD reg */
287static int intel_overlay_on(struct intel_overlay *overlay) 239static int intel_overlay_on(struct intel_overlay *overlay)
288{ 240{
@@ -290,17 +242,12 @@ static int intel_overlay_on(struct intel_overlay *overlay)
290 struct drm_i915_private *dev_priv = dev->dev_private; 242 struct drm_i915_private *dev_priv = dev->dev_private;
291 struct intel_ring_buffer *ring = &dev_priv->ring[RCS]; 243 struct intel_ring_buffer *ring = &dev_priv->ring[RCS];
292 struct drm_i915_gem_request *request; 244 struct drm_i915_gem_request *request;
293 int pipe_a_quirk = 0;
294 int ret; 245 int ret;
295 246
296 BUG_ON(overlay->active); 247 BUG_ON(overlay->active);
297 overlay->active = 1; 248 overlay->active = 1;
298 249
299 if (IS_I830(dev)) { 250 WARN_ON(IS_I830(dev) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE));
300 pipe_a_quirk = i830_activate_pipe_a(dev);
301 if (pipe_a_quirk < 0)
302 return pipe_a_quirk;
303 }
304 251
305 request = kzalloc(sizeof(*request), GFP_KERNEL); 252 request = kzalloc(sizeof(*request), GFP_KERNEL);
306 if (request == NULL) { 253 if (request == NULL) {
@@ -322,9 +269,6 @@ static int intel_overlay_on(struct intel_overlay *overlay)
322 269
323 ret = intel_overlay_do_wait_request(overlay, request, NULL); 270 ret = intel_overlay_do_wait_request(overlay, request, NULL);
324out: 271out:
325 if (pipe_a_quirk)
326 i830_deactivate_pipe_a(dev);
327
328 return ret; 272 return ret;
329} 273}
330 274