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authorAlex Deucher <alexdeucher@gmail.com>2010-03-24 13:57:29 -0400
committerDave Airlie <airlied@redhat.com>2010-03-30 23:12:10 -0400
commit5898b1f33c881fe1352464efd15faf7d26513b98 (patch)
tree186d8c231ab246316cdd8a8f4b6367dc375c56f3 /drivers
parentd8fe2fa90ea9df694dcc022271391e7547772e1b (diff)
drm/radeon/kms: fix some typos in r6xx/r7xx hpd setup
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/radeon/r600.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 518f8d335f32..5509354c7c89 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2396,19 +2396,19 @@ static void r600_disable_interrupt_state(struct radeon_device *rdev)
2396 WREG32(DC_HPD4_INT_CONTROL, tmp); 2396 WREG32(DC_HPD4_INT_CONTROL, tmp);
2397 if (ASIC_IS_DCE32(rdev)) { 2397 if (ASIC_IS_DCE32(rdev)) {
2398 tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY; 2398 tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY;
2399 WREG32(DC_HPD5_INT_CONTROL, 0); 2399 WREG32(DC_HPD5_INT_CONTROL, tmp);
2400 tmp = RREG32(DC_HPD6_INT_CONTROL) & DC_HPDx_INT_POLARITY; 2400 tmp = RREG32(DC_HPD6_INT_CONTROL) & DC_HPDx_INT_POLARITY;
2401 WREG32(DC_HPD6_INT_CONTROL, 0); 2401 WREG32(DC_HPD6_INT_CONTROL, tmp);
2402 } 2402 }
2403 } else { 2403 } else {
2404 WREG32(DACA_AUTODETECT_INT_CONTROL, 0); 2404 WREG32(DACA_AUTODETECT_INT_CONTROL, 0);
2405 WREG32(DACB_AUTODETECT_INT_CONTROL, 0); 2405 WREG32(DACB_AUTODETECT_INT_CONTROL, 0);
2406 tmp = RREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL) & DC_HOT_PLUG_DETECTx_INT_POLARITY; 2406 tmp = RREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL) & DC_HOT_PLUG_DETECTx_INT_POLARITY;
2407 WREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL, 0); 2407 WREG32(DC_HOT_PLUG_DETECT1_INT_CONTROL, tmp);
2408 tmp = RREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL) & DC_HOT_PLUG_DETECTx_INT_POLARITY; 2408 tmp = RREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL) & DC_HOT_PLUG_DETECTx_INT_POLARITY;
2409 WREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL, 0); 2409 WREG32(DC_HOT_PLUG_DETECT2_INT_CONTROL, tmp);
2410 tmp = RREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL) & DC_HOT_PLUG_DETECTx_INT_POLARITY; 2410 tmp = RREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL) & DC_HOT_PLUG_DETECTx_INT_POLARITY;
2411 WREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL, 0); 2411 WREG32(DC_HOT_PLUG_DETECT3_INT_CONTROL, tmp);
2412 } 2412 }
2413} 2413}
2414 2414
@@ -2834,14 +2834,14 @@ restart_ih:
2834 break; 2834 break;
2835 case 10: 2835 case 10:
2836 if (disp_int_cont2 & DC_HPD5_INTERRUPT) { 2836 if (disp_int_cont2 & DC_HPD5_INTERRUPT) {
2837 disp_int_cont &= ~DC_HPD5_INTERRUPT; 2837 disp_int_cont2 &= ~DC_HPD5_INTERRUPT;
2838 queue_hotplug = true; 2838 queue_hotplug = true;
2839 DRM_DEBUG("IH: HPD5\n"); 2839 DRM_DEBUG("IH: HPD5\n");
2840 } 2840 }
2841 break; 2841 break;
2842 case 12: 2842 case 12:
2843 if (disp_int_cont2 & DC_HPD6_INTERRUPT) { 2843 if (disp_int_cont2 & DC_HPD6_INTERRUPT) {
2844 disp_int_cont &= ~DC_HPD6_INTERRUPT; 2844 disp_int_cont2 &= ~DC_HPD6_INTERRUPT;
2845 queue_hotplug = true; 2845 queue_hotplug = true;
2846 DRM_DEBUG("IH: HPD6\n"); 2846 DRM_DEBUG("IH: HPD6\n");
2847 } 2847 }