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authorMichael Chan <mchan@broadcom.com>2008-02-23 22:48:57 -0500
committerDavid S. Miller <davem@davemloft.net>2008-02-23 22:48:57 -0500
commit38ea3686f6d1110a3787dfd7c5cf7bad1926818b (patch)
tree9fcbc871ef493c4f718959ffe7a268a82eacc925 /drivers
parenta2724e2559a3c41ac6182da6e2446d3abf0720a5 (diff)
[BNX2]: Disable parallel detect on an HP blade.
Because of some board issues, we need to disable parallel detect on an HP blade. Without this patch, the link state can become stuck when it goes into parallel detect mode. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/bnx2.c14
-rw-r--r--drivers/net/bnx2.h1
2 files changed, 14 insertions, 1 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 2fa258050968..35356fba5a71 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -5362,11 +5362,15 @@ bnx2_test_intr(struct bnx2 *bp)
5362 return -ENODEV; 5362 return -ENODEV;
5363} 5363}
5364 5364
5365/* Determining link for parallel detection. */
5365static int 5366static int
5366bnx2_5706_serdes_has_link(struct bnx2 *bp) 5367bnx2_5706_serdes_has_link(struct bnx2 *bp)
5367{ 5368{
5368 u32 mode_ctl, an_dbg, exp; 5369 u32 mode_ctl, an_dbg, exp;
5369 5370
5371 if (bp->phy_flags & BNX2_PHY_FLAG_NO_PARALLEL)
5372 return 0;
5373
5370 bnx2_write_phy(bp, MII_BNX2_MISC_SHADOW, MISC_SHDW_MODE_CTL); 5374 bnx2_write_phy(bp, MII_BNX2_MISC_SHADOW, MISC_SHDW_MODE_CTL);
5371 bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &mode_ctl); 5375 bnx2_read_phy(bp, MII_BNX2_MISC_SHADOW, &mode_ctl);
5372 5376
@@ -7328,7 +7332,15 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
7328 bp->flags |= BNX2_FLAG_NO_WOL; 7332 bp->flags |= BNX2_FLAG_NO_WOL;
7329 bp->wol = 0; 7333 bp->wol = 0;
7330 } 7334 }
7331 if (CHIP_NUM(bp) != CHIP_NUM_5706) { 7335 if (CHIP_NUM(bp) == CHIP_NUM_5706) {
7336 /* Don't do parallel detect on this board because of
7337 * some board problems. The link will not go down
7338 * if we do parallel detect.
7339 */
7340 if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
7341 pdev->subsystem_device == 0x310c)
7342 bp->phy_flags |= BNX2_PHY_FLAG_NO_PARALLEL;
7343 } else {
7332 bp->phy_addr = 2; 7344 bp->phy_addr = 2;
7333 if (reg & BNX2_SHARED_HW_CFG_PHY_2_5G) 7345 if (reg & BNX2_SHARED_HW_CFG_PHY_2_5G)
7334 bp->phy_flags |= BNX2_PHY_FLAG_2_5G_CAPABLE; 7346 bp->phy_flags |= BNX2_PHY_FLAG_2_5G_CAPABLE;
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index 3aa0364942e2..1eaf5bb3d9c2 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -6673,6 +6673,7 @@ struct bnx2 {
6673#define BNX2_PHY_FLAG_DIS_EARLY_DAC 0x00000400 6673#define BNX2_PHY_FLAG_DIS_EARLY_DAC 0x00000400
6674#define BNX2_PHY_FLAG_REMOTE_PHY_CAP 0x00000800 6674#define BNX2_PHY_FLAG_REMOTE_PHY_CAP 0x00000800
6675#define BNX2_PHY_FLAG_FORCED_DOWN 0x00001000 6675#define BNX2_PHY_FLAG_FORCED_DOWN 0x00001000
6676#define BNX2_PHY_FLAG_NO_PARALLEL 0x00002000
6676 6677
6677 u32 mii_bmcr; 6678 u32 mii_bmcr;
6678 u32 mii_bmsr; 6679 u32 mii_bmsr;