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authorMaarten Maathuis <madman2003@gmail.com>2009-12-13 10:53:12 -0500
committerBen Skeggs <bskeggs@redhat.com>2009-12-16 02:04:48 -0500
commitef2bb506687a5f1cc8ef2fef370bb168b2808106 (patch)
tree5dbd6bbc7e2f6754be4e0875d532beae2456081b /drivers
parentdc4a684ae80d914b2b7fe75b2733a3296a8b92d2 (diff)
drm/nouveau: use drm debug levels
- Use driver level (0x2) for NV_DEBUG instead of all levels - Create a NV_DEBUG_KMS for KMS level (0x4) and use them in modesetting code - Remove a few odd NV_TRACE calls and replace some of them with NV_DEBUG_KMS or NV_INFO Signed-off-by: Maarten Maathuis <madman2003@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bios.c12
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_connector.c8
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_dp.c28
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h14
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fbcon.c2
-rw-r--r--drivers/gpu/drm/nouveau/nv04_crtc.c10
-rw-r--r--drivers/gpu/drm/nouveau/nv04_dac.c8
-rw-r--r--drivers/gpu/drm/nouveau/nv04_dfp.c8
-rw-r--r--drivers/gpu/drm/nouveau/nv04_display.c4
-rw-r--r--drivers/gpu/drm/nouveau/nv17_tv.c4
-rw-r--r--drivers/gpu/drm/nouveau/nv50_crtc.c22
-rw-r--r--drivers/gpu/drm/nouveau/nv50_cursor.c8
-rw-r--r--drivers/gpu/drm/nouveau/nv50_dac.c20
-rw-r--r--drivers/gpu/drm/nouveau/nv50_display.c20
-rw-r--r--drivers/gpu/drm/nouveau/nv50_sor.c16
15 files changed, 96 insertions, 88 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
index 5eec5ed69489..62fadbbd1f40 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
@@ -3854,7 +3854,7 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent,
3854 * script tables is a pointer to the script to execute. 3854 * script tables is a pointer to the script to execute.
3855 */ 3855 */
3856 3856
3857 NV_DEBUG(dev, "Searching for output entry for %d %d %d\n", 3857 NV_DEBUG_KMS(dev, "Searching for output entry for %d %d %d\n",
3858 dcbent->type, dcbent->location, dcbent->or); 3858 dcbent->type, dcbent->location, dcbent->or);
3859 otable = bios_output_config_match(dev, dcbent, table[1] + 3859 otable = bios_output_config_match(dev, dcbent, table[1] +
3860 bios->display.script_table_ptr, 3860 bios->display.script_table_ptr,
@@ -3884,7 +3884,7 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent,
3884 if (pxclk == 0) { 3884 if (pxclk == 0) {
3885 script = ROM16(otable[6]); 3885 script = ROM16(otable[6]);
3886 if (!script) { 3886 if (!script) {
3887 NV_DEBUG(dev, "output script 0 not found\n"); 3887 NV_DEBUG_KMS(dev, "output script 0 not found\n");
3888 return 1; 3888 return 1;
3889 } 3889 }
3890 3890
@@ -3894,7 +3894,7 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent,
3894 if (pxclk == -1) { 3894 if (pxclk == -1) {
3895 script = ROM16(otable[8]); 3895 script = ROM16(otable[8]);
3896 if (!script) { 3896 if (!script) {
3897 NV_DEBUG(dev, "output script 1 not found\n"); 3897 NV_DEBUG_KMS(dev, "output script 1 not found\n");
3898 return 1; 3898 return 1;
3899 } 3899 }
3900 3900
@@ -3907,7 +3907,7 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent,
3907 else 3907 else
3908 script = 0; 3908 script = 0;
3909 if (!script) { 3909 if (!script) {
3910 NV_DEBUG(dev, "output script 2 not found\n"); 3910 NV_DEBUG_KMS(dev, "output script 2 not found\n");
3911 return 1; 3911 return 1;
3912 } 3912 }
3913 3913
@@ -3931,7 +3931,7 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent,
3931 if (script) 3931 if (script)
3932 script = clkcmptable(bios, script, -pxclk); 3932 script = clkcmptable(bios, script, -pxclk);
3933 if (!script) { 3933 if (!script) {
3934 NV_DEBUG(dev, "clock script 1 not found\n"); 3934 NV_DEBUG_KMS(dev, "clock script 1 not found\n");
3935 return 1; 3935 return 1;
3936 } 3936 }
3937 3937
@@ -5234,7 +5234,7 @@ parse_dcb_connector_table(struct nvbios *bios)
5234 int i; 5234 int i;
5235 5235
5236 if (!bios->bdcb.connector_table_ptr) { 5236 if (!bios->bdcb.connector_table_ptr) {
5237 NV_DEBUG(dev, "No DCB connector table present\n"); 5237 NV_DEBUG_KMS(dev, "No DCB connector table present\n");
5238 return; 5238 return;
5239 } 5239 }
5240 5240
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 032cf098fa1c..5a10deb8bdbd 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -86,7 +86,7 @@ nouveau_connector_destroy(struct drm_connector *drm_connector)
86 struct nouveau_connector *connector = nouveau_connector(drm_connector); 86 struct nouveau_connector *connector = nouveau_connector(drm_connector);
87 struct drm_device *dev = connector->base.dev; 87 struct drm_device *dev = connector->base.dev;
88 88
89 NV_DEBUG(dev, "\n"); 89 NV_DEBUG_KMS(dev, "\n");
90 90
91 if (!connector) 91 if (!connector)
92 return; 92 return;
@@ -420,7 +420,7 @@ nouveau_connector_native_mode(struct nouveau_connector *connector)
420 /* Use preferred mode if there is one.. */ 420 /* Use preferred mode if there is one.. */
421 list_for_each_entry(mode, &connector->base.probed_modes, head) { 421 list_for_each_entry(mode, &connector->base.probed_modes, head) {
422 if (mode->type & DRM_MODE_TYPE_PREFERRED) { 422 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
423 NV_DEBUG(dev, "native mode from preferred\n"); 423 NV_DEBUG_KMS(dev, "native mode from preferred\n");
424 return drm_mode_duplicate(dev, mode); 424 return drm_mode_duplicate(dev, mode);
425 } 425 }
426 } 426 }
@@ -445,7 +445,7 @@ nouveau_connector_native_mode(struct nouveau_connector *connector)
445 largest = mode; 445 largest = mode;
446 } 446 }
447 447
448 NV_DEBUG(dev, "native mode from largest: %dx%d@%d\n", 448 NV_DEBUG_KMS(dev, "native mode from largest: %dx%d@%d\n",
449 high_w, high_h, high_v); 449 high_w, high_h, high_v);
450 return largest ? drm_mode_duplicate(dev, largest) : NULL; 450 return largest ? drm_mode_duplicate(dev, largest) : NULL;
451} 451}
@@ -725,7 +725,7 @@ nouveau_connector_create(struct drm_device *dev, int index, int type)
725 struct drm_encoder *encoder; 725 struct drm_encoder *encoder;
726 int ret; 726 int ret;
727 727
728 NV_DEBUG(dev, "\n"); 728 NV_DEBUG_KMS(dev, "\n");
729 729
730 nv_connector = kzalloc(sizeof(*nv_connector), GFP_KERNEL); 730 nv_connector = kzalloc(sizeof(*nv_connector), GFP_KERNEL);
731 if (!nv_connector) 731 if (!nv_connector)
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c b/drivers/gpu/drm/nouveau/nouveau_dp.c
index de61f4640e12..9e2926c48579 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -187,7 +187,7 @@ nouveau_dp_link_train_adjust(struct drm_encoder *encoder, uint8_t *config)
187 if (ret) 187 if (ret)
188 return false; 188 return false;
189 189
190 NV_DEBUG(dev, "\t\tadjust 0x%02x 0x%02x\n", request[0], request[1]); 190 NV_DEBUG_KMS(dev, "\t\tadjust 0x%02x 0x%02x\n", request[0], request[1]);
191 191
192 /* Keep all lanes at the same level.. */ 192 /* Keep all lanes at the same level.. */
193 for (i = 0; i < nv_encoder->dp.link_nr; i++) { 193 for (i = 0; i < nv_encoder->dp.link_nr; i++) {
@@ -228,7 +228,7 @@ nouveau_dp_link_train_commit(struct drm_encoder *encoder, uint8_t *config)
228 int or = nv_encoder->or, link = !(nv_encoder->dcb->sorconf.link & 1); 228 int or = nv_encoder->or, link = !(nv_encoder->dcb->sorconf.link & 1);
229 int dpe_headerlen, ret, i; 229 int dpe_headerlen, ret, i;
230 230
231 NV_DEBUG(dev, "\t\tconfig 0x%02x 0x%02x 0x%02x 0x%02x\n", 231 NV_DEBUG_KMS(dev, "\t\tconfig 0x%02x 0x%02x 0x%02x 0x%02x\n",
232 config[0], config[1], config[2], config[3]); 232 config[0], config[1], config[2], config[3]);
233 233
234 dpe = nouveau_bios_dp_table(dev, nv_encoder->dcb, &dpe_headerlen); 234 dpe = nouveau_bios_dp_table(dev, nv_encoder->dcb, &dpe_headerlen);
@@ -276,12 +276,12 @@ nouveau_dp_link_train(struct drm_encoder *encoder)
276 bool cr_done, cr_max_vs, eq_done; 276 bool cr_done, cr_max_vs, eq_done;
277 int ret = 0, i, tries, voltage; 277 int ret = 0, i, tries, voltage;
278 278
279 NV_DEBUG(dev, "link training!!\n"); 279 NV_DEBUG_KMS(dev, "link training!!\n");
280train: 280train:
281 cr_done = eq_done = false; 281 cr_done = eq_done = false;
282 282
283 /* set link configuration */ 283 /* set link configuration */
284 NV_DEBUG(dev, "\tbegin train: bw %d, lanes %d\n", 284 NV_DEBUG_KMS(dev, "\tbegin train: bw %d, lanes %d\n",
285 nv_encoder->dp.link_bw, nv_encoder->dp.link_nr); 285 nv_encoder->dp.link_bw, nv_encoder->dp.link_nr);
286 286
287 ret = nouveau_dp_link_bw_set(encoder, nv_encoder->dp.link_bw); 287 ret = nouveau_dp_link_bw_set(encoder, nv_encoder->dp.link_bw);
@@ -297,7 +297,7 @@ train:
297 return false; 297 return false;
298 298
299 /* clock recovery */ 299 /* clock recovery */
300 NV_DEBUG(dev, "\tbegin cr\n"); 300 NV_DEBUG_KMS(dev, "\tbegin cr\n");
301 ret = nouveau_dp_link_train_set(encoder, DP_TRAINING_PATTERN_1); 301 ret = nouveau_dp_link_train_set(encoder, DP_TRAINING_PATTERN_1);
302 if (ret) 302 if (ret)
303 goto stop; 303 goto stop;
@@ -314,7 +314,7 @@ train:
314 ret = auxch_rd(encoder, DP_LANE0_1_STATUS, status, 2); 314 ret = auxch_rd(encoder, DP_LANE0_1_STATUS, status, 2);
315 if (ret) 315 if (ret)
316 break; 316 break;
317 NV_DEBUG(dev, "\t\tstatus: 0x%02x 0x%02x\n", 317 NV_DEBUG_KMS(dev, "\t\tstatus: 0x%02x 0x%02x\n",
318 status[0], status[1]); 318 status[0], status[1]);
319 319
320 cr_done = true; 320 cr_done = true;
@@ -346,7 +346,7 @@ train:
346 goto stop; 346 goto stop;
347 347
348 /* channel equalisation */ 348 /* channel equalisation */
349 NV_DEBUG(dev, "\tbegin eq\n"); 349 NV_DEBUG_KMS(dev, "\tbegin eq\n");
350 ret = nouveau_dp_link_train_set(encoder, DP_TRAINING_PATTERN_2); 350 ret = nouveau_dp_link_train_set(encoder, DP_TRAINING_PATTERN_2);
351 if (ret) 351 if (ret)
352 goto stop; 352 goto stop;
@@ -357,7 +357,7 @@ train:
357 ret = auxch_rd(encoder, DP_LANE0_1_STATUS, status, 3); 357 ret = auxch_rd(encoder, DP_LANE0_1_STATUS, status, 3);
358 if (ret) 358 if (ret)
359 break; 359 break;
360 NV_DEBUG(dev, "\t\tstatus: 0x%02x 0x%02x\n", 360 NV_DEBUG_KMS(dev, "\t\tstatus: 0x%02x 0x%02x\n",
361 status[0], status[1]); 361 status[0], status[1]);
362 362
363 eq_done = true; 363 eq_done = true;
@@ -395,9 +395,9 @@ stop:
395 395
396 /* retry at a lower setting, if possible */ 396 /* retry at a lower setting, if possible */
397 if (!ret && !(eq_done && cr_done)) { 397 if (!ret && !(eq_done && cr_done)) {
398 NV_DEBUG(dev, "\twe failed\n"); 398 NV_DEBUG_KMS(dev, "\twe failed\n");
399 if (nv_encoder->dp.link_bw != DP_LINK_BW_1_62) { 399 if (nv_encoder->dp.link_bw != DP_LINK_BW_1_62) {
400 NV_DEBUG(dev, "retry link training at low rate\n"); 400 NV_DEBUG_KMS(dev, "retry link training at low rate\n");
401 nv_encoder->dp.link_bw = DP_LINK_BW_1_62; 401 nv_encoder->dp.link_bw = DP_LINK_BW_1_62;
402 goto train; 402 goto train;
403 } 403 }
@@ -418,7 +418,7 @@ nouveau_dp_detect(struct drm_encoder *encoder)
418 if (ret) 418 if (ret)
419 return false; 419 return false;
420 420
421 NV_DEBUG(dev, "encoder: link_bw %d, link_nr %d\n" 421 NV_DEBUG_KMS(dev, "encoder: link_bw %d, link_nr %d\n"
422 "display: link_bw %d, link_nr %d version 0x%02x\n", 422 "display: link_bw %d, link_nr %d version 0x%02x\n",
423 nv_encoder->dcb->dpconf.link_bw, 423 nv_encoder->dcb->dpconf.link_bw,
424 nv_encoder->dcb->dpconf.link_nr, 424 nv_encoder->dcb->dpconf.link_nr,
@@ -446,7 +446,7 @@ nouveau_dp_auxch(struct nouveau_i2c_chan *auxch, int cmd, int addr,
446 uint32_t tmp, ctrl, stat = 0, data32[4] = {}; 446 uint32_t tmp, ctrl, stat = 0, data32[4] = {};
447 int ret = 0, i, index = auxch->rd; 447 int ret = 0, i, index = auxch->rd;
448 448
449 NV_DEBUG(dev, "ch %d cmd %d addr 0x%x len %d\n", index, cmd, addr, data_nr); 449 NV_DEBUG_KMS(dev, "ch %d cmd %d addr 0x%x len %d\n", index, cmd, addr, data_nr);
450 450
451 tmp = nv_rd32(dev, NV50_AUXCH_CTRL(auxch->rd)); 451 tmp = nv_rd32(dev, NV50_AUXCH_CTRL(auxch->rd));
452 nv_wr32(dev, NV50_AUXCH_CTRL(auxch->rd), tmp | 0x00100000); 452 nv_wr32(dev, NV50_AUXCH_CTRL(auxch->rd), tmp | 0x00100000);
@@ -472,7 +472,7 @@ nouveau_dp_auxch(struct nouveau_i2c_chan *auxch, int cmd, int addr,
472 if (!(cmd & 1)) { 472 if (!(cmd & 1)) {
473 memcpy(data32, data, data_nr); 473 memcpy(data32, data, data_nr);
474 for (i = 0; i < 4; i++) { 474 for (i = 0; i < 4; i++) {
475 NV_DEBUG(dev, "wr %d: 0x%08x\n", i, data32[i]); 475 NV_DEBUG_KMS(dev, "wr %d: 0x%08x\n", i, data32[i]);
476 nv_wr32(dev, NV50_AUXCH_DATA_OUT(index, i), data32[i]); 476 nv_wr32(dev, NV50_AUXCH_DATA_OUT(index, i), data32[i]);
477 } 477 }
478 } 478 }
@@ -504,7 +504,7 @@ nouveau_dp_auxch(struct nouveau_i2c_chan *auxch, int cmd, int addr,
504 if (cmd & 1) { 504 if (cmd & 1) {
505 for (i = 0; i < 4; i++) { 505 for (i = 0; i < 4; i++) {
506 data32[i] = nv_rd32(dev, NV50_AUXCH_DATA_IN(index, i)); 506 data32[i] = nv_rd32(dev, NV50_AUXCH_DATA_IN(index, i));
507 NV_DEBUG(dev, "rd %d: 0x%08x\n", i, data32[i]); 507 NV_DEBUG_KMS(dev, "rd %d: 0x%08x\n", i, data32[i]);
508 } 508 }
509 memcpy(data, data32, data_nr); 509 memcpy(data, data32, data_nr);
510 } 510 }
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 88b4c7b77e7f..bc6ffa5eeac7 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -1207,14 +1207,24 @@ static inline void nv_wo32(struct drm_device *dev, struct nouveau_gpuobj *obj,
1207 pci_name(d->pdev), ##arg) 1207 pci_name(d->pdev), ##arg)
1208#ifndef NV_DEBUG_NOTRACE 1208#ifndef NV_DEBUG_NOTRACE
1209#define NV_DEBUG(d, fmt, arg...) do { \ 1209#define NV_DEBUG(d, fmt, arg...) do { \
1210 if (drm_debug) { \ 1210 if (drm_debug & DRM_UT_DRIVER) { \
1211 NV_PRINTK(KERN_DEBUG, d, "%s:%d - " fmt, __func__, \
1212 __LINE__, ##arg); \
1213 } \
1214} while (0)
1215#define NV_DEBUG_KMS(d, fmt, arg...) do { \
1216 if (drm_debug & DRM_UT_KMS) { \
1211 NV_PRINTK(KERN_DEBUG, d, "%s:%d - " fmt, __func__, \ 1217 NV_PRINTK(KERN_DEBUG, d, "%s:%d - " fmt, __func__, \
1212 __LINE__, ##arg); \ 1218 __LINE__, ##arg); \
1213 } \ 1219 } \
1214} while (0) 1220} while (0)
1215#else 1221#else
1216#define NV_DEBUG(d, fmt, arg...) do { \ 1222#define NV_DEBUG(d, fmt, arg...) do { \
1217 if (drm_debug) \ 1223 if (drm_debug & DRM_UT_DRIVER) \
1224 NV_PRINTK(KERN_DEBUG, d, fmt, ##arg); \
1225} while (0)
1226#define NV_DEBUG_KMS(d, fmt, arg...) do { \
1227 if (drm_debug & DRM_UT_KMS) \
1218 NV_PRINTK(KERN_DEBUG, d, fmt, ##arg); \ 1228 NV_PRINTK(KERN_DEBUG, d, fmt, ##arg); \
1219} while (0) 1229} while (0)
1220#endif 1230#endif
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index 36e8c5e4503a..489d49268119 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -347,7 +347,7 @@ out:
347int 347int
348nouveau_fbcon_probe(struct drm_device *dev) 348nouveau_fbcon_probe(struct drm_device *dev)
349{ 349{
350 NV_DEBUG(dev, "\n"); 350 NV_DEBUG_KMS(dev, "\n");
351 351
352 return drm_fb_helper_single_fb_probe(dev, 32, nouveau_fbcon_create); 352 return drm_fb_helper_single_fb_probe(dev, 32, nouveau_fbcon_create);
353} 353}
diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c b/drivers/gpu/drm/nouveau/nv04_crtc.c
index b91363606055..d2f143ed97c1 100644
--- a/drivers/gpu/drm/nouveau/nv04_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv04_crtc.c
@@ -143,10 +143,10 @@ static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mod
143 state->pllsel |= nv_crtc->index ? PLLSEL_VPLL2_MASK : PLLSEL_VPLL1_MASK; 143 state->pllsel |= nv_crtc->index ? PLLSEL_VPLL2_MASK : PLLSEL_VPLL1_MASK;
144 144
145 if (pv->NM2) 145 if (pv->NM2)
146 NV_TRACE(dev, "vpll: n1 %d n2 %d m1 %d m2 %d log2p %d\n", 146 NV_DEBUG_KMS(dev, "vpll: n1 %d n2 %d m1 %d m2 %d log2p %d\n",
147 pv->N1, pv->N2, pv->M1, pv->M2, pv->log2P); 147 pv->N1, pv->N2, pv->M1, pv->M2, pv->log2P);
148 else 148 else
149 NV_TRACE(dev, "vpll: n %d m %d log2p %d\n", 149 NV_DEBUG_KMS(dev, "vpll: n %d m %d log2p %d\n",
150 pv->N1, pv->M1, pv->log2P); 150 pv->N1, pv->M1, pv->log2P);
151 151
152 nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.offset); 152 nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.offset);
@@ -160,7 +160,7 @@ nv_crtc_dpms(struct drm_crtc *crtc, int mode)
160 unsigned char seq1 = 0, crtc17 = 0; 160 unsigned char seq1 = 0, crtc17 = 0;
161 unsigned char crtc1A; 161 unsigned char crtc1A;
162 162
163 NV_TRACE(dev, "Setting dpms mode %d on CRTC %d\n", mode, 163 NV_DEBUG_KMS(dev, "Setting dpms mode %d on CRTC %d\n", mode,
164 nv_crtc->index); 164 nv_crtc->index);
165 165
166 if (nv_crtc->last_dpms == mode) /* Don't do unnecesary mode changes. */ 166 if (nv_crtc->last_dpms == mode) /* Don't do unnecesary mode changes. */
@@ -603,7 +603,7 @@ nv_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
603 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 603 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
604 struct drm_nouveau_private *dev_priv = dev->dev_private; 604 struct drm_nouveau_private *dev_priv = dev->dev_private;
605 605
606 NV_DEBUG(dev, "CTRC mode on CRTC %d:\n", nv_crtc->index); 606 NV_DEBUG_KMS(dev, "CTRC mode on CRTC %d:\n", nv_crtc->index);
607 drm_mode_debug_printmodeline(adjusted_mode); 607 drm_mode_debug_printmodeline(adjusted_mode);
608 608
609 /* unlock must come after turning off FP_TG_CONTROL in output_prepare */ 609 /* unlock must come after turning off FP_TG_CONTROL in output_prepare */
@@ -703,7 +703,7 @@ static void nv_crtc_destroy(struct drm_crtc *crtc)
703{ 703{
704 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 704 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
705 705
706 NV_DEBUG(crtc->dev, "\n"); 706 NV_DEBUG_KMS(crtc->dev, "\n");
707 707
708 if (!nv_crtc) 708 if (!nv_crtc)
709 return; 709 return;
diff --git a/drivers/gpu/drm/nouveau/nv04_dac.c b/drivers/gpu/drm/nouveau/nv04_dac.c
index a5fa51714e87..d9f32879ba38 100644
--- a/drivers/gpu/drm/nouveau/nv04_dac.c
+++ b/drivers/gpu/drm/nouveau/nv04_dac.c
@@ -205,7 +205,7 @@ out:
205 NVWriteVgaSeq(dev, 0, NV_VIO_SR_CLOCK_INDEX, saved_seq1); 205 NVWriteVgaSeq(dev, 0, NV_VIO_SR_CLOCK_INDEX, saved_seq1);
206 206
207 if (blue == 0x18) { 207 if (blue == 0x18) {
208 NV_TRACE(dev, "Load detected on head A\n"); 208 NV_INFO(dev, "Load detected on head A\n");
209 return connector_status_connected; 209 return connector_status_connected;
210 } 210 }
211 211
@@ -350,14 +350,10 @@ static void nv04_dac_mode_set(struct drm_encoder *encoder,
350 struct drm_display_mode *mode, 350 struct drm_display_mode *mode,
351 struct drm_display_mode *adjusted_mode) 351 struct drm_display_mode *adjusted_mode)
352{ 352{
353 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
354 struct drm_device *dev = encoder->dev; 353 struct drm_device *dev = encoder->dev;
355 struct drm_nouveau_private *dev_priv = dev->dev_private; 354 struct drm_nouveau_private *dev_priv = dev->dev_private;
356 int head = nouveau_crtc(encoder->crtc)->index; 355 int head = nouveau_crtc(encoder->crtc)->index;
357 356
358 NV_TRACE(dev, "%s called for encoder %d\n", __func__,
359 nv_encoder->dcb->index);
360
361 if (nv_gf4_disp_arch(dev)) { 357 if (nv_gf4_disp_arch(dev)) {
362 struct drm_encoder *rebind; 358 struct drm_encoder *rebind;
363 uint32_t dac_offset = nv04_dac_output_offset(encoder); 359 uint32_t dac_offset = nv04_dac_output_offset(encoder);
@@ -466,7 +462,7 @@ static void nv04_dac_destroy(struct drm_encoder *encoder)
466{ 462{
467 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 463 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
468 464
469 NV_DEBUG(encoder->dev, "\n"); 465 NV_DEBUG_KMS(encoder->dev, "\n");
470 466
471 drm_encoder_cleanup(encoder); 467 drm_encoder_cleanup(encoder);
472 kfree(nv_encoder); 468 kfree(nv_encoder);
diff --git a/drivers/gpu/drm/nouveau/nv04_dfp.c b/drivers/gpu/drm/nouveau/nv04_dfp.c
index e5b33339d595..483f875bdb6a 100644
--- a/drivers/gpu/drm/nouveau/nv04_dfp.c
+++ b/drivers/gpu/drm/nouveau/nv04_dfp.c
@@ -261,7 +261,7 @@ static void nv04_dfp_mode_set(struct drm_encoder *encoder,
261 struct drm_display_mode *output_mode = &nv_encoder->mode; 261 struct drm_display_mode *output_mode = &nv_encoder->mode;
262 uint32_t mode_ratio, panel_ratio; 262 uint32_t mode_ratio, panel_ratio;
263 263
264 NV_DEBUG(dev, "Output mode on CRTC %d:\n", nv_crtc->index); 264 NV_DEBUG_KMS(dev, "Output mode on CRTC %d:\n", nv_crtc->index);
265 drm_mode_debug_printmodeline(output_mode); 265 drm_mode_debug_printmodeline(output_mode);
266 266
267 /* Initialize the FP registers in this CRTC. */ 267 /* Initialize the FP registers in this CRTC. */
@@ -413,7 +413,9 @@ static void nv04_dfp_commit(struct drm_encoder *encoder)
413 struct dcb_entry *dcbe = nv_encoder->dcb; 413 struct dcb_entry *dcbe = nv_encoder->dcb;
414 int head = nouveau_crtc(encoder->crtc)->index; 414 int head = nouveau_crtc(encoder->crtc)->index;
415 415
416 NV_TRACE(dev, "%s called for encoder %d\n", __func__, nv_encoder->dcb->index); 416 NV_INFO(dev, "Output %s is running on CRTC %d using output %c\n",
417 drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base),
418 nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
417 419
418 if (dcbe->type == OUTPUT_TMDS) 420 if (dcbe->type == OUTPUT_TMDS)
419 run_tmds_table(dev, dcbe, head, nv_encoder->mode.clock); 421 run_tmds_table(dev, dcbe, head, nv_encoder->mode.clock);
@@ -550,7 +552,7 @@ static void nv04_dfp_destroy(struct drm_encoder *encoder)
550{ 552{
551 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 553 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
552 554
553 NV_DEBUG(encoder->dev, "\n"); 555 NV_DEBUG_KMS(encoder->dev, "\n");
554 556
555 drm_encoder_cleanup(encoder); 557 drm_encoder_cleanup(encoder);
556 kfree(nv_encoder); 558 kfree(nv_encoder);
diff --git a/drivers/gpu/drm/nouveau/nv04_display.c b/drivers/gpu/drm/nouveau/nv04_display.c
index cdddbaa8c450..ef77215fa5b9 100644
--- a/drivers/gpu/drm/nouveau/nv04_display.c
+++ b/drivers/gpu/drm/nouveau/nv04_display.c
@@ -99,7 +99,7 @@ nv04_display_create(struct drm_device *dev)
99 uint16_t connector[16] = { 0 }; 99 uint16_t connector[16] = { 0 };
100 int i, ret; 100 int i, ret;
101 101
102 NV_DEBUG(dev, "\n"); 102 NV_DEBUG_KMS(dev, "\n");
103 103
104 if (nv_two_heads(dev)) 104 if (nv_two_heads(dev))
105 nv04_display_store_initial_head_owner(dev); 105 nv04_display_store_initial_head_owner(dev);
@@ -222,7 +222,7 @@ nv04_display_destroy(struct drm_device *dev)
222 struct drm_encoder *encoder; 222 struct drm_encoder *encoder;
223 struct drm_crtc *crtc; 223 struct drm_crtc *crtc;
224 224
225 NV_DEBUG(dev, "\n"); 225 NV_DEBUG_KMS(dev, "\n");
226 226
227 /* Turn every CRTC off. */ 227 /* Turn every CRTC off. */
228 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 228 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
diff --git a/drivers/gpu/drm/nouveau/nv17_tv.c b/drivers/gpu/drm/nouveau/nv17_tv.c
index 46cfd9c60478..81c01353a9f9 100644
--- a/drivers/gpu/drm/nouveau/nv17_tv.c
+++ b/drivers/gpu/drm/nouveau/nv17_tv.c
@@ -219,7 +219,7 @@ static void nv17_tv_dpms(struct drm_encoder *encoder, int mode)
219 return; 219 return;
220 nouveau_encoder(encoder)->last_dpms = mode; 220 nouveau_encoder(encoder)->last_dpms = mode;
221 221
222 NV_TRACE(dev, "Setting dpms mode %d on TV encoder (output %d)\n", 222 NV_INFO(dev, "Setting dpms mode %d on TV encoder (output %d)\n",
223 mode, nouveau_encoder(encoder)->dcb->index); 223 mode, nouveau_encoder(encoder)->dcb->index);
224 224
225 regs->ptv_200 &= ~1; 225 regs->ptv_200 &= ~1;
@@ -619,7 +619,7 @@ static void nv17_tv_destroy(struct drm_encoder *encoder)
619{ 619{
620 struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder); 620 struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
621 621
622 NV_DEBUG(encoder->dev, "\n"); 622 NV_DEBUG_KMS(encoder->dev, "\n");
623 623
624 drm_encoder_cleanup(encoder); 624 drm_encoder_cleanup(encoder);
625 kfree(tv_enc); 625 kfree(tv_enc);
diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c b/drivers/gpu/drm/nouveau/nv50_crtc.c
index f8e28a1e44e7..118d3285fd8c 100644
--- a/drivers/gpu/drm/nouveau/nv50_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv50_crtc.c
@@ -45,7 +45,7 @@ nv50_crtc_lut_load(struct drm_crtc *crtc)
45 void __iomem *lut = nvbo_kmap_obj_iovirtual(nv_crtc->lut.nvbo); 45 void __iomem *lut = nvbo_kmap_obj_iovirtual(nv_crtc->lut.nvbo);
46 int i; 46 int i;
47 47
48 NV_DEBUG(crtc->dev, "\n"); 48 NV_DEBUG_KMS(crtc->dev, "\n");
49 49
50 for (i = 0; i < 256; i++) { 50 for (i = 0; i < 256; i++) {
51 writew(nv_crtc->lut.r[i] >> 2, lut + 8*i + 0); 51 writew(nv_crtc->lut.r[i] >> 2, lut + 8*i + 0);
@@ -68,8 +68,8 @@ nv50_crtc_blank(struct nouveau_crtc *nv_crtc, bool blanked)
68 struct nouveau_channel *evo = dev_priv->evo; 68 struct nouveau_channel *evo = dev_priv->evo;
69 int index = nv_crtc->index, ret; 69 int index = nv_crtc->index, ret;
70 70
71 NV_DEBUG(dev, "index %d\n", nv_crtc->index); 71 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
72 NV_DEBUG(dev, "%s\n", blanked ? "blanked" : "unblanked"); 72 NV_DEBUG_KMS(dev, "%s\n", blanked ? "blanked" : "unblanked");
73 73
74 if (blanked) { 74 if (blanked) {
75 nv_crtc->cursor.hide(nv_crtc, false); 75 nv_crtc->cursor.hide(nv_crtc, false);
@@ -139,7 +139,7 @@ nv50_crtc_set_dither(struct nouveau_crtc *nv_crtc, bool on, bool update)
139 struct nouveau_channel *evo = dev_priv->evo; 139 struct nouveau_channel *evo = dev_priv->evo;
140 int ret; 140 int ret;
141 141
142 NV_DEBUG(dev, "\n"); 142 NV_DEBUG_KMS(dev, "\n");
143 143
144 ret = RING_SPACE(evo, 2 + (update ? 2 : 0)); 144 ret = RING_SPACE(evo, 2 + (update ? 2 : 0));
145 if (ret) { 145 if (ret) {
@@ -193,7 +193,7 @@ nv50_crtc_set_scale(struct nouveau_crtc *nv_crtc, int scaling_mode, bool update)
193 uint32_t outX, outY, horiz, vert; 193 uint32_t outX, outY, horiz, vert;
194 int ret; 194 int ret;
195 195
196 NV_DEBUG(dev, "\n"); 196 NV_DEBUG_KMS(dev, "\n");
197 197
198 switch (scaling_mode) { 198 switch (scaling_mode) {
199 case DRM_MODE_SCALE_NONE: 199 case DRM_MODE_SCALE_NONE:
@@ -301,7 +301,7 @@ nv50_crtc_destroy(struct drm_crtc *crtc)
301 struct drm_device *dev = crtc->dev; 301 struct drm_device *dev = crtc->dev;
302 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 302 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
303 303
304 NV_DEBUG(dev, "\n"); 304 NV_DEBUG_KMS(dev, "\n");
305 305
306 if (!crtc) 306 if (!crtc)
307 return; 307 return;
@@ -433,7 +433,7 @@ nv50_crtc_prepare(struct drm_crtc *crtc)
433 struct drm_device *dev = crtc->dev; 433 struct drm_device *dev = crtc->dev;
434 struct drm_encoder *encoder; 434 struct drm_encoder *encoder;
435 435
436 NV_DEBUG(dev, "index %d\n", nv_crtc->index); 436 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
437 437
438 /* Disconnect all unused encoders. */ 438 /* Disconnect all unused encoders. */
439 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 439 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
@@ -458,7 +458,7 @@ nv50_crtc_commit(struct drm_crtc *crtc)
458 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 458 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
459 int ret; 459 int ret;
460 460
461 NV_DEBUG(dev, "index %d\n", nv_crtc->index); 461 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
462 462
463 nv50_crtc_blank(nv_crtc, false); 463 nv50_crtc_blank(nv_crtc, false);
464 464
@@ -497,7 +497,7 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc, int x, int y,
497 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); 497 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
498 int ret, format; 498 int ret, format;
499 499
500 NV_DEBUG(dev, "index %d\n", nv_crtc->index); 500 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
501 501
502 switch (drm_fb->depth) { 502 switch (drm_fb->depth) {
503 case 8: 503 case 8:
@@ -612,7 +612,7 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
612 612
613 *nv_crtc->mode = *adjusted_mode; 613 *nv_crtc->mode = *adjusted_mode;
614 614
615 NV_DEBUG(dev, "index %d\n", nv_crtc->index); 615 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
616 616
617 hsync_dur = adjusted_mode->hsync_end - adjusted_mode->hsync_start; 617 hsync_dur = adjusted_mode->hsync_end - adjusted_mode->hsync_start;
618 vsync_dur = adjusted_mode->vsync_end - adjusted_mode->vsync_start; 618 vsync_dur = adjusted_mode->vsync_end - adjusted_mode->vsync_start;
@@ -706,7 +706,7 @@ nv50_crtc_create(struct drm_device *dev, int index)
706 struct nouveau_crtc *nv_crtc = NULL; 706 struct nouveau_crtc *nv_crtc = NULL;
707 int ret, i; 707 int ret, i;
708 708
709 NV_DEBUG(dev, "\n"); 709 NV_DEBUG_KMS(dev, "\n");
710 710
711 nv_crtc = kzalloc(sizeof(*nv_crtc), GFP_KERNEL); 711 nv_crtc = kzalloc(sizeof(*nv_crtc), GFP_KERNEL);
712 if (!nv_crtc) 712 if (!nv_crtc)
diff --git a/drivers/gpu/drm/nouveau/nv50_cursor.c b/drivers/gpu/drm/nouveau/nv50_cursor.c
index e2e79a8f220d..753e723adb3a 100644
--- a/drivers/gpu/drm/nouveau/nv50_cursor.c
+++ b/drivers/gpu/drm/nouveau/nv50_cursor.c
@@ -41,7 +41,7 @@ nv50_cursor_show(struct nouveau_crtc *nv_crtc, bool update)
41 struct drm_device *dev = nv_crtc->base.dev; 41 struct drm_device *dev = nv_crtc->base.dev;
42 int ret; 42 int ret;
43 43
44 NV_DEBUG(dev, "\n"); 44 NV_DEBUG_KMS(dev, "\n");
45 45
46 if (update && nv_crtc->cursor.visible) 46 if (update && nv_crtc->cursor.visible)
47 return; 47 return;
@@ -76,7 +76,7 @@ nv50_cursor_hide(struct nouveau_crtc *nv_crtc, bool update)
76 struct drm_device *dev = nv_crtc->base.dev; 76 struct drm_device *dev = nv_crtc->base.dev;
77 int ret; 77 int ret;
78 78
79 NV_DEBUG(dev, "\n"); 79 NV_DEBUG_KMS(dev, "\n");
80 80
81 if (update && !nv_crtc->cursor.visible) 81 if (update && !nv_crtc->cursor.visible)
82 return; 82 return;
@@ -116,7 +116,7 @@ nv50_cursor_set_pos(struct nouveau_crtc *nv_crtc, int x, int y)
116static void 116static void
117nv50_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset) 117nv50_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset)
118{ 118{
119 NV_DEBUG(nv_crtc->base.dev, "\n"); 119 NV_DEBUG_KMS(nv_crtc->base.dev, "\n");
120 if (offset == nv_crtc->cursor.offset) 120 if (offset == nv_crtc->cursor.offset)
121 return; 121 return;
122 122
@@ -143,7 +143,7 @@ nv50_cursor_fini(struct nouveau_crtc *nv_crtc)
143 struct drm_device *dev = nv_crtc->base.dev; 143 struct drm_device *dev = nv_crtc->base.dev;
144 int idx = nv_crtc->index; 144 int idx = nv_crtc->index;
145 145
146 NV_DEBUG(dev, "\n"); 146 NV_DEBUG_KMS(dev, "\n");
147 147
148 nv_wr32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx), 0); 148 nv_wr32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx), 0);
149 if (!nv_wait(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx), 149 if (!nv_wait(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx),
diff --git a/drivers/gpu/drm/nouveau/nv50_dac.c b/drivers/gpu/drm/nouveau/nv50_dac.c
index fb5838e3be24..f08f042a8e10 100644
--- a/drivers/gpu/drm/nouveau/nv50_dac.c
+++ b/drivers/gpu/drm/nouveau/nv50_dac.c
@@ -44,7 +44,7 @@ nv50_dac_disconnect(struct nouveau_encoder *nv_encoder)
44 struct nouveau_channel *evo = dev_priv->evo; 44 struct nouveau_channel *evo = dev_priv->evo;
45 int ret; 45 int ret;
46 46
47 NV_DEBUG(dev, "Disconnecting DAC %d\n", nv_encoder->or); 47 NV_DEBUG_KMS(dev, "Disconnecting DAC %d\n", nv_encoder->or);
48 48
49 ret = RING_SPACE(evo, 2); 49 ret = RING_SPACE(evo, 2);
50 if (ret) { 50 if (ret) {
@@ -81,11 +81,11 @@ nv50_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
81 /* Use bios provided value if possible. */ 81 /* Use bios provided value if possible. */
82 if (dev_priv->vbios->dactestval) { 82 if (dev_priv->vbios->dactestval) {
83 load_pattern = dev_priv->vbios->dactestval; 83 load_pattern = dev_priv->vbios->dactestval;
84 NV_DEBUG(dev, "Using bios provided load_pattern of %d\n", 84 NV_DEBUG_KMS(dev, "Using bios provided load_pattern of %d\n",
85 load_pattern); 85 load_pattern);
86 } else { 86 } else {
87 load_pattern = 340; 87 load_pattern = 340;
88 NV_DEBUG(dev, "Using default load_pattern of %d\n", 88 NV_DEBUG_KMS(dev, "Using default load_pattern of %d\n",
89 load_pattern); 89 load_pattern);
90 } 90 }
91 91
@@ -103,9 +103,9 @@ nv50_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
103 status = connector_status_connected; 103 status = connector_status_connected;
104 104
105 if (status == connector_status_connected) 105 if (status == connector_status_connected)
106 NV_DEBUG(dev, "Load was detected on output with or %d\n", or); 106 NV_DEBUG_KMS(dev, "Load was detected on output with or %d\n", or);
107 else 107 else
108 NV_DEBUG(dev, "Load was not detected on output with or %d\n", or); 108 NV_DEBUG_KMS(dev, "Load was not detected on output with or %d\n", or);
109 109
110 return status; 110 return status;
111} 111}
@@ -118,7 +118,7 @@ nv50_dac_dpms(struct drm_encoder *encoder, int mode)
118 uint32_t val; 118 uint32_t val;
119 int or = nv_encoder->or; 119 int or = nv_encoder->or;
120 120
121 NV_DEBUG(dev, "or %d mode %d\n", or, mode); 121 NV_DEBUG_KMS(dev, "or %d mode %d\n", or, mode);
122 122
123 /* wait for it to be done */ 123 /* wait for it to be done */
124 if (!nv_wait(NV50_PDISPLAY_DAC_DPMS_CTRL(or), 124 if (!nv_wait(NV50_PDISPLAY_DAC_DPMS_CTRL(or),
@@ -173,7 +173,7 @@ nv50_dac_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
173 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 173 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
174 struct nouveau_connector *connector; 174 struct nouveau_connector *connector;
175 175
176 NV_DEBUG(encoder->dev, "or %d\n", nv_encoder->or); 176 NV_DEBUG_KMS(encoder->dev, "or %d\n", nv_encoder->or);
177 177
178 connector = nouveau_encoder_connector_get(nv_encoder); 178 connector = nouveau_encoder_connector_get(nv_encoder);
179 if (!connector) { 179 if (!connector) {
@@ -213,7 +213,7 @@ nv50_dac_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
213 uint32_t mode_ctl = 0, mode_ctl2 = 0; 213 uint32_t mode_ctl = 0, mode_ctl2 = 0;
214 int ret; 214 int ret;
215 215
216 NV_DEBUG(dev, "or %d\n", nv_encoder->or); 216 NV_DEBUG_KMS(dev, "or %d\n", nv_encoder->or);
217 217
218 nv50_dac_dpms(encoder, DRM_MODE_DPMS_ON); 218 nv50_dac_dpms(encoder, DRM_MODE_DPMS_ON);
219 219
@@ -264,7 +264,7 @@ nv50_dac_destroy(struct drm_encoder *encoder)
264 if (!encoder) 264 if (!encoder)
265 return; 265 return;
266 266
267 NV_DEBUG(encoder->dev, "\n"); 267 NV_DEBUG_KMS(encoder->dev, "\n");
268 268
269 drm_encoder_cleanup(encoder); 269 drm_encoder_cleanup(encoder);
270 kfree(nv_encoder); 270 kfree(nv_encoder);
@@ -280,7 +280,7 @@ nv50_dac_create(struct drm_device *dev, struct dcb_entry *entry)
280 struct nouveau_encoder *nv_encoder; 280 struct nouveau_encoder *nv_encoder;
281 struct drm_encoder *encoder; 281 struct drm_encoder *encoder;
282 282
283 NV_DEBUG(dev, "\n"); 283 NV_DEBUG_KMS(dev, "\n");
284 NV_INFO(dev, "Detected a DAC output\n"); 284 NV_INFO(dev, "Detected a DAC output\n");
285 285
286 nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL); 286 nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 12c5ee63495b..a9263d92a231 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -188,7 +188,7 @@ nv50_display_init(struct drm_device *dev)
188 uint64_t start; 188 uint64_t start;
189 int ret, i; 189 int ret, i;
190 190
191 NV_DEBUG(dev, "\n"); 191 NV_DEBUG_KMS(dev, "\n");
192 192
193 nv_wr32(dev, 0x00610184, nv_rd32(dev, 0x00614004)); 193 nv_wr32(dev, 0x00610184, nv_rd32(dev, 0x00614004));
194 /* 194 /*
@@ -232,7 +232,7 @@ nv50_display_init(struct drm_device *dev)
232 nv_wr32(dev, NV50_PDISPLAY_UNK_380, 0); 232 nv_wr32(dev, NV50_PDISPLAY_UNK_380, 0);
233 /* RAM is clamped to 256 MiB. */ 233 /* RAM is clamped to 256 MiB. */
234 ram_amount = nouveau_mem_fb_amount(dev); 234 ram_amount = nouveau_mem_fb_amount(dev);
235 NV_DEBUG(dev, "ram_amount %d\n", ram_amount); 235 NV_DEBUG_KMS(dev, "ram_amount %d\n", ram_amount);
236 if (ram_amount > 256*1024*1024) 236 if (ram_amount > 256*1024*1024)
237 ram_amount = 256*1024*1024; 237 ram_amount = 256*1024*1024;
238 nv_wr32(dev, NV50_PDISPLAY_RAM_AMOUNT, ram_amount - 1); 238 nv_wr32(dev, NV50_PDISPLAY_RAM_AMOUNT, ram_amount - 1);
@@ -398,7 +398,7 @@ static int nv50_display_disable(struct drm_device *dev)
398 struct drm_crtc *drm_crtc; 398 struct drm_crtc *drm_crtc;
399 int ret, i; 399 int ret, i;
400 400
401 NV_DEBUG(dev, "\n"); 401 NV_DEBUG_KMS(dev, "\n");
402 402
403 list_for_each_entry(drm_crtc, &dev->mode_config.crtc_list, head) { 403 list_for_each_entry(drm_crtc, &dev->mode_config.crtc_list, head) {
404 struct nouveau_crtc *crtc = nouveau_crtc(drm_crtc); 404 struct nouveau_crtc *crtc = nouveau_crtc(drm_crtc);
@@ -469,7 +469,7 @@ int nv50_display_create(struct drm_device *dev)
469 uint32_t connector[16] = {}; 469 uint32_t connector[16] = {};
470 int ret, i; 470 int ret, i;
471 471
472 NV_DEBUG(dev, "\n"); 472 NV_DEBUG_KMS(dev, "\n");
473 473
474 /* init basic kernel modesetting */ 474 /* init basic kernel modesetting */
475 drm_mode_config_init(dev); 475 drm_mode_config_init(dev);
@@ -573,7 +573,7 @@ int nv50_display_destroy(struct drm_device *dev)
573{ 573{
574 struct drm_nouveau_private *dev_priv = dev->dev_private; 574 struct drm_nouveau_private *dev_priv = dev->dev_private;
575 575
576 NV_DEBUG(dev, "\n"); 576 NV_DEBUG_KMS(dev, "\n");
577 577
578 drm_mode_config_cleanup(dev); 578 drm_mode_config_cleanup(dev);
579 579
@@ -617,7 +617,7 @@ nv50_display_irq_head(struct drm_device *dev, int *phead,
617 * CRTC separately, and submission will be blocked by the GPU 617 * CRTC separately, and submission will be blocked by the GPU
618 * until we handle each in turn. 618 * until we handle each in turn.
619 */ 619 */
620 NV_DEBUG(dev, "0x610030: 0x%08x\n", unk30); 620 NV_DEBUG_KMS(dev, "0x610030: 0x%08x\n", unk30);
621 head = ffs((unk30 >> 9) & 3) - 1; 621 head = ffs((unk30 >> 9) & 3) - 1;
622 if (head < 0) 622 if (head < 0)
623 return -EINVAL; 623 return -EINVAL;
@@ -661,7 +661,7 @@ nv50_display_irq_head(struct drm_device *dev, int *phead,
661 or = i; 661 or = i;
662 } 662 }
663 663
664 NV_DEBUG(dev, "type %d, or %d\n", type, or); 664 NV_DEBUG_KMS(dev, "type %d, or %d\n", type, or);
665 if (type == OUTPUT_ANY) { 665 if (type == OUTPUT_ANY) {
666 NV_ERROR(dev, "unknown encoder!!\n"); 666 NV_ERROR(dev, "unknown encoder!!\n");
667 return -1; 667 return -1;
@@ -811,7 +811,7 @@ nv50_display_unk20_handler(struct drm_device *dev)
811 pclk = nv_rd32(dev, NV50_PDISPLAY_CRTC_P(head, CLOCK)) & 0x3fffff; 811 pclk = nv_rd32(dev, NV50_PDISPLAY_CRTC_P(head, CLOCK)) & 0x3fffff;
812 script = nv50_display_script_select(dev, dcbent, pclk); 812 script = nv50_display_script_select(dev, dcbent, pclk);
813 813
814 NV_DEBUG(dev, "head %d pxclk: %dKHz\n", head, pclk); 814 NV_DEBUG_KMS(dev, "head %d pxclk: %dKHz\n", head, pclk);
815 815
816 if (dcbent->type != OUTPUT_DP) 816 if (dcbent->type != OUTPUT_DP)
817 nouveau_bios_run_display_table(dev, dcbent, 0, -2); 817 nouveau_bios_run_display_table(dev, dcbent, 0, -2);
@@ -870,7 +870,7 @@ nv50_display_irq_handler_bh(struct work_struct *work)
870 uint32_t intr0 = nv_rd32(dev, NV50_PDISPLAY_INTR_0); 870 uint32_t intr0 = nv_rd32(dev, NV50_PDISPLAY_INTR_0);
871 uint32_t intr1 = nv_rd32(dev, NV50_PDISPLAY_INTR_1); 871 uint32_t intr1 = nv_rd32(dev, NV50_PDISPLAY_INTR_1);
872 872
873 NV_DEBUG(dev, "PDISPLAY_INTR_BH 0x%08x 0x%08x\n", intr0, intr1); 873 NV_DEBUG_KMS(dev, "PDISPLAY_INTR_BH 0x%08x 0x%08x\n", intr0, intr1);
874 874
875 if (intr1 & NV50_PDISPLAY_INTR_1_CLK_UNK10) 875 if (intr1 & NV50_PDISPLAY_INTR_1_CLK_UNK10)
876 nv50_display_unk10_handler(dev); 876 nv50_display_unk10_handler(dev);
@@ -974,7 +974,7 @@ nv50_display_irq_handler(struct drm_device *dev)
974 uint32_t intr1 = nv_rd32(dev, NV50_PDISPLAY_INTR_1); 974 uint32_t intr1 = nv_rd32(dev, NV50_PDISPLAY_INTR_1);
975 uint32_t clock; 975 uint32_t clock;
976 976
977 NV_DEBUG(dev, "PDISPLAY_INTR 0x%08x 0x%08x\n", intr0, intr1); 977 NV_DEBUG_KMS(dev, "PDISPLAY_INTR 0x%08x 0x%08x\n", intr0, intr1);
978 978
979 if (!intr0 && !(intr1 & ~delayed)) 979 if (!intr0 && !(intr1 & ~delayed))
980 break; 980 break;
diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c
index 8c280463a664..e395c16d30f5 100644
--- a/drivers/gpu/drm/nouveau/nv50_sor.c
+++ b/drivers/gpu/drm/nouveau/nv50_sor.c
@@ -44,7 +44,7 @@ nv50_sor_disconnect(struct nouveau_encoder *nv_encoder)
44 struct nouveau_channel *evo = dev_priv->evo; 44 struct nouveau_channel *evo = dev_priv->evo;
45 int ret; 45 int ret;
46 46
47 NV_DEBUG(dev, "Disconnecting SOR %d\n", nv_encoder->or); 47 NV_DEBUG_KMS(dev, "Disconnecting SOR %d\n", nv_encoder->or);
48 48
49 ret = RING_SPACE(evo, 2); 49 ret = RING_SPACE(evo, 2);
50 if (ret) { 50 if (ret) {
@@ -70,7 +70,7 @@ nv50_sor_dp_link_train(struct drm_encoder *encoder)
70 } 70 }
71 71
72 if (dpe->script0) { 72 if (dpe->script0) {
73 NV_DEBUG(dev, "SOR-%d: running DP script 0\n", nv_encoder->or); 73 NV_DEBUG_KMS(dev, "SOR-%d: running DP script 0\n", nv_encoder->or);
74 nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script0), 74 nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script0),
75 nv_encoder->dcb); 75 nv_encoder->dcb);
76 } 76 }
@@ -79,7 +79,7 @@ nv50_sor_dp_link_train(struct drm_encoder *encoder)
79 NV_ERROR(dev, "SOR-%d: link training failed\n", nv_encoder->or); 79 NV_ERROR(dev, "SOR-%d: link training failed\n", nv_encoder->or);
80 80
81 if (dpe->script1) { 81 if (dpe->script1) {
82 NV_DEBUG(dev, "SOR-%d: running DP script 1\n", nv_encoder->or); 82 NV_DEBUG_KMS(dev, "SOR-%d: running DP script 1\n", nv_encoder->or);
83 nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script1), 83 nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script1),
84 nv_encoder->dcb); 84 nv_encoder->dcb);
85 } 85 }
@@ -93,7 +93,7 @@ nv50_sor_dpms(struct drm_encoder *encoder, int mode)
93 uint32_t val; 93 uint32_t val;
94 int or = nv_encoder->or; 94 int or = nv_encoder->or;
95 95
96 NV_DEBUG(dev, "or %d mode %d\n", or, mode); 96 NV_DEBUG_KMS(dev, "or %d mode %d\n", or, mode);
97 97
98 /* wait for it to be done */ 98 /* wait for it to be done */
99 if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_CTRL(or), 99 if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_CTRL(or),
@@ -142,7 +142,7 @@ nv50_sor_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
142 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 142 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
143 struct nouveau_connector *connector; 143 struct nouveau_connector *connector;
144 144
145 NV_DEBUG(encoder->dev, "or %d\n", nv_encoder->or); 145 NV_DEBUG_KMS(encoder->dev, "or %d\n", nv_encoder->or);
146 146
147 connector = nouveau_encoder_connector_get(nv_encoder); 147 connector = nouveau_encoder_connector_get(nv_encoder);
148 if (!connector) { 148 if (!connector) {
@@ -182,7 +182,7 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
182 uint32_t mode_ctl = 0; 182 uint32_t mode_ctl = 0;
183 int ret; 183 int ret;
184 184
185 NV_DEBUG(dev, "or %d\n", nv_encoder->or); 185 NV_DEBUG_KMS(dev, "or %d\n", nv_encoder->or);
186 186
187 nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON); 187 nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
188 188
@@ -246,7 +246,7 @@ nv50_sor_destroy(struct drm_encoder *encoder)
246 if (!encoder) 246 if (!encoder)
247 return; 247 return;
248 248
249 NV_DEBUG(encoder->dev, "\n"); 249 NV_DEBUG_KMS(encoder->dev, "\n");
250 250
251 drm_encoder_cleanup(encoder); 251 drm_encoder_cleanup(encoder);
252 252
@@ -265,7 +265,7 @@ nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry)
265 bool dum; 265 bool dum;
266 int type; 266 int type;
267 267
268 NV_DEBUG(dev, "\n"); 268 NV_DEBUG_KMS(dev, "\n");
269 269
270 switch (entry->type) { 270 switch (entry->type) {
271 case OUTPUT_TMDS: 271 case OUTPUT_TMDS: