drm/i915: use 120MHz refclk in PCH eDP case too

CPU eDP needs a different reference clock than PCH eDP, which uses the
standard PCH refclk of 120MHz.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

1 files changed, 2 insertions, 1 deletions

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d7d59006a846..5f00632d6fcc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3625,7 +3625,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
                               refclk / 1000);
         } else if (!IS_GEN2(dev)) {
                 refclk = 96000;
-                if (HAS_PCH_SPLIT(dev))
+                if (HAS_PCH_SPLIT(dev) &&
+                    (!has_edp_encoder || intel_encoder_is_pch_edp(&has_edp_encoder->base)))
                         refclk = 120000; /* 120Mhz refclk */
         } else {
                 refclk = 48000;