diff options
author | Bob Copeland <me@bobcopeland.com> | 2009-04-15 07:57:32 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-04-22 16:57:14 -0400 |
commit | 77ded01cc25744245c58a369d24e251833e995bd (patch) | |
tree | fbf0398dd36df1a95a5487f4cddd68d87f4f74a7 /drivers | |
parent | 45f483c00299807a1635d6ee327957b796b60076 (diff) |
ath5k: fix initvals errors
This patch corrects a few errors in the initvals tables to match those
in the HAL tables. Namely, remove a couple of repetitions, fix some
turbo mode errors, and correct a register for the CCK rate power table.
Changes-licensed-under: ISC
Signed-off-by: Bob Copeland <me@bobcopeland.com>
Acked-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/wireless/ath/ath5k/initvals.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/net/wireless/ath/ath5k/initvals.c b/drivers/net/wireless/ath/ath5k/initvals.c index 61fb621ed20d..18eb5190ce4b 100644 --- a/drivers/net/wireless/ath/ath5k/initvals.c +++ b/drivers/net/wireless/ath/ath5k/initvals.c | |||
@@ -537,8 +537,6 @@ static const struct ath5k_ini ar5212_ini_common_start[] = { | |||
537 | { AR5K_DCU_TX_FILTER_1(15), 0x00000000 }, | 537 | { AR5K_DCU_TX_FILTER_1(15), 0x00000000 }, |
538 | { AR5K_DCU_TX_FILTER_CLR, 0x00000000 }, | 538 | { AR5K_DCU_TX_FILTER_CLR, 0x00000000 }, |
539 | { AR5K_DCU_TX_FILTER_SET, 0x00000000 }, | 539 | { AR5K_DCU_TX_FILTER_SET, 0x00000000 }, |
540 | { AR5K_DCU_TX_FILTER_CLR, 0x00000000 }, | ||
541 | { AR5K_DCU_TX_FILTER_SET, 0x00000000 }, | ||
542 | { AR5K_STA_ID1, 0x00000000 }, | 540 | { AR5K_STA_ID1, 0x00000000 }, |
543 | { AR5K_BSS_ID0, 0x00000000 }, | 541 | { AR5K_BSS_ID0, 0x00000000 }, |
544 | { AR5K_BSS_ID1, 0x00000000 }, | 542 | { AR5K_BSS_ID1, 0x00000000 }, |
@@ -669,7 +667,7 @@ static const struct ath5k_ini ar5212_ini_common_start[] = { | |||
669 | /*{ AR5K_PHY(650), 0x000001b5 },*/ | 667 | /*{ AR5K_PHY(650), 0x000001b5 },*/ |
670 | { AR5K_PHY(651), 0x00000000 }, | 668 | { AR5K_PHY(651), 0x00000000 }, |
671 | { AR5K_PHY_TXPOWER_RATE3, 0x20202020 }, | 669 | { AR5K_PHY_TXPOWER_RATE3, 0x20202020 }, |
672 | { AR5K_PHY_TXPOWER_RATE2, 0x20202020 }, | 670 | { AR5K_PHY_TXPOWER_RATE4, 0x20202020 }, |
673 | /*{ AR5K_PHY(655), 0x13c889af },*/ | 671 | /*{ AR5K_PHY(655), 0x13c889af },*/ |
674 | { AR5K_PHY(656), 0x38490a20 }, | 672 | { AR5K_PHY(656), 0x38490a20 }, |
675 | { AR5K_PHY(657), 0x00007bb6 }, | 673 | { AR5K_PHY(657), 0x00007bb6 }, |
@@ -718,7 +716,7 @@ static const struct ath5k_ini_mode ar5212_ini_mode_start[] = { | |||
718 | { AR5K_PHY_SETTLING, | 716 | { AR5K_PHY_SETTLING, |
719 | { 0x1372161c, 0x13721c25, 0x13721722, 0x137216a2, 0x13721c25 } }, | 717 | { 0x1372161c, 0x13721c25, 0x13721722, 0x137216a2, 0x13721c25 } }, |
720 | { AR5K_PHY_AGCCTL, | 718 | { AR5K_PHY_AGCCTL, |
721 | { 0x00009d10, 0x00009d10, 0x00009d18, 0x00009d18, 0x00009d18 } }, | 719 | { 0x00009d10, 0x00009d10, 0x00009d18, 0x00009d18, 0x00009d10 } }, |
722 | { AR5K_PHY_NF, | 720 | { AR5K_PHY_NF, |
723 | { 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 } }, | 721 | { 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 } }, |
724 | { AR5K_PHY_WEAK_OFDM_HIGH_THR, | 722 | { AR5K_PHY_WEAK_OFDM_HIGH_THR, |
@@ -799,7 +797,7 @@ static const struct ath5k_ini_mode rf5112_ini_mode_end[] = { | |||
799 | { AR5K_PHY_DESIRED_SIZE, | 797 | { AR5K_PHY_DESIRED_SIZE, |
800 | { 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0 } }, | 798 | { 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0 } }, |
801 | { AR5K_PHY_SIG, | 799 | { AR5K_PHY_SIG, |
802 | { 0x7e800d2e, 0x7e800d2e, 0x7ee80d2e, 0x7ee80d2e, 0x7ee80d2e } }, | 800 | { 0x7e800d2e, 0x7e800d2e, 0x7ee80d2e, 0x7ee80d2e, 0x7e800d2e } }, |
803 | { AR5K_PHY_AGCCOARSE, | 801 | { AR5K_PHY_AGCCOARSE, |
804 | { 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e } }, | 802 | { 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e } }, |
805 | { AR5K_PHY_WEAK_OFDM_LOW_THR, | 803 | { AR5K_PHY_WEAK_OFDM_LOW_THR, |