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authorChris Wilson <chris@chris-wilson.co.uk>2010-08-04 10:25:31 -0400
committerEric Anholt <eric@anholt.net>2010-08-09 14:24:29 -0400
commit403c89ff3960c540ac4d203035078f82082411cb (patch)
tree61b6531c28dad306aac4e25e591babeec8d577d9 /drivers
parent88f356b725c8a18c4da3ee0b6dcbc647418268f2 (diff)
drm/i915: Mark the static memory latency tables const.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9839494528ae..f3b014fe3508 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2882,7 +2882,7 @@ struct cxsr_latency {
2882 unsigned long cursor_hpll_disable; 2882 unsigned long cursor_hpll_disable;
2883}; 2883};
2884 2884
2885static struct cxsr_latency cxsr_latency_table[] = { 2885static const struct cxsr_latency cxsr_latency_table[] = {
2886 {1, 0, 800, 400, 3382, 33382, 3983, 33983}, /* DDR2-400 SC */ 2886 {1, 0, 800, 400, 3382, 33382, 3983, 33983}, /* DDR2-400 SC */
2887 {1, 0, 800, 667, 3354, 33354, 3807, 33807}, /* DDR2-667 SC */ 2887 {1, 0, 800, 667, 3354, 33354, 3807, 33807}, /* DDR2-667 SC */
2888 {1, 0, 800, 800, 3347, 33347, 3763, 33763}, /* DDR2-800 SC */ 2888 {1, 0, 800, 800, 3347, 33347, 3763, 33763}, /* DDR2-800 SC */
@@ -2920,11 +2920,13 @@ static struct cxsr_latency cxsr_latency_table[] = {
2920 {0, 1, 400, 800, 6042, 36042, 6584, 36584}, /* DDR3-800 SC */ 2920 {0, 1, 400, 800, 6042, 36042, 6584, 36584}, /* DDR3-800 SC */
2921}; 2921};
2922 2922
2923static struct cxsr_latency *intel_get_cxsr_latency(int is_desktop, int is_ddr3, 2923static const struct cxsr_latency *intel_get_cxsr_latency(int is_desktop,
2924 int fsb, int mem) 2924 int is_ddr3,
2925 int fsb,
2926 int mem)
2925{ 2927{
2928 const struct cxsr_latency *latency;
2926 int i; 2929 int i;
2927 struct cxsr_latency *latency;
2928 2930
2929 if (fsb == 0 || mem == 0) 2931 if (fsb == 0 || mem == 0)
2930 return NULL; 2932 return NULL;
@@ -3035,12 +3037,12 @@ static void pineview_update_wm(struct drm_device *dev, int planea_clock,
3035 int pixel_size) 3037 int pixel_size)
3036{ 3038{
3037 struct drm_i915_private *dev_priv = dev->dev_private; 3039 struct drm_i915_private *dev_priv = dev->dev_private;
3040 const struct cxsr_latency *latency;
3038 u32 reg; 3041 u32 reg;
3039 unsigned long wm; 3042 unsigned long wm;
3040 struct cxsr_latency *latency;
3041 int sr_clock; 3043 int sr_clock;
3042 3044
3043 latency = intel_get_cxsr_latency(IS_PINEVIEW_G(dev), dev_priv->is_ddr3, 3045 latency = intel_get_cxsr_latency(IS_PINEVIEW_G(dev), dev_priv->is_ddr3,
3044 dev_priv->fsb_freq, dev_priv->mem_freq); 3046 dev_priv->fsb_freq, dev_priv->mem_freq);
3045 if (!latency) { 3047 if (!latency) {
3046 DRM_DEBUG_KMS("Unknown FSB/MEM found, disable CxSR\n"); 3048 DRM_DEBUG_KMS("Unknown FSB/MEM found, disable CxSR\n");