diff options
author | Matt Carlson <mcarlson@broadcom.com> | 2009-02-25 09:26:58 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-02-27 02:16:38 -0500 |
commit | ff3a7cb25217bddcefd20e72af08a65481db4096 (patch) | |
tree | 8d8429ca67bb859acdb711fa6ee21b5fd1132410 /drivers | |
parent | acd9c119cc663860fff4f1445ed0f87d82378d99 (diff) |
tg3: Add legacy bootcode version decoding
This patch adds code to obtain the bootcode version for versions
of bootcode that do not use the new method.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/tg3.c | 39 | ||||
-rw-r--r-- | drivers/net/tg3.h | 4 |
2 files changed, 35 insertions, 8 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 2e8375587ee8..43859e4db2fe 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -11463,8 +11463,9 @@ static int __devinit tg3_fw_img_is_valid(struct tg3 *tp, u32 offset) | |||
11463 | 11463 | ||
11464 | static void __devinit tg3_read_bc_ver(struct tg3 *tp) | 11464 | static void __devinit tg3_read_bc_ver(struct tg3 *tp) |
11465 | { | 11465 | { |
11466 | u32 offset, start, ver_offset; | 11466 | u32 val, offset, start, ver_offset; |
11467 | int i; | 11467 | int i; |
11468 | bool newver = false; | ||
11468 | 11469 | ||
11469 | if (tg3_nvram_read(tp, 0xc, &offset) || | 11470 | if (tg3_nvram_read(tp, 0xc, &offset) || |
11470 | tg3_nvram_read(tp, 0x4, &start)) | 11471 | tg3_nvram_read(tp, 0x4, &start)) |
@@ -11472,17 +11473,39 @@ static void __devinit tg3_read_bc_ver(struct tg3 *tp) | |||
11472 | 11473 | ||
11473 | offset = tg3_nvram_logical_addr(tp, offset); | 11474 | offset = tg3_nvram_logical_addr(tp, offset); |
11474 | 11475 | ||
11475 | if (!tg3_fw_img_is_valid(tp, offset) || | 11476 | if (tg3_nvram_read(tp, offset, &val)) |
11476 | tg3_nvram_read(tp, offset + 8, &ver_offset)) | ||
11477 | return; | 11477 | return; |
11478 | 11478 | ||
11479 | offset = offset + ver_offset - start; | 11479 | if ((val & 0xfc000000) == 0x0c000000) { |
11480 | for (i = 0; i < 16; i += 4) { | 11480 | if (tg3_nvram_read(tp, offset + 4, &val)) |
11481 | __be32 v; | 11481 | return; |
11482 | if (tg3_nvram_read_be32(tp, offset + i, &v)) | 11482 | |
11483 | if (val == 0) | ||
11484 | newver = true; | ||
11485 | } | ||
11486 | |||
11487 | if (newver) { | ||
11488 | if (tg3_nvram_read(tp, offset + 8, &ver_offset)) | ||
11489 | return; | ||
11490 | |||
11491 | offset = offset + ver_offset - start; | ||
11492 | for (i = 0; i < 16; i += 4) { | ||
11493 | __be32 v; | ||
11494 | if (tg3_nvram_read_be32(tp, offset + i, &v)) | ||
11495 | return; | ||
11496 | |||
11497 | memcpy(tp->fw_ver + i, &v, sizeof(v)); | ||
11498 | } | ||
11499 | } else { | ||
11500 | u32 major, minor; | ||
11501 | |||
11502 | if (tg3_nvram_read(tp, TG3_NVM_PTREV_BCVER, &ver_offset)) | ||
11483 | return; | 11503 | return; |
11484 | 11504 | ||
11485 | memcpy(tp->fw_ver + i, &v, sizeof(v)); | 11505 | major = (ver_offset & TG3_NVM_BCVER_MAJMSK) >> |
11506 | TG3_NVM_BCVER_MAJSFT; | ||
11507 | minor = ver_offset & TG3_NVM_BCVER_MINMSK; | ||
11508 | snprintf(&tp->fw_ver[0], 32, "v%d.%02d", major, minor); | ||
11486 | } | 11509 | } |
11487 | } | 11510 | } |
11488 | 11511 | ||
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 508def3e077f..34dfaaaed3aa 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -1737,6 +1737,10 @@ | |||
1737 | #define TG3_NVM_DIRENT_SIZE 0xc | 1737 | #define TG3_NVM_DIRENT_SIZE 0xc |
1738 | #define TG3_NVM_DIRTYPE_SHIFT 24 | 1738 | #define TG3_NVM_DIRTYPE_SHIFT 24 |
1739 | #define TG3_NVM_DIRTYPE_ASFINI 1 | 1739 | #define TG3_NVM_DIRTYPE_ASFINI 1 |
1740 | #define TG3_NVM_PTREV_BCVER 0x94 | ||
1741 | #define TG3_NVM_BCVER_MAJMSK 0x0000ff00 | ||
1742 | #define TG3_NVM_BCVER_MAJSFT 8 | ||
1743 | #define TG3_NVM_BCVER_MINMSK 0x000000ff | ||
1740 | 1744 | ||
1741 | #define TG3_EEPROM_SB_F1R0_EDH_OFF 0x10 | 1745 | #define TG3_EEPROM_SB_F1R0_EDH_OFF 0x10 |
1742 | #define TG3_EEPROM_SB_F1R2_EDH_OFF 0x14 | 1746 | #define TG3_EEPROM_SB_F1R2_EDH_OFF 0x14 |