diff options
author | Don Skidmore <donald.c.skidmore@intel.com> | 2010-11-16 22:27:17 -0500 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2010-11-16 22:27:17 -0500 |
commit | b93a22260f6f4bcf6c92c54de8530a97d3e921f0 (patch) | |
tree | 33c1c6dbb1854ecc91d8d8a36d61b85f4ef22aa7 /drivers | |
parent | fe15e8e1c78521e0b4e375d6ed415b82265419c9 (diff) |
ixgbe: add support for x540 MAC
This patch adds support for the x540 MAC which is the next MAC in the
82598/82599 line.
Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/ixgbe/ixgbe.h | 4 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_dcb.c | 11 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_dcb_nl.c | 55 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_ethtool.c | 39 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_main.c | 59 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_mbx.c | 38 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_type.h | 1 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_x540.c | 20 |
8 files changed, 177 insertions, 50 deletions
diff --git a/drivers/net/ixgbe/ixgbe.h b/drivers/net/ixgbe/ixgbe.h index 4806736785a3..3ae30b8cb7d6 100644 --- a/drivers/net/ixgbe/ixgbe.h +++ b/drivers/net/ixgbe/ixgbe.h | |||
@@ -544,6 +544,10 @@ extern s32 ixgbe_atr_set_flex_byte_82599(struct ixgbe_atr_input *input, | |||
544 | u16 flex_byte); | 544 | u16 flex_byte); |
545 | extern s32 ixgbe_atr_set_l4type_82599(struct ixgbe_atr_input *input, | 545 | extern s32 ixgbe_atr_set_l4type_82599(struct ixgbe_atr_input *input, |
546 | u8 l4type); | 546 | u8 l4type); |
547 | extern void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, | ||
548 | struct ixgbe_ring *ring); | ||
549 | extern void ixgbe_clear_rscctl(struct ixgbe_adapter *adapter, | ||
550 | struct ixgbe_ring *ring); | ||
547 | extern void ixgbe_set_rx_mode(struct net_device *netdev); | 551 | extern void ixgbe_set_rx_mode(struct net_device *netdev); |
548 | #ifdef IXGBE_FCOE | 552 | #ifdef IXGBE_FCOE |
549 | extern void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter); | 553 | extern void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter); |
diff --git a/drivers/net/ixgbe/ixgbe_dcb.c b/drivers/net/ixgbe/ixgbe_dcb.c index 4f2f0ae67354..d16c260c1f50 100644 --- a/drivers/net/ixgbe/ixgbe_dcb.c +++ b/drivers/net/ixgbe/ixgbe_dcb.c | |||
@@ -152,10 +152,17 @@ s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, | |||
152 | struct ixgbe_dcb_config *dcb_config) | 152 | struct ixgbe_dcb_config *dcb_config) |
153 | { | 153 | { |
154 | s32 ret = 0; | 154 | s32 ret = 0; |
155 | if (hw->mac.type == ixgbe_mac_82598EB) | 155 | switch (hw->mac.type) { |
156 | case ixgbe_mac_82598EB: | ||
156 | ret = ixgbe_dcb_hw_config_82598(hw, dcb_config); | 157 | ret = ixgbe_dcb_hw_config_82598(hw, dcb_config); |
157 | else if (hw->mac.type == ixgbe_mac_82599EB) | 158 | break; |
159 | case ixgbe_mac_82599EB: | ||
160 | case ixgbe_mac_X540: | ||
158 | ret = ixgbe_dcb_hw_config_82599(hw, dcb_config); | 161 | ret = ixgbe_dcb_hw_config_82599(hw, dcb_config); |
162 | break; | ||
163 | default: | ||
164 | break; | ||
165 | } | ||
159 | return ret; | 166 | return ret; |
160 | } | 167 | } |
161 | 168 | ||
diff --git a/drivers/net/ixgbe/ixgbe_dcb_nl.c b/drivers/net/ixgbe/ixgbe_dcb_nl.c index b53b465e24af..bf566e8a455e 100644 --- a/drivers/net/ixgbe/ixgbe_dcb_nl.c +++ b/drivers/net/ixgbe/ixgbe_dcb_nl.c | |||
@@ -130,15 +130,21 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state) | |||
130 | netdev->netdev_ops->ndo_stop(netdev); | 130 | netdev->netdev_ops->ndo_stop(netdev); |
131 | ixgbe_clear_interrupt_scheme(adapter); | 131 | ixgbe_clear_interrupt_scheme(adapter); |
132 | 132 | ||
133 | if (adapter->hw.mac.type == ixgbe_mac_82598EB) { | 133 | adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED; |
134 | switch (adapter->hw.mac.type) { | ||
135 | case ixgbe_mac_82598EB: | ||
134 | adapter->last_lfc_mode = adapter->hw.fc.current_mode; | 136 | adapter->last_lfc_mode = adapter->hw.fc.current_mode; |
135 | adapter->hw.fc.requested_mode = ixgbe_fc_none; | 137 | adapter->hw.fc.requested_mode = ixgbe_fc_none; |
136 | } | 138 | break; |
137 | adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED; | 139 | case ixgbe_mac_82599EB: |
138 | if (adapter->hw.mac.type == ixgbe_mac_82599EB) { | 140 | case ixgbe_mac_X540: |
139 | adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE; | 141 | adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE; |
140 | adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE; | 142 | adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE; |
143 | break; | ||
144 | default: | ||
145 | break; | ||
141 | } | 146 | } |
147 | |||
142 | adapter->flags |= IXGBE_FLAG_DCB_ENABLED; | 148 | adapter->flags |= IXGBE_FLAG_DCB_ENABLED; |
143 | ixgbe_init_interrupt_scheme(adapter); | 149 | ixgbe_init_interrupt_scheme(adapter); |
144 | if (netif_running(netdev)) | 150 | if (netif_running(netdev)) |
@@ -155,8 +161,14 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state) | |||
155 | adapter->dcb_cfg.pfc_mode_enable = false; | 161 | adapter->dcb_cfg.pfc_mode_enable = false; |
156 | adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; | 162 | adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; |
157 | adapter->flags |= IXGBE_FLAG_RSS_ENABLED; | 163 | adapter->flags |= IXGBE_FLAG_RSS_ENABLED; |
158 | if (adapter->hw.mac.type == ixgbe_mac_82599EB) | 164 | switch (adapter->hw.mac.type) { |
165 | case ixgbe_mac_82599EB: | ||
166 | case ixgbe_mac_X540: | ||
159 | adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE; | 167 | adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE; |
168 | break; | ||
169 | default: | ||
170 | break; | ||
171 | } | ||
160 | 172 | ||
161 | ixgbe_init_interrupt_scheme(adapter); | 173 | ixgbe_init_interrupt_scheme(adapter); |
162 | if (netif_running(netdev)) | 174 | if (netif_running(netdev)) |
@@ -178,9 +190,14 @@ static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev, | |||
178 | for (i = 0; i < netdev->addr_len; i++) | 190 | for (i = 0; i < netdev->addr_len; i++) |
179 | perm_addr[i] = adapter->hw.mac.perm_addr[i]; | 191 | perm_addr[i] = adapter->hw.mac.perm_addr[i]; |
180 | 192 | ||
181 | if (adapter->hw.mac.type == ixgbe_mac_82599EB) { | 193 | switch (adapter->hw.mac.type) { |
194 | case ixgbe_mac_82599EB: | ||
195 | case ixgbe_mac_X540: | ||
182 | for (j = 0; j < netdev->addr_len; j++, i++) | 196 | for (j = 0; j < netdev->addr_len; j++, i++) |
183 | perm_addr[i] = adapter->hw.mac.san_addr[j]; | 197 | perm_addr[i] = adapter->hw.mac.san_addr[j]; |
198 | break; | ||
199 | default: | ||
200 | break; | ||
184 | } | 201 | } |
185 | } | 202 | } |
186 | 203 | ||
@@ -366,15 +383,29 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev) | |||
366 | } | 383 | } |
367 | 384 | ||
368 | if (adapter->dcb_cfg.pfc_mode_enable) { | 385 | if (adapter->dcb_cfg.pfc_mode_enable) { |
369 | if ((adapter->hw.mac.type != ixgbe_mac_82598EB) && | 386 | switch (adapter->hw.mac.type) { |
370 | (adapter->hw.fc.current_mode != ixgbe_fc_pfc)) | 387 | case ixgbe_mac_82599EB: |
371 | adapter->last_lfc_mode = adapter->hw.fc.current_mode; | 388 | case ixgbe_mac_X540: |
389 | if (adapter->hw.fc.current_mode != ixgbe_fc_pfc) | ||
390 | adapter->last_lfc_mode = | ||
391 | adapter->hw.fc.current_mode; | ||
392 | break; | ||
393 | default: | ||
394 | break; | ||
395 | } | ||
372 | adapter->hw.fc.requested_mode = ixgbe_fc_pfc; | 396 | adapter->hw.fc.requested_mode = ixgbe_fc_pfc; |
373 | } else { | 397 | } else { |
374 | if (adapter->hw.mac.type != ixgbe_mac_82598EB) | 398 | switch (adapter->hw.mac.type) { |
375 | adapter->hw.fc.requested_mode = adapter->last_lfc_mode; | 399 | case ixgbe_mac_82598EB: |
376 | else | ||
377 | adapter->hw.fc.requested_mode = ixgbe_fc_none; | 400 | adapter->hw.fc.requested_mode = ixgbe_fc_none; |
401 | break; | ||
402 | case ixgbe_mac_82599EB: | ||
403 | case ixgbe_mac_X540: | ||
404 | adapter->hw.fc.requested_mode = adapter->last_lfc_mode; | ||
405 | break; | ||
406 | default: | ||
407 | break; | ||
408 | } | ||
378 | } | 409 | } |
379 | 410 | ||
380 | if (adapter->dcb_set_bitmap & BIT_RESETLINK) { | 411 | if (adapter->dcb_set_bitmap & BIT_RESETLINK) { |
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c index b884f90b5805..f9b58394fbb6 100644 --- a/drivers/net/ixgbe/ixgbe_ethtool.c +++ b/drivers/net/ixgbe/ixgbe_ethtool.c | |||
@@ -431,15 +431,21 @@ static u32 ixgbe_get_tx_csum(struct net_device *netdev) | |||
431 | static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data) | 431 | static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data) |
432 | { | 432 | { |
433 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | 433 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
434 | u32 feature_list; | ||
434 | 435 | ||
435 | if (data) { | 436 | feature_list = (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); |
436 | netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; | 437 | switch (adapter->hw.mac.type) { |
437 | if (adapter->hw.mac.type == ixgbe_mac_82599EB) | 438 | case ixgbe_mac_82599EB: |
438 | netdev->features |= NETIF_F_SCTP_CSUM; | 439 | case ixgbe_mac_X540: |
439 | } else { | 440 | feature_list |= NETIF_F_SCTP_CSUM; |
440 | netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | | 441 | break; |
441 | NETIF_F_SCTP_CSUM); | 442 | default: |
443 | break; | ||
442 | } | 444 | } |
445 | if (data) | ||
446 | netdev->features |= feature_list; | ||
447 | else | ||
448 | netdev->features &= ~feature_list; | ||
443 | 449 | ||
444 | return 0; | 450 | return 0; |
445 | } | 451 | } |
@@ -1250,6 +1256,7 @@ static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data) | |||
1250 | test = reg_test_82598; | 1256 | test = reg_test_82598; |
1251 | break; | 1257 | break; |
1252 | case ixgbe_mac_82599EB: | 1258 | case ixgbe_mac_82599EB: |
1259 | case ixgbe_mac_X540: | ||
1253 | toggle = 0x7FFFF30F; | 1260 | toggle = 0x7FFFF30F; |
1254 | test = reg_test_82599; | 1261 | test = reg_test_82599; |
1255 | break; | 1262 | break; |
@@ -1476,6 +1483,7 @@ static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter) | |||
1476 | 1483 | ||
1477 | switch (hw->mac.type) { | 1484 | switch (hw->mac.type) { |
1478 | case ixgbe_mac_82599EB: | 1485 | case ixgbe_mac_82599EB: |
1486 | case ixgbe_mac_X540: | ||
1479 | reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); | 1487 | reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); |
1480 | reg_ctl &= ~IXGBE_DMATXCTL_TE; | 1488 | reg_ctl &= ~IXGBE_DMATXCTL_TE; |
1481 | IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl); | 1489 | IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl); |
@@ -1512,6 +1520,7 @@ static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter) | |||
1512 | 1520 | ||
1513 | switch (adapter->hw.mac.type) { | 1521 | switch (adapter->hw.mac.type) { |
1514 | case ixgbe_mac_82599EB: | 1522 | case ixgbe_mac_82599EB: |
1523 | case ixgbe_mac_X540: | ||
1515 | reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL); | 1524 | reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL); |
1516 | reg_data |= IXGBE_DMATXCTL_TE; | 1525 | reg_data |= IXGBE_DMATXCTL_TE; |
1517 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data); | 1526 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data); |
@@ -2198,6 +2207,22 @@ static int ixgbe_set_flags(struct net_device *netdev, u32 data) | |||
2198 | case ixgbe_mac_82599EB: | 2207 | case ixgbe_mac_82599EB: |
2199 | need_reset = true; | 2208 | need_reset = true; |
2200 | break; | 2209 | break; |
2210 | case ixgbe_mac_X540: { | ||
2211 | int i; | ||
2212 | for (i = 0; i < adapter->num_rx_queues; i++) { | ||
2213 | struct ixgbe_ring *ring = | ||
2214 | adapter->rx_ring[i]; | ||
2215 | if (adapter->flags2 & | ||
2216 | IXGBE_FLAG2_RSC_ENABLED) { | ||
2217 | ixgbe_configure_rscctl(adapter, | ||
2218 | ring); | ||
2219 | } else { | ||
2220 | ixgbe_clear_rscctl(adapter, | ||
2221 | ring); | ||
2222 | } | ||
2223 | } | ||
2224 | } | ||
2225 | break; | ||
2201 | default: | 2226 | default: |
2202 | break; | 2227 | break; |
2203 | } | 2228 | } |
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index 94c30b4f489e..b859a298cd2a 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -113,6 +113,8 @@ static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = { | |||
113 | board_82599 }, | 113 | board_82599 }, |
114 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), | 114 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), |
115 | board_82599 }, | 115 | board_82599 }, |
116 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), | ||
117 | board_82599 }, | ||
116 | 118 | ||
117 | /* required last entry */ | 119 | /* required last entry */ |
118 | {0, } | 120 | {0, } |
@@ -561,6 +563,7 @@ static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction, | |||
561 | IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar); | 563 | IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar); |
562 | break; | 564 | break; |
563 | case ixgbe_mac_82599EB: | 565 | case ixgbe_mac_82599EB: |
566 | case ixgbe_mac_X540: | ||
564 | if (direction == -1) { | 567 | if (direction == -1) { |
565 | /* other causes */ | 568 | /* other causes */ |
566 | msix_vector |= IXGBE_IVAR_ALLOC_VAL; | 569 | msix_vector |= IXGBE_IVAR_ALLOC_VAL; |
@@ -596,6 +599,7 @@ static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter, | |||
596 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); | 599 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); |
597 | break; | 600 | break; |
598 | case ixgbe_mac_82599EB: | 601 | case ixgbe_mac_82599EB: |
602 | case ixgbe_mac_X540: | ||
599 | mask = (qmask & 0xFFFFFFFF); | 603 | mask = (qmask & 0xFFFFFFFF); |
600 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask); | 604 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask); |
601 | mask = (qmask >> 32); | 605 | mask = (qmask >> 32); |
@@ -923,6 +927,7 @@ static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter, | |||
923 | rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu); | 927 | rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu); |
924 | break; | 928 | break; |
925 | case ixgbe_mac_82599EB: | 929 | case ixgbe_mac_82599EB: |
930 | case ixgbe_mac_X540: | ||
926 | rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599; | 931 | rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599; |
927 | rxctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << | 932 | rxctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << |
928 | IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599); | 933 | IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599); |
@@ -956,6 +961,7 @@ static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter, | |||
956 | IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(reg_idx), txctrl); | 961 | IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(reg_idx), txctrl); |
957 | break; | 962 | break; |
958 | case ixgbe_mac_82599EB: | 963 | case ixgbe_mac_82599EB: |
964 | case ixgbe_mac_X540: | ||
959 | txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(reg_idx)); | 965 | txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(reg_idx)); |
960 | txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599; | 966 | txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599; |
961 | txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << | 967 | txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << |
@@ -1581,6 +1587,7 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter) | |||
1581 | v_idx); | 1587 | v_idx); |
1582 | break; | 1588 | break; |
1583 | case ixgbe_mac_82599EB: | 1589 | case ixgbe_mac_82599EB: |
1590 | case ixgbe_mac_X540: | ||
1584 | ixgbe_set_ivar(adapter, -1, 1, v_idx); | 1591 | ixgbe_set_ivar(adapter, -1, 1, v_idx); |
1585 | break; | 1592 | break; |
1586 | 1593 | ||
@@ -1688,8 +1695,9 @@ void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector) | |||
1688 | itr_reg |= (itr_reg << 16); | 1695 | itr_reg |= (itr_reg << 16); |
1689 | break; | 1696 | break; |
1690 | case ixgbe_mac_82599EB: | 1697 | case ixgbe_mac_82599EB: |
1698 | case ixgbe_mac_X540: | ||
1691 | /* | 1699 | /* |
1692 | * 82599 can support a value of zero, so allow it for | 1700 | * 82599 and X540 can support a value of zero, so allow it for |
1693 | * max interrupt rate, but there is an errata where it can | 1701 | * max interrupt rate, but there is an errata where it can |
1694 | * not be zero with RSC | 1702 | * not be zero with RSC |
1695 | */ | 1703 | */ |
@@ -1885,6 +1893,7 @@ static irqreturn_t ixgbe_msix_lsc(int irq, void *data) | |||
1885 | 1893 | ||
1886 | switch (hw->mac.type) { | 1894 | switch (hw->mac.type) { |
1887 | case ixgbe_mac_82599EB: | 1895 | case ixgbe_mac_82599EB: |
1896 | case ixgbe_mac_X540: | ||
1888 | /* Handle Flow Director Full threshold interrupt */ | 1897 | /* Handle Flow Director Full threshold interrupt */ |
1889 | if (eicr & IXGBE_EICR_FLOW_DIR) { | 1898 | if (eicr & IXGBE_EICR_FLOW_DIR) { |
1890 | int i; | 1899 | int i; |
@@ -1930,6 +1939,7 @@ static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter, | |||
1930 | IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); | 1939 | IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask); |
1931 | break; | 1940 | break; |
1932 | case ixgbe_mac_82599EB: | 1941 | case ixgbe_mac_82599EB: |
1942 | case ixgbe_mac_X540: | ||
1933 | mask = (qmask & 0xFFFFFFFF); | 1943 | mask = (qmask & 0xFFFFFFFF); |
1934 | if (mask) | 1944 | if (mask) |
1935 | IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); | 1945 | IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask); |
@@ -1955,6 +1965,7 @@ static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter, | |||
1955 | IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); | 1965 | IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask); |
1956 | break; | 1966 | break; |
1957 | case ixgbe_mac_82599EB: | 1967 | case ixgbe_mac_82599EB: |
1968 | case ixgbe_mac_X540: | ||
1958 | mask = (qmask & 0xFFFFFFFF); | 1969 | mask = (qmask & 0xFFFFFFFF); |
1959 | if (mask) | 1970 | if (mask) |
1960 | IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); | 1971 | IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask); |
@@ -2427,6 +2438,7 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues, | |||
2427 | mask |= IXGBE_EIMS_GPI_SDP1; | 2438 | mask |= IXGBE_EIMS_GPI_SDP1; |
2428 | switch (adapter->hw.mac.type) { | 2439 | switch (adapter->hw.mac.type) { |
2429 | case ixgbe_mac_82599EB: | 2440 | case ixgbe_mac_82599EB: |
2441 | case ixgbe_mac_X540: | ||
2430 | mask |= IXGBE_EIMS_ECC; | 2442 | mask |= IXGBE_EIMS_ECC; |
2431 | mask |= IXGBE_EIMS_GPI_SDP1; | 2443 | mask |= IXGBE_EIMS_GPI_SDP1; |
2432 | mask |= IXGBE_EIMS_GPI_SDP2; | 2444 | mask |= IXGBE_EIMS_GPI_SDP2; |
@@ -2492,6 +2504,7 @@ static irqreturn_t ixgbe_intr(int irq, void *data) | |||
2492 | 2504 | ||
2493 | switch (hw->mac.type) { | 2505 | switch (hw->mac.type) { |
2494 | case ixgbe_mac_82599EB: | 2506 | case ixgbe_mac_82599EB: |
2507 | case ixgbe_mac_X540: | ||
2495 | ixgbe_check_sfp_event(adapter, eicr); | 2508 | ixgbe_check_sfp_event(adapter, eicr); |
2496 | if ((adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) && | 2509 | if ((adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) && |
2497 | ((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC))) { | 2510 | ((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC))) { |
@@ -2601,6 +2614,7 @@ static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter) | |||
2601 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0); | 2614 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0); |
2602 | break; | 2615 | break; |
2603 | case ixgbe_mac_82599EB: | 2616 | case ixgbe_mac_82599EB: |
2617 | case ixgbe_mac_X540: | ||
2604 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000); | 2618 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000); |
2605 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0); | 2619 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0); |
2606 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0); | 2620 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0); |
@@ -2795,6 +2809,7 @@ static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, | |||
2795 | } | 2809 | } |
2796 | break; | 2810 | break; |
2797 | case ixgbe_mac_82599EB: | 2811 | case ixgbe_mac_82599EB: |
2812 | case ixgbe_mac_X540: | ||
2798 | default: | 2813 | default: |
2799 | break; | 2814 | break; |
2800 | } | 2815 | } |
@@ -2892,11 +2907,28 @@ static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter) | |||
2892 | } | 2907 | } |
2893 | 2908 | ||
2894 | /** | 2909 | /** |
2910 | * ixgbe_clear_rscctl - disable RSC for the indicated ring | ||
2911 | * @adapter: address of board private structure | ||
2912 | * @ring: structure containing ring specific data | ||
2913 | **/ | ||
2914 | void ixgbe_clear_rscctl(struct ixgbe_adapter *adapter, | ||
2915 | struct ixgbe_ring *ring) | ||
2916 | { | ||
2917 | struct ixgbe_hw *hw = &adapter->hw; | ||
2918 | u32 rscctrl; | ||
2919 | u8 reg_idx = ring->reg_idx; | ||
2920 | |||
2921 | rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx)); | ||
2922 | rscctrl &= ~IXGBE_RSCCTL_RSCEN; | ||
2923 | IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl); | ||
2924 | } | ||
2925 | |||
2926 | /** | ||
2895 | * ixgbe_configure_rscctl - enable RSC for the indicated ring | 2927 | * ixgbe_configure_rscctl - enable RSC for the indicated ring |
2896 | * @adapter: address of board private structure | 2928 | * @adapter: address of board private structure |
2897 | * @index: index of ring to set | 2929 | * @index: index of ring to set |
2898 | **/ | 2930 | **/ |
2899 | static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, | 2931 | void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, |
2900 | struct ixgbe_ring *ring) | 2932 | struct ixgbe_ring *ring) |
2901 | { | 2933 | { |
2902 | struct ixgbe_hw *hw = &adapter->hw; | 2934 | struct ixgbe_hw *hw = &adapter->hw; |
@@ -3201,6 +3233,7 @@ static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter) | |||
3201 | rdrxctl |= IXGBE_RDRXCTL_MVMEN; | 3233 | rdrxctl |= IXGBE_RDRXCTL_MVMEN; |
3202 | break; | 3234 | break; |
3203 | case ixgbe_mac_82599EB: | 3235 | case ixgbe_mac_82599EB: |
3236 | case ixgbe_mac_X540: | ||
3204 | /* Disable RSC for ACK packets */ | 3237 | /* Disable RSC for ACK packets */ |
3205 | IXGBE_WRITE_REG(hw, IXGBE_RSCDBU, | 3238 | IXGBE_WRITE_REG(hw, IXGBE_RSCDBU, |
3206 | (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU))); | 3239 | (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU))); |
@@ -3328,6 +3361,7 @@ static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter) | |||
3328 | IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); | 3361 | IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); |
3329 | break; | 3362 | break; |
3330 | case ixgbe_mac_82599EB: | 3363 | case ixgbe_mac_82599EB: |
3364 | case ixgbe_mac_X540: | ||
3331 | for (i = 0; i < adapter->num_rx_queues; i++) { | 3365 | for (i = 0; i < adapter->num_rx_queues; i++) { |
3332 | j = adapter->rx_ring[i]->reg_idx; | 3366 | j = adapter->rx_ring[i]->reg_idx; |
3333 | vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j)); | 3367 | vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j)); |
@@ -3357,6 +3391,7 @@ static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter) | |||
3357 | IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); | 3391 | IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl); |
3358 | break; | 3392 | break; |
3359 | case ixgbe_mac_82599EB: | 3393 | case ixgbe_mac_82599EB: |
3394 | case ixgbe_mac_X540: | ||
3360 | for (i = 0; i < adapter->num_rx_queues; i++) { | 3395 | for (i = 0; i < adapter->num_rx_queues; i++) { |
3361 | j = adapter->rx_ring[i]->reg_idx; | 3396 | j = adapter->rx_ring[i]->reg_idx; |
3362 | vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j)); | 3397 | vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j)); |
@@ -3712,8 +3747,9 @@ static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter) | |||
3712 | case ixgbe_mac_82598EB: | 3747 | case ixgbe_mac_82598EB: |
3713 | IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); | 3748 | IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE); |
3714 | break; | 3749 | break; |
3715 | default: | ||
3716 | case ixgbe_mac_82599EB: | 3750 | case ixgbe_mac_82599EB: |
3751 | case ixgbe_mac_X540: | ||
3752 | default: | ||
3717 | IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); | 3753 | IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF); |
3718 | IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); | 3754 | IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF); |
3719 | break; | 3755 | break; |
@@ -4061,6 +4097,7 @@ void ixgbe_down(struct ixgbe_adapter *adapter) | |||
4061 | /* Disable the Tx DMA engine on 82599 */ | 4097 | /* Disable the Tx DMA engine on 82599 */ |
4062 | switch (hw->mac.type) { | 4098 | switch (hw->mac.type) { |
4063 | case ixgbe_mac_82599EB: | 4099 | case ixgbe_mac_82599EB: |
4100 | case ixgbe_mac_X540: | ||
4064 | IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, | 4101 | IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, |
4065 | (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) & | 4102 | (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) & |
4066 | ~IXGBE_DMATXCTL_TE)); | 4103 | ~IXGBE_DMATXCTL_TE)); |
@@ -4435,6 +4472,7 @@ static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter) | |||
4435 | ret = true; | 4472 | ret = true; |
4436 | break; | 4473 | break; |
4437 | case ixgbe_mac_82599EB: | 4474 | case ixgbe_mac_82599EB: |
4475 | case ixgbe_mac_X540: | ||
4438 | if (dcb_i == 8) { | 4476 | if (dcb_i == 8) { |
4439 | /* | 4477 | /* |
4440 | * Tx TC0 starts at: descriptor queue 0 | 4478 | * Tx TC0 starts at: descriptor queue 0 |
@@ -5049,6 +5087,7 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter) | |||
5049 | adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598; | 5087 | adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598; |
5050 | break; | 5088 | break; |
5051 | case ixgbe_mac_82599EB: | 5089 | case ixgbe_mac_82599EB: |
5090 | case ixgbe_mac_X540: | ||
5052 | adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599; | 5091 | adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599; |
5053 | adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE; | 5092 | adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE; |
5054 | adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; | 5093 | adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; |
@@ -5567,6 +5606,7 @@ static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake) | |||
5567 | pci_wake_from_d3(pdev, false); | 5606 | pci_wake_from_d3(pdev, false); |
5568 | break; | 5607 | break; |
5569 | case ixgbe_mac_82599EB: | 5608 | case ixgbe_mac_82599EB: |
5609 | case ixgbe_mac_X540: | ||
5570 | pci_wake_from_d3(pdev, !!wufc); | 5610 | pci_wake_from_d3(pdev, !!wufc); |
5571 | break; | 5611 | break; |
5572 | default: | 5612 | default: |
@@ -5696,6 +5736,7 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter) | |||
5696 | IXGBE_READ_REG(hw, IXGBE_PXONRXC(i)); | 5736 | IXGBE_READ_REG(hw, IXGBE_PXONRXC(i)); |
5697 | break; | 5737 | break; |
5698 | case ixgbe_mac_82599EB: | 5738 | case ixgbe_mac_82599EB: |
5739 | case ixgbe_mac_X540: | ||
5699 | hwstats->pxonrxc[i] += | 5740 | hwstats->pxonrxc[i] += |
5700 | IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i)); | 5741 | IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i)); |
5701 | break; | 5742 | break; |
@@ -5720,6 +5761,7 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter) | |||
5720 | hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH); | 5761 | hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH); |
5721 | break; | 5762 | break; |
5722 | case ixgbe_mac_82599EB: | 5763 | case ixgbe_mac_82599EB: |
5764 | case ixgbe_mac_X540: | ||
5723 | hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL); | 5765 | hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL); |
5724 | IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */ | 5766 | IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */ |
5725 | hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL); | 5767 | hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL); |
@@ -5983,7 +6025,8 @@ static void ixgbe_watchdog_task(struct work_struct *work) | |||
5983 | flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X); | 6025 | flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X); |
5984 | } | 6026 | } |
5985 | break; | 6027 | break; |
5986 | case ixgbe_mac_82599EB: { | 6028 | case ixgbe_mac_82599EB: |
6029 | case ixgbe_mac_X540: { | ||
5987 | u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN); | 6030 | u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN); |
5988 | u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG); | 6031 | u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG); |
5989 | flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE); | 6032 | flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE); |
@@ -7057,8 +7100,14 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, | |||
7057 | goto err_sw_init; | 7100 | goto err_sw_init; |
7058 | 7101 | ||
7059 | /* Make it possible the adapter to be woken up via WOL */ | 7102 | /* Make it possible the adapter to be woken up via WOL */ |
7060 | if (adapter->hw.mac.type == ixgbe_mac_82599EB) | 7103 | switch (adapter->hw.mac.type) { |
7104 | case ixgbe_mac_82599EB: | ||
7105 | case ixgbe_mac_X540: | ||
7061 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0); | 7106 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0); |
7107 | break; | ||
7108 | default: | ||
7109 | break; | ||
7110 | } | ||
7062 | 7111 | ||
7063 | /* | 7112 | /* |
7064 | * If there is a fan on this device and it has failed log the | 7113 | * If there is a fan on this device and it has failed log the |
diff --git a/drivers/net/ixgbe/ixgbe_mbx.c b/drivers/net/ixgbe/ixgbe_mbx.c index aede6eb0e67d..027c628c3aae 100644 --- a/drivers/net/ixgbe/ixgbe_mbx.c +++ b/drivers/net/ixgbe/ixgbe_mbx.c | |||
@@ -319,8 +319,14 @@ static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number) | |||
319 | u32 vflre = 0; | 319 | u32 vflre = 0; |
320 | s32 ret_val = IXGBE_ERR_MBX; | 320 | s32 ret_val = IXGBE_ERR_MBX; |
321 | 321 | ||
322 | if (hw->mac.type == ixgbe_mac_82599EB) | 322 | switch (hw->mac.type) { |
323 | case ixgbe_mac_82599EB: | ||
324 | case ixgbe_mac_X540: | ||
323 | vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset)); | 325 | vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset)); |
326 | break; | ||
327 | default: | ||
328 | break; | ||
329 | } | ||
324 | 330 | ||
325 | if (vflre & (1 << vf_shift)) { | 331 | if (vflre & (1 << vf_shift)) { |
326 | ret_val = 0; | 332 | ret_val = 0; |
@@ -439,19 +445,23 @@ void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw) | |||
439 | { | 445 | { |
440 | struct ixgbe_mbx_info *mbx = &hw->mbx; | 446 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
441 | 447 | ||
442 | if (hw->mac.type != ixgbe_mac_82599EB) | 448 | switch (hw->mac.type) { |
443 | return; | 449 | case ixgbe_mac_82599EB: |
444 | 450 | case ixgbe_mac_X540: | |
445 | mbx->timeout = 0; | 451 | mbx->timeout = 0; |
446 | mbx->usec_delay = 0; | 452 | mbx->usec_delay = 0; |
447 | 453 | ||
448 | mbx->size = IXGBE_VFMAILBOX_SIZE; | 454 | mbx->size = IXGBE_VFMAILBOX_SIZE; |
449 | 455 | ||
450 | mbx->stats.msgs_tx = 0; | 456 | mbx->stats.msgs_tx = 0; |
451 | mbx->stats.msgs_rx = 0; | 457 | mbx->stats.msgs_rx = 0; |
452 | mbx->stats.reqs = 0; | 458 | mbx->stats.reqs = 0; |
453 | mbx->stats.acks = 0; | 459 | mbx->stats.acks = 0; |
454 | mbx->stats.rsts = 0; | 460 | mbx->stats.rsts = 0; |
461 | break; | ||
462 | default: | ||
463 | break; | ||
464 | } | ||
455 | } | 465 | } |
456 | 466 | ||
457 | struct ixgbe_mbx_operations mbx_ops_generic = { | 467 | struct ixgbe_mbx_operations mbx_ops_generic = { |
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h index cbcb15277b47..42c607339a62 100644 --- a/drivers/net/ixgbe/ixgbe_type.h +++ b/drivers/net/ixgbe/ixgbe_type.h | |||
@@ -58,6 +58,7 @@ | |||
58 | #define IXGBE_DEV_ID_82599_XAUI_LOM 0x10FC | 58 | #define IXGBE_DEV_ID_82599_XAUI_LOM 0x10FC |
59 | #define IXGBE_DEV_ID_82599_COMBO_BACKPLANE 0x10F8 | 59 | #define IXGBE_DEV_ID_82599_COMBO_BACKPLANE 0x10F8 |
60 | #define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ 0x000C | 60 | #define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ 0x000C |
61 | #define IXGBE_DEV_ID_X540T 0x1528 | ||
61 | 62 | ||
62 | /* General Registers */ | 63 | /* General Registers */ |
63 | #define IXGBE_CTRL 0x00000 | 64 | #define IXGBE_CTRL 0x00000 |
diff --git a/drivers/net/ixgbe/ixgbe_x540.c b/drivers/net/ixgbe/ixgbe_x540.c index 7de5f7ea7104..9649fa727e31 100644 --- a/drivers/net/ixgbe/ixgbe_x540.c +++ b/drivers/net/ixgbe/ixgbe_x540.c | |||
@@ -46,7 +46,7 @@ static void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u16 mask); | |||
46 | static s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw); | 46 | static s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw); |
47 | static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw); | 47 | static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw); |
48 | 48 | ||
49 | enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw) | 49 | static enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw) |
50 | { | 50 | { |
51 | return ixgbe_media_type_copper; | 51 | return ixgbe_media_type_copper; |
52 | } | 52 | } |
@@ -75,9 +75,9 @@ static s32 ixgbe_get_invariants_X540(struct ixgbe_hw *hw) | |||
75 | * @autoneg: true if autonegotiation enabled | 75 | * @autoneg: true if autonegotiation enabled |
76 | * @autoneg_wait_to_complete: true when waiting for completion is needed | 76 | * @autoneg_wait_to_complete: true when waiting for completion is needed |
77 | **/ | 77 | **/ |
78 | s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, | 78 | static s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, |
79 | ixgbe_link_speed speed, bool autoneg, | 79 | ixgbe_link_speed speed, bool autoneg, |
80 | bool autoneg_wait_to_complete) | 80 | bool autoneg_wait_to_complete) |
81 | { | 81 | { |
82 | return hw->phy.ops.setup_link_speed(hw, speed, autoneg, | 82 | return hw->phy.ops.setup_link_speed(hw, speed, autoneg, |
83 | autoneg_wait_to_complete); | 83 | autoneg_wait_to_complete); |
@@ -91,7 +91,7 @@ s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, | |||
91 | * and clears all interrupts, perform a PHY reset, and perform a link (MAC) | 91 | * and clears all interrupts, perform a PHY reset, and perform a link (MAC) |
92 | * reset. | 92 | * reset. |
93 | **/ | 93 | **/ |
94 | s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw) | 94 | static s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw) |
95 | { | 95 | { |
96 | ixgbe_link_speed link_speed; | 96 | ixgbe_link_speed link_speed; |
97 | s32 status = 0; | 97 | s32 status = 0; |
@@ -222,7 +222,7 @@ s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw) | |||
222 | * | 222 | * |
223 | * Determines physical layer capabilities of the current configuration. | 223 | * Determines physical layer capabilities of the current configuration. |
224 | **/ | 224 | **/ |
225 | u32 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw) | 225 | static u32 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw) |
226 | { | 226 | { |
227 | u32 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; | 227 | u32 physical_layer = IXGBE_PHYSICAL_LAYER_UNKNOWN; |
228 | u16 ext_ability = 0; | 228 | u16 ext_ability = 0; |
@@ -245,7 +245,7 @@ u32 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw) | |||
245 | * ixgbe_init_eeprom_params_X540 - Initialize EEPROM params | 245 | * ixgbe_init_eeprom_params_X540 - Initialize EEPROM params |
246 | * @hw: pointer to hardware structure | 246 | * @hw: pointer to hardware structure |
247 | **/ | 247 | **/ |
248 | s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw) | 248 | static s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw) |
249 | { | 249 | { |
250 | struct ixgbe_eeprom_info *eeprom = &hw->eeprom; | 250 | struct ixgbe_eeprom_info *eeprom = &hw->eeprom; |
251 | u32 eec; | 251 | u32 eec; |
@@ -274,7 +274,7 @@ s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw) | |||
274 | * @offset: offset of word in the EEPROM to read | 274 | * @offset: offset of word in the EEPROM to read |
275 | * @data: word read from the EERPOM | 275 | * @data: word read from the EERPOM |
276 | **/ | 276 | **/ |
277 | s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data) | 277 | static s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data) |
278 | { | 278 | { |
279 | s32 status; | 279 | s32 status; |
280 | 280 | ||
@@ -295,7 +295,7 @@ s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data) | |||
295 | * | 295 | * |
296 | * Write a 16 bit word to the EEPROM using the EEWR register. | 296 | * Write a 16 bit word to the EEPROM using the EEWR register. |
297 | **/ | 297 | **/ |
298 | s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data) | 298 | static s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data) |
299 | { | 299 | { |
300 | u32 eewr; | 300 | u32 eewr; |
301 | s32 status; | 301 | s32 status; |
@@ -406,7 +406,7 @@ static u16 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw) | |||
406 | * checksum and updates the EEPROM and instructs the hardware to update | 406 | * checksum and updates the EEPROM and instructs the hardware to update |
407 | * the flash. | 407 | * the flash. |
408 | **/ | 408 | **/ |
409 | s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw) | 409 | static s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw) |
410 | { | 410 | { |
411 | s32 status; | 411 | s32 status; |
412 | 412 | ||