diff options
author | Andres Salomon <dilinger@collabora.co.uk> | 2010-02-05 01:42:43 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-02-05 10:36:50 -0500 |
commit | 73d2eaac8a3f1ec1d6d0a80ea7302a439ca9b933 (patch) | |
tree | 1656adeecc51ba47cc4c081d0d7c56d7ec75ced2 /drivers | |
parent | 2938429501b73f6aeb312236eac7ed0416a07cd5 (diff) |
CS5536: apply pci quirk for BIOS SMBUS bug
The new cs5535-* drivers use PCI header config info rather than MSRs to
determine the memory region to use for things like GPIOs and MFGPTs. As
anticipated, we've run into a buggy BIOS:
[ 0.081818] pci 0000:00:14.0: reg 10: [io 0x6000-0x7fff]
[ 0.081906] pci 0000:00:14.0: reg 14: [io 0x6100-0x61ff]
[ 0.082015] pci 0000:00:14.0: reg 18: [io 0x6200-0x63ff]
[ 0.082917] pci 0000:00:14.2: reg 20: [io 0xe000-0xe00f]
[ 0.083551] pci 0000:00:15.0: reg 10: [mem 0xa0010000-0xa0010fff]
[ 0.084436] pci 0000:00:15.1: reg 10: [mem 0xa0011000-0xa0011fff]
[ 0.088816] PCI: pci_cache_line_size set to 32 bytes
[ 0.088938] pci 0000:00:14.0: address space collision: [io 0x6100-0x61ff] already in use
[ 0.089052] pci 0000:00:14.0: can't reserve [io 0x6100-0x61ff]
This is a Soekris board, and its BIOS sets the size of the PCI ISA bridge
device's BAR0 to 8k. In reality, it should be 8 bytes (BAR0 is used for
SMBus stuff). This quirk checks for an incorrect size, and resets it
accordingly.
Signed-off-by: Andres Salomon <dilinger@collabora.co.uk>
Tested-by: Leigh Porter <leigh@leighporter.org>
Tested-by: Jens Rottmann <JRottmann@LiPPERTEmbedded.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/pci/quirks.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index c74694345b6e..d58b94030ef3 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c | |||
@@ -338,6 +338,23 @@ static void __devinit quirk_s3_64M(struct pci_dev *dev) | |||
338 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_868, quirk_s3_64M); | 338 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_868, quirk_s3_64M); |
339 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_968, quirk_s3_64M); | 339 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_968, quirk_s3_64M); |
340 | 340 | ||
341 | /* | ||
342 | * Some CS5536 BIOSes (for example, the Soekris NET5501 board w/ comBIOS | ||
343 | * ver. 1.33 20070103) don't set the correct ISA PCI region header info. | ||
344 | * BAR0 should be 8 bytes; instead, it may be set to something like 8k | ||
345 | * (which conflicts w/ BAR1's memory range). | ||
346 | */ | ||
347 | static void __devinit quirk_cs5536_vsa(struct pci_dev *dev) | ||
348 | { | ||
349 | if (pci_resource_len(dev, 0) != 8) { | ||
350 | struct resource *res = &dev->resource[0]; | ||
351 | res->end = res->start + 8 - 1; | ||
352 | dev_info(&dev->dev, "CS5536 ISA bridge bug detected " | ||
353 | "(incorrect header); workaround applied.\n"); | ||
354 | } | ||
355 | } | ||
356 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, quirk_cs5536_vsa); | ||
357 | |||
341 | static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region, | 358 | static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region, |
342 | unsigned size, int nr, const char *name) | 359 | unsigned size, int nr, const char *name) |
343 | { | 360 | { |