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authorMichel Dänzer <daenzer@vmware.com>2009-07-28 06:30:57 -0400
committerDave Airlie <airlied@redhat.com>2009-07-29 01:45:41 -0400
commit664f86590295217b2319edf88830e87b800f6c4a (patch)
tree79fb58cdefac3f128e3ca45fa5d01ca763ab2c02 /drivers
parent1ab2e1059916b917af19e4137a4222988bd7a169 (diff)
drm/radeon: Pay more attention to object placement requested by userspace.
Previously we were basically always setting the GTT and VRAM flags regardless of what userspace requested. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/radeon/radeon_object.c25
1 files changed, 11 insertions, 14 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index 3961a44c5dce..81573c3a9b43 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -103,16 +103,16 @@ static inline uint32_t radeon_object_flags_from_domain(uint32_t domain)
103{ 103{
104 uint32_t flags = 0; 104 uint32_t flags = 0;
105 if (domain & RADEON_GEM_DOMAIN_VRAM) { 105 if (domain & RADEON_GEM_DOMAIN_VRAM) {
106 flags |= TTM_PL_FLAG_VRAM; 106 flags |= TTM_PL_FLAG_VRAM | TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED;
107 } 107 }
108 if (domain & RADEON_GEM_DOMAIN_GTT) { 108 if (domain & RADEON_GEM_DOMAIN_GTT) {
109 flags |= TTM_PL_FLAG_TT; 109 flags |= TTM_PL_FLAG_TT | TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED;
110 } 110 }
111 if (domain & RADEON_GEM_DOMAIN_CPU) { 111 if (domain & RADEON_GEM_DOMAIN_CPU) {
112 flags |= TTM_PL_FLAG_SYSTEM; 112 flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
113 } 113 }
114 if (!flags) { 114 if (!flags) {
115 flags |= TTM_PL_FLAG_SYSTEM; 115 flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
116 } 116 }
117 return flags; 117 return flags;
118} 118}
@@ -408,7 +408,6 @@ int radeon_object_list_validate(struct list_head *head, void *fence)
408 struct radeon_object *robj; 408 struct radeon_object *robj;
409 struct radeon_fence *old_fence = NULL; 409 struct radeon_fence *old_fence = NULL;
410 struct list_head *i; 410 struct list_head *i;
411 uint32_t flags;
412 int r; 411 int r;
413 412
414 r = radeon_object_list_reserve(head); 413 r = radeon_object_list_reserve(head);
@@ -419,16 +418,14 @@ int radeon_object_list_validate(struct list_head *head, void *fence)
419 list_for_each(i, head) { 418 list_for_each(i, head) {
420 lobj = list_entry(i, struct radeon_object_list, list); 419 lobj = list_entry(i, struct radeon_object_list, list);
421 robj = lobj->robj; 420 robj = lobj->robj;
422 if (lobj->wdomain) {
423 flags = radeon_object_flags_from_domain(lobj->wdomain);
424 flags |= TTM_PL_FLAG_TT;
425 } else {
426 flags = radeon_object_flags_from_domain(lobj->rdomain);
427 flags |= TTM_PL_FLAG_TT;
428 flags |= TTM_PL_FLAG_VRAM;
429 }
430 if (!robj->pin_count) { 421 if (!robj->pin_count) {
431 robj->tobj.proposed_placement = flags | TTM_PL_MASK_CACHING; 422 if (lobj->wdomain) {
423 robj->tobj.proposed_placement =
424 radeon_object_flags_from_domain(lobj->wdomain);
425 } else {
426 robj->tobj.proposed_placement =
427 radeon_object_flags_from_domain(lobj->rdomain);
428 }
432 r = ttm_buffer_object_validate(&robj->tobj, 429 r = ttm_buffer_object_validate(&robj->tobj,
433 robj->tobj.proposed_placement, 430 robj->tobj.proposed_placement,
434 true, false); 431 true, false);