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authorMathieu Olivari <mathieu@codeaurora.org>2015-02-20 21:19:34 -0500
committerWim Van Sebroeck <wim@iguana.be>2015-04-22 09:27:47 -0400
commit0dfd582e026af8a37917164aaba7227fa812e5c2 (patch)
tree470ac7aff224beb72424204f63e6e1fc603a982a /drivers/watchdog
parente1dbde29609a4f829589f0e48361470327ae3f62 (diff)
watchdog: qcom: use timer devicetree binding
MSM watchdog configuration happens in the same register block as the timer, so we'll use the same binding as the existing timer. The qcom-wdt will now be probed when devicetree has an entry compatible with "qcom,kpss-timer" or "qcom-scss-timer". Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat (limited to 'drivers/watchdog')
-rw-r--r--drivers/watchdog/qcom-wdt.c21
1 files changed, 15 insertions, 6 deletions
diff --git a/drivers/watchdog/qcom-wdt.c b/drivers/watchdog/qcom-wdt.c
index aa85618c4d03..aa03ca8f2d9b 100644
--- a/drivers/watchdog/qcom-wdt.c
+++ b/drivers/watchdog/qcom-wdt.c
@@ -20,9 +20,9 @@
20#include <linux/reboot.h> 20#include <linux/reboot.h>
21#include <linux/watchdog.h> 21#include <linux/watchdog.h>
22 22
23#define WDT_RST 0x0 23#define WDT_RST 0x38
24#define WDT_EN 0x8 24#define WDT_EN 0x40
25#define WDT_BITE_TIME 0x24 25#define WDT_BITE_TIME 0x5C
26 26
27struct qcom_wdt { 27struct qcom_wdt {
28 struct watchdog_device wdd; 28 struct watchdog_device wdd;
@@ -117,6 +117,8 @@ static int qcom_wdt_probe(struct platform_device *pdev)
117{ 117{
118 struct qcom_wdt *wdt; 118 struct qcom_wdt *wdt;
119 struct resource *res; 119 struct resource *res;
120 struct device_node *np = pdev->dev.of_node;
121 u32 percpu_offset;
120 int ret; 122 int ret;
121 123
122 wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL); 124 wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
@@ -124,6 +126,14 @@ static int qcom_wdt_probe(struct platform_device *pdev)
124 return -ENOMEM; 126 return -ENOMEM;
125 127
126 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 128 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
129
130 /* We use CPU0's DGT for the watchdog */
131 if (of_property_read_u32(np, "cpu-offset", &percpu_offset))
132 percpu_offset = 0;
133
134 res->start += percpu_offset;
135 res->end += percpu_offset;
136
127 wdt->base = devm_ioremap_resource(&pdev->dev, res); 137 wdt->base = devm_ioremap_resource(&pdev->dev, res);
128 if (IS_ERR(wdt->base)) 138 if (IS_ERR(wdt->base))
129 return PTR_ERR(wdt->base); 139 return PTR_ERR(wdt->base);
@@ -203,9 +213,8 @@ static int qcom_wdt_remove(struct platform_device *pdev)
203} 213}
204 214
205static const struct of_device_id qcom_wdt_of_table[] = { 215static const struct of_device_id qcom_wdt_of_table[] = {
206 { .compatible = "qcom,kpss-wdt-msm8960", }, 216 { .compatible = "qcom,kpss-timer" },
207 { .compatible = "qcom,kpss-wdt-apq8064", }, 217 { .compatible = "qcom,scss-timer" },
208 { .compatible = "qcom,kpss-wdt-ipq8064", },
209 { }, 218 { },
210}; 219};
211MODULE_DEVICE_TABLE(of, qcom_wdt_of_table); 220MODULE_DEVICE_TABLE(of, qcom_wdt_of_table);