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authorMichel Arboi <michel@arboi.fr.eu.org>2010-12-06 14:53:45 -0500
committerWim Van Sebroeck <wim@iguana.be>2011-01-12 05:23:04 -0500
commitdf278dac2070e677cf22c30e1c78c5a753191375 (patch)
tree76eaa1c5800f82fd23130a86ee5753391e5580d6 /drivers/watchdog
parent7977ff6e3deb042b29370e52607df20d1ee33b9d (diff)
watchdog: f71808e_wdt: Add Fintek F71869 watchdog
Add Fintek f71869 as a supported watchdog device. Signed-off-by: Michel Arboi <michel@arboi.fr.eu.org> Acked-by: Giel van Schijndel <me@mortis.eu> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat (limited to 'drivers/watchdog')
-rw-r--r--drivers/watchdog/f71808e_wdt.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c
index f573948998b0..d4d8d1fdccc4 100644
--- a/drivers/watchdog/f71808e_wdt.c
+++ b/drivers/watchdog/f71808e_wdt.c
@@ -53,6 +53,7 @@
53#define SIO_F71808_ID 0x0901 /* Chipset ID */ 53#define SIO_F71808_ID 0x0901 /* Chipset ID */
54#define SIO_F71858_ID 0x0507 /* Chipset ID */ 54#define SIO_F71858_ID 0x0507 /* Chipset ID */
55#define SIO_F71862_ID 0x0601 /* Chipset ID */ 55#define SIO_F71862_ID 0x0601 /* Chipset ID */
56#define SIO_F71869_ID 0x0814 /* Chipset ID */
56#define SIO_F71882_ID 0x0541 /* Chipset ID */ 57#define SIO_F71882_ID 0x0541 /* Chipset ID */
57#define SIO_F71889_ID 0x0723 /* Chipset ID */ 58#define SIO_F71889_ID 0x0723 /* Chipset ID */
58 59
@@ -108,12 +109,13 @@ module_param(start_withtimeout, uint, 0);
108MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with" 109MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
109 " given initial timeout. Zero (default) disables this feature."); 110 " given initial timeout. Zero (default) disables this feature.");
110 111
111enum chips { f71808fg, f71858fg, f71862fg, f71882fg, f71889fg }; 112enum chips { f71808fg, f71858fg, f71862fg, f71869, f71882fg, f71889fg };
112 113
113static const char *f71808e_names[] = { 114static const char *f71808e_names[] = {
114 "f71808fg", 115 "f71808fg",
115 "f71858fg", 116 "f71858fg",
116 "f71862fg", 117 "f71862fg",
118 "f71869",
117 "f71882fg", 119 "f71882fg",
118 "f71889fg", 120 "f71889fg",
119}; 121};
@@ -341,6 +343,11 @@ static int watchdog_start(void)
341 goto exit_superio; 343 goto exit_superio;
342 break; 344 break;
343 345
346 case f71869:
347 /* GPIO14 --> WDTRST# */
348 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
349 break;
350
344 case f71882fg: 351 case f71882fg:
345 /* Set pin 56 to WDTRST# */ 352 /* Set pin 56 to WDTRST# */
346 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1); 353 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
@@ -753,6 +760,9 @@ static int __init f71808e_find(int sioaddr)
753 watchdog.type = f71862fg; 760 watchdog.type = f71862fg;
754 err = f71862fg_pin_configure(0); /* validate module parameter */ 761 err = f71862fg_pin_configure(0); /* validate module parameter */
755 break; 762 break;
763 case SIO_F71869_ID:
764 watchdog.type = f71869;
765 break;
756 case SIO_F71882_ID: 766 case SIO_F71882_ID:
757 watchdog.type = f71882fg; 767 watchdog.type = f71882fg;
758 break; 768 break;