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authorWan ZongShun <mcuos.com@gmail.com>2009-08-17 06:00:01 -0400
committerWim Van Sebroeck <wim@iguana.be>2009-09-18 04:35:07 -0400
commit0400e3134b03336617138f9ebf2cd0f117ceef20 (patch)
tree5d1f577958534fd162d34fb0dbf7212b741aee6a /drivers/watchdog
parent3a5f90002e9d08e5a6406fc650bfd838bf23bc1b (diff)
[WATCHDOG] Add watchdog driver for NUC900
Add watchdog device driver for the Nuvoton NUC900 series SoCs. Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat (limited to 'drivers/watchdog')
-rw-r--r--drivers/watchdog/Kconfig9
-rw-r--r--drivers/watchdog/Makefile1
-rw-r--r--drivers/watchdog/nuc900_wdt.c353
3 files changed, 363 insertions, 0 deletions
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 1940a08d18de..3229889c3591 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -266,6 +266,15 @@ config STMP3XXX_WATCHDOG
266 To compile this driver as a module, choose M here: the 266 To compile this driver as a module, choose M here: the
267 module will be called stmp3xxx_wdt. 267 module will be called stmp3xxx_wdt.
268 268
269config NUC900_WATCHDOG
270 tristate "Nuvoton NUC900 watchdog"
271 depends on ARCH_W90X900
272 help
273 Say Y here if to include support for the watchdog timer
274 for the Nuvoton NUC900 series SoCs.
275 To compile this driver as a module, choose M here: the
276 module will be called nuc900_wdt.
277
269# AVR32 Architecture 278# AVR32 Architecture
270 279
271config AT32AP700X_WDT 280config AT32AP700X_WDT
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 6c58e7ccee2c..e1784a6208a7 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_DAVINCI_WATCHDOG) += davinci_wdt.o
44obj-$(CONFIG_ORION_WATCHDOG) += orion_wdt.o 44obj-$(CONFIG_ORION_WATCHDOG) += orion_wdt.o
45obj-$(CONFIG_COH901327_WATCHDOG) += coh901327_wdt.o 45obj-$(CONFIG_COH901327_WATCHDOG) += coh901327_wdt.o
46obj-$(CONFIG_STMP3XXX_WATCHDOG) += stmp3xxx_wdt.o 46obj-$(CONFIG_STMP3XXX_WATCHDOG) += stmp3xxx_wdt.o
47obj-$(CONFIG_NUC900_WATCHDOG) += nuc900_wdt.o
47 48
48# AVR32 Architecture 49# AVR32 Architecture
49obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o 50obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
diff --git a/drivers/watchdog/nuc900_wdt.c b/drivers/watchdog/nuc900_wdt.c
new file mode 100644
index 000000000000..adefe3a9d510
--- /dev/null
+++ b/drivers/watchdog/nuc900_wdt.c
@@ -0,0 +1,353 @@
1/*
2 * Copyright (c) 2009 Nuvoton technology corporation.
3 *
4 * Wan ZongShun <mcuos.com@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation;version 2 of the License.
9 *
10 */
11
12#include <linux/bitops.h>
13#include <linux/errno.h>
14#include <linux/fs.h>
15#include <linux/init.h>
16#include <linux/io.h>
17#include <linux/clk.h>
18#include <linux/kernel.h>
19#include <linux/miscdevice.h>
20#include <linux/module.h>
21#include <linux/moduleparam.h>
22#include <linux/platform_device.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/watchdog.h>
26#include <linux/uaccess.h>
27
28#define REG_WTCR 0x1c
29#define WTCLK (0x01 << 10)
30#define WTE (0x01 << 7) /*wdt enable*/
31#define WTIS (0x03 << 4)
32#define WTIF (0x01 << 3)
33#define WTRF (0x01 << 2)
34#define WTRE (0x01 << 1)
35#define WTR (0x01 << 0)
36/*
37 * The watchdog time interval can be calculated via following formula:
38 * WTIS real time interval (formula)
39 * 0x00 ((2^ 14 ) * ((external crystal freq) / 256))seconds
40 * 0x01 ((2^ 16 ) * ((external crystal freq) / 256))seconds
41 * 0x02 ((2^ 18 ) * ((external crystal freq) / 256))seconds
42 * 0x03 ((2^ 20 ) * ((external crystal freq) / 256))seconds
43 *
44 * The external crystal freq is 15Mhz in the nuc900 evaluation board.
45 * So 0x00 = +-0.28 seconds, 0x01 = +-1.12 seconds, 0x02 = +-4.48 seconds,
46 * 0x03 = +- 16.92 seconds..
47 */
48#define WDT_HW_TIMEOUT 0x02
49#define WDT_TIMEOUT (HZ/2)
50#define WDT_HEARTBEAT 15
51
52static int heartbeat = WDT_HEARTBEAT;
53module_param(heartbeat, int, 0);
54MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
55 "(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
56
57static int nowayout = WATCHDOG_NOWAYOUT;
58module_param(nowayout, int, 0);
59MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
60 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
61
62struct nuc900_wdt {
63 struct resource *res;
64 struct clk *wdt_clock;
65 struct platform_device *pdev;
66 void __iomem *wdt_base;
67 char expect_close;
68 struct timer_list timer;
69 spinlock_t wdt_lock;
70 unsigned long next_heartbeat;
71};
72
73static unsigned long nuc900wdt_busy;
74struct nuc900_wdt *nuc900_wdt;
75
76static inline void nuc900_wdt_keepalive(void)
77{
78 unsigned int val;
79
80 spin_lock(&nuc900_wdt->wdt_lock);
81
82 val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
83 val |= (WTR | WTIF);
84 __raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);
85
86 spin_unlock(&nuc900_wdt->wdt_lock);
87}
88
89static inline void nuc900_wdt_start(void)
90{
91 unsigned int val;
92
93 spin_lock(&nuc900_wdt->wdt_lock);
94
95 val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
96 val |= (WTRE | WTE | WTR | WTCLK | WTIF);
97 val &= ~WTIS;
98 val |= (WDT_HW_TIMEOUT << 0x04);
99 __raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);
100
101 spin_unlock(&nuc900_wdt->wdt_lock);
102
103 nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ;
104 mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT);
105}
106
107static inline void nuc900_wdt_stop(void)
108{
109 unsigned int val;
110
111 del_timer(&nuc900_wdt->timer);
112
113 spin_lock(&nuc900_wdt->wdt_lock);
114
115 val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
116 val &= ~WTE;
117 __raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);
118
119 spin_unlock(&nuc900_wdt->wdt_lock);
120}
121
122static inline void nuc900_wdt_ping(void)
123{
124 nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ;
125}
126
127static int nuc900_wdt_open(struct inode *inode, struct file *file)
128{
129
130 if (test_and_set_bit(0, &nuc900wdt_busy))
131 return -EBUSY;
132
133 nuc900_wdt_start();
134
135 return nonseekable_open(inode, file);
136}
137
138static int nuc900_wdt_close(struct inode *inode, struct file *file)
139{
140 if (nuc900_wdt->expect_close == 42)
141 nuc900_wdt_stop();
142 else {
143 dev_crit(&nuc900_wdt->pdev->dev,
144 "Unexpected close, not stopping watchdog!\n");
145 nuc900_wdt_ping();
146 }
147
148 nuc900_wdt->expect_close = 0;
149 clear_bit(0, &nuc900wdt_busy);
150 return 0;
151}
152
153static const struct watchdog_info nuc900_wdt_info = {
154 .identity = "nuc900 watchdog",
155 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
156 WDIOF_MAGICCLOSE,
157};
158
159static long nuc900_wdt_ioctl(struct file *file,
160 unsigned int cmd, unsigned long arg)
161{
162 void __user *argp = (void __user *)arg;
163 int __user *p = argp;
164 int new_value;
165
166 switch (cmd) {
167 case WDIOC_GETSUPPORT:
168 return copy_to_user(argp, &nuc900_wdt_info,
169 sizeof(nuc900_wdt_info)) ? -EFAULT : 0;
170 case WDIOC_GETSTATUS:
171 case WDIOC_GETBOOTSTATUS:
172 return put_user(0, p);
173
174 case WDIOC_KEEPALIVE:
175 nuc900_wdt_ping();
176 return 0;
177
178 case WDIOC_SETTIMEOUT:
179 if (get_user(new_value, p))
180 return -EFAULT;
181
182 heartbeat = new_value;
183 nuc900_wdt_ping();
184
185 return put_user(new_value, p);
186 case WDIOC_GETTIMEOUT:
187 return put_user(heartbeat, p);
188 default:
189 return -ENOTTY;
190 }
191}
192
193static ssize_t nuc900_wdt_write(struct file *file, const char __user *data,
194 size_t len, loff_t *ppos)
195{
196 if (!len)
197 return 0;
198
199 /* Scan for magic character */
200 if (!nowayout) {
201 size_t i;
202
203 nuc900_wdt->expect_close = 0;
204
205 for (i = 0; i < len; i++) {
206 char c;
207 if (get_user(c, data + i))
208 return -EFAULT;
209 if (c == 'V') {
210 nuc900_wdt->expect_close = 42;
211 break;
212 }
213 }
214 }
215
216 nuc900_wdt_ping();
217 return len;
218}
219
220static void nuc900_wdt_timer_ping(unsigned long data)
221{
222 if (time_before(jiffies, nuc900_wdt->next_heartbeat)) {
223 nuc900_wdt_keepalive();
224 mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT);
225 } else
226 dev_warn(&nuc900_wdt->pdev->dev, "Will reset the machine !\n");
227}
228
229static const struct file_operations nuc900wdt_fops = {
230 .owner = THIS_MODULE,
231 .llseek = no_llseek,
232 .unlocked_ioctl = nuc900_wdt_ioctl,
233 .open = nuc900_wdt_open,
234 .release = nuc900_wdt_close,
235 .write = nuc900_wdt_write,
236};
237
238static struct miscdevice nuc900wdt_miscdev = {
239 .minor = WATCHDOG_MINOR,
240 .name = "watchdog",
241 .fops = &nuc900wdt_fops,
242};
243
244static int __devinit nuc900wdt_probe(struct platform_device *pdev)
245{
246 int ret = 0;
247
248 nuc900_wdt = kzalloc(sizeof(struct nuc900_wdt), GFP_KERNEL);
249 if (!nuc900_wdt)
250 return -ENOMEM;
251
252 nuc900_wdt->pdev = pdev;
253
254 spin_lock_init(&nuc900_wdt->wdt_lock);
255
256 nuc900_wdt->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
257 if (nuc900_wdt->res == NULL) {
258 dev_err(&pdev->dev, "no memory resource specified\n");
259 ret = -ENOENT;
260 goto err_get;
261 }
262
263 if (!request_mem_region(nuc900_wdt->res->start,
264 resource_size(nuc900_wdt->res), pdev->name)) {
265 dev_err(&pdev->dev, "failed to get memory region\n");
266 ret = -ENOENT;
267 goto err_get;
268 }
269
270 nuc900_wdt->wdt_base = ioremap(nuc900_wdt->res->start,
271 resource_size(nuc900_wdt->res));
272 if (nuc900_wdt->wdt_base == NULL) {
273 dev_err(&pdev->dev, "failed to ioremap() region\n");
274 ret = -EINVAL;
275 goto err_req;
276 }
277
278 nuc900_wdt->wdt_clock = clk_get(&pdev->dev, NULL);
279 if (IS_ERR(nuc900_wdt->wdt_clock)) {
280 dev_err(&pdev->dev, "failed to find watchdog clock source\n");
281 ret = PTR_ERR(nuc900_wdt->wdt_clock);
282 goto err_map;
283 }
284
285 clk_enable(nuc900_wdt->wdt_clock);
286
287 setup_timer(&nuc900_wdt->timer, nuc900_wdt_timer_ping, 0);
288
289 if (misc_register(&nuc900wdt_miscdev)) {
290 dev_err(&pdev->dev, "err register miscdev on minor=%d (%d)\n",
291 WATCHDOG_MINOR, ret);
292 goto err_clk;
293 }
294
295 return 0;
296
297err_clk:
298 clk_disable(nuc900_wdt->wdt_clock);
299 clk_put(nuc900_wdt->wdt_clock);
300err_map:
301 iounmap(nuc900_wdt->wdt_base);
302err_req:
303 release_mem_region(nuc900_wdt->res->start,
304 resource_size(nuc900_wdt->res));
305err_get:
306 kfree(nuc900_wdt);
307 return ret;
308}
309
310static int __devexit nuc900wdt_remove(struct platform_device *pdev)
311{
312 misc_deregister(&nuc900wdt_miscdev);
313
314 clk_disable(nuc900_wdt->wdt_clock);
315 clk_put(nuc900_wdt->wdt_clock);
316
317 iounmap(nuc900_wdt->wdt_base);
318
319 release_mem_region(nuc900_wdt->res->start,
320 resource_size(nuc900_wdt->res));
321
322 kfree(nuc900_wdt);
323
324 return 0;
325}
326
327static struct platform_driver nuc900wdt_driver = {
328 .probe = nuc900wdt_probe,
329 .remove = __devexit_p(nuc900wdt_remove),
330 .driver = {
331 .name = "nuc900-wdt",
332 .owner = THIS_MODULE,
333 },
334};
335
336static int __init nuc900_wdt_init(void)
337{
338 return platform_driver_register(&nuc900wdt_driver);
339}
340
341static void __exit nuc900_wdt_exit(void)
342{
343 platform_driver_unregister(&nuc900wdt_driver);
344}
345
346module_init(nuc900_wdt_init);
347module_exit(nuc900_wdt_exit);
348
349MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
350MODULE_DESCRIPTION("Watchdog driver for NUC900");
351MODULE_LICENSE("GPL");
352MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
353MODULE_ALIAS("platform:nuc900-wdt");