diff options
author | Lutz Ballaschke <vegan.grindcore@googlemail.com> | 2010-09-26 10:38:20 -0400 |
---|---|---|
committer | Wim Van Sebroeck <wim@iguana.be> | 2011-01-12 05:21:27 -0500 |
commit | f9a9f096d25bbc54dc3147613ee1d86b35cce691 (patch) | |
tree | 573c54cb14738534168be1ece101255b4389f0ab /drivers/watchdog/f71808e_wdt.c | |
parent | 4162cf64973df51fc885825bc9ca4d055891c49f (diff) |
watchdog: clean-up f71808e_wdt.c
Cleaned up and replaced some magic numbers by constants.
Signed-off-by: Lutz Ballaschke <vegan.grindcore@googlemail.com>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat (limited to 'drivers/watchdog/f71808e_wdt.c')
-rw-r--r-- | drivers/watchdog/f71808e_wdt.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c index 65e579635dba..3c9142474d18 100644 --- a/drivers/watchdog/f71808e_wdt.c +++ b/drivers/watchdog/f71808e_wdt.c | |||
@@ -42,18 +42,19 @@ | |||
42 | #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ | 42 | #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ |
43 | #define SIO_REG_DEVREV 0x22 /* Device revision */ | 43 | #define SIO_REG_DEVREV 0x22 /* Device revision */ |
44 | #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ | 44 | #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */ |
45 | #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */ | ||
46 | #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */ | ||
47 | #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */ | ||
45 | #define SIO_REG_ENABLE 0x30 /* Logical device enable */ | 48 | #define SIO_REG_ENABLE 0x30 /* Logical device enable */ |
46 | #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ | 49 | #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ |
47 | 50 | ||
48 | #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */ | 51 | #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */ |
49 | #define SIO_F71808_ID 0x0901 /* Chipset ID */ | 52 | #define SIO_F71808_ID 0x0901 /* Chipset ID */ |
50 | #define SIO_F71858_ID 0x0507 /* Chipset ID */ | 53 | #define SIO_F71858_ID 0x0507 /* Chipset ID */ |
51 | #define SIO_F71862_ID 0x0601 /* Chipset ID */ | 54 | #define SIO_F71862_ID 0x0601 /* Chipset ID */ |
52 | #define SIO_F71882_ID 0x0541 /* Chipset ID */ | 55 | #define SIO_F71882_ID 0x0541 /* Chipset ID */ |
53 | #define SIO_F71889_ID 0x0723 /* Chipset ID */ | 56 | #define SIO_F71889_ID 0x0723 /* Chipset ID */ |
54 | 57 | ||
55 | #define F71882FG_REG_START 0x01 | ||
56 | |||
57 | #define F71808FG_REG_WDO_CONF 0xf0 | 58 | #define F71808FG_REG_WDO_CONF 0xf0 |
58 | #define F71808FG_REG_WDT_CONF 0xf5 | 59 | #define F71808FG_REG_WDT_CONF 0xf5 |
59 | #define F71808FG_REG_WD_TIME 0xf6 | 60 | #define F71808FG_REG_WD_TIME 0xf6 |
@@ -76,7 +77,7 @@ module_param(force_id, ushort, 0); | |||
76 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); | 77 | MODULE_PARM_DESC(force_id, "Override the detected device ID"); |
77 | 78 | ||
78 | static const int max_timeout = WATCHDOG_MAX_TIMEOUT; | 79 | static const int max_timeout = WATCHDOG_MAX_TIMEOUT; |
79 | static int timeout = 60; /* default timeout in seconds */ | 80 | static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */ |
80 | module_param(timeout, int, 0); | 81 | module_param(timeout, int, 0); |
81 | MODULE_PARM_DESC(timeout, | 82 | MODULE_PARM_DESC(timeout, |
82 | "Watchdog timeout in seconds. 1<= timeout <=" | 83 | "Watchdog timeout in seconds. 1<= timeout <=" |
@@ -299,19 +300,19 @@ static int watchdog_start(void) | |||
299 | switch (watchdog.type) { | 300 | switch (watchdog.type) { |
300 | case f71808fg: | 301 | case f71808fg: |
301 | /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */ | 302 | /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */ |
302 | superio_clear_bit(watchdog.sioaddr, 0x2a, 3); | 303 | superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3); |
303 | superio_clear_bit(watchdog.sioaddr, 0x2b, 3); | 304 | superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3); |
304 | break; | 305 | break; |
305 | 306 | ||
306 | case f71882fg: | 307 | case f71882fg: |
307 | /* Set pin 56 to WDTRST# */ | 308 | /* Set pin 56 to WDTRST# */ |
308 | superio_set_bit(watchdog.sioaddr, 0x29, 1); | 309 | superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1); |
309 | break; | 310 | break; |
310 | 311 | ||
311 | case f71889fg: | 312 | case f71889fg: |
312 | /* set pin 40 to WDTRST# */ | 313 | /* set pin 40 to WDTRST# */ |
313 | superio_outb(watchdog.sioaddr, 0x2b, | 314 | superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3, |
314 | superio_inb(watchdog.sioaddr, 0x2b) & 0xcf); | 315 | superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf); |
315 | break; | 316 | break; |
316 | 317 | ||
317 | default: | 318 | default: |