diff options
author | Markus Franke <markus.franke@s2002.tu-chemnitz.de> | 2012-04-11 18:42:03 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-04-11 19:44:10 -0400 |
commit | 8f1e12512e9f1276b68c8b14a60961658c73336f (patch) | |
tree | 370742441c08ea56dae64e9d7cfa9b53bad3d75a /drivers/w1/w1_io.c | |
parent | f19420c1acb0b573c88a12deb2d42035e22d4a17 (diff) |
w1: Disable irqs during 1-wire bus operations, extend 1-wire reset pulse
This patch offers the possibility to disables irqs during w1_write_bit()
and w1_reset_bus() operations as timing requirements are very strict for
the 1-wire bus protocol. Per default interrupts are enabled but can be
disabled via the module parameter "w1_disable_irqs".
Extend 1-wire reset pulse length from 480us to 500us as 480us is the
minimum requirement for the 1-wire reset/presence pulse.
Signed-off-by: Markus Franke <franm@hrz.tu-chemnitz.de>
Acked-by: Evgeniy Polyakov <zbr@ioremap.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/w1/w1_io.c')
-rw-r--r-- | drivers/w1/w1_io.c | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/drivers/w1/w1_io.c b/drivers/w1/w1_io.c index 3135b2c63998..e10acc237733 100644 --- a/drivers/w1/w1_io.c +++ b/drivers/w1/w1_io.c | |||
@@ -31,6 +31,9 @@ | |||
31 | static int w1_delay_parm = 1; | 31 | static int w1_delay_parm = 1; |
32 | module_param_named(delay_coef, w1_delay_parm, int, 0); | 32 | module_param_named(delay_coef, w1_delay_parm, int, 0); |
33 | 33 | ||
34 | static int w1_disable_irqs = 0; | ||
35 | module_param_named(disable_irqs, w1_disable_irqs, int, 0); | ||
36 | |||
34 | static u8 w1_crc8_table[] = { | 37 | static u8 w1_crc8_table[] = { |
35 | 0, 94, 188, 226, 97, 63, 221, 131, 194, 156, 126, 32, 163, 253, 31, 65, | 38 | 0, 94, 188, 226, 97, 63, 221, 131, 194, 156, 126, 32, 163, 253, 31, 65, |
36 | 157, 195, 33, 127, 252, 162, 64, 30, 95, 1, 227, 189, 62, 96, 130, 220, | 39 | 157, 195, 33, 127, 252, 162, 64, 30, 95, 1, 227, 189, 62, 96, 130, 220, |
@@ -79,6 +82,10 @@ static u8 w1_touch_bit(struct w1_master *dev, int bit) | |||
79 | */ | 82 | */ |
80 | static void w1_write_bit(struct w1_master *dev, int bit) | 83 | static void w1_write_bit(struct w1_master *dev, int bit) |
81 | { | 84 | { |
85 | unsigned long flags = 0; | ||
86 | |||
87 | if(w1_disable_irqs) local_irq_save(flags); | ||
88 | |||
82 | if (bit) { | 89 | if (bit) { |
83 | dev->bus_master->write_bit(dev->bus_master->data, 0); | 90 | dev->bus_master->write_bit(dev->bus_master->data, 0); |
84 | w1_delay(6); | 91 | w1_delay(6); |
@@ -90,6 +97,8 @@ static void w1_write_bit(struct w1_master *dev, int bit) | |||
90 | dev->bus_master->write_bit(dev->bus_master->data, 1); | 97 | dev->bus_master->write_bit(dev->bus_master->data, 1); |
91 | w1_delay(10); | 98 | w1_delay(10); |
92 | } | 99 | } |
100 | |||
101 | if(w1_disable_irqs) local_irq_restore(flags); | ||
93 | } | 102 | } |
94 | 103 | ||
95 | /** | 104 | /** |
@@ -158,7 +167,7 @@ EXPORT_SYMBOL_GPL(w1_write_8); | |||
158 | static u8 w1_read_bit(struct w1_master *dev) | 167 | static u8 w1_read_bit(struct w1_master *dev) |
159 | { | 168 | { |
160 | int result; | 169 | int result; |
161 | unsigned long flags; | 170 | unsigned long flags = 0; |
162 | 171 | ||
163 | /* sample timing is critical here */ | 172 | /* sample timing is critical here */ |
164 | local_irq_save(flags); | 173 | local_irq_save(flags); |
@@ -318,6 +327,9 @@ EXPORT_SYMBOL_GPL(w1_read_block); | |||
318 | int w1_reset_bus(struct w1_master *dev) | 327 | int w1_reset_bus(struct w1_master *dev) |
319 | { | 328 | { |
320 | int result; | 329 | int result; |
330 | unsigned long flags = 0; | ||
331 | |||
332 | if(w1_disable_irqs) local_irq_save(flags); | ||
321 | 333 | ||
322 | if (dev->bus_master->reset_bus) | 334 | if (dev->bus_master->reset_bus) |
323 | result = dev->bus_master->reset_bus(dev->bus_master->data) & 0x1; | 335 | result = dev->bus_master->reset_bus(dev->bus_master->data) & 0x1; |
@@ -330,19 +342,21 @@ int w1_reset_bus(struct w1_master *dev) | |||
330 | * cpu for such a short amount of time AND get it back in | 342 | * cpu for such a short amount of time AND get it back in |
331 | * the maximum amount of time. | 343 | * the maximum amount of time. |
332 | */ | 344 | */ |
333 | w1_delay(480); | 345 | w1_delay(500); |
334 | dev->bus_master->write_bit(dev->bus_master->data, 1); | 346 | dev->bus_master->write_bit(dev->bus_master->data, 1); |
335 | w1_delay(70); | 347 | w1_delay(70); |
336 | 348 | ||
337 | result = dev->bus_master->read_bit(dev->bus_master->data) & 0x1; | 349 | result = dev->bus_master->read_bit(dev->bus_master->data) & 0x1; |
338 | /* minmum 70 (above) + 410 = 480 us | 350 | /* minmum 70 (above) + 430 = 500 us |
339 | * There aren't any timing requirements between a reset and | 351 | * There aren't any timing requirements between a reset and |
340 | * the following transactions. Sleeping is safe here. | 352 | * the following transactions. Sleeping is safe here. |
341 | */ | 353 | */ |
342 | /* w1_delay(410); min required time */ | 354 | /* w1_delay(430); min required time */ |
343 | msleep(1); | 355 | msleep(1); |
344 | } | 356 | } |
345 | 357 | ||
358 | if(w1_disable_irqs) local_irq_restore(flags); | ||
359 | |||
346 | return result; | 360 | return result; |
347 | } | 361 | } |
348 | EXPORT_SYMBOL_GPL(w1_reset_bus); | 362 | EXPORT_SYMBOL_GPL(w1_reset_bus); |