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authorAlexander Shiyan <shc_work@mail.ru>2014-02-22 02:29:50 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-02-28 18:27:09 -0500
commit18fd9e359f2515286ae7c7ac8fd4362675c8eb43 (patch)
treef1a77a18a0fbae7feea1a9ffbc9c9f5d547cdbb0 /drivers/w1/masters/mxc_w1.c
parentaea476b50503ece7c95a15484427aedfff87af04 (diff)
w1: mxc_w1: Driver cleanup
- Remove old and currently wrong address of the FSF from license parts of the code. - Remove unused #include and sort remaining headers alphabetically. - Remove unised definitions. - Add definitions for bit-fields. - Add missing module owner field. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/w1/masters/mxc_w1.c')
-rw-r--r--drivers/w1/masters/mxc_w1.c39
1 files changed, 16 insertions, 23 deletions
diff --git a/drivers/w1/masters/mxc_w1.c b/drivers/w1/masters/mxc_w1.c
index 6525b2c67da9..8e3de6aa88e8 100644
--- a/drivers/w1/masters/mxc_w1.c
+++ b/drivers/w1/masters/mxc_w1.c
@@ -10,24 +10,16 @@
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details. 12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 *
18 */ 13 */
19 14
20#include <linux/module.h>
21#include <linux/interrupt.h>
22#include <linux/platform_device.h>
23#include <linux/clk.h> 15#include <linux/clk.h>
24#include <linux/slab.h>
25#include <linux/delay.h> 16#include <linux/delay.h>
26#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/platform_device.h>
27 20
28#include "../w1.h" 21#include "../w1.h"
29#include "../w1_int.h" 22#include "../w1_int.h"
30#include "../w1_log.h"
31 23
32/* According to the mx27 Datasheet the reset procedure should take up to about 24/* According to the mx27 Datasheet the reset procedure should take up to about
33 * 1350us. We set the timeout to 500*100us = 50ms for sure */ 25 * 1350us. We set the timeout to 500*100us = 50ms for sure */
@@ -36,13 +28,13 @@
36/* 28/*
37 * MXC W1 Register offsets 29 * MXC W1 Register offsets
38 */ 30 */
39#define MXC_W1_CONTROL 0x00 31#define MXC_W1_CONTROL 0x00
40#define MXC_W1_TIME_DIVIDER 0x02 32# define MXC_W1_CONTROL_RDST BIT(3)
41#define MXC_W1_RESET 0x04 33# define MXC_W1_CONTROL_WR(x) BIT(5 - (x))
42#define MXC_W1_COMMAND 0x06 34# define MXC_W1_CONTROL_PST BIT(6)
43#define MXC_W1_TXRX 0x08 35# define MXC_W1_CONTROL_RPP BIT(7)
44#define MXC_W1_INTERRUPT 0x0A 36#define MXC_W1_TIME_DIVIDER 0x02
45#define MXC_W1_INTERRUPT_EN 0x0C 37#define MXC_W1_RESET 0x04
46 38
47struct mxc_w1_device { 39struct mxc_w1_device {
48 void __iomem *regs; 40 void __iomem *regs;
@@ -61,12 +53,12 @@ static u8 mxc_w1_ds2_reset_bus(void *data)
61 unsigned int timeout_cnt = 0; 53 unsigned int timeout_cnt = 0;
62 struct mxc_w1_device *dev = data; 54 struct mxc_w1_device *dev = data;
63 55
64 __raw_writeb(0x80, (dev->regs + MXC_W1_CONTROL)); 56 __raw_writeb(MXC_W1_CONTROL_RPP, (dev->regs + MXC_W1_CONTROL));
65 57
66 while (1) { 58 while (1) {
67 reg_val = __raw_readb(dev->regs + MXC_W1_CONTROL); 59 reg_val = __raw_readb(dev->regs + MXC_W1_CONTROL);
68 60
69 if (((reg_val >> 7) & 0x1) == 0 || 61 if (!(reg_val & MXC_W1_CONTROL_RPP) ||
70 timeout_cnt > MXC_W1_RESET_TIMEOUT) 62 timeout_cnt > MXC_W1_RESET_TIMEOUT)
71 break; 63 break;
72 else 64 else
@@ -74,7 +66,7 @@ static u8 mxc_w1_ds2_reset_bus(void *data)
74 66
75 udelay(100); 67 udelay(100);
76 } 68 }
77 return (reg_val >> 6) & 0x1; 69 return !!(reg_val & MXC_W1_CONTROL_PST);
78} 70}
79 71
80/* 72/*
@@ -90,16 +82,16 @@ static u8 mxc_w1_ds2_touch_bit(void *data, u8 bit)
90 * datasheet. 82 * datasheet.
91 */ 83 */
92 84
93 __raw_writeb((1 << (5 - bit)), ctrl_addr); 85 __raw_writeb(MXC_W1_CONTROL_WR(bit), ctrl_addr);
94 86
95 while (timeout_cnt--) { 87 while (timeout_cnt--) {
96 if (!((__raw_readb(ctrl_addr) >> (5 - bit)) & 0x1)) 88 if (!(__raw_readb(ctrl_addr) & MXC_W1_CONTROL_WR(bit)))
97 break; 89 break;
98 90
99 udelay(1); 91 udelay(1);
100 } 92 }
101 93
102 return ((__raw_readb(ctrl_addr)) >> 3) & 0x1; 94 return !!(__raw_readb(ctrl_addr) & MXC_W1_CONTROL_RDST);
103} 95}
104 96
105static int mxc_w1_probe(struct platform_device *pdev) 97static int mxc_w1_probe(struct platform_device *pdev)
@@ -177,6 +169,7 @@ MODULE_DEVICE_TABLE(of, mxc_w1_dt_ids);
177static struct platform_driver mxc_w1_driver = { 169static struct platform_driver mxc_w1_driver = {
178 .driver = { 170 .driver = {
179 .name = "mxc_w1", 171 .name = "mxc_w1",
172 .owner = THIS_MODULE,
180 .of_match_table = mxc_w1_dt_ids, 173 .of_match_table = mxc_w1_dt_ids,
181 }, 174 },
182 .probe = mxc_w1_probe, 175 .probe = mxc_w1_probe,