diff options
author | Krzysztof Helt <krzysztof.h1@poczta.fm> | 2009-03-31 18:25:03 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-04-01 11:59:26 -0400 |
commit | 75ed3a17a5bc0ecff5c256cfb81ed06f8a6fbb54 (patch) | |
tree | 63f6c71c2c2e94373e3ba2d4eb86c72e4bac7cba /drivers/video | |
parent | d5cb78feee7b6631f578e12bda1e86eea7923637 (diff) |
cirrusfb: convert printks to dev_foo
Convert all printks to dev_dbg, dev_info or dev_err. Kill some excessive
debug information and code in the process.
[akpm@linux-foundation.org: printk fixes]
[akpm@linux-foundation.org: cleanups]
Signed-off-by: Krzysztof Helt <krzysztof.h1@poczta.fm>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/cirrusfb.c | 455 |
1 files changed, 158 insertions, 297 deletions
diff --git a/drivers/video/cirrusfb.c b/drivers/video/cirrusfb.c index a2aa6ddffbe2..3b4b0f1e0615 100644 --- a/drivers/video/cirrusfb.c +++ b/drivers/video/cirrusfb.c | |||
@@ -34,8 +34,6 @@ | |||
34 | * | 34 | * |
35 | */ | 35 | */ |
36 | 36 | ||
37 | #define CIRRUSFB_VERSION "2.0-pre2" | ||
38 | |||
39 | #include <linux/module.h> | 37 | #include <linux/module.h> |
40 | #include <linux/kernel.h> | 38 | #include <linux/kernel.h> |
41 | #include <linux/errno.h> | 39 | #include <linux/errno.h> |
@@ -72,20 +70,9 @@ | |||
72 | * | 70 | * |
73 | */ | 71 | */ |
74 | 72 | ||
75 | /* enable debug output? */ | ||
76 | /* #define CIRRUSFB_DEBUG 1 */ | ||
77 | |||
78 | /* disable runtime assertions? */ | 73 | /* disable runtime assertions? */ |
79 | /* #define CIRRUSFB_NDEBUG */ | 74 | /* #define CIRRUSFB_NDEBUG */ |
80 | 75 | ||
81 | /* debug output */ | ||
82 | #ifdef CIRRUSFB_DEBUG | ||
83 | #define DPRINTK(fmt, args...) \ | ||
84 | printk(KERN_DEBUG "%s: " fmt, __func__ , ## args) | ||
85 | #else | ||
86 | #define DPRINTK(fmt, args...) | ||
87 | #endif | ||
88 | |||
89 | /* debugging assertions */ | 76 | /* debugging assertions */ |
90 | #ifndef CIRRUSFB_NDEBUG | 77 | #ifndef CIRRUSFB_NDEBUG |
91 | #define assert(expr) \ | 78 | #define assert(expr) \ |
@@ -150,7 +137,7 @@ static const struct cirrusfb_board_info_rec { | |||
150 | .maxclock = { | 137 | .maxclock = { |
151 | /* guess */ | 138 | /* guess */ |
152 | /* the SD64/P4 have a higher max. videoclock */ | 139 | /* the SD64/P4 have a higher max. videoclock */ |
153 | 140000, 140000, 140000, 140000, 140000, | 140 | 135100, 135100, 85500, 85500, 0 |
154 | }, | 141 | }, |
155 | .init_sr07 = true, | 142 | .init_sr07 = true, |
156 | .init_sr1f = true, | 143 | .init_sr1f = true, |
@@ -426,11 +413,10 @@ static void cirrusfb_RectFill(u8 __iomem *regbase, int bits_per_pixel, | |||
426 | static void bestclock(long freq, int *nom, int *den, int *div); | 413 | static void bestclock(long freq, int *nom, int *den, int *div); |
427 | 414 | ||
428 | #ifdef CIRRUSFB_DEBUG | 415 | #ifdef CIRRUSFB_DEBUG |
429 | static void cirrusfb_dump(void); | 416 | static void cirrusfb_dbg_reg_dump(struct fb_info *info, caddr_t regbase); |
430 | static void cirrusfb_dbg_reg_dump(caddr_t regbase); | 417 | static void cirrusfb_dbg_print_regs(struct fb_info *info, |
431 | static void cirrusfb_dbg_print_regs(caddr_t regbase, | 418 | caddr_t regbase, |
432 | enum cirrusfb_dbg_reg_class reg_class, ...); | 419 | enum cirrusfb_dbg_reg_class reg_class, ...); |
433 | static void cirrusfb_dbg_print_byte(const char *name, unsigned char val); | ||
434 | #endif /* CIRRUSFB_DEBUG */ | 420 | #endif /* CIRRUSFB_DEBUG */ |
435 | 421 | ||
436 | /*** END PROTOTYPES ********************************************************/ | 422 | /*** END PROTOTYPES ********************************************************/ |
@@ -460,23 +446,24 @@ static int cirrusfb_release(struct fb_info *info, int user) | |||
460 | /**** BEGIN Hardware specific Routines **************************************/ | 446 | /**** BEGIN Hardware specific Routines **************************************/ |
461 | 447 | ||
462 | /* Check if the MCLK is not a better clock source */ | 448 | /* Check if the MCLK is not a better clock source */ |
463 | static int cirrusfb_check_mclk(struct cirrusfb_info *cinfo, long freq) | 449 | static int cirrusfb_check_mclk(struct fb_info *info, long freq) |
464 | { | 450 | { |
451 | struct cirrusfb_info *cinfo = info->par; | ||
465 | long mclk = vga_rseq(cinfo->regbase, CL_SEQR1F) & 0x3f; | 452 | long mclk = vga_rseq(cinfo->regbase, CL_SEQR1F) & 0x3f; |
466 | 453 | ||
467 | /* Read MCLK value */ | 454 | /* Read MCLK value */ |
468 | mclk = (14318 * mclk) >> 3; | 455 | mclk = (14318 * mclk) >> 3; |
469 | DPRINTK("Read MCLK of %ld kHz\n", mclk); | 456 | dev_dbg(info->device, "Read MCLK of %ld kHz\n", mclk); |
470 | 457 | ||
471 | /* Determine if we should use MCLK instead of VCLK, and if so, what we | 458 | /* Determine if we should use MCLK instead of VCLK, and if so, what we |
472 | * should divide it by to get VCLK | 459 | * should divide it by to get VCLK |
473 | */ | 460 | */ |
474 | 461 | ||
475 | if (abs(freq - mclk) < 250) { | 462 | if (abs(freq - mclk) < 250) { |
476 | DPRINTK("Using VCLK = MCLK\n"); | 463 | dev_dbg(info->device, "Using VCLK = MCLK\n"); |
477 | return 1; | 464 | return 1; |
478 | } else if (abs(freq - (mclk / 2)) < 250) { | 465 | } else if (abs(freq - (mclk / 2)) < 250) { |
479 | DPRINTK("Using VCLK = MCLK/2\n"); | 466 | dev_dbg(info->device, "Using VCLK = MCLK/2\n"); |
480 | return 2; | 467 | return 2; |
481 | } | 468 | } |
482 | 469 | ||
@@ -492,56 +479,6 @@ static int cirrusfb_check_var(struct fb_var_screeninfo *var, | |||
492 | 479 | ||
493 | switch (var->bits_per_pixel) { | 480 | switch (var->bits_per_pixel) { |
494 | case 1: | 481 | case 1: |
495 | pixels /= 4; | ||
496 | break; /* 8 pixel per byte, only 1/4th of mem usable */ | ||
497 | case 8: | ||
498 | case 16: | ||
499 | case 32: | ||
500 | break; /* 1 pixel == 1 byte */ | ||
501 | default: | ||
502 | printk(KERN_ERR "cirrusfb: mode %dx%dx%d rejected..." | ||
503 | "color depth not supported.\n", | ||
504 | var->xres, var->yres, var->bits_per_pixel); | ||
505 | DPRINTK("EXIT - EINVAL error\n"); | ||
506 | return -EINVAL; | ||
507 | } | ||
508 | |||
509 | if (var->xres_virtual < var->xres) | ||
510 | var->xres_virtual = var->xres; | ||
511 | /* use highest possible virtual resolution */ | ||
512 | if (var->yres_virtual == -1) { | ||
513 | var->yres_virtual = pixels / var->xres_virtual; | ||
514 | |||
515 | printk(KERN_INFO "cirrusfb: virtual resolution set to " | ||
516 | "maximum of %dx%d\n", var->xres_virtual, | ||
517 | var->yres_virtual); | ||
518 | } | ||
519 | if (var->yres_virtual < var->yres) | ||
520 | var->yres_virtual = var->yres; | ||
521 | |||
522 | if (var->xres_virtual * var->yres_virtual > pixels) { | ||
523 | printk(KERN_ERR "cirrusfb: mode %dx%dx%d rejected... " | ||
524 | "virtual resolution too high to fit into video memory!\n", | ||
525 | var->xres_virtual, var->yres_virtual, | ||
526 | var->bits_per_pixel); | ||
527 | DPRINTK("EXIT - EINVAL error\n"); | ||
528 | return -EINVAL; | ||
529 | } | ||
530 | |||
531 | |||
532 | if (var->xoffset < 0) | ||
533 | var->xoffset = 0; | ||
534 | if (var->yoffset < 0) | ||
535 | var->yoffset = 0; | ||
536 | |||
537 | /* truncate xoffset and yoffset to maximum if too high */ | ||
538 | if (var->xoffset > var->xres_virtual - var->xres) | ||
539 | var->xoffset = var->xres_virtual - var->xres - 1; | ||
540 | if (var->yoffset > var->yres_virtual - var->yres) | ||
541 | var->yoffset = var->yres_virtual - var->yres - 1; | ||
542 | |||
543 | switch (var->bits_per_pixel) { | ||
544 | case 1: | ||
545 | var->red.offset = 0; | 482 | var->red.offset = 0; |
546 | var->red.length = 1; | 483 | var->red.length = 1; |
547 | var->green = var->red; | 484 | var->green = var->red; |
@@ -586,12 +523,46 @@ static int cirrusfb_check_var(struct fb_var_screeninfo *var, | |||
586 | break; | 523 | break; |
587 | 524 | ||
588 | default: | 525 | default: |
589 | DPRINTK("Unsupported bpp size: %d\n", var->bits_per_pixel); | 526 | dev_dbg(info->device, |
527 | "Unsupported bpp size: %d\n", var->bits_per_pixel); | ||
590 | assert(false); | 528 | assert(false); |
591 | /* should never occur */ | 529 | /* should never occur */ |
592 | break; | 530 | break; |
593 | } | 531 | } |
594 | 532 | ||
533 | if (var->xres_virtual < var->xres) | ||
534 | var->xres_virtual = var->xres; | ||
535 | /* use highest possible virtual resolution */ | ||
536 | if (var->yres_virtual == -1) { | ||
537 | var->yres_virtual = pixels / var->xres_virtual; | ||
538 | |||
539 | dev_info(info->device, | ||
540 | "virtual resolution set to maximum of %dx%d\n", | ||
541 | var->xres_virtual, var->yres_virtual); | ||
542 | } | ||
543 | if (var->yres_virtual < var->yres) | ||
544 | var->yres_virtual = var->yres; | ||
545 | |||
546 | if (var->xres_virtual * var->yres_virtual > pixels) { | ||
547 | dev_err(info->device, "mode %dx%dx%d rejected... " | ||
548 | "virtual resolution too high to fit into video memory!\n", | ||
549 | var->xres_virtual, var->yres_virtual, | ||
550 | var->bits_per_pixel); | ||
551 | return -EINVAL; | ||
552 | } | ||
553 | |||
554 | |||
555 | if (var->xoffset < 0) | ||
556 | var->xoffset = 0; | ||
557 | if (var->yoffset < 0) | ||
558 | var->yoffset = 0; | ||
559 | |||
560 | /* truncate xoffset and yoffset to maximum if too high */ | ||
561 | if (var->xoffset > var->xres_virtual - var->xres) | ||
562 | var->xoffset = var->xres_virtual - var->xres - 1; | ||
563 | if (var->yoffset > var->yres_virtual - var->yres) | ||
564 | var->yoffset = var->yres_virtual - var->yres - 1; | ||
565 | |||
595 | var->red.msb_right = | 566 | var->red.msb_right = |
596 | var->green.msb_right = | 567 | var->green.msb_right = |
597 | var->blue.msb_right = | 568 | var->blue.msb_right = |
@@ -606,9 +577,8 @@ static int cirrusfb_check_var(struct fb_var_screeninfo *var, | |||
606 | yres = (yres + 1) / 2; | 577 | yres = (yres + 1) / 2; |
607 | 578 | ||
608 | if (yres >= 1280) { | 579 | if (yres >= 1280) { |
609 | printk(KERN_ERR "cirrusfb: ERROR: VerticalTotal >= 1280; " | 580 | dev_err(info->device, "ERROR: VerticalTotal >= 1280; " |
610 | "special treatment required! (TODO)\n"); | 581 | "special treatment required! (TODO)\n"); |
611 | DPRINTK("EXIT - EINVAL error\n"); | ||
612 | return -EINVAL; | 582 | return -EINVAL; |
613 | } | 583 | } |
614 | 584 | ||
@@ -642,7 +612,8 @@ static int cirrusfb_decode_var(const struct fb_var_screeninfo *var, | |||
642 | break; | 612 | break; |
643 | 613 | ||
644 | default: | 614 | default: |
645 | DPRINTK("Unsupported bpp size: %d\n", var->bits_per_pixel); | 615 | dev_dbg(info->device, |
616 | "Unsupported bpp size: %d\n", var->bits_per_pixel); | ||
646 | assert(false); | 617 | assert(false); |
647 | /* should never occur */ | 618 | /* should never occur */ |
648 | break; | 619 | break; |
@@ -653,7 +624,7 @@ static int cirrusfb_decode_var(const struct fb_var_screeninfo *var, | |||
653 | /* convert from ps to kHz */ | 624 | /* convert from ps to kHz */ |
654 | freq = PICOS2KHZ(var->pixclock); | 625 | freq = PICOS2KHZ(var->pixclock); |
655 | 626 | ||
656 | DPRINTK("desired pixclock: %ld kHz\n", freq); | 627 | dev_dbg(info->device, "desired pixclock: %ld kHz\n", freq); |
657 | 628 | ||
658 | maxclock = cirrusfb_board_info[cinfo->btype].maxclock[maxclockidx]; | 629 | maxclock = cirrusfb_board_info[cinfo->btype].maxclock[maxclockidx]; |
659 | regs->multiplexing = 0; | 630 | regs->multiplexing = 0; |
@@ -668,9 +639,9 @@ static int cirrusfb_decode_var(const struct fb_var_screeninfo *var, | |||
668 | break; | 639 | break; |
669 | 640 | ||
670 | default: | 641 | default: |
671 | printk(KERN_ERR "cirrusfb: Frequency greater " | 642 | dev_err(info->device, |
672 | "than maxclock (%ld kHz)\n", maxclock); | 643 | "Frequency greater than maxclock (%ld kHz)\n", |
673 | DPRINTK("EXIT - return -EINVAL\n"); | 644 | maxclock); |
674 | return -EINVAL; | 645 | return -EINVAL; |
675 | } | 646 | } |
676 | } | 647 | } |
@@ -689,16 +660,17 @@ static int cirrusfb_decode_var(const struct fb_var_screeninfo *var, | |||
689 | return 0; | 660 | return 0; |
690 | } | 661 | } |
691 | 662 | ||
692 | static void cirrusfb_set_mclk_as_source(const struct cirrusfb_info *cinfo, | 663 | static void cirrusfb_set_mclk_as_source(const struct fb_info *info, int div) |
693 | int div) | ||
694 | { | 664 | { |
665 | struct cirrusfb_info *cinfo = info->par; | ||
695 | unsigned char old1f, old1e; | 666 | unsigned char old1f, old1e; |
667 | |||
696 | assert(cinfo != NULL); | 668 | assert(cinfo != NULL); |
697 | old1f = vga_rseq(cinfo->regbase, CL_SEQR1F) & ~0x40; | 669 | old1f = vga_rseq(cinfo->regbase, CL_SEQR1F) & ~0x40; |
698 | 670 | ||
699 | if (div) { | 671 | if (div) { |
700 | DPRINTK("Set %s as pixclock source.\n", | 672 | dev_dbg(info->device, "Set %s as pixclock source.\n", |
701 | (div == 2) ? "MCLK/2" : "MCLK"); | 673 | (div == 2) ? "MCLK/2" : "MCLK"); |
702 | old1f |= 0x40; | 674 | old1f |= 0x40; |
703 | old1e = vga_rseq(cinfo->regbase, CL_SEQR1E) & ~0x1; | 675 | old1e = vga_rseq(cinfo->regbase, CL_SEQR1E) & ~0x1; |
704 | if (div == 2) | 676 | if (div == 2) |
@@ -728,17 +700,16 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
728 | long freq; | 700 | long freq; |
729 | int nom, den, div; | 701 | int nom, den, div; |
730 | 702 | ||
731 | DPRINTK("ENTER\n"); | 703 | dev_dbg(info->device, "Requested mode: %dx%dx%d\n", |
732 | DPRINTK("Requested mode: %dx%dx%d\n", | ||
733 | var->xres, var->yres, var->bits_per_pixel); | 704 | var->xres, var->yres, var->bits_per_pixel); |
734 | DPRINTK("pixclock: %d\n", var->pixclock); | 705 | dev_dbg(info->device, "pixclock: %d\n", var->pixclock); |
735 | 706 | ||
736 | init_vgachip(info); | 707 | init_vgachip(info); |
737 | 708 | ||
738 | err = cirrusfb_decode_var(var, ®s, info); | 709 | err = cirrusfb_decode_var(var, ®s, info); |
739 | if (err) { | 710 | if (err) { |
740 | /* should never happen */ | 711 | /* should never happen */ |
741 | DPRINTK("mode change aborted. invalid var.\n"); | 712 | dev_dbg(info->device, "mode change aborted. invalid var.\n"); |
742 | return -EINVAL; | 713 | return -EINVAL; |
743 | } | 714 | } |
744 | 715 | ||
@@ -789,30 +760,30 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
789 | vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, 0x20); /* previously: 0x00) */ | 760 | vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, 0x20); /* previously: 0x00) */ |
790 | 761 | ||
791 | /* if debugging is enabled, all parameters get output before writing */ | 762 | /* if debugging is enabled, all parameters get output before writing */ |
792 | DPRINTK("CRT0: %d\n", htotal); | 763 | dev_dbg(info->device, "CRT0: %d\n", htotal); |
793 | vga_wcrt(regbase, VGA_CRTC_H_TOTAL, htotal); | 764 | vga_wcrt(regbase, VGA_CRTC_H_TOTAL, htotal); |
794 | 765 | ||
795 | DPRINTK("CRT1: %d\n", hdispend); | 766 | dev_dbg(info->device, "CRT1: %d\n", hdispend); |
796 | vga_wcrt(regbase, VGA_CRTC_H_DISP, hdispend); | 767 | vga_wcrt(regbase, VGA_CRTC_H_DISP, hdispend); |
797 | 768 | ||
798 | DPRINTK("CRT2: %d\n", var->xres / 8); | 769 | dev_dbg(info->device, "CRT2: %d\n", var->xres / 8); |
799 | vga_wcrt(regbase, VGA_CRTC_H_BLANK_START, var->xres / 8); | 770 | vga_wcrt(regbase, VGA_CRTC_H_BLANK_START, var->xres / 8); |
800 | 771 | ||
801 | /* + 128: Compatible read */ | 772 | /* + 128: Compatible read */ |
802 | DPRINTK("CRT3: 128+%d\n", (htotal + 5) % 32); | 773 | dev_dbg(info->device, "CRT3: 128+%d\n", (htotal + 5) % 32); |
803 | vga_wcrt(regbase, VGA_CRTC_H_BLANK_END, | 774 | vga_wcrt(regbase, VGA_CRTC_H_BLANK_END, |
804 | 128 + ((htotal + 5) % 32)); | 775 | 128 + ((htotal + 5) % 32)); |
805 | 776 | ||
806 | DPRINTK("CRT4: %d\n", hsyncstart); | 777 | dev_dbg(info->device, "CRT4: %d\n", hsyncstart); |
807 | vga_wcrt(regbase, VGA_CRTC_H_SYNC_START, hsyncstart); | 778 | vga_wcrt(regbase, VGA_CRTC_H_SYNC_START, hsyncstart); |
808 | 779 | ||
809 | tmp = hsyncend % 32; | 780 | tmp = hsyncend % 32; |
810 | if ((htotal + 5) & 32) | 781 | if ((htotal + 5) & 32) |
811 | tmp += 128; | 782 | tmp += 128; |
812 | DPRINTK("CRT5: %d\n", tmp); | 783 | dev_dbg(info->device, "CRT5: %d\n", tmp); |
813 | vga_wcrt(regbase, VGA_CRTC_H_SYNC_END, tmp); | 784 | vga_wcrt(regbase, VGA_CRTC_H_SYNC_END, tmp); |
814 | 785 | ||
815 | DPRINTK("CRT6: %d\n", vtotal & 0xff); | 786 | dev_dbg(info->device, "CRT6: %d\n", vtotal & 0xff); |
816 | vga_wcrt(regbase, VGA_CRTC_V_TOTAL, vtotal & 0xff); | 787 | vga_wcrt(regbase, VGA_CRTC_V_TOTAL, vtotal & 0xff); |
817 | 788 | ||
818 | tmp = 16; /* LineCompare bit #9 */ | 789 | tmp = 16; /* LineCompare bit #9 */ |
@@ -830,7 +801,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
830 | tmp |= 64; | 801 | tmp |= 64; |
831 | if (vsyncstart & 512) | 802 | if (vsyncstart & 512) |
832 | tmp |= 128; | 803 | tmp |= 128; |
833 | DPRINTK("CRT7: %d\n", tmp); | 804 | dev_dbg(info->device, "CRT7: %d\n", tmp); |
834 | vga_wcrt(regbase, VGA_CRTC_OVERFLOW, tmp); | 805 | vga_wcrt(regbase, VGA_CRTC_OVERFLOW, tmp); |
835 | 806 | ||
836 | tmp = 0x40; /* LineCompare bit #8 */ | 807 | tmp = 0x40; /* LineCompare bit #8 */ |
@@ -838,25 +809,25 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
838 | tmp |= 0x20; | 809 | tmp |= 0x20; |
839 | if (var->vmode & FB_VMODE_DOUBLE) | 810 | if (var->vmode & FB_VMODE_DOUBLE) |
840 | tmp |= 0x80; | 811 | tmp |= 0x80; |
841 | DPRINTK("CRT9: %d\n", tmp); | 812 | dev_dbg(info->device, "CRT9: %d\n", tmp); |
842 | vga_wcrt(regbase, VGA_CRTC_MAX_SCAN, tmp); | 813 | vga_wcrt(regbase, VGA_CRTC_MAX_SCAN, tmp); |
843 | 814 | ||
844 | DPRINTK("CRT10: %d\n", vsyncstart & 0xff); | 815 | dev_dbg(info->device, "CRT10: %d\n", vsyncstart & 0xff); |
845 | vga_wcrt(regbase, VGA_CRTC_V_SYNC_START, vsyncstart & 0xff); | 816 | vga_wcrt(regbase, VGA_CRTC_V_SYNC_START, vsyncstart & 0xff); |
846 | 817 | ||
847 | DPRINTK("CRT11: 64+32+%d\n", vsyncend % 16); | 818 | dev_dbg(info->device, "CRT11: 64+32+%d\n", vsyncend % 16); |
848 | vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, vsyncend % 16 + 64 + 32); | 819 | vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, vsyncend % 16 + 64 + 32); |
849 | 820 | ||
850 | DPRINTK("CRT12: %d\n", vdispend & 0xff); | 821 | dev_dbg(info->device, "CRT12: %d\n", vdispend & 0xff); |
851 | vga_wcrt(regbase, VGA_CRTC_V_DISP_END, vdispend & 0xff); | 822 | vga_wcrt(regbase, VGA_CRTC_V_DISP_END, vdispend & 0xff); |
852 | 823 | ||
853 | DPRINTK("CRT15: %d\n", (vdispend + 1) & 0xff); | 824 | dev_dbg(info->device, "CRT15: %d\n", (vdispend + 1) & 0xff); |
854 | vga_wcrt(regbase, VGA_CRTC_V_BLANK_START, (vdispend + 1) & 0xff); | 825 | vga_wcrt(regbase, VGA_CRTC_V_BLANK_START, (vdispend + 1) & 0xff); |
855 | 826 | ||
856 | DPRINTK("CRT16: %d\n", vtotal & 0xff); | 827 | dev_dbg(info->device, "CRT16: %d\n", vtotal & 0xff); |
857 | vga_wcrt(regbase, VGA_CRTC_V_BLANK_END, vtotal & 0xff); | 828 | vga_wcrt(regbase, VGA_CRTC_V_BLANK_END, vtotal & 0xff); |
858 | 829 | ||
859 | DPRINTK("CRT18: 0xff\n"); | 830 | dev_dbg(info->device, "CRT18: 0xff\n"); |
860 | vga_wcrt(regbase, VGA_CRTC_LINE_COMPARE, 0xff); | 831 | vga_wcrt(regbase, VGA_CRTC_LINE_COMPARE, 0xff); |
861 | 832 | ||
862 | tmp = 0; | 833 | tmp = 0; |
@@ -871,12 +842,15 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
871 | if (vtotal & 512) | 842 | if (vtotal & 512) |
872 | tmp |= 128; | 843 | tmp |= 128; |
873 | 844 | ||
874 | DPRINTK("CRT1a: %d\n", tmp); | 845 | dev_dbg(info->device, "CRT1a: %d\n", tmp); |
875 | vga_wcrt(regbase, CL_CRT1A, tmp); | 846 | vga_wcrt(regbase, CL_CRT1A, tmp); |
876 | 847 | ||
877 | freq = PICOS2KHZ(var->pixclock); | 848 | freq = PICOS2KHZ(var->pixclock); |
878 | bestclock(freq, &nom, &den, &div); | 849 | bestclock(freq, &nom, &den, &div); |
879 | 850 | ||
851 | dev_dbg(info->device, "VCLK freq: %ld kHz nom: %d den: %d div: %d\n", | ||
852 | freq, nom, den, div); | ||
853 | |||
880 | /* set VCLK0 */ | 854 | /* set VCLK0 */ |
881 | /* hardware RefClock: 14.31818 MHz */ | 855 | /* hardware RefClock: 14.31818 MHz */ |
882 | /* formula: VClk = (OSC * N) / (D * (1+P)) */ | 856 | /* formula: VClk = (OSC * N) / (D * (1+P)) */ |
@@ -886,10 +860,10 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
886 | /* if freq is close to mclk or mclk/2 select mclk | 860 | /* if freq is close to mclk or mclk/2 select mclk |
887 | * as clock source | 861 | * as clock source |
888 | */ | 862 | */ |
889 | int divMCLK = cirrusfb_check_mclk(cinfo, freq); | 863 | int divMCLK = cirrusfb_check_mclk(info, freq); |
890 | if (divMCLK) { | 864 | if (divMCLK) { |
891 | nom = 0; | 865 | nom = 0; |
892 | cirrusfb_set_mclk_as_source(cinfo, divMCLK); | 866 | cirrusfb_set_mclk_as_source(info, divMCLK); |
893 | } | 867 | } |
894 | } | 868 | } |
895 | if (nom) { | 869 | if (nom) { |
@@ -904,7 +878,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
904 | (cinfo->btype == BT_GD5480)) | 878 | (cinfo->btype == BT_GD5480)) |
905 | tmp |= 0x80; | 879 | tmp |= 0x80; |
906 | 880 | ||
907 | DPRINTK("CL_SEQR1B: %ld\n", (long) tmp); | 881 | dev_dbg(info->device, "CL_SEQR1B: %ld\n", (long) tmp); |
908 | vga_wseq(regbase, CL_SEQR1B, tmp); | 882 | vga_wseq(regbase, CL_SEQR1B, tmp); |
909 | } | 883 | } |
910 | 884 | ||
@@ -952,7 +926,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
952 | 926 | ||
953 | /* programming for different color depths */ | 927 | /* programming for different color depths */ |
954 | if (var->bits_per_pixel == 1) { | 928 | if (var->bits_per_pixel == 1) { |
955 | DPRINTK("cirrusfb: preparing for 1 bit deep display\n"); | 929 | dev_dbg(info->device, "preparing for 1 bit deep display\n"); |
956 | vga_wgfx(regbase, VGA_GFX_MODE, 0); /* mode register */ | 930 | vga_wgfx(regbase, VGA_GFX_MODE, 0); /* mode register */ |
957 | 931 | ||
958 | /* SR07 */ | 932 | /* SR07 */ |
@@ -964,20 +938,18 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
964 | case BT_PICASSO4: | 938 | case BT_PICASSO4: |
965 | case BT_ALPINE: | 939 | case BT_ALPINE: |
966 | case BT_GD5480: | 940 | case BT_GD5480: |
967 | DPRINTK(" (for GD54xx)\n"); | ||
968 | vga_wseq(regbase, CL_SEQR7, | 941 | vga_wseq(regbase, CL_SEQR7, |
969 | regs.multiplexing ? | 942 | regs.multiplexing ? |
970 | bi->sr07_1bpp_mux : bi->sr07_1bpp); | 943 | bi->sr07_1bpp_mux : bi->sr07_1bpp); |
971 | break; | 944 | break; |
972 | 945 | ||
973 | case BT_LAGUNA: | 946 | case BT_LAGUNA: |
974 | DPRINTK(" (for GD546x)\n"); | ||
975 | vga_wseq(regbase, CL_SEQR7, | 947 | vga_wseq(regbase, CL_SEQR7, |
976 | vga_rseq(regbase, CL_SEQR7) & ~0x01); | 948 | vga_rseq(regbase, CL_SEQR7) & ~0x01); |
977 | break; | 949 | break; |
978 | 950 | ||
979 | default: | 951 | default: |
980 | printk(KERN_WARNING "cirrusfb: unknown Board\n"); | 952 | dev_warn(info->device, "unknown Board\n"); |
981 | break; | 953 | break; |
982 | } | 954 | } |
983 | 955 | ||
@@ -987,14 +959,12 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
987 | /* setting the SEQRF on SD64 is not necessary | 959 | /* setting the SEQRF on SD64 is not necessary |
988 | * (only during init) | 960 | * (only during init) |
989 | */ | 961 | */ |
990 | DPRINTK("(for SD64)\n"); | ||
991 | /* MCLK select */ | 962 | /* MCLK select */ |
992 | vga_wseq(regbase, CL_SEQR1F, 0x1a); | 963 | vga_wseq(regbase, CL_SEQR1F, 0x1a); |
993 | break; | 964 | break; |
994 | 965 | ||
995 | case BT_PICCOLO: | 966 | case BT_PICCOLO: |
996 | case BT_SPECTRUM: | 967 | case BT_SPECTRUM: |
997 | DPRINTK("(for Piccolo/Spectrum)\n"); | ||
998 | /* ### ueberall 0x22? */ | 968 | /* ### ueberall 0x22? */ |
999 | /* ##vorher 1c MCLK select */ | 969 | /* ##vorher 1c MCLK select */ |
1000 | vga_wseq(regbase, CL_SEQR1F, 0x22); | 970 | vga_wseq(regbase, CL_SEQR1F, 0x22); |
@@ -1003,7 +973,6 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1003 | break; | 973 | break; |
1004 | 974 | ||
1005 | case BT_PICASSO: | 975 | case BT_PICASSO: |
1006 | DPRINTK("(for Picasso)\n"); | ||
1007 | /* ##vorher 22 MCLK select */ | 976 | /* ##vorher 22 MCLK select */ |
1008 | vga_wseq(regbase, CL_SEQR1F, 0x22); | 977 | vga_wseq(regbase, CL_SEQR1F, 0x22); |
1009 | /* ## vorher d0 avoid FIFO underruns..? */ | 978 | /* ## vorher d0 avoid FIFO underruns..? */ |
@@ -1014,12 +983,11 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1014 | case BT_ALPINE: | 983 | case BT_ALPINE: |
1015 | case BT_GD5480: | 984 | case BT_GD5480: |
1016 | case BT_LAGUNA: | 985 | case BT_LAGUNA: |
1017 | DPRINTK(" (for GD54xx)\n"); | ||
1018 | /* do nothing */ | 986 | /* do nothing */ |
1019 | break; | 987 | break; |
1020 | 988 | ||
1021 | default: | 989 | default: |
1022 | printk(KERN_WARNING "cirrusfb: unknown Board\n"); | 990 | dev_warn(info->device, "unknown Board\n"); |
1023 | break; | 991 | break; |
1024 | } | 992 | } |
1025 | 993 | ||
@@ -1045,7 +1013,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1045 | */ | 1013 | */ |
1046 | 1014 | ||
1047 | else if (var->bits_per_pixel == 8) { | 1015 | else if (var->bits_per_pixel == 8) { |
1048 | DPRINTK("cirrusfb: preparing for 8 bit deep display\n"); | 1016 | dev_dbg(info->device, "preparing for 8 bit deep display\n"); |
1049 | switch (cinfo->btype) { | 1017 | switch (cinfo->btype) { |
1050 | case BT_SD64: | 1018 | case BT_SD64: |
1051 | case BT_PICCOLO: | 1019 | case BT_PICCOLO: |
@@ -1054,20 +1022,18 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1054 | case BT_PICASSO4: | 1022 | case BT_PICASSO4: |
1055 | case BT_ALPINE: | 1023 | case BT_ALPINE: |
1056 | case BT_GD5480: | 1024 | case BT_GD5480: |
1057 | DPRINTK(" (for GD54xx)\n"); | ||
1058 | vga_wseq(regbase, CL_SEQR7, | 1025 | vga_wseq(regbase, CL_SEQR7, |
1059 | regs.multiplexing ? | 1026 | regs.multiplexing ? |
1060 | bi->sr07_8bpp_mux : bi->sr07_8bpp); | 1027 | bi->sr07_8bpp_mux : bi->sr07_8bpp); |
1061 | break; | 1028 | break; |
1062 | 1029 | ||
1063 | case BT_LAGUNA: | 1030 | case BT_LAGUNA: |
1064 | DPRINTK(" (for GD546x)\n"); | ||
1065 | vga_wseq(regbase, CL_SEQR7, | 1031 | vga_wseq(regbase, CL_SEQR7, |
1066 | vga_rseq(regbase, CL_SEQR7) | 0x01); | 1032 | vga_rseq(regbase, CL_SEQR7) | 0x01); |
1067 | break; | 1033 | break; |
1068 | 1034 | ||
1069 | default: | 1035 | default: |
1070 | printk(KERN_WARNING "cirrusfb: unknown Board\n"); | 1036 | dev_warn(info->device, "unknown Board\n"); |
1071 | break; | 1037 | break; |
1072 | } | 1038 | } |
1073 | 1039 | ||
@@ -1095,18 +1061,16 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1095 | break; | 1061 | break; |
1096 | 1062 | ||
1097 | case BT_ALPINE: | 1063 | case BT_ALPINE: |
1098 | DPRINTK(" (for GD543x)\n"); | ||
1099 | /* We already set SRF and SR1F */ | 1064 | /* We already set SRF and SR1F */ |
1100 | break; | 1065 | break; |
1101 | 1066 | ||
1102 | case BT_GD5480: | 1067 | case BT_GD5480: |
1103 | case BT_LAGUNA: | 1068 | case BT_LAGUNA: |
1104 | DPRINTK(" (for GD54xx)\n"); | ||
1105 | /* do nothing */ | 1069 | /* do nothing */ |
1106 | break; | 1070 | break; |
1107 | 1071 | ||
1108 | default: | 1072 | default: |
1109 | printk(KERN_WARNING "cirrusfb: unknown Board\n"); | 1073 | dev_warn(info->device, "unknown board\n"); |
1110 | break; | 1074 | break; |
1111 | } | 1075 | } |
1112 | 1076 | ||
@@ -1134,7 +1098,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1134 | */ | 1098 | */ |
1135 | 1099 | ||
1136 | else if (var->bits_per_pixel == 16) { | 1100 | else if (var->bits_per_pixel == 16) { |
1137 | DPRINTK("cirrusfb: preparing for 16 bit deep display\n"); | 1101 | dev_dbg(info->device, "preparing for 16 bit deep display\n"); |
1138 | switch (cinfo->btype) { | 1102 | switch (cinfo->btype) { |
1139 | case BT_SD64: | 1103 | case BT_SD64: |
1140 | /* Extended Sequencer Mode: 256c col. mode */ | 1104 | /* Extended Sequencer Mode: 256c col. mode */ |
@@ -1166,24 +1130,21 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1166 | break; | 1130 | break; |
1167 | 1131 | ||
1168 | case BT_ALPINE: | 1132 | case BT_ALPINE: |
1169 | DPRINTK(" (for GD543x)\n"); | ||
1170 | vga_wseq(regbase, CL_SEQR7, 0xa7); | 1133 | vga_wseq(regbase, CL_SEQR7, 0xa7); |
1171 | break; | 1134 | break; |
1172 | 1135 | ||
1173 | case BT_GD5480: | 1136 | case BT_GD5480: |
1174 | DPRINTK(" (for GD5480)\n"); | ||
1175 | vga_wseq(regbase, CL_SEQR7, 0x17); | 1137 | vga_wseq(regbase, CL_SEQR7, 0x17); |
1176 | /* We already set SRF and SR1F */ | 1138 | /* We already set SRF and SR1F */ |
1177 | break; | 1139 | break; |
1178 | 1140 | ||
1179 | case BT_LAGUNA: | 1141 | case BT_LAGUNA: |
1180 | DPRINTK(" (for GD546x)\n"); | ||
1181 | vga_wseq(regbase, CL_SEQR7, | 1142 | vga_wseq(regbase, CL_SEQR7, |
1182 | vga_rseq(regbase, CL_SEQR7) & ~0x01); | 1143 | vga_rseq(regbase, CL_SEQR7) & ~0x01); |
1183 | break; | 1144 | break; |
1184 | 1145 | ||
1185 | default: | 1146 | default: |
1186 | printk(KERN_WARNING "CIRRUSFB: unknown Board\n"); | 1147 | dev_warn(info->device, "unknown Board\n"); |
1187 | break; | 1148 | break; |
1188 | } | 1149 | } |
1189 | 1150 | ||
@@ -1211,7 +1172,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1211 | */ | 1172 | */ |
1212 | 1173 | ||
1213 | else if (var->bits_per_pixel == 32) { | 1174 | else if (var->bits_per_pixel == 32) { |
1214 | DPRINTK("cirrusfb: preparing for 32 bit deep display\n"); | 1175 | dev_dbg(info->device, "preparing for 32 bit deep display\n"); |
1215 | switch (cinfo->btype) { | 1176 | switch (cinfo->btype) { |
1216 | case BT_SD64: | 1177 | case BT_SD64: |
1217 | /* Extended Sequencer Mode: 256c col. mode */ | 1178 | /* Extended Sequencer Mode: 256c col. mode */ |
@@ -1243,24 +1204,21 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1243 | break; | 1204 | break; |
1244 | 1205 | ||
1245 | case BT_ALPINE: | 1206 | case BT_ALPINE: |
1246 | DPRINTK(" (for GD543x)\n"); | ||
1247 | vga_wseq(regbase, CL_SEQR7, 0xa9); | 1207 | vga_wseq(regbase, CL_SEQR7, 0xa9); |
1248 | break; | 1208 | break; |
1249 | 1209 | ||
1250 | case BT_GD5480: | 1210 | case BT_GD5480: |
1251 | DPRINTK(" (for GD5480)\n"); | ||
1252 | vga_wseq(regbase, CL_SEQR7, 0x19); | 1211 | vga_wseq(regbase, CL_SEQR7, 0x19); |
1253 | /* We already set SRF and SR1F */ | 1212 | /* We already set SRF and SR1F */ |
1254 | break; | 1213 | break; |
1255 | 1214 | ||
1256 | case BT_LAGUNA: | 1215 | case BT_LAGUNA: |
1257 | DPRINTK(" (for GD546x)\n"); | ||
1258 | vga_wseq(regbase, CL_SEQR7, | 1216 | vga_wseq(regbase, CL_SEQR7, |
1259 | vga_rseq(regbase, CL_SEQR7) & ~0x01); | 1217 | vga_rseq(regbase, CL_SEQR7) & ~0x01); |
1260 | break; | 1218 | break; |
1261 | 1219 | ||
1262 | default: | 1220 | default: |
1263 | printk(KERN_WARNING "cirrusfb: unknown Board\n"); | 1221 | dev_warn(info->device, "unknown Board\n"); |
1264 | break; | 1222 | break; |
1265 | } | 1223 | } |
1266 | 1224 | ||
@@ -1284,8 +1242,8 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1284 | */ | 1242 | */ |
1285 | 1243 | ||
1286 | else | 1244 | else |
1287 | printk(KERN_ERR "cirrusfb: What's this?? " | 1245 | dev_err(info->device, |
1288 | " requested color depth == %d.\n", | 1246 | "What's this? requested color depth == %d.\n", |
1289 | var->bits_per_pixel); | 1247 | var->bits_per_pixel); |
1290 | 1248 | ||
1291 | vga_wcrt(regbase, VGA_CRTC_OFFSET, offset & 0xff); | 1249 | vga_wcrt(regbase, VGA_CRTC_OFFSET, offset & 0xff); |
@@ -1355,7 +1313,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1355 | */ | 1313 | */ |
1356 | 1314 | ||
1357 | vga_wseq(regbase, VGA_SEQ_CLOCK_MODE, tmp); | 1315 | vga_wseq(regbase, VGA_SEQ_CLOCK_MODE, tmp); |
1358 | DPRINTK("CL_SEQR1: %d\n", tmp); | 1316 | dev_dbg(info->device, "CL_SEQR1: %d\n", tmp); |
1359 | 1317 | ||
1360 | cinfo->currentmode = regs; | 1318 | cinfo->currentmode = regs; |
1361 | 1319 | ||
@@ -1363,10 +1321,9 @@ static int cirrusfb_set_par_foo(struct fb_info *info) | |||
1363 | cirrusfb_pan_display(var, info); | 1321 | cirrusfb_pan_display(var, info); |
1364 | 1322 | ||
1365 | #ifdef CIRRUSFB_DEBUG | 1323 | #ifdef CIRRUSFB_DEBUG |
1366 | cirrusfb_dump(); | 1324 | cirrusfb_dbg_reg_dump(info, NULL); |
1367 | #endif | 1325 | #endif |
1368 | 1326 | ||
1369 | DPRINTK("EXIT\n"); | ||
1370 | return 0; | 1327 | return 0; |
1371 | } | 1328 | } |
1372 | 1329 | ||
@@ -1424,8 +1381,8 @@ static int cirrusfb_pan_display(struct fb_var_screeninfo *var, | |||
1424 | unsigned char tmp = 0, tmp2 = 0, xpix; | 1381 | unsigned char tmp = 0, tmp2 = 0, xpix; |
1425 | struct cirrusfb_info *cinfo = info->par; | 1382 | struct cirrusfb_info *cinfo = info->par; |
1426 | 1383 | ||
1427 | DPRINTK("ENTER\n"); | 1384 | dev_dbg(info->device, |
1428 | DPRINTK("virtual offset: (%d,%d)\n", var->xoffset, var->yoffset); | 1385 | "virtual offset: (%d,%d)\n", var->xoffset, var->yoffset); |
1429 | 1386 | ||
1430 | /* no range checks for xoffset and yoffset, */ | 1387 | /* no range checks for xoffset and yoffset, */ |
1431 | /* as fb_pan_display has already done this */ | 1388 | /* as fb_pan_display has already done this */ |
@@ -1481,7 +1438,6 @@ static int cirrusfb_pan_display(struct fb_var_screeninfo *var, | |||
1481 | 1438 | ||
1482 | cirrusfb_WaitBLT(cinfo->regbase); | 1439 | cirrusfb_WaitBLT(cinfo->regbase); |
1483 | 1440 | ||
1484 | DPRINTK("EXIT\n"); | ||
1485 | return 0; | 1441 | return 0; |
1486 | } | 1442 | } |
1487 | 1443 | ||
@@ -1502,11 +1458,11 @@ static int cirrusfb_blank(int blank_mode, struct fb_info *info) | |||
1502 | struct cirrusfb_info *cinfo = info->par; | 1458 | struct cirrusfb_info *cinfo = info->par; |
1503 | int current_mode = cinfo->blank_mode; | 1459 | int current_mode = cinfo->blank_mode; |
1504 | 1460 | ||
1505 | DPRINTK("ENTER, blank mode = %d\n", blank_mode); | 1461 | dev_dbg(info->device, "ENTER, blank mode = %d\n", blank_mode); |
1506 | 1462 | ||
1507 | if (info->state != FBINFO_STATE_RUNNING || | 1463 | if (info->state != FBINFO_STATE_RUNNING || |
1508 | current_mode == blank_mode) { | 1464 | current_mode == blank_mode) { |
1509 | DPRINTK("EXIT, returning 0\n"); | 1465 | dev_dbg(info->device, "EXIT, returning 0\n"); |
1510 | return 0; | 1466 | return 0; |
1511 | } | 1467 | } |
1512 | 1468 | ||
@@ -1543,12 +1499,12 @@ static int cirrusfb_blank(int blank_mode, struct fb_info *info) | |||
1543 | vga_wgfx(cinfo->regbase, CL_GRE, 0x06); | 1499 | vga_wgfx(cinfo->regbase, CL_GRE, 0x06); |
1544 | break; | 1500 | break; |
1545 | default: | 1501 | default: |
1546 | DPRINTK("EXIT, returning 1\n"); | 1502 | dev_dbg(info->device, "EXIT, returning 1\n"); |
1547 | return 1; | 1503 | return 1; |
1548 | } | 1504 | } |
1549 | 1505 | ||
1550 | cinfo->blank_mode = blank_mode; | 1506 | cinfo->blank_mode = blank_mode; |
1551 | DPRINTK("EXIT, returning 0\n"); | 1507 | dev_dbg(info->device, "EXIT, returning 0\n"); |
1552 | 1508 | ||
1553 | /* Let fbcon do a soft blank for us */ | 1509 | /* Let fbcon do a soft blank for us */ |
1554 | return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0; | 1510 | return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0; |
@@ -1562,8 +1518,6 @@ static void init_vgachip(struct fb_info *info) | |||
1562 | struct cirrusfb_info *cinfo = info->par; | 1518 | struct cirrusfb_info *cinfo = info->par; |
1563 | const struct cirrusfb_board_info_rec *bi; | 1519 | const struct cirrusfb_board_info_rec *bi; |
1564 | 1520 | ||
1565 | DPRINTK("ENTER\n"); | ||
1566 | |||
1567 | assert(cinfo != NULL); | 1521 | assert(cinfo != NULL); |
1568 | 1522 | ||
1569 | bi = &cirrusfb_board_info[cinfo->btype]; | 1523 | bi = &cirrusfb_board_info[cinfo->btype]; |
@@ -1609,7 +1563,7 @@ static void init_vgachip(struct fb_info *info) | |||
1609 | break; | 1563 | break; |
1610 | 1564 | ||
1611 | default: | 1565 | default: |
1612 | printk(KERN_ERR "cirrusfb: Warning: Unknown board type\n"); | 1566 | dev_err(info->device, "Warning: Unknown board type\n"); |
1613 | break; | 1567 | break; |
1614 | } | 1568 | } |
1615 | 1569 | ||
@@ -1798,8 +1752,6 @@ static void init_vgachip(struct fb_info *info) | |||
1798 | 1752 | ||
1799 | /* misc... */ | 1753 | /* misc... */ |
1800 | WHDR(cinfo, 0); /* Hidden DAC register: - */ | 1754 | WHDR(cinfo, 0); /* Hidden DAC register: - */ |
1801 | |||
1802 | DPRINTK("EXIT\n"); | ||
1803 | return; | 1755 | return; |
1804 | } | 1756 | } |
1805 | 1757 | ||
@@ -1808,8 +1760,6 @@ static void switch_monitor(struct cirrusfb_info *cinfo, int on) | |||
1808 | #ifdef CONFIG_ZORRO /* only works on Zorro boards */ | 1760 | #ifdef CONFIG_ZORRO /* only works on Zorro boards */ |
1809 | static int IsOn = 0; /* XXX not ok for multiple boards */ | 1761 | static int IsOn = 0; /* XXX not ok for multiple boards */ |
1810 | 1762 | ||
1811 | DPRINTK("ENTER\n"); | ||
1812 | |||
1813 | if (cinfo->btype == BT_PICASSO4) | 1763 | if (cinfo->btype == BT_PICASSO4) |
1814 | return; /* nothing to switch */ | 1764 | return; /* nothing to switch */ |
1815 | if (cinfo->btype == BT_ALPINE) | 1765 | if (cinfo->btype == BT_ALPINE) |
@@ -1819,8 +1769,6 @@ static void switch_monitor(struct cirrusfb_info *cinfo, int on) | |||
1819 | if (cinfo->btype == BT_PICASSO) { | 1769 | if (cinfo->btype == BT_PICASSO) { |
1820 | if ((on && !IsOn) || (!on && IsOn)) | 1770 | if ((on && !IsOn) || (!on && IsOn)) |
1821 | WSFR(cinfo, 0xff); | 1771 | WSFR(cinfo, 0xff); |
1822 | |||
1823 | DPRINTK("EXIT\n"); | ||
1824 | return; | 1772 | return; |
1825 | } | 1773 | } |
1826 | if (on) { | 1774 | if (on) { |
@@ -1847,11 +1795,10 @@ static void switch_monitor(struct cirrusfb_info *cinfo, int on) | |||
1847 | case BT_SPECTRUM: | 1795 | case BT_SPECTRUM: |
1848 | WSFR(cinfo, 0x4f); | 1796 | WSFR(cinfo, 0x4f); |
1849 | break; | 1797 | break; |
1850 | default: /* do nothing */ break; | 1798 | default: /* do nothing */ |
1799 | break; | ||
1851 | } | 1800 | } |
1852 | } | 1801 | } |
1853 | |||
1854 | DPRINTK("EXIT\n"); | ||
1855 | #endif /* CONFIG_ZORRO */ | 1802 | #endif /* CONFIG_ZORRO */ |
1856 | } | 1803 | } |
1857 | 1804 | ||
@@ -1953,12 +1900,8 @@ static void cirrusfb_imageblit(struct fb_info *info, | |||
1953 | #define PREP_IO_BASE ((volatile unsigned char *) 0x80000000) | 1900 | #define PREP_IO_BASE ((volatile unsigned char *) 0x80000000) |
1954 | static void get_prep_addrs(unsigned long *display, unsigned long *registers) | 1901 | static void get_prep_addrs(unsigned long *display, unsigned long *registers) |
1955 | { | 1902 | { |
1956 | DPRINTK("ENTER\n"); | ||
1957 | |||
1958 | *display = PREP_VIDEO_BASE; | 1903 | *display = PREP_VIDEO_BASE; |
1959 | *registers = (unsigned long) PREP_IO_BASE; | 1904 | *registers = (unsigned long) PREP_IO_BASE; |
1960 | |||
1961 | DPRINTK("EXIT\n"); | ||
1962 | } | 1905 | } |
1963 | 1906 | ||
1964 | #endif /* CONFIG_PPC_PREP */ | 1907 | #endif /* CONFIG_PPC_PREP */ |
@@ -1970,13 +1913,12 @@ static int release_io_ports; | |||
1970 | * based on the DRAM bandwidth bit and DRAM bank switching bit. This | 1913 | * based on the DRAM bandwidth bit and DRAM bank switching bit. This |
1971 | * works with 1MB, 2MB and 4MB configurations (which the Motorola boards | 1914 | * works with 1MB, 2MB and 4MB configurations (which the Motorola boards |
1972 | * seem to have. */ | 1915 | * seem to have. */ |
1973 | static unsigned int __devinit cirrusfb_get_memsize(u8 __iomem *regbase) | 1916 | static unsigned int __devinit cirrusfb_get_memsize(struct fb_info *info, |
1917 | u8 __iomem *regbase) | ||
1974 | { | 1918 | { |
1975 | unsigned long mem; | 1919 | unsigned long mem; |
1976 | unsigned char SRF; | 1920 | unsigned char SRF; |
1977 | 1921 | ||
1978 | DPRINTK("ENTER\n"); | ||
1979 | |||
1980 | SRF = vga_rseq(regbase, CL_SEQRF); | 1922 | SRF = vga_rseq(regbase, CL_SEQRF); |
1981 | switch ((SRF & 0x18)) { | 1923 | switch ((SRF & 0x18)) { |
1982 | case 0x08: | 1924 | case 0x08: |
@@ -1992,7 +1934,7 @@ static unsigned int __devinit cirrusfb_get_memsize(u8 __iomem *regbase) | |||
1992 | mem = 2048 * 1024; | 1934 | mem = 2048 * 1024; |
1993 | break; | 1935 | break; |
1994 | default: | 1936 | default: |
1995 | printk(KERN_WARNING "CLgenfb: Unknown memory size!\n"); | 1937 | dev_warn(info->device, "CLgenfb: Unknown memory size!\n"); |
1996 | mem = 1024 * 1024; | 1938 | mem = 1024 * 1024; |
1997 | } | 1939 | } |
1998 | if (SRF & 0x80) | 1940 | if (SRF & 0x80) |
@@ -2002,8 +1944,6 @@ static unsigned int __devinit cirrusfb_get_memsize(u8 __iomem *regbase) | |||
2002 | mem *= 2; | 1944 | mem *= 2; |
2003 | 1945 | ||
2004 | /* TODO: Handling of GD5446/5480 (see XF86 sources ...) */ | 1946 | /* TODO: Handling of GD5446/5480 (see XF86 sources ...) */ |
2005 | |||
2006 | DPRINTK("EXIT\n"); | ||
2007 | return mem; | 1947 | return mem; |
2008 | } | 1948 | } |
2009 | 1949 | ||
@@ -2014,8 +1954,6 @@ static void get_pci_addrs(const struct pci_dev *pdev, | |||
2014 | assert(display != NULL); | 1954 | assert(display != NULL); |
2015 | assert(registers != NULL); | 1955 | assert(registers != NULL); |
2016 | 1956 | ||
2017 | DPRINTK("ENTER\n"); | ||
2018 | |||
2019 | *display = 0; | 1957 | *display = 0; |
2020 | *registers = 0; | 1958 | *registers = 0; |
2021 | 1959 | ||
@@ -2030,8 +1968,6 @@ static void get_pci_addrs(const struct pci_dev *pdev, | |||
2030 | } | 1968 | } |
2031 | 1969 | ||
2032 | assert(*display != 0); | 1970 | assert(*display != 0); |
2033 | |||
2034 | DPRINTK("EXIT\n"); | ||
2035 | } | 1971 | } |
2036 | 1972 | ||
2037 | static void cirrusfb_pci_unmap(struct fb_info *info) | 1973 | static void cirrusfb_pci_unmap(struct fb_info *info) |
@@ -2117,11 +2053,6 @@ static int __devinit cirrusfb_register(struct fb_info *info) | |||
2117 | int err; | 2053 | int err; |
2118 | enum cirrus_board btype; | 2054 | enum cirrus_board btype; |
2119 | 2055 | ||
2120 | DPRINTK("ENTER\n"); | ||
2121 | |||
2122 | printk(KERN_INFO "cirrusfb: Driver for Cirrus Logic based " | ||
2123 | "graphic boards, v" CIRRUSFB_VERSION "\n"); | ||
2124 | |||
2125 | btype = cinfo->btype; | 2056 | btype = cinfo->btype; |
2126 | 2057 | ||
2127 | /* sanity checks */ | 2058 | /* sanity checks */ |
@@ -2130,11 +2061,11 @@ static int __devinit cirrusfb_register(struct fb_info *info) | |||
2130 | /* set all the vital stuff */ | 2061 | /* set all the vital stuff */ |
2131 | cirrusfb_set_fbinfo(info); | 2062 | cirrusfb_set_fbinfo(info); |
2132 | 2063 | ||
2133 | DPRINTK("cirrusfb: (RAM start set to: 0x%p)\n", info->screen_base); | 2064 | dev_dbg(info->device, "(RAM start set to: 0x%p)\n", info->screen_base); |
2134 | 2065 | ||
2135 | err = fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL, 8); | 2066 | err = fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL, 8); |
2136 | if (!err) { | 2067 | if (!err) { |
2137 | DPRINTK("wrong initial video mode\n"); | 2068 | dev_dbg(info->device, "wrong initial video mode\n"); |
2138 | err = -EINVAL; | 2069 | err = -EINVAL; |
2139 | goto err_dealloc_cmap; | 2070 | goto err_dealloc_cmap; |
2140 | } | 2071 | } |
@@ -2144,18 +2075,18 @@ static int __devinit cirrusfb_register(struct fb_info *info) | |||
2144 | err = cirrusfb_decode_var(&info->var, &cinfo->currentmode, info); | 2075 | err = cirrusfb_decode_var(&info->var, &cinfo->currentmode, info); |
2145 | if (err < 0) { | 2076 | if (err < 0) { |
2146 | /* should never happen */ | 2077 | /* should never happen */ |
2147 | DPRINTK("choking on default var... umm, no good.\n"); | 2078 | dev_dbg(info->device, |
2079 | "choking on default var... umm, no good.\n"); | ||
2148 | goto err_dealloc_cmap; | 2080 | goto err_dealloc_cmap; |
2149 | } | 2081 | } |
2150 | 2082 | ||
2151 | err = register_framebuffer(info); | 2083 | err = register_framebuffer(info); |
2152 | if (err < 0) { | 2084 | if (err < 0) { |
2153 | printk(KERN_ERR "cirrusfb: could not register " | 2085 | dev_err(info->device, |
2154 | "fb device; err = %d!\n", err); | 2086 | "could not register fb device; err = %d!\n", err); |
2155 | goto err_dealloc_cmap; | 2087 | goto err_dealloc_cmap; |
2156 | } | 2088 | } |
2157 | 2089 | ||
2158 | DPRINTK("EXIT, returning 0\n"); | ||
2159 | return 0; | 2090 | return 0; |
2160 | 2091 | ||
2161 | err_dealloc_cmap: | 2092 | err_dealloc_cmap: |
@@ -2168,17 +2099,13 @@ err_dealloc_cmap: | |||
2168 | static void __devexit cirrusfb_cleanup(struct fb_info *info) | 2099 | static void __devexit cirrusfb_cleanup(struct fb_info *info) |
2169 | { | 2100 | { |
2170 | struct cirrusfb_info *cinfo = info->par; | 2101 | struct cirrusfb_info *cinfo = info->par; |
2171 | DPRINTK("ENTER\n"); | ||
2172 | 2102 | ||
2173 | switch_monitor(cinfo, 0); | 2103 | switch_monitor(cinfo, 0); |
2174 | |||
2175 | unregister_framebuffer(info); | 2104 | unregister_framebuffer(info); |
2176 | fb_dealloc_cmap(&info->cmap); | 2105 | fb_dealloc_cmap(&info->cmap); |
2177 | printk("Framebuffer unregistered\n"); | 2106 | dev_dbg(info->device, "Framebuffer unregistered\n"); |
2178 | cinfo->unmap(info); | 2107 | cinfo->unmap(info); |
2179 | framebuffer_release(info); | 2108 | framebuffer_release(info); |
2180 | |||
2181 | DPRINTK("EXIT\n"); | ||
2182 | } | 2109 | } |
2183 | 2110 | ||
2184 | #ifdef CONFIG_PCI | 2111 | #ifdef CONFIG_PCI |
@@ -2207,9 +2134,11 @@ static int __devinit cirrusfb_pci_register(struct pci_dev *pdev, | |||
2207 | cinfo = info->par; | 2134 | cinfo = info->par; |
2208 | cinfo->btype = btype = (enum cirrus_board) ent->driver_data; | 2135 | cinfo->btype = btype = (enum cirrus_board) ent->driver_data; |
2209 | 2136 | ||
2210 | DPRINTK(" Found PCI device, base address 0 is 0x%x, btype set to %d\n", | 2137 | dev_dbg(info->device, |
2211 | pdev->resource[0].start, btype); | 2138 | " Found PCI device, base address 0 is 0x%Lx, btype set to %d\n", |
2212 | DPRINTK(" base address 1 is 0x%x\n", pdev->resource[1].start); | 2139 | (unsigned long long)pdev->resource[0].start, btype); |
2140 | dev_dbg(info->device, " base address 1 is 0x%Lx\n", | ||
2141 | (unsigned long long)pdev->resource[1].start); | ||
2213 | 2142 | ||
2214 | if (isPReP) { | 2143 | if (isPReP) { |
2215 | pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, 0x00000000); | 2144 | pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, 0x00000000); |
@@ -2219,30 +2148,29 @@ static int __devinit cirrusfb_pci_register(struct pci_dev *pdev, | |||
2219 | /* PReP dies if we ioremap the IO registers, but it works w/out... */ | 2148 | /* PReP dies if we ioremap the IO registers, but it works w/out... */ |
2220 | cinfo->regbase = (char __iomem *) info->fix.mmio_start; | 2149 | cinfo->regbase = (char __iomem *) info->fix.mmio_start; |
2221 | } else { | 2150 | } else { |
2222 | DPRINTK("Attempt to get PCI info for Cirrus Graphics Card\n"); | 2151 | dev_dbg(info->device, |
2152 | "Attempt to get PCI info for Cirrus Graphics Card\n"); | ||
2223 | get_pci_addrs(pdev, &board_addr, &info->fix.mmio_start); | 2153 | get_pci_addrs(pdev, &board_addr, &info->fix.mmio_start); |
2224 | /* FIXME: this forces VGA. alternatives? */ | 2154 | /* FIXME: this forces VGA. alternatives? */ |
2225 | cinfo->regbase = NULL; | 2155 | cinfo->regbase = NULL; |
2226 | } | 2156 | } |
2227 | 2157 | ||
2228 | DPRINTK("Board address: 0x%lx, register address: 0x%lx\n", | 2158 | dev_dbg(info->device, "Board address: 0x%lx, register address: 0x%lx\n", |
2229 | board_addr, info->fix.mmio_start); | 2159 | board_addr, info->fix.mmio_start); |
2230 | 2160 | ||
2231 | board_size = (btype == BT_GD5480) ? | 2161 | board_size = (btype == BT_GD5480) ? |
2232 | 32 * MB_ : cirrusfb_get_memsize(cinfo->regbase); | 2162 | 32 * MB_ : cirrusfb_get_memsize(info, cinfo->regbase); |
2233 | 2163 | ||
2234 | ret = pci_request_regions(pdev, "cirrusfb"); | 2164 | ret = pci_request_regions(pdev, "cirrusfb"); |
2235 | if (ret < 0) { | 2165 | if (ret < 0) { |
2236 | printk(KERN_ERR "cirrusfb: cannot reserve region 0x%lx, " | 2166 | dev_err(info->device, "cannot reserve region 0x%lx, abort\n", |
2237 | "abort\n", | 2167 | board_addr); |
2238 | board_addr); | ||
2239 | goto err_release_fb; | 2168 | goto err_release_fb; |
2240 | } | 2169 | } |
2241 | #if 0 /* if the system didn't claim this region, we would... */ | 2170 | #if 0 /* if the system didn't claim this region, we would... */ |
2242 | if (!request_mem_region(0xA0000, 65535, "cirrusfb")) { | 2171 | if (!request_mem_region(0xA0000, 65535, "cirrusfb")) { |
2243 | printk(KERN_ERR "cirrusfb: cannot reserve region 0x%lx, abort\n" | 2172 | dev_err(info->device, "cannot reserve region 0x%lx, abort\n", |
2244 | , | 2173 | 0xA0000L); |
2245 | 0xA0000L); | ||
2246 | ret = -EBUSY; | 2174 | ret = -EBUSY; |
2247 | goto err_release_regions; | 2175 | goto err_release_regions; |
2248 | } | 2176 | } |
@@ -2260,9 +2188,9 @@ static int __devinit cirrusfb_pci_register(struct pci_dev *pdev, | |||
2260 | info->screen_size = board_size; | 2188 | info->screen_size = board_size; |
2261 | cinfo->unmap = cirrusfb_pci_unmap; | 2189 | cinfo->unmap = cirrusfb_pci_unmap; |
2262 | 2190 | ||
2263 | printk(KERN_INFO "RAM (%lu kB) at 0x%lx, Cirrus " | 2191 | dev_info(info->device, |
2264 | "Logic chipset on PCI bus\n", | 2192 | "Cirrus Logic chipset on PCI bus, RAM (%lu kB) at 0x%lx\n", |
2265 | info->screen_size >> 10, board_addr); | 2193 | info->screen_size >> 10, board_addr); |
2266 | pci_set_drvdata(pdev, info); | 2194 | pci_set_drvdata(pdev, info); |
2267 | 2195 | ||
2268 | ret = cirrusfb_register(info); | 2196 | ret = cirrusfb_register(info); |
@@ -2288,11 +2216,8 @@ err_out: | |||
2288 | static void __devexit cirrusfb_pci_unregister(struct pci_dev *pdev) | 2216 | static void __devexit cirrusfb_pci_unregister(struct pci_dev *pdev) |
2289 | { | 2217 | { |
2290 | struct fb_info *info = pci_get_drvdata(pdev); | 2218 | struct fb_info *info = pci_get_drvdata(pdev); |
2291 | DPRINTK("ENTER\n"); | ||
2292 | 2219 | ||
2293 | cirrusfb_cleanup(info); | 2220 | cirrusfb_cleanup(info); |
2294 | |||
2295 | DPRINTK("EXIT\n"); | ||
2296 | } | 2221 | } |
2297 | 2222 | ||
2298 | static struct pci_driver cirrusfb_pci_driver = { | 2223 | static struct pci_driver cirrusfb_pci_driver = { |
@@ -2324,8 +2249,6 @@ static int __devinit cirrusfb_zorro_register(struct zorro_dev *z, | |||
2324 | if (cirrusfb_zorro_table2[btype].id2) | 2249 | if (cirrusfb_zorro_table2[btype].id2) |
2325 | z2 = zorro_find_device(cirrusfb_zorro_table2[btype].id2, NULL); | 2250 | z2 = zorro_find_device(cirrusfb_zorro_table2[btype].id2, NULL); |
2326 | size = cirrusfb_zorro_table2[btype].size; | 2251 | size = cirrusfb_zorro_table2[btype].size; |
2327 | printk(KERN_INFO "cirrusfb: %s board detected; ", | ||
2328 | cirrusfb_board_info[btype].name); | ||
2329 | 2252 | ||
2330 | info = framebuffer_alloc(sizeof(struct cirrusfb_info), &z->dev); | 2253 | info = framebuffer_alloc(sizeof(struct cirrusfb_info), &z->dev); |
2331 | if (!info) { | 2254 | if (!info) { |
@@ -2334,6 +2257,9 @@ static int __devinit cirrusfb_zorro_register(struct zorro_dev *z, | |||
2334 | goto err_out; | 2257 | goto err_out; |
2335 | } | 2258 | } |
2336 | 2259 | ||
2260 | dev_info(info->device, "%s board detected\n", | ||
2261 | cirrusfb_board_info[btype].name); | ||
2262 | |||
2337 | cinfo = info->par; | 2263 | cinfo = info->par; |
2338 | cinfo->btype = btype; | 2264 | cinfo->btype = btype; |
2339 | 2265 | ||
@@ -2345,19 +2271,16 @@ static int __devinit cirrusfb_zorro_register(struct zorro_dev *z, | |||
2345 | info->screen_size = size; | 2271 | info->screen_size = size; |
2346 | 2272 | ||
2347 | if (!zorro_request_device(z, "cirrusfb")) { | 2273 | if (!zorro_request_device(z, "cirrusfb")) { |
2348 | printk(KERN_ERR "cirrusfb: cannot reserve region 0x%lx, " | 2274 | dev_err(info->device, "cannot reserve region 0x%lx, abort\n", |
2349 | "abort\n", | 2275 | board_addr); |
2350 | board_addr); | ||
2351 | ret = -EBUSY; | 2276 | ret = -EBUSY; |
2352 | goto err_release_fb; | 2277 | goto err_release_fb; |
2353 | } | 2278 | } |
2354 | 2279 | ||
2355 | printk(" RAM (%lu MB) at $%lx, ", board_size / MB_, board_addr); | ||
2356 | |||
2357 | ret = -EIO; | 2280 | ret = -EIO; |
2358 | 2281 | ||
2359 | if (btype == BT_PICASSO4) { | 2282 | if (btype == BT_PICASSO4) { |
2360 | printk(KERN_INFO " REG at $%lx\n", board_addr + 0x600000); | 2283 | dev_info(info->device, " REG at $%lx\n", board_addr + 0x600000); |
2361 | 2284 | ||
2362 | /* To be precise, for the P4 this is not the */ | 2285 | /* To be precise, for the P4 this is not the */ |
2363 | /* begin of the board, but the begin of RAM. */ | 2286 | /* begin of the board, but the begin of RAM. */ |
@@ -2367,7 +2290,7 @@ static int __devinit cirrusfb_zorro_register(struct zorro_dev *z, | |||
2367 | if (!cinfo->regbase) | 2290 | if (!cinfo->regbase) |
2368 | goto err_release_region; | 2291 | goto err_release_region; |
2369 | 2292 | ||
2370 | DPRINTK("cirrusfb: Virtual address for board set to: $%p\n", | 2293 | dev_dbg(info->device, "Virtual address for board set to: $%p\n", |
2371 | cinfo->regbase); | 2294 | cinfo->regbase); |
2372 | cinfo->regbase += 0x600000; | 2295 | cinfo->regbase += 0x600000; |
2373 | info->fix.mmio_start = board_addr + 0x600000; | 2296 | info->fix.mmio_start = board_addr + 0x600000; |
@@ -2377,8 +2300,8 @@ static int __devinit cirrusfb_zorro_register(struct zorro_dev *z, | |||
2377 | if (!info->screen_base) | 2300 | if (!info->screen_base) |
2378 | goto err_unmap_regbase; | 2301 | goto err_unmap_regbase; |
2379 | } else { | 2302 | } else { |
2380 | printk(KERN_INFO " REG at $%lx\n", | 2303 | dev_info(info->device, " REG at $%lx\n", |
2381 | (unsigned long) z2->resource.start); | 2304 | (unsigned long) z2->resource.start); |
2382 | 2305 | ||
2383 | info->fix.smem_start = board_addr; | 2306 | info->fix.smem_start = board_addr; |
2384 | if (board_addr > 0x01000000) | 2307 | if (board_addr > 0x01000000) |
@@ -2392,12 +2315,15 @@ static int __devinit cirrusfb_zorro_register(struct zorro_dev *z, | |||
2392 | cinfo->regbase = (caddr_t) ZTWO_VADDR(z2->resource.start); | 2315 | cinfo->regbase = (caddr_t) ZTWO_VADDR(z2->resource.start); |
2393 | info->fix.mmio_start = z2->resource.start; | 2316 | info->fix.mmio_start = z2->resource.start; |
2394 | 2317 | ||
2395 | DPRINTK("cirrusfb: Virtual address for board set to: $%p\n", | 2318 | dev_dbg(info->device, "Virtual address for board set to: $%p\n", |
2396 | cinfo->regbase); | 2319 | cinfo->regbase); |
2397 | } | 2320 | } |
2398 | cinfo->unmap = cirrusfb_zorro_unmap; | 2321 | cinfo->unmap = cirrusfb_zorro_unmap; |
2399 | 2322 | ||
2400 | printk(KERN_INFO "Cirrus Logic chipset on Zorro bus\n"); | 2323 | dev_info(info->device, |
2324 | "Cirrus Logic chipset on Zorro bus, RAM (%lu MB) at $%lx\n", | ||
2325 | board_size / MB_, board_addr); | ||
2326 | |||
2401 | zorro_set_drvdata(z, info); | 2327 | zorro_set_drvdata(z, info); |
2402 | 2328 | ||
2403 | ret = cirrusfb_register(info); | 2329 | ret = cirrusfb_register(info); |
@@ -2424,11 +2350,8 @@ err_out: | |||
2424 | void __devexit cirrusfb_zorro_unregister(struct zorro_dev *z) | 2350 | void __devexit cirrusfb_zorro_unregister(struct zorro_dev *z) |
2425 | { | 2351 | { |
2426 | struct fb_info *info = zorro_get_drvdata(z); | 2352 | struct fb_info *info = zorro_get_drvdata(z); |
2427 | DPRINTK("ENTER\n"); | ||
2428 | 2353 | ||
2429 | cirrusfb_cleanup(info); | 2354 | cirrusfb_cleanup(info); |
2430 | |||
2431 | DPRINTK("EXIT\n"); | ||
2432 | } | 2355 | } |
2433 | 2356 | ||
2434 | static struct zorro_driver cirrusfb_zorro_driver = { | 2357 | static struct zorro_driver cirrusfb_zorro_driver = { |
@@ -2461,11 +2384,10 @@ static int __init cirrusfb_init(void) | |||
2461 | } | 2384 | } |
2462 | 2385 | ||
2463 | #ifndef MODULE | 2386 | #ifndef MODULE |
2464 | static int __init cirrusfb_setup(char *options) { | 2387 | static int __init cirrusfb_setup(char *options) |
2388 | { | ||
2465 | char *this_opt; | 2389 | char *this_opt; |
2466 | 2390 | ||
2467 | DPRINTK("ENTER\n"); | ||
2468 | |||
2469 | if (!options || !*options) | 2391 | if (!options || !*options) |
2470 | return 0; | 2392 | return 0; |
2471 | 2393 | ||
@@ -2473,8 +2395,6 @@ static int __init cirrusfb_setup(char *options) { | |||
2473 | if (!*this_opt) | 2395 | if (!*this_opt) |
2474 | continue; | 2396 | continue; |
2475 | 2397 | ||
2476 | DPRINTK("cirrusfb_setup: option '%s'\n", this_opt); | ||
2477 | |||
2478 | if (!strcmp(this_opt, "noaccel")) | 2398 | if (!strcmp(this_opt, "noaccel")) |
2479 | noaccel = 1; | 2399 | noaccel = 1; |
2480 | else if (!strncmp(this_opt, "mode:", 5)) | 2400 | else if (!strncmp(this_opt, "mode:", 5)) |
@@ -2560,8 +2480,6 @@ static void AttrOn(const struct cirrusfb_info *cinfo) | |||
2560 | { | 2480 | { |
2561 | assert(cinfo != NULL); | 2481 | assert(cinfo != NULL); |
2562 | 2482 | ||
2563 | DPRINTK("ENTER\n"); | ||
2564 | |||
2565 | if (vga_rcrt(cinfo->regbase, CL_CRT24) & 0x80) { | 2483 | if (vga_rcrt(cinfo->regbase, CL_CRT24) & 0x80) { |
2566 | /* if we're just in "write value" mode, write back the */ | 2484 | /* if we're just in "write value" mode, write back the */ |
2567 | /* same value as before to not modify anything */ | 2485 | /* same value as before to not modify anything */ |
@@ -2574,8 +2492,6 @@ static void AttrOn(const struct cirrusfb_info *cinfo) | |||
2574 | 2492 | ||
2575 | /* dummy write on Reg0 to be on "write index" mode next time */ | 2493 | /* dummy write on Reg0 to be on "write index" mode next time */ |
2576 | vga_w(cinfo->regbase, VGA_ATT_IW, 0x00); | 2494 | vga_w(cinfo->regbase, VGA_ATT_IW, 0x00); |
2577 | |||
2578 | DPRINTK("EXIT\n"); | ||
2579 | } | 2495 | } |
2580 | 2496 | ||
2581 | /*** WHDR() - write into the Hidden DAC register ***/ | 2497 | /*** WHDR() - write into the Hidden DAC register ***/ |
@@ -2723,8 +2639,6 @@ static void cirrusfb_BitBLT(u8 __iomem *regbase, int bits_per_pixel, | |||
2723 | u_long nsrc, ndest; | 2639 | u_long nsrc, ndest; |
2724 | u_char bltmode; | 2640 | u_char bltmode; |
2725 | 2641 | ||
2726 | DPRINTK("ENTER\n"); | ||
2727 | |||
2728 | nwidth = width - 1; | 2642 | nwidth = width - 1; |
2729 | nheight = height - 1; | 2643 | nheight = height - 1; |
2730 | 2644 | ||
@@ -2813,8 +2727,6 @@ static void cirrusfb_BitBLT(u8 __iomem *regbase, int bits_per_pixel, | |||
2813 | 2727 | ||
2814 | /* and finally: GO! */ | 2728 | /* and finally: GO! */ |
2815 | vga_wgfx(regbase, CL_GR31, 0x02); /* BLT Start/status */ | 2729 | vga_wgfx(regbase, CL_GR31, 0x02); /* BLT Start/status */ |
2816 | |||
2817 | DPRINTK("EXIT\n"); | ||
2818 | } | 2730 | } |
2819 | 2731 | ||
2820 | /******************************************************************* | 2732 | /******************************************************************* |
@@ -2831,8 +2743,6 @@ static void cirrusfb_RectFill(u8 __iomem *regbase, int bits_per_pixel, | |||
2831 | u_long ndest; | 2743 | u_long ndest; |
2832 | u_char op; | 2744 | u_char op; |
2833 | 2745 | ||
2834 | DPRINTK("ENTER\n"); | ||
2835 | |||
2836 | nwidth = width - 1; | 2746 | nwidth = width - 1; |
2837 | nheight = height - 1; | 2747 | nheight = height - 1; |
2838 | 2748 | ||
@@ -2896,8 +2806,6 @@ static void cirrusfb_RectFill(u8 __iomem *regbase, int bits_per_pixel, | |||
2896 | 2806 | ||
2897 | /* and finally: GO! */ | 2807 | /* and finally: GO! */ |
2898 | vga_wgfx(regbase, CL_GR31, 0x02); /* BLT Start/status */ | 2808 | vga_wgfx(regbase, CL_GR31, 0x02); /* BLT Start/status */ |
2899 | |||
2900 | DPRINTK("EXIT\n"); | ||
2901 | } | 2809 | } |
2902 | 2810 | ||
2903 | /************************************************************************** | 2811 | /************************************************************************** |
@@ -2917,8 +2825,6 @@ static void bestclock(long freq, int *nom, int *den, int *div) | |||
2917 | *den = 0; | 2825 | *den = 0; |
2918 | *div = 0; | 2826 | *div = 0; |
2919 | 2827 | ||
2920 | DPRINTK("ENTER\n"); | ||
2921 | |||
2922 | if (freq < 8000) | 2828 | if (freq < 8000) |
2923 | freq = 8000; | 2829 | freq = 8000; |
2924 | 2830 | ||
@@ -2960,12 +2866,6 @@ static void bestclock(long freq, int *nom, int *den, int *div) | |||
2960 | } | 2866 | } |
2961 | } | 2867 | } |
2962 | } | 2868 | } |
2963 | |||
2964 | DPRINTK("Best possible values for given frequency:\n"); | ||
2965 | DPRINTK(" freq: %ld kHz nom: %d den: %d div: %d\n", | ||
2966 | freq, *nom, *den, *div); | ||
2967 | |||
2968 | DPRINTK("EXIT\n"); | ||
2969 | } | 2869 | } |
2970 | 2870 | ||
2971 | /* ------------------------------------------------------------------------- | 2871 | /* ------------------------------------------------------------------------- |
@@ -2978,32 +2878,6 @@ static void bestclock(long freq, int *nom, int *den, int *div) | |||
2978 | #ifdef CIRRUSFB_DEBUG | 2878 | #ifdef CIRRUSFB_DEBUG |
2979 | 2879 | ||
2980 | /** | 2880 | /** |
2981 | * cirrusfb_dbg_print_byte | ||
2982 | * @name: name associated with byte value to be displayed | ||
2983 | * @val: byte value to be displayed | ||
2984 | * | ||
2985 | * DESCRIPTION: | ||
2986 | * Display an indented string, along with a hexidecimal byte value, and | ||
2987 | * its decoded bits. Bits 7 through 0 are listed in left-to-right | ||
2988 | * order. | ||
2989 | */ | ||
2990 | |||
2991 | static | ||
2992 | void cirrusfb_dbg_print_byte(const char *name, unsigned char val) | ||
2993 | { | ||
2994 | DPRINTK("%8s = 0x%02X (bits 7-0: %c%c%c%c%c%c%c%c)\n", | ||
2995 | name, val, | ||
2996 | val & 0x80 ? '1' : '0', | ||
2997 | val & 0x40 ? '1' : '0', | ||
2998 | val & 0x20 ? '1' : '0', | ||
2999 | val & 0x10 ? '1' : '0', | ||
3000 | val & 0x08 ? '1' : '0', | ||
3001 | val & 0x04 ? '1' : '0', | ||
3002 | val & 0x02 ? '1' : '0', | ||
3003 | val & 0x01 ? '1' : '0'); | ||
3004 | } | ||
3005 | |||
3006 | /** | ||
3007 | * cirrusfb_dbg_print_regs | 2881 | * cirrusfb_dbg_print_regs |
3008 | * @base: If using newmmio, the newmmio base address, otherwise %NULL | 2882 | * @base: If using newmmio, the newmmio base address, otherwise %NULL |
3009 | * @reg_class: type of registers to read: %CRT, or %SEQ | 2883 | * @reg_class: type of registers to read: %CRT, or %SEQ |
@@ -3014,9 +2888,9 @@ void cirrusfb_dbg_print_byte(const char *name, unsigned char val) | |||
3014 | * used at the given @base address to query the information. | 2888 | * used at the given @base address to query the information. |
3015 | */ | 2889 | */ |
3016 | 2890 | ||
3017 | static | 2891 | static void cirrusfb_dbg_print_regs(struct fb_info *info, |
3018 | void cirrusfb_dbg_print_regs(caddr_t regbase, | 2892 | caddr_t regbase, |
3019 | enum cirrusfb_dbg_reg_class reg_class, ...) | 2893 | enum cirrusfb_dbg_reg_class reg_class, ...) |
3020 | { | 2894 | { |
3021 | va_list list; | 2895 | va_list list; |
3022 | unsigned char val = 0; | 2896 | unsigned char val = 0; |
@@ -3042,7 +2916,7 @@ void cirrusfb_dbg_print_regs(caddr_t regbase, | |||
3042 | break; | 2916 | break; |
3043 | } | 2917 | } |
3044 | 2918 | ||
3045 | cirrusfb_dbg_print_byte(name, val); | 2919 | dev_dbg(info->device, "%8s = 0x%02X\n", name, val); |
3046 | 2920 | ||
3047 | name = va_arg(list, char *); | 2921 | name = va_arg(list, char *); |
3048 | } | 2922 | } |
@@ -3051,18 +2925,6 @@ void cirrusfb_dbg_print_regs(caddr_t regbase, | |||
3051 | } | 2925 | } |
3052 | 2926 | ||
3053 | /** | 2927 | /** |
3054 | * cirrusfb_dump | ||
3055 | * @cirrusfbinfo: | ||
3056 | * | ||
3057 | * DESCRIPTION: | ||
3058 | */ | ||
3059 | |||
3060 | static void cirrusfb_dump(void) | ||
3061 | { | ||
3062 | cirrusfb_dbg_reg_dump(NULL); | ||
3063 | } | ||
3064 | |||
3065 | /** | ||
3066 | * cirrusfb_dbg_reg_dump | 2928 | * cirrusfb_dbg_reg_dump |
3067 | * @base: If using newmmio, the newmmio base address, otherwise %NULL | 2929 | * @base: If using newmmio, the newmmio base address, otherwise %NULL |
3068 | * | 2930 | * |
@@ -3072,12 +2934,11 @@ static void cirrusfb_dump(void) | |||
3072 | * used at the given @base address to query the information. | 2934 | * used at the given @base address to query the information. |
3073 | */ | 2935 | */ |
3074 | 2936 | ||
3075 | static | 2937 | static void cirrusfb_dbg_reg_dump(struct fb_info *info, caddr_t regbase) |
3076 | void cirrusfb_dbg_reg_dump(caddr_t regbase) | ||
3077 | { | 2938 | { |
3078 | DPRINTK("CIRRUSFB VGA CRTC register dump:\n"); | 2939 | dev_dbg(info->device, "VGA CRTC register dump:\n"); |
3079 | 2940 | ||
3080 | cirrusfb_dbg_print_regs(regbase, CRT, | 2941 | cirrusfb_dbg_print_regs(info, regbase, CRT, |
3081 | "CR00", 0x00, | 2942 | "CR00", 0x00, |
3082 | "CR01", 0x01, | 2943 | "CR01", 0x01, |
3083 | "CR02", 0x02, | 2944 | "CR02", 0x02, |
@@ -3127,11 +2988,11 @@ void cirrusfb_dbg_reg_dump(caddr_t regbase) | |||
3127 | "CR3F", 0x3F, | 2988 | "CR3F", 0x3F, |
3128 | NULL); | 2989 | NULL); |
3129 | 2990 | ||
3130 | DPRINTK("\n"); | 2991 | dev_dbg(info->device, "\n"); |
3131 | 2992 | ||
3132 | DPRINTK("CIRRUSFB VGA SEQ register dump:\n"); | 2993 | dev_dbg(info->device, "VGA SEQ register dump:\n"); |
3133 | 2994 | ||
3134 | cirrusfb_dbg_print_regs(regbase, SEQ, | 2995 | cirrusfb_dbg_print_regs(info, regbase, SEQ, |
3135 | "SR00", 0x00, | 2996 | "SR00", 0x00, |
3136 | "SR01", 0x01, | 2997 | "SR01", 0x01, |
3137 | "SR02", 0x02, | 2998 | "SR02", 0x02, |
@@ -3160,7 +3021,7 @@ void cirrusfb_dbg_reg_dump(caddr_t regbase) | |||
3160 | "SR1F", 0x1F, | 3021 | "SR1F", 0x1F, |
3161 | NULL); | 3022 | NULL); |
3162 | 3023 | ||
3163 | DPRINTK("\n"); | 3024 | dev_dbg(info->device, "\n"); |
3164 | } | 3025 | } |
3165 | 3026 | ||
3166 | #endif /* CIRRUSFB_DEBUG */ | 3027 | #endif /* CIRRUSFB_DEBUG */ |