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author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-18 19:59:10 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-18 19:59:10 -0400 |
commit | c3a0bd7515c682f4529a35318b6712c9ae456edc (patch) | |
tree | 0dea8aa7f0f1e5f37c4c67faaf3aeb18f4a04701 /drivers/video | |
parent | a41842f70d6d6b0cfde3d21e163add81c4318ebd (diff) | |
parent | 0d5e6f7ae8609b944c08e8a2f63f7d169c548134 (diff) |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (23 commits)
ARM: Fix RiscPC decompressor build errors
ARM: Fix sorting of platform group config options and includes
ARM: 5991/1: Fix regression in restore_user_regs macro
ARM: 5989/1: ARM: KGDB: add support for SMP platforms
ARM: 5990/1: ARM: use __armv5tej_mmu_cache_flush for V5TEJ instead of __armv4_mmu_cache_flush
ARM: Add final piece to fix XIP decompressor in read-only memory
video: enable sh_mobile_lcdc on SH-Mobile ARM
ARM: mach-shmobile: ap4evb SDHI0 platform data V2
ARM: mach-shmobile: sh7372 SDHI vector merge
ARM: mach-shmobile: sh7377 SDHI vector merge
ARM: mach-shmobile: sh7367 SDHI vector merge
ARM: mach-shmobile: G4EVM KEYSC platform data
mtd: enable sh_flctl on SH-Mobile ARM
ARM: mach-shmobile: G3EVM FLCTL platform data
ARM: mach-shmobile: G3EVM KEYSC platform data
Video: ARM CLCD: Better fix for swapped IENB and CNTL registers
ARM: Add L2 cache handling to smp boot support
ARM: 5960/1: ARM: perf-events: fix v7 event selection mask
ARM: 5959/1: ARM: perf-events: request PMU interrupts with IRQF_NOBALANCING
ARM: 5988/1: pgprot_dmacoherent() for non-mmu builds
...
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/Kconfig | 2 | ||||
-rw-r--r-- | drivers/video/amba-clcd.c | 31 |
2 files changed, 25 insertions, 8 deletions
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index feaff4f04b58..6e16244f3ed1 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig | |||
@@ -1881,7 +1881,7 @@ config FB_W100 | |||
1881 | 1881 | ||
1882 | config FB_SH_MOBILE_LCDC | 1882 | config FB_SH_MOBILE_LCDC |
1883 | tristate "SuperH Mobile LCDC framebuffer support" | 1883 | tristate "SuperH Mobile LCDC framebuffer support" |
1884 | depends on FB && SUPERH && HAVE_CLK | 1884 | depends on FB && (SUPERH || ARCH_SHMOBILE) && HAVE_CLK |
1885 | select FB_SYS_FILLRECT | 1885 | select FB_SYS_FILLRECT |
1886 | select FB_SYS_COPYAREA | 1886 | select FB_SYS_COPYAREA |
1887 | select FB_SYS_IMAGEBLIT | 1887 | select FB_SYS_IMAGEBLIT |
diff --git a/drivers/video/amba-clcd.c b/drivers/video/amba-clcd.c index a21efcd10b78..afe21e6eb544 100644 --- a/drivers/video/amba-clcd.c +++ b/drivers/video/amba-clcd.c | |||
@@ -65,16 +65,16 @@ static void clcdfb_disable(struct clcd_fb *fb) | |||
65 | if (fb->board->disable) | 65 | if (fb->board->disable) |
66 | fb->board->disable(fb); | 66 | fb->board->disable(fb); |
67 | 67 | ||
68 | val = readl(fb->regs + CLCD_CNTL); | 68 | val = readl(fb->regs + fb->off_cntl); |
69 | if (val & CNTL_LCDPWR) { | 69 | if (val & CNTL_LCDPWR) { |
70 | val &= ~CNTL_LCDPWR; | 70 | val &= ~CNTL_LCDPWR; |
71 | writel(val, fb->regs + CLCD_CNTL); | 71 | writel(val, fb->regs + fb->off_cntl); |
72 | 72 | ||
73 | clcdfb_sleep(20); | 73 | clcdfb_sleep(20); |
74 | } | 74 | } |
75 | if (val & CNTL_LCDEN) { | 75 | if (val & CNTL_LCDEN) { |
76 | val &= ~CNTL_LCDEN; | 76 | val &= ~CNTL_LCDEN; |
77 | writel(val, fb->regs + CLCD_CNTL); | 77 | writel(val, fb->regs + fb->off_cntl); |
78 | } | 78 | } |
79 | 79 | ||
80 | /* | 80 | /* |
@@ -94,7 +94,7 @@ static void clcdfb_enable(struct clcd_fb *fb, u32 cntl) | |||
94 | * Bring up by first enabling.. | 94 | * Bring up by first enabling.. |
95 | */ | 95 | */ |
96 | cntl |= CNTL_LCDEN; | 96 | cntl |= CNTL_LCDEN; |
97 | writel(cntl, fb->regs + CLCD_CNTL); | 97 | writel(cntl, fb->regs + fb->off_cntl); |
98 | 98 | ||
99 | clcdfb_sleep(20); | 99 | clcdfb_sleep(20); |
100 | 100 | ||
@@ -102,7 +102,7 @@ static void clcdfb_enable(struct clcd_fb *fb, u32 cntl) | |||
102 | * and now apply power. | 102 | * and now apply power. |
103 | */ | 103 | */ |
104 | cntl |= CNTL_LCDPWR; | 104 | cntl |= CNTL_LCDPWR; |
105 | writel(cntl, fb->regs + CLCD_CNTL); | 105 | writel(cntl, fb->regs + fb->off_cntl); |
106 | 106 | ||
107 | /* | 107 | /* |
108 | * finally, enable the interface. | 108 | * finally, enable the interface. |
@@ -233,7 +233,7 @@ static int clcdfb_set_par(struct fb_info *info) | |||
233 | readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1), | 233 | readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1), |
234 | readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3), | 234 | readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3), |
235 | readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS), | 235 | readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS), |
236 | readl(fb->regs + CLCD_IENB), readl(fb->regs + CLCD_CNTL)); | 236 | readl(fb->regs + fb->off_ienb), readl(fb->regs + fb->off_cntl)); |
237 | #endif | 237 | #endif |
238 | 238 | ||
239 | return 0; | 239 | return 0; |
@@ -345,6 +345,23 @@ static int clcdfb_register(struct clcd_fb *fb) | |||
345 | { | 345 | { |
346 | int ret; | 346 | int ret; |
347 | 347 | ||
348 | /* | ||
349 | * ARM PL111 always has IENB at 0x1c; it's only PL110 | ||
350 | * which is reversed on some platforms. | ||
351 | */ | ||
352 | if (amba_manf(fb->dev) == 0x41 && amba_part(fb->dev) == 0x111) { | ||
353 | fb->off_ienb = CLCD_PL111_IENB; | ||
354 | fb->off_cntl = CLCD_PL111_CNTL; | ||
355 | } else { | ||
356 | #ifdef CONFIG_ARCH_VERSATILE | ||
357 | fb->off_ienb = CLCD_PL111_IENB; | ||
358 | fb->off_cntl = CLCD_PL111_CNTL; | ||
359 | #else | ||
360 | fb->off_ienb = CLCD_PL110_IENB; | ||
361 | fb->off_cntl = CLCD_PL110_CNTL; | ||
362 | #endif | ||
363 | } | ||
364 | |||
348 | fb->clk = clk_get(&fb->dev->dev, NULL); | 365 | fb->clk = clk_get(&fb->dev->dev, NULL); |
349 | if (IS_ERR(fb->clk)) { | 366 | if (IS_ERR(fb->clk)) { |
350 | ret = PTR_ERR(fb->clk); | 367 | ret = PTR_ERR(fb->clk); |
@@ -416,7 +433,7 @@ static int clcdfb_register(struct clcd_fb *fb) | |||
416 | /* | 433 | /* |
417 | * Ensure interrupts are disabled. | 434 | * Ensure interrupts are disabled. |
418 | */ | 435 | */ |
419 | writel(0, fb->regs + CLCD_IENB); | 436 | writel(0, fb->regs + fb->off_ienb); |
420 | 437 | ||
421 | fb_set_var(&fb->fb, &fb->fb.var); | 438 | fb_set_var(&fb->fb, &fb->fb.var); |
422 | 439 | ||