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authorTomi Valkeinen <tomi.valkeinen@ti.com>2011-11-15 04:56:57 -0500
committerTomi Valkeinen <tomi.valkeinen@ti.com>2011-12-02 01:54:37 -0500
commitc10c6f042b6a5940c522a334a716d57b40f7dec9 (patch)
tree3bf0fe762e1d7e358422bad5bfbd143a876da8aa /drivers/video
parentf6a5e0871f22428a7c74c07ddd791197c5f5d38f (diff)
OMAPDSS: APPLY: rename overlay_cache_data
overlay_cache_data is not a suitable name for the struct. It is more of a private data for the overlay. Rename the struct to ovl_priv_data, and add a function, get_ovl_priv(ovl), to get a pointer to the data. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video')
-rw-r--r--drivers/video/omap2/dss/apply.c99
1 files changed, 53 insertions, 46 deletions
diff --git a/drivers/video/omap2/dss/apply.c b/drivers/video/omap2/dss/apply.c
index 82d122b209a3..c73742e3b43d 100644
--- a/drivers/video/omap2/dss/apply.c
+++ b/drivers/video/omap2/dss/apply.c
@@ -54,7 +54,7 @@
54 * +--------------------+ 54 * +--------------------+
55 */ 55 */
56 56
57struct overlay_cache_data { 57struct ovl_priv_data {
58 /* If true, cache changed, but not written to shadow registers. Set 58 /* If true, cache changed, but not written to shadow registers. Set
59 * in apply(), cleared when registers written. */ 59 * in apply(), cleared when registers written. */
60 bool dirty; 60 bool dirty;
@@ -90,12 +90,17 @@ struct manager_cache_data {
90 90
91static struct { 91static struct {
92 spinlock_t lock; 92 spinlock_t lock;
93 struct overlay_cache_data overlay_cache[MAX_DSS_OVERLAYS]; 93 struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
94 struct manager_cache_data manager_cache[MAX_DSS_MANAGERS]; 94 struct manager_cache_data manager_cache[MAX_DSS_MANAGERS];
95 95
96 bool irq_enabled; 96 bool irq_enabled;
97} dss_cache; 97} dss_cache;
98 98
99static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
100{
101 return &dss_cache.ovl_priv_data_array[ovl->id];
102}
103
99void dss_apply_init(void) 104void dss_apply_init(void)
100{ 105{
101 spin_lock_init(&dss_cache.lock); 106 spin_lock_init(&dss_cache.lock);
@@ -177,7 +182,7 @@ int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
177int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl) 182int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
178{ 183{
179 unsigned long timeout = msecs_to_jiffies(500); 184 unsigned long timeout = msecs_to_jiffies(500);
180 struct overlay_cache_data *oc; 185 struct ovl_priv_data *op;
181 struct omap_dss_device *dssdev; 186 struct omap_dss_device *dssdev;
182 u32 irq; 187 u32 irq;
183 int r; 188 int r;
@@ -196,15 +201,15 @@ int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
196 201
197 irq = dispc_mgr_get_vsync_irq(ovl->manager->id); 202 irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
198 203
199 oc = &dss_cache.overlay_cache[ovl->id]; 204 op = get_ovl_priv(ovl);
200 i = 0; 205 i = 0;
201 while (1) { 206 while (1) {
202 unsigned long flags; 207 unsigned long flags;
203 bool shadow_dirty, dirty; 208 bool shadow_dirty, dirty;
204 209
205 spin_lock_irqsave(&dss_cache.lock, flags); 210 spin_lock_irqsave(&dss_cache.lock, flags);
206 dirty = oc->dirty; 211 dirty = op->dirty;
207 shadow_dirty = oc->shadow_dirty; 212 shadow_dirty = op->shadow_dirty;
208 spin_unlock_irqrestore(&dss_cache.lock, flags); 213 spin_unlock_irqrestore(&dss_cache.lock, flags);
209 214
210 if (!dirty && !shadow_dirty) { 215 if (!dirty && !shadow_dirty) {
@@ -239,17 +244,17 @@ int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
239 244
240static int dss_ovl_write_regs(struct omap_overlay *ovl) 245static int dss_ovl_write_regs(struct omap_overlay *ovl)
241{ 246{
242 struct overlay_cache_data *c; 247 struct ovl_priv_data *op;
243 struct omap_overlay_info *oi; 248 struct omap_overlay_info *oi;
244 bool ilace, replication; 249 bool ilace, replication;
245 int r; 250 int r;
246 251
247 DSSDBGF("%d", ovl->id); 252 DSSDBGF("%d", ovl->id);
248 253
249 c = &dss_cache.overlay_cache[ovl->id]; 254 op = get_ovl_priv(ovl);
250 oi = &c->info; 255 oi = &op->info;
251 256
252 if (!c->enabled) { 257 if (!op->enabled) {
253 dispc_ovl_enable(ovl->id, 0); 258 dispc_ovl_enable(ovl->id, 0);
254 return 0; 259 return 0;
255 } 260 }
@@ -258,7 +263,7 @@ static int dss_ovl_write_regs(struct omap_overlay *ovl)
258 263
259 ilace = ovl->manager->device->type == OMAP_DISPLAY_TYPE_VENC; 264 ilace = ovl->manager->device->type == OMAP_DISPLAY_TYPE_VENC;
260 265
261 dispc_ovl_set_channel_out(ovl->id, c->channel); 266 dispc_ovl_set_channel_out(ovl->id, op->channel);
262 267
263 r = dispc_ovl_setup(ovl->id, oi, ilace, replication); 268 r = dispc_ovl_setup(ovl->id, oi, ilace, replication);
264 if (r) { 269 if (r) {
@@ -268,7 +273,7 @@ static int dss_ovl_write_regs(struct omap_overlay *ovl)
268 return r; 273 return r;
269 } 274 }
270 275
271 dispc_ovl_set_fifo_threshold(ovl->id, c->fifo_low, c->fifo_high); 276 dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
272 277
273 dispc_ovl_enable(ovl->id, 1); 278 dispc_ovl_enable(ovl->id, 1);
274 279
@@ -294,7 +299,7 @@ static int dss_write_regs(void)
294{ 299{
295 struct omap_overlay *ovl; 300 struct omap_overlay *ovl;
296 struct omap_overlay_manager *mgr; 301 struct omap_overlay_manager *mgr;
297 struct overlay_cache_data *oc; 302 struct ovl_priv_data *op;
298 struct manager_cache_data *mc; 303 struct manager_cache_data *mc;
299 const int num_ovls = dss_feat_get_num_ovls(); 304 const int num_ovls = dss_feat_get_num_ovls();
300 const int num_mgrs = dss_feat_get_num_mgrs(); 305 const int num_mgrs = dss_feat_get_num_mgrs();
@@ -315,16 +320,16 @@ static int dss_write_regs(void)
315 /* Commit overlay settings */ 320 /* Commit overlay settings */
316 for (i = 0; i < num_ovls; ++i) { 321 for (i = 0; i < num_ovls; ++i) {
317 ovl = omap_dss_get_overlay(i); 322 ovl = omap_dss_get_overlay(i);
318 oc = &dss_cache.overlay_cache[i]; 323 op = get_ovl_priv(ovl);
319 mc = &dss_cache.manager_cache[oc->channel]; 324 mc = &dss_cache.manager_cache[op->channel];
320 325
321 if (!oc->dirty) 326 if (!op->dirty)
322 continue; 327 continue;
323 328
324 if (mc->manual_update && !mc->do_manual_update) 329 if (mc->manual_update && !mc->do_manual_update)
325 continue; 330 continue;
326 331
327 if (mgr_busy[oc->channel]) { 332 if (mgr_busy[op->channel]) {
328 busy = true; 333 busy = true;
329 continue; 334 continue;
330 } 335 }
@@ -333,9 +338,9 @@ static int dss_write_regs(void)
333 if (r) 338 if (r)
334 DSSERR("dss_ovl_write_regs %d failed\n", i); 339 DSSERR("dss_ovl_write_regs %d failed\n", i);
335 340
336 oc->dirty = false; 341 op->dirty = false;
337 oc->shadow_dirty = true; 342 op->shadow_dirty = true;
338 mgr_go[oc->channel] = true; 343 mgr_go[op->channel] = true;
339 } 344 }
340 345
341 /* Commit manager settings */ 346 /* Commit manager settings */
@@ -385,7 +390,7 @@ static int dss_write_regs(void)
385void dss_mgr_start_update(struct omap_overlay_manager *mgr) 390void dss_mgr_start_update(struct omap_overlay_manager *mgr)
386{ 391{
387 struct manager_cache_data *mc; 392 struct manager_cache_data *mc;
388 struct overlay_cache_data *oc; 393 struct ovl_priv_data *op;
389 struct omap_overlay *ovl; 394 struct omap_overlay *ovl;
390 395
391 mc = &dss_cache.manager_cache[mgr->id]; 396 mc = &dss_cache.manager_cache[mgr->id];
@@ -395,8 +400,8 @@ void dss_mgr_start_update(struct omap_overlay_manager *mgr)
395 mc->do_manual_update = false; 400 mc->do_manual_update = false;
396 401
397 list_for_each_entry(ovl, &mgr->overlays, list) { 402 list_for_each_entry(ovl, &mgr->overlays, list) {
398 oc = &dss_cache.overlay_cache[ovl->id]; 403 op = get_ovl_priv(ovl);
399 oc->shadow_dirty = false; 404 op->shadow_dirty = false;
400 } 405 }
401 406
402 mc = &dss_cache.manager_cache[mgr->id]; 407 mc = &dss_cache.manager_cache[mgr->id];
@@ -441,8 +446,9 @@ static void dss_unregister_vsync_isr(void)
441 446
442static void dss_apply_irq_handler(void *data, u32 mask) 447static void dss_apply_irq_handler(void *data, u32 mask)
443{ 448{
449 struct omap_overlay *ovl;
444 struct manager_cache_data *mc; 450 struct manager_cache_data *mc;
445 struct overlay_cache_data *oc; 451 struct ovl_priv_data *op;
446 const int num_ovls = dss_feat_get_num_ovls(); 452 const int num_ovls = dss_feat_get_num_ovls();
447 const int num_mgrs = dss_feat_get_num_mgrs(); 453 const int num_mgrs = dss_feat_get_num_mgrs();
448 int i, r; 454 int i, r;
@@ -454,9 +460,10 @@ static void dss_apply_irq_handler(void *data, u32 mask)
454 spin_lock(&dss_cache.lock); 460 spin_lock(&dss_cache.lock);
455 461
456 for (i = 0; i < num_ovls; ++i) { 462 for (i = 0; i < num_ovls; ++i) {
457 oc = &dss_cache.overlay_cache[i]; 463 ovl = omap_dss_get_overlay(i);
458 if (!mgr_busy[oc->channel]) 464 op = get_ovl_priv(ovl);
459 oc->shadow_dirty = false; 465 if (!mgr_busy[op->channel])
466 op->shadow_dirty = false;
460 } 467 }
461 468
462 for (i = 0; i < num_mgrs; ++i) { 469 for (i = 0; i < num_mgrs; ++i) {
@@ -488,10 +495,10 @@ end:
488 495
489static int omap_dss_mgr_apply_ovl(struct omap_overlay *ovl) 496static int omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
490{ 497{
491 struct overlay_cache_data *oc; 498 struct ovl_priv_data *op;
492 struct omap_dss_device *dssdev; 499 struct omap_dss_device *dssdev;
493 500
494 oc = &dss_cache.overlay_cache[ovl->id]; 501 op = get_ovl_priv(ovl);
495 502
496 if (ovl->manager_changed) { 503 if (ovl->manager_changed) {
497 ovl->manager_changed = false; 504 ovl->manager_changed = false;
@@ -499,9 +506,9 @@ static int omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
499 } 506 }
500 507
501 if (!overlay_enabled(ovl)) { 508 if (!overlay_enabled(ovl)) {
502 if (oc->enabled) { 509 if (op->enabled) {
503 oc->enabled = false; 510 op->enabled = false;
504 oc->dirty = true; 511 op->dirty = true;
505 } 512 }
506 return 0; 513 return 0;
507 } 514 }
@@ -512,20 +519,20 @@ static int omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
512 dssdev = ovl->manager->device; 519 dssdev = ovl->manager->device;
513 520
514 if (dss_check_overlay(ovl, dssdev)) { 521 if (dss_check_overlay(ovl, dssdev)) {
515 if (oc->enabled) { 522 if (op->enabled) {
516 oc->enabled = false; 523 op->enabled = false;
517 oc->dirty = true; 524 op->dirty = true;
518 } 525 }
519 return -EINVAL; 526 return -EINVAL;
520 } 527 }
521 528
522 ovl->info_dirty = false; 529 ovl->info_dirty = false;
523 oc->dirty = true; 530 op->dirty = true;
524 oc->info = ovl->info; 531 op->info = ovl->info;
525 532
526 oc->channel = ovl->manager->id; 533 op->channel = ovl->manager->id;
527 534
528 oc->enabled = true; 535 op->enabled = true;
529 536
530 return 0; 537 return 0;
531} 538}
@@ -556,13 +563,13 @@ static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
556 563
557static void omap_dss_mgr_apply_ovl_fifos(struct omap_overlay *ovl) 564static void omap_dss_mgr_apply_ovl_fifos(struct omap_overlay *ovl)
558{ 565{
559 struct overlay_cache_data *oc; 566 struct ovl_priv_data *op;
560 struct omap_dss_device *dssdev; 567 struct omap_dss_device *dssdev;
561 u32 size, burst_size; 568 u32 size, burst_size;
562 569
563 oc = &dss_cache.overlay_cache[ovl->id]; 570 op = get_ovl_priv(ovl);
564 571
565 if (!oc->enabled) 572 if (!op->enabled)
566 return; 573 return;
567 574
568 dssdev = ovl->manager->device; 575 dssdev = ovl->manager->device;
@@ -578,14 +585,14 @@ static void omap_dss_mgr_apply_ovl_fifos(struct omap_overlay *ovl)
578 case OMAP_DISPLAY_TYPE_VENC: 585 case OMAP_DISPLAY_TYPE_VENC:
579 case OMAP_DISPLAY_TYPE_HDMI: 586 case OMAP_DISPLAY_TYPE_HDMI:
580 default_get_overlay_fifo_thresholds(ovl->id, size, 587 default_get_overlay_fifo_thresholds(ovl->id, size,
581 burst_size, &oc->fifo_low, 588 burst_size, &op->fifo_low,
582 &oc->fifo_high); 589 &op->fifo_high);
583 break; 590 break;
584#ifdef CONFIG_OMAP2_DSS_DSI 591#ifdef CONFIG_OMAP2_DSS_DSI
585 case OMAP_DISPLAY_TYPE_DSI: 592 case OMAP_DISPLAY_TYPE_DSI:
586 dsi_get_overlay_fifo_thresholds(ovl->id, size, 593 dsi_get_overlay_fifo_thresholds(ovl->id, size,
587 burst_size, &oc->fifo_low, 594 burst_size, &op->fifo_low,
588 &oc->fifo_high); 595 &op->fifo_high);
589 break; 596 break;
590#endif 597#endif
591 default: 598 default: