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authorSumit Semwal <sumit.semwal@ti.com>2010-12-02 06:27:10 -0500
committerTomi Valkeinen <tomi.valkeinen@nokia.com>2011-01-10 04:35:59 -0500
commit64ba4f748a005a44c03c98e082d8ee157f4ee66f (patch)
treee06800604171e7067c197514cbdec323bccbbae8 /drivers/video
parent8613b0005d315582a988bbeb2249d69df343eb3a (diff)
OMAP: DSS2: Introduce omap_channel argument to DISPC functions used by interface drivers
The interface drivers (dsi.c, sdi.c etc) need to call dispc functions with dssdev->manager->id as a parameter to specify the DISPC channel which they want to configure/use, this is required as the same functions are now used to configure dispc registers of different channels. The following dispc functions are changed to incorporate channel as an argument: -dispc_enable_fifohandcheck() -dispc_set_lcd_size() -dispc_set_parallel_interface_mode() -dispc_set_tft_data_lines() -dispc_set_lcd_display_type() -dispc_set_lcd_timings() Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Signed-off-by: Mukund Mittal <mmittal@ti.com> Signed-off-by: Samreen <samreen@ti.com> Signed-off-by: Archit Taneja <archit@ti.com> [tomi.valkeinen@nokia.com: fixed trivial compile error] Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Diffstat (limited to 'drivers/video')
-rw-r--r--drivers/video/omap2/dss/dispc.c38
-rw-r--r--drivers/video/omap2/dss/dpi.c12
-rw-r--r--drivers/video/omap2/dss/dsi.c14
-rw-r--r--drivers/video/omap2/dss/dss.h19
-rw-r--r--drivers/video/omap2/dss/rfbi.c20
-rw-r--r--drivers/video/omap2/dss/sdi.c16
6 files changed, 69 insertions, 50 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 36fadb8e49c3..7ca53c100419 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -941,13 +941,13 @@ void dispc_enable_replication(enum omap_plane plane, bool enable)
941 enable_clocks(0); 941 enable_clocks(0);
942} 942}
943 943
944void dispc_set_lcd_size(u16 width, u16 height) 944void dispc_set_lcd_size(enum omap_channel channel, u16 width, u16 height)
945{ 945{
946 u32 val; 946 u32 val;
947 BUG_ON((width > (1 << 11)) || (height > (1 << 11))); 947 BUG_ON((width > (1 << 11)) || (height > (1 << 11)));
948 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); 948 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0);
949 enable_clocks(1); 949 enable_clocks(1);
950 dispc_write_reg(DISPC_SIZE_LCD(OMAP_DSS_CHANNEL_LCD), val); 950 dispc_write_reg(DISPC_SIZE_LCD(channel), val);
951 enable_clocks(0); 951 enable_clocks(0);
952} 952}
953 953
@@ -1843,7 +1843,7 @@ void dispc_pck_free_enable(bool enable)
1843 enable_clocks(0); 1843 enable_clocks(0);
1844} 1844}
1845 1845
1846void dispc_enable_fifohandcheck(bool enable) 1846void dispc_enable_fifohandcheck(enum omap_channel channel, bool enable)
1847{ 1847{
1848 enable_clocks(1); 1848 enable_clocks(1);
1849 REG_FLD_MOD(DISPC_CONFIG, enable ? 1 : 0, 16, 16); 1849 REG_FLD_MOD(DISPC_CONFIG, enable ? 1 : 0, 16, 16);
@@ -1851,7 +1851,8 @@ void dispc_enable_fifohandcheck(bool enable)
1851} 1851}
1852 1852
1853 1853
1854void dispc_set_lcd_display_type(enum omap_lcd_display_type type) 1854void dispc_set_lcd_display_type(enum omap_channel channel,
1855 enum omap_lcd_display_type type)
1855{ 1856{
1856 int mode; 1857 int mode;
1857 1858
@@ -1994,7 +1995,7 @@ bool dispc_trans_key_enabled(enum omap_channel ch)
1994} 1995}
1995 1996
1996 1997
1997void dispc_set_tft_data_lines(u8 data_lines) 1998void dispc_set_tft_data_lines(enum omap_channel channel, u8 data_lines)
1998{ 1999{
1999 int code; 2000 int code;
2000 2001
@@ -2021,7 +2022,8 @@ void dispc_set_tft_data_lines(u8 data_lines)
2021 enable_clocks(0); 2022 enable_clocks(0);
2022} 2023}
2023 2024
2024void dispc_set_parallel_interface_mode(enum omap_parallel_interface_mode mode) 2025void dispc_set_parallel_interface_mode(enum omap_channel channel,
2026 enum omap_parallel_interface_mode mode)
2025{ 2027{
2026 u32 l; 2028 u32 l;
2027 int stallmode; 2029 int stallmode;
@@ -2054,9 +2056,11 @@ void dispc_set_parallel_interface_mode(enum omap_parallel_interface_mode mode)
2054 l = dispc_read_reg(DISPC_CONTROL); 2056 l = dispc_read_reg(DISPC_CONTROL);
2055 2057
2056 l = FLD_MOD(l, stallmode, 11, 11); 2058 l = FLD_MOD(l, stallmode, 11, 11);
2057 l = FLD_MOD(l, gpout0, 15, 15);
2058 l = FLD_MOD(l, gpout1, 16, 16);
2059 2059
2060 if (channel == OMAP_DSS_CHANNEL_LCD) {
2061 l = FLD_MOD(l, gpout0, 15, 15);
2062 l = FLD_MOD(l, gpout1, 16, 16);
2063 }
2060 dispc_write_reg(DISPC_CONTROL, l); 2064 dispc_write_reg(DISPC_CONTROL, l);
2061 2065
2062 enable_clocks(0); 2066 enable_clocks(0);
@@ -2093,8 +2097,8 @@ bool dispc_lcd_timings_ok(struct omap_video_timings *timings)
2093 timings->vfp, timings->vbp); 2097 timings->vfp, timings->vbp);
2094} 2098}
2095 2099
2096static void _dispc_set_lcd_timings(int hsw, int hfp, int hbp, 2100static void _dispc_set_lcd_timings(enum omap_channel channel, int hsw,
2097 int vsw, int vfp, int vbp) 2101 int hfp, int hbp, int vsw, int vfp, int vbp)
2098{ 2102{
2099 u32 timing_h, timing_v; 2103 u32 timing_h, timing_v;
2100 2104
@@ -2113,13 +2117,14 @@ static void _dispc_set_lcd_timings(int hsw, int hfp, int hbp,
2113 } 2117 }
2114 2118
2115 enable_clocks(1); 2119 enable_clocks(1);
2116 dispc_write_reg(DISPC_TIMING_H(OMAP_DSS_CHANNEL_LCD), timing_h); 2120 dispc_write_reg(DISPC_TIMING_H(channel), timing_h);
2117 dispc_write_reg(DISPC_TIMING_V(OMAP_DSS_CHANNEL_LCD), timing_v); 2121 dispc_write_reg(DISPC_TIMING_V(channel), timing_v);
2118 enable_clocks(0); 2122 enable_clocks(0);
2119} 2123}
2120 2124
2121/* change name to mode? */ 2125/* change name to mode? */
2122void dispc_set_lcd_timings(struct omap_video_timings *timings) 2126void dispc_set_lcd_timings(enum omap_channel channel,
2127 struct omap_video_timings *timings)
2123{ 2128{
2124 unsigned xtot, ytot; 2129 unsigned xtot, ytot;
2125 unsigned long ht, vt; 2130 unsigned long ht, vt;
@@ -2129,10 +2134,11 @@ void dispc_set_lcd_timings(struct omap_video_timings *timings)
2129 timings->vfp, timings->vbp)) 2134 timings->vfp, timings->vbp))
2130 BUG(); 2135 BUG();
2131 2136
2132 _dispc_set_lcd_timings(timings->hsw, timings->hfp, timings->hbp, 2137 _dispc_set_lcd_timings(channel, timings->hsw, timings->hfp,
2133 timings->vsw, timings->vfp, timings->vbp); 2138 timings->hbp, timings->vsw, timings->vfp,
2139 timings->vbp);
2134 2140
2135 dispc_set_lcd_size(timings->x_res, timings->y_res); 2141 dispc_set_lcd_size(channel, timings->x_res, timings->y_res);
2136 2142
2137 xtot = timings->x_res + timings->hfp + timings->hsw + timings->hbp; 2143 xtot = timings->x_res + timings->hfp + timings->hsw + timings->hbp;
2138 ytot = timings->y_res + timings->vfp + timings->vsw + timings->vbp; 2144 ytot = timings->y_res + timings->vfp + timings->vsw + timings->vbp;
diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c
index 960e977a8bf0..08b497f924bb 100644
--- a/drivers/video/omap2/dss/dpi.c
+++ b/drivers/video/omap2/dss/dpi.c
@@ -132,7 +132,7 @@ static int dpi_set_mode(struct omap_dss_device *dssdev)
132 t->pixel_clock = pck; 132 t->pixel_clock = pck;
133 } 133 }
134 134
135 dispc_set_lcd_timings(t); 135 dispc_set_lcd_timings(dssdev->manager->id, t);
136 136
137err0: 137err0:
138 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1); 138 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
@@ -145,10 +145,12 @@ static int dpi_basic_init(struct omap_dss_device *dssdev)
145 145
146 is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0; 146 is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
147 147
148 dispc_set_parallel_interface_mode(OMAP_DSS_PARALLELMODE_BYPASS); 148 dispc_set_parallel_interface_mode(dssdev->manager->id,
149 dispc_set_lcd_display_type(is_tft ? OMAP_DSS_LCD_DISPLAY_TFT : 149 OMAP_DSS_PARALLELMODE_BYPASS);
150 OMAP_DSS_LCD_DISPLAY_STN); 150 dispc_set_lcd_display_type(dssdev->manager->id, is_tft ?
151 dispc_set_tft_data_lines(dssdev->phy.dpi.data_lines); 151 OMAP_DSS_LCD_DISPLAY_TFT : OMAP_DSS_LCD_DISPLAY_STN);
152 dispc_set_tft_data_lines(dssdev->manager->id,
153 dssdev->phy.dpi.data_lines);
152 154
153 return 0; 155 return 0;
154} 156}
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index aa4f7a5fae29..acd36cad8445 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -2888,7 +2888,7 @@ int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
2888 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) { 2888 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
2889 dss_setup_partial_planes(dssdev, x, y, w, h, 2889 dss_setup_partial_planes(dssdev, x, y, w, h,
2890 enlarge_update_area); 2890 enlarge_update_area);
2891 dispc_set_lcd_size(*w, *h); 2891 dispc_set_lcd_size(dssdev->manager->id, *w, *h);
2892 } 2892 }
2893 2893
2894 return 0; 2894 return 0;
@@ -2947,12 +2947,14 @@ static int dsi_display_init_dispc(struct omap_dss_device *dssdev)
2947 return r; 2947 return r;
2948 } 2948 }
2949 2949
2950 dispc_set_lcd_display_type(OMAP_DSS_LCD_DISPLAY_TFT); 2950 dispc_set_lcd_display_type(dssdev->manager->id,
2951 OMAP_DSS_LCD_DISPLAY_TFT);
2951 2952
2952 dispc_set_parallel_interface_mode(OMAP_DSS_PARALLELMODE_DSI); 2953 dispc_set_parallel_interface_mode(dssdev->manager->id,
2953 dispc_enable_fifohandcheck(1); 2954 OMAP_DSS_PARALLELMODE_DSI);
2955 dispc_enable_fifohandcheck(dssdev->manager->id, 1);
2954 2956
2955 dispc_set_tft_data_lines(dssdev->ctrl.pixel_size); 2957 dispc_set_tft_data_lines(dssdev->manager->id, dssdev->ctrl.pixel_size);
2956 2958
2957 { 2959 {
2958 struct omap_video_timings timings = { 2960 struct omap_video_timings timings = {
@@ -2964,7 +2966,7 @@ static int dsi_display_init_dispc(struct omap_dss_device *dssdev)
2964 .vbp = 0, 2966 .vbp = 0,
2965 }; 2967 };
2966 2968
2967 dispc_set_lcd_timings(&timings); 2969 dispc_set_lcd_timings(dssdev->manager->id, &timings);
2968 } 2970 }
2969 2971
2970 return 0; 2972 return 0;
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index 2bb515c61f4b..275e29067372 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -333,9 +333,9 @@ void dispc_disable_sidle(void);
333void dispc_lcd_enable_signal_polarity(bool act_high); 333void dispc_lcd_enable_signal_polarity(bool act_high);
334void dispc_lcd_enable_signal(bool enable); 334void dispc_lcd_enable_signal(bool enable);
335void dispc_pck_free_enable(bool enable); 335void dispc_pck_free_enable(bool enable);
336void dispc_enable_fifohandcheck(bool enable); 336void dispc_enable_fifohandcheck(enum omap_channel channel, bool enable);
337 337
338void dispc_set_lcd_size(u16 width, u16 height); 338void dispc_set_lcd_size(enum omap_channel channel, u16 width, u16 height);
339void dispc_set_digit_size(u16 width, u16 height); 339void dispc_set_digit_size(u16 width, u16 height);
340u32 dispc_get_plane_fifo_size(enum omap_plane plane); 340u32 dispc_get_plane_fifo_size(enum omap_plane plane);
341void dispc_setup_plane_fifo(enum omap_plane plane, u32 low, u32 high); 341void dispc_setup_plane_fifo(enum omap_plane plane, u32 low, u32 high);
@@ -369,9 +369,11 @@ bool dispc_is_channel_enabled(enum omap_channel channel);
369int dispc_enable_plane(enum omap_plane plane, bool enable); 369int dispc_enable_plane(enum omap_plane plane, bool enable);
370void dispc_enable_replication(enum omap_plane plane, bool enable); 370void dispc_enable_replication(enum omap_plane plane, bool enable);
371 371
372void dispc_set_parallel_interface_mode(enum omap_parallel_interface_mode mode); 372void dispc_set_parallel_interface_mode(enum omap_channel channel,
373void dispc_set_tft_data_lines(u8 data_lines); 373 enum omap_parallel_interface_mode mode);
374void dispc_set_lcd_display_type(enum omap_lcd_display_type type); 374void dispc_set_tft_data_lines(enum omap_channel channel, u8 data_lines);
375void dispc_set_lcd_display_type(enum omap_channel channel,
376 enum omap_lcd_display_type type);
375void dispc_set_loadmode(enum omap_dss_load_mode mode); 377void dispc_set_loadmode(enum omap_dss_load_mode mode);
376 378
377void dispc_set_default_color(enum omap_channel channel, u32 color); 379void dispc_set_default_color(enum omap_channel channel, u32 color);
@@ -388,7 +390,8 @@ bool dispc_trans_key_enabled(enum omap_channel ch);
388bool dispc_alpha_blending_enabled(enum omap_channel ch); 390bool dispc_alpha_blending_enabled(enum omap_channel ch);
389 391
390bool dispc_lcd_timings_ok(struct omap_video_timings *timings); 392bool dispc_lcd_timings_ok(struct omap_video_timings *timings);
391void dispc_set_lcd_timings(struct omap_video_timings *timings); 393void dispc_set_lcd_timings(enum omap_channel channel,
394 struct omap_video_timings *timings);
392unsigned long dispc_fclk_rate(void); 395unsigned long dispc_fclk_rate(void);
393unsigned long dispc_lclk_rate(void); 396unsigned long dispc_lclk_rate(void);
394unsigned long dispc_pclk_rate(void); 397unsigned long dispc_pclk_rate(void);
@@ -425,8 +428,8 @@ void rfbi_dump_regs(struct seq_file *s);
425 428
426int rfbi_configure(int rfbi_module, int bpp, int lines); 429int rfbi_configure(int rfbi_module, int bpp, int lines);
427void rfbi_enable_rfbi(bool enable); 430void rfbi_enable_rfbi(bool enable);
428void rfbi_transfer_area(u16 width, u16 height, 431void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width,
429 void (callback)(void *data), void *data); 432 u16 height, void (callback)(void *data), void *data);
430void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t); 433void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t);
431unsigned long rfbi_get_max_tx_rate(void); 434unsigned long rfbi_get_max_tx_rate(void);
432int rfbi_init_display(struct omap_dss_device *display); 435int rfbi_init_display(struct omap_dss_device *display);
diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c
index bbe62464e92d..10a2ffe02882 100644
--- a/drivers/video/omap2/dss/rfbi.c
+++ b/drivers/video/omap2/dss/rfbi.c
@@ -301,8 +301,8 @@ void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
301} 301}
302EXPORT_SYMBOL(omap_rfbi_write_pixels); 302EXPORT_SYMBOL(omap_rfbi_write_pixels);
303 303
304void rfbi_transfer_area(u16 width, u16 height, 304void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width,
305 void (callback)(void *data), void *data) 305 u16 height, void (*callback)(void *data), void *data)
306{ 306{
307 u32 l; 307 u32 l;
308 308
@@ -311,9 +311,9 @@ void rfbi_transfer_area(u16 width, u16 height,
311 311
312 DSSDBG("rfbi_transfer_area %dx%d\n", width, height); 312 DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
313 313
314 dispc_set_lcd_size(width, height); 314 dispc_set_lcd_size(dssdev->manager->id, width, height);
315 315
316 dispc_enable_channel(OMAP_DSS_CHANNEL_LCD, true); 316 dispc_enable_channel(dssdev->manager->id, true);
317 317
318 rfbi.framedone_callback = callback; 318 rfbi.framedone_callback = callback;
319 rfbi.framedone_callback_data = data; 319 rfbi.framedone_callback_data = data;
@@ -887,7 +887,7 @@ int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
887 887
888 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) { 888 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
889 dss_setup_partial_planes(dssdev, x, y, w, h, true); 889 dss_setup_partial_planes(dssdev, x, y, w, h, true);
890 dispc_set_lcd_size(*w, *h); 890 dispc_set_lcd_size(dssdev->manager->id, *w, *h);
891 } 891 }
892 892
893 return 0; 893 return 0;
@@ -899,7 +899,7 @@ int omap_rfbi_update(struct omap_dss_device *dssdev,
899 void (*callback)(void *), void *data) 899 void (*callback)(void *), void *data)
900{ 900{
901 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) { 901 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
902 rfbi_transfer_area(w, h, callback, data); 902 rfbi_transfer_area(dssdev, w, h, callback, data);
903 } else { 903 } else {
904 struct omap_overlay *ovl; 904 struct omap_overlay *ovl;
905 void __iomem *addr; 905 void __iomem *addr;
@@ -1018,11 +1018,13 @@ int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev)
1018 goto err1; 1018 goto err1;
1019 } 1019 }
1020 1020
1021 dispc_set_lcd_display_type(OMAP_DSS_LCD_DISPLAY_TFT); 1021 dispc_set_lcd_display_type(dssdev->manager->id,
1022 OMAP_DSS_LCD_DISPLAY_TFT);
1022 1023
1023 dispc_set_parallel_interface_mode(OMAP_DSS_PARALLELMODE_RFBI); 1024 dispc_set_parallel_interface_mode(dssdev->manager->id,
1025 OMAP_DSS_PARALLELMODE_RFBI);
1024 1026
1025 dispc_set_tft_data_lines(dssdev->ctrl.pixel_size); 1027 dispc_set_tft_data_lines(dssdev->manager->id, dssdev->ctrl.pixel_size);
1026 1028
1027 rfbi_configure(dssdev->phy.rfbi.channel, 1029 rfbi_configure(dssdev->phy.rfbi.channel,
1028 dssdev->ctrl.pixel_size, 1030 dssdev->ctrl.pixel_size,
diff --git a/drivers/video/omap2/dss/sdi.c b/drivers/video/omap2/dss/sdi.c
index ee07a3cc22ef..19443b18f3da 100644
--- a/drivers/video/omap2/dss/sdi.c
+++ b/drivers/video/omap2/dss/sdi.c
@@ -35,12 +35,16 @@ static struct {
35 struct regulator *vdds_sdi_reg; 35 struct regulator *vdds_sdi_reg;
36} sdi; 36} sdi;
37 37
38static void sdi_basic_init(void) 38static void sdi_basic_init(struct omap_dss_device *dssdev)
39
39{ 40{
40 dispc_set_parallel_interface_mode(OMAP_DSS_PARALLELMODE_BYPASS); 41 dispc_set_parallel_interface_mode(dssdev->manager->id,
42 OMAP_DSS_PARALLELMODE_BYPASS);
43
44 dispc_set_lcd_display_type(dssdev->manager->id,
45 OMAP_DSS_LCD_DISPLAY_TFT);
41 46
42 dispc_set_lcd_display_type(OMAP_DSS_LCD_DISPLAY_TFT); 47 dispc_set_tft_data_lines(dssdev->manager->id, 24);
43 dispc_set_tft_data_lines(24);
44 dispc_lcd_enable_signal_polarity(1); 48 dispc_lcd_enable_signal_polarity(1);
45} 49}
46 50
@@ -68,7 +72,7 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
68 if (!sdi.skip_init) 72 if (!sdi.skip_init)
69 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1); 73 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
70 74
71 sdi_basic_init(); 75 sdi_basic_init(dssdev);
72 76
73 /* 15.5.9.1.2 */ 77 /* 15.5.9.1.2 */
74 dssdev->panel.config |= OMAP_DSS_LCD_RF | OMAP_DSS_LCD_ONOFF; 78 dssdev->panel.config |= OMAP_DSS_LCD_RF | OMAP_DSS_LCD_ONOFF;
@@ -102,7 +106,7 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
102 } 106 }
103 107
104 108
105 dispc_set_lcd_timings(t); 109 dispc_set_lcd_timings(dssdev->manager->id, t);
106 110
107 r = dss_set_clock_div(&dss_cinfo); 111 r = dss_set_clock_div(&dss_cinfo);
108 if (r) 112 if (r)