aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/video
diff options
context:
space:
mode:
authorKrzysztof Helt <krzysztof.h1@wp.pl>2008-07-24 00:31:23 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-07-24 13:47:38 -0400
commit98219374d9ed2d257e56e8e1fcd9d16a083397bb (patch)
tree046d61fc868682e3a4d9c0c123aac517a920a676 /drivers/video
parentea9014bcacf236124d5e0ff971838049a98456cb (diff)
vga16fb: source code improvement
Use constants and functions from the vga.h file. Also add module description. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video')
-rw-r--r--drivers/video/vga16fb.c117
1 files changed, 39 insertions, 78 deletions
diff --git a/drivers/video/vga16fb.c b/drivers/video/vga16fb.c
index 9d2751717896..e31bca8a0cb2 100644
--- a/drivers/video/vga16fb.c
+++ b/drivers/video/vga16fb.c
@@ -26,18 +26,6 @@
26#include <asm/io.h> 26#include <asm/io.h>
27#include <video/vga.h> 27#include <video/vga.h>
28 28
29#define GRAPHICS_ADDR_REG VGA_GFX_I /* Graphics address register. */
30#define GRAPHICS_DATA_REG VGA_GFX_D /* Graphics data register. */
31
32#define SET_RESET_INDEX VGA_GFX_SR_VALUE /* Set/Reset Register index. */
33#define ENABLE_SET_RESET_INDEX VGA_GFX_SR_ENABLE /* Enable Set/Reset Register index. */
34#define DATA_ROTATE_INDEX VGA_GFX_DATA_ROTATE /* Data Rotate Register index. */
35#define GRAPHICS_MODE_INDEX VGA_GFX_MODE /* Graphics Mode Register index. */
36#define BIT_MASK_INDEX VGA_GFX_BIT_MASK /* Bit Mask Register index. */
37
38#define dac_reg (VGA_PEL_IW)
39#define dac_val (VGA_PEL_D)
40
41#define VGA_FB_PHYS 0xA0000 29#define VGA_FB_PHYS 0xA0000
42#define VGA_FB_PHYS_LEN 65536 30#define VGA_FB_PHYS_LEN 65536
43 31
@@ -108,7 +96,7 @@ static struct fb_fix_screeninfo vga16fb_fix __initdata = {
108 .visual = FB_VISUAL_PSEUDOCOLOR, 96 .visual = FB_VISUAL_PSEUDOCOLOR,
109 .xpanstep = 8, 97 .xpanstep = 8,
110 .ypanstep = 1, 98 .ypanstep = 1,
111 .line_length = 640/8, 99 .line_length = 640 / 8,
112 .accel = FB_ACCEL_NONE 100 .accel = FB_ACCEL_NONE
113}; 101};
114 102
@@ -135,23 +123,22 @@ static inline int setmode(int mode)
135{ 123{
136 int oldmode; 124 int oldmode;
137 125
138 vga_io_w(GRAPHICS_ADDR_REG, GRAPHICS_MODE_INDEX); 126 oldmode = vga_io_rgfx(VGA_GFX_MODE);
139 oldmode = vga_io_r(GRAPHICS_DATA_REG); 127 vga_io_w(VGA_GFX_D, mode);
140 vga_io_w(GRAPHICS_DATA_REG, mode);
141 return oldmode; 128 return oldmode;
142} 129}
143 130
144/* Select the Bit Mask Register and return its value. */ 131/* Select the Bit Mask Register and return its value. */
145static inline int selectmask(void) 132static inline int selectmask(void)
146{ 133{
147 return vga_io_rgfx(BIT_MASK_INDEX); 134 return vga_io_rgfx(VGA_GFX_BIT_MASK);
148} 135}
149 136
150/* Set the value of the Bit Mask Register. It must already have been 137/* Set the value of the Bit Mask Register. It must already have been
151 selected with selectmask(). */ 138 selected with selectmask(). */
152static inline void setmask(int mask) 139static inline void setmask(int mask)
153{ 140{
154 vga_io_w(GRAPHICS_DATA_REG, mask); 141 vga_io_w(VGA_GFX_D, mask);
155} 142}
156 143
157/* Set the Data Rotate Register and return its old value. 144/* Set the Data Rotate Register and return its old value.
@@ -161,9 +148,8 @@ static inline int setop(int op)
161{ 148{
162 int oldop; 149 int oldop;
163 150
164 vga_io_w(GRAPHICS_ADDR_REG, DATA_ROTATE_INDEX); 151 oldop = vga_io_rgfx(VGA_GFX_DATA_ROTATE);
165 oldop = vga_io_r(GRAPHICS_DATA_REG); 152 vga_io_w(VGA_GFX_D, op);
166 vga_io_w(GRAPHICS_DATA_REG, op);
167 return oldop; 153 return oldop;
168} 154}
169 155
@@ -173,9 +159,8 @@ static inline int setsr(int sr)
173{ 159{
174 int oldsr; 160 int oldsr;
175 161
176 vga_io_w(GRAPHICS_ADDR_REG, ENABLE_SET_RESET_INDEX); 162 oldsr = vga_io_rgfx(VGA_GFX_SR_ENABLE);
177 oldsr = vga_io_r(GRAPHICS_DATA_REG); 163 vga_io_w(VGA_GFX_D, sr);
178 vga_io_w(GRAPHICS_DATA_REG, sr);
179 return oldsr; 164 return oldsr;
180} 165}
181 166
@@ -184,22 +169,21 @@ static inline int setcolor(int color)
184{ 169{
185 int oldcolor; 170 int oldcolor;
186 171
187 vga_io_w(GRAPHICS_ADDR_REG, SET_RESET_INDEX); 172 oldcolor = vga_io_rgfx(VGA_GFX_SR_VALUE);
188 oldcolor = vga_io_r(GRAPHICS_DATA_REG); 173 vga_io_w(VGA_GFX_D, color);
189 vga_io_w(GRAPHICS_DATA_REG, color);
190 return oldcolor; 174 return oldcolor;
191} 175}
192 176
193/* Return the value in the Graphics Address Register. */ 177/* Return the value in the Graphics Address Register. */
194static inline int getindex(void) 178static inline int getindex(void)
195{ 179{
196 return vga_io_r(GRAPHICS_ADDR_REG); 180 return vga_io_r(VGA_GFX_I);
197} 181}
198 182
199/* Set the value in the Graphics Address Register. */ 183/* Set the value in the Graphics Address Register. */
200static inline void setindex(int index) 184static inline void setindex(int index)
201{ 185{
202 vga_io_w(GRAPHICS_ADDR_REG, index); 186 vga_io_w(VGA_GFX_I, index);
203} 187}
204 188
205static void vga16fb_pan_var(struct fb_info *info, 189static void vga16fb_pan_var(struct fb_info *info,
@@ -672,10 +656,10 @@ static void ega16_setpalette(int regno, unsigned red, unsigned green, unsigned b
672 656
673static void vga16_setpalette(int regno, unsigned red, unsigned green, unsigned blue) 657static void vga16_setpalette(int regno, unsigned red, unsigned green, unsigned blue)
674{ 658{
675 outb(regno, dac_reg); 659 outb(regno, VGA_PEL_IW);
676 outb(red >> 10, dac_val); 660 outb(red >> 10, VGA_PEL_D);
677 outb(green >> 10, dac_val); 661 outb(green >> 10, VGA_PEL_D);
678 outb(blue >> 10, dac_val); 662 outb(blue >> 10, VGA_PEL_D);
679} 663}
680 664
681static int vga16fb_setcolreg(unsigned regno, unsigned red, unsigned green, 665static int vga16fb_setcolreg(unsigned regno, unsigned red, unsigned green,
@@ -719,28 +703,15 @@ static int vga16fb_pan_display(struct fb_var_screeninfo *var,
719 blanking code was originally by Huang shi chao, and modified by 703 blanking code was originally by Huang shi chao, and modified by
720 Christoph Rimek (chrimek@toppoint.de) and todd j. derr 704 Christoph Rimek (chrimek@toppoint.de) and todd j. derr
721 (tjd@barefoot.org) for Linux. */ 705 (tjd@barefoot.org) for Linux. */
722#define attrib_port VGA_ATC_IW
723#define seq_port_reg VGA_SEQ_I
724#define seq_port_val VGA_SEQ_D
725#define gr_port_reg VGA_GFX_I
726#define gr_port_val VGA_GFX_D
727#define video_misc_rd VGA_MIS_R
728#define video_misc_wr VGA_MIS_W
729#define vga_video_port_reg VGA_CRT_IC
730#define vga_video_port_val VGA_CRT_DC
731 706
732static void vga_vesa_blank(struct vga16fb_par *par, int mode) 707static void vga_vesa_blank(struct vga16fb_par *par, int mode)
733{ 708{
734 unsigned char SeqCtrlIndex; 709 unsigned char SeqCtrlIndex = vga_io_r(VGA_SEQ_I);
735 unsigned char CrtCtrlIndex; 710 unsigned char CrtCtrlIndex = vga_io_r(VGA_CRT_IC);
736 711
737 //cli();
738 SeqCtrlIndex = vga_io_r(seq_port_reg);
739 CrtCtrlIndex = vga_io_r(vga_video_port_reg);
740
741 /* save original values of VGA controller registers */ 712 /* save original values of VGA controller registers */
742 if(!par->vesa_blanked) { 713 if(!par->vesa_blanked) {
743 par->vga_state.CrtMiscIO = vga_io_r(video_misc_rd); 714 par->vga_state.CrtMiscIO = vga_io_r(VGA_MIS_R);
744 //sti(); 715 //sti();
745 716
746 par->vga_state.HorizontalTotal = vga_io_rcrt(0x00); /* HorizontalTotal */ 717 par->vga_state.HorizontalTotal = vga_io_rcrt(0x00); /* HorizontalTotal */
@@ -756,12 +727,11 @@ static void vga_vesa_blank(struct vga16fb_par *par, int mode)
756 727
757 /* assure that video is enabled */ 728 /* assure that video is enabled */
758 /* "0x20" is VIDEO_ENABLE_bit in register 01 of sequencer */ 729 /* "0x20" is VIDEO_ENABLE_bit in register 01 of sequencer */
759 //cli();
760 vga_io_wseq(0x01, par->vga_state.ClockingMode | 0x20); 730 vga_io_wseq(0x01, par->vga_state.ClockingMode | 0x20);
761 731
762 /* test for vertical retrace in process.... */ 732 /* test for vertical retrace in process.... */
763 if ((par->vga_state.CrtMiscIO & 0x80) == 0x80) 733 if ((par->vga_state.CrtMiscIO & 0x80) == 0x80)
764 vga_io_w(video_misc_wr, par->vga_state.CrtMiscIO & 0xef); 734 vga_io_w(VGA_MIS_W, par->vga_state.CrtMiscIO & 0xef);
765 735
766 /* 736 /*
767 * Set <End of vertical retrace> to minimum (0) and 737 * Set <End of vertical retrace> to minimum (0) and
@@ -769,12 +739,10 @@ static void vga_vesa_blank(struct vga16fb_par *par, int mode)
769 * Result: turn off vertical sync (VSync) pulse. 739 * Result: turn off vertical sync (VSync) pulse.
770 */ 740 */
771 if (mode & FB_BLANK_VSYNC_SUSPEND) { 741 if (mode & FB_BLANK_VSYNC_SUSPEND) {
772 outb_p(0x10,vga_video_port_reg); /* StartVertRetrace */ 742 vga_io_wcrt(VGA_CRTC_V_SYNC_START, 0xff);
773 outb_p(0xff,vga_video_port_val); /* maximum value */ 743 vga_io_wcrt(VGA_CRTC_V_SYNC_END, 0x40);
774 outb_p(0x11,vga_video_port_reg); /* EndVertRetrace */ 744 /* bits 9,10 of vert. retrace */
775 outb_p(0x40,vga_video_port_val); /* minimum (bits 0..3) */ 745 vga_io_wcrt(VGA_CRTC_OVERFLOW, par->vga_state.Overflow | 0x84);
776 outb_p(0x07,vga_video_port_reg); /* Overflow */
777 outb_p(par->vga_state.Overflow | 0x84,vga_video_port_val); /* bits 9,10 of vert. retrace */
778 } 746 }
779 747
780 if (mode & FB_BLANK_HSYNC_SUSPEND) { 748 if (mode & FB_BLANK_HSYNC_SUSPEND) {
@@ -783,29 +751,22 @@ static void vga_vesa_blank(struct vga16fb_par *par, int mode)
783 * <Start of horizontal Retrace> to maximum 751 * <Start of horizontal Retrace> to maximum
784 * Result: turn off horizontal sync (HSync) pulse. 752 * Result: turn off horizontal sync (HSync) pulse.
785 */ 753 */
786 outb_p(0x04,vga_video_port_reg); /* StartHorizRetrace */ 754 vga_io_wcrt(VGA_CRTC_H_SYNC_START, 0xff);
787 outb_p(0xff,vga_video_port_val); /* maximum */ 755 vga_io_wcrt(VGA_CRTC_H_SYNC_END, 0x00);
788 outb_p(0x05,vga_video_port_reg); /* EndHorizRetrace */
789 outb_p(0x00,vga_video_port_val); /* minimum (0) */
790 } 756 }
791 757
792 /* restore both index registers */ 758 /* restore both index registers */
793 outb_p(SeqCtrlIndex,seq_port_reg); 759 outb_p(SeqCtrlIndex, VGA_SEQ_I);
794 outb_p(CrtCtrlIndex,vga_video_port_reg); 760 outb_p(CrtCtrlIndex, VGA_CRT_IC);
795 //sti();
796} 761}
797 762
798static void vga_vesa_unblank(struct vga16fb_par *par) 763static void vga_vesa_unblank(struct vga16fb_par *par)
799{ 764{
800 unsigned char SeqCtrlIndex; 765 unsigned char SeqCtrlIndex = vga_io_r(VGA_SEQ_I);
801 unsigned char CrtCtrlIndex; 766 unsigned char CrtCtrlIndex = vga_io_r(VGA_CRT_IC);
802 767
803 //cli();
804 SeqCtrlIndex = vga_io_r(seq_port_reg);
805 CrtCtrlIndex = vga_io_r(vga_video_port_reg);
806
807 /* restore original values of VGA controller registers */ 768 /* restore original values of VGA controller registers */
808 vga_io_w(video_misc_wr, par->vga_state.CrtMiscIO); 769 vga_io_w(VGA_MIS_W, par->vga_state.CrtMiscIO);
809 770
810 /* HorizontalTotal */ 771 /* HorizontalTotal */
811 vga_io_wcrt(0x00, par->vga_state.HorizontalTotal); 772 vga_io_wcrt(0x00, par->vga_state.HorizontalTotal);
@@ -827,9 +788,8 @@ static void vga_vesa_unblank(struct vga16fb_par *par)
827 vga_io_wseq(0x01, par->vga_state.ClockingMode); 788 vga_io_wseq(0x01, par->vga_state.ClockingMode);
828 789
829 /* restore index/control registers */ 790 /* restore index/control registers */
830 vga_io_w(seq_port_reg, SeqCtrlIndex); 791 vga_io_w(VGA_SEQ_I, SeqCtrlIndex);
831 vga_io_w(vga_video_port_reg, CrtCtrlIndex); 792 vga_io_w(VGA_CRT_IC, CrtCtrlIndex);
832 //sti();
833} 793}
834 794
835static void vga_pal_blank(void) 795static void vga_pal_blank(void)
@@ -837,10 +797,10 @@ static void vga_pal_blank(void)
837 int i; 797 int i;
838 798
839 for (i=0; i<16; i++) { 799 for (i=0; i<16; i++) {
840 outb_p (i, dac_reg) ; 800 outb_p(i, VGA_PEL_IW);
841 outb_p (0, dac_val) ; 801 outb_p(0, VGA_PEL_D);
842 outb_p (0, dac_val) ; 802 outb_p(0, VGA_PEL_D);
843 outb_p (0, dac_val) ; 803 outb_p(0, VGA_PEL_D);
844 } 804 }
845} 805}
846 806
@@ -1485,6 +1445,7 @@ static void __exit vga16fb_exit(void)
1485 platform_driver_unregister(&vga16fb_driver); 1445 platform_driver_unregister(&vga16fb_driver);
1486} 1446}
1487 1447
1448MODULE_DESCRIPTION("Legacy VGA framebuffer device driver");
1488MODULE_LICENSE("GPL"); 1449MODULE_LICENSE("GPL");
1489module_init(vga16fb_init); 1450module_init(vga16fb_init);
1490module_exit(vga16fb_exit); 1451module_exit(vga16fb_exit);