diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-05 12:03:46 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-05 12:03:46 -0400 |
commit | cdd854bc42b5e6c79bbbc40c6600d995ffe6e747 (patch) | |
tree | 18c4dcc07bbb8aeb2b23bc812cd60cc293f36cd8 /drivers/video | |
parent | bbc4fd12a635492ad9d12bb418124fa2d5f0d734 (diff) | |
parent | 42a0ae2282b512d1a8f6f020327f5f7b8f31a5ea (diff) |
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (79 commits)
powerpc/8xx: Add support for the MPC8xx based boards from TQC
powerpc/85xx: Introduce support for the Freescale P1022DS reference board
powerpc/85xx: Adding DTS for the STx GP3-SSA MPC8555 board
powerpc/85xx: Change deprecated binding for 85xx-based boards
powerpc/tqm85xx: add a quirk for ti1520 PCMCIA bridge
powerpc/tqm85xx: update PCI interrupt-map attribute
powerpc/mpc8308rdb: support for MPC8308RDB board from Freescale
powerpc/fsl_pci: add quirk for mpc8308 pcie bridge
powerpc/85xx: Cleanup QE initialization for MPC85xxMDS boards
powerpc/85xx: Fix booting for P1021MDS boards
powerpc/85xx: Fix SWIOTLB initalization for MPC85xxMDS boards
powerpc/85xx: kexec for SMP 85xx BookE systems
powerpc/5200/i2c: improve i2c bus error recovery
of/xilinxfb: update tft compatible versions
powerpc/fsl-diu-fb: Support setting display mode using EDID
powerpc/5121: doc/dts-bindings: update doc of FSL DIU bindings
powerpc/5121: shared DIU framebuffer support
powerpc/5121: move fsl-diu-fb.h to include/linux
powerpc/5121: fsl-diu-fb: fix issue with re-enabling DIU area descriptor
powerpc/512x: add clock structure for Video-IN (VIU) unit
...
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/Kconfig | 1 | ||||
-rw-r--r-- | drivers/video/fsl-diu-fb.c | 137 | ||||
-rw-r--r-- | drivers/video/fsl-diu-fb.h | 223 | ||||
-rw-r--r-- | drivers/video/xilinxfb.c | 2 |
4 files changed, 116 insertions, 247 deletions
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 9e711a1d0d97..7b11ea68c80e 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig | |||
@@ -1871,6 +1871,7 @@ config FB_MBX_DEBUG | |||
1871 | config FB_FSL_DIU | 1871 | config FB_FSL_DIU |
1872 | tristate "Freescale DIU framebuffer support" | 1872 | tristate "Freescale DIU framebuffer support" |
1873 | depends on FB && FSL_SOC | 1873 | depends on FB && FSL_SOC |
1874 | select FB_MODE_HELPERS | ||
1874 | select FB_CFB_FILLRECT | 1875 | select FB_CFB_FILLRECT |
1875 | select FB_CFB_COPYAREA | 1876 | select FB_CFB_COPYAREA |
1876 | select FB_CFB_IMAGEBLIT | 1877 | select FB_CFB_IMAGEBLIT |
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c index 27455ce298b7..e38ad2224540 100644 --- a/drivers/video/fsl-diu-fb.c +++ b/drivers/video/fsl-diu-fb.c | |||
@@ -34,7 +34,8 @@ | |||
34 | #include <linux/of_platform.h> | 34 | #include <linux/of_platform.h> |
35 | 35 | ||
36 | #include <sysdev/fsl_soc.h> | 36 | #include <sysdev/fsl_soc.h> |
37 | #include "fsl-diu-fb.h" | 37 | #include <linux/fsl-diu-fb.h> |
38 | #include "edid.h" | ||
38 | 39 | ||
39 | /* | 40 | /* |
40 | * These parameters give default parameters | 41 | * These parameters give default parameters |
@@ -217,6 +218,7 @@ struct mfb_info { | |||
217 | int x_aoi_d; /* aoi display x offset to physical screen */ | 218 | int x_aoi_d; /* aoi display x offset to physical screen */ |
218 | int y_aoi_d; /* aoi display y offset to physical screen */ | 219 | int y_aoi_d; /* aoi display y offset to physical screen */ |
219 | struct fsl_diu_data *parent; | 220 | struct fsl_diu_data *parent; |
221 | u8 *edid_data; | ||
220 | }; | 222 | }; |
221 | 223 | ||
222 | 224 | ||
@@ -317,6 +319,17 @@ static void fsl_diu_free(void *virt, size_t size) | |||
317 | free_pages_exact(virt, size); | 319 | free_pages_exact(virt, size); |
318 | } | 320 | } |
319 | 321 | ||
322 | /* | ||
323 | * Workaround for failed writing desc register of planes. | ||
324 | * Needed with MPC5121 DIU rev 2.0 silicon. | ||
325 | */ | ||
326 | void wr_reg_wa(u32 *reg, u32 val) | ||
327 | { | ||
328 | do { | ||
329 | out_be32(reg, val); | ||
330 | } while (in_be32(reg) != val); | ||
331 | } | ||
332 | |||
320 | static int fsl_diu_enable_panel(struct fb_info *info) | 333 | static int fsl_diu_enable_panel(struct fb_info *info) |
321 | { | 334 | { |
322 | struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par; | 335 | struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par; |
@@ -330,7 +343,7 @@ static int fsl_diu_enable_panel(struct fb_info *info) | |||
330 | switch (mfbi->index) { | 343 | switch (mfbi->index) { |
331 | case 0: /* plane 0 */ | 344 | case 0: /* plane 0 */ |
332 | if (hw->desc[0] != ad->paddr) | 345 | if (hw->desc[0] != ad->paddr) |
333 | out_be32(&hw->desc[0], ad->paddr); | 346 | wr_reg_wa(&hw->desc[0], ad->paddr); |
334 | break; | 347 | break; |
335 | case 1: /* plane 1 AOI 0 */ | 348 | case 1: /* plane 1 AOI 0 */ |
336 | cmfbi = machine_data->fsl_diu_info[2]->par; | 349 | cmfbi = machine_data->fsl_diu_info[2]->par; |
@@ -340,7 +353,7 @@ static int fsl_diu_enable_panel(struct fb_info *info) | |||
340 | cpu_to_le32(cmfbi->ad->paddr); | 353 | cpu_to_le32(cmfbi->ad->paddr); |
341 | else | 354 | else |
342 | ad->next_ad = 0; | 355 | ad->next_ad = 0; |
343 | out_be32(&hw->desc[1], ad->paddr); | 356 | wr_reg_wa(&hw->desc[1], ad->paddr); |
344 | } | 357 | } |
345 | break; | 358 | break; |
346 | case 3: /* plane 2 AOI 0 */ | 359 | case 3: /* plane 2 AOI 0 */ |
@@ -351,14 +364,14 @@ static int fsl_diu_enable_panel(struct fb_info *info) | |||
351 | cpu_to_le32(cmfbi->ad->paddr); | 364 | cpu_to_le32(cmfbi->ad->paddr); |
352 | else | 365 | else |
353 | ad->next_ad = 0; | 366 | ad->next_ad = 0; |
354 | out_be32(&hw->desc[2], ad->paddr); | 367 | wr_reg_wa(&hw->desc[2], ad->paddr); |
355 | } | 368 | } |
356 | break; | 369 | break; |
357 | case 2: /* plane 1 AOI 1 */ | 370 | case 2: /* plane 1 AOI 1 */ |
358 | pmfbi = machine_data->fsl_diu_info[1]->par; | 371 | pmfbi = machine_data->fsl_diu_info[1]->par; |
359 | ad->next_ad = 0; | 372 | ad->next_ad = 0; |
360 | if (hw->desc[1] == machine_data->dummy_ad->paddr) | 373 | if (hw->desc[1] == machine_data->dummy_ad->paddr) |
361 | out_be32(&hw->desc[1], ad->paddr); | 374 | wr_reg_wa(&hw->desc[1], ad->paddr); |
362 | else /* AOI0 open */ | 375 | else /* AOI0 open */ |
363 | pmfbi->ad->next_ad = cpu_to_le32(ad->paddr); | 376 | pmfbi->ad->next_ad = cpu_to_le32(ad->paddr); |
364 | break; | 377 | break; |
@@ -366,7 +379,7 @@ static int fsl_diu_enable_panel(struct fb_info *info) | |||
366 | pmfbi = machine_data->fsl_diu_info[3]->par; | 379 | pmfbi = machine_data->fsl_diu_info[3]->par; |
367 | ad->next_ad = 0; | 380 | ad->next_ad = 0; |
368 | if (hw->desc[2] == machine_data->dummy_ad->paddr) | 381 | if (hw->desc[2] == machine_data->dummy_ad->paddr) |
369 | out_be32(&hw->desc[2], ad->paddr); | 382 | wr_reg_wa(&hw->desc[2], ad->paddr); |
370 | else /* AOI0 was open */ | 383 | else /* AOI0 was open */ |
371 | pmfbi->ad->next_ad = cpu_to_le32(ad->paddr); | 384 | pmfbi->ad->next_ad = cpu_to_le32(ad->paddr); |
372 | break; | 385 | break; |
@@ -390,27 +403,24 @@ static int fsl_diu_disable_panel(struct fb_info *info) | |||
390 | switch (mfbi->index) { | 403 | switch (mfbi->index) { |
391 | case 0: /* plane 0 */ | 404 | case 0: /* plane 0 */ |
392 | if (hw->desc[0] != machine_data->dummy_ad->paddr) | 405 | if (hw->desc[0] != machine_data->dummy_ad->paddr) |
393 | out_be32(&hw->desc[0], | 406 | wr_reg_wa(&hw->desc[0], machine_data->dummy_ad->paddr); |
394 | machine_data->dummy_ad->paddr); | ||
395 | break; | 407 | break; |
396 | case 1: /* plane 1 AOI 0 */ | 408 | case 1: /* plane 1 AOI 0 */ |
397 | cmfbi = machine_data->fsl_diu_info[2]->par; | 409 | cmfbi = machine_data->fsl_diu_info[2]->par; |
398 | if (cmfbi->count > 0) /* AOI1 is open */ | 410 | if (cmfbi->count > 0) /* AOI1 is open */ |
399 | out_be32(&hw->desc[1], cmfbi->ad->paddr); | 411 | wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr); |
400 | /* move AOI1 to the first */ | 412 | /* move AOI1 to the first */ |
401 | else /* AOI1 was closed */ | 413 | else /* AOI1 was closed */ |
402 | out_be32(&hw->desc[1], | 414 | wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr); |
403 | machine_data->dummy_ad->paddr); | ||
404 | /* close AOI 0 */ | 415 | /* close AOI 0 */ |
405 | break; | 416 | break; |
406 | case 3: /* plane 2 AOI 0 */ | 417 | case 3: /* plane 2 AOI 0 */ |
407 | cmfbi = machine_data->fsl_diu_info[4]->par; | 418 | cmfbi = machine_data->fsl_diu_info[4]->par; |
408 | if (cmfbi->count > 0) /* AOI1 is open */ | 419 | if (cmfbi->count > 0) /* AOI1 is open */ |
409 | out_be32(&hw->desc[2], cmfbi->ad->paddr); | 420 | wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr); |
410 | /* move AOI1 to the first */ | 421 | /* move AOI1 to the first */ |
411 | else /* AOI1 was closed */ | 422 | else /* AOI1 was closed */ |
412 | out_be32(&hw->desc[2], | 423 | wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr); |
413 | machine_data->dummy_ad->paddr); | ||
414 | /* close AOI 0 */ | 424 | /* close AOI 0 */ |
415 | break; | 425 | break; |
416 | case 2: /* plane 1 AOI 1 */ | 426 | case 2: /* plane 1 AOI 1 */ |
@@ -421,7 +431,7 @@ static int fsl_diu_disable_panel(struct fb_info *info) | |||
421 | /* AOI0 is open, must be the first */ | 431 | /* AOI0 is open, must be the first */ |
422 | pmfbi->ad->next_ad = 0; | 432 | pmfbi->ad->next_ad = 0; |
423 | } else /* AOI1 is the first in the chain */ | 433 | } else /* AOI1 is the first in the chain */ |
424 | out_be32(&hw->desc[1], machine_data->dummy_ad->paddr); | 434 | wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr); |
425 | /* close AOI 1 */ | 435 | /* close AOI 1 */ |
426 | break; | 436 | break; |
427 | case 4: /* plane 2 AOI 1 */ | 437 | case 4: /* plane 2 AOI 1 */ |
@@ -432,7 +442,7 @@ static int fsl_diu_disable_panel(struct fb_info *info) | |||
432 | /* AOI0 is open, must be the first */ | 442 | /* AOI0 is open, must be the first */ |
433 | pmfbi->ad->next_ad = 0; | 443 | pmfbi->ad->next_ad = 0; |
434 | } else /* AOI1 is the first in the chain */ | 444 | } else /* AOI1 is the first in the chain */ |
435 | out_be32(&hw->desc[2], machine_data->dummy_ad->paddr); | 445 | wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr); |
436 | /* close AOI 1 */ | 446 | /* close AOI 1 */ |
437 | break; | 447 | break; |
438 | default: | 448 | default: |
@@ -1100,6 +1110,10 @@ static int fsl_diu_open(struct fb_info *info, int user) | |||
1100 | struct mfb_info *mfbi = info->par; | 1110 | struct mfb_info *mfbi = info->par; |
1101 | int res = 0; | 1111 | int res = 0; |
1102 | 1112 | ||
1113 | /* free boot splash memory on first /dev/fb0 open */ | ||
1114 | if (!mfbi->index && diu_ops.release_bootmem) | ||
1115 | diu_ops.release_bootmem(); | ||
1116 | |||
1103 | spin_lock(&diu_lock); | 1117 | spin_lock(&diu_lock); |
1104 | mfbi->count++; | 1118 | mfbi->count++; |
1105 | if (mfbi->count == 1) { | 1119 | if (mfbi->count == 1) { |
@@ -1173,18 +1187,30 @@ static int __devinit install_fb(struct fb_info *info) | |||
1173 | int rc; | 1187 | int rc; |
1174 | struct mfb_info *mfbi = info->par; | 1188 | struct mfb_info *mfbi = info->par; |
1175 | const char *aoi_mode, *init_aoi_mode = "320x240"; | 1189 | const char *aoi_mode, *init_aoi_mode = "320x240"; |
1190 | struct fb_videomode *db = fsl_diu_mode_db; | ||
1191 | unsigned int dbsize = ARRAY_SIZE(fsl_diu_mode_db); | ||
1192 | int has_default_mode = 1; | ||
1176 | 1193 | ||
1177 | if (init_fbinfo(info)) | 1194 | if (init_fbinfo(info)) |
1178 | return -EINVAL; | 1195 | return -EINVAL; |
1179 | 1196 | ||
1180 | if (mfbi->index == 0) /* plane 0 */ | 1197 | if (mfbi->index == 0) { /* plane 0 */ |
1198 | if (mfbi->edid_data) { | ||
1199 | /* Now build modedb from EDID */ | ||
1200 | fb_edid_to_monspecs(mfbi->edid_data, &info->monspecs); | ||
1201 | fb_videomode_to_modelist(info->monspecs.modedb, | ||
1202 | info->monspecs.modedb_len, | ||
1203 | &info->modelist); | ||
1204 | db = info->monspecs.modedb; | ||
1205 | dbsize = info->monspecs.modedb_len; | ||
1206 | } | ||
1181 | aoi_mode = fb_mode; | 1207 | aoi_mode = fb_mode; |
1182 | else | 1208 | } else { |
1183 | aoi_mode = init_aoi_mode; | 1209 | aoi_mode = init_aoi_mode; |
1210 | } | ||
1184 | pr_debug("mode used = %s\n", aoi_mode); | 1211 | pr_debug("mode used = %s\n", aoi_mode); |
1185 | rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db, | 1212 | rc = fb_find_mode(&info->var, info, aoi_mode, db, dbsize, |
1186 | ARRAY_SIZE(fsl_diu_mode_db), &fsl_diu_default_mode, default_bpp); | 1213 | &fsl_diu_default_mode, default_bpp); |
1187 | |||
1188 | switch (rc) { | 1214 | switch (rc) { |
1189 | case 1: | 1215 | case 1: |
1190 | pr_debug("using mode specified in @mode\n"); | 1216 | pr_debug("using mode specified in @mode\n"); |
@@ -1202,10 +1228,50 @@ static int __devinit install_fb(struct fb_info *info) | |||
1202 | default: | 1228 | default: |
1203 | pr_debug("rc = %d\n", rc); | 1229 | pr_debug("rc = %d\n", rc); |
1204 | pr_debug("failed to find mode\n"); | 1230 | pr_debug("failed to find mode\n"); |
1205 | return -EINVAL; | 1231 | /* |
1232 | * For plane 0 we continue and look into | ||
1233 | * driver's internal modedb. | ||
1234 | */ | ||
1235 | if (mfbi->index == 0 && mfbi->edid_data) | ||
1236 | has_default_mode = 0; | ||
1237 | else | ||
1238 | return -EINVAL; | ||
1206 | break; | 1239 | break; |
1207 | } | 1240 | } |
1208 | 1241 | ||
1242 | if (!has_default_mode) { | ||
1243 | rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db, | ||
1244 | ARRAY_SIZE(fsl_diu_mode_db), | ||
1245 | &fsl_diu_default_mode, | ||
1246 | default_bpp); | ||
1247 | if (rc > 0 && rc < 5) | ||
1248 | has_default_mode = 1; | ||
1249 | } | ||
1250 | |||
1251 | /* Still not found, use preferred mode from database if any */ | ||
1252 | if (!has_default_mode && info->monspecs.modedb) { | ||
1253 | struct fb_monspecs *specs = &info->monspecs; | ||
1254 | struct fb_videomode *modedb = &specs->modedb[0]; | ||
1255 | |||
1256 | /* | ||
1257 | * Get preferred timing. If not found, | ||
1258 | * first mode in database will be used. | ||
1259 | */ | ||
1260 | if (specs->misc & FB_MISC_1ST_DETAIL) { | ||
1261 | int i; | ||
1262 | |||
1263 | for (i = 0; i < specs->modedb_len; i++) { | ||
1264 | if (specs->modedb[i].flag & FB_MODE_IS_FIRST) { | ||
1265 | modedb = &specs->modedb[i]; | ||
1266 | break; | ||
1267 | } | ||
1268 | } | ||
1269 | } | ||
1270 | |||
1271 | info->var.bits_per_pixel = default_bpp; | ||
1272 | fb_videomode_to_var(&info->var, modedb); | ||
1273 | } | ||
1274 | |||
1209 | pr_debug("xres_virtual %d\n", info->var.xres_virtual); | 1275 | pr_debug("xres_virtual %d\n", info->var.xres_virtual); |
1210 | pr_debug("bits_per_pixel %d\n", info->var.bits_per_pixel); | 1276 | pr_debug("bits_per_pixel %d\n", info->var.bits_per_pixel); |
1211 | 1277 | ||
@@ -1244,6 +1310,9 @@ static void uninstall_fb(struct fb_info *info) | |||
1244 | if (!mfbi->registered) | 1310 | if (!mfbi->registered) |
1245 | return; | 1311 | return; |
1246 | 1312 | ||
1313 | if (mfbi->index == 0) | ||
1314 | kfree(mfbi->edid_data); | ||
1315 | |||
1247 | unregister_framebuffer(info); | 1316 | unregister_framebuffer(info); |
1248 | unmap_video_memory(info); | 1317 | unmap_video_memory(info); |
1249 | if (&info->cmap) | 1318 | if (&info->cmap) |
@@ -1427,6 +1496,7 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev, | |||
1427 | int ret, i, error = 0; | 1496 | int ret, i, error = 0; |
1428 | struct resource res; | 1497 | struct resource res; |
1429 | struct fsl_diu_data *machine_data; | 1498 | struct fsl_diu_data *machine_data; |
1499 | int diu_mode; | ||
1430 | 1500 | ||
1431 | machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL); | 1501 | machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL); |
1432 | if (!machine_data) | 1502 | if (!machine_data) |
@@ -1443,6 +1513,17 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev, | |||
1443 | mfbi = machine_data->fsl_diu_info[i]->par; | 1513 | mfbi = machine_data->fsl_diu_info[i]->par; |
1444 | memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info)); | 1514 | memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info)); |
1445 | mfbi->parent = machine_data; | 1515 | mfbi->parent = machine_data; |
1516 | |||
1517 | if (mfbi->index == 0) { | ||
1518 | const u8 *prop; | ||
1519 | int len; | ||
1520 | |||
1521 | /* Get EDID */ | ||
1522 | prop = of_get_property(np, "edid", &len); | ||
1523 | if (prop && len == EDID_LENGTH) | ||
1524 | mfbi->edid_data = kmemdup(prop, EDID_LENGTH, | ||
1525 | GFP_KERNEL); | ||
1526 | } | ||
1446 | } | 1527 | } |
1447 | 1528 | ||
1448 | ret = of_address_to_resource(np, 0, &res); | 1529 | ret = of_address_to_resource(np, 0, &res); |
@@ -1463,7 +1544,9 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev, | |||
1463 | goto error2; | 1544 | goto error2; |
1464 | } | 1545 | } |
1465 | 1546 | ||
1466 | out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU anyway*/ | 1547 | diu_mode = in_be32(&dr.diu_reg->diu_mode); |
1548 | if (diu_mode != MFB_MODE1) | ||
1549 | out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU */ | ||
1467 | 1550 | ||
1468 | /* Get the IRQ of the DIU */ | 1551 | /* Get the IRQ of the DIU */ |
1469 | machine_data->irq = irq_of_parse_and_map(np, 0); | 1552 | machine_data->irq = irq_of_parse_and_map(np, 0); |
@@ -1511,7 +1594,13 @@ static int __devinit fsl_diu_probe(struct of_device *ofdev, | |||
1511 | machine_data->dummy_ad->offset_xyd = 0; | 1594 | machine_data->dummy_ad->offset_xyd = 0; |
1512 | machine_data->dummy_ad->next_ad = 0; | 1595 | machine_data->dummy_ad->next_ad = 0; |
1513 | 1596 | ||
1514 | out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr); | 1597 | /* |
1598 | * Let DIU display splash screen if it was pre-initialized | ||
1599 | * by the bootloader, set dummy area descriptor otherwise. | ||
1600 | */ | ||
1601 | if (diu_mode != MFB_MODE1) | ||
1602 | out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr); | ||
1603 | |||
1515 | out_be32(&dr.diu_reg->desc[1], machine_data->dummy_ad->paddr); | 1604 | out_be32(&dr.diu_reg->desc[1], machine_data->dummy_ad->paddr); |
1516 | out_be32(&dr.diu_reg->desc[2], machine_data->dummy_ad->paddr); | 1605 | out_be32(&dr.diu_reg->desc[2], machine_data->dummy_ad->paddr); |
1517 | 1606 | ||
diff --git a/drivers/video/fsl-diu-fb.h b/drivers/video/fsl-diu-fb.h deleted file mode 100644 index fc295d7ea463..000000000000 --- a/drivers/video/fsl-diu-fb.h +++ /dev/null | |||
@@ -1,223 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | * | ||
4 | * Freescale DIU Frame Buffer device driver | ||
5 | * | ||
6 | * Authors: Hongjun Chen <hong-jun.chen@freescale.com> | ||
7 | * Paul Widmer <paul.widmer@freescale.com> | ||
8 | * Srikanth Srinivasan <srikanth.srinivasan@freescale.com> | ||
9 | * York Sun <yorksun@freescale.com> | ||
10 | * | ||
11 | * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify it | ||
14 | * under the terms of the GNU General Public License as published by the | ||
15 | * Free Software Foundation; either version 2 of the License, or (at your | ||
16 | * option) any later version. | ||
17 | * | ||
18 | */ | ||
19 | |||
20 | #ifndef __FSL_DIU_FB_H__ | ||
21 | #define __FSL_DIU_FB_H__ | ||
22 | |||
23 | /* Arbitrary threshold to determine the allocation method | ||
24 | * See mpc8610fb_set_par(), map_video_memory(), and unmap_video_memory() | ||
25 | */ | ||
26 | #define MEM_ALLOC_THRESHOLD (1024*768*4+32) | ||
27 | /* Minimum value that the pixel clock can be set to in pico seconds | ||
28 | * This is determined by platform clock/3 where the minimum platform | ||
29 | * clock is 533MHz. This gives 5629 pico seconds. | ||
30 | */ | ||
31 | #define MIN_PIX_CLK 5629 | ||
32 | #define MAX_PIX_CLK 96096 | ||
33 | |||
34 | #include <linux/types.h> | ||
35 | |||
36 | struct mfb_alpha { | ||
37 | int enable; | ||
38 | int alpha; | ||
39 | }; | ||
40 | |||
41 | struct mfb_chroma_key { | ||
42 | int enable; | ||
43 | __u8 red_max; | ||
44 | __u8 green_max; | ||
45 | __u8 blue_max; | ||
46 | __u8 red_min; | ||
47 | __u8 green_min; | ||
48 | __u8 blue_min; | ||
49 | }; | ||
50 | |||
51 | struct aoi_display_offset { | ||
52 | int x_aoi_d; | ||
53 | int y_aoi_d; | ||
54 | }; | ||
55 | |||
56 | #define MFB_SET_CHROMA_KEY _IOW('M', 1, struct mfb_chroma_key) | ||
57 | #define MFB_WAIT_FOR_VSYNC _IOW('F', 0x20, u_int32_t) | ||
58 | #define MFB_SET_BRIGHTNESS _IOW('M', 3, __u8) | ||
59 | |||
60 | #define MFB_SET_ALPHA 0x80014d00 | ||
61 | #define MFB_GET_ALPHA 0x40014d00 | ||
62 | #define MFB_SET_AOID 0x80084d04 | ||
63 | #define MFB_GET_AOID 0x40084d04 | ||
64 | #define MFB_SET_PIXFMT 0x80014d08 | ||
65 | #define MFB_GET_PIXFMT 0x40014d08 | ||
66 | |||
67 | #define FBIOGET_GWINFO 0x46E0 | ||
68 | #define FBIOPUT_GWINFO 0x46E1 | ||
69 | |||
70 | #ifdef __KERNEL__ | ||
71 | #include <linux/spinlock.h> | ||
72 | |||
73 | /* | ||
74 | * These are the fields of area descriptor(in DDR memory) for every plane | ||
75 | */ | ||
76 | struct diu_ad { | ||
77 | /* Word 0(32-bit) in DDR memory */ | ||
78 | /* __u16 comp; */ | ||
79 | /* __u16 pixel_s:2; */ | ||
80 | /* __u16 pallete:1; */ | ||
81 | /* __u16 red_c:2; */ | ||
82 | /* __u16 green_c:2; */ | ||
83 | /* __u16 blue_c:2; */ | ||
84 | /* __u16 alpha_c:3; */ | ||
85 | /* __u16 byte_f:1; */ | ||
86 | /* __u16 res0:3; */ | ||
87 | |||
88 | __be32 pix_fmt; /* hard coding pixel format */ | ||
89 | |||
90 | /* Word 1(32-bit) in DDR memory */ | ||
91 | __le32 addr; | ||
92 | |||
93 | /* Word 2(32-bit) in DDR memory */ | ||
94 | /* __u32 delta_xs:11; */ | ||
95 | /* __u32 res1:1; */ | ||
96 | /* __u32 delta_ys:11; */ | ||
97 | /* __u32 res2:1; */ | ||
98 | /* __u32 g_alpha:8; */ | ||
99 | __le32 src_size_g_alpha; | ||
100 | |||
101 | /* Word 3(32-bit) in DDR memory */ | ||
102 | /* __u32 delta_xi:11; */ | ||
103 | /* __u32 res3:5; */ | ||
104 | /* __u32 delta_yi:11; */ | ||
105 | /* __u32 res4:3; */ | ||
106 | /* __u32 flip:2; */ | ||
107 | __le32 aoi_size; | ||
108 | |||
109 | /* Word 4(32-bit) in DDR memory */ | ||
110 | /*__u32 offset_xi:11; | ||
111 | __u32 res5:5; | ||
112 | __u32 offset_yi:11; | ||
113 | __u32 res6:5; | ||
114 | */ | ||
115 | __le32 offset_xyi; | ||
116 | |||
117 | /* Word 5(32-bit) in DDR memory */ | ||
118 | /*__u32 offset_xd:11; | ||
119 | __u32 res7:5; | ||
120 | __u32 offset_yd:11; | ||
121 | __u32 res8:5; */ | ||
122 | __le32 offset_xyd; | ||
123 | |||
124 | |||
125 | /* Word 6(32-bit) in DDR memory */ | ||
126 | __u8 ckmax_r; | ||
127 | __u8 ckmax_g; | ||
128 | __u8 ckmax_b; | ||
129 | __u8 res9; | ||
130 | |||
131 | /* Word 7(32-bit) in DDR memory */ | ||
132 | __u8 ckmin_r; | ||
133 | __u8 ckmin_g; | ||
134 | __u8 ckmin_b; | ||
135 | __u8 res10; | ||
136 | /* __u32 res10:8; */ | ||
137 | |||
138 | /* Word 8(32-bit) in DDR memory */ | ||
139 | __le32 next_ad; | ||
140 | |||
141 | /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */ | ||
142 | __u32 paddr; | ||
143 | } __attribute__ ((packed)); | ||
144 | |||
145 | /* DIU register map */ | ||
146 | struct diu { | ||
147 | __be32 desc[3]; | ||
148 | __be32 gamma; | ||
149 | __be32 pallete; | ||
150 | __be32 cursor; | ||
151 | __be32 curs_pos; | ||
152 | __be32 diu_mode; | ||
153 | __be32 bgnd; | ||
154 | __be32 bgnd_wb; | ||
155 | __be32 disp_size; | ||
156 | __be32 wb_size; | ||
157 | __be32 wb_mem_addr; | ||
158 | __be32 hsyn_para; | ||
159 | __be32 vsyn_para; | ||
160 | __be32 syn_pol; | ||
161 | __be32 thresholds; | ||
162 | __be32 int_status; | ||
163 | __be32 int_mask; | ||
164 | __be32 colorbar[8]; | ||
165 | __be32 filling; | ||
166 | __be32 plut; | ||
167 | } __attribute__ ((packed)); | ||
168 | |||
169 | struct diu_hw { | ||
170 | struct diu *diu_reg; | ||
171 | spinlock_t reg_lock; | ||
172 | |||
173 | __u32 mode; /* DIU operation mode */ | ||
174 | }; | ||
175 | |||
176 | struct diu_addr { | ||
177 | __u8 __iomem *vaddr; /* Virtual address */ | ||
178 | dma_addr_t paddr; /* Physical address */ | ||
179 | __u32 offset; | ||
180 | }; | ||
181 | |||
182 | struct diu_pool { | ||
183 | struct diu_addr ad; | ||
184 | struct diu_addr gamma; | ||
185 | struct diu_addr pallete; | ||
186 | struct diu_addr cursor; | ||
187 | }; | ||
188 | |||
189 | #define FSL_DIU_BASE_OFFSET 0x2C000 /* Offset of DIU */ | ||
190 | #define INT_LCDC 64 /* DIU interrupt number */ | ||
191 | |||
192 | #define FSL_AOI_NUM 6 /* 5 AOIs and one dummy AOI */ | ||
193 | /* 1 for plane 0, 2 for plane 1&2 each */ | ||
194 | |||
195 | /* Minimum X and Y resolutions */ | ||
196 | #define MIN_XRES 64 | ||
197 | #define MIN_YRES 64 | ||
198 | |||
199 | /* HW cursor parameters */ | ||
200 | #define MAX_CURS 32 | ||
201 | |||
202 | /* Modes of operation of DIU */ | ||
203 | #define MFB_MODE0 0 /* DIU off */ | ||
204 | #define MFB_MODE1 1 /* All three planes output to display */ | ||
205 | #define MFB_MODE2 2 /* Plane 1 to display, planes 2+3 written back*/ | ||
206 | #define MFB_MODE3 3 /* All three planes written back to memory */ | ||
207 | #define MFB_MODE4 4 /* Color bar generation */ | ||
208 | |||
209 | /* INT_STATUS/INT_MASK field descriptions */ | ||
210 | #define INT_VSYNC 0x01 /* Vsync interrupt */ | ||
211 | #define INT_VSYNC_WB 0x02 /* Vsync interrupt for write back operation */ | ||
212 | #define INT_UNDRUN 0x04 /* Under run exception interrupt */ | ||
213 | #define INT_PARERR 0x08 /* Display parameters error interrupt */ | ||
214 | #define INT_LS_BF_VS 0x10 /* Lines before vsync. interrupt */ | ||
215 | |||
216 | /* Panels'operation modes */ | ||
217 | #define MFB_TYPE_OUTPUT 0 /* Panel output to display */ | ||
218 | #define MFB_TYPE_OFF 1 /* Panel off */ | ||
219 | #define MFB_TYPE_WB 2 /* Panel written back to memory */ | ||
220 | #define MFB_TYPE_TEST 3 /* Panel generate color bar */ | ||
221 | |||
222 | #endif /* __KERNEL__ */ | ||
223 | #endif /* __FSL_DIU_FB_H__ */ | ||
diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c index 574dc54e12d4..29b5daacc217 100644 --- a/drivers/video/xilinxfb.c +++ b/drivers/video/xilinxfb.c | |||
@@ -485,6 +485,8 @@ static int __devexit xilinxfb_of_remove(struct of_device *op) | |||
485 | /* Match table for of_platform binding */ | 485 | /* Match table for of_platform binding */ |
486 | static struct of_device_id xilinxfb_of_match[] __devinitdata = { | 486 | static struct of_device_id xilinxfb_of_match[] __devinitdata = { |
487 | { .compatible = "xlnx,xps-tft-1.00.a", }, | 487 | { .compatible = "xlnx,xps-tft-1.00.a", }, |
488 | { .compatible = "xlnx,xps-tft-2.00.a", }, | ||
489 | { .compatible = "xlnx,xps-tft-2.01.a", }, | ||
488 | { .compatible = "xlnx,plb-tft-cntlr-ref-1.00.a", }, | 490 | { .compatible = "xlnx,plb-tft-cntlr-ref-1.00.a", }, |
489 | { .compatible = "xlnx,plb-dvi-cntlr-ref-1.00.c", }, | 491 | { .compatible = "xlnx,plb-dvi-cntlr-ref-1.00.c", }, |
490 | {}, | 492 | {}, |