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authorAntonino A. Daplas <adaplas@gmail.com>2006-06-26 03:26:40 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-26 12:58:30 -0400
commit313ca22f0bfab792adeb447146d9cb86536c64d3 (patch)
tree2a8855eec50beef14a6a4e4ea122cae3e16c9c4f /drivers/video
parentf71689e4139a91c98cc476240aca40bd091d4538 (diff)
[PATCH] vesafb: Fix return code of vesafb_setcolreg
If the hardware palette cannot be accessed, make vesafb_setcolreg return a nonzero value. Signed-off-by: Antonino Daplas <adaplas@pol.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/video')
-rw-r--r--drivers/video/vesafb.c16
1 files changed, 11 insertions, 5 deletions
diff --git a/drivers/video/vesafb.c b/drivers/video/vesafb.c
index 2fbaa8484f8a..eff2ebcf1f7c 100644
--- a/drivers/video/vesafb.c
+++ b/drivers/video/vesafb.c
@@ -80,10 +80,11 @@ static int vesafb_pan_display(struct fb_var_screeninfo *var,
80 return 0; 80 return 0;
81} 81}
82 82
83static void vesa_setpalette(int regno, unsigned red, unsigned green, 83static int vesa_setpalette(int regno, unsigned red, unsigned green,
84 unsigned blue) 84 unsigned blue)
85{ 85{
86 int shift = 16 - depth; 86 int shift = 16 - depth;
87 int err = -EINVAL;
87 88
88#ifdef __i386__ 89#ifdef __i386__
89 struct { u_char blue, green, red, pad; } entry; 90 struct { u_char blue, green, red, pad; } entry;
@@ -102,7 +103,7 @@ static void vesa_setpalette(int regno, unsigned red, unsigned green,
102 "d" (regno), /* EDX */ 103 "d" (regno), /* EDX */
103 "D" (&entry), /* EDI */ 104 "D" (&entry), /* EDI */
104 "S" (&pmi_pal)); /* ESI */ 105 "S" (&pmi_pal)); /* ESI */
105 return; 106 err = 0;
106 } 107 }
107#endif 108#endif
108 109
@@ -110,18 +111,23 @@ static void vesa_setpalette(int regno, unsigned red, unsigned green,
110 * without protected mode interface and if VGA compatible, 111 * without protected mode interface and if VGA compatible,
111 * try VGA registers... 112 * try VGA registers...
112 */ 113 */
113 if (vga_compat) { 114 if (err && vga_compat) {
114 outb_p(regno, dac_reg); 115 outb_p(regno, dac_reg);
115 outb_p(red >> shift, dac_val); 116 outb_p(red >> shift, dac_val);
116 outb_p(green >> shift, dac_val); 117 outb_p(green >> shift, dac_val);
117 outb_p(blue >> shift, dac_val); 118 outb_p(blue >> shift, dac_val);
119 err = 0;
118 } 120 }
121
122 return err;
119} 123}
120 124
121static int vesafb_setcolreg(unsigned regno, unsigned red, unsigned green, 125static int vesafb_setcolreg(unsigned regno, unsigned red, unsigned green,
122 unsigned blue, unsigned transp, 126 unsigned blue, unsigned transp,
123 struct fb_info *info) 127 struct fb_info *info)
124{ 128{
129 int err = 0;
130
125 /* 131 /*
126 * Set a single color register. The values supplied are 132 * Set a single color register. The values supplied are
127 * already rounded down to the hardware's capabilities 133 * already rounded down to the hardware's capabilities
@@ -133,7 +139,7 @@ static int vesafb_setcolreg(unsigned regno, unsigned red, unsigned green,
133 return 1; 139 return 1;
134 140
135 if (info->var.bits_per_pixel == 8) 141 if (info->var.bits_per_pixel == 8)
136 vesa_setpalette(regno,red,green,blue); 142 err = vesa_setpalette(regno,red,green,blue);
137 else if (regno < 16) { 143 else if (regno < 16) {
138 switch (info->var.bits_per_pixel) { 144 switch (info->var.bits_per_pixel) {
139 case 16: 145 case 16:
@@ -164,7 +170,7 @@ static int vesafb_setcolreg(unsigned regno, unsigned red, unsigned green,
164 } 170 }
165 } 171 }
166 172
167 return 0; 173 return err;
168} 174}
169 175
170static struct fb_ops vesafb_ops = { 176static struct fb_ops vesafb_ops = {