diff options
author | Dave Airlie <airlied@linux.ie> | 2006-03-20 05:22:09 -0500 |
---|---|---|
committer | Dave Airlie <airlied@linux.ie> | 2006-04-02 21:43:28 -0400 |
commit | 16109b3f4c1f2635afd32eb6d49348590de2cb25 (patch) | |
tree | 6a8777173acbc8d41fdcce615b899446eba8053b /drivers/video | |
parent | 8492f081e5552ff388068f612eae6f55f7210ed4 (diff) |
intelfb: add p divisor increments for i9xx.
Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/intelfb/intelfbhw.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/video/intelfb/intelfbhw.c b/drivers/video/intelfb/intelfbhw.c index d52921931a3e..9a2d8cb4d400 100644 --- a/drivers/video/intelfb/intelfbhw.c +++ b/drivers/video/intelfb/intelfbhw.c | |||
@@ -49,6 +49,7 @@ struct pll_min_max { | |||
49 | int min_p1, max_p1; | 49 | int min_p1, max_p1; |
50 | int min_vco_freq, max_vco_freq; | 50 | int min_vco_freq, max_vco_freq; |
51 | int p_transition_clock; | 51 | int p_transition_clock; |
52 | int p_inc_lo, p_inc_hi; | ||
52 | }; | 53 | }; |
53 | 54 | ||
54 | #define PLLS_I8xx 0 | 55 | #define PLLS_I8xx 0 |
@@ -56,8 +57,8 @@ struct pll_min_max { | |||
56 | #define PLLS_MAX 2 | 57 | #define PLLS_MAX 2 |
57 | 58 | ||
58 | struct pll_min_max plls[PLLS_MAX] = { | 59 | struct pll_min_max plls[PLLS_MAX] = { |
59 | { 108, 140, 18, 26, 6, 16, 3, 16, 4, 128, 0, 31, 930000, 1400000, 165000 }, //I8xx | 60 | { 108, 140, 18, 26, 6, 16, 3, 16, 4, 128, 0, 31, 930000, 1400000, 165000, 4, 22 }, //I8xx |
60 | { 75, 120, 10, 20, 5, 9, 4, 7, 5, 80, 1, 8, 930000, 2800000, 200000 } //I9xx | 61 | { 75, 120, 10, 20, 5, 9, 4, 7, 5, 80, 1, 8, 930000, 2800000, 200000, 10, 5 } //I9xx |
61 | }; | 62 | }; |
62 | 63 | ||
63 | int | 64 | int |
@@ -822,15 +823,15 @@ calc_pll_params(int index, int clock, u32 *retm1, u32 *retm2, u32 *retn, u32 *re | |||
822 | div_min = ROUND_UP_TO(plls[index].min_vco_freq, clock) / clock; | 823 | div_min = ROUND_UP_TO(plls[index].min_vco_freq, clock) / clock; |
823 | 824 | ||
824 | if (clock <= plls[index].p_transition_clock) | 825 | if (clock <= plls[index].p_transition_clock) |
825 | p_inc = 4; | 826 | p_inc = plls[index].p_inc_lo; |
826 | else | 827 | else |
827 | p_inc = 2; | 828 | p_inc = plls[index].p_inc_hi; |
828 | p_min = ROUND_UP_TO(div_min, p_inc); | 829 | p_min = ROUND_UP_TO(div_min, p_inc); |
829 | p_max = ROUND_DOWN_TO(div_max, p_inc); | 830 | p_max = ROUND_DOWN_TO(div_max, p_inc); |
830 | if (p_min < plls[index].min_p) | 831 | if (p_min < plls[index].min_p) |
831 | p_min = 4; | 832 | p_min = plls[index].min_p; |
832 | if (p_max > plls[index].max_p) | 833 | if (p_max > plls[index].max_p) |
833 | p_max = 128; | 834 | p_max = plls[index].max_p; |
834 | 835 | ||
835 | DBG_MSG("p range is %d-%d (%d)\n", p_min, p_max, p_inc); | 836 | DBG_MSG("p range is %d-%d (%d)\n", p_min, p_max, p_inc); |
836 | 837 | ||