diff options
author | David Miller <davem@davemloft.net> | 2011-01-11 18:49:34 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-03-22 02:46:44 -0400 |
commit | 21da386d0e4c55f6f7482b4637532b942e22b70a (patch) | |
tree | 47bebd65b27086a9cd1ba0ee2f241234ba53b902 /drivers/video | |
parent | f6b0cc477de99fe715f1071b13ab822daed9a34f (diff) |
svga: Make svga_wcrt_multi take an iomem regbase pointer.
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/arkfb.c | 9 | ||||
-rw-r--r-- | drivers/video/s3fb.c | 13 | ||||
-rw-r--r-- | drivers/video/svgalib.c | 32 | ||||
-rw-r--r-- | drivers/video/vt8623fb.c | 10 |
4 files changed, 34 insertions, 30 deletions
diff --git a/drivers/video/arkfb.c b/drivers/video/arkfb.c index 391ac939f011..a54dbf4c7836 100644 --- a/drivers/video/arkfb.c +++ b/drivers/video/arkfb.c | |||
@@ -657,8 +657,8 @@ static int arkfb_set_par(struct fb_info *info) | |||
657 | svga_set_default_atc_regs(); | 657 | svga_set_default_atc_regs(); |
658 | svga_set_default_seq_regs(); | 658 | svga_set_default_seq_regs(); |
659 | svga_set_default_crt_regs(); | 659 | svga_set_default_crt_regs(); |
660 | svga_wcrt_multi(ark_line_compare_regs, 0xFFFFFFFF); | 660 | svga_wcrt_multi(par->state.vgabase, ark_line_compare_regs, 0xFFFFFFFF); |
661 | svga_wcrt_multi(ark_start_address_regs, 0); | 661 | svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, 0); |
662 | 662 | ||
663 | /* ARK specific initialization */ | 663 | /* ARK specific initialization */ |
664 | svga_wseq_mask(0x10, 0x1F, 0x1F); /* enable linear framebuffer and full memory access */ | 664 | svga_wseq_mask(0x10, 0x1F, 0x1F); /* enable linear framebuffer and full memory access */ |
@@ -676,7 +676,7 @@ static int arkfb_set_par(struct fb_info *info) | |||
676 | 676 | ||
677 | /* Set the offset register */ | 677 | /* Set the offset register */ |
678 | pr_debug("fb%d: offset register : %d\n", info->node, offset_value); | 678 | pr_debug("fb%d: offset register : %d\n", info->node, offset_value); |
679 | svga_wcrt_multi(ark_offset_regs, offset_value); | 679 | svga_wcrt_multi(par->state.vgabase, ark_offset_regs, offset_value); |
680 | 680 | ||
681 | /* fix for hi-res textmode */ | 681 | /* fix for hi-res textmode */ |
682 | svga_wcrt_mask(0x40, 0x08, 0x08); | 682 | svga_wcrt_mask(0x40, 0x08, 0x08); |
@@ -884,6 +884,7 @@ static int arkfb_blank(int blank_mode, struct fb_info *info) | |||
884 | 884 | ||
885 | static int arkfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) | 885 | static int arkfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) |
886 | { | 886 | { |
887 | struct arkfb_info *par = info->par; | ||
887 | unsigned int offset; | 888 | unsigned int offset; |
888 | 889 | ||
889 | /* Calculate the offset */ | 890 | /* Calculate the offset */ |
@@ -897,7 +898,7 @@ static int arkfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info | |||
897 | } | 898 | } |
898 | 899 | ||
899 | /* Set the offset */ | 900 | /* Set the offset */ |
900 | svga_wcrt_multi(ark_start_address_regs, offset); | 901 | svga_wcrt_multi(par->state.vgabase, ark_start_address_regs, offset); |
901 | 902 | ||
902 | return 0; | 903 | return 0; |
903 | } | 904 | } |
diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index bcbf098a41c7..3984dcf7ba67 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c | |||
@@ -518,8 +518,8 @@ static int s3fb_set_par(struct fb_info *info) | |||
518 | svga_set_default_atc_regs(); | 518 | svga_set_default_atc_regs(); |
519 | svga_set_default_seq_regs(); | 519 | svga_set_default_seq_regs(); |
520 | svga_set_default_crt_regs(); | 520 | svga_set_default_crt_regs(); |
521 | svga_wcrt_multi(s3_line_compare_regs, 0xFFFFFFFF); | 521 | svga_wcrt_multi(par->state.vgabase, s3_line_compare_regs, 0xFFFFFFFF); |
522 | svga_wcrt_multi(s3_start_address_regs, 0); | 522 | svga_wcrt_multi(par->state.vgabase, s3_start_address_regs, 0); |
523 | 523 | ||
524 | /* S3 specific initialization */ | 524 | /* S3 specific initialization */ |
525 | svga_wcrt_mask(0x58, 0x10, 0x10); /* enable linear framebuffer */ | 525 | svga_wcrt_mask(0x58, 0x10, 0x10); /* enable linear framebuffer */ |
@@ -540,7 +540,7 @@ static int s3fb_set_par(struct fb_info *info) | |||
540 | 540 | ||
541 | /* Set the offset register */ | 541 | /* Set the offset register */ |
542 | pr_debug("fb%d: offset register : %d\n", info->node, offset_value); | 542 | pr_debug("fb%d: offset register : %d\n", info->node, offset_value); |
543 | svga_wcrt_multi(s3_offset_regs, offset_value); | 543 | svga_wcrt_multi(par->state.vgabase, s3_offset_regs, offset_value); |
544 | 544 | ||
545 | if (par->chip != CHIP_360_TRIO3D_1X && | 545 | if (par->chip != CHIP_360_TRIO3D_1X && |
546 | par->chip != CHIP_362_TRIO3D_2X && | 546 | par->chip != CHIP_362_TRIO3D_2X && |
@@ -822,8 +822,9 @@ static int s3fb_blank(int blank_mode, struct fb_info *info) | |||
822 | 822 | ||
823 | /* Pan the display */ | 823 | /* Pan the display */ |
824 | 824 | ||
825 | static int s3fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) { | 825 | static int s3fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) |
826 | 826 | { | |
827 | struct s3fb_info *par = info->par; | ||
827 | unsigned int offset; | 828 | unsigned int offset; |
828 | 829 | ||
829 | /* Calculate the offset */ | 830 | /* Calculate the offset */ |
@@ -837,7 +838,7 @@ static int s3fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) | |||
837 | } | 838 | } |
838 | 839 | ||
839 | /* Set the offset */ | 840 | /* Set the offset */ |
840 | svga_wcrt_multi(s3_start_address_regs, offset); | 841 | svga_wcrt_multi(par->state.vgabase, s3_start_address_regs, offset); |
841 | 842 | ||
842 | return 0; | 843 | return 0; |
843 | } | 844 | } |
diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c index 59c99fd4901b..bf3c7a92eeab 100644 --- a/drivers/video/svgalib.c +++ b/drivers/video/svgalib.c | |||
@@ -20,12 +20,12 @@ | |||
20 | 20 | ||
21 | 21 | ||
22 | /* Write a CRT register value spread across multiple registers */ | 22 | /* Write a CRT register value spread across multiple registers */ |
23 | void svga_wcrt_multi(const struct vga_regset *regset, u32 value) { | 23 | void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value) |
24 | 24 | { | |
25 | u8 regval, bitval, bitnum; | 25 | u8 regval, bitval, bitnum; |
26 | 26 | ||
27 | while (regset->regnum != VGA_REGSET_END_VAL) { | 27 | while (regset->regnum != VGA_REGSET_END_VAL) { |
28 | regval = vga_rcrt(NULL, regset->regnum); | 28 | regval = vga_rcrt(regbase, regset->regnum); |
29 | bitnum = regset->lowbit; | 29 | bitnum = regset->lowbit; |
30 | while (bitnum <= regset->highbit) { | 30 | while (bitnum <= regset->highbit) { |
31 | bitval = 1 << bitnum; | 31 | bitval = 1 << bitnum; |
@@ -34,7 +34,7 @@ void svga_wcrt_multi(const struct vga_regset *regset, u32 value) { | |||
34 | bitnum ++; | 34 | bitnum ++; |
35 | value = value >> 1; | 35 | value = value >> 1; |
36 | } | 36 | } |
37 | vga_wcrt(NULL, regset->regnum, regval); | 37 | vga_wcrt(regbase, regset->regnum, regval); |
38 | regset ++; | 38 | regset ++; |
39 | } | 39 | } |
40 | } | 40 | } |
@@ -516,62 +516,62 @@ void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninf | |||
516 | value = var->xres + var->left_margin + var->right_margin + var->hsync_len; | 516 | value = var->xres + var->left_margin + var->right_margin + var->hsync_len; |
517 | value = (value * hmul) / hdiv; | 517 | value = (value * hmul) / hdiv; |
518 | pr_debug("fb%d: horizontal total : %d\n", node, value); | 518 | pr_debug("fb%d: horizontal total : %d\n", node, value); |
519 | svga_wcrt_multi(tm->h_total_regs, (value / 8) - 5); | 519 | svga_wcrt_multi(NULL, tm->h_total_regs, (value / 8) - 5); |
520 | 520 | ||
521 | value = var->xres; | 521 | value = var->xres; |
522 | value = (value * hmul) / hdiv; | 522 | value = (value * hmul) / hdiv; |
523 | pr_debug("fb%d: horizontal display : %d\n", node, value); | 523 | pr_debug("fb%d: horizontal display : %d\n", node, value); |
524 | svga_wcrt_multi(tm->h_display_regs, (value / 8) - 1); | 524 | svga_wcrt_multi(NULL, tm->h_display_regs, (value / 8) - 1); |
525 | 525 | ||
526 | value = var->xres; | 526 | value = var->xres; |
527 | value = (value * hmul) / hdiv; | 527 | value = (value * hmul) / hdiv; |
528 | pr_debug("fb%d: horizontal blank start: %d\n", node, value); | 528 | pr_debug("fb%d: horizontal blank start: %d\n", node, value); |
529 | svga_wcrt_multi(tm->h_blank_start_regs, (value / 8) - 1 + hborder); | 529 | svga_wcrt_multi(NULL, tm->h_blank_start_regs, (value / 8) - 1 + hborder); |
530 | 530 | ||
531 | value = var->xres + var->left_margin + var->right_margin + var->hsync_len; | 531 | value = var->xres + var->left_margin + var->right_margin + var->hsync_len; |
532 | value = (value * hmul) / hdiv; | 532 | value = (value * hmul) / hdiv; |
533 | pr_debug("fb%d: horizontal blank end : %d\n", node, value); | 533 | pr_debug("fb%d: horizontal blank end : %d\n", node, value); |
534 | svga_wcrt_multi(tm->h_blank_end_regs, (value / 8) - 1 - hborder); | 534 | svga_wcrt_multi(NULL, tm->h_blank_end_regs, (value / 8) - 1 - hborder); |
535 | 535 | ||
536 | value = var->xres + var->right_margin; | 536 | value = var->xres + var->right_margin; |
537 | value = (value * hmul) / hdiv; | 537 | value = (value * hmul) / hdiv; |
538 | pr_debug("fb%d: horizontal sync start : %d\n", node, value); | 538 | pr_debug("fb%d: horizontal sync start : %d\n", node, value); |
539 | svga_wcrt_multi(tm->h_sync_start_regs, (value / 8)); | 539 | svga_wcrt_multi(NULL, tm->h_sync_start_regs, (value / 8)); |
540 | 540 | ||
541 | value = var->xres + var->right_margin + var->hsync_len; | 541 | value = var->xres + var->right_margin + var->hsync_len; |
542 | value = (value * hmul) / hdiv; | 542 | value = (value * hmul) / hdiv; |
543 | pr_debug("fb%d: horizontal sync end : %d\n", node, value); | 543 | pr_debug("fb%d: horizontal sync end : %d\n", node, value); |
544 | svga_wcrt_multi(tm->h_sync_end_regs, (value / 8)); | 544 | svga_wcrt_multi(NULL, tm->h_sync_end_regs, (value / 8)); |
545 | 545 | ||
546 | value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; | 546 | value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; |
547 | value = (value * vmul) / vdiv; | 547 | value = (value * vmul) / vdiv; |
548 | pr_debug("fb%d: vertical total : %d\n", node, value); | 548 | pr_debug("fb%d: vertical total : %d\n", node, value); |
549 | svga_wcrt_multi(tm->v_total_regs, value - 2); | 549 | svga_wcrt_multi(NULL, tm->v_total_regs, value - 2); |
550 | 550 | ||
551 | value = var->yres; | 551 | value = var->yres; |
552 | value = (value * vmul) / vdiv; | 552 | value = (value * vmul) / vdiv; |
553 | pr_debug("fb%d: vertical display : %d\n", node, value); | 553 | pr_debug("fb%d: vertical display : %d\n", node, value); |
554 | svga_wcrt_multi(tm->v_display_regs, value - 1); | 554 | svga_wcrt_multi(NULL, tm->v_display_regs, value - 1); |
555 | 555 | ||
556 | value = var->yres; | 556 | value = var->yres; |
557 | value = (value * vmul) / vdiv; | 557 | value = (value * vmul) / vdiv; |
558 | pr_debug("fb%d: vertical blank start : %d\n", node, value); | 558 | pr_debug("fb%d: vertical blank start : %d\n", node, value); |
559 | svga_wcrt_multi(tm->v_blank_start_regs, value); | 559 | svga_wcrt_multi(NULL, tm->v_blank_start_regs, value); |
560 | 560 | ||
561 | value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; | 561 | value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; |
562 | value = (value * vmul) / vdiv; | 562 | value = (value * vmul) / vdiv; |
563 | pr_debug("fb%d: vertical blank end : %d\n", node, value); | 563 | pr_debug("fb%d: vertical blank end : %d\n", node, value); |
564 | svga_wcrt_multi(tm->v_blank_end_regs, value - 2); | 564 | svga_wcrt_multi(NULL, tm->v_blank_end_regs, value - 2); |
565 | 565 | ||
566 | value = var->yres + var->lower_margin; | 566 | value = var->yres + var->lower_margin; |
567 | value = (value * vmul) / vdiv; | 567 | value = (value * vmul) / vdiv; |
568 | pr_debug("fb%d: vertical sync start : %d\n", node, value); | 568 | pr_debug("fb%d: vertical sync start : %d\n", node, value); |
569 | svga_wcrt_multi(tm->v_sync_start_regs, value); | 569 | svga_wcrt_multi(NULL, tm->v_sync_start_regs, value); |
570 | 570 | ||
571 | value = var->yres + var->lower_margin + var->vsync_len; | 571 | value = var->yres + var->lower_margin + var->vsync_len; |
572 | value = (value * vmul) / vdiv; | 572 | value = (value * vmul) / vdiv; |
573 | pr_debug("fb%d: vertical sync end : %d\n", node, value); | 573 | pr_debug("fb%d: vertical sync end : %d\n", node, value); |
574 | svga_wcrt_multi(tm->v_sync_end_regs, value); | 574 | svga_wcrt_multi(NULL, tm->v_sync_end_regs, value); |
575 | 575 | ||
576 | /* Set horizontal and vertical sync pulse polarity in misc register */ | 576 | /* Set horizontal and vertical sync pulse polarity in misc register */ |
577 | 577 | ||
diff --git a/drivers/video/vt8623fb.c b/drivers/video/vt8623fb.c index a2965ab92cfb..46f8e06a55e8 100644 --- a/drivers/video/vt8623fb.c +++ b/drivers/video/vt8623fb.c | |||
@@ -373,6 +373,7 @@ static int vt8623fb_check_var(struct fb_var_screeninfo *var, struct fb_info *inf | |||
373 | static int vt8623fb_set_par(struct fb_info *info) | 373 | static int vt8623fb_set_par(struct fb_info *info) |
374 | { | 374 | { |
375 | u32 mode, offset_value, fetch_value, screen_size; | 375 | u32 mode, offset_value, fetch_value, screen_size; |
376 | struct vt8623fb_info *par = info->par; | ||
376 | u32 bpp = info->var.bits_per_pixel; | 377 | u32 bpp = info->var.bits_per_pixel; |
377 | 378 | ||
378 | if (bpp != 0) { | 379 | if (bpp != 0) { |
@@ -428,10 +429,10 @@ static int vt8623fb_set_par(struct fb_info *info) | |||
428 | svga_set_default_atc_regs(); | 429 | svga_set_default_atc_regs(); |
429 | svga_set_default_seq_regs(); | 430 | svga_set_default_seq_regs(); |
430 | svga_set_default_crt_regs(); | 431 | svga_set_default_crt_regs(); |
431 | svga_wcrt_multi(vt8623_line_compare_regs, 0xFFFFFFFF); | 432 | svga_wcrt_multi(par->state.vgabase, vt8623_line_compare_regs, 0xFFFFFFFF); |
432 | svga_wcrt_multi(vt8623_start_address_regs, 0); | 433 | svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, 0); |
433 | 434 | ||
434 | svga_wcrt_multi(vt8623_offset_regs, offset_value); | 435 | svga_wcrt_multi(par->state.vgabase, vt8623_offset_regs, offset_value); |
435 | svga_wseq_multi(vt8623_fetch_count_regs, fetch_value); | 436 | svga_wseq_multi(vt8623_fetch_count_regs, fetch_value); |
436 | 437 | ||
437 | /* Clear H/V Skew */ | 438 | /* Clear H/V Skew */ |
@@ -603,6 +604,7 @@ static int vt8623fb_blank(int blank_mode, struct fb_info *info) | |||
603 | 604 | ||
604 | static int vt8623fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) | 605 | static int vt8623fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) |
605 | { | 606 | { |
607 | struct vt8623fb_info *par = info->par; | ||
606 | unsigned int offset; | 608 | unsigned int offset; |
607 | 609 | ||
608 | /* Calculate the offset */ | 610 | /* Calculate the offset */ |
@@ -616,7 +618,7 @@ static int vt8623fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *i | |||
616 | } | 618 | } |
617 | 619 | ||
618 | /* Set the offset */ | 620 | /* Set the offset */ |
619 | svga_wcrt_multi(vt8623_start_address_regs, offset); | 621 | svga_wcrt_multi(par->state.vgabase, vt8623_start_address_regs, offset); |
620 | 622 | ||
621 | return 0; | 623 | return 0; |
622 | } | 624 | } |