diff options
author | Krzysztof Helt <krzysztof.h1@wp.pl> | 2007-10-16 04:28:42 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-16 12:43:15 -0400 |
commit | 245a2c2c69fee367ac38cf84af18b56374dbec22 (patch) | |
tree | 876993b9760f3ea2854ca5fb2eef97909cdb67ea /drivers/video | |
parent | 9ffa73960631502841d78b79ce857b15b9290abc (diff) |
tridentfb: coding style improvement
This patch contains coding style improvements to the tridentfb driver (white
spaces, indentations, long lines).
It also moves fb_ops structure after fb api functions are defined.
Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: Antonino Daplas <adaplas@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/tridentfb.c | 1075 |
1 files changed, 592 insertions, 483 deletions
diff --git a/drivers/video/tridentfb.c b/drivers/video/tridentfb.c index c699864b6f4a..70fb4ee2b421 100644 --- a/drivers/video/tridentfb.c +++ b/drivers/video/tridentfb.c | |||
@@ -1,18 +1,19 @@ | |||
1 | /* | 1 | /* |
2 | * Frame buffer driver for Trident Blade and Image series | 2 | * Frame buffer driver for Trident Blade and Image series |
3 | * | 3 | * |
4 | * Copyright 2001,2002 - Jani Monoses <jani@iv.ro> | 4 | * Copyright 2001, 2002 - Jani Monoses <jani@iv.ro> |
5 | * | 5 | * |
6 | * | 6 | * |
7 | * CREDITS:(in order of appearance) | 7 | * CREDITS:(in order of appearance) |
8 | * skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video | 8 | * skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video |
9 | * Special thanks ;) to Mattia Crivellini <tia@mclink.it> | 9 | * Special thanks ;) to Mattia Crivellini <tia@mclink.it> |
10 | * much inspired by the XFree86 4.x Trident driver sources by Alan Hourihane | 10 | * much inspired by the XFree86 4.x Trident driver sources |
11 | * the FreeVGA project | 11 | * by Alan Hourihane the FreeVGA project |
12 | * Francesco Salvestrini <salvestrini@users.sf.net> XP support,code,suggestions | 12 | * Francesco Salvestrini <salvestrini@users.sf.net> XP support, |
13 | * code, suggestions | ||
13 | * TODO: | 14 | * TODO: |
14 | * timing value tweaking so it looks good on every monitor in every mode | 15 | * timing value tweaking so it looks good on every monitor in every mode |
15 | * TGUI acceleration | 16 | * TGUI acceleration |
16 | */ | 17 | */ |
17 | 18 | ||
18 | #include <linux/module.h> | 19 | #include <linux/module.h> |
@@ -26,11 +27,11 @@ | |||
26 | #define VERSION "0.7.8-NEWAPI" | 27 | #define VERSION "0.7.8-NEWAPI" |
27 | 28 | ||
28 | struct tridentfb_par { | 29 | struct tridentfb_par { |
29 | int vclk; //in MHz | 30 | int vclk; /* in MHz */ |
30 | void __iomem * io_virt; //iospace virtual memory address | 31 | void __iomem *io_virt; /* iospace virtual memory address */ |
31 | }; | 32 | }; |
32 | 33 | ||
33 | static unsigned char eng_oper; //engine operation... | 34 | static unsigned char eng_oper; /* engine operation... */ |
34 | static struct fb_ops tridentfb_ops; | 35 | static struct fb_ops tridentfb_ops; |
35 | 36 | ||
36 | static struct tridentfb_par default_par; | 37 | static struct tridentfb_par default_par; |
@@ -39,11 +40,10 @@ static struct tridentfb_par default_par; | |||
39 | static struct fb_info fb_info; | 40 | static struct fb_info fb_info; |
40 | static u32 pseudo_pal[16]; | 41 | static u32 pseudo_pal[16]; |
41 | 42 | ||
42 | |||
43 | static struct fb_var_screeninfo default_var; | 43 | static struct fb_var_screeninfo default_var; |
44 | 44 | ||
45 | static struct fb_fix_screeninfo tridentfb_fix = { | 45 | static struct fb_fix_screeninfo tridentfb_fix = { |
46 | .id = "Trident", | 46 | .id = "Trident", |
47 | .type = FB_TYPE_PACKED_PIXELS, | 47 | .type = FB_TYPE_PACKED_PIXELS, |
48 | .ypanstep = 1, | 48 | .ypanstep = 1, |
49 | .visual = FB_VISUAL_PSEUDOCOLOR, | 49 | .visual = FB_VISUAL_PSEUDOCOLOR, |
@@ -55,11 +55,10 @@ static int chip_id; | |||
55 | static int defaultaccel; | 55 | static int defaultaccel; |
56 | static int displaytype; | 56 | static int displaytype; |
57 | 57 | ||
58 | |||
59 | /* defaults which are normally overriden by user values */ | 58 | /* defaults which are normally overriden by user values */ |
60 | 59 | ||
61 | /* video mode */ | 60 | /* video mode */ |
62 | static char * mode = "640x480"; | 61 | static char *mode = "640x480"; |
63 | static int bpp = 8; | 62 | static int bpp = 8; |
64 | 63 | ||
65 | static int noaccel; | 64 | static int noaccel; |
@@ -74,7 +73,6 @@ static int memsize; | |||
74 | static int memdiff; | 73 | static int memdiff; |
75 | static int nativex; | 74 | static int nativex; |
76 | 75 | ||
77 | |||
78 | module_param(mode, charp, 0); | 76 | module_param(mode, charp, 0); |
79 | module_param(bpp, int, 0); | 77 | module_param(bpp, int, 0); |
80 | module_param(center, int, 0); | 78 | module_param(center, int, 0); |
@@ -86,88 +84,85 @@ module_param(nativex, int, 0); | |||
86 | module_param(fp, int, 0); | 84 | module_param(fp, int, 0); |
87 | module_param(crt, int, 0); | 85 | module_param(crt, int, 0); |
88 | 86 | ||
89 | |||
90 | static int chip3D; | 87 | static int chip3D; |
91 | static int chipcyber; | 88 | static int chipcyber; |
92 | 89 | ||
93 | static int is3Dchip(int id) | 90 | static int is3Dchip(int id) |
94 | { | 91 | { |
95 | return ((id == BLADE3D) || (id == CYBERBLADEE4) || | 92 | return ((id == BLADE3D) || (id == CYBERBLADEE4) || |
96 | (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) || | 93 | (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) || |
97 | (id == CYBER9397) || (id == CYBER9397DVD) || | 94 | (id == CYBER9397) || (id == CYBER9397DVD) || |
98 | (id == CYBER9520) || (id == CYBER9525DVD) || | 95 | (id == CYBER9520) || (id == CYBER9525DVD) || |
99 | (id == IMAGE975) || (id == IMAGE985) || | 96 | (id == IMAGE975) || (id == IMAGE985) || |
100 | (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) || | 97 | (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) || |
101 | (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) || | 98 | (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) || |
102 | (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) || | 99 | (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) || |
103 | (id == CYBERBLADEXPAi1)); | 100 | (id == CYBERBLADEXPAi1)); |
104 | } | 101 | } |
105 | 102 | ||
106 | static int iscyber(int id) | 103 | static int iscyber(int id) |
107 | { | 104 | { |
108 | switch (id) { | 105 | switch (id) { |
109 | case CYBER9388: | 106 | case CYBER9388: |
110 | case CYBER9382: | 107 | case CYBER9382: |
111 | case CYBER9385: | 108 | case CYBER9385: |
112 | case CYBER9397: | 109 | case CYBER9397: |
113 | case CYBER9397DVD: | 110 | case CYBER9397DVD: |
114 | case CYBER9520: | 111 | case CYBER9520: |
115 | case CYBER9525DVD: | 112 | case CYBER9525DVD: |
116 | case CYBERBLADEE4: | 113 | case CYBERBLADEE4: |
117 | case CYBERBLADEi7D: | 114 | case CYBERBLADEi7D: |
118 | case CYBERBLADEi1: | 115 | case CYBERBLADEi1: |
119 | case CYBERBLADEi1D: | 116 | case CYBERBLADEi1D: |
120 | case CYBERBLADEAi1: | 117 | case CYBERBLADEAi1: |
121 | case CYBERBLADEAi1D: | 118 | case CYBERBLADEAi1D: |
122 | case CYBERBLADEXPAi1: | 119 | case CYBERBLADEXPAi1: |
123 | return 1; | 120 | return 1; |
124 | |||
125 | case CYBER9320: | ||
126 | case TGUI9660: | ||
127 | case IMAGE975: | ||
128 | case IMAGE985: | ||
129 | case BLADE3D: | ||
130 | case CYBERBLADEi7: /* VIA MPV4 integrated version */ | ||
131 | 121 | ||
132 | default: | 122 | case CYBER9320: |
133 | /* case CYBERBLDAEXPm8: Strange */ | 123 | case TGUI9660: |
134 | /* case CYBERBLDAEXPm16: Strange */ | 124 | case IMAGE975: |
135 | return 0; | 125 | case IMAGE985: |
126 | case BLADE3D: | ||
127 | case CYBERBLADEi7: /* VIA MPV4 integrated version */ | ||
128 | |||
129 | default: | ||
130 | /* case CYBERBLDAEXPm8: Strange */ | ||
131 | /* case CYBERBLDAEXPm16: Strange */ | ||
132 | return 0; | ||
136 | } | 133 | } |
137 | } | 134 | } |
138 | 135 | ||
139 | #define CRT 0x3D0 //CRTC registers offset for color display | 136 | #define CRT 0x3D0 /* CRTC registers offset for color display */ |
140 | 137 | ||
141 | #ifndef TRIDENT_MMIO | 138 | #ifndef TRIDENT_MMIO |
142 | #define TRIDENT_MMIO 1 | 139 | #define TRIDENT_MMIO 1 |
143 | #endif | 140 | #endif |
144 | 141 | ||
145 | #if TRIDENT_MMIO | 142 | #if TRIDENT_MMIO |
146 | #define t_outb(val,reg) writeb(val,((struct tridentfb_par *)(fb_info.par))->io_virt + reg) | 143 | #define t_outb(val, reg) writeb(val,((struct tridentfb_par *)(fb_info.par))->io_virt + reg) |
147 | #define t_inb(reg) readb(((struct tridentfb_par*)(fb_info.par))->io_virt + reg) | 144 | #define t_inb(reg) readb(((struct tridentfb_par*)(fb_info.par))->io_virt + reg) |
148 | #else | 145 | #else |
149 | #define t_outb(val,reg) outb(val,reg) | 146 | #define t_outb(val, reg) outb(val, reg) |
150 | #define t_inb(reg) inb(reg) | 147 | #define t_inb(reg) inb(reg) |
151 | #endif | 148 | #endif |
152 | 149 | ||
153 | 150 | ||
154 | static struct accel_switch { | 151 | static struct accel_switch { |
155 | void (*init_accel)(int,int); | 152 | void (*init_accel) (int, int); |
156 | void (*wait_engine)(void); | 153 | void (*wait_engine) (void); |
157 | void (*fill_rect)(__u32,__u32,__u32,__u32,__u32,__u32); | 154 | void (*fill_rect) (u32, u32, u32, u32, u32, u32); |
158 | void (*copy_rect)(__u32,__u32,__u32,__u32,__u32,__u32); | 155 | void (*copy_rect) (u32, u32, u32, u32, u32, u32); |
159 | } *acc; | 156 | } *acc; |
160 | 157 | ||
161 | #define writemmr(r,v) writel(v, ((struct tridentfb_par *)fb_info.par)->io_virt + r) | 158 | #define writemmr(r, v) writel(v, ((struct tridentfb_par *)fb_info.par)->io_virt + r) |
162 | #define readmmr(r) readl(((struct tridentfb_par *)fb_info.par)->io_virt + r) | 159 | #define readmmr(r) readl(((struct tridentfb_par *)fb_info.par)->io_virt + r) |
163 | 160 | ||
164 | |||
165 | |||
166 | /* | 161 | /* |
167 | * Blade specific acceleration. | 162 | * Blade specific acceleration. |
168 | */ | 163 | */ |
169 | 164 | ||
170 | #define point(x,y) ((y)<<16|(x)) | 165 | #define point(x, y) ((y) << 16 | (x)) |
171 | #define STA 0x2120 | 166 | #define STA 0x2120 |
172 | #define CMD 0x2144 | 167 | #define CMD 0x2144 |
173 | #define ROP 0x2148 | 168 | #define ROP 0x2148 |
@@ -179,64 +174,71 @@ static struct accel_switch { | |||
179 | 174 | ||
180 | #define ROP_S 0xCC | 175 | #define ROP_S 0xCC |
181 | 176 | ||
182 | static void blade_init_accel(int pitch,int bpp) | 177 | static void blade_init_accel(int pitch, int bpp) |
183 | { | 178 | { |
184 | int v1 = (pitch>>3)<<20; | 179 | int v1 = (pitch >> 3) << 20; |
185 | int tmp = 0,v2; | 180 | int tmp = 0, v2; |
186 | switch (bpp) { | 181 | switch (bpp) { |
187 | case 8:tmp = 0;break; | 182 | case 8: |
188 | case 15:tmp = 5;break; | 183 | tmp = 0; |
189 | case 16:tmp = 1;break; | 184 | break; |
190 | case 24: | 185 | case 15: |
191 | case 32:tmp = 2;break; | 186 | tmp = 5; |
187 | break; | ||
188 | case 16: | ||
189 | tmp = 1; | ||
190 | break; | ||
191 | case 24: | ||
192 | case 32: | ||
193 | tmp = 2; | ||
194 | break; | ||
192 | } | 195 | } |
193 | v2 = v1 | (tmp<<29); | 196 | v2 = v1 | (tmp << 29); |
194 | writemmr(0x21C0,v2); | 197 | writemmr(0x21C0, v2); |
195 | writemmr(0x21C4,v2); | 198 | writemmr(0x21C4, v2); |
196 | writemmr(0x21B8,v2); | 199 | writemmr(0x21B8, v2); |
197 | writemmr(0x21BC,v2); | 200 | writemmr(0x21BC, v2); |
198 | writemmr(0x21D0,v1); | 201 | writemmr(0x21D0, v1); |
199 | writemmr(0x21D4,v1); | 202 | writemmr(0x21D4, v1); |
200 | writemmr(0x21C8,v1); | 203 | writemmr(0x21C8, v1); |
201 | writemmr(0x21CC,v1); | 204 | writemmr(0x21CC, v1); |
202 | writemmr(0x216C,0); | 205 | writemmr(0x216C, 0); |
203 | } | 206 | } |
204 | 207 | ||
205 | static void blade_wait_engine(void) | 208 | static void blade_wait_engine(void) |
206 | { | 209 | { |
207 | while(readmmr(STA) & 0xFA800000); | 210 | while (readmmr(STA) & 0xFA800000) ; |
208 | } | 211 | } |
209 | 212 | ||
210 | static void blade_fill_rect(__u32 x,__u32 y,__u32 w,__u32 h,__u32 c,__u32 rop) | 213 | static void blade_fill_rect(u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) |
211 | { | 214 | { |
212 | writemmr(CLR,c); | 215 | writemmr(CLR, c); |
213 | writemmr(ROP,rop ? 0x66:ROP_S); | 216 | writemmr(ROP, rop ? 0x66 : ROP_S); |
214 | writemmr(CMD,0x20000000|1<<19|1<<4|2<<2); | 217 | writemmr(CMD, 0x20000000 | 1 << 19 | 1 << 4 | 2 << 2); |
215 | 218 | ||
216 | writemmr(DR1,point(x,y)); | 219 | writemmr(DR1, point(x, y)); |
217 | writemmr(DR2,point(x+w-1,y+h-1)); | 220 | writemmr(DR2, point(x + w - 1, y + h - 1)); |
218 | } | 221 | } |
219 | 222 | ||
220 | static void blade_copy_rect(__u32 x1,__u32 y1,__u32 x2,__u32 y2,__u32 w,__u32 h) | 223 | static void blade_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) |
221 | { | 224 | { |
222 | __u32 s1,s2,d1,d2; | 225 | u32 s1, s2, d1, d2; |
223 | int direction = 2; | 226 | int direction = 2; |
224 | s1 = point(x1,y1); | 227 | s1 = point(x1, y1); |
225 | s2 = point(x1+w-1,y1+h-1); | 228 | s2 = point(x1 + w - 1, y1 + h - 1); |
226 | d1 = point(x2,y2); | 229 | d1 = point(x2, y2); |
227 | d2 = point(x2+w-1,y2+h-1); | 230 | d2 = point(x2 + w - 1, y2 + h - 1); |
228 | 231 | ||
229 | if ((y1 > y2) || ((y1 == y2) && (x1 > x2))) | 232 | if ((y1 > y2) || ((y1 == y2) && (x1 > x2))) |
230 | direction = 0; | 233 | direction = 0; |
231 | |||
232 | 234 | ||
233 | writemmr(ROP,ROP_S); | 235 | writemmr(ROP, ROP_S); |
234 | writemmr(CMD,0xE0000000|1<<19|1<<4|1<<2|direction); | 236 | writemmr(CMD, 0xE0000000 | 1 << 19 | 1 << 4 | 1 << 2 | direction); |
235 | 237 | ||
236 | writemmr(SR1,direction?s2:s1); | 238 | writemmr(SR1, direction ? s2 : s1); |
237 | writemmr(SR2,direction?s1:s2); | 239 | writemmr(SR2, direction ? s1 : s2); |
238 | writemmr(DR1,direction?d2:d1); | 240 | writemmr(DR1, direction ? d2 : d1); |
239 | writemmr(DR2,direction?d1:d2); | 241 | writemmr(DR2, direction ? d1 : d2); |
240 | } | 242 | } |
241 | 243 | ||
242 | static struct accel_switch accel_blade = { | 244 | static struct accel_switch accel_blade = { |
@@ -246,51 +248,72 @@ static struct accel_switch accel_blade = { | |||
246 | blade_copy_rect, | 248 | blade_copy_rect, |
247 | }; | 249 | }; |
248 | 250 | ||
249 | |||
250 | /* | 251 | /* |
251 | * BladeXP specific acceleration functions | 252 | * BladeXP specific acceleration functions |
252 | */ | 253 | */ |
253 | 254 | ||
254 | #define ROP_P 0xF0 | 255 | #define ROP_P 0xF0 |
255 | #define masked_point(x,y) ((y & 0xffff)<<16|(x & 0xffff)) | 256 | #define masked_point(x, y) ((y & 0xffff)<<16|(x & 0xffff)) |
256 | 257 | ||
257 | static void xp_init_accel(int pitch,int bpp) | 258 | static void xp_init_accel(int pitch, int bpp) |
258 | { | 259 | { |
259 | int tmp = 0,v1; | 260 | int tmp = 0, v1; |
260 | unsigned char x = 0; | 261 | unsigned char x = 0; |
261 | 262 | ||
262 | switch (bpp) { | 263 | switch (bpp) { |
263 | case 8: x = 0; break; | 264 | case 8: |
264 | case 16: x = 1; break; | 265 | x = 0; |
265 | case 24: x = 3; break; | 266 | break; |
266 | case 32: x = 2; break; | 267 | case 16: |
268 | x = 1; | ||
269 | break; | ||
270 | case 24: | ||
271 | x = 3; | ||
272 | break; | ||
273 | case 32: | ||
274 | x = 2; | ||
275 | break; | ||
267 | } | 276 | } |
268 | 277 | ||
269 | switch (pitch << (bpp >> 3)) { | 278 | switch (pitch << (bpp >> 3)) { |
270 | case 8192: | 279 | case 8192: |
271 | case 512: x |= 0x00; break; | 280 | case 512: |
272 | case 1024: x |= 0x04; break; | 281 | x |= 0x00; |
273 | case 2048: x |= 0x08; break; | 282 | break; |
274 | case 4096: x |= 0x0C; break; | 283 | case 1024: |
284 | x |= 0x04; | ||
285 | break; | ||
286 | case 2048: | ||
287 | x |= 0x08; | ||
288 | break; | ||
289 | case 4096: | ||
290 | x |= 0x0C; | ||
291 | break; | ||
275 | } | 292 | } |
276 | 293 | ||
277 | t_outb(x,0x2125); | 294 | t_outb(x, 0x2125); |
278 | 295 | ||
279 | eng_oper = x | 0x40; | 296 | eng_oper = x | 0x40; |
280 | 297 | ||
281 | switch (bpp) { | 298 | switch (bpp) { |
282 | case 8: tmp = 18; break; | 299 | case 8: |
283 | case 15: | 300 | tmp = 18; |
284 | case 16: tmp = 19; break; | 301 | break; |
285 | case 24: | 302 | case 15: |
286 | case 32: tmp = 20; break; | 303 | case 16: |
304 | tmp = 19; | ||
305 | break; | ||
306 | case 24: | ||
307 | case 32: | ||
308 | tmp = 20; | ||
309 | break; | ||
287 | } | 310 | } |
288 | 311 | ||
289 | v1 = pitch << tmp; | 312 | v1 = pitch << tmp; |
290 | 313 | ||
291 | writemmr(0x2154,v1); | 314 | writemmr(0x2154, v1); |
292 | writemmr(0x2150,v1); | 315 | writemmr(0x2150, v1); |
293 | t_outb(3,0x2126); | 316 | t_outb(3, 0x2126); |
294 | } | 317 | } |
295 | 318 | ||
296 | static void xp_wait_engine(void) | 319 | static void xp_wait_engine(void) |
@@ -318,24 +341,24 @@ static void xp_wait_engine(void) | |||
318 | } | 341 | } |
319 | } | 342 | } |
320 | 343 | ||
321 | static void xp_fill_rect(__u32 x,__u32 y,__u32 w,__u32 h,__u32 c,__u32 rop) | 344 | static void xp_fill_rect(u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) |
322 | { | 345 | { |
323 | writemmr(0x2127,ROP_P); | 346 | writemmr(0x2127, ROP_P); |
324 | writemmr(0x2158,c); | 347 | writemmr(0x2158, c); |
325 | writemmr(0x2128,0x4000); | 348 | writemmr(0x2128, 0x4000); |
326 | writemmr(0x2140,masked_point(h,w)); | 349 | writemmr(0x2140, masked_point(h, w)); |
327 | writemmr(0x2138,masked_point(y,x)); | 350 | writemmr(0x2138, masked_point(y, x)); |
328 | t_outb(0x01,0x2124); | 351 | t_outb(0x01, 0x2124); |
329 | t_outb(eng_oper,0x2125); | 352 | t_outb(eng_oper, 0x2125); |
330 | } | 353 | } |
331 | 354 | ||
332 | static void xp_copy_rect(__u32 x1,__u32 y1,__u32 x2,__u32 y2,__u32 w,__u32 h) | 355 | static void xp_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) |
333 | { | 356 | { |
334 | int direction; | 357 | int direction; |
335 | __u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp; | 358 | u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp; |
336 | 359 | ||
337 | direction = 0x0004; | 360 | direction = 0x0004; |
338 | 361 | ||
339 | if ((x1 < x2) && (y1 == y2)) { | 362 | if ((x1 < x2) && (y1 == y2)) { |
340 | direction |= 0x0200; | 363 | direction |= 0x0200; |
341 | x1_tmp = x1 + w - 1; | 364 | x1_tmp = x1 + w - 1; |
@@ -344,53 +367,60 @@ static void xp_copy_rect(__u32 x1,__u32 y1,__u32 x2,__u32 y2,__u32 w,__u32 h) | |||
344 | x1_tmp = x1; | 367 | x1_tmp = x1; |
345 | x2_tmp = x2; | 368 | x2_tmp = x2; |
346 | } | 369 | } |
347 | 370 | ||
348 | if (y1 < y2) { | 371 | if (y1 < y2) { |
349 | direction |= 0x0100; | 372 | direction |= 0x0100; |
350 | y1_tmp = y1 + h - 1; | 373 | y1_tmp = y1 + h - 1; |
351 | y2_tmp = y2 + h - 1; | 374 | y2_tmp = y2 + h - 1; |
352 | } else { | 375 | } else { |
353 | y1_tmp = y1; | 376 | y1_tmp = y1; |
354 | y2_tmp = y2; | 377 | y2_tmp = y2; |
355 | } | 378 | } |
356 | 379 | ||
357 | writemmr(0x2128,direction); | 380 | writemmr(0x2128, direction); |
358 | t_outb(ROP_S,0x2127); | 381 | t_outb(ROP_S, 0x2127); |
359 | writemmr(0x213C,masked_point(y1_tmp,x1_tmp)); | 382 | writemmr(0x213C, masked_point(y1_tmp, x1_tmp)); |
360 | writemmr(0x2138,masked_point(y2_tmp,x2_tmp)); | 383 | writemmr(0x2138, masked_point(y2_tmp, x2_tmp)); |
361 | writemmr(0x2140,masked_point(h,w)); | 384 | writemmr(0x2140, masked_point(h, w)); |
362 | t_outb(0x01,0x2124); | 385 | t_outb(0x01, 0x2124); |
363 | } | 386 | } |
364 | 387 | ||
365 | static struct accel_switch accel_xp = { | 388 | static struct accel_switch accel_xp = { |
366 | xp_init_accel, | 389 | xp_init_accel, |
367 | xp_wait_engine, | 390 | xp_wait_engine, |
368 | xp_fill_rect, | 391 | xp_fill_rect, |
369 | xp_copy_rect, | 392 | xp_copy_rect, |
370 | }; | 393 | }; |
371 | 394 | ||
372 | |||
373 | /* | 395 | /* |
374 | * Image specific acceleration functions | 396 | * Image specific acceleration functions |
375 | */ | 397 | */ |
376 | static void image_init_accel(int pitch,int bpp) | 398 | static void image_init_accel(int pitch, int bpp) |
377 | { | 399 | { |
378 | int tmp = 0; | 400 | int tmp = 0; |
379 | switch (bpp) { | 401 | switch (bpp) { |
380 | case 8:tmp = 0;break; | 402 | case 8: |
381 | case 15:tmp = 5;break; | 403 | tmp = 0; |
382 | case 16:tmp = 1;break; | 404 | break; |
383 | case 24: | 405 | case 15: |
384 | case 32:tmp = 2;break; | 406 | tmp = 5; |
407 | break; | ||
408 | case 16: | ||
409 | tmp = 1; | ||
410 | break; | ||
411 | case 24: | ||
412 | case 32: | ||
413 | tmp = 2; | ||
414 | break; | ||
385 | } | 415 | } |
386 | writemmr(0x2120, 0xF0000000); | 416 | writemmr(0x2120, 0xF0000000); |
387 | writemmr(0x2120, 0x40000000|tmp); | 417 | writemmr(0x2120, 0x40000000 | tmp); |
388 | writemmr(0x2120, 0x80000000); | 418 | writemmr(0x2120, 0x80000000); |
389 | writemmr(0x2144, 0x00000000); | 419 | writemmr(0x2144, 0x00000000); |
390 | writemmr(0x2148, 0x00000000); | 420 | writemmr(0x2148, 0x00000000); |
391 | writemmr(0x2150, 0x00000000); | 421 | writemmr(0x2150, 0x00000000); |
392 | writemmr(0x2154, 0x00000000); | 422 | writemmr(0x2154, 0x00000000); |
393 | writemmr(0x2120, 0x60000000|(pitch<<16) |pitch); | 423 | writemmr(0x2120, 0x60000000 | (pitch << 16) | pitch); |
394 | writemmr(0x216C, 0x00000000); | 424 | writemmr(0x216C, 0x00000000); |
395 | writemmr(0x2170, 0x00000000); | 425 | writemmr(0x2170, 0x00000000); |
396 | writemmr(0x217C, 0x00000000); | 426 | writemmr(0x217C, 0x00000000); |
@@ -400,44 +430,43 @@ static void image_init_accel(int pitch,int bpp) | |||
400 | 430 | ||
401 | static void image_wait_engine(void) | 431 | static void image_wait_engine(void) |
402 | { | 432 | { |
403 | while(readmmr(0x2164) & 0xF0000000); | 433 | while (readmmr(0x2164) & 0xF0000000) ; |
404 | } | 434 | } |
405 | 435 | ||
406 | static void image_fill_rect(__u32 x, __u32 y, __u32 w, __u32 h, __u32 c, __u32 rop) | 436 | static void image_fill_rect(u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) |
407 | { | 437 | { |
408 | writemmr(0x2120,0x80000000); | 438 | writemmr(0x2120, 0x80000000); |
409 | writemmr(0x2120,0x90000000|ROP_S); | 439 | writemmr(0x2120, 0x90000000 | ROP_S); |
410 | 440 | ||
411 | writemmr(0x2144,c); | 441 | writemmr(0x2144, c); |
412 | 442 | ||
413 | writemmr(DR1,point(x,y)); | 443 | writemmr(DR1, point(x, y)); |
414 | writemmr(DR2,point(x+w-1,y+h-1)); | 444 | writemmr(DR2, point(x + w - 1, y + h - 1)); |
415 | 445 | ||
416 | writemmr(0x2124,0x80000000|3<<22|1<<10|1<<9); | 446 | writemmr(0x2124, 0x80000000 | 3 << 22 | 1 << 10 | 1 << 9); |
417 | } | 447 | } |
418 | 448 | ||
419 | static void image_copy_rect(__u32 x1,__u32 y1,__u32 x2,__u32 y2,__u32 w,__u32 h) | 449 | static void image_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) |
420 | { | 450 | { |
421 | __u32 s1,s2,d1,d2; | 451 | u32 s1, s2, d1, d2; |
422 | int direction = 2; | 452 | int direction = 2; |
423 | s1 = point(x1,y1); | 453 | s1 = point(x1, y1); |
424 | s2 = point(x1+w-1,y1+h-1); | 454 | s2 = point(x1 + w - 1, y1 + h - 1); |
425 | d1 = point(x2,y2); | 455 | d1 = point(x2, y2); |
426 | d2 = point(x2+w-1,y2+h-1); | 456 | d2 = point(x2 + w - 1, y2 + h - 1); |
427 | |||
428 | if ((y1 > y2) || ((y1 == y2) && (x1 >x2))) | ||
429 | direction = 0; | ||
430 | |||
431 | writemmr(0x2120,0x80000000); | ||
432 | writemmr(0x2120,0x90000000|ROP_S); | ||
433 | |||
434 | writemmr(SR1,direction?s2:s1); | ||
435 | writemmr(SR2,direction?s1:s2); | ||
436 | writemmr(DR1,direction?d2:d1); | ||
437 | writemmr(DR2,direction?d1:d2); | ||
438 | writemmr(0x2124,0x80000000|1<<22|1<<10|1<<7|direction); | ||
439 | } | ||
440 | 457 | ||
458 | if ((y1 > y2) || ((y1 == y2) && (x1 > x2))) | ||
459 | direction = 0; | ||
460 | |||
461 | writemmr(0x2120, 0x80000000); | ||
462 | writemmr(0x2120, 0x90000000 | ROP_S); | ||
463 | |||
464 | writemmr(SR1, direction ? s2 : s1); | ||
465 | writemmr(SR2, direction ? s1 : s2); | ||
466 | writemmr(DR1, direction ? d2 : d1); | ||
467 | writemmr(DR2, direction ? d1 : d2); | ||
468 | writemmr(0x2124, 0x80000000 | 1 << 22 | 1 << 10 | 1 << 7 | direction); | ||
469 | } | ||
441 | 470 | ||
442 | static struct accel_switch accel_image = { | 471 | static struct accel_switch accel_image = { |
443 | image_init_accel, | 472 | image_init_accel, |
@@ -450,30 +479,34 @@ static struct accel_switch accel_image = { | |||
450 | * Accel functions called by the upper layers | 479 | * Accel functions called by the upper layers |
451 | */ | 480 | */ |
452 | #ifdef CONFIG_FB_TRIDENT_ACCEL | 481 | #ifdef CONFIG_FB_TRIDENT_ACCEL |
453 | static void tridentfb_fillrect(struct fb_info * info, const struct fb_fillrect *fr) | 482 | static void tridentfb_fillrect(struct fb_info *info, |
483 | const struct fb_fillrect *fr) | ||
454 | { | 484 | { |
455 | int bpp = info->var.bits_per_pixel; | 485 | int bpp = info->var.bits_per_pixel; |
456 | int col = 0; | 486 | int col = 0; |
457 | 487 | ||
458 | switch (bpp) { | 488 | switch (bpp) { |
459 | default: | 489 | default: |
460 | case 8: col |= fr->color; | 490 | case 8: |
461 | col |= col << 8; | 491 | col |= fr->color; |
462 | col |= col << 16; | 492 | col |= col << 8; |
463 | break; | 493 | col |= col << 16; |
464 | case 16: col = ((u32 *)(info->pseudo_palette))[fr->color]; | 494 | break; |
465 | 495 | case 16: | |
466 | break; | 496 | col = ((u32 *)(info->pseudo_palette))[fr->color]; |
467 | case 32: col = ((u32 *)(info->pseudo_palette))[fr->color]; | 497 | break; |
468 | break; | 498 | case 32: |
469 | } | 499 | col = ((u32 *)(info->pseudo_palette))[fr->color]; |
470 | 500 | break; | |
501 | } | ||
502 | |||
471 | acc->fill_rect(fr->dx, fr->dy, fr->width, fr->height, col, fr->rop); | 503 | acc->fill_rect(fr->dx, fr->dy, fr->width, fr->height, col, fr->rop); |
472 | acc->wait_engine(); | 504 | acc->wait_engine(); |
473 | } | 505 | } |
474 | static void tridentfb_copyarea(struct fb_info *info, const struct fb_copyarea *ca) | 506 | static void tridentfb_copyarea(struct fb_info *info, |
507 | const struct fb_copyarea *ca) | ||
475 | { | 508 | { |
476 | acc->copy_rect(ca->sx,ca->sy,ca->dx,ca->dy,ca->width,ca->height); | 509 | acc->copy_rect(ca->sx, ca->sy, ca->dx, ca->dy, ca->width, ca->height); |
477 | acc->wait_engine(); | 510 | acc->wait_engine(); |
478 | } | 511 | } |
479 | #else /* !CONFIG_FB_TRIDENT_ACCEL */ | 512 | #else /* !CONFIG_FB_TRIDENT_ACCEL */ |
@@ -488,14 +521,14 @@ static void tridentfb_copyarea(struct fb_info *info, const struct fb_copyarea *c | |||
488 | 521 | ||
489 | static inline unsigned char read3X4(int reg) | 522 | static inline unsigned char read3X4(int reg) |
490 | { | 523 | { |
491 | struct tridentfb_par * par = (struct tridentfb_par *)fb_info.par; | 524 | struct tridentfb_par *par = (struct tridentfb_par *)fb_info.par; |
492 | writeb(reg, par->io_virt + CRT + 4); | 525 | writeb(reg, par->io_virt + CRT + 4); |
493 | return readb( par->io_virt + CRT + 5); | 526 | return readb(par->io_virt + CRT + 5); |
494 | } | 527 | } |
495 | 528 | ||
496 | static inline void write3X4(int reg, unsigned char val) | 529 | static inline void write3X4(int reg, unsigned char val) |
497 | { | 530 | { |
498 | struct tridentfb_par * par = (struct tridentfb_par *)fb_info.par; | 531 | struct tridentfb_par *par = (struct tridentfb_par *)fb_info.par; |
499 | writeb(reg, par->io_virt + CRT + 4); | 532 | writeb(reg, par->io_virt + CRT + 4); |
500 | writeb(val, par->io_virt + CRT + 5); | 533 | writeb(val, par->io_virt + CRT + 5); |
501 | } | 534 | } |
@@ -520,7 +553,7 @@ static inline unsigned char read3CE(int reg) | |||
520 | 553 | ||
521 | static inline void writeAttr(int reg, unsigned char val) | 554 | static inline void writeAttr(int reg, unsigned char val) |
522 | { | 555 | { |
523 | readb(((struct tridentfb_par *)fb_info.par)->io_virt + CRT + 0x0A); //flip-flop to index | 556 | readb(((struct tridentfb_par *)fb_info.par)->io_virt + CRT + 0x0A); /* flip-flop to index */ |
524 | t_outb(reg, 0x3C0); | 557 | t_outb(reg, 0x3C0); |
525 | t_outb(val, 0x3C0); | 558 | t_outb(val, 0x3C0); |
526 | } | 559 | } |
@@ -540,32 +573,41 @@ static inline void enable_mmio(void) | |||
540 | /* Unprotect registers */ | 573 | /* Unprotect registers */ |
541 | outb(NewMode1, 0x3C4); | 574 | outb(NewMode1, 0x3C4); |
542 | outb(0x80, 0x3C5); | 575 | outb(0x80, 0x3C5); |
543 | 576 | ||
544 | /* Enable MMIO */ | 577 | /* Enable MMIO */ |
545 | outb(PCIReg, 0x3D4); | 578 | outb(PCIReg, 0x3D4); |
546 | outb(inb(0x3D5) | 0x01, 0x3D5); | 579 | outb(inb(0x3D5) | 0x01, 0x3D5); |
547 | } | 580 | } |
548 | 581 | ||
549 | |||
550 | #define crtc_unlock() write3X4(CRTVSyncEnd, read3X4(CRTVSyncEnd) & 0x7F) | 582 | #define crtc_unlock() write3X4(CRTVSyncEnd, read3X4(CRTVSyncEnd) & 0x7F) |
551 | 583 | ||
552 | /* Return flat panel's maximum x resolution */ | 584 | /* Return flat panel's maximum x resolution */ |
553 | static int __devinit get_nativex(void) | 585 | static int __devinit get_nativex(void) |
554 | { | 586 | { |
555 | int x,y,tmp; | 587 | int x, y, tmp; |
556 | 588 | ||
557 | if (nativex) | 589 | if (nativex) |
558 | return nativex; | 590 | return nativex; |
559 | 591 | ||
560 | tmp = (read3CE(VertStretch) >> 4) & 3; | 592 | tmp = (read3CE(VertStretch) >> 4) & 3; |
561 | 593 | ||
562 | switch (tmp) { | 594 | switch (tmp) { |
563 | case 0: x = 1280; y = 1024; break; | 595 | case 0: |
564 | case 2: x = 1024; y = 768; break; | 596 | x = 1280; y = 1024; |
565 | case 3: x = 800; y = 600; break; | 597 | break; |
566 | case 4: x = 1400; y = 1050; break; | 598 | case 2: |
567 | case 1: | 599 | x = 1024; y = 768; |
568 | default:x = 640; y = 480; break; | 600 | break; |
601 | case 3: | ||
602 | x = 800; y = 600; | ||
603 | break; | ||
604 | case 4: | ||
605 | x = 1400; y = 1050; | ||
606 | break; | ||
607 | case 1: | ||
608 | default: | ||
609 | x = 640; y = 480; | ||
610 | break; | ||
569 | } | 611 | } |
570 | 612 | ||
571 | output("%dx%d flat panel found\n", x, y); | 613 | output("%dx%d flat panel found\n", x, y); |
@@ -576,25 +618,26 @@ static int __devinit get_nativex(void) | |||
576 | static void set_lwidth(int width) | 618 | static void set_lwidth(int width) |
577 | { | 619 | { |
578 | write3X4(Offset, width & 0xFF); | 620 | write3X4(Offset, width & 0xFF); |
579 | write3X4(AddColReg, (read3X4(AddColReg) & 0xCF) | ((width & 0x300) >>4)); | 621 | write3X4(AddColReg, |
622 | (read3X4(AddColReg) & 0xCF) | ((width & 0x300) >> 4)); | ||
580 | } | 623 | } |
581 | 624 | ||
582 | /* For resolutions smaller than FP resolution stretch */ | 625 | /* For resolutions smaller than FP resolution stretch */ |
583 | static void screen_stretch(void) | 626 | static void screen_stretch(void) |
584 | { | 627 | { |
585 | if (chip_id != CYBERBLADEXPAi1) | 628 | if (chip_id != CYBERBLADEXPAi1) |
586 | write3CE(BiosReg,0); | 629 | write3CE(BiosReg, 0); |
587 | else | 630 | else |
588 | write3CE(BiosReg,8); | 631 | write3CE(BiosReg, 8); |
589 | write3CE(VertStretch,(read3CE(VertStretch) & 0x7C) | 1); | 632 | write3CE(VertStretch, (read3CE(VertStretch) & 0x7C) | 1); |
590 | write3CE(HorStretch,(read3CE(HorStretch) & 0x7C) | 1); | 633 | write3CE(HorStretch, (read3CE(HorStretch) & 0x7C) | 1); |
591 | } | 634 | } |
592 | 635 | ||
593 | /* For resolutions smaller than FP resolution center */ | 636 | /* For resolutions smaller than FP resolution center */ |
594 | static void screen_center(void) | 637 | static void screen_center(void) |
595 | { | 638 | { |
596 | write3CE(VertStretch,(read3CE(VertStretch) & 0x7C) | 0x80); | 639 | write3CE(VertStretch, (read3CE(VertStretch) & 0x7C) | 0x80); |
597 | write3CE(HorStretch,(read3CE(HorStretch) & 0x7C) | 0x80); | 640 | write3CE(HorStretch, (read3CE(HorStretch) & 0x7C) | 0x80); |
598 | } | 641 | } |
599 | 642 | ||
600 | /* Address of first shown pixel in display memory */ | 643 | /* Address of first shown pixel in display memory */ |
@@ -602,40 +645,42 @@ static void set_screen_start(int base) | |||
602 | { | 645 | { |
603 | write3X4(StartAddrLow, base & 0xFF); | 646 | write3X4(StartAddrLow, base & 0xFF); |
604 | write3X4(StartAddrHigh, (base & 0xFF00) >> 8); | 647 | write3X4(StartAddrHigh, (base & 0xFF00) >> 8); |
605 | write3X4(CRTCModuleTest, (read3X4(CRTCModuleTest) & 0xDF) | ((base & 0x10000) >> 11)); | 648 | write3X4(CRTCModuleTest, |
606 | write3X4(CRTHiOrd, (read3X4(CRTHiOrd) & 0xF8) | ((base & 0xE0000) >> 17)); | 649 | (read3X4(CRTCModuleTest) & 0xDF) | ((base & 0x10000) >> 11)); |
650 | write3X4(CRTHiOrd, | ||
651 | (read3X4(CRTHiOrd) & 0xF8) | ((base & 0xE0000) >> 17)); | ||
607 | } | 652 | } |
608 | 653 | ||
609 | /* Use 20.12 fixed-point for NTSC value and frequency calculation */ | 654 | /* Use 20.12 fixed-point for NTSC value and frequency calculation */ |
610 | #define calc_freq(n,m,k) ( ((unsigned long)0xE517 * (n+8) / ((m+2)*(1<<k))) >> 12 ) | 655 | #define calc_freq(n, m, k) ( ((unsigned long)0xE517 * (n + 8) / ((m + 2) * (1 << k))) >> 12 ) |
611 | 656 | ||
612 | /* Set dotclock frequency */ | 657 | /* Set dotclock frequency */ |
613 | static void set_vclk(int freq) | 658 | static void set_vclk(int freq) |
614 | { | 659 | { |
615 | int m,n,k; | 660 | int m, n, k; |
616 | int f,fi,d,di; | 661 | int f, fi, d, di; |
617 | unsigned char lo=0,hi=0; | 662 | unsigned char lo = 0, hi = 0; |
618 | 663 | ||
619 | d = 20; | 664 | d = 20; |
620 | for(k = 2;k>=0;k--) | 665 | for (k = 2; k >= 0; k--) |
621 | for(m = 0;m<63;m++) | 666 | for (m = 0; m < 63; m++) |
622 | for(n = 0;n<128;n++) { | 667 | for (n = 0; n < 128; n++) { |
623 | fi = calc_freq(n,m,k); | 668 | fi = calc_freq(n, m, k); |
624 | if ((di = abs(fi - freq)) < d) { | 669 | if ((di = abs(fi - freq)) < d) { |
625 | d = di; | 670 | d = di; |
626 | f = fi; | 671 | f = fi; |
627 | lo = n; | 672 | lo = n; |
628 | hi = (k<<6) | m; | 673 | hi = (k << 6) | m; |
629 | } | 674 | } |
630 | } | 675 | } |
631 | if (chip3D) { | 676 | if (chip3D) { |
632 | write3C4(ClockHigh,hi); | 677 | write3C4(ClockHigh, hi); |
633 | write3C4(ClockLow,lo); | 678 | write3C4(ClockLow, lo); |
634 | } else { | 679 | } else { |
635 | outb(lo,0x43C8); | 680 | outb(lo, 0x43C8); |
636 | outb(hi,0x43C9); | 681 | outb(hi, 0x43C9); |
637 | } | 682 | } |
638 | debug("VCLK = %X %X\n",hi,lo); | 683 | debug("VCLK = %X %X\n", hi, lo); |
639 | } | 684 | } |
640 | 685 | ||
641 | /* Set number of lines for flat panels*/ | 686 | /* Set number of lines for flat panels*/ |
@@ -663,7 +708,7 @@ static unsigned int __devinit get_displaytype(void) | |||
663 | return DISPLAY_FP; | 708 | return DISPLAY_FP; |
664 | if (crt || !chipcyber) | 709 | if (crt || !chipcyber) |
665 | return DISPLAY_CRT; | 710 | return DISPLAY_CRT; |
666 | return (read3CE(FPConfig) & 0x10)?DISPLAY_FP:DISPLAY_CRT; | 711 | return (read3CE(FPConfig) & 0x10) ? DISPLAY_FP : DISPLAY_CRT; |
667 | } | 712 | } |
668 | 713 | ||
669 | /* Try detecting the video memory size */ | 714 | /* Try detecting the video memory size */ |
@@ -676,100 +721,136 @@ static unsigned int __devinit get_memsize(void) | |||
676 | if (memsize) | 721 | if (memsize) |
677 | k = memsize * Kb; | 722 | k = memsize * Kb; |
678 | else | 723 | else |
679 | switch (chip_id) { | 724 | switch (chip_id) { |
680 | case CYBER9525DVD: k = 2560 * Kb; break; | 725 | case CYBER9525DVD: |
726 | k = 2560 * Kb; | ||
727 | break; | ||
681 | default: | 728 | default: |
682 | tmp = read3X4(SPR) & 0x0F; | 729 | tmp = read3X4(SPR) & 0x0F; |
683 | switch (tmp) { | 730 | switch (tmp) { |
684 | 731 | ||
685 | case 0x01: k = 512; break; | 732 | case 0x01: |
686 | case 0x02: k = 6 * Mb; break; /* XP */ | 733 | k = 512; |
687 | case 0x03: k = 1 * Mb; break; | 734 | break; |
688 | case 0x04: k = 8 * Mb; break; | 735 | case 0x02: |
689 | case 0x06: k = 10 * Mb; break; /* XP */ | 736 | k = 6 * Mb; /* XP */ |
690 | case 0x07: k = 2 * Mb; break; | 737 | break; |
691 | case 0x08: k = 12 * Mb; break; /* XP */ | 738 | case 0x03: |
692 | case 0x0A: k = 14 * Mb; break; /* XP */ | 739 | k = 1 * Mb; |
693 | case 0x0C: k = 16 * Mb; break; /* XP */ | 740 | break; |
694 | case 0x0E: /* XP */ | 741 | case 0x04: |
695 | 742 | k = 8 * Mb; | |
696 | tmp2 = read3C4(0xC1); | 743 | break; |
697 | switch (tmp2) { | 744 | case 0x06: |
698 | case 0x00: k = 20 * Mb; break; | 745 | k = 10 * Mb; /* XP */ |
699 | case 0x01: k = 24 * Mb; break; | 746 | break; |
700 | case 0x10: k = 28 * Mb; break; | 747 | case 0x07: |
701 | case 0x11: k = 32 * Mb; break; | 748 | k = 2 * Mb; |
702 | default: k = 1 * Mb; break; | 749 | break; |
703 | } | 750 | case 0x08: |
751 | k = 12 * Mb; /* XP */ | ||
752 | break; | ||
753 | case 0x0A: | ||
754 | k = 14 * Mb; /* XP */ | ||
755 | break; | ||
756 | case 0x0C: | ||
757 | k = 16 * Mb; /* XP */ | ||
758 | break; | ||
759 | case 0x0E: /* XP */ | ||
760 | |||
761 | tmp2 = read3C4(0xC1); | ||
762 | switch (tmp2) { | ||
763 | case 0x00: | ||
764 | k = 20 * Mb; | ||
765 | break; | ||
766 | case 0x01: | ||
767 | k = 24 * Mb; | ||
768 | break; | ||
769 | case 0x10: | ||
770 | k = 28 * Mb; | ||
771 | break; | ||
772 | case 0x11: | ||
773 | k = 32 * Mb; | ||
774 | break; | ||
775 | default: | ||
776 | k = 1 * Mb; | ||
777 | break; | ||
778 | } | ||
779 | break; | ||
780 | |||
781 | case 0x0F: | ||
782 | k = 4 * Mb; | ||
783 | break; | ||
784 | default: | ||
785 | k = 1 * Mb; | ||
704 | break; | 786 | break; |
705 | |||
706 | case 0x0F: k = 4 * Mb; break; | ||
707 | default: k = 1 * Mb; | ||
708 | } | 787 | } |
709 | } | 788 | } |
710 | 789 | ||
711 | k -= memdiff * Kb; | 790 | k -= memdiff * Kb; |
712 | output("framebuffer size = %d Kb\n", k/Kb); | 791 | output("framebuffer size = %d Kb\n", k / Kb); |
713 | return k; | 792 | return k; |
714 | } | 793 | } |
715 | 794 | ||
716 | /* See if we can handle the video mode described in var */ | 795 | /* See if we can handle the video mode described in var */ |
717 | static int tridentfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | 796 | static int tridentfb_check_var(struct fb_var_screeninfo *var, |
797 | struct fb_info *info) | ||
718 | { | 798 | { |
719 | int bpp = var->bits_per_pixel; | 799 | int bpp = var->bits_per_pixel; |
720 | debug("enter\n"); | 800 | debug("enter\n"); |
721 | 801 | ||
722 | /* check color depth */ | 802 | /* check color depth */ |
723 | if (bpp == 24 ) | 803 | if (bpp == 24) |
724 | bpp = var->bits_per_pixel = 32; | 804 | bpp = var->bits_per_pixel = 32; |
725 | /* check whether resolution fits on panel and in memory*/ | 805 | /* check whether resolution fits on panel and in memory */ |
726 | if (flatpanel && nativex && var->xres > nativex) | 806 | if (flatpanel && nativex && var->xres > nativex) |
727 | return -EINVAL; | 807 | return -EINVAL; |
728 | if (var->xres * var->yres_virtual * bpp/8 > info->fix.smem_len) | 808 | if (var->xres * var->yres_virtual * bpp / 8 > info->fix.smem_len) |
729 | return -EINVAL; | 809 | return -EINVAL; |
730 | 810 | ||
731 | switch (bpp) { | 811 | switch (bpp) { |
732 | case 8: | 812 | case 8: |
733 | var->red.offset = 0; | 813 | var->red.offset = 0; |
734 | var->green.offset = 0; | 814 | var->green.offset = 0; |
735 | var->blue.offset = 0; | 815 | var->blue.offset = 0; |
736 | var->red.length = 6; | 816 | var->red.length = 6; |
737 | var->green.length = 6; | 817 | var->green.length = 6; |
738 | var->blue.length = 6; | 818 | var->blue.length = 6; |
739 | break; | 819 | break; |
740 | case 16: | 820 | case 16: |
741 | var->red.offset = 11; | 821 | var->red.offset = 11; |
742 | var->green.offset = 5; | 822 | var->green.offset = 5; |
743 | var->blue.offset = 0; | 823 | var->blue.offset = 0; |
744 | var->red.length = 5; | 824 | var->red.length = 5; |
745 | var->green.length = 6; | 825 | var->green.length = 6; |
746 | var->blue.length = 5; | 826 | var->blue.length = 5; |
747 | break; | 827 | break; |
748 | case 32: | 828 | case 32: |
749 | var->red.offset = 16; | 829 | var->red.offset = 16; |
750 | var->green.offset = 8; | 830 | var->green.offset = 8; |
751 | var->blue.offset = 0; | 831 | var->blue.offset = 0; |
752 | var->red.length = 8; | 832 | var->red.length = 8; |
753 | var->green.length = 8; | 833 | var->green.length = 8; |
754 | var->blue.length = 8; | 834 | var->blue.length = 8; |
755 | break; | 835 | break; |
756 | default: | 836 | default: |
757 | return -EINVAL; | 837 | return -EINVAL; |
758 | } | 838 | } |
759 | debug("exit\n"); | 839 | debug("exit\n"); |
760 | 840 | ||
761 | return 0; | 841 | return 0; |
762 | 842 | ||
763 | } | 843 | } |
844 | |||
764 | /* Pan the display */ | 845 | /* Pan the display */ |
765 | static int tridentfb_pan_display(struct fb_var_screeninfo *var, | 846 | static int tridentfb_pan_display(struct fb_var_screeninfo *var, |
766 | struct fb_info *info) | 847 | struct fb_info *info) |
767 | { | 848 | { |
768 | unsigned int offset; | 849 | unsigned int offset; |
769 | 850 | ||
770 | debug("enter\n"); | 851 | debug("enter\n"); |
771 | offset = (var->xoffset + (var->yoffset * var->xres)) | 852 | offset = (var->xoffset + (var->yoffset * var->xres)) |
772 | * var->bits_per_pixel/32; | 853 | * var->bits_per_pixel / 32; |
773 | info->var.xoffset = var->xoffset; | 854 | info->var.xoffset = var->xoffset; |
774 | info->var.yoffset = var->yoffset; | 855 | info->var.yoffset = var->yoffset; |
775 | set_screen_start(offset); | 856 | set_screen_start(offset); |
@@ -777,36 +858,38 @@ static int tridentfb_pan_display(struct fb_var_screeninfo *var, | |||
777 | return 0; | 858 | return 0; |
778 | } | 859 | } |
779 | 860 | ||
780 | #define shadowmode_on() write3CE(CyberControl,read3CE(CyberControl) | 0x81) | 861 | #define shadowmode_on() write3CE(CyberControl, read3CE(CyberControl) | 0x81) |
781 | #define shadowmode_off() write3CE(CyberControl,read3CE(CyberControl) & 0x7E) | 862 | #define shadowmode_off() write3CE(CyberControl, read3CE(CyberControl) & 0x7E) |
782 | 863 | ||
783 | /* Set the hardware to the requested video mode */ | 864 | /* Set the hardware to the requested video mode */ |
784 | static int tridentfb_set_par(struct fb_info *info) | 865 | static int tridentfb_set_par(struct fb_info *info) |
785 | { | 866 | { |
786 | struct tridentfb_par * par = (struct tridentfb_par *)(info->par); | 867 | struct tridentfb_par *par = (struct tridentfb_par *)(info->par); |
787 | u32 htotal,hdispend,hsyncstart,hsyncend,hblankstart,hblankend, | 868 | u32 htotal, hdispend, hsyncstart, hsyncend, hblankstart, hblankend; |
788 | vtotal,vdispend,vsyncstart,vsyncend,vblankstart,vblankend; | 869 | u32 vtotal, vdispend, vsyncstart, vsyncend, vblankstart, vblankend; |
789 | struct fb_var_screeninfo *var = &info->var; | 870 | struct fb_var_screeninfo *var = &info->var; |
790 | int bpp = var->bits_per_pixel; | 871 | int bpp = var->bits_per_pixel; |
791 | unsigned char tmp; | 872 | unsigned char tmp; |
792 | debug("enter\n"); | 873 | debug("enter\n"); |
793 | htotal = (var->xres + var->left_margin + var->right_margin + var->hsync_len)/8 - 10; | 874 | hdispend = var->xres / 8 - 1; |
794 | hdispend = var->xres/8 - 1; | 875 | hsyncstart = (var->xres + var->right_margin) / 8; |
795 | hsyncstart = (var->xres + var->right_margin)/8; | 876 | hsyncend = var->hsync_len / 8; |
796 | hsyncend = var->hsync_len/8; | 877 | htotal = |
878 | (var->xres + var->left_margin + var->right_margin + | ||
879 | var->hsync_len) / 8 - 10; | ||
797 | hblankstart = hdispend + 1; | 880 | hblankstart = hdispend + 1; |
798 | hblankend = htotal + 5; | 881 | hblankend = htotal + 5; |
799 | 882 | ||
800 | vtotal = var->yres + var->upper_margin + var->lower_margin + var->vsync_len - 2; | ||
801 | vdispend = var->yres - 1; | 883 | vdispend = var->yres - 1; |
802 | vsyncstart = var->yres + var->lower_margin; | 884 | vsyncstart = var->yres + var->lower_margin; |
803 | vsyncend = var->vsync_len; | 885 | vsyncend = var->vsync_len; |
886 | vtotal = var->upper_margin + vsyncstart + vsyncend - 2; | ||
804 | vblankstart = var->yres; | 887 | vblankstart = var->yres; |
805 | vblankend = vtotal + 2; | 888 | vblankend = vtotal + 2; |
806 | 889 | ||
807 | enable_mmio(); | 890 | enable_mmio(); |
808 | crtc_unlock(); | 891 | crtc_unlock(); |
809 | write3CE(CyberControl,8); | 892 | write3CE(CyberControl, 8); |
810 | 893 | ||
811 | if (flatpanel && var->xres < nativex) { | 894 | if (flatpanel && var->xres < nativex) { |
812 | /* | 895 | /* |
@@ -814,18 +897,18 @@ static int tridentfb_set_par(struct fb_info *info) | |||
814 | * than requested resolution decide whether | 897 | * than requested resolution decide whether |
815 | * we stretch or center | 898 | * we stretch or center |
816 | */ | 899 | */ |
817 | t_outb(0xEB,0x3C2); | 900 | t_outb(0xEB, 0x3C2); |
818 | 901 | ||
819 | shadowmode_on(); | 902 | shadowmode_on(); |
820 | 903 | ||
821 | if (center) | 904 | if (center) |
822 | screen_center(); | 905 | screen_center(); |
823 | else if (stretch) | 906 | else if (stretch) |
824 | screen_stretch(); | 907 | screen_stretch(); |
825 | 908 | ||
826 | } else { | 909 | } else { |
827 | t_outb(0x2B,0x3C2); | 910 | t_outb(0x2B, 0x3C2); |
828 | write3CE(CyberControl,8); | 911 | write3CE(CyberControl, 8); |
829 | } | 912 | } |
830 | 913 | ||
831 | /* vertical timing values */ | 914 | /* vertical timing values */ |
@@ -834,15 +917,15 @@ static int tridentfb_set_par(struct fb_info *info) | |||
834 | write3X4(CRTVSyncStart, vsyncstart & 0xFF); | 917 | write3X4(CRTVSyncStart, vsyncstart & 0xFF); |
835 | write3X4(CRTVSyncEnd, (vsyncend & 0x0F)); | 918 | write3X4(CRTVSyncEnd, (vsyncend & 0x0F)); |
836 | write3X4(CRTVBlankStart, vblankstart & 0xFF); | 919 | write3X4(CRTVBlankStart, vblankstart & 0xFF); |
837 | write3X4(CRTVBlankEnd, 0/*p->vblankend & 0xFF*/); | 920 | write3X4(CRTVBlankEnd, 0 /* p->vblankend & 0xFF */ ); |
838 | 921 | ||
839 | /* horizontal timing values */ | 922 | /* horizontal timing values */ |
840 | write3X4(CRTHTotal, htotal & 0xFF); | 923 | write3X4(CRTHTotal, htotal & 0xFF); |
841 | write3X4(CRTHDispEnd, hdispend & 0xFF); | 924 | write3X4(CRTHDispEnd, hdispend & 0xFF); |
842 | write3X4(CRTHSyncStart, hsyncstart & 0xFF); | 925 | write3X4(CRTHSyncStart, hsyncstart & 0xFF); |
843 | write3X4(CRTHSyncEnd, (hsyncend & 0x1F) | ((hblankend & 0x20)<<2)); | 926 | write3X4(CRTHSyncEnd, (hsyncend & 0x1F) | ((hblankend & 0x20) << 2)); |
844 | write3X4(CRTHBlankStart, hblankstart & 0xFF); | 927 | write3X4(CRTHBlankStart, hblankstart & 0xFF); |
845 | write3X4(CRTHBlankEnd, 0/*(p->hblankend & 0x1F)*/); | 928 | write3X4(CRTHBlankEnd, 0 /* (p->hblankend & 0x1F) */ ); |
846 | 929 | ||
847 | /* higher bits of vertical timing values */ | 930 | /* higher bits of vertical timing values */ |
848 | tmp = 0x10; | 931 | tmp = 0x10; |
@@ -856,7 +939,7 @@ static int tridentfb_set_par(struct fb_info *info) | |||
856 | if (vsyncstart & 0x200) tmp |= 0x80; | 939 | if (vsyncstart & 0x200) tmp |= 0x80; |
857 | write3X4(CRTOverflow, tmp); | 940 | write3X4(CRTOverflow, tmp); |
858 | 941 | ||
859 | tmp = read3X4(CRTHiOrd) | 0x08; //line compare bit 10 | 942 | tmp = read3X4(CRTHiOrd) | 0x08; /* line compare bit 10 */ |
860 | if (vtotal & 0x400) tmp |= 0x80; | 943 | if (vtotal & 0x400) tmp |= 0x80; |
861 | if (vblankstart & 0x400) tmp |= 0x40; | 944 | if (vblankstart & 0x400) tmp |= 0x40; |
862 | if (vsyncstart & 0x400) tmp |= 0x20; | 945 | if (vsyncstart & 0x400) tmp |= 0x20; |
@@ -867,84 +950,100 @@ static int tridentfb_set_par(struct fb_info *info) | |||
867 | if (htotal & 0x800) tmp |= 0x800 >> 11; | 950 | if (htotal & 0x800) tmp |= 0x800 >> 11; |
868 | if (hblankstart & 0x800) tmp |= 0x800 >> 7; | 951 | if (hblankstart & 0x800) tmp |= 0x800 >> 7; |
869 | write3X4(HorizOverflow, tmp); | 952 | write3X4(HorizOverflow, tmp); |
870 | 953 | ||
871 | tmp = 0x40; | 954 | tmp = 0x40; |
872 | if (vblankstart & 0x200) tmp |= 0x20; | 955 | if (vblankstart & 0x200) tmp |= 0x20; |
873 | //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80; //double scan for 200 line modes | 956 | //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80; /* double scan for 200 line modes */ |
874 | write3X4(CRTMaxScanLine, tmp); | 957 | write3X4(CRTMaxScanLine, tmp); |
875 | 958 | ||
876 | write3X4(CRTLineCompare,0xFF); | 959 | write3X4(CRTLineCompare, 0xFF); |
877 | write3X4(CRTPRowScan,0); | 960 | write3X4(CRTPRowScan, 0); |
878 | write3X4(CRTModeControl,0xC3); | 961 | write3X4(CRTModeControl, 0xC3); |
879 | 962 | ||
880 | write3X4(LinearAddReg,0x20); //enable linear addressing | 963 | write3X4(LinearAddReg, 0x20); /* enable linear addressing */ |
881 | 964 | ||
882 | tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84:0x80; | 965 | tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80; |
883 | write3X4(CRTCModuleTest,tmp); //enable access extended memory | 966 | write3X4(CRTCModuleTest, tmp); /* enable access extended memory */ |
884 | 967 | ||
885 | write3X4(GraphEngReg, 0x80); //enable GE for text acceleration | 968 | write3X4(GraphEngReg, 0x80); /* enable GE for text acceleration */ |
886 | 969 | ||
887 | #ifdef CONFIG_FB_TRIDENT_ACCEL | 970 | #ifdef CONFIG_FB_TRIDENT_ACCEL |
888 | acc->init_accel(info->var.xres,bpp); | 971 | acc->init_accel(info->var.xres, bpp); |
889 | #endif | 972 | #endif |
890 | 973 | ||
891 | switch (bpp) { | 974 | switch (bpp) { |
892 | case 8: tmp = 0x00; break; | 975 | case 8: |
893 | case 16: tmp = 0x05; break; | 976 | tmp = 0x00; |
894 | case 24: tmp = 0x29; break; | 977 | break; |
895 | case 32: tmp = 0x09; | 978 | case 16: |
979 | tmp = 0x05; | ||
980 | break; | ||
981 | case 24: | ||
982 | tmp = 0x29; | ||
983 | break; | ||
984 | case 32: | ||
985 | tmp = 0x09; | ||
986 | break; | ||
896 | } | 987 | } |
897 | 988 | ||
898 | write3X4(PixelBusReg, tmp); | 989 | write3X4(PixelBusReg, tmp); |
899 | 990 | ||
900 | tmp = 0x10; | 991 | tmp = 0x10; |
901 | if (chipcyber) | 992 | if (chipcyber) |
902 | tmp |= 0x20; | 993 | tmp |= 0x20; |
903 | write3X4(DRAMControl, tmp); //both IO,linear enable | 994 | write3X4(DRAMControl, tmp); /* both IO, linear enable */ |
904 | 995 | ||
905 | write3X4(InterfaceSel, read3X4(InterfaceSel) | 0x40); | 996 | write3X4(InterfaceSel, read3X4(InterfaceSel) | 0x40); |
906 | write3X4(Performance,0x92); | 997 | write3X4(Performance, 0x92); |
907 | write3X4(PCIReg,0x07); //MMIO & PCI read and write burst enable | 998 | write3X4(PCIReg, 0x07); /* MMIO & PCI read and write burst enable */ |
908 | 999 | ||
909 | /* convert from picoseconds to MHz */ | 1000 | /* convert from picoseconds to MHz */ |
910 | par->vclk = 1000000/info->var.pixclock; | 1001 | par->vclk = 1000000 / info->var.pixclock; |
911 | if (bpp == 32) | 1002 | if (bpp == 32) |
912 | par->vclk *=2; | 1003 | par->vclk *= 2; |
913 | set_vclk(par->vclk); | 1004 | set_vclk(par->vclk); |
914 | 1005 | ||
915 | write3C4(0,3); | 1006 | write3C4(0, 3); |
916 | write3C4(1,1); //set char clock 8 dots wide | 1007 | write3C4(1, 1); /* set char clock 8 dots wide */ |
917 | write3C4(2,0x0F); //enable 4 maps because needed in chain4 mode | 1008 | write3C4(2, 0x0F); /* enable 4 maps because needed in chain4 mode */ |
918 | write3C4(3,0); | 1009 | write3C4(3, 0); |
919 | write3C4(4,0x0E); //memory mode enable bitmaps ?? | 1010 | write3C4(4, 0x0E); /* memory mode enable bitmaps ?? */ |
920 | 1011 | ||
921 | write3CE(MiscExtFunc,(bpp==32)?0x1A:0x12); //divide clock by 2 if 32bpp | 1012 | write3CE(MiscExtFunc, (bpp == 32) ? 0x1A : 0x12); /* divide clock by 2 if 32bpp */ |
922 | //chain4 mode display and CPU path | 1013 | /* chain4 mode display and CPU path */ |
923 | write3CE(0x5,0x40); //no CGA compat,allow 256 col | 1014 | write3CE(0x5, 0x40); /* no CGA compat, allow 256 col */ |
924 | write3CE(0x6,0x05); //graphics mode | 1015 | write3CE(0x6, 0x05); /* graphics mode */ |
925 | write3CE(0x7,0x0F); //planes? | 1016 | write3CE(0x7, 0x0F); /* planes? */ |
926 | 1017 | ||
927 | if (chip_id == CYBERBLADEXPAi1) { | 1018 | if (chip_id == CYBERBLADEXPAi1) { |
928 | /* This fixes snow-effect in 32 bpp */ | 1019 | /* This fixes snow-effect in 32 bpp */ |
929 | write3X4(CRTHSyncStart,0x84); | 1020 | write3X4(CRTHSyncStart, 0x84); |
930 | } | 1021 | } |
931 | 1022 | ||
932 | writeAttr(0x10,0x41); //graphics mode and support 256 color modes | 1023 | writeAttr(0x10, 0x41); /* graphics mode and support 256 color modes */ |
933 | writeAttr(0x12,0x0F); //planes | 1024 | writeAttr(0x12, 0x0F); /* planes */ |
934 | writeAttr(0x13,0); //horizontal pel panning | 1025 | writeAttr(0x13, 0); /* horizontal pel panning */ |
935 | 1026 | ||
936 | //colors | 1027 | /* colors */ |
937 | for(tmp = 0;tmp < 0x10;tmp++) | 1028 | for (tmp = 0; tmp < 0x10; tmp++) |
938 | writeAttr(tmp,tmp); | 1029 | writeAttr(tmp, tmp); |
939 | readb(par->io_virt + CRT + 0x0A); //flip-flop to index | 1030 | readb(par->io_virt + CRT + 0x0A); /* flip-flop to index */ |
940 | t_outb(0x20, 0x3C0); //enable attr | 1031 | t_outb(0x20, 0x3C0); /* enable attr */ |
941 | 1032 | ||
942 | switch (bpp) { | 1033 | switch (bpp) { |
943 | case 8: tmp = 0;break; //256 colors | 1034 | case 8: |
944 | case 15: tmp = 0x10;break; | 1035 | tmp = 0; |
945 | case 16: tmp = 0x30;break; //hicolor | 1036 | break; |
946 | case 24: //truecolor | 1037 | case 15: |
947 | case 32: tmp = 0xD0;break; | 1038 | tmp = 0x10; |
1039 | break; | ||
1040 | case 16: | ||
1041 | tmp = 0x30; | ||
1042 | break; | ||
1043 | case 24: | ||
1044 | case 32: | ||
1045 | tmp = 0xD0; | ||
1046 | break; | ||
948 | } | 1047 | } |
949 | 1048 | ||
950 | t_inb(0x3C8); | 1049 | t_inb(0x3C8); |
@@ -952,37 +1051,36 @@ static int tridentfb_set_par(struct fb_info *info) | |||
952 | t_inb(0x3C6); | 1051 | t_inb(0x3C6); |
953 | t_inb(0x3C6); | 1052 | t_inb(0x3C6); |
954 | t_inb(0x3C6); | 1053 | t_inb(0x3C6); |
955 | t_outb(tmp,0x3C6); | 1054 | t_outb(tmp, 0x3C6); |
956 | t_inb(0x3C8); | 1055 | t_inb(0x3C8); |
957 | 1056 | ||
958 | if (flatpanel) | 1057 | if (flatpanel) |
959 | set_number_of_lines(info->var.yres); | 1058 | set_number_of_lines(info->var.yres); |
960 | set_lwidth(info->var.xres * bpp/(4*16)); | 1059 | set_lwidth(info->var.xres * bpp / (4 * 16)); |
961 | info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; | 1060 | info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; |
962 | info->fix.line_length = info->var.xres * (bpp >> 3); | 1061 | info->fix.line_length = info->var.xres * (bpp >> 3); |
963 | info->cmap.len = (bpp == 8) ? 256: 16; | 1062 | info->cmap.len = (bpp == 8) ? 256 : 16; |
964 | debug("exit\n"); | 1063 | debug("exit\n"); |
965 | return 0; | 1064 | return 0; |
966 | } | 1065 | } |
967 | 1066 | ||
968 | /* Set one color register */ | 1067 | /* Set one color register */ |
969 | static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green, | 1068 | static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green, |
970 | unsigned blue, unsigned transp, | 1069 | unsigned blue, unsigned transp, |
971 | struct fb_info *info) | 1070 | struct fb_info *info) |
972 | { | 1071 | { |
973 | int bpp = info->var.bits_per_pixel; | 1072 | int bpp = info->var.bits_per_pixel; |
974 | 1073 | ||
975 | if (regno >= info->cmap.len) | 1074 | if (regno >= info->cmap.len) |
976 | return 1; | 1075 | return 1; |
977 | 1076 | ||
978 | |||
979 | if (bpp == 8) { | 1077 | if (bpp == 8) { |
980 | t_outb(0xFF,0x3C6); | 1078 | t_outb(0xFF, 0x3C6); |
981 | t_outb(regno,0x3C8); | 1079 | t_outb(regno, 0x3C8); |
982 | 1080 | ||
983 | t_outb(red>>10,0x3C9); | 1081 | t_outb(red >> 10, 0x3C9); |
984 | t_outb(green>>10,0x3C9); | 1082 | t_outb(green >> 10, 0x3C9); |
985 | t_outb(blue>>10,0x3C9); | 1083 | t_outb(blue >> 10, 0x3C9); |
986 | 1084 | ||
987 | } else if (regno < 16) { | 1085 | } else if (regno < 16) { |
988 | if (bpp == 16) { /* RGB 565 */ | 1086 | if (bpp == 16) { /* RGB 565 */ |
@@ -994,29 +1092,28 @@ static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green, | |||
994 | ((u32 *)(info->pseudo_palette))[regno] = col; | 1092 | ((u32 *)(info->pseudo_palette))[regno] = col; |
995 | } else if (bpp == 32) /* ARGB 8888 */ | 1093 | } else if (bpp == 32) /* ARGB 8888 */ |
996 | ((u32*)info->pseudo_palette)[regno] = | 1094 | ((u32*)info->pseudo_palette)[regno] = |
997 | ((transp & 0xFF00) <<16) | | 1095 | ((transp & 0xFF00) << 16) | |
998 | ((red & 0xFF00) << 8) | | 1096 | ((red & 0xFF00) << 8) | |
999 | ((green & 0xFF00)) | | 1097 | ((green & 0xFF00)) | |
1000 | ((blue & 0xFF00)>>8); | 1098 | ((blue & 0xFF00) >> 8); |
1001 | } | 1099 | } |
1002 | 1100 | ||
1003 | // debug("exit\n"); | 1101 | /* debug("exit\n"); */ |
1004 | return 0; | 1102 | return 0; |
1005 | } | 1103 | } |
1006 | 1104 | ||
1007 | /* Try blanking the screen.For flat panels it does nothing */ | 1105 | /* Try blanking the screen.For flat panels it does nothing */ |
1008 | static int tridentfb_blank(int blank_mode, struct fb_info *info) | 1106 | static int tridentfb_blank(int blank_mode, struct fb_info *info) |
1009 | { | 1107 | { |
1010 | unsigned char PMCont,DPMSCont; | 1108 | unsigned char PMCont, DPMSCont; |
1011 | 1109 | ||
1012 | debug("enter\n"); | 1110 | debug("enter\n"); |
1013 | if (flatpanel) | 1111 | if (flatpanel) |
1014 | return 0; | 1112 | return 0; |
1015 | t_outb(0x04,0x83C8); /* Read DPMS Control */ | 1113 | t_outb(0x04, 0x83C8); /* Read DPMS Control */ |
1016 | PMCont = t_inb(0x83C6) & 0xFC; | 1114 | PMCont = t_inb(0x83C6) & 0xFC; |
1017 | DPMSCont = read3CE(PowerStatus) & 0xFC; | 1115 | DPMSCont = read3CE(PowerStatus) & 0xFC; |
1018 | switch (blank_mode) | 1116 | switch (blank_mode) { |
1019 | { | ||
1020 | case FB_BLANK_UNBLANK: | 1117 | case FB_BLANK_UNBLANK: |
1021 | /* Screen: On, HSync: On, VSync: On */ | 1118 | /* Screen: On, HSync: On, VSync: On */ |
1022 | case FB_BLANK_NORMAL: | 1119 | case FB_BLANK_NORMAL: |
@@ -1039,11 +1136,11 @@ static int tridentfb_blank(int blank_mode, struct fb_info *info) | |||
1039 | PMCont |= 0x00; | 1136 | PMCont |= 0x00; |
1040 | DPMSCont |= 0x03; | 1137 | DPMSCont |= 0x03; |
1041 | break; | 1138 | break; |
1042 | } | 1139 | } |
1043 | 1140 | ||
1044 | write3CE(PowerStatus,DPMSCont); | 1141 | write3CE(PowerStatus, DPMSCont); |
1045 | t_outb(4,0x83C8); | 1142 | t_outb(4, 0x83C8); |
1046 | t_outb(PMCont,0x83C6); | 1143 | t_outb(PMCont, 0x83C6); |
1047 | 1144 | ||
1048 | debug("exit\n"); | 1145 | debug("exit\n"); |
1049 | 1146 | ||
@@ -1051,7 +1148,20 @@ static int tridentfb_blank(int blank_mode, struct fb_info *info) | |||
1051 | return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0; | 1148 | return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0; |
1052 | } | 1149 | } |
1053 | 1150 | ||
1054 | static int __devinit trident_pci_probe(struct pci_dev * dev, const struct pci_device_id * id) | 1151 | static struct fb_ops tridentfb_ops = { |
1152 | .owner = THIS_MODULE, | ||
1153 | .fb_setcolreg = tridentfb_setcolreg, | ||
1154 | .fb_pan_display = tridentfb_pan_display, | ||
1155 | .fb_blank = tridentfb_blank, | ||
1156 | .fb_check_var = tridentfb_check_var, | ||
1157 | .fb_set_par = tridentfb_set_par, | ||
1158 | .fb_fillrect = tridentfb_fillrect, | ||
1159 | .fb_copyarea = tridentfb_copyarea, | ||
1160 | .fb_imageblit = cfb_imageblit, | ||
1161 | }; | ||
1162 | |||
1163 | static int __devinit trident_pci_probe(struct pci_dev * dev, | ||
1164 | const struct pci_device_id * id) | ||
1055 | { | 1165 | { |
1056 | int err; | 1166 | int err; |
1057 | unsigned char revision; | 1167 | unsigned char revision; |
@@ -1062,31 +1172,42 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, const struct pci_de | |||
1062 | 1172 | ||
1063 | chip_id = id->device; | 1173 | chip_id = id->device; |
1064 | 1174 | ||
1065 | if(chip_id == CYBERBLADEi1) | 1175 | if (chip_id == CYBERBLADEi1) |
1066 | output("*** Please do use cyblafb, Cyberblade/i1 support " | 1176 | output("*** Please do use cyblafb, Cyberblade/i1 support " |
1067 | "will soon be removed from tridentfb!\n"); | 1177 | "will soon be removed from tridentfb!\n"); |
1068 | 1178 | ||
1069 | 1179 | ||
1070 | /* If PCI id is 0x9660 then further detect chip type */ | 1180 | /* If PCI id is 0x9660 then further detect chip type */ |
1071 | 1181 | ||
1072 | if (chip_id == TGUI9660) { | 1182 | if (chip_id == TGUI9660) { |
1073 | outb(RevisionID,0x3C4); | 1183 | outb(RevisionID, 0x3C4); |
1074 | revision = inb(0x3C5); | 1184 | revision = inb(0x3C5); |
1075 | 1185 | ||
1076 | switch (revision) { | 1186 | switch (revision) { |
1077 | case 0x22: | 1187 | case 0x22: |
1078 | case 0x23: chip_id = CYBER9397;break; | 1188 | case 0x23: |
1079 | case 0x2A: chip_id = CYBER9397DVD;break; | 1189 | chip_id = CYBER9397; |
1080 | case 0x30: | 1190 | break; |
1081 | case 0x33: | 1191 | case 0x2A: |
1082 | case 0x34: | 1192 | chip_id = CYBER9397DVD; |
1083 | case 0x35: | 1193 | break; |
1084 | case 0x38: | 1194 | case 0x30: |
1085 | case 0x3A: | 1195 | case 0x33: |
1086 | case 0xB3: chip_id = CYBER9385;break; | 1196 | case 0x34: |
1087 | case 0x40 ... 0x43: chip_id = CYBER9382;break; | 1197 | case 0x35: |
1088 | case 0x4A: chip_id = CYBER9388;break; | 1198 | case 0x38: |
1089 | default:break; | 1199 | case 0x3A: |
1200 | case 0xB3: | ||
1201 | chip_id = CYBER9385; | ||
1202 | break; | ||
1203 | case 0x40 ... 0x43: | ||
1204 | chip_id = CYBER9382; | ||
1205 | break; | ||
1206 | case 0x4A: | ||
1207 | chip_id = CYBER9388; | ||
1208 | break; | ||
1209 | default: | ||
1210 | break; | ||
1090 | } | 1211 | } |
1091 | } | 1212 | } |
1092 | 1213 | ||
@@ -1095,8 +1216,7 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, const struct pci_de | |||
1095 | 1216 | ||
1096 | if (is_xp(chip_id)) { | 1217 | if (is_xp(chip_id)) { |
1097 | acc = &accel_xp; | 1218 | acc = &accel_xp; |
1098 | } else | 1219 | } else if (is_blade(chip_id)) { |
1099 | if (is_blade(chip_id)) { | ||
1100 | acc = &accel_blade; | 1220 | acc = &accel_blade; |
1101 | } else { | 1221 | } else { |
1102 | acc = &accel_image; | 1222 | acc = &accel_image; |
@@ -1108,8 +1228,8 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, const struct pci_de | |||
1108 | fb_info.par = &default_par; | 1228 | fb_info.par = &default_par; |
1109 | 1229 | ||
1110 | /* setup MMIO region */ | 1230 | /* setup MMIO region */ |
1111 | tridentfb_fix.mmio_start = pci_resource_start(dev,1); | 1231 | tridentfb_fix.mmio_start = pci_resource_start(dev, 1); |
1112 | tridentfb_fix.mmio_len = chip3D ? 0x20000:0x10000; | 1232 | tridentfb_fix.mmio_len = chip3D ? 0x20000 : 0x10000; |
1113 | 1233 | ||
1114 | if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) { | 1234 | if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) { |
1115 | debug("request_region failed!\n"); | 1235 | debug("request_region failed!\n"); |
@@ -1125,11 +1245,11 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, const struct pci_de | |||
1125 | } | 1245 | } |
1126 | 1246 | ||
1127 | enable_mmio(); | 1247 | enable_mmio(); |
1128 | 1248 | ||
1129 | /* setup framebuffer memory */ | 1249 | /* setup framebuffer memory */ |
1130 | tridentfb_fix.smem_start = pci_resource_start(dev,0); | 1250 | tridentfb_fix.smem_start = pci_resource_start(dev, 0); |
1131 | tridentfb_fix.smem_len = get_memsize(); | 1251 | tridentfb_fix.smem_len = get_memsize(); |
1132 | 1252 | ||
1133 | if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) { | 1253 | if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) { |
1134 | debug("request_mem_region failed!\n"); | 1254 | debug("request_mem_region failed!\n"); |
1135 | err = -1; | 1255 | err = -1; |
@@ -1137,7 +1257,7 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, const struct pci_de | |||
1137 | } | 1257 | } |
1138 | 1258 | ||
1139 | fb_info.screen_base = ioremap_nocache(tridentfb_fix.smem_start, | 1259 | fb_info.screen_base = ioremap_nocache(tridentfb_fix.smem_start, |
1140 | tridentfb_fix.smem_len); | 1260 | tridentfb_fix.smem_len); |
1141 | 1261 | ||
1142 | if (!fb_info.screen_base) { | 1262 | if (!fb_info.screen_base) { |
1143 | release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); | 1263 | release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); |
@@ -1147,13 +1267,13 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, const struct pci_de | |||
1147 | } | 1267 | } |
1148 | 1268 | ||
1149 | output("%s board found\n", pci_name(dev)); | 1269 | output("%s board found\n", pci_name(dev)); |
1150 | #if 0 | 1270 | #if 0 |
1151 | output("Trident board found : mem = %X,io = %X, mem_v = %X, io_v = %X\n", | 1271 | output("Trident board found : mem = %X, io = %X, mem_v = %X, io_v = %X\n", |
1152 | tridentfb_fix.smem_start, tridentfb_fix.mmio_start, fb_info.screen_base, default_par.io_virt); | 1272 | tridentfb_fix.smem_start, tridentfb_fix.mmio_start, fb_info.screen_base, default_par.io_virt); |
1153 | #endif | 1273 | #endif |
1154 | displaytype = get_displaytype(); | 1274 | displaytype = get_displaytype(); |
1155 | 1275 | ||
1156 | if(flatpanel) | 1276 | if (flatpanel) |
1157 | nativex = get_nativex(); | 1277 | nativex = get_nativex(); |
1158 | 1278 | ||
1159 | fb_info.fix = tridentfb_fix; | 1279 | fb_info.fix = tridentfb_fix; |
@@ -1166,11 +1286,11 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, const struct pci_de | |||
1166 | #endif | 1286 | #endif |
1167 | fb_info.pseudo_palette = pseudo_pal; | 1287 | fb_info.pseudo_palette = pseudo_pal; |
1168 | 1288 | ||
1169 | if (!fb_find_mode(&default_var,&fb_info,mode,NULL,0,NULL,bpp)) { | 1289 | if (!fb_find_mode(&default_var, &fb_info, mode, NULL, 0, NULL, bpp)) { |
1170 | err = -EINVAL; | 1290 | err = -EINVAL; |
1171 | goto out_unmap; | 1291 | goto out_unmap; |
1172 | } | 1292 | } |
1173 | fb_alloc_cmap(&fb_info.cmap,256,0); | 1293 | fb_alloc_cmap(&fb_info.cmap, 256, 0); |
1174 | if (defaultaccel && acc) | 1294 | if (defaultaccel && acc) |
1175 | default_var.accel_flags |= FB_ACCELF_TEXT; | 1295 | default_var.accel_flags |= FB_ACCELF_TEXT; |
1176 | else | 1296 | else |
@@ -1184,8 +1304,8 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, const struct pci_de | |||
1184 | goto out_unmap; | 1304 | goto out_unmap; |
1185 | } | 1305 | } |
1186 | output("fb%d: %s frame buffer device %dx%d-%dbpp\n", | 1306 | output("fb%d: %s frame buffer device %dx%d-%dbpp\n", |
1187 | fb_info.node, fb_info.fix.id,default_var.xres, | 1307 | fb_info.node, fb_info.fix.id, default_var.xres, |
1188 | default_var.yres,default_var.bits_per_pixel); | 1308 | default_var.yres, default_var.bits_per_pixel); |
1189 | return 0; | 1309 | return 0; |
1190 | 1310 | ||
1191 | out_unmap: | 1311 | out_unmap: |
@@ -1196,7 +1316,7 @@ out_unmap: | |||
1196 | return err; | 1316 | return err; |
1197 | } | 1317 | } |
1198 | 1318 | ||
1199 | static void __devexit trident_pci_remove(struct pci_dev * dev) | 1319 | static void __devexit trident_pci_remove(struct pci_dev *dev) |
1200 | { | 1320 | { |
1201 | struct tridentfb_par *par = (struct tridentfb_par*)fb_info.par; | 1321 | struct tridentfb_par *par = (struct tridentfb_par*)fb_info.par; |
1202 | unregister_framebuffer(&fb_info); | 1322 | unregister_framebuffer(&fb_info); |
@@ -1208,69 +1328,70 @@ static void __devexit trident_pci_remove(struct pci_dev * dev) | |||
1208 | 1328 | ||
1209 | /* List of boards that we are trying to support */ | 1329 | /* List of boards that we are trying to support */ |
1210 | static struct pci_device_id trident_devices[] = { | 1330 | static struct pci_device_id trident_devices[] = { |
1211 | {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1331 | {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1212 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1332 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1213 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1333 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1214 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1334 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1215 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1335 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1216 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1336 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1217 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1337 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1218 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1338 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1219 | {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1339 | {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1220 | {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1340 | {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1221 | {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1341 | {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1222 | {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1342 | {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1223 | {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1343 | {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1224 | {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1344 | {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1225 | {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1345 | {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1226 | {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1346 | {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1227 | {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1347 | {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1228 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1348 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1229 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1349 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1230 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID,PCI_ANY_ID,0,0,0}, | 1350 | {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
1231 | {0,} | 1351 | {0,} |
1232 | }; | 1352 | }; |
1233 | 1353 | ||
1234 | MODULE_DEVICE_TABLE(pci,trident_devices); | 1354 | MODULE_DEVICE_TABLE(pci, trident_devices); |
1235 | 1355 | ||
1236 | static struct pci_driver tridentfb_pci_driver = { | 1356 | static struct pci_driver tridentfb_pci_driver = { |
1237 | .name = "tridentfb", | 1357 | .name = "tridentfb", |
1238 | .id_table = trident_devices, | 1358 | .id_table = trident_devices, |
1239 | .probe = trident_pci_probe, | 1359 | .probe = trident_pci_probe, |
1240 | .remove = __devexit_p(trident_pci_remove) | 1360 | .remove = __devexit_p(trident_pci_remove) |
1241 | }; | 1361 | }; |
1242 | 1362 | ||
1243 | /* | 1363 | /* |
1244 | * Parse user specified options (`video=trident:') | 1364 | * Parse user specified options (`video=trident:') |
1245 | * example: | 1365 | * example: |
1246 | * video=trident:800x600,bpp=16,noaccel | 1366 | * video=trident:800x600,bpp=16,noaccel |
1247 | */ | 1367 | */ |
1248 | #ifndef MODULE | 1368 | #ifndef MODULE |
1249 | static int tridentfb_setup(char *options) | 1369 | static int tridentfb_setup(char *options) |
1250 | { | 1370 | { |
1251 | char * opt; | 1371 | char *opt; |
1252 | if (!options || !*options) | 1372 | if (!options || !*options) |
1253 | return 0; | 1373 | return 0; |
1254 | while((opt = strsep(&options,",")) != NULL ) { | 1374 | while ((opt = strsep(&options, ",")) != NULL) { |
1255 | if (!*opt) continue; | 1375 | if (!*opt) |
1256 | if (!strncmp(opt,"noaccel",7)) | 1376 | continue; |
1377 | if (!strncmp(opt, "noaccel", 7)) | ||
1257 | noaccel = 1; | 1378 | noaccel = 1; |
1258 | else if (!strncmp(opt,"fp",2)) | 1379 | else if (!strncmp(opt, "fp", 2)) |
1259 | displaytype = DISPLAY_FP; | 1380 | displaytype = DISPLAY_FP; |
1260 | else if (!strncmp(opt,"crt",3)) | 1381 | else if (!strncmp(opt, "crt", 3)) |
1261 | displaytype = DISPLAY_CRT; | 1382 | displaytype = DISPLAY_CRT; |
1262 | else if (!strncmp(opt,"bpp=",4)) | 1383 | else if (!strncmp(opt, "bpp=", 4)) |
1263 | bpp = simple_strtoul(opt+4,NULL,0); | 1384 | bpp = simple_strtoul(opt + 4, NULL, 0); |
1264 | else if (!strncmp(opt,"center",6)) | 1385 | else if (!strncmp(opt, "center", 6)) |
1265 | center = 1; | 1386 | center = 1; |
1266 | else if (!strncmp(opt,"stretch",7)) | 1387 | else if (!strncmp(opt, "stretch", 7)) |
1267 | stretch = 1; | 1388 | stretch = 1; |
1268 | else if (!strncmp(opt,"memsize=",8)) | 1389 | else if (!strncmp(opt, "memsize=", 8)) |
1269 | memsize = simple_strtoul(opt+8,NULL,0); | 1390 | memsize = simple_strtoul(opt + 8, NULL, 0); |
1270 | else if (!strncmp(opt,"memdiff=",8)) | 1391 | else if (!strncmp(opt, "memdiff=", 8)) |
1271 | memdiff = simple_strtoul(opt+8,NULL,0); | 1392 | memdiff = simple_strtoul(opt + 8, NULL, 0); |
1272 | else if (!strncmp(opt,"nativex=",8)) | 1393 | else if (!strncmp(opt, "nativex=", 8)) |
1273 | nativex = simple_strtoul(opt+8,NULL,0); | 1394 | nativex = simple_strtoul(opt + 8, NULL, 0); |
1274 | else | 1395 | else |
1275 | mode = opt; | 1396 | mode = opt; |
1276 | } | 1397 | } |
@@ -1296,18 +1417,6 @@ static void __exit tridentfb_exit(void) | |||
1296 | pci_unregister_driver(&tridentfb_pci_driver); | 1417 | pci_unregister_driver(&tridentfb_pci_driver); |
1297 | } | 1418 | } |
1298 | 1419 | ||
1299 | static struct fb_ops tridentfb_ops = { | ||
1300 | .owner = THIS_MODULE, | ||
1301 | .fb_setcolreg = tridentfb_setcolreg, | ||
1302 | .fb_pan_display = tridentfb_pan_display, | ||
1303 | .fb_blank = tridentfb_blank, | ||
1304 | .fb_check_var = tridentfb_check_var, | ||
1305 | .fb_set_par = tridentfb_set_par, | ||
1306 | .fb_fillrect = tridentfb_fillrect, | ||
1307 | .fb_copyarea= tridentfb_copyarea, | ||
1308 | .fb_imageblit = cfb_imageblit, | ||
1309 | }; | ||
1310 | |||
1311 | module_init(tridentfb_init); | 1420 | module_init(tridentfb_init); |
1312 | module_exit(tridentfb_exit); | 1421 | module_exit(tridentfb_exit); |
1313 | 1422 | ||